diff --git a/nimble/controller/include/controller/ble_ll_plna.h b/nimble/controller/include/controller/ble_ll_fem.h similarity index 73% rename from nimble/controller/include/controller/ble_ll_plna.h rename to nimble/controller/include/controller/ble_ll_fem.h index c4fb65ea9..3d645173d 100644 --- a/nimble/controller/include/controller/ble_ll_plna.h +++ b/nimble/controller/include/controller/ble_ll_fem.h @@ -17,8 +17,8 @@ * under the License. */ -#ifndef H_BLE_LL_PLNA_ -#define H_BLE_LL_PLNA_ +#ifndef H_BLE_LL_FEM_ +#define H_BLE_LL_FEM_ #ifdef __cplusplus extern "C" { @@ -26,20 +26,20 @@ extern "C" { #include "syscfg/syscfg.h" -#if MYNEWT_VAL(BLE_LL_PA) -void ble_ll_plna_pa_init(void); -void ble_ll_plna_pa_enable(void); -void ble_ll_plna_pa_disable(void); +#if MYNEWT_VAL(BLE_LL_FEM_PA) +void ble_ll_fem_pa_init(void); +void ble_ll_fem_pa_enable(void); +void ble_ll_fem_pa_disable(void); #endif -#if MYNEWT_VAL(BLE_LL_LNA) -void ble_ll_plna_lna_init(void); -void ble_ll_plna_lna_enable(void); -void ble_ll_plna_lna_disable(void); +#if MYNEWT_VAL(BLE_LL_FEM_LNA) +void ble_ll_fem_lna_init(void); +void ble_ll_fem_lna_enable(void); +void ble_ll_fem_lna_disable(void); #endif #ifdef __cplusplus } #endif -#endif /* H_BLE_LL_PLNA_ */ +#endif /* H_BLE_LL_FEM_ */ diff --git a/nimble/controller/pkg.yml b/nimble/controller/pkg.yml index 702f3d893..9115e4528 100644 --- a/nimble/controller/pkg.yml +++ b/nimble/controller/pkg.yml @@ -29,10 +29,10 @@ pkg.req_apis: - ble_driver - ble_transport - stats -pkg.req_apis.BLE_LL_PA: - - ble_ll_pa -pkg.req_apis.BLE_LL_LNA: - - ble_ll_lna +pkg.req_apis.BLE_LL_FEM_PA: + - ble_ll_fem_pa +pkg.req_apis.BLE_LL_FEM_LNA: + - ble_ll_fem_lna pkg.deps: - "@apache-mynewt-core/kernel/os" diff --git a/nimble/controller/src/ble_ll.c b/nimble/controller/src/ble_ll.c index 356bf4afd..d394bc4f7 100644 --- a/nimble/controller/src/ble_ll.c +++ b/nimble/controller/src/ble_ll.c @@ -43,7 +43,7 @@ #include "controller/ble_ll_rfmgmt.h" #include "controller/ble_ll_trace.h" #include "controller/ble_ll_sync.h" -#include "controller/ble_ll_plna.h" +#include "controller/ble_ll_fem.h" #include "ble_ll_conn_priv.h" #include "ble_ll_hci_priv.h" #include "ble_ll_priv.h" @@ -1640,11 +1640,11 @@ ble_ll_reset(void) #endif -#if MYNEWT_VAL(BLE_LL_PA) - ble_ll_plna_pa_init(); +#if MYNEWT_VAL(BLE_LL_FEM_PA) + ble_ll_fem_pa_init(); #endif -#if MYNEWT_VAL(BLE_LL_LNA) - ble_ll_plna_lna_init(); +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + ble_ll_fem_lna_init(); #endif /* Re-initialize the PHY */ diff --git a/nimble/controller/syscfg.defunct.yml b/nimble/controller/syscfg.defunct.yml index 10206da0b..6190c6bc1 100644 --- a/nimble/controller/syscfg.defunct.yml +++ b/nimble/controller/syscfg.defunct.yml @@ -46,6 +46,30 @@ syscfg.defs: description: use BLE_LL_MANUFACTURER_ID value: 0x0B65 deprecated: 1 + BLE_LL_PA: + description: use BLE_LL_FEM_PA + value: 0 + deprecated: 1 + BLE_LL_PA_GPIO: + description: use BLE_LL_FEM_PA_GPIO + value: -1 + deprecated: 1 + BLE_LL_PA_TURN_ON_US: + description: use BLE_LL_FEM_PA_TURN_ON_US + value: 1 + deprecated: 1 + BLE_LL_LNA: + description: use BLE_LL_FEM_LNA + value: 0 + deprecated: 1 + BLE_LL_LNA_GPIO: + description: use BLE_LL_FEM_LNA_GPIO + value: -1 + deprecated: 1 + BLE_LL_LNA_TURN_ON_US: + description: use BLE_LL_FEM_LNA_TURN_ON_US + value: 1 + deprecated: 1 # defunct settings (to be removed eventually) BLE_DEVICE: diff --git a/nimble/controller/syscfg.yml b/nimble/controller/syscfg.yml index acd0ef0d0..11e582c52 100644 --- a/nimble/controller/syscfg.yml +++ b/nimble/controller/syscfg.yml @@ -406,30 +406,30 @@ syscfg.defs: line number where assertion occured. value: MYNEWT_VAL(BLE_LL_VND_EVENT_ON_ASSERT) - BLE_LL_PA: - description: Enable PA support - value: 0 - BLE_LL_PA_GPIO: + BLE_LL_FEM_PA: + description: Enable FEM PA support + value: MYNEWT_VAL(BLE_LL_PA) + BLE_LL_FEM_PA_GPIO: description: > GPIO pin number to control PA. Pin is set to high state when PA should be enabled. - value: -1 - BLE_LL_PA_TURN_ON_US: + value: MYNEWT_VAL(BLE_LL_PA_GPIO) + BLE_LL_FEM_PA_TURN_ON_US: description: > Time required for PA to turn on, in microseconds. - value: 1 - BLE_LL_LNA: + value: MYNEWT_VAL(BLE_LL_PA_TURN_ON_US) + BLE_LL_FEM_LNA: description: Enable LNA support - value: 0 - BLE_LL_LNA_GPIO: + value: MYNEWT_VAL(BLE_LL_LNA) + BLE_LL_FEM_LNA_GPIO: description: > GPIO pin number to control LNA. Pin is set to high state when LNA should be enabled. - value: -1 - BLE_LL_LNA_TURN_ON_US: + value: MYNEWT_VAL(BLE_LL_LNA_GPIO) + BLE_LL_FEM_LNA_TURN_ON_US: description: > Time required for LNA to turn on, in microseconds. - value: 1 + value: MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US) BLE_LL_SYSINIT_STAGE: description: > @@ -519,8 +519,8 @@ syscfg.vals.'!BLE_HOST && !BABBLESIM': syscfg.restrictions: - BLE_TRANSPORT_LL == "native" - BLE_LL_PUBLIC_DEV_ADDR <= 0xffffffffffff - - BLE_LL_PA == 0 || BLE_LL_PA_GPIO >= 0 - - BLE_LL_LNA == 0 || BLE_LL_LNA_GPIO >= 0 + - BLE_LL_FEM_PA == 0 || BLE_LL_FEM_PA_GPIO >= 0 + - BLE_LL_FEM_LNA == 0 || BLE_LL_FEM_LNA_GPIO >= 0 $import: # defunct and deprecated settings diff --git a/nimble/drivers/plna/sky66112/pkg.yml b/nimble/drivers/fem/sky66112/pkg.yml similarity index 92% rename from nimble/drivers/plna/sky66112/pkg.yml rename to nimble/drivers/fem/sky66112/pkg.yml index c3cb0fd32..5dd738a07 100644 --- a/nimble/drivers/plna/sky66112/pkg.yml +++ b/nimble/drivers/fem/sky66112/pkg.yml @@ -17,13 +17,13 @@ # under the License. # -pkg.name: nimble/drivers/plna/sky66112 +pkg.name: nimble/drivers/fem/sky66112 pkg.description: Driver for SKY66112 front-end module pkg.author: "Apache Mynewt " pkg.homepage: "https://mynewt.apache.org/" pkg.apis: - - ble_ll_pa - - ble_ll_lna + - ble_ll_fem_pa + - ble_ll_fem_lna pkg.deps: - nimble/controller diff --git a/nimble/drivers/plna/sky66112/src/sky66112.c b/nimble/drivers/fem/sky66112/src/sky66112.c similarity index 91% rename from nimble/drivers/plna/sky66112/src/sky66112.c rename to nimble/drivers/fem/sky66112/src/sky66112.c index 4a849fbb5..7a957b0b4 100644 --- a/nimble/drivers/plna/sky66112/src/sky66112.c +++ b/nimble/drivers/fem/sky66112/src/sky66112.c @@ -21,7 +21,7 @@ #include #include "syscfg/syscfg.h" #include "hal/hal_gpio.h" -#include "controller/ble_ll_plna.h" +#include "controller/ble_ll_fem.h" #define NO_BYPASS \ ((MYNEWT_VAL(SKY66112_TX_BYPASS) == 0) && \ @@ -38,13 +38,13 @@ sky66112_bypass(uint8_t enabled) } void -ble_ll_plna_pa_init(void) +ble_ll_fem_pa_init(void) { /* Nothing to do here */ } void -ble_ll_plna_pa_enable(void) +ble_ll_fem_pa_enable(void) { if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) { sky66112_bypass(0); @@ -52,7 +52,7 @@ ble_ll_plna_pa_enable(void) } void -ble_ll_plna_pa_disable(void) +ble_ll_fem_pa_disable(void) { if (!MYNEWT_VAL(SKY66112_TX_BYPASS)) { sky66112_bypass(1); @@ -60,13 +60,13 @@ ble_ll_plna_pa_disable(void) } void -ble_ll_plna_lna_init(void) +ble_ll_fem_lna_init(void) { /* Nothing to do here */ } void -ble_ll_plna_lna_enable(void) +ble_ll_fem_lna_enable(void) { if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) { sky66112_bypass(0); @@ -74,7 +74,7 @@ ble_ll_plna_lna_enable(void) } void -ble_ll_plna_lna_disable(void) +ble_ll_fem_lna_disable(void) { if (!MYNEWT_VAL(SKY66112_RX_BYPASS)) { sky66112_bypass(1); diff --git a/nimble/drivers/plna/sky66112/syscfg.yml b/nimble/drivers/fem/sky66112/syscfg.yml similarity index 97% rename from nimble/drivers/plna/sky66112/syscfg.yml rename to nimble/drivers/fem/sky66112/syscfg.yml index 50434553a..c7aaa0a8b 100644 --- a/nimble/drivers/plna/sky66112/syscfg.yml +++ b/nimble/drivers/fem/sky66112/syscfg.yml @@ -57,10 +57,10 @@ syscfg.defs: Only valid if CPS signal is controller by driver. value: 0 -syscfg.vals.!BLE_LL_PA: +syscfg.vals.!BLE_LL_FEM_PA: # Enable TX bypass by default if PA is disabled SKY66112_TX_BYPASS: 1 -syscfg.vals.!BLE_LL_LNA: +syscfg.vals.!BLE_LL_FEM_LNA: # Enable RX bypass by default if LNA is disabled SKY66112_RX_BYPASS: 1 diff --git a/nimble/drivers/nrf52/src/ble_phy.c b/nimble/drivers/nrf52/src/ble_phy.c index bfc111b6c..a94cb2a75 100644 --- a/nimble/drivers/nrf52/src/ble_phy.c +++ b/nimble/drivers/nrf52/src/ble_phy.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -37,7 +38,6 @@ #include "controller/ble_phy.h" #include "controller/ble_phy_trace.h" #include "controller/ble_ll.h" -#include "controller/ble_ll_plna.h" #include "nrfx.h" #if MYNEWT #include "mcu/nrf52_clock.h" @@ -321,20 +321,20 @@ struct nrf_ccm_data g_nrf_ccm_data; static int g_ble_phy_gpiote_idx; -#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA) +#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA) -#define PLNA_SINGLE_GPIO \ - (!MYNEWT_VAL(BLE_LL_PA) || !MYNEWT_VAL(BLE_LL_LNA) || \ - (MYNEWT_VAL(BLE_LL_PA_GPIO) == MYNEWT_VAL(BLE_LL_LNA_GPIO))) +#define FEM_SINGLE_GPIO \ + (!MYNEWT_VAL(BLE_LL_FEM_PA) || !MYNEWT_VAL(BLE_LL_FEM_LNA) || \ + (MYNEWT_VAL(BLE_LL_FEM_PA_GPIO) == MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO))) -#if PLNA_SINGLE_GPIO -static uint8_t plna_idx; +#if FEM_SINGLE_GPIO +static uint8_t fem_idx; #else -#if MYNEWT_VAL(BLE_LL_PA) -static uint8_t plna_pa_idx; +#if MYNEWT_VAL(BLE_LL_FEM_PA) +static uint8_t fem_pa_idx; #endif -#if MYNEWT_VAL(BLE_LL_LNA) -static uint8_t plna_lna_idx; +#if MYNEWT_VAL(BLE_LL_FEM_LNA) +static uint8_t fem_lna_idx; #endif #endif @@ -466,14 +466,14 @@ ble_phy_mode_set(uint8_t tx_phy_mode, uint8_t rx_phy_mode) #endif static void -ble_phy_plna_enable_pa(void) +ble_phy_fem_enable_pa(void) { -#if MYNEWT_VAL(BLE_LL_PA) - ble_ll_plna_pa_enable(); +#if MYNEWT_VAL(BLE_LL_FEM_PA) + ble_ll_fem_pa_enable(); -#if !PLNA_SINGLE_GPIO - NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[plna_pa_idx]); - NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[plna_pa_idx]); +#if !FEM_SINGLE_GPIO + NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[fem_pa_idx]); + NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[fem_pa_idx]); #endif NRF_PPI->CHENSET = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk; @@ -481,14 +481,14 @@ ble_phy_plna_enable_pa(void) } static void -ble_phy_plna_enable_lna(void) +ble_phy_fem_enable_lna(void) { -#if MYNEWT_VAL(BLE_LL_LNA) - ble_ll_plna_lna_enable(); +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + ble_ll_fem_lna_enable(); -#if !PLNA_SINGLE_GPIO - NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[plna_lna_idx]); - NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[plna_lna_idx]); +#if !FEM_SINGLE_GPIO + NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[fem_lna_idx]); + NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[fem_lna_idx]); #endif NRF_PPI->CHENSET = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk; @@ -1054,7 +1054,7 @@ ble_phy_tx_end_isr(void) NRF_TIMER0->EVENTS_COMPARE[0] = 0; nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH21_Msk); - ble_phy_plna_enable_lna(); + ble_phy_fem_enable_lna(); } else if (transition == BLE_PHY_TRANSITION_TX_TX) { /* Schedule TX exactly T_IFS after TX end captured in CC[2] */ tx_time = NRF_TIMER0->CC[2] + ble_phy_tifs_get(); @@ -1196,7 +1196,7 @@ ble_phy_rx_end_isr(void) NRF_TIMER0->EVENTS_COMPARE[0] = 0; nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH20_Msk); - ble_phy_plna_enable_pa(); + ble_phy_fem_enable_pa(); /* * XXX: Hack warning! @@ -1408,9 +1408,9 @@ ble_phy_isr(void) switch (g_ble_phy_data.phy_state) { case BLE_PHY_STATE_RX: -#if MYNEWT_VAL(BLE_LL_LNA) +#if MYNEWT_VAL(BLE_LL_FEM_LNA) NRF_PPI->CHENCLR = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk; - ble_ll_plna_lna_disable(); + ble_ll_fem_lna_disable(); #endif if (g_ble_phy_data.phy_rx_started) { ble_phy_rx_end_isr(); @@ -1419,9 +1419,9 @@ ble_phy_isr(void) } break; case BLE_PHY_STATE_TX: -#if MYNEWT_VAL(BLE_LL_PA) +#if MYNEWT_VAL(BLE_LL_FEM_PA) NRF_PPI->CHENCLR = PPI_CHEN_CH6_Msk | PPI_CHEN_CH7_Msk; - ble_ll_plna_pa_disable(); + ble_ll_fem_pa_disable(); #endif ble_phy_tx_end_isr(); break; @@ -1441,8 +1441,8 @@ ble_phy_isr(void) #if MYNEWT_VAL(BLE_PHY_DBG_TIME_TXRXEN_READY_PIN) >= 0 || \ MYNEWT_VAL(BLE_PHY_DBG_TIME_ADDRESS_END_PIN) >= 0 || \ MYNEWT_VAL(BLE_PHY_DBG_TIME_WFR_PIN) >= 0 || \ - MYNEWT_VAL(BLE_LL_PA) || \ - MYNEWT_VAL(BLE_LL_LNA) + MYNEWT_VAL(BLE_LL_FEM_PA) || \ + MYNEWT_VAL(BLE_LL_FEM_LNA) static int ble_phy_gpiote_configure(int pin) { @@ -1630,19 +1630,19 @@ ble_phy_init(void) (uint32_t)&(NRF_TIMER0->EVENTS_COMPARE[3]), (uint32_t)&(NRF_RADIO->TASKS_DISABLE)); -#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA) -#if PLNA_SINGLE_GPIO - plna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO)); - NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[plna_idx]); - NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[plna_idx]); +#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA) +#if FEM_SINGLE_GPIO + fem_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO)); + NRF_PPI->CH[6].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_SET[fem_idx]); + NRF_PPI->CH[7].TEP = (uint32_t) &(NRF_GPIOTE->TASKS_CLR[fem_idx]); #else -#if MYNEWT_VAL(BLE_LL_PA) - plna_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO)); - NRF_GPIOTE->TASKS_CLR[plna_pa_idx] = 1; +#if MYNEWT_VAL(BLE_LL_FEM_PA) + fem_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO)); + NRF_GPIOTE->TASKS_CLR[fem_pa_idx] = 1; #endif -#if MYNEWT_VAL(BLE_LL_LNA) - plna_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_LNA_GPIO)); - NRF_GPIOTE->TASKS_CLR[plna_lna_idx] = 1; +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + fem_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO)); + NRF_GPIOTE->TASKS_CLR[fem_lna_idx] = 1; #endif #endif @@ -1814,7 +1814,7 @@ ble_phy_tx_set_start_time(uint32_t cputime, uint8_t rem_usecs) nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH20_Msk); rc = 0; - ble_phy_plna_enable_pa(); + ble_phy_fem_enable_pa(); } return rc; @@ -1861,7 +1861,7 @@ ble_phy_rx_set_start_time(uint32_t cputime, uint8_t rem_usecs) /* Enable PPI to automatically start RXEN */ nrf_ppi_channels_enable(NRF_PPI, PPI_CHEN_CH21_Msk); - ble_phy_plna_enable_lna(); + ble_phy_fem_enable_lna(); /* Start rx */ rc = ble_phy_rx(); diff --git a/nimble/drivers/nrf5340/src/ble_phy.c b/nimble/drivers/nrf5340/src/ble_phy.c index 6999aee63..76c0289e0 100644 --- a/nimble/drivers/nrf5340/src/ble_phy.c +++ b/nimble/drivers/nrf5340/src/ble_phy.c @@ -27,7 +27,7 @@ #include #include #include -#include "controller/ble_ll_plna.h" +#include "controller/ble_ll_fem.h" #include #include @@ -59,8 +59,8 @@ #define DPPI_CH_ENABLE_ALL (DPPIC_CHEN_CH0_Msk | DPPIC_CHEN_CH1_Msk | DPPIC_CHEN_CH2_Msk | \ DPPIC_CHEN_CH3_Msk | DPPIC_CHEN_CH4_Msk | DPPIC_CHEN_CH5_Msk) -#define DPPI_CH_MASK_PLNA (DPPI_CH_MASK(TIMER0_EVENTS_COMPARE_4) | \ - DPPI_CH_MASK(RADIO_EVENTS_DISABLED)) +#define DPPI_CH_MASK_FEM (DPPI_CH_MASK(TIMER0_EVENTS_COMPARE_4) | \ + DPPI_CH_MASK(RADIO_EVENTS_DISABLED)) extern uint8_t g_nrf_num_irks; extern uint32_t g_nrf_irk_list[]; @@ -244,20 +244,20 @@ static struct nrf_ccm_data nrf_ccm_data; static int g_ble_phy_gpiote_idx; -#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA) +#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA) -#define PLNA_SINGLE_GPIO \ - (!MYNEWT_VAL(BLE_LL_PA) || !MYNEWT_VAL(BLE_LL_LNA) || \ - (MYNEWT_VAL(BLE_LL_PA_GPIO) == MYNEWT_VAL(BLE_LL_LNA_GPIO))) +#define FEM_SINGLE_GPIO \ + (!MYNEWT_VAL(BLE_LL_FEM_PA) || !MYNEWT_VAL(BLE_LL_FEM_LNA) || \ + (MYNEWT_VAL(BLE_LL_FEM_PA_GPIO) == MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO))) -#if PLNA_SINGLE_GPIO -static uint8_t plna_idx; +#if FEM_SINGLE_GPIO +static uint8_t fem_idx; #else -#if MYNEWT_VAL(BLE_LL_PA) -static uint8_t plna_pa_idx; +#if MYNEWT_VAL(BLE_LL_FEM_PA) +static uint8_t fem_pa_idx; #endif -#if MYNEWT_VAL(BLE_LL_LNA) -static uint8_t plna_lna_idx; +#if MYNEWT_VAL(BLE_LL_FEM_LNA) +static uint8_t fem_lna_idx; #endif #endif @@ -329,80 +329,80 @@ ble_phy_mode_set(uint8_t tx_phy_mode, uint8_t rx_phy_mode) } static void -ble_phy_plna_enable_pa(void) +ble_phy_fem_enable_pa(void) { -#if MYNEWT_VAL(BLE_LL_PA) - ble_ll_plna_pa_enable(); +#if MYNEWT_VAL(BLE_LL_FEM_PA) + ble_ll_fem_pa_enable(); /* CC[0] is set to radio enable */ NRF_TIMER0_NS->CC[4] = NRF_TIMER0_NS->CC[0] + BLE_PHY_T_RXENFAST - - MYNEWT_VAL(BLE_LL_PA_TURN_ON_US); + MYNEWT_VAL(BLE_LL_FEM_PA_TURN_ON_US); -#if PLNA_SINGLE_GPIO - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); +#if FEM_SINGLE_GPIO + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); #else - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); #endif #endif } static void -ble_phy_plna_disable_pa(void) +ble_phy_fem_disable_pa(void) { -#if MYNEWT_VAL(BLE_LL_PA) - ble_ll_plna_pa_disable(); +#if MYNEWT_VAL(BLE_LL_FEM_PA) + ble_ll_fem_pa_disable(); -#if PLNA_SINGLE_GPIO - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); +#if FEM_SINGLE_GPIO + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); #else - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); #endif #endif } static void -ble_phy_plna_enable_lna(void) +ble_phy_fem_enable_lna(void) { -#if MYNEWT_VAL(BLE_LL_LNA) - ble_ll_plna_lna_enable(); +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + ble_ll_fem_lna_enable(); /* CC[0] is set to radio enable */ NRF_TIMER0_NS->CC[4] = NRF_TIMER0_NS->CC[0] + BLE_PHY_T_RXENFAST - - MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US); + MYNEWT_VAL(BLE_LL_FEM_LNA_TURN_ON_US); -#if PLNA_SINGLE_GPIO - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); +#if FEM_SINGLE_GPIO + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); #else - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_4); #endif #endif } static void -ble_phy_plna_disable_lna(void) +ble_phy_fem_disable_lna(void) { -#if MYNEWT_VAL(BLE_LL_LNA) - ble_ll_plna_lna_disable(); +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + ble_ll_fem_lna_disable(); -#if PLNA_SINGLE_GPIO - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); +#if FEM_SINGLE_GPIO + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); #else - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); #endif #endif } static void -ble_phy_plna_force_disable(void) +ble_phy_fem_force_disable(void) { -#if PLNA_SINGLE_GPIO - NRF_GPIOTE_NS->TASKS_CLR[plna_idx] = 1; +#if FEM_SINGLE_GPIO + NRF_GPIOTE_NS->TASKS_CLR[fem_idx] = 1; #else -#if MYNEWT_VAL(BLE_LL_PA) - NRF_GPIOTE_NS->TASKS_CLR[plna_pa_idx] = 1; +#if MYNEWT_VAL(BLE_LL_FEM_PA) + NRF_GPIOTE_NS->TASKS_CLR[fem_pa_idx] = 1; #endif -#if MYNEWT_VAL(BLE_LL_LNA) - NRF_GPIOTE_NS->TASKS_CLR[plna_lna_idx] = 1; +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + NRF_GPIOTE_NS->TASKS_CLR[fem_lna_idx] = 1; #endif #endif } @@ -576,14 +576,14 @@ ble_phy_set_start_time(uint32_t cputime, uint8_t rem_usecs, bool tx) * it's used as a base for turn-on time calculation and thus cannot wrap * around on subtraction. */ - if (MYNEWT_VAL(BLE_LL_PA) && tx && - (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_PA_TURN_ON_US))) { + if (MYNEWT_VAL(BLE_LL_FEM_PA) && tx && + (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_FEM_PA_TURN_ON_US))) { cputime--; rem_usecs += 30; } - if (MYNEWT_VAL(BLE_LL_LNA) && !tx && - (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_LNA_TURN_ON_US))) { + if (MYNEWT_VAL(BLE_LL_FEM_LNA) && !tx && + (rem_usecs + BLE_PHY_T_RXENFAST <= MYNEWT_VAL(BLE_LL_FEM_LNA_TURN_ON_US))) { cputime--; rem_usecs += 30; } @@ -930,7 +930,7 @@ ble_phy_tx_end_isr(void) /* Start radio on timer */ NRF_RADIO_NS->SUBSCRIBE_RXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0); - ble_phy_plna_enable_lna(); + ble_phy_fem_enable_lna(); } else { NRF_TIMER0_NS->TASKS_STOP = 1; NRF_TIMER0_NS->TASKS_SHUTDOWN = 1; @@ -1054,7 +1054,7 @@ ble_phy_rx_end_isr(void) /* Enable automatic TX */ NRF_RADIO_NS->SUBSCRIBE_TXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0); - ble_phy_plna_enable_pa(); + ble_phy_fem_enable_pa(); /* * XXX: Hack warning! @@ -1257,20 +1257,20 @@ ble_phy_isr(void) NRF_RADIO_NS->INTENCLR = RADIO_INTENCLR_DISABLED_Msk; switch (g_ble_phy_data.phy_state) { - case BLE_PHY_STATE_RX: - ble_phy_plna_disable_lna(); - if (g_ble_phy_data.phy_rx_started) { - ble_phy_rx_end_isr(); - } else { - ble_ll_wfr_timer_exp(NULL); - } - break; - case BLE_PHY_STATE_TX: - ble_phy_plna_disable_pa(); - ble_phy_tx_end_isr(); - break; - default: - BLE_LL_ASSERT(0); + case BLE_PHY_STATE_RX: + ble_phy_fem_disable_lna(); + if (g_ble_phy_data.phy_rx_started) { + ble_phy_rx_end_isr(); + } else { + ble_ll_wfr_timer_exp(NULL); + } + break; + case BLE_PHY_STATE_TX: + ble_phy_fem_disable_pa(); + ble_phy_tx_end_isr(); + break; + default: + BLE_LL_ASSERT(0); } } @@ -1284,8 +1284,8 @@ ble_phy_isr(void) #if MYNEWT_VAL(BLE_PHY_DBG_TIME_TXRXEN_READY_PIN) >= 0 || \ MYNEWT_VAL(BLE_PHY_DBG_TIME_ADDRESS_END_PIN) >= 0 || \ MYNEWT_VAL(BLE_PHY_DBG_TIME_WFR_PIN) >= 0 || \ - MYNEWT_VAL(BLE_LL_PA) || \ - MYNEWT_VAL(BLE_LL_LNA) + MYNEWT_VAL(BLE_LL_FEM_PA) || \ + MYNEWT_VAL(BLE_LL_FEM_LNA) static int ble_phy_gpiote_configure(int pin) { @@ -1463,7 +1463,7 @@ ble_phy_init(void) NRF_TIMER0_NS->SUBSCRIBE_CAPTURE[1] = DPPI_CH_SUB(RADIO_EVENTS_ADDRESS); NRF_TIMER0_NS->SUBSCRIBE_CAPTURE[2] = DPPI_CH_SUB(RADIO_EVENTS_END); -#if MYNEWT_VAL(BLE_LL_PA) || MYNEWT_VAL(BLE_LL_LNA) +#if MYNEWT_VAL(BLE_LL_FEM_PA) || MYNEWT_VAL(BLE_LL_FEM_LNA) /* We keep both channels enabled and CLR task subscribed all the time. It's * enough to just (un)subscribe SET task when needed. * TODO: figure out if this affects power consumption @@ -1476,27 +1476,27 @@ ble_phy_init(void) NRF_RADIO_NS->PUBLISH_DISABLED = DPPI_CH_PUB(RADIO_EVENTS_DISABLED); NRF_DPPIC_NS->CHENSET = DPPI_CH_MASK(RADIO_EVENTS_DISABLED); -#if PLNA_SINGLE_GPIO - plna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO)); - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_0); - NRF_GPIOTE_NS->SUBSCRIBE_CLR[plna_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED); - NRF_GPIOTE_NS->TASKS_CLR[plna_idx] = 1; +#if FEM_SINGLE_GPIO + fem_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO)); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_0); + NRF_GPIOTE_NS->SUBSCRIBE_CLR[fem_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED); + NRF_GPIOTE_NS->TASKS_CLR[fem_idx] = 1; #else -#if MYNEWT_VAL(BLE_LL_PA) - plna_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_PA_GPIO)); - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); - NRF_GPIOTE_NS->SUBSCRIBE_CLR[plna_pa_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED); - NRF_GPIOTE_NS->TASKS_CLR[plna_pa_idx] = 1; +#if MYNEWT_VAL(BLE_LL_FEM_PA) + fem_pa_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_PA_GPIO)); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); + NRF_GPIOTE_NS->SUBSCRIBE_CLR[fem_pa_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED); + NRF_GPIOTE_NS->TASKS_CLR[fem_pa_idx] = 1; #endif -#if MYNEWT_VAL(BLE_LL_LNA) - plna_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_LNA_GPIO)); - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); - NRF_GPIOTE_NS->SUBSCRIBE_CLR[plna_lna_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED); - NRF_GPIOTE_NS->TASKS_CLR[plna_lna_idx] = 1; +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + fem_lna_idx = ble_phy_gpiote_configure(MYNEWT_VAL(BLE_LL_FEM_LNA_GPIO)); + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); + NRF_GPIOTE_NS->SUBSCRIBE_CLR[fem_lna_idx] = DPPI_CH_SUB(RADIO_EVENTS_DISABLED); + NRF_GPIOTE_NS->TASKS_CLR[fem_lna_idx] = 1; #endif #endif - NRF_DPPIC_NS->CHENSET = DPPI_CH_MASK_PLNA; + NRF_DPPIC_NS->CHENSET = DPPI_CH_MASK_FEM; #endif /* Set isr in vector table and enable interrupt */ @@ -1630,7 +1630,7 @@ ble_phy_tx_set_start_time(uint32_t cputime, uint8_t rem_usecs) NRF_RADIO_NS->SUBSCRIBE_TXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0); rc = 0; - ble_phy_plna_enable_pa(); + ble_phy_fem_enable_pa(); } return rc; } @@ -1663,7 +1663,7 @@ ble_phy_rx_set_start_time(uint32_t cputime, uint8_t rem_usecs) /* Enable PPI to automatically start RXEN */ NRF_RADIO_NS->SUBSCRIBE_RXEN = DPPI_CH_SUB(TIMER0_EVENTS_COMPARE_0); - ble_phy_plna_enable_lna(); + ble_phy_fem_enable_lna(); /* Start rx */ rc = ble_phy_rx(); @@ -1940,14 +1940,14 @@ ble_phy_disable_irq_and_ppi(void) NRF_AAR_NS->SUBSCRIBE_START = DPPI_CH_UNSUB(RADIO_EVENTS_BCMATCH); NRF_CCM_NS->SUBSCRIBE_CRYPT = DPPI_CH_UNSUB(RADIO_EVENTS_ADDRESS); -#if PLNA_SINGLE_GPIO - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_idx] = DPPI_CH_UNSUB(RADIO_EVENTS_READY); +#if FEM_SINGLE_GPIO + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_idx] = DPPI_CH_UNSUB(RADIO_EVENTS_READY); #else -#if MYNEWT_VAL(BLE_LL_PA) - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); +#if MYNEWT_VAL(BLE_LL_FEM_PA) + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_pa_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); #endif -#if MYNEWT_VAL(BLE_LL_LNA) - NRF_GPIOTE_NS->SUBSCRIBE_SET[plna_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); +#if MYNEWT_VAL(BLE_LL_FEM_LNA) + NRF_GPIOTE_NS->SUBSCRIBE_SET[fem_lna_idx] = DPPI_CH_UNSUB(TIMER0_EVENTS_COMPARE_4); #endif #endif @@ -1989,7 +1989,7 @@ ble_phy_disable(void) ble_phy_stop_usec_timer(); ble_phy_disable_irq_and_ppi(); - ble_phy_plna_force_disable(); + ble_phy_fem_force_disable(); ble_phy_dbg_clear_pins(); }