diff --git a/porting/nimble/include/nimble/nimble_port.h b/porting/nimble/include/nimble/nimble_port.h index 55e413a76..638db0f09 100644 --- a/porting/nimble/include/nimble/nimble_port.h +++ b/porting/nimble/include/nimble/nimble_port.h @@ -27,7 +27,7 @@ #define NIMBLE_HS_STACK_SIZE CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE #if (CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2) -#define NIMBLE_LL_STACK_SIZE CONFIG_BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE +#define NIMBLE_LL_STACK_SIZE CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE #endif #ifdef __cplusplus diff --git a/porting/nimble/src/hal_uart.c b/porting/nimble/src/hal_uart.c index cbfe7225c..94a4e1ed4 100644 --- a/porting/nimble/src/hal_uart.c +++ b/porting/nimble/src/hal_uart.c @@ -361,9 +361,9 @@ void uart_init(uint32_t baud) u->u_rx_sem = xSemaphoreCreateBinary(); - uint8_t TX_IO = CONFIG_BT_NIMBLE_HCI_UART_TX_PIN, RX_IO = CONFIG_BT_NIMBLE_HCI_UART_RX_PIN, ISR_ID = ETS_UART1_INUM; - ets_printf("set nimble port tx:%d, rx:%d.\n", TX_IO, RX_IO); - ets_printf("set baud:%d.\n", baud); + uint8_t TX_IO = CONFIG_BT_LE_HCI_UART_TX_PIN, RX_IO = CONFIG_BT_LE_HCI_UART_RX_PIN, ISR_ID = ETS_UART1_INUM; + printf("set nimble port tx:%d, rx:%d.\n", TX_IO, RX_IO); + printf("set baud:%d.\n", baud); intr_handler_set(ISR_ID, (intr_handler_t)&uart_tout_isr, NULL); intr_matrix_route(ETS_UART1_INTR_SOURCE, ISR_ID); esprv_intc_int_enable(BIT(ISR_ID)); @@ -379,6 +379,6 @@ void uart_init(uint32_t baud) // uart_ll_set_hw_flow_ctrl(hw, UART_HW_FLOWCTRL_CTS_RTS, 110); - xTaskCreate(uart_rx_task, "uart_rx", CONFIG_BT_NIMBLE_HCI_UART_TASK_STACK_SIZE, + xTaskCreate(uart_rx_task, "uart_rx", CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE, NULL, 1, &hci_uart_task_h); } diff --git a/porting/nimble/src/nimble_port.c b/porting/nimble/src/nimble_port.c index 01a4485b0..358a99b7e 100644 --- a/porting/nimble/src/nimble_port.c +++ b/porting/nimble/src/nimble_port.c @@ -38,7 +38,7 @@ #endif #endif -#ifdef CONFIG_BT_NIMBLE_HCI_INTERFACE_USE_UART +#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART #include "transport/uart/ble_hci_uart.h" #else #include "transport/ram/ble_hci_ram.h" diff --git a/porting/npl/freertos/src/npl_os_freertos.c b/porting/npl/freertos/src/npl_os_freertos.c index 6cd9f68a2..8264e087e 100644 --- a/porting/npl/freertos/src/npl_os_freertos.c +++ b/porting/npl/freertos/src/npl_os_freertos.c @@ -44,9 +44,15 @@ static const char *TAG = "Timer"; #define OS_MEM_ALLOC (1) +#if CONFIG_BT_NIMBLE_ENABLED #define BLE_HS_HCI_EVT_COUNT \ (MYNEWT_VAL(BLE_HCI_EVT_HI_BUF_COUNT) + \ MYNEWT_VAL(BLE_HCI_EVT_LO_BUF_COUNT)) +#else +#define BLE_HS_HCI_EVT_COUNT \ + (CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT + \ + CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT) +#endif #define LL_NPL_BASE_EVENT_COUNT (11) #define LL_SCAN_EXT_AUX_EVT_CNT (MYNEWT_VAL(BLE_LL_EXT_ADV_AUX_PTR_CNT))