mirror of
https://github.com/espressif/esp-nimble.git
synced 2026-10-01 21:17:21 +00:00
porting/hal_timer: use OS_[ENTER/EXIT]_CRITICAL()
This commit is contained in:
committed by
Andrzej Kaczmarek
parent
f8f02740ac
commit
afc2741413
@@ -25,19 +25,6 @@
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#include "nrfx.h"
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#include "nrfx.h"
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#include "hal/hal_timer.h"
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#include "hal/hal_timer.h"
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#define __HAL_DISABLE_INTERRUPTS(x) \
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do { \
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x = __get_PRIMASK(); \
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__disable_irq(); \
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} while(0);
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#define __HAL_ENABLE_INTERRUPTS(x) \
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do { \
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if (!x) { \
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__enable_irq(); \
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} \
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} while(0);
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/* IRQ prototype */
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/* IRQ prototype */
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typedef void (*hal_timer_irq_handler_t)(void);
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typedef void (*hal_timer_irq_handler_t)(void);
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@@ -231,12 +218,12 @@ static uint32_t
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hal_timer_read_bsptimer(struct nrf52_hal_timer *bsptimer)
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hal_timer_read_bsptimer(struct nrf52_hal_timer *bsptimer)
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{
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{
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uint32_t low32;
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uint32_t low32;
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uint32_t ctx;
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os_sr_t sr;
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uint32_t tcntr;
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uint32_t tcntr;
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NRF_RTC_Type *rtctimer;
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NRF_RTC_Type *rtctimer;
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rtctimer = (NRF_RTC_Type *)bsptimer->tmr_reg;
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rtctimer = (NRF_RTC_Type *)bsptimer->tmr_reg;
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__HAL_DISABLE_INTERRUPTS(ctx);
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OS_ENTER_CRITICAL(sr);
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tcntr = bsptimer->tmr_cntr;
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tcntr = bsptimer->tmr_cntr;
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low32 = rtctimer->COUNTER;
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low32 = rtctimer->COUNTER;
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if (rtctimer->EVENTS_OVRFLW) {
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if (rtctimer->EVENTS_OVRFLW) {
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@@ -247,7 +234,7 @@ hal_timer_read_bsptimer(struct nrf52_hal_timer *bsptimer)
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NVIC_SetPendingIRQ(bsptimer->tmr_irq_num);
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NVIC_SetPendingIRQ(bsptimer->tmr_irq_num);
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}
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}
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tcntr |= low32;
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tcntr |= low32;
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__HAL_ENABLE_INTERRUPTS(ctx);
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OS_EXIT_CRITICAL(sr);
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return tcntr;
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return tcntr;
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}
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}
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@@ -265,11 +252,11 @@ hal_timer_chk_queue(struct nrf52_hal_timer *bsptimer)
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{
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{
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int32_t delta;
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int32_t delta;
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uint32_t tcntr;
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uint32_t tcntr;
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uint32_t ctx;
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os_sr_t sr;
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struct hal_timer *timer;
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struct hal_timer *timer;
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/* disable interrupts */
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/* disable interrupts */
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__HAL_DISABLE_INTERRUPTS(ctx);
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OS_ENTER_CRITICAL(sr);
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while ((timer = TAILQ_FIRST(&bsptimer->hal_timer_q)) != NULL) {
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while ((timer = TAILQ_FIRST(&bsptimer->hal_timer_q)) != NULL) {
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if (bsptimer->tmr_rtc) {
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if (bsptimer->tmr_rtc) {
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tcntr = hal_timer_read_bsptimer(bsptimer);
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tcntr = hal_timer_read_bsptimer(bsptimer);
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@@ -302,7 +289,7 @@ hal_timer_chk_queue(struct nrf52_hal_timer *bsptimer)
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nrf_timer_disable_ocmp(bsptimer->tmr_reg);
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nrf_timer_disable_ocmp(bsptimer->tmr_reg);
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}
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}
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}
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}
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__HAL_ENABLE_INTERRUPTS(ctx);
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OS_EXIT_CRITICAL(sr);
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}
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}
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#endif
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#endif
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@@ -528,7 +515,7 @@ int
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hal_timer_config(int timer_num, uint32_t freq_hz)
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hal_timer_config(int timer_num, uint32_t freq_hz)
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{
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{
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int rc;
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int rc;
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uint32_t ctx;
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os_sr_t sr;
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struct nrf52_hal_timer *bsptimer;
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struct nrf52_hal_timer *bsptimer;
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#if MYNEWT_VAL(TIMER_5)
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#if MYNEWT_VAL(TIMER_5)
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NRF_RTC_Type *rtctimer;
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NRF_RTC_Type *rtctimer;
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@@ -548,7 +535,7 @@ hal_timer_config(int timer_num, uint32_t freq_hz)
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bsptimer->tmr_freq = freq_hz;
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bsptimer->tmr_freq = freq_hz;
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bsptimer->tmr_enabled = 1;
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bsptimer->tmr_enabled = 1;
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__HAL_DISABLE_INTERRUPTS(ctx);
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OS_ENTER_CRITICAL(sr);
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rtctimer = (NRF_RTC_Type *)bsptimer->tmr_reg;
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rtctimer = (NRF_RTC_Type *)bsptimer->tmr_reg;
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@@ -568,7 +555,7 @@ hal_timer_config(int timer_num, uint32_t freq_hz)
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/* Set isr in vector table and enable interrupt */
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/* Set isr in vector table and enable interrupt */
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NVIC_EnableIRQ(bsptimer->tmr_irq_num);
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NVIC_EnableIRQ(bsptimer->tmr_irq_num);
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__HAL_ENABLE_INTERRUPTS(ctx);
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OS_EXIT_CRITICAL(sr);
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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@@ -594,7 +581,7 @@ int
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hal_timer_deinit(int timer_num)
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hal_timer_deinit(int timer_num)
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{
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{
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int rc;
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int rc;
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uint32_t ctx;
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os_sr_t sr;
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struct nrf52_hal_timer *bsptimer;
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struct nrf52_hal_timer *bsptimer;
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NRF_TIMER_Type *hwtimer;
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NRF_TIMER_Type *hwtimer;
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NRF_RTC_Type *rtctimer;
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NRF_RTC_Type *rtctimer;
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@@ -602,7 +589,7 @@ hal_timer_deinit(int timer_num)
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rc = 0;
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rc = 0;
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NRF52_HAL_TIMER_RESOLVE(timer_num, bsptimer);
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NRF52_HAL_TIMER_RESOLVE(timer_num, bsptimer);
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__HAL_DISABLE_INTERRUPTS(ctx);
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OS_ENTER_CRITICAL(sr);
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if (bsptimer->tmr_rtc) {
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if (bsptimer->tmr_rtc) {
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rtctimer = (NRF_RTC_Type *)bsptimer->tmr_reg;
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rtctimer = (NRF_RTC_Type *)bsptimer->tmr_reg;
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rtctimer->INTENCLR = NRF_TIMER_INT_MASK(NRF_RTC_TIMER_CC_INT);
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rtctimer->INTENCLR = NRF_TIMER_INT_MASK(NRF_RTC_TIMER_CC_INT);
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@@ -614,7 +601,7 @@ hal_timer_deinit(int timer_num)
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}
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}
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bsptimer->tmr_enabled = 0;
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bsptimer->tmr_enabled = 0;
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bsptimer->tmr_reg = NULL;
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bsptimer->tmr_reg = NULL;
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__HAL_ENABLE_INTERRUPTS(ctx);
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OS_EXIT_CRITICAL(sr);
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err:
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err:
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return rc;
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return rc;
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@@ -751,7 +738,7 @@ hal_timer_start(struct hal_timer *timer, uint32_t ticks)
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int
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int
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hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
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hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
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{
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{
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uint32_t ctx;
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os_sr_t sr;
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struct hal_timer *entry;
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struct hal_timer *entry;
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struct nrf52_hal_timer *bsptimer;
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struct nrf52_hal_timer *bsptimer;
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@@ -762,7 +749,7 @@ hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
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bsptimer = (struct nrf52_hal_timer *)timer->bsp_timer;
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bsptimer = (struct nrf52_hal_timer *)timer->bsp_timer;
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timer->expiry = tick;
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timer->expiry = tick;
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__HAL_DISABLE_INTERRUPTS(ctx);
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OS_ENTER_CRITICAL(sr);
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if (TAILQ_EMPTY(&bsptimer->hal_timer_q)) {
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if (TAILQ_EMPTY(&bsptimer->hal_timer_q)) {
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TAILQ_INSERT_HEAD(&bsptimer->hal_timer_q, timer, link);
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TAILQ_INSERT_HEAD(&bsptimer->hal_timer_q, timer, link);
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@@ -783,7 +770,7 @@ hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
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nrf_timer_set_ocmp(bsptimer, timer->expiry);
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nrf_timer_set_ocmp(bsptimer, timer->expiry);
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}
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}
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__HAL_ENABLE_INTERRUPTS(ctx);
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OS_EXIT_CRITICAL(sr);
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return 0;
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return 0;
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}
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}
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@@ -800,7 +787,7 @@ hal_timer_start_at(struct hal_timer *timer, uint32_t tick)
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int
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int
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hal_timer_stop(struct hal_timer *timer)
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hal_timer_stop(struct hal_timer *timer)
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{
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{
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uint32_t ctx;
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os_sr_t sr;
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int reset_ocmp;
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int reset_ocmp;
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struct hal_timer *entry;
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struct hal_timer *entry;
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struct nrf52_hal_timer *bsptimer;
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struct nrf52_hal_timer *bsptimer;
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@@ -811,7 +798,7 @@ hal_timer_stop(struct hal_timer *timer)
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bsptimer = (struct nrf52_hal_timer *)timer->bsp_timer;
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bsptimer = (struct nrf52_hal_timer *)timer->bsp_timer;
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__HAL_DISABLE_INTERRUPTS(ctx);
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OS_ENTER_CRITICAL(sr);
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if (timer->link.tqe_prev != NULL) {
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if (timer->link.tqe_prev != NULL) {
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reset_ocmp = 0;
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reset_ocmp = 0;
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@@ -836,7 +823,7 @@ hal_timer_stop(struct hal_timer *timer)
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}
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}
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}
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}
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__HAL_ENABLE_INTERRUPTS(ctx);
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OS_EXIT_CRITICAL(sr);
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return 0;
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return 0;
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}
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}
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