diff --git a/configure.ac b/configure.ac index 54d8eaffc..b9e940230 100644 --- a/configure.ac +++ b/configure.ac @@ -1381,12 +1381,12 @@ AM_CONDITIONAL([OPENTHREAD_ENABLE_LINKER_MAP], [test "${enable_linker_map}" = "y AC_ARG_WITH(examples, [AS_HELP_STRING([--with-examples=TARGET], - [Specify the examples from one of: none, posix, cc2538, cc2650, cc2652, da15000, efr32, emsk, gp712, kw41z, nrf52840, samr21 @<:@default=none@:>@.])], + [Specify the examples from one of: none, posix, cc1352, cc2538, cc2650, cc2652, da15000, efr32, emsk, gp712, kw41z, nrf52840, samr21 @<:@default=none@:>@.])], [ case "${with_examples}" in none) ;; - posix|cc2538|cc2650|cc2652|da15000|efr32|emsk|gp712|kw41z|nrf52840|samr21) + posix|cc1352|cc2538|cc2650|cc2652|da15000|efr32|emsk|gp712|kw41z|nrf52840|samr21) if test ${enable_posix_app} = "yes"; then AC_MSG_ERROR([--with-examples must be none when POSIX apps are enabled by --enable-posix-app]) fi @@ -1407,6 +1407,11 @@ case ${with_examples} in AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_POSIX],[${OPENTHREAD_EXAMPLES_POSIX}],[Define to 1 if you want to use posix examples]) ;; + cc1352) + OPENTHREAD_EXAMPLES_CC1352=1 + AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC1352],[${OPENTHREAD_EXAMPLES_CC1352}],[Define to 1 if you want to use cc1352 examples]) + ;; + cc2538) OPENTHREAD_EXAMPLES_CC2538=1 AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC2538],[${OPENTHREAD_EXAMPLES_CC2538}],[Define to 1 if you want to use cc2538 examples]) @@ -1469,6 +1474,9 @@ AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES],[${OPENTHREAD_EXAMPLES}],[OpenThread ex AC_SUBST(OPENTHREAD_EXAMPLES_POSIX) AM_CONDITIONAL([OPENTHREAD_EXAMPLES_POSIX], [test "${OPENTHREAD_EXAMPLES}" = "posix"]) +AC_SUBST(OPENTHREAD_EXAMPLES_CC1352) +AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC1352], [test "${OPENTHREAD_EXAMPLES}" = "cc1352"]) + AC_SUBST(OPENTHREAD_EXAMPLES_CC2538) AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${OPENTHREAD_EXAMPLES}" = "cc2538"]) @@ -1641,6 +1649,7 @@ examples/apps/Makefile examples/apps/cli/Makefile examples/apps/ncp/Makefile examples/platforms/Makefile +examples/platforms/cc1352/Makefile examples/platforms/cc2538/Makefile examples/platforms/cc2650/Makefile examples/platforms/cc2652/Makefile diff --git a/examples/Makefile-cc1352 b/examples/Makefile-cc1352 new file mode 100644 index 000000000..6ab371fc0 --- /dev/null +++ b/examples/Makefile-cc1352 @@ -0,0 +1,293 @@ +# +# Copyright (c) 2018, The OpenThread Authors. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. Neither the name of the copyright holder nor the +# names of its contributors may be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +.NOTPARALLEL: + +AR = arm-none-eabi-ar +CCAS = arm-none-eabi-as +CPP = arm-none-eabi-cpp +CC = arm-none-eabi-gcc +CXX = arm-none-eabi-g++ +LD = arm-none-eabi-ld +STRIP = arm-none-eabi-strip +NM = arm-none-eabi-nm +RANLIB = arm-none-eabi-ranlib +OBJCOPY = arm-none-eabi-objcopy + +BuildJobs ?= 10 + +configure_OPTIONS = \ + --enable-cli-app=all \ + --enable-ncp-app=all \ + --with-ncp-bus=uart \ + --enable-diag \ + --with-examples=cc1352 \ + MBEDTLS_CPPFLAGS="$(CC1352_MBEDTLS_CPPFLAGS)" \ + $(NULL) + +DEFAULT_LOGGING ?= 1 + +CC1352_MBEDTLS_CPPFLAGS = \ + -DMBEDTLS_CONFIG_FILE='\"cc1352-mbedtls-config.h\"' \ + -I$(PWD)/examples/platforms/cc1352/crypto \ + -I$(PWD)/third_party/ti/devices/cc13x2_cc26x2 \ + -I$(PWD)/third_party/mbedtls \ + -I$(PWD)/third_party/mbedtls/repo/include \ + $(NULL) + +CC1352_CONFIG_FILE_CPPFLAGS = \ + -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-cc1352-config.h\"' \ + -I$(PWD)/examples/platforms/cc1352/ \ + $(NULL) + +COMMONCFLAGS := \ + -fdata-sections \ + -ffunction-sections \ + -Os \ + -g \ + $(CC1352_CONFIG_FILE_CPPFLAGS) \ + $(NULL) + +include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk + +CPPFLAGS += \ + $(COMMONCFLAGS) \ + $(target_CPPFLAGS) \ + $(NULL) + +CFLAGS += \ + $(COMMONCFLAGS) \ + $(target_CFLAGS) \ + $(NULL) + +CXXFLAGS += \ + $(COMMONCFLAGS) \ + $(target_CXXFLAGS) \ + -fno-exceptions \ + -fno-rtti \ + $(NULL) + +LDFLAGS += \ + $(COMMONCFLAGS) \ + $(target_LDFLAGS) \ + -nostartfiles \ + -specs=nano.specs \ + -specs=nosys.specs \ + -Wl,--gc-sections \ + -Wl,-Map=map.map \ + $(NULL) + +ECHO := @echo +MAKE := make +MKDIR_P := mkdir -p +LN_S := ln -s +RM_F := rm -f + +INSTALL := /usr/bin/install +INSTALLFLAGS := -p + +TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST)))).. +AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST)))).. + +BuildPath = build +TopBuildDir = $(BuildPath) +AbsTopBuildDir = $(PWD)/$(TopBuildDir) + +ResultPath = output +TopResultDir = $(ResultPath) +AbsTopResultDir = $(PWD)/$(TopResultDir) + +TargetTuple = cc1352 + +ARCHS = cortex-m4f + +TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib + +ifndef BuildJobs +BuildJobs := $(shell getconf _NPROCESSORS_ONLN) +endif +JOBSFLAG := -j$(BuildJobs) + +# +# configure-arch +# +# Configure OpenThread for the specified architecture. +# +# arch - The architecture to configure. +# +define configure-arch +$(ECHO) " CONFIG $(TargetTuple)..." +(cd $(BuildPath)/$(TargetTuple) \ + && $(AbsTopSourceDir)/configure \ + INSTALL="$(INSTALL) $(INSTALLFLAGS)" \ + CPP="$(CPP)" \ + CC="$(CC)" \ + CXX="$(CXX)" \ + OBJC="$(OBJC)" \ + OBJCXX="$(OBJCXX)" \ + AR="$(AR)" \ + RANLIB="$(RANLIB)" \ + NM="$(NM)" \ + STRIP="$(STRIP)" \ + CPPFLAGS="$(CPPFLAGS)" \ + CFLAGS="$(CFLAGS)" \ + CXXFLAGS="$(CXXFLAGS)" \ + LDFLAGS="$(LDFLAGS)" \ + --host=arm-none-eabi \ + --prefix=/ \ + --exec-prefix=/$(TargetTuple) \ + $(configure_OPTIONS)) +endef # configure-arch + +# +# build-arch +# +# Build the OpenThread intermediate build products for the specified +# architecture. +# +# arch - The architecture to build. +# +define build-arch +$(ECHO) " BUILD $(TargetTuple)" +$(MAKE) \ + $(JOBSFLAG) \ + -C $(BuildPath)/$(TargetTuple) \ + --no-print-directory \ + all +endef # build-arch + +# +# stage-arch +# +# Stage (install) the OpenThread final build products for the specified +# architecture. +# +# arch - The architecture to stage. +# +define stage-arch +$(ECHO) " STAGE $(TargetTuple)" +$(MAKE) \ + $(JOBSFLAG) \ + -C $(BuildPath)/$(TargetTuple) \ + --no-print-directory \ + DESTDIR=$(AbsTopResultDir) \ + install +endef # stage-arch + +# +# ARCH_template +# +# Define macros, targets and rules to configure, build, and stage the +# OpenThread for a single architecture. +# +# arch - The architecture to instantiate the template for. +# +define ARCH_template +CONFIGURE_TARGETS += configure-$(1) +BUILD_TARGETS += do-build-$(1) +STAGE_TARGETS += stage-$(1) +BUILD_DIRS += $(BuildPath)/$(TargetTuple) +DIRECTORIES += $(BuildPath)/$(TargetTuple) + +configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS) +configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS) +configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS) +configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS) + +configure-$(1): $(BuildPath)/$(TargetTuple)/config.status + +$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple) + $$(call configure-arch,$(1)) + +do-build-$(1): configure-$(1) + +do-build-$(1): + +$$(call build-arch,$(1)) + +stage-$(1): do-build-$(1) + +stage-$(1): | $(TopResultDir) + $$(call stage-arch,$(1)) + +$(1): stage-$(1) +endef # ARCH_template + +.DEFAULT_GOAL := all + +all: stage + +# +# cortex-m4f +# + +cortex-m4f_target_ABI = cortex-m4f +cortex-m4f_target_CPPFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb +cortex-m4f_target_CFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb +cortex-m4f_target_CXXFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb +cortex-m4f_target_LDFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb + +# Instantiate an architecture-specific build template for each target +# architecture. + +$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch)))) + +# +# Common / Finalization +# + +configure: $(CONFIGURE_TARGETS) + +build: $(BUILD_TARGETS) + +stage: $(STAGE_TARGETS) + +DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS) + +CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS) + +all: stage + +$(DIRECTORIES): + $(ECHO) " MKDIR $@" + @$(MKDIR_P) "$@" + +clean: + $(ECHO) " CLEAN" + @$(RM_F) -r $(CLEAN_DIRS) + +help: + $(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following " + $(ECHO) "architectures: " + $(ECHO) "" + $(ECHO) " $(ARCHS)" + $(ECHO) "" + $(ECHO) "To build only a particular architecture, specify: " + $(ECHO) "" + $(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) " + $(ECHO) "" + diff --git a/examples/Makefile-cc2652 b/examples/Makefile-cc2652 index e399e9b43..970f2929d 100644 --- a/examples/Makefile-cc2652 +++ b/examples/Makefile-cc2652 @@ -55,7 +55,7 @@ DEFAULT_LOGGING ?= 1 CC2652_MBEDTLS_CPPFLAGS = \ -DMBEDTLS_CONFIG_FILE='\"cc2652-mbedtls-config.h\"' \ -I$(PWD)/examples/platforms/cc2652/crypto \ - -I$(PWD)/third_party/ti/devices/cc26x2 \ + -I$(PWD)/third_party/ti/devices/cc13x2_cc26x2 \ -I$(PWD)/third_party/mbedtls \ -I$(PWD)/third_party/mbedtls/repo/include \ $(NULL) diff --git a/examples/platforms/Makefile.am b/examples/platforms/Makefile.am index fb2641d3c..69b281e15 100644 --- a/examples/platforms/Makefile.am +++ b/examples/platforms/Makefile.am @@ -31,6 +31,7 @@ include $(abs_top_nlbuild_autotools_dir)/automake/pre.am # Always package (e.g. for 'make dist') these subdirectories. DIST_SUBDIRS = \ + cc1352 \ cc2538 \ cc2650 \ cc2652 \ @@ -51,6 +52,10 @@ SUBDIRS = \ utils \ $(NULL) +if OPENTHREAD_EXAMPLES_CC1352 +SUBDIRS += cc1352 +endif + if OPENTHREAD_EXAMPLES_CC2538 SUBDIRS += cc2538 endif @@ -102,6 +107,7 @@ noinst_HEADERS = \ # Always pretty (e.g. for 'make pretty') these subdirectories. PRETTY_SUBDIRS = \ + cc1352 \ cc2538 \ cc2650 \ cc2652 \ diff --git a/examples/platforms/Makefile.platform.am b/examples/platforms/Makefile.platform.am index 8a389750b..8a005e1df 100644 --- a/examples/platforms/Makefile.platform.am +++ b/examples/platforms/Makefile.platform.am @@ -41,6 +41,10 @@ LDFLAGS_COMMON = $(NULL) SOURCES_COMMON = $(NULL) LIBTOOLFLAGS_COMMON = --preserve-dup-deps +if OPENTHREAD_EXAMPLES_CC1352 +include $(top_srcdir)/examples/platforms/cc1352/Makefile.platform.am +endif + if OPENTHREAD_EXAMPLES_CC2538 include $(top_srcdir)/examples/platforms/cc2538/Makefile.platform.am endif diff --git a/examples/platforms/cc1352/Makefile.am b/examples/platforms/cc1352/Makefile.am new file mode 100644 index 000000000..7214dd1cc --- /dev/null +++ b/examples/platforms/cc1352/Makefile.am @@ -0,0 +1,86 @@ +# +# Copyright (c) 2018, The OpenThread Authors. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. Neither the name of the copyright holder nor the +# names of its contributors may be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +include $(abs_top_nlbuild_autotools_dir)/automake/pre.am + +lib_LIBRARIES = libopenthread-cc1352.a + +# Do not enable -pedantic-errors for cc13xx driverlib +override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS)) +override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS)) + +libopenthread_cc1352_a_CPPFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/core \ + -I$(top_srcdir)/examples/platforms \ + -I$(top_srcdir)/examples/platforms/cc1352 \ + -I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \ + -I$(top_srcdir)/third_party/mbedtls/repo/include \ + $(MBEDTLS_CPPFLAGS) \ + $(NULL) + +PLATFORM_SOURCES = \ + alarm.c \ + diag.c \ + flash.c \ + logging.c \ + misc.c \ + platform.c \ + radio.c \ + random.c \ + uart.c \ + crypto/aes_alt.c \ + cc1352_ccfg.c \ + cc1352_startup.c \ + cxx_helpers.c \ + $(NULL) + +libopenthread_cc1352_a_SOURCES = \ + $(PLATFORM_SOURCES) \ + $(NULL) + +libopenthread_cc1352_a_DEPENDENCIES = \ + $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \ + $(NULL) + +noinst_HEADERS = \ + platform-cc1352.h \ + $(NULL) + +PRETTY_FILES = \ + $(PLATFORM_SOURCES) \ + $(noinst_HEADERS) \ + $(NULL) + +Dash = - +libopenthread_cc1352_a_LIBADD = \ + $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") + +include $(abs_top_nlbuild_autotools_dir)/automake/post.am + diff --git a/examples/platforms/cc1352/Makefile.platform.am b/examples/platforms/cc1352/Makefile.platform.am new file mode 100644 index 000000000..9f29e0cb2 --- /dev/null +++ b/examples/platforms/cc1352/Makefile.platform.am @@ -0,0 +1,44 @@ +# +# Copyright (c) 2018, The OpenThread Authors. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. Neither the name of the copyright holder nor the +# names of its contributors may be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +# +# cc1352 platform-specific Makefile +# + +CPPFLAGS_COMMON += \ + -I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \ + $(NULL) + +LDADD_COMMON += \ + $(top_builddir)/examples/platforms/cc1352/libopenthread-cc1352.a \ + $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \ + $(NULL) + +LDFLAGS_COMMON += \ + -T $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds \ + $(NULL) diff --git a/examples/platforms/cc1352/README.md b/examples/platforms/cc1352/README.md new file mode 100644 index 000000000..152aabba9 --- /dev/null +++ b/examples/platforms/cc1352/README.md @@ -0,0 +1,120 @@ +# OpenThread on CC1352 Example + +This directory contains example platform drivers for the [Texas Instruments +CC1352R1][cc1352r1]. + +The example platform drivers are intended to present the minimal code necessary +to support OpenThread. As a result, the example platform drivers do not +necessarily highlight the platform's full capabilities. Consult the [SimpleLink +CC26X2R1 SDK][cc26x2r1-sdk] for more development option. The platform drivers +were built for the [CC1352R1 LAUNCHXL][cc1352r1-launchxl], usage on other +boards with a cc1352r1 may require changes to the peripheral drivers. + +[cc1352r1-launchxl]: http://www.ti.com/tool/launchxl-cc26x2r1 +[cc26x2r1-sdk]: http://www.ti.com/tool/simplelink-cc26x2-sdk + +[cc1352r1]: http://www.ti.com/tool/launchxl-cc26x2r1 + +## Toolchain + +Building the examples for the cc1352 requires [GNU AutoConf][gnu-autoconf], +[GNU AutoMake][gnu-automake], [Python][python], and the [ARM gcc +toolchain][arm-toolchain]. + +With the exception of the arm toolchain, most of these tools are installed by +default on modern Posix systems. It is recommended to setup a Linux virtual +machine for building on a Windows host system. For help setting up VirtualBox +with Ubuntu, consult this [community help wiki +article][ubuntu-wiki-virtualbox]. + +[gnu-autoconf]: https://www.gnu.org/software/autoconf +[gnu-automake]: https://www.gnu.org/software/automake +[python]: https://www.python.org +[arm-toolchain]: https://launchpad.net/gcc-arm-embedded +[cygwin]: https://www.cygwin.com +[mingw]: http://www.mingw.org +[ubuntu-wiki-virtualbox]: https://help.ubuntu.com/community/VirtualBox + +In a Bash terminal, follow these instructions to install the GNU toolchain and +other dependencies. + +```bash +$ cd +$ ./script/bootstrap +``` + +## Building + +In a Bash terminal, follow these instructions to build the cc1352 examples. + +```bash +$ cd +$ ./bootstrap +$ make -f examples/Makefile-cc1352 +``` + +## Flash Binaries + +If the build completed successfully, the `elf` files may be found in +`/output/cc1352/bin`. + +Flash the images with [Uniflash][uniflash]. Make sure to deselect the binary +check-box, Uniflash assumes a file without an extension is a binary file. + +[uniflash]: http://www.ti.com/tool/uniflash + +## Interact + +### CLI example + +1. With a terminal client (PuTTY, minicom, etc.) open the com port associated + with the cc1352 UART. The serial port settings are: + * 115200 baud + * 8 data bits + * no parity bit + * 1 stop bit +2. Type `help` for a list of commands. +3. Follow the instructions in the [CLI README][cli-readme] for instructions on + setting up a network. + +[cli-readme]: ../../../src/cli/README.md + +```bash +> help +help +channel +childtimeout +contextreusedelay +extaddr +extpanid +ipaddr +keysequence +leaderweight +masterkey +mode +netdataregister +networkidtimeout +networkname +panid +ping +prefix +releaserouterid +rloc16 +route +routerupgradethreshold +scan +start +state +stop +whitelist +``` + +### NCP example + +Refer to the documentation in the [wpantund][wpantund] project for build +instructions and usage information. + +[wpantund]: https://github.com/openthread/wpantund diff --git a/examples/platforms/cc1352/alarm.c b/examples/platforms/cc1352/alarm.c new file mode 100644 index 000000000..bf4826f80 --- /dev/null +++ b/examples/platforms/cc1352/alarm.c @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * This file implements the OpenThread platform abstraction for the alarm. + * + */ + +#include + +#include +#include +#include + +#include + +#include +#include + +#include "platform-cc1352.h" + +/* NOTE: we could use systick, but that would sacrifice atleast a few ops + * every ms, and not run when the processor is sleeping. + */ + +static uint32_t sTime0 = 0; +static uint32_t sAlarmTime = 0; +static bool sIsRunning = false; + +/** + * Function documented in platform-cc1352.h + */ +void cc1352AlarmInit(void) +{ + /* + * NOTE: this will not enable the individual rtc alarm channels + */ + AONRTCEnable(); + sIsRunning = true; +} + +/** + * Function documented in platform/alarm-milli.h + */ +uint32_t otPlatAlarmMilliGetNow(void) +{ + /* + * This is current value of RTC as it appears in the register. + * With seconds as the upper 32 bits and fractions of a second as the + * lower 32 bits <32.32>. + */ + uint64_t rtcVal = AONRTCCurrent64BitValueGet(); + return ((rtcVal * 1000) >> 32); +} + +/** + * Function documented in platform/alarm-milli.h + */ +void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt) +{ + (void)aInstance; + sTime0 = aT0; + sAlarmTime = aDt; + sIsRunning = true; +} + +/** + * Function documented in platform/alarm-milli.h + */ +void otPlatAlarmMilliStop(otInstance *aInstance) +{ + (void)aInstance; + sIsRunning = false; +} + +/** + * Function documented in platform-cc1352.h + */ +void cc1352AlarmProcess(otInstance *aInstance) +{ + uint32_t offsetTime; + + if (sIsRunning) + { + /* unsinged subtraction will result in the absolute offset */ + offsetTime = otPlatAlarmMilliGetNow() - sTime0; + + if (sAlarmTime <= offsetTime) + { + sIsRunning = false; +#if OPENTHREAD_ENABLE_DIAG + + if (otPlatDiagModeGet()) + { + otPlatDiagAlarmFired(aInstance); + } + else +#endif /* OPENTHREAD_ENABLE_DIAG */ + { + otPlatAlarmMilliFired(aInstance); + } + } + } +} diff --git a/examples/platforms/cc1352/cc1352_ccfg.c b/examples/platforms/cc1352/cc1352_ccfg.c new file mode 100644 index 000000000..234f19bc0 --- /dev/null +++ b/examples/platforms/cc1352/cc1352_ccfg.c @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Configure the Customer Configuration Area. + */ + +// clang-format off + +// enable bootloader backdoor +#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader + +#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor + +#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0F // DIO15 (BTN-1 button) on CC1352 LaunchPad Board for boot loader backdoor + +#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor + +/* + * Include the default ccfg struct and configuration code. + */ +#include + +// clang-format on diff --git a/examples/platforms/cc1352/cc1352_radio.h b/examples/platforms/cc1352/cc1352_radio.h new file mode 100644 index 000000000..1ffd8eee4 --- /dev/null +++ b/examples/platforms/cc1352/cc1352_radio.h @@ -0,0 +1,201 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef CC1352_RADIO_H_ +#define CC1352_RADIO_H_ + +#include + +enum +{ + IEEE802154_FRAME_TYPE_MASK = 0x7, ///< (IEEE 802.15.4-2006) PSDU.FCF.frameType + IEEE802154_FRAME_TYPE_ACK = 0x2, ///< (IEEE 802.15.4-2006) frame type: ACK + IEEE802154_ACK_REQUEST = (1<<5), ///< (IEEE 802.15.4-2006) PSDU.FCF.bAR + IEEE802154_DSN_OFFSET = 2, ///< (IEEE 802.15.4-2006) PSDU.sequenceNumber + IEEE802154_MAC_MIN_BE = 1, ///< (IEEE 802.15.4-2006) macMinBE + IEEE802154_MAC_MAX_BE = 5, ///< (IEEE 802.15.4-2006) macMaxBE + IEEE802154_MAC_MAX_CSMA_BACKOFFS = 4, ///< (IEEE 802.15.4-2006) macMaxCSMABackoffs + IEEE802154_MAC_MAX_FRAMES_RETRIES = 3, ///< (IEEE 802.15.4-2006) macMaxFrameRetries + IEEE802154_A_UINT_BACKOFF_PERIOD = 20, ///< (IEEE 802.15.4-2006 7.4.1) MAC constants + IEEE802154_A_TURNAROUND_TIME = 12, ///< (IEEE 802.15.4-2006 6.4.1) PHY constants + IEEE802154_PHY_SHR_DURATION = 10, + ///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY + IEEE802154_PHY_SYMBOLS_PER_OCTET = 2, + ///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY + IEEE802154_MAC_ACK_WAIT_DURATION = (IEEE802154_A_UINT_BACKOFF_PERIOD + + IEEE802154_A_TURNAROUND_TIME + + IEEE802154_PHY_SHR_DURATION + + ( 6 * IEEE802154_PHY_SYMBOLS_PER_OCTET)), + ///< (IEEE 802.15.4-2006 7.4.2) macAckWaitDuration PIB attribute + IEEE802154_SYMBOLS_PER_SEC = 62500 ///< (IEEE 802.15.4-2006 6.5.3.2) O-QPSK symbol rate +}; + +enum +{ + CC1352_RAT_TICKS_PER_SEC = 4000000, ///< 4MHz clock + CC1352_INVALID_RSSI = 127, + CC1352_UNKNOWN_EUI64 = 0xFF, + ///< If the EUI64 read from the ccfg is all ones then the customer did not set the address +}; + +/** + * TX Power dBm lookup table - values from SmartRF Studio + */ +typedef struct output_config +{ + int dbm; + uint16_t value; +} output_config_t; + +/** + * * TX Power dBm lookup table from SmartRF Studio 7 2.10.0#94 + */ +static const output_config_t rgOutputPower[] = +{ + { 5, 0x941E}, + { 4, 0x6c16}, + { 3, 0x5411}, + { 2, 0x440d}, + { 1, 0x385c}, + { 0, 0x3459}, + { -3, 0x2851}, + { -5, 0x224e}, + { -6, 0x204d}, + { -9, 0x0a8d}, + { -10, 0x168c}, + { -12, 0x108a}, + { -15, 0xc88c}, + { -18, 0x06c9}, + { -21, 0x06c7}, +}; + +#define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0])) + +/* Max and Min Output Power in dBm */ +#define OUTPUT_POWER_MIN (rgOutputPower[OUTPUT_CONFIG_COUNT - 1].dbm) +#define OUTPUT_POWER_MAX (rgOutputPower[0].dbm) +#define OUTPUT_POWER_UNKNOWN 0xFFFF + +/** + * return value used when searching the source match array + */ +#define CC1352_SRC_MATCH_NONE 0xFF + +/** + * number of extended addresses used for source matching + */ +#define CC1352_EXTADD_SRC_MATCH_NUM 10 + +/** + * structure for source matching extended addresses + */ +typedef struct __attribute__((aligned(4))) ext_src_match_data +{ + uint32_t srcMatchEn[((CC1352_EXTADD_SRC_MATCH_NUM + 31) / 32)]; + uint32_t srcPendEn[((CC1352_EXTADD_SRC_MATCH_NUM + 31) / 32)]; + uint64_t extAddrEnt[CC1352_EXTADD_SRC_MATCH_NUM]; +} ext_src_match_data_t; + +/** + * number of short addresses used for source matching + */ +#define CC1352_SHORTADD_SRC_MATCH_NUM 10 + +/** + * structure for source matching short addresses + */ +typedef struct __attribute__((aligned(4))) short_src_match_data +{ + uint32_t srcMatchEn[((CC1352_SHORTADD_SRC_MATCH_NUM + 31) / 32)]; + uint32_t srcPendEn[((CC1352_SHORTADD_SRC_MATCH_NUM + 31) / 32)]; + rfc_shortAddrEntry_t extAddrEnt[CC1352_SHORTADD_SRC_MATCH_NUM]; +} short_src_match_data_t; + +/** + * size of length field in receive struct + * + * defined in Table 23-10 of the cc26xx TRM + */ +#define DATA_ENTRY_LENSZ_BYTE 1 + +/** + * address type for @ref rfCoreModifySourceMatchEntry() + */ +typedef enum cc1352_address +{ + SHORT_ADDRESS = 1, + EXT_ADDRESS = 0, +} cc1352_address_t; + +/** + * This enum represents the state of a radio. + * Initially, a radio is in the Disabled state. + * + * The following are valid radio state transitions for the cc1352: + * + * (Radio ON) + * +----------+ Enable() +-------+ Receive() +---------+ Transmit() +----------+ + * | |----------->| |------------->| |--------------->| | + * | Disabled | | Sleep | | Receive | | Transmit | + * | |<-----------| |<-------------| |<---------------| | + * +----------+ Disable() | | Sleep() | | AckFrame RX or +----------+ + * | | (Radio OFF) +---------+ sTxCmdChainDone == true + * | | + * | | EnergyScan() +--------+ + * | |------------->| | + * | | | EdScan | + * | |<-------------| | + * | | signal ED | | + * +-------+ scan done +--------+ + * + * These states slightly differ from the states in \ref include/platform/radio.h. + * The additional states the phy can be in are due to the asynchronous nature + * of the CM0 radio core. + * + * | state | description | + * |------------------|----------------------------------------------------| + * | Disabled | The rfcore powerdomain is off and the RFCPE is off | + * | Sleep | The RFCORE PD is on, and the RFCPE is in IEEE mode | + * | Receive | The RFCPE is running a CMD_IEEE_RX | + * | Transmit | The RFCPE is running a transmit command string | + * | TransmitComplete | The transmit command string has completed | + * | EdScan | The RFCPE is running a CMD_IEEE_ED_SCAN | + * + * \note The RAT start and Radio Setup commands may be moved to the Receive() + * and EnergyScan() transitions in the future. + */ +typedef enum cc1352_PhyState +{ + cc1352_stateDisabled = 0, + cc1352_stateSleep, + cc1352_stateReceive, + cc1352_stateEdScan, + cc1352_stateTransmit, +} cc1352_PhyState_t; + +#endif /* CC1352_RADIO_H_ */ diff --git a/examples/platforms/cc1352/cc1352_startup.c b/examples/platforms/cc1352/cc1352_startup.c new file mode 100644 index 000000000..b6134d4c6 --- /dev/null +++ b/examples/platforms/cc1352/cc1352_startup.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Include the standard startup files for the specified toolchain + * startup code is in 'third_party/ti' + */ +#if defined(__GNUC__) +#include +#elif defined(__TI_ARM__) +#include +#else +#error "Unknown compiler" +#endif diff --git a/examples/platforms/cc1352/crypto/aes_alt.c b/examples/platforms/cc1352/crypto/aes_alt.c new file mode 100644 index 000000000..5bfa44de0 --- /dev/null +++ b/examples/platforms/cc1352/crypto/aes_alt.c @@ -0,0 +1,202 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "aes_alt.h" +#include "mbedtls/aes.h" + +#ifdef MBEDTLS_AES_ALT + +#include +#include +#include +#include + +#define CC1352_AES_KEY_UNUSED (-1) +#define CC1352_AES_CTX_MAGIC (0x7E) + +/** + * bitmap of which key stores are currently used + */ +static uint8_t sUsedKeys = 0; + +/** + * number of active contexts, used for power on/off of the crypto core + */ +static unsigned int sRefNum = 0; + +/* + * Documented in aes_alt.h + */ +void mbedtls_aes_init(mbedtls_aes_context *ctx) +{ + if (sRefNum++ == 0) + { + /* enable the crypto core */ + /* The TRNG should already be running before we ever ask the AES core + * to do anything, if there is any scenario that the TRNG powers off + * the peripheral power domain use this code to repower it + + PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH); + while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON); + */ + PRCMPeripheralRunEnable(PRCM_PERIPH_CRYPTO); + PRCMPeripheralSleepEnable(PRCM_PERIPH_CRYPTO); + PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_CRYPTO); + PRCMLoadSet(); + + while (!PRCMLoadGet()) + ; + } + + ctx->magic = CC1352_AES_CTX_MAGIC; + ctx->key_idx = CC1352_AES_KEY_UNUSED; +} + +/* + * Documented in aes_alt.h + */ +void mbedtls_aes_free(mbedtls_aes_context *ctx) +{ + otEXPECT(ctx->magic == CC1352_AES_CTX_MAGIC); + + if (ctx->key_idx != CC1352_AES_KEY_UNUSED) + { + sUsedKeys &= ~(1 << ctx->key_idx); + } + + if (--sRefNum == 0) + { + /* disable the crypto core */ + /* The TRNG core needs the peripheral power domain powered on to + * function. if there is a situation where the power domain must be + * powered off, use this code to do so. + + PRCMPowerDomainOff(PRCM_DOMAIN_PERIPH); + while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_OFF); + */ + PRCMPeripheralRunDisable(PRCM_PERIPH_CRYPTO); + PRCMPeripheralSleepDisable(PRCM_PERIPH_CRYPTO); + PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO); + PRCMLoadSet(); + + while (!PRCMLoadGet()) + ; + } + + memset((void *)ctx, 0x00, sizeof(ctx)); + +exit: + return; +} + +/* + * Documented in aes_alt.h + */ +int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits) +{ + unsigned char key_idx; + int retval = 0; + + otEXPECT_ACTION(ctx->magic == CC1352_AES_CTX_MAGIC, retval = -1); + + if (ctx->key_idx != CC1352_AES_KEY_UNUSED) + { + sUsedKeys &= ~(1 << ctx->key_idx); + } + + /* our hardware only supports 128 bit keys */ + otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH); + + for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++) + ; + + /* we have no more room for this key */ + otEXPECT_ACTION(key_idx < 8, retval = -2); + + otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS, + retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH); + + sUsedKeys |= (1 << key_idx); + ctx->key_idx = key_idx; +exit: + return retval; +} + +/* + * Documented in aes_alt.h + */ +int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits) +{ + unsigned char key_idx; + int retval = 0; + + otEXPECT_ACTION(ctx->magic == CC1352_AES_CTX_MAGIC, retval = -1); + + if (ctx->key_idx != CC1352_AES_KEY_UNUSED) + { + sUsedKeys &= ~(1 << ctx->key_idx); + } + + /* our hardware only supports 128 bit keys */ + otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH); + + for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++) + ; + + /* we have no more room for this key */ + otEXPECT_ACTION(key_idx < 8, retval = -2); + + otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS, + retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH); + + sUsedKeys |= (1 << key_idx); + ctx->key_idx = key_idx; +exit: + return retval; +} + +/* + * Documented in aes_alt.h + */ +int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]) +{ + int retval = -1; + + retval = CRYPTOAesEcb((uint32_t *)input, (uint32_t *)output, ctx->key_idx, mode == MBEDTLS_AES_ENCRYPT, false); + otEXPECT(retval == AES_SUCCESS); + + while ((retval = CRYPTOAesEcbStatus()) == AES_DMA_BSY) + ; + + CRYPTOAesEcbFinish(); + +exit: + return retval; +} + +#endif /* MBEDTLS_AES_ALT */ diff --git a/examples/platforms/cc1352/crypto/aes_alt.h b/examples/platforms/cc1352/crypto/aes_alt.h new file mode 100644 index 000000000..4a14859a1 --- /dev/null +++ b/examples/platforms/cc1352/crypto/aes_alt.h @@ -0,0 +1,111 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef MBEDTLS_AES_ALT_H +#define MBEDTLS_AES_ALT_H + +#ifndef MBEDTLS_CONFIG_FILE +#include "cc1352-mbedtls-config.h" +#else +#include MBEDTLS_CONFIG_FILE +#endif + +#ifdef MBEDTLS_AES_ALT + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct +{ + uint8_t magic; + signed char key_idx; +} mbedtls_aes_context; + +/** + * @brief Initialize AES context + * + * @param [in,out] ctx AES context to be initialized + */ +void mbedtls_aes_init(mbedtls_aes_context *ctx); + +/** + * @brief Clear AES context + * + * @param [in,out] ctx AES context to be cleared + */ +void mbedtls_aes_free(mbedtls_aes_context *ctx); + +/** + * @brief AES key schedule (encryption) + * + * @param [in,out] ctx AES context to be used + * @param [in] key Encryption key + * @param [in] keybits Must be 128 + * + * @retval 0 If successful + * @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128 + */ +int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits); + +/** + * @brief AES key schedule (decryption) + * + * @param [in,out] ctx AES context to be used + * @param [in] key Decryption key + * @param [in] keybits Must be 128 + * + * @retval 0 If successful + * @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128 + */ +int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, + unsigned int keybits); + +/** + * \brief AES-ECB block encryption/decryption + * + * \param ctx AES context + * \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT + * \param input 16-byte input block + * \param output 16-byte output block + * + * @return The return value of @ref CRYPTOAesEcb. + * @retval 0 If successful + * @retval AES_KEYSTORE_READ_ERROR If the indicated keystore ram could not be read + */ +int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], + unsigned char output[16]); + +#ifdef __cplusplus +} +#endif + +#endif /* MBEDTLS_AES_ALT */ + +#endif /* MBEDTLS_AES_ALT_H */ diff --git a/examples/platforms/cc1352/crypto/cc1352-mbedtls-config.h b/examples/platforms/cc1352/crypto/cc1352-mbedtls-config.h new file mode 100644 index 000000000..5ebb3535e --- /dev/null +++ b/examples/platforms/cc1352/crypto/cc1352-mbedtls-config.h @@ -0,0 +1,2543 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef MBEDTLS_CONFIG_H +#define MBEDTLS_CONFIG_H + +#include +#include + +#include + +#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE) +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +/** + * \name SECTION: System support + * + * This section sets system specific settings. + * \{ + */ + +/** + * \def MBEDTLS_HAVE_ASM + * + * The compiler has support for asm(). + * + * Requires support for asm() in compiler. + * + * Used in: + * library/timing.c + * library/padlock.c + * include/mbedtls/bn_mul.h + * + * Comment to disable the use of assembly code. + */ +#define MBEDTLS_HAVE_ASM + +/** + * \def MBEDTLS_HAVE_SSE2 + * + * CPU supports SSE2 instruction set. + * + * Uncomment if the CPU supports SSE2 (IA-32 specific). + */ +//#define MBEDTLS_HAVE_SSE2 + +/** + * \def MBEDTLS_HAVE_TIME + * + * System has time.h and time(). + * The time does not need to be correct, only time differences are used, + * by contrast with MBEDTLS_HAVE_TIME_DATE + * + * Comment if your system does not support time functions + */ +//#define MBEDTLS_HAVE_TIME + +/** + * \def MBEDTLS_HAVE_TIME_DATE + * + * System has time.h and time(), gmtime() and the clock is correct. + * The time needs to be correct (not necesarily very accurate, but at least + * the date should be correct). This is used to verify the validity period of + * X.509 certificates. + * + * Comment if your system does not have a correct clock. + */ +//#define MBEDTLS_HAVE_TIME_DATE + +/** + * \def MBEDTLS_PLATFORM_MEMORY + * + * Enable the memory allocation layer. + * + * By default mbed TLS uses the system-provided calloc() and free(). + * This allows different allocators (self-implemented or provided) to be + * provided to the platform abstraction layer. + * + * Enabling MBEDTLS_PLATFORM_MEMORY without the + * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide + * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and + * free() function pointer at runtime. + * + * Enabling MBEDTLS_PLATFORM_MEMORY and specifying + * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the + * alternate function at compile time. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Enable this layer to allow use of alternative memory allocators. + */ +#define MBEDTLS_PLATFORM_MEMORY + +/** + * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + * + * Do not assign standard functions in the platform layer (e.g. calloc() to + * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF) + * + * This makes sure there are no linking errors on platforms that do not support + * these functions. You will HAVE to provide alternatives, either at runtime + * via the platform_set_xxx() functions or at compile time by setting + * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a + * MBEDTLS_PLATFORM_XXX_MACRO. + * + * Requires: MBEDTLS_PLATFORM_C + * + * Uncomment to prevent default assignment of standard functions in the + * platform layer. + */ +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS + +/** + * \def MBEDTLS_PLATFORM_EXIT_ALT + * + * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the + * function in the platform abstraction layer. + * + * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will + * provide a function "mbedtls_platform_set_printf()" that allows you to set an + * alternative printf function pointer. + * + * All these define require MBEDTLS_PLATFORM_C to be defined! + * + * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows; + * it will be enabled automatically by check_config.h + * + * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as + * MBEDTLS_PLATFORM_XXX_MACRO! + * + * Uncomment a macro to enable alternate implementation of specific base + * platform function + */ +//#define MBEDTLS_PLATFORM_EXIT_ALT +//#define MBEDTLS_PLATFORM_TIME_ALT +//#define MBEDTLS_PLATFORM_FPRINTF_ALT +//#define MBEDTLS_PLATFORM_PRINTF_ALT +//#define MBEDTLS_PLATFORM_SNPRINTF_ALT + +/** + * \def MBEDTLS_DEPRECATED_WARNING + * + * Mark deprecated functions so that they generate a warning if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * This only works with GCC and Clang. With other compilers, you may want to + * use MBEDTLS_DEPRECATED_REMOVED + * + * Uncomment to get warnings on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_WARNING + +/** + * \def MBEDTLS_DEPRECATED_REMOVED + * + * Remove deprecated functions so that they generate an error if used. + * Functions deprecated in one version will usually be removed in the next + * version. You can enable this to help you prepare the transition to a new + * major version by making sure your code is not using these functions. + * + * Uncomment to get errors on using deprecated functions. + */ +//#define MBEDTLS_DEPRECATED_REMOVED + +/* \} name SECTION: System support */ + +/** + * \name SECTION: mbed TLS feature support + * + * This section sets support for features that are or are not needed + * within the modules that are enabled. + * \{ + */ + +/** + * \def MBEDTLS_TIMING_ALT + * + * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(), + * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay() + * + * Only works if you have MBEDTLS_TIMING_C enabled. + * + * You will need to provide a header "timing_alt.h" and an implementation at + * compile time. + */ +//#define MBEDTLS_TIMING_ALT + +/** + * \def MBEDTLS_AES_ALT + * + * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your + * alternate core implementation of a symmetric crypto or hash module (e.g. + * platform specific assembly optimized implementations). Keep in mind that + * the function prototypes should remain the same. + * + * This replaces the whole module. If you only want to replace one of the + * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer + * provide the "struct mbedtls_aes_context" definition and omit the base function + * declarations and implementations. "aes_alt.h" will be included from + * "aes.h" to include the new function definitions. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * module. + */ +#define MBEDTLS_AES_ALT +//#define MBEDTLS_ARC4_ALT +//#define MBEDTLS_BLOWFISH_ALT +//#define MBEDTLS_CAMELLIA_ALT +//#define MBEDTLS_DES_ALT +//#define MBEDTLS_XTEA_ALT +//#define MBEDTLS_MD2_ALT +//#define MBEDTLS_MD4_ALT +//#define MBEDTLS_MD5_ALT +//#define MBEDTLS_RIPEMD160_ALT +//#define MBEDTLS_SHA1_ALT +//#define MBEDTLS_SHA256_ALT +//#define MBEDTLS_SHA512_ALT + +/** + * \def MBEDTLS_MD2_PROCESS_ALT + * + * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you + * alternate core implementation of symmetric crypto or hash function. Keep in + * mind that function prototypes should remain the same. + * + * This replaces only one function. The header file from mbed TLS is still + * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags. + * + * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will + * no longer provide the mbedtls_sha1_process() function, but it will still provide + * the other function (using your mbedtls_sha1_process() function) and the definition + * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible + * with this definition. + * + * Note: if you use the AES_xxx_ALT macros, then is is recommended to also set + * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES + * tables. + * + * Uncomment a macro to enable alternate implementation of the corresponding + * function. + */ +//#define MBEDTLS_MD2_PROCESS_ALT +//#define MBEDTLS_MD4_PROCESS_ALT +//#define MBEDTLS_MD5_PROCESS_ALT +//#define MBEDTLS_RIPEMD160_PROCESS_ALT +//#define MBEDTLS_SHA1_PROCESS_ALT +//#define MBEDTLS_SHA256_PROCESS_ALT +//#define MBEDTLS_SHA512_PROCESS_ALT +//#define MBEDTLS_DES_SETKEY_ALT +//#define MBEDTLS_DES_CRYPT_ECB_ALT +//#define MBEDTLS_DES3_CRYPT_ECB_ALT +//#define MBEDTLS_AES_SETKEY_ENC_ALT +//#define MBEDTLS_AES_SETKEY_DEC_ALT +//#define MBEDTLS_AES_ENCRYPT_ALT +//#define MBEDTLS_AES_DECRYPT_ALT + +/** + * \def MBEDTLS_ENTROPY_HARDWARE_ALT + * + * Uncomment this macro to let mbed TLS use your own implementation of a + * hardware entropy collector. + * + * Your function must be called \c mbedtls_hardware_poll(), have the same + * prototype as declared in entropy_poll.h, and accept NULL as first argument. + * + * Uncomment to use your own hardware entropy collector. + */ +//#define MBEDTLS_ENTROPY_HARDWARE_ALT + +/** + * \def MBEDTLS_AES_ROM_TABLES + * + * Store the AES tables in ROM. + * + * Uncomment this macro to store the AES tables in ROM. + */ +#define MBEDTLS_AES_ROM_TABLES + +/** + * \def MBEDTLS_CAMELLIA_SMALL_MEMORY + * + * Use less ROM for the Camellia implementation (saves about 768 bytes). + * + * Uncomment this macro to use less memory for Camellia. + */ +//#define MBEDTLS_CAMELLIA_SMALL_MEMORY + +/** + * \def MBEDTLS_CIPHER_MODE_CBC + * + * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers. + */ +//#define MBEDTLS_CIPHER_MODE_CBC + +/** + * \def MBEDTLS_CIPHER_MODE_CFB + * + * Enable Cipher Feedback mode (CFB) for symmetric ciphers. + */ +//#define MBEDTLS_CIPHER_MODE_CFB + +/** + * \def MBEDTLS_CIPHER_MODE_CTR + * + * Enable Counter Block Cipher mode (CTR) for symmetric ciphers. + */ +//#define MBEDTLS_CIPHER_MODE_CTR + +/** + * \def MBEDTLS_CIPHER_NULL_CIPHER + * + * Enable NULL cipher. + * Warning: Only do so when you know what you are doing. This allows for + * encryption or channels without any security! + * + * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable + * the following ciphersuites: + * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_WITH_NULL_SHA + * MBEDTLS_TLS_RSA_WITH_NULL_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA + * MBEDTLS_TLS_PSK_WITH_NULL_SHA384 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA256 + * MBEDTLS_TLS_PSK_WITH_NULL_SHA + * + * Uncomment this macro to enable the NULL cipher and ciphersuites + */ +//#define MBEDTLS_CIPHER_NULL_CIPHER + +/** + * \def MBEDTLS_CIPHER_PADDING_PKCS7 + * + * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for + * specific padding modes in the cipher layer with cipher modes that support + * padding (e.g. CBC) + * + * If you disable all padding modes, only full blocks can be used with CBC. + * + * Enable padding modes in the cipher layer. + */ +//#define MBEDTLS_CIPHER_PADDING_PKCS7 +//#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS +//#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN +//#define MBEDTLS_CIPHER_PADDING_ZEROS + +/** + * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES + * + * Enable weak ciphersuites in SSL / TLS. + * Warning: Only do so when you know what you are doing. This allows for + * channels with virtually no security at all! + * + * This enables the following ciphersuites: + * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA + * + * Uncomment this macro to enable weak ciphersuites + */ +//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES + +/** + * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES + * + * Remove RC4 ciphersuites by default in SSL / TLS. + * This flag removes the ciphersuites based on RC4 from the default list as + * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to + * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them + * explicitly. + * + * Uncomment this macro to remove RC4 ciphersuites by default. + */ +//#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES + +/** + * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED + * + * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve + * module. By default all supported curves are enabled. + * + * Comment macros to disable the curve and functions for it + */ +//#define MBEDTLS_ECP_DP_SECP192R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP224R1_ENABLED +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP384R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP521R1_ENABLED +//#define MBEDTLS_ECP_DP_SECP192K1_ENABLED +//#define MBEDTLS_ECP_DP_SECP224K1_ENABLED +//#define MBEDTLS_ECP_DP_SECP256K1_ENABLED +//#define MBEDTLS_ECP_DP_BP256R1_ENABLED +//#define MBEDTLS_ECP_DP_BP384R1_ENABLED +//#define MBEDTLS_ECP_DP_BP512R1_ENABLED +//#define MBEDTLS_ECP_DP_CURVE25519_ENABLED + +/** + * \def MBEDTLS_ECP_NIST_OPTIM + * + * Enable specific 'modulo p' routines for each NIST prime. + * Depending on the prime and architecture, makes operations 4 to 8 times + * faster on the corresponding curve. + * + * Comment this macro to disable NIST curves optimisation. + */ +#define MBEDTLS_ECP_NIST_OPTIM + +/** + * \def MBEDTLS_ECDSA_DETERMINISTIC + * + * Enable deterministic ECDSA (RFC 6979). + * Standard ECDSA is "fragile" in the sense that lack of entropy when signing + * may result in a compromise of the long-term signing key. This is avoided by + * the deterministic variant. + * + * Requires: MBEDTLS_HMAC_DRBG_C + * + * Comment this macro to disable deterministic ECDSA. + */ +//#define MBEDTLS_ECDSA_DETERMINISTIC + +/** + * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + * + * Enable the PSK based ciphersuite modes in SSL / TLS. + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + * + * Enable the DHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + * + * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + * + * Enable the RSA-PSK based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + * + * Enable the RSA-only based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + */ +//#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + * + * Enable the DHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + * + * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15, + * MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + * + * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C, + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + * + * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + * + * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS. + * + * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + */ +//#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED + +/** + * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + * + * Enable the ECJPAKE based ciphersuite modes in SSL / TLS. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Requires: MBEDTLS_ECJPAKE_C + * MBEDTLS_SHA256_C + * MBEDTLS_ECP_DP_SECP256R1_ENABLED + * + * This enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + */ +#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED + +/** + * \def MBEDTLS_PK_PARSE_EC_EXTENDED + * + * Enhance support for reading EC keys using variants of SEC1 not allowed by + * RFC 5915 and RFC 5480. + * + * Currently this means parsing the SpecifiedECDomain choice of EC + * parameters (only known groups are supported, not arbitrary domains, to + * avoid validation issues). + * + * Disable if you only need to support RFC 5915 + 5480 key formats. + */ +//#define MBEDTLS_PK_PARSE_EC_EXTENDED + +/** + * \def MBEDTLS_ERROR_STRERROR_DUMMY + * + * Enable a dummy error function to make use of mbedtls_strerror() in + * third party libraries easier when MBEDTLS_ERROR_C is disabled + * (no effect when MBEDTLS_ERROR_C is enabled). + * + * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're + * not using mbedtls_strerror() or error_strerror() in your application. + * + * Disable if you run into name conflicts and want to really remove the + * mbedtls_strerror() + */ +//#define MBEDTLS_ERROR_STRERROR_DUMMY + +/** + * \def MBEDTLS_GENPRIME + * + * Enable the prime-number generation code. + * + * Requires: MBEDTLS_BIGNUM_C + */ +//#define MBEDTLS_GENPRIME + +/** + * \def MBEDTLS_FS_IO + * + * Enable functions that use the filesystem. + */ +//#define MBEDTLS_FS_IO + +/** + * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + * + * Do not add default entropy sources. These are the platform specific, + * mbedtls_timing_hardclock and HAVEGE based poll functions. + * + * This is useful to have more control over the added entropy sources in an + * application. + * + * Uncomment this macro to prevent loading of default entropy functions. + */ +#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES + +/** + * \def MBEDTLS_NO_PLATFORM_ENTROPY + * + * Do not use built-in platform entropy functions. + * This is useful if your platform does not support + * standards like the /dev/urandom or Windows CryptoAPI. + * + * Uncomment this macro to disable the built-in platform entropy functions. + */ +#define MBEDTLS_NO_PLATFORM_ENTROPY + +/** + * \def MBEDTLS_ENTROPY_FORCE_SHA256 + * + * Force the entropy accumulator to use a SHA-256 accumulator instead of the + * default SHA-512 based one (if both are available). + * + * Requires: MBEDTLS_SHA256_C + * + * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option + * if you have performance concerns. + * + * This option is only useful if both MBEDTLS_SHA256_C and + * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. + */ +//#define MBEDTLS_ENTROPY_FORCE_SHA256 + +/** + * \def MBEDTLS_MEMORY_DEBUG + * + * Enable debugging of buffer allocator memory issues. Automatically prints + * (to stderr) all (fatal) messages on memory allocation issues. Enables + * function for 'debug output' of allocated memory. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Uncomment this macro to let the buffer allocator print out error messages. + */ +//#define MBEDTLS_MEMORY_DEBUG + +/** + * \def MBEDTLS_MEMORY_BACKTRACE + * + * Include backtrace information with each allocated block. + * + * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C + * GLIBC-compatible backtrace() an backtrace_symbols() support + * + * Uncomment this macro to include backtrace information + */ +//#define MBEDTLS_MEMORY_BACKTRACE + +/** + * \def MBEDTLS_PK_RSA_ALT_SUPPORT + * + * Support external private RSA keys (eg from a HSM) in the PK layer. + * + * Comment this macro to disable support for external private RSA keys. + */ +//#define MBEDTLS_PK_RSA_ALT_SUPPORT + +/** + * \def MBEDTLS_PKCS1_V15 + * + * Enable support for PKCS#1 v1.5 encoding. + * + * Requires: MBEDTLS_RSA_C + * + * This enables support for PKCS#1 v1.5 operations. + */ +//#define MBEDTLS_PKCS1_V15 + +/** + * \def MBEDTLS_PKCS1_V21 + * + * Enable support for PKCS#1 v2.1 encoding. + * + * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C + * + * This enables support for RSAES-OAEP and RSASSA-PSS operations. + */ +//#define MBEDTLS_PKCS1_V21 + +/** + * \def MBEDTLS_RSA_NO_CRT + * + * Do not use the Chinese Remainder Theorem for the RSA private operation. + * + * Uncomment this macro to disable the use of CRT in RSA. + * + */ +//#define MBEDTLS_RSA_NO_CRT + +/** + * \def MBEDTLS_SELF_TEST + * + * Enable the checkup functions (*_self_test). + */ +//#define MBEDTLS_SELF_TEST + +/** + * \def MBEDTLS_SHA256_SMALLER + * + * Enable an implementation of SHA-256 that has lower ROM footprint but also + * lower performance. + * + * The default implementation is meant to be a reasonnable compromise between + * performance and size. This version optimizes more aggressively for size at + * the expense of performance. Eg on Cortex-M4 it reduces the size of + * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about + * 30%. + * + * Uncomment to enable the smaller implementation of SHA256. + */ +#define MBEDTLS_SHA256_SMALLER + +/** + * \def MBEDTLS_SSL_AEAD_RANDOM_IV + * + * Generate a random IV rather than using the record sequence number as a + * nonce for ciphersuites using and AEAD algorithm (GCM or CCM). + * + * Using the sequence number is generally recommended. + * + * Uncomment this macro to always use random IVs with AEAD ciphersuites. + */ +//#define MBEDTLS_SSL_AEAD_RANDOM_IV + +/** + * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES + * + * Enable sending of alert messages in case of encountered errors as per RFC. + * If you choose not to send the alert messages, mbed TLS can still communicate + * with other servers, only debugging of failures is harder. + * + * The advantage of not sending alert messages, is that no information is given + * about reasons for failures thus preventing adversaries of gaining intel. + * + * Enable sending of all alert messages + */ +//#define MBEDTLS_SSL_ALL_ALERT_MESSAGES + +/** + * \def MBEDTLS_SSL_DEBUG_ALL + * + * Enable the debug messages in SSL module for all issues. + * Debug messages have been disabled in some places to prevent timing + * attacks due to (unbalanced) debugging function calls. + * + * If you need all error reporting you should enable this during debugging, + * but remove this for production servers that should log as well. + * + * Uncomment this macro to report all debug messages on errors introducing + * a timing side-channel. + * + */ +#define MBEDTLS_SSL_DEBUG_ALL + +/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC + * + * Enable support for Encrypt-then-MAC, RFC 7366. + * + * This allows peers that both support it to use a more robust protection for + * ciphersuites using CBC, providing deep resistance against timing attacks + * on the padding or underlying cipher. + * + * This only affects CBC ciphersuites, and is useless if none is defined. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Encrypt-then-MAC + */ +//#define MBEDTLS_SSL_ENCRYPT_THEN_MAC + +/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET + * + * Enable support for Extended Master Secret, aka Session Hash + * (draft-ietf-tls-session-hash-02). + * + * This was introduced as "the proper fix" to the Triple Handshake familiy of + * attacks, but it is recommended to always use it (even if you disable + * renegotiation), since it actually fixes a more fundamental issue in the + * original SSL/TLS design, and has implications beyond Triple Handshake. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1 or + * MBEDTLS_SSL_PROTO_TLS1_1 or + * MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for Extended Master Secret. + */ +//#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET + +/** + * \def MBEDTLS_SSL_FALLBACK_SCSV + * + * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00). + * + * For servers, it is recommended to always enable this, unless you support + * only one version of TLS, or know for sure that none of your clients + * implements a fallback strategy. + * + * For clients, you only need this if you're using a fallback strategy, which + * is not recommended in the first place, unless you absolutely need it to + * interoperate with buggy (version-intolerant) servers. + * + * Comment this macro to disable support for FALLBACK_SCSV + */ +//#define MBEDTLS_SSL_FALLBACK_SCSV + +/** + * \def MBEDTLS_SSL_HW_RECORD_ACCEL + * + * Enable hooking functions in SSL module for hardware acceleration of + * individual records. + * + * Uncomment this macro to enable hooking functions. + */ +//#define MBEDTLS_SSL_HW_RECORD_ACCEL + +/** + * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING + * + * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0. + * + * This is a countermeasure to the BEAST attack, which also minimizes the risk + * of interoperability issues compared to sending 0-length records. + * + * Comment this macro to disable 1/n-1 record splitting. + */ +//#define MBEDTLS_SSL_CBC_RECORD_SPLITTING + +/** + * \def MBEDTLS_SSL_RENEGOTIATION + * + * Disable support for TLS renegotiation. + * + * The two main uses of renegotiation are (1) refresh keys on long-lived + * connections and (2) client authentication after the initial handshake. + * If you don't need renegotiation, it's probably better to disable it, since + * it has been associated with security issues in the past and is easy to + * misuse/misunderstand. + * + * Comment this to disable support for renegotiation. + */ +//#define MBEDTLS_SSL_RENEGOTIATION + +/** + * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + * + * Enable support for receiving and parsing SSLv2 Client Hello messages for the + * SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to enable support for SSLv2 Client Hello messages. + */ +//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO + +/** + * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + * + * Pick the ciphersuite according to the client's preferences rather than ours + * in the SSL Server module (MBEDTLS_SSL_SRV_C). + * + * Uncomment this macro to respect client's ciphersuite order + */ +//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE + +/** + * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + * + * Enable support for RFC 6066 max_fragment_length extension in SSL. + * + * Comment this macro to disable support for the max_fragment_length extension + */ +#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH + +/** + * \def MBEDTLS_SSL_PROTO_SSL3 + * + * Enable support for SSL 3.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for SSL 3.0 + */ +//#define MBEDTLS_SSL_PROTO_SSL3 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1 + * + * Enable support for TLS 1.0. + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.0 + */ +//#define MBEDTLS_SSL_PROTO_TLS1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_1 + * + * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled). + * + * Requires: MBEDTLS_MD5_C + * MBEDTLS_SHA1_C + * + * Comment this macro to disable support for TLS 1.1 / DTLS 1.0 + */ +//#define MBEDTLS_SSL_PROTO_TLS1_1 + +/** + * \def MBEDTLS_SSL_PROTO_TLS1_2 + * + * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled). + * + * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C + * (Depends on ciphersuites) + * + * Comment this macro to disable support for TLS 1.2 / DTLS 1.2 + */ +#define MBEDTLS_SSL_PROTO_TLS1_2 + +/** + * \def MBEDTLS_SSL_PROTO_DTLS + * + * Enable support for DTLS (all available versions). + * + * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0, + * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2. + * + * Requires: MBEDTLS_SSL_PROTO_TLS1_1 + * or MBEDTLS_SSL_PROTO_TLS1_2 + * + * Comment this macro to disable support for DTLS + */ +#define MBEDTLS_SSL_PROTO_DTLS + +/** + * \def MBEDTLS_SSL_ALPN + * + * Enable support for RFC 7301 Application Layer Protocol Negotiation. + * + * Comment this macro to disable support for ALPN. + */ +//#define MBEDTLS_SSL_ALPN + +/** + * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY + * + * Enable support for the anti-replay mechanism in DTLS. + * + * Requires: MBEDTLS_SSL_TLS_C + * MBEDTLS_SSL_PROTO_DTLS + * + * \warning Disabling this is often a security risk! + * See mbedtls_ssl_conf_dtls_anti_replay() for details. + * + * Comment this to disable anti-replay in DTLS. + */ +#define MBEDTLS_SSL_DTLS_ANTI_REPLAY + +/** + * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Enable support for HelloVerifyRequest on DTLS servers. + * + * This feature is highly recommended to prevent DTLS servers being used as + * amplifiers in DoS attacks against other hosts. It should always be enabled + * unless you know for sure amplification cannot be a problem in the + * environment in which your server operates. + * + * \warning Disabling this can ba a security risk! (see above) + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + * + * Comment this to disable support for HelloVerifyRequest. + */ +#define MBEDTLS_SSL_DTLS_HELLO_VERIFY + +/** + * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + * + * Enable server-side support for clients that reconnect from the same port. + * + * Some clients unexpectedly close the connection and try to reconnect using the + * same source port. This needs special support from the server to handle the + * new connection securely, as described in section 4.2.8 of RFC 6347. This + * flag enables that support. + * + * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY + * + * Comment this to disable support for clients reusing the source port. + */ +//#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE + +/** + * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT + * + * Enable support for a limit of records with bad MAC. + * + * See mbedtls_ssl_conf_dtls_badmac_limit(). + * + * Requires: MBEDTLS_SSL_PROTO_DTLS + */ +//#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT + +/** + * \def MBEDTLS_SSL_SESSION_TICKETS + * + * Enable support for RFC 5077 session tickets in SSL. + * Client-side, provides full support for session tickets (maintainance of a + * session store remains the responsibility of the application, though). + * Server-side, you also need to provide callbacks for writing and parsing + * tickets, including authenticated encryption and key management. Example + * callbacks are provided by MBEDTLS_SSL_TICKET_C. + * + * Comment this macro to disable support for SSL session tickets + */ +//#define MBEDTLS_SSL_SESSION_TICKETS + +/** + * \def MBEDTLS_SSL_EXPORT_KEYS + * + * Enable support for exporting key block and master secret. + * This is required for certain users of TLS, e.g. EAP-TLS. + * + * Comment this macro to disable support for key export + */ +#define MBEDTLS_SSL_EXPORT_KEYS + +/** + * \def MBEDTLS_SSL_SERVER_NAME_INDICATION + * + * Enable support for RFC 6066 server name indication (SNI) in SSL. + * + * Requires: MBEDTLS_X509_CRT_PARSE_C + * + * Comment this macro to disable support for server name indication in SSL + */ +//#define MBEDTLS_SSL_SERVER_NAME_INDICATION + +/** + * \def MBEDTLS_SSL_TRUNCATED_HMAC + * + * Enable support for RFC 6066 truncated HMAC in SSL. + * + * Comment this macro to disable support for truncated HMAC in SSL + */ +//#define MBEDTLS_SSL_TRUNCATED_HMAC + +/** + * \def MBEDTLS_THREADING_ALT + * + * Provide your own alternate threading implementation. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to allow your own alternate threading implementation. + */ +//#define MBEDTLS_THREADING_ALT + +/** + * \def MBEDTLS_THREADING_PTHREAD + * + * Enable the pthread wrapper layer for the threading layer. + * + * Requires: MBEDTLS_THREADING_C + * + * Uncomment this to enable pthread mutexes. + */ +//#define MBEDTLS_THREADING_PTHREAD + +/** + * \def MBEDTLS_VERSION_FEATURES + * + * Allow run-time checking of compile-time enabled features. Thus allowing users + * to check at run-time if the library is for instance compiled with threading + * support via mbedtls_version_check_feature(). + * + * Requires: MBEDTLS_VERSION_C + * + * Comment this to disable run-time checking and save ROM space + */ +//#define MBEDTLS_VERSION_FEATURES + +/** + * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an extension in a v1 or v2 certificate. + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 + +/** + * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + * + * If set, the X509 parser will not break-off when parsing an X509 certificate + * and encountering an unknown critical extension. + * + * \warning Depending on your PKI use, enabling this can be a security risk! + * + * Uncomment to prevent an error. + */ +//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION + +/** + * \def MBEDTLS_X509_CHECK_KEY_USAGE + * + * Enable verification of the keyUsage extension (CA and leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused + * (intermediate) CA and leaf certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip keyUsage checking for both CA and leaf certificates. + */ +//#define MBEDTLS_X509_CHECK_KEY_USAGE + +/** + * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + * + * Enable verification of the extendedKeyUsage extension (leaf certificates). + * + * Disabling this avoids problems with mis-issued and/or misused certificates. + * + * \warning Depending on your PKI use, disabling this can be a security risk! + * + * Comment to skip extendedKeyUsage checking for certificates. + */ +//#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE + +/** + * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT + * + * Enable parsing and verification of X.509 certificates, CRLs and CSRS + * signed with RSASSA-PSS (aka PKCS#1 v2.1). + * + * Comment this macro to disallow using RSASSA-PSS in certificates. + */ +//#define MBEDTLS_X509_RSASSA_PSS_SUPPORT + +/** + * \def MBEDTLS_ZLIB_SUPPORT + * + * If set, the SSL/TLS module uses ZLIB to support compression and + * decompression of packet data. + * + * \warning TLS-level compression MAY REDUCE SECURITY! See for example the + * CRIME attack. Before enabling this option, you should examine with care if + * CRIME or similar exploits may be a applicable to your use case. + * + * \note Currently compression can't be used with DTLS. + * + * Used in: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This feature requires zlib library and headers to be present. + * + * Uncomment to enable use of ZLIB + */ +//#define MBEDTLS_ZLIB_SUPPORT +/* \} name SECTION: mbed TLS feature support */ + +/** + * \name SECTION: mbed TLS modules + * + * This section enables or disables entire modules in mbed TLS + * \{ + */ + +/** + * \def MBEDTLS_AESNI_C + * + * Enable AES-NI support on x86-64. + * + * Module: library/aesni.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the AES-NI instructions on x86-64 + */ +//#define MBEDTLS_AESNI_C + +/** + * \def MBEDTLS_AES_C + * + * Enable the AES block cipher. + * + * Module: library/aes.c + * Caller: library/ssl_tls.c + * library/pem.c + * library/ctr_drbg.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA + * + * PEM_PARSE uses AES for decrypting encrypted keys. + */ +#define MBEDTLS_AES_C + +/** + * \def MBEDTLS_ARC4_C + * + * Enable the ARCFOUR stream cipher. + * + * Module: library/arc4.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA + * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5 + * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA + * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA + */ +//#define MBEDTLS_ARC4_C + +/** + * \def MBEDTLS_ASN1_PARSE_C + * + * Enable the generic ASN1 parser. + * + * Module: library/asn1.c + * Caller: library/x509.c + * library/dhm.c + * library/pkcs12.c + * library/pkcs5.c + * library/pkparse.c + */ +#define MBEDTLS_ASN1_PARSE_C + +/** + * \def MBEDTLS_ASN1_WRITE_C + * + * Enable the generic ASN1 writer. + * + * Module: library/asn1write.c + * Caller: library/ecdsa.c + * library/pkwrite.c + * library/x509_create.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + */ +#define MBEDTLS_ASN1_WRITE_C + +/** + * \def MBEDTLS_BASE64_C + * + * Enable the Base64 module. + * + * Module: library/base64.c + * Caller: library/pem.c + * + * This module is required for PEM support (required by X.509). + */ +//#define MBEDTLS_BASE64_C + +/** + * \def MBEDTLS_BIGNUM_C + * + * Enable the multi-precision integer library. + * + * Module: library/bignum.c + * Caller: library/dhm.c + * library/ecp.c + * library/ecdsa.c + * library/rsa.c + * library/ssl_tls.c + * + * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support. + */ +#define MBEDTLS_BIGNUM_C + +/** + * \def MBEDTLS_BLOWFISH_C + * + * Enable the Blowfish block cipher. + * + * Module: library/blowfish.c + */ +//#define MBEDTLS_BLOWFISH_C + +/** + * \def MBEDTLS_CAMELLIA_C + * + * Enable the Camellia block cipher. + * + * Module: library/camellia.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 + * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 + */ +//#define MBEDTLS_CAMELLIA_C + +/** + * \def MBEDTLS_CCM_C + * + * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher. + * + * Module: library/ccm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-CCM ciphersuites, if other requisites are + * enabled as well. + */ +#define MBEDTLS_CCM_C + +/** + * \def MBEDTLS_CERTS_C + * + * Enable the test certificates. + * + * Module: library/certs.c + * Caller: + * + * This module is used for testing (ssl_client/server). + */ +//#define MBEDTLS_CERTS_C + +/** + * \def MBEDTLS_CIPHER_C + * + * Enable the generic cipher layer. + * + * Module: library/cipher.c + * Caller: library/ssl_tls.c + * + * Uncomment to enable generic cipher wrappers. + */ +#define MBEDTLS_CIPHER_C + +/** + * \def MBEDTLS_CTR_DRBG_C + * + * Enable the CTR_DRBG AES-256-based random generator. + * + * Module: library/ctr_drbg.c + * Caller: + * + * Requires: MBEDTLS_AES_C + * + * This module provides the CTR_DRBG AES-256 random number generator. + */ +#define MBEDTLS_CTR_DRBG_C + +/** + * \def MBEDTLS_DEBUG_C + * + * Enable the debug functions. + * + * Module: library/debug.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module provides debugging functions. + */ +#define MBEDTLS_DEBUG_C + +/** + * \def MBEDTLS_DES_C + * + * Enable the DES block cipher. + * + * Module: library/des.c + * Caller: library/pem.c + * library/ssl_tls.c + * + * This module enables the following ciphersuites (if other requisites are + * enabled as well): + * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA + * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA + * + * PEM_PARSE uses DES/3DES for decrypting encrypted keys. + */ +//#define MBEDTLS_DES_C + +/** + * \def MBEDTLS_DHM_C + * + * Enable the Diffie-Hellman-Merkle module. + * + * Module: library/dhm.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * DHE-RSA, DHE-PSK + */ +//#define MBEDTLS_DHM_C + +/** + * \def MBEDTLS_ECDH_C + * + * Enable the elliptic curve Diffie-Hellman library. + * + * Module: library/ecdh.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK + * + * Requires: MBEDTLS_ECP_C + */ +//#define MBEDTLS_ECDH_C + +/** + * \def MBEDTLS_ECDSA_C + * + * Enable the elliptic curve DSA library. + * + * Module: library/ecdsa.c + * Caller: + * + * This module is used by the following key exchanges: + * ECDHE-ECDSA + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C + */ +//#define MBEDTLS_ECDSA_C + +/** + * \def MBEDTLS_ECJPAKE_C + * + * Enable the elliptic curve J-PAKE library. + * + * \warning This is currently experimental. EC J-PAKE support is based on the + * Thread v1.0.0 specification; incompatible changes to the specification + * might still happen. For this reason, this is disabled by default. + * + * Module: library/ecjpake.c + * Caller: + * + * This module is used by the following key exchanges: + * ECJPAKE + * + * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C + */ +#define MBEDTLS_ECJPAKE_C + +/** + * \def MBEDTLS_ECP_C + * + * Enable the elliptic curve over GF(p) library. + * + * Module: library/ecp.c + * Caller: library/ecdh.c + * library/ecdsa.c + * library/ecjpake.c + * + * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED + */ +#define MBEDTLS_ECP_C + +/** + * \def MBEDTLS_ENTROPY_C + * + * Enable the platform-specific entropy code. + * + * Module: library/entropy.c + * Caller: + * + * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C + * + * This module provides a generic entropy pool + */ +#define MBEDTLS_ENTROPY_C + +/** + * \def MBEDTLS_ERROR_C + * + * Enable error code to error string conversion. + * + * Module: library/error.c + * Caller: + * + * This module enables mbedtls_strerror(). + */ +//#define MBEDTLS_ERROR_C + +/** + * \def MBEDTLS_GCM_C + * + * Enable the Galois/Counter Mode (GCM) for AES. + * + * Module: library/gcm.c + * + * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C + * + * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other + * requisites are enabled as well. + */ +//#define MBEDTLS_GCM_C + +/** + * \def MBEDTLS_HAVEGE_C + * + * Enable the HAVEGE random generator. + * + * Warning: the HAVEGE random generator is not suitable for virtualized + * environments + * + * Warning: the HAVEGE random generator is dependent on timing and specific + * processor traits. It is therefore not advised to use HAVEGE as + * your applications primary random generator or primary entropy pool + * input. As a secondary input to your entropy pool, it IS able add + * the (limited) extra entropy it provides. + * + * Module: library/havege.c + * Caller: + * + * Requires: MBEDTLS_TIMING_C + * + * Uncomment to enable the HAVEGE random generator. + */ +//#define MBEDTLS_HAVEGE_C + +/** + * \def MBEDTLS_HMAC_DRBG_C + * + * Enable the HMAC_DRBG random generator. + * + * Module: library/hmac_drbg.c + * Caller: + * + * Requires: MBEDTLS_MD_C + * + * Uncomment to enable the HMAC_DRBG random number geerator. + */ +#define MBEDTLS_HMAC_DRBG_C + +/** + * \def MBEDTLS_MD_C + * + * Enable the generic message digest layer. + * + * Module: library/mbedtls_md.c + * Caller: + * + * Uncomment to enable generic message digest wrappers. + */ +#define MBEDTLS_MD_C + +/** + * \def MBEDTLS_MD2_C + * + * Enable the MD2 hash algorithm. + * + * Module: library/mbedtls_md2.c + * Caller: + * + * Uncomment to enable support for (rare) MD2-signed X.509 certs. + */ +//#define MBEDTLS_MD2_C + +/** + * \def MBEDTLS_MD4_C + * + * Enable the MD4 hash algorithm. + * + * Module: library/mbedtls_md4.c + * Caller: + * + * Uncomment to enable support for (rare) MD4-signed X.509 certs. + */ +//#define MBEDTLS_MD4_C + +/** + * \def MBEDTLS_MD5_C + * + * Enable the MD5 hash algorithm. + * + * Module: library/mbedtls_md5.c + * Caller: library/mbedtls_md.c + * library/pem.c + * library/ssl_tls.c + * + * This module is required for SSL/TLS and X.509. + * PEM_PARSE uses MD5 for decrypting encrypted keys. + */ +//#define MBEDTLS_MD5_C + +/** + * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C + * + * Enable the buffer allocator implementation that makes use of a (stack) + * based buffer to 'allocate' dynamic memory. (replaces calloc() and free() + * calls) + * + * Module: library/memory_buffer_alloc.c + * + * Requires: MBEDTLS_PLATFORM_C + * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS) + * + * Enable this module to enable the buffer memory allocator. + */ +#define MBEDTLS_MEMORY_BUFFER_ALLOC_C + +/** + * \def MBEDTLS_NET_C + * + * Enable the TCP and UDP over IPv6/IPv4 networking routines. + * + * \note This module only works on POSIX/Unix (including Linux, BSD and OS X) + * and Windows. For other platforms, you'll want to disable it, and write your + * own networking callbacks to be passed to \c mbedtls_ssl_set_bio(). + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/net.c + * + * This module provides networking routines. + */ +//#define MBEDTLS_NET_C + +/** + * \def MBEDTLS_OID_C + * + * Enable the OID database. + * + * Module: library/oid.c + * Caller: library/asn1write.c + * library/pkcs5.c + * library/pkparse.c + * library/pkwrite.c + * library/rsa.c + * library/x509.c + * library/x509_create.c + * library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + * + * This modules translates between OIDs and internal values. + */ +#define MBEDTLS_OID_C + +/** + * \def MBEDTLS_PADLOCK_C + * + * Enable VIA Padlock support on x86. + * + * Module: library/padlock.c + * Caller: library/aes.c + * + * Requires: MBEDTLS_HAVE_ASM + * + * This modules adds support for the VIA PadLock on x86. + */ +//#define MBEDTLS_PADLOCK_C + +/** + * \def MBEDTLS_PEM_PARSE_C + * + * Enable PEM decoding / parsing. + * + * Module: library/pem.c + * Caller: library/dhm.c + * library/pkparse.c + * library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for decoding / parsing PEM files. + */ +//#define MBEDTLS_PEM_PARSE_C + +/** + * \def MBEDTLS_PEM_WRITE_C + * + * Enable PEM encoding / writing. + * + * Module: library/pem.c + * Caller: library/pkwrite.c + * library/x509write_crt.c + * library/mbedtls_x509write_csr.c + * + * Requires: MBEDTLS_BASE64_C + * + * This modules adds support for encoding / writing PEM files. + */ +//#define MBEDTLS_PEM_WRITE_C + +/** + * \def MBEDTLS_PK_C + * + * Enable the generic public (asymetric) key layer. + * + * Module: library/pk.c + * Caller: library/ssl_tls.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C + * + * Uncomment to enable generic public key wrappers. + */ +#define MBEDTLS_PK_C + +/** + * \def MBEDTLS_PK_PARSE_C + * + * Enable the generic public (asymetric) key parser. + * + * Module: library/pkparse.c + * Caller: library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key parse functions. + */ +#define MBEDTLS_PK_PARSE_C + +/** + * \def MBEDTLS_PK_WRITE_C + * + * Enable the generic public (asymetric) key writer. + * + * Module: library/pkwrite.c + * Caller: library/x509write.c + * + * Requires: MBEDTLS_PK_C + * + * Uncomment to enable generic public key write functions. + */ +//#define MBEDTLS_PK_WRITE_C + +/** + * \def MBEDTLS_PKCS5_C + * + * Enable PKCS#5 functions. + * + * Module: library/pkcs5.c + * + * Requires: MBEDTLS_MD_C + * + * This module adds support for the PKCS#5 functions. + */ +//#define MBEDTLS_PKCS5_C + +/** + * \def MBEDTLS_PKCS11_C + * + * Enable wrapper for PKCS#11 smartcard support. + * + * Module: library/pkcs11.c + * Caller: library/pk.c + * + * Requires: MBEDTLS_PK_C + * + * This module enables SSL/TLS PKCS #11 smartcard support. + * Requires the presence of the PKCS#11 helper library (libpkcs11-helper) + */ +//#define MBEDTLS_PKCS11_C + +/** + * \def MBEDTLS_PKCS12_C + * + * Enable PKCS#12 PBE functions. + * Adds algorithms for parsing PKCS#8 encrypted private keys + * + * Module: library/pkcs12.c + * Caller: library/pkparse.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * Can use: MBEDTLS_ARC4_C + * + * This module enables PKCS#12 functions. + */ +//#define MBEDTLS_PKCS12_C + +/** + * \def MBEDTLS_PLATFORM_C + * + * Enable the platform abstraction layer that allows you to re-assign + * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit(). + * + * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT + * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned + * above to be specified at runtime or compile time respectively. + * + * \note This abstraction layer must be enabled on Windows (including MSYS2) + * as other module rely on it for a fixed snprintf implementation. + * + * Module: library/platform.c + * Caller: Most other .c files + * + * This module enables abstraction of common (libc) functions. + */ +#define MBEDTLS_PLATFORM_C + +/** + * \def MBEDTLS_RIPEMD160_C + * + * Enable the RIPEMD-160 hash algorithm. + * + * Module: library/mbedtls_ripemd160.c + * Caller: library/mbedtls_md.c + * + */ +//#define MBEDTLS_RIPEMD160_C + +/** + * \def MBEDTLS_RSA_C + * + * Enable the RSA public-key cryptosystem. + * + * Module: library/rsa.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509.c + * + * This module is used by the following key exchanges: + * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C + */ +//#define MBEDTLS_RSA_C + +/** + * \def MBEDTLS_SHA1_C + * + * Enable the SHA1 cryptographic hash algorithm. + * + * Module: library/mbedtls_sha1.c + * Caller: library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509write_crt.c + * + * This module is required for SSL/TLS and SHA1-signed certificates. + */ +//#define MBEDTLS_SHA1_C + +/** + * \def MBEDTLS_SHA256_C + * + * Enable the SHA-224 and SHA-256 cryptographic hash algorithms. + * + * Module: library/mbedtls_sha256.c + * Caller: library/entropy.c + * library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module adds support for SHA-224 and SHA-256. + * This module is required for the SSL/TLS 1.2 PRF function. + */ +#define MBEDTLS_SHA256_C + +/** + * \def MBEDTLS_SHA512_C + * + * Enable the SHA-384 and SHA-512 cryptographic hash algorithms. + * + * Module: library/mbedtls_sha512.c + * Caller: library/entropy.c + * library/mbedtls_md.c + * library/ssl_cli.c + * library/ssl_srv.c + * + * This module adds support for SHA-384 and SHA-512. + */ +//#define MBEDTLS_SHA512_C + +/** + * \def MBEDTLS_SSL_CACHE_C + * + * Enable simple SSL cache implementation. + * + * Module: library/ssl_cache.c + * Caller: + * + * Requires: MBEDTLS_SSL_CACHE_C + */ +//#define MBEDTLS_SSL_CACHE_C + +/** + * \def MBEDTLS_SSL_COOKIE_C + * + * Enable basic implementation of DTLS cookies for hello verification. + * + * Module: library/ssl_cookie.c + * Caller: + */ +#define MBEDTLS_SSL_COOKIE_C + +/** + * \def MBEDTLS_SSL_TICKET_C + * + * Enable an implementation of TLS server-side callbacks for session tickets. + * + * Module: library/ssl_ticket.c + * Caller: + * + * Requires: MBEDTLS_CIPHER_C + */ +//#define MBEDTLS_SSL_TICKET_C + +/** + * \def MBEDTLS_SSL_CLI_C + * + * Enable the SSL/TLS client code. + * + * Module: library/ssl_cli.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS client support. + */ +#define MBEDTLS_SSL_CLI_C + +/** + * \def MBEDTLS_SSL_SRV_C + * + * Enable the SSL/TLS server code. + * + * Module: library/ssl_srv.c + * Caller: + * + * Requires: MBEDTLS_SSL_TLS_C + * + * This module is required for SSL/TLS server support. + */ +#define MBEDTLS_SSL_SRV_C + +/** + * \def MBEDTLS_SSL_TLS_C + * + * Enable the generic SSL/TLS code. + * + * Module: library/ssl_tls.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C + * and at least one of the MBEDTLS_SSL_PROTO_XXX defines + * + * This module is required for SSL/TLS. + */ +#define MBEDTLS_SSL_TLS_C + +/** + * \def MBEDTLS_THREADING_C + * + * Enable the threading abstraction layer. + * By default mbed TLS assumes it is used in a non-threaded environment or that + * contexts are not shared between threads. If you do intend to use contexts + * between threads, you will need to enable this layer to prevent race + * conditions. See also our Knowledge Base article about threading: + * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading + * + * Module: library/threading.c + * + * This allows different threading implementations (self-implemented or + * provided). + * + * You will have to enable either MBEDTLS_THREADING_ALT or + * MBEDTLS_THREADING_PTHREAD. + * + * Enable this layer to allow use of mutexes within mbed TLS + */ +//#define MBEDTLS_THREADING_C + +/** + * \def MBEDTLS_TIMING_C + * + * Enable the semi-portable timing interface. + * + * \note The provided implementation only works on POSIX/Unix (including Linux, + * BSD and OS X) and Windows. On other platforms, you can either disable that + * module and provide your own implementations of the callbacks needed by + * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide + * your own implementation of the whole module by setting + * \c MBEDTLS_TIMING_ALT in the current file. + * + * \note See also our Knowledge Base article about porting to a new + * environment: + * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS + * + * Module: library/timing.c + * Caller: library/havege.c + * + * This module is used by the HAVEGE random number generator. + */ +//#define MBEDTLS_TIMING_C + +/** + * \def MBEDTLS_VERSION_C + * + * Enable run-time version information. + * + * Module: library/version.c + * + * This module provides run-time version information. + */ +//#define MBEDTLS_VERSION_C + +/** + * \def MBEDTLS_X509_USE_C + * + * Enable X.509 core for using certificates. + * + * Module: library/x509.c + * Caller: library/mbedtls_x509_crl.c + * library/mbedtls_x509_crt.c + * library/mbedtls_x509_csr.c + * + * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, + * MBEDTLS_PK_PARSE_C + * + * This module is required for the X.509 parsing modules. + */ +//#define MBEDTLS_X509_USE_C + +/** + * \def MBEDTLS_X509_CRT_PARSE_C + * + * Enable X.509 certificate parsing. + * + * Module: library/mbedtls_x509_crt.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 certificate parsing. + */ +//#define MBEDTLS_X509_CRT_PARSE_C + +/** + * \def MBEDTLS_X509_CRL_PARSE_C + * + * Enable X.509 CRL parsing. + * + * Module: library/mbedtls_x509_crl.c + * Caller: library/mbedtls_x509_crt.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is required for X.509 CRL parsing. + */ +//#define MBEDTLS_X509_CRL_PARSE_C + +/** + * \def MBEDTLS_X509_CSR_PARSE_C + * + * Enable X.509 Certificate Signing Request (CSR) parsing. + * + * Module: library/mbedtls_x509_csr.c + * Caller: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_USE_C + * + * This module is used for reading X.509 certificate request. + */ +//#define MBEDTLS_X509_CSR_PARSE_C + +/** + * \def MBEDTLS_X509_CREATE_C + * + * Enable X.509 core for creating certificates. + * + * Module: library/x509_create.c + * + * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C + * + * This module is the basis for creating X.509 certificates and CSRs. + */ +//#define MBEDTLS_X509_CREATE_C + +/** + * \def MBEDTLS_X509_CRT_WRITE_C + * + * Enable creating X.509 certificates. + * + * Module: library/x509_crt_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate creation. + */ +//#define MBEDTLS_X509_CRT_WRITE_C + +/** + * \def MBEDTLS_X509_CSR_WRITE_C + * + * Enable creating X.509 Certificate Signing Requests (CSR). + * + * Module: library/x509_csr_write.c + * + * Requires: MBEDTLS_X509_CREATE_C + * + * This module is required for X.509 certificate request writing. + */ +//#define MBEDTLS_X509_CSR_WRITE_C + +/** + * \def MBEDTLS_XTEA_C + * + * Enable the XTEA block cipher. + * + * Module: library/xtea.c + * Caller: + */ +//#define MBEDTLS_XTEA_C + +/* \} name SECTION: mbed TLS modules */ + +/** + * \name SECTION: Module configuration options + * + * This section allows for the setting of module specific sizes and + * configuration options. The default values are already present in the + * relevant header files and should suffice for the regular use cases. + * + * Our advice is to enable options and change their values here + * only if you have a good reason and know the consequences. + * + * Please check the respective header file for documentation on these + * parameters (to prevent duplicate documentation). + * \{ + */ + +/* MPI / BIGNUM options */ +#define MBEDTLS_MPI_WINDOW_SIZE 1 /**< Maximum windows size used. */ +#define MBEDTLS_MPI_MAX_SIZE 32 /**< Maximum number of bytes for usable MPIs. */ + +/* CTR_DRBG options */ +//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with SHA-256) */ +//#define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* HMAC_DRBG options */ +//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ +//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ +//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ +//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ + +/* ECP options */ +#define MBEDTLS_ECP_MAX_BITS 256 /**< Maximum bit size of groups */ +#define MBEDTLS_ECP_WINDOW_SIZE 2 /**< Maximum window size used */ +#define MBEDTLS_ECP_FIXED_POINT_OPTIM 0 /**< Enable fixed-point speed-up */ + +/* Entropy options */ +#define MBEDTLS_ENTROPY_MAX_SOURCES 1 /**< Maximum number of sources supported */ +//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ + +/* Memory buffer allocator options */ +//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */ + +/* Platform options */ +//#define MBEDTLS_PLATFORM_STD_MEM_HDR /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't define if no header is needed. */ +//#define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_TIME time /**< Default time to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_FPRINTF fprintf /**< Default fprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can be undefined */ +/* Note: your snprintf must correclty zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */ +//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */ + +/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */ +/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */ +//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_TIME_TYPE_MACRO uint32_t /**< Default time macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can be undefined */ +//#define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */ +/* Note: your snprintf must correclty zero-terminate the buffer! */ +//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */ + +/* SSL Cache options */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */ +//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */ + +/* SSL options */ +#define MBEDTLS_SSL_MAX_CONTENT_LEN 768 /**< Maxium fragment length in bytes, determines the size of each of the two internal I/O buffers */ +//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */ +//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */ +//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number of cookies issued */ + +/** + * Complete list of ciphersuites to use, in order of preference. + * + * \warning No dependency checking is done on that field! This option can only + * be used to restrict the set of available ciphersuites. It is your + * responsibility to make sure the needed modules are active. + * + * Use this to save a few hundred bytes of ROM (default ordering of all + * available ciphersuites) and a few to a few hundred bytes of RAM. + * + * The value below is only an example, not the default. + */ +#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8 + +/* X509 options */ +//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */ + +/* \} name SECTION: Module configuration options */ + +#if defined(TARGET_LIKE_MBED) +#include "mbedtls/target_config.h" +#endif + +/* + * Allow user to override any previous default. + * + * Use two macro names for that, as: + * - with yotta the prefix YOTTA_CFG_ is forced + * - without yotta is looks weird to have a YOTTA prefix. + */ +#if defined(YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE) +#include YOTTA_CFG_MBEDTLS_USER_CONFIG_FILE +#elif defined(MBEDTLS_USER_CONFIG_FILE) +#include MBEDTLS_USER_CONFIG_FILE +#endif + +#include "mbedtls/check_config.h" + +#endif /* MBEDTLS_CONFIG_H */ diff --git a/examples/platforms/cc1352/cxx_helpers.c b/examples/platforms/cc1352/cxx_helpers.c new file mode 100644 index 000000000..5e2d21dd7 --- /dev/null +++ b/examples/platforms/cc1352/cxx_helpers.c @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Helper functions for running c++ without the standard library + */ + +__extension__ typedef int __guard __attribute__((mode(__DI__))); + +int __cxa_guard_acquire(__guard *g) +{ + return !*(char *)(g); +} + +void __cxa_guard_release(__guard *g) +{ + *(char *)g = 1; +} + +void __cxa_guard_abort(__guard *g) +{ + (void)g; +} + +void __cxa_pure_virtual(void) +{ + while (1) + ; +} diff --git a/examples/platforms/cc1352/diag.c b/examples/platforms/cc1352/diag.c new file mode 100644 index 000000000..8658d8eee --- /dev/null +++ b/examples/platforms/cc1352/diag.c @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "platform-cc1352.h" + +#if OPENTHREAD_ENABLE_DIAG + +/** + * Diagnostics mode variables. + * + */ +static bool sDiagMode = false; + +void otPlatDiagProcess(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen) +{ + (void)aInstance; + + // Add more platform specific diagnostics features here. + if (argc > 1) + { + snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]); + } +} + +void otPlatDiagModeSet(bool aMode) +{ + sDiagMode = aMode; +} + +bool otPlatDiagModeGet() +{ + return sDiagMode; +} + +void otPlatDiagChannelSet(uint8_t aChannel) +{ + (void)aChannel; +} + +void otPlatDiagTxPowerSet(int8_t aTxPower) +{ + (void)aTxPower; +} + +void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError) +{ + (void)aInstance; + (void)aFrame; + (void)aError; +} + +void otPlatDiagAlarmCallback(otInstance *aInstance) +{ + (void)aInstance; +} + +#endif // OPENTHREAD_ENABLE_DIAG diff --git a/examples/platforms/cc1352/flash.c b/examples/platforms/cc1352/flash.c new file mode 100644 index 000000000..2a4a01307 --- /dev/null +++ b/examples/platforms/cc1352/flash.c @@ -0,0 +1,313 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "platform-cc1352.h" + +/* + * The settings configuration base address *MUST* be defined in the core config + * file. The base address *MUST* be aligned on an 8K page boundary or the flash + * program calls will fail. + */ +#ifndef SETTINGS_CONFIG_BASE_ADDRESS +#error "SETTINGS_CONFIG_BASE_ADDRESS not defined in the OpenThread Core Config" +#endif /* SETTINGS_CONFIG_BASE_ADDRESS */ + +/* + * The settings configuration page size *MUST* be defined in the core config + * file. The page size *MUST* be 8K or the flash program calls will fail. + */ +#if (SETTINGS_CONFIG_PAGE_SIZE != 0x2000) +#error "SETTINGS_CONFIG_PAGE_SIZE must be defined in OpenThread Core Config" +#endif + +/* + * The settings configuration page number _SHOULD_ be defined in the core + * config file. + */ +#ifndef SETTINGS_CONFIG_PAGE_NUM +#warn "SETTINGS_CONFIG_PAGE_NUM not defined in the OpenThread Core Config" +#endif /* SETTINGS_CONFIG_PAGE_NUM */ + +enum +{ + MIN_VDD_FLASH = 0x18, /* 1.50 volts (0.50=128/256 -> 128=0x80) */ + MAX_WRITE_INCREMENT = 8, /* maximum number of bytes to write at a time to + * avoid interrupt latency while in ROM + */ +}; + +/** + * Check if the Battery Monitor measurements and calculations are enabled. + * + * @return If the Battery Monitor is enabled. + * @retval true The Battery Monitor is on. + * @retval false The Battery Monitor is off. + */ +static bool isBatMonOn(void) +{ + uint32_t batMonCtl = HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL); + return ((batMonCtl & AON_BATMON_CTL_CALC_EN_M) == AON_BATMON_CTL_CALC_EN && + (batMonCtl & AON_BATMON_CTL_MEAS_EN_M) == AON_BATMON_CTL_MEAS_EN); +} + +/** + * Check if the supply voltage is high enough to support flash programming. + * + * @return If the Voltage is too low to support flash programming. + * @retval false The supply voltage is too low. + * @retval true The supply voltage is sufficient. + */ +static bool checkVoltage(void) +{ + bool batMonWasOff = !isBatMonOn(); + bool ret = false; + + if (batMonWasOff) + { + AONBatMonEnable(); + } + + if (AONBatMonBatteryVoltageGet() >= MIN_VDD_FLASH) + { + ret = true; + } + + if (batMonWasOff) + { + AONBatMonDisable(); + } + + return ret; +} + +/** + * Disable Flash data caching and instruction pre-fetching. + * + * It is necessary to disable the caching and VIMS to ensure the cache has + * valid data while the program is executing. + * + * @return The VIMS state before being disabled. + */ +static uint32_t disableFlashCache(void) +{ + uint32_t mode = VIMSModeGet(VIMS_BASE); + + VIMSLineBufDisable(VIMS_BASE); + + if (mode != VIMS_MODE_DISABLED) + { + VIMSModeSet(VIMS_BASE, VIMS_MODE_DISABLED); + + while (VIMSModeGet(VIMS_BASE) != VIMS_MODE_DISABLED) + ; + } + + return mode; +} + +/** + * Restore the Flash data caching and instruction pre-fetching. + * + * @param [in] mode The VIMS mode returned by @ref disableFlashCache. + */ +static void restoreFlashCache(uint32_t mode) +{ + if (mode != VIMS_MODE_DISABLED) + { + VIMSModeSet(VIMS_BASE, mode); + } + + VIMSLineBufEnable(VIMS_BASE); +} + +/** + * Translate the errors from the Flash programming FSM to OpenThread error + * codes. + * + * @param [in] error Return from the Flash programming function. + * + * @return The corresponding OpenThread @ref otError value. + */ +static otError fsmErrorToOtError(uint32_t error) +{ + otError ret = OT_ERROR_GENERIC; + + switch (error) + { + case FAPI_STATUS_SUCCESS: + ret = OT_ERROR_NONE; + break; + + case FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH: + ret = OT_ERROR_INVALID_ARGS; + break; + + case FAPI_STATUS_FSM_ERROR: + ret = OT_ERROR_FAILED; + break; + + default: + break; + } + + return ret; +} + +/** + * Function documented in platforms/utils/flash.h + */ +otError utilsFlashInit(void) +{ + return OT_ERROR_NONE; +} + +/** + * Function documented in platforms/utils/flash.h + */ +uint32_t utilsFlashGetSize(void) +{ + return FlashSizeGet(); +} + +/** + * Function documented in platforms/utils/flash.h + */ +otError utilsFlashErasePage(uint32_t aAddress) +{ + uint32_t mode; + uint32_t fsmRet; + otError ret; + + otEXPECT_ACTION(checkVoltage(), ret = OT_ERROR_FAILED); + + mode = disableFlashCache(); + + fsmRet = FlashSectorErase(aAddress); + + restoreFlashCache(mode); + + ret = fsmErrorToOtError(fsmRet); + +exit: + return ret; +} + +/** + * Function documented in platforms/utils/flash.h + */ +otError utilsFlashStatusWait(uint32_t aTimeout) +{ + uint32_t start = otPlatAlarmMilliGetNow(); + otError ret = OT_ERROR_BUSY; + + while ((otPlatAlarmMilliGetNow() - start) < aTimeout) + { + if (FlashCheckFsmForReady() == FAPI_STATUS_FSM_READY) + { + ret = OT_ERROR_NONE; + break; + } + } + + return ret; +} + +/** + * Function documented in platforms/utils/flash.h + */ +uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize) +{ + uint32_t mode; + uint32_t written = 0; + + otEXPECT(checkVoltage()); + + mode = disableFlashCache(); + + while (written < aSize) + { + uint32_t toWrite = aSize - written; + uint8_t *data = aData + written; + uint32_t address = aAddress + written; + uint32_t fsmRet; + bool interruptsWereDisabled; + + if (toWrite > MAX_WRITE_INCREMENT) + { + toWrite = MAX_WRITE_INCREMENT; + } + + /* The CPU may not execute code from flash while a program is + * happening. We disable interrupts to ensure one does not preempt the + * ROM fsm. + */ + interruptsWereDisabled = IntMasterDisable(); + + fsmRet = FlashProgram(data, address, toWrite); + + if (!interruptsWereDisabled) + { + IntMasterEnable(); + } + + if (fsmRet != FAPI_STATUS_SUCCESS) + { + break; + } + + written += toWrite; + } + + restoreFlashCache(mode); + +exit: + return written; +} + +/** + * Function documented in platforms/utils/flash.h + */ +uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize) +{ + memcpy(aData, (void *)aAddress, (size_t)aSize); + + return aSize; +} diff --git a/examples/platforms/cc1352/logging.c b/examples/platforms/cc1352/logging.c new file mode 100644 index 000000000..190a4bfa1 --- /dev/null +++ b/examples/platforms/cc1352/logging.c @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2016, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file logging.c + * Platform abstraction for the logging + * + */ +#include +#include +#include + +#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \ + (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL) +OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...) +{ + (void)aLogLevel; + (void)aLogRegion; + (void)aFormat; +} +#endif diff --git a/examples/platforms/cc1352/misc.c b/examples/platforms/cc1352/misc.c new file mode 100644 index 000000000..a95a42236 --- /dev/null +++ b/examples/platforms/cc1352/misc.c @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include +#include +#include + +/* + * NOTE: if the system is flashed with Flash Programmer 2 or Uniflash, this + * reset will not work the first time. Both programs use the cJTAG module, + * which sets the halt in boot flag. The device must be manually reset the + * first time after being programmed through the JTAG interface. + */ + +/** + * Function documented in platform/misc.h + */ +void otPlatReset(otInstance *aInstance) +{ + (void)aInstance; + SysCtrlSystemReset(); +} + +/** + * Function documented in platform/misc.h + */ +otPlatResetReason otPlatGetResetReason(otInstance *aInstance) +{ + (void)aInstance; + otPlatResetReason ret; + + switch (SysCtrlResetSourceGet()) + { + case RSTSRC_PWR_ON: + ret = OT_PLAT_RESET_REASON_POWER_ON; + break; + + case RSTSRC_PIN_RESET: + ret = OT_PLAT_RESET_REASON_EXTERNAL; + break; + + case RSTSRC_VDDS_LOSS: + case RSTSRC_VDDR_LOSS: + case RSTSRC_CLK_LOSS: + ret = OT_PLAT_RESET_REASON_CRASH; + break; + + case RSTSRC_WARMRESET: + case RSTSRC_SYSRESET: + case RSTSRC_WAKEUP_FROM_SHUTDOWN: + ret = OT_PLAT_RESET_REASON_SOFTWARE; + break; + + default: + ret = OT_PLAT_RESET_REASON_UNKNOWN; + break; + } + + return ret; +} + +void otPlatWakeHost(void) +{ + // TODO: implement an operation to wake the host from sleep state. +} diff --git a/examples/platforms/cc1352/openthread-core-cc1352-config.h b/examples/platforms/cc1352/openthread-core-cc1352-config.h new file mode 100644 index 000000000..13c87dece --- /dev/null +++ b/examples/platforms/cc1352/openthread-core-cc1352-config.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef OPENTHREAD_CORE_CC1352_CONFIG_H_ +#define OPENTHREAD_CORE_CC1352_CONFIG_H_ + +/** + * @def OPENTHREAD_CONFIG_PLATFORM_INFO + * + * The platform-specific string to insert into the OpenThread version string. + * + */ +#define OPENTHREAD_CONFIG_PLATFORM_INFO "CC1352" + +/** + * @def SETTINGS_CONFIG_BASE_ADDRESS + * + * The base address of the pages to be used for non-volatile-settings storage. + */ +#define SETTINGS_CONFIG_BASE_ADDRESS (0x52000) + +/** + * @def SETTINGS_CONFIG_PAGE_SIZE + * + * The size in bytes of a page for the cc26x2 platform. + * + * @note *MUST BE* 8K. + */ +#define SETTINGS_CONFIG_PAGE_SIZE (0x2000) + +/** + * @def SETTINGS_CONFIG_PAGE_NUM + * + * The number of flash pages to use for non-volatile settings storage. + */ +#define SETTINGS_CONFIG_PAGE_NUM (2) + +#endif /* OPENTHREAD_CORE_CC1352_CONFIG_H_ */ + diff --git a/examples/platforms/cc1352/platform-cc1352.h b/examples/platforms/cc1352/platform-cc1352.h new file mode 100644 index 000000000..927712526 --- /dev/null +++ b/examples/platforms/cc1352/platform-cc1352.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef PLATFORM_H_ +#define PLATFORM_H_ + +#include +#include +#include +#include "openthread/types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Global OpenThread instance structure +extern otInstance *sInstance; + +/** + * Initialize the debug uart + */ +void cc1352DebugUartInit(void); + +/** + * This method initializes the alarm service used by OpenThread. + * + */ +void cc1352AlarmInit(void); + +/** + * This method performs alarm driver processing. + * + */ +void cc1352AlarmProcess(otInstance *aInstance); + +/** + * This method initializes the radio service used by OpenThread. + * + */ +void cc1352RadioInit(void); + +/** + * This method performs radio driver processing. + * + */ +void cc1352RadioProcess(otInstance *aInstance); + +/** + * This method initializes the random number service used by OpenThread. + * + */ +void cc1352RandomInit(void); + +/** + * This method performs radio driver processing. + * + */ +void cc1352UartProcess(void); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // PLATFORM_H_ diff --git a/examples/platforms/cc1352/platform.c b/examples/platforms/cc1352/platform.c new file mode 100644 index 000000000..77881e4eb --- /dev/null +++ b/examples/platforms/cc1352/platform.c @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * @brief + * This file includes the platform-specific initializers. + */ + +#include + +#include "platform-cc1352.h" +#include +#include + +#include "inc/hw_ccfg.h" +#include "inc/hw_ccfg_simple_struct.h" +#include "inc/hw_types.h" + +extern const ccfg_t __ccfg; + +const char *dummy_ccfg_ref = ((const char *)(&(__ccfg))); + +/** + * Function documented in platform-cc1352.h + */ +void PlatformInit(int argc, char *argv[]) +{ + (void)argc; + (void)argv; + + while (dummy_ccfg_ref == NULL) + { + /* + * This provides a code reference to the customer configuration area of + * the flash, otherwise the data is skipped by the linker and not put + * into the final flash image. + */ + } + +#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART + cc1352DebugUartInit(); +#endif + cc1352AlarmInit(); + cc1352RandomInit(); + cc1352RadioInit(); +} + +bool PlatformPseudoResetWasRequested(void) +{ + return false; +} + +/** + * Function documented in platform-cc1352.h + */ +void PlatformProcessDrivers(otInstance *aInstance) +{ + // should sleep and wait for interrupts here + + cc1352UartProcess(); + cc1352RadioProcess(aInstance); + cc1352AlarmProcess(aInstance); +} diff --git a/examples/platforms/cc1352/radio.c b/examples/platforms/cc1352/radio.c new file mode 100644 index 000000000..f7f2db0f7 --- /dev/null +++ b/examples/platforms/cc1352/radio.c @@ -0,0 +1,1970 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * This file implements the OpenThread platform abstraction for radio communication. + * + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include /* to seed the CSMA-CA funciton */ + +#include "cc1352_radio.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum +{ + CC1352_RECEIVE_SENSITIVITY = -100, // dBm +}; + +/* phy state as defined by openthread */ +static volatile cc1352_PhyState_t sState; + +/* set to max transmit power by default */ +static output_config_t const *sCurrentOutputPower = &(rgOutputPower[0]); + +/* Overrides from SmartRF Studio 7 2.10.0#94 */ +static uint32_t sIEEEOverrides[] = { + // override_ieee_802_15_4.xml + // PHY: Use MCE RAM patch, RFE ROM bank 1 + MCE_RFE_OVERRIDE(1, 0, 0, 0, 1, 0), + // Synth: Use 48 MHz crystal, enable extra PLL filtering + (uint32_t)0x02400403, + // Synth: Configure extra PLL filtering + (uint32_t)0x001C8473, + // Synth: Configure synth hardware + (uint32_t)0x00088433, + // Synth: Set minimum RTRIM to 3 + (uint32_t)0x00038793, + // Synth: Configure faster calibration + HW32_ARRAY_OVERRIDE(0x4004, 1), + // Synth: Configure faster calibration + (uint32_t)0x1C0C0618, + // Synth: Configure faster calibration + (uint32_t)0xC00401A1, + // Synth: Configure faster calibration + (uint32_t)0x00010101, + // Synth: Configure faster calibration + (uint32_t)0xC0040141, + // Synth: Configure faster calibration + (uint32_t)0x00214AD3, + // Synth: Decrease synth programming time-out (0x0298 RAT ticks = 166 us) + (uint32_t)0x02980243, + // DC/DC regulator: In Tx, use DCDCCTL5[3:0]=0xC (DITHER_EN=1 and IPEAK=4). In Rx, use DCDCCTL5[3:0]=0xC + // (DITHER_EN=1 and IPEAK=4). + (uint32_t)0xFCFC08C3, + // Rx: Set LNA bias current offset to +15 to saturate trim to max (default: 0) + (uint32_t)0x000F8883, + // override_frontend_id.xml + (uint32_t)0xFFFFFFFF, +}; + +/* + * Number of retry counts left to the currently transmitting frame. + * + * Initialized when a frame is passed to be sent over the air, and decremented + * by the radio ISR every time the transmit command string fails to receive a + * corresponding ack. + */ +static volatile unsigned int sTransmitRetryCount = 0; + +/* + * Offset of the radio timer from the rtc. + * + * Used when we start and stop the RAT on enabling and disabling of the rf + * core. + */ +static uint32_t sRatOffset = 0; + +/* + * Radio command structures that run on the CM0. + */ +// clang-format off +static volatile __attribute__((aligned(4))) rfc_CMD_SYNC_START_RAT_t sStartRatCmd; +static volatile __attribute__((aligned(4))) rfc_CMD_RADIO_SETUP_t sRadioSetupCmd; + +static volatile __attribute__((aligned(4))) rfc_CMD_FS_POWERDOWN_t sFsPowerdownCmd; +static volatile __attribute__((aligned(4))) rfc_CMD_SYNC_STOP_RAT_t sStopRatCmd; + +static volatile __attribute__((aligned(4))) rfc_CMD_CLEAR_RX_t sClearReceiveQueueCmd; +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_MOD_FILT_t sModifyReceiveFilterCmd; +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_MOD_SRC_MATCH_t sModifyReceiveSrcMatchCmd; + +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_ED_SCAN_t sEdScanCmd; + +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_RX_t sReceiveCmd; + +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_CSMA_t sCsmacaBackoffCmd; +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_TX_t sTransmitCmd; +static volatile __attribute__((aligned(4))) rfc_CMD_IEEE_RX_ACK_t sTransmitRxAckCmd; + +static volatile __attribute__((aligned(4))) ext_src_match_data_t sSrcMatchExtData; +static volatile __attribute__((aligned(4))) short_src_match_data_t sSrcMatchShortData; +// clang-format on + +/* + * Structure containing radio statistics. + */ +static __attribute__((aligned(4))) rfc_ieeeRxOutput_t sRfStats; + +/* + * Two receive buffers entries with room for 1 max IEEE802.15.4 frame in each + * + * These will be setup in a circular buffer configuration by /ref sRxDataQueue. + */ +#define RX_BUF_SIZE 144 +static __attribute__((aligned(4))) uint8_t sRxBuf0[RX_BUF_SIZE]; +static __attribute__((aligned(4))) uint8_t sRxBuf1[RX_BUF_SIZE]; +static __attribute__((aligned(4))) uint8_t sRxBuf2[RX_BUF_SIZE]; +static __attribute__((aligned(4))) uint8_t sRxBuf3[RX_BUF_SIZE]; + +/* + * The RX Data Queue used by @ref sReceiveCmd. + */ +static __attribute__((aligned(4))) dataQueue_t sRxDataQueue = {0}; + +/* + * OpenThread data primitives + */ +static otRadioFrame sTransmitFrame; +static otError sTransmitError; + +static __attribute__((aligned(4))) uint8_t sTransmitPsdu[OT_RADIO_FRAME_MAX_SIZE]; + +static volatile bool sTxCmdChainDone = false; + +/* + * Interrupt handlers forward declared for register functions. + */ +void RFCCPE0IntHandler(void); +void RFCCPE1IntHandler(void); + +/** + * Initialize the RX/TX buffers. + * + * Zeros out the receive and transmit buffers and sets up the data structures + * of the receive queue. + */ +static void rfCoreInitBufs(void) +{ + rfc_dataEntry_t *entry; + memset(sRxBuf0, 0x00, sizeof(sRxBuf0)); + memset(sRxBuf1, 0x00, sizeof(sRxBuf1)); + memset(sRxBuf2, 0x00, sizeof(sRxBuf2)); + memset(sRxBuf3, 0x00, sizeof(sRxBuf3)); + + entry = (rfc_dataEntry_t *)sRxBuf0; + entry->pNextEntry = sRxBuf1; + entry->config.lenSz = DATA_ENTRY_LENSZ_BYTE; + entry->length = sizeof(sRxBuf0) - sizeof(rfc_dataEntry_t); + + entry = (rfc_dataEntry_t *)sRxBuf1; + entry->pNextEntry = sRxBuf2; + entry->config.lenSz = DATA_ENTRY_LENSZ_BYTE; + entry->length = sizeof(sRxBuf1) - sizeof(rfc_dataEntry_t); + + entry = (rfc_dataEntry_t *)sRxBuf2; + entry->pNextEntry = sRxBuf3; + entry->config.lenSz = DATA_ENTRY_LENSZ_BYTE; + entry->length = sizeof(sRxBuf2) - sizeof(rfc_dataEntry_t); + + entry = (rfc_dataEntry_t *)sRxBuf3; + entry->pNextEntry = sRxBuf0; + entry->config.lenSz = DATA_ENTRY_LENSZ_BYTE; + entry->length = sizeof(sRxBuf3) - sizeof(rfc_dataEntry_t); + + sTransmitFrame.mPsdu = sTransmitPsdu; + sTransmitFrame.mLength = 0; +} + +/** + * Initialize the RX command structure. + * + * Sets the default values for the receive command structure. + */ +static void rfCoreInitReceiveParams(void) +{ + // clang-format off + static const rfc_CMD_IEEE_RX_t cReceiveCmd = + { + .commandNo = CMD_IEEE_RX, + .status = IDLE, + .pNextOp = NULL, + .startTime = 0u, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_NEVER, + }, + .channel = OT_RADIO_CHANNEL_MIN, + .rxConfig = + { + .bAutoFlushCrc = 1, + .bAutoFlushIgn = 0, + .bIncludePhyHdr = 0, + .bIncludeCrc = 0, + .bAppendRssi = 1, + .bAppendCorrCrc = 1, + .bAppendSrcInd = 0, + .bAppendTimestamp = 0, + }, + .frameFiltOpt = + { + .frameFiltEn = 1, + .frameFiltStop = 1, + .autoAckEn = 1, + .slottedAckEn = 0, + .autoPendEn = 0, + .defaultPend = 0, + .bPendDataReqOnly = 0, + .bPanCoord = 0, + .maxFrameVersion = 3, + .bStrictLenFilter = 1, + }, + .frameTypes = + { + .bAcceptFt0Beacon = 1, + .bAcceptFt1Data = 1, + .bAcceptFt2Ack = 1, + .bAcceptFt3MacCmd = 1, + .bAcceptFt4Reserved = 1, + .bAcceptFt5Reserved = 1, + .bAcceptFt6Reserved = 1, + .bAcceptFt7Reserved = 1, + }, + .ccaOpt = + { + .ccaEnEnergy = 1, + .ccaEnCorr = 1, + .ccaEnSync = 1, + .ccaCorrOp = 1, + .ccaSyncOp = 0, + .ccaCorrThr = 3, + }, + .ccaRssiThr = -90, + .endTrigger = + { + .triggerType = TRIG_NEVER, + }, + .endTime = 0u, + }; + // clang-format on + sReceiveCmd = cReceiveCmd; + + sReceiveCmd.pRxQ = &sRxDataQueue; + sReceiveCmd.pOutput = &sRfStats; + + sReceiveCmd.numShortEntries = CC1352_SHORTADD_SRC_MATCH_NUM; + sReceiveCmd.pShortEntryList = (void *)&sSrcMatchShortData; + + sReceiveCmd.numExtEntries = CC1352_EXTADD_SRC_MATCH_NUM; + sReceiveCmd.pExtEntryList = (uint32_t *)&sSrcMatchExtData; +} + +/** + * Sends the direct abort command to the radio core. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreExecuteAbortCmd(void) +{ + return (RFCDoorbellSendTo(CMDR_DIR_CMD(CMD_ABORT)) & 0xFF); +} + +/** + * Sends the direct ping command to the radio core. + * + * Check that the Radio core is alive and able to respond to commands. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreExecutePingCmd(void) +{ + return (RFCDoorbellSendTo(CMDR_DIR_CMD(CMD_PING)) & 0xFF); +} + +/** + * Sends the immediate clear rx queue command to the radio core. + * + * Uses the radio core to mark all of the entries in the receive queue as + * pending. This is used instead of clearing the entries manually to avoid race + * conditions between the main processor and the radio core. + * + * @param [in] aQueue A pointer to the receive queue to be cleared. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreClearReceiveQueue(dataQueue_t *aQueue) +{ + /* memset skipped because sClearReceiveQueueCmd has only 2 members and padding */ + sClearReceiveQueueCmd.commandNo = CMD_CLEAR_RX; + sClearReceiveQueueCmd.pQueue = aQueue; + + return (RFCDoorbellSendTo((uint32_t)&sClearReceiveQueueCmd) & 0xFF); +} + +/** + * Enable/disable frame filtering. + * + * Uses the radio core to alter the current running RX command filtering + * options. This ensures there is no access fault between the CM3 and CM0 for + * the RX command. + * + * This function leaves the type of frames to be filtered the same as the + * receive command. + * + * @note An IEEE RX command *must* be running while this command executes. + * + * @param [in] aEnable TRUE: enable frame filtering, + * FALSE: disable frame filtering. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreModifyRxFrameFilter(bool aEnable) +{ + /* memset skipped because sModifyReceiveFilterCmd has only 3 members */ + sModifyReceiveFilterCmd.commandNo = CMD_IEEE_MOD_FILT; + /* copy current frame filtering and frame types from running RX command */ + memcpy((void *)&sModifyReceiveFilterCmd.newFrameFiltOpt, (void *)&sReceiveCmd.frameFiltOpt, + sizeof(sModifyReceiveFilterCmd.newFrameFiltOpt)); + memcpy((void *)&sModifyReceiveFilterCmd.newFrameTypes, (void *)&sReceiveCmd.frameTypes, + sizeof(sModifyReceiveFilterCmd.newFrameTypes)); + + sModifyReceiveFilterCmd.newFrameFiltOpt.frameFiltEn = aEnable ? 1 : 0; + + return (RFCDoorbellSendTo((uint32_t)&sModifyReceiveFilterCmd) & 0xFF); +} + +/** + * Enable/disable autoPend feature. + * + * Uses the radio core to alter the current running RX command filtering + * options. This ensures there is no access fault between the CM3 and CM0 for + * the RX command. + * + * This function leaves the type of frames to be filtered the same as the + * receive command. + * + * @note An IEEE RX command *must* be running while this command executes. + * + * @param [in] aEnable TRUE: enable autoPend, + * FALSE: disable autoPend. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreModifyRxAutoPend(bool aEnable) +{ + /* memset skipped because sModifyReceiveFilterCmd has only 3 members */ + sModifyReceiveFilterCmd.commandNo = CMD_IEEE_MOD_FILT; + /* copy current frame filtering and frame types from running RX command */ + memcpy((void *)&sModifyReceiveFilterCmd.newFrameFiltOpt, (void *)&sReceiveCmd.frameFiltOpt, + sizeof(sModifyReceiveFilterCmd.newFrameFiltOpt)); + memcpy((void *)&sModifyReceiveFilterCmd.newFrameTypes, (void *)&sReceiveCmd.frameTypes, + sizeof(sModifyReceiveFilterCmd.newFrameTypes)); + + sModifyReceiveFilterCmd.newFrameFiltOpt.autoPendEn = aEnable ? 1 : 0; + + return (RFCDoorbellSendTo((uint32_t)&sModifyReceiveFilterCmd) & 0xFF); +} + +/** + * Sends the immediate modify source matching command to the radio core. + * + * Uses the radio core to alter the current source matching parameters used by + * the running RX command. This ensures there is no access fault between the + * CM3 and CM0, and ensures that the RX command has cohesive view of the data. + * The CM3 may make alterations to the source matching entries if the entry is + * marked as disabled. + * + * @note An IEEE RX command *must* be running while this command executes. + * + * @param [in] aEntryNo The index of the entry to alter. + * @param [in] aType TRUE: the entry is a short address, + * FALSE: the entry is an extended address. + * @param [in] aEnable Whether the given entry is to be enabled or disabled. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreModifySourceMatchEntry(uint8_t aEntryNo, cc1352_address_t aType, bool aEnable) +{ + /* memset kept to save 60 bytes of text space, gcc can't optimize the + * following bitfield operation if it doesn't know the fields are zero + * already. + */ + memset((void *)&sModifyReceiveSrcMatchCmd, 0, sizeof(sModifyReceiveSrcMatchCmd)); + + sModifyReceiveSrcMatchCmd.commandNo = CMD_IEEE_MOD_SRC_MATCH; + + /* we only use source matching for pending data bit, so enabling and + * pending are the same to us. + */ + if (aEnable) + { + sModifyReceiveSrcMatchCmd.options.bEnable = 1; + sModifyReceiveSrcMatchCmd.options.srcPend = 1; + } + else + { + sModifyReceiveSrcMatchCmd.options.bEnable = 0; + sModifyReceiveSrcMatchCmd.options.srcPend = 0; + } + + sModifyReceiveSrcMatchCmd.options.entryType = aType; + sModifyReceiveSrcMatchCmd.entryNo = aEntryNo; + + return (RFCDoorbellSendTo((uint32_t)&sModifyReceiveSrcMatchCmd) & 0xFF); +} + +/** + * Walks the short address source match list to find an address. + * + * @param [in] aAddress The short address to search for. + * + * @return The index where the address was found. + * @retval CC1352_SRC_MATCH_NONE The address was not found. + */ +static uint8_t rfCoreFindShortSrcMatchIdx(const uint16_t aAddress) +{ + uint8_t i; + uint8_t ret = CC1352_SRC_MATCH_NONE; + + for (i = 0; i < CC1352_SHORTADD_SRC_MATCH_NUM; i++) + { + if (sSrcMatchShortData.extAddrEnt[i].shortAddr == aAddress) + { + ret = i; + break; + } + } + + return ret; +} + +/** + * Walks the short address source match list to find an empty slot. + * + * @return The index of an unused address slot. + * @retval CC1352_SRC_MATCH_NONE No unused slots available. + */ +static uint8_t rfCoreFindEmptyShortSrcMatchIdx(void) +{ + uint8_t i; + uint8_t ret = CC1352_SRC_MATCH_NONE; + + for (i = 0; i < CC1352_SHORTADD_SRC_MATCH_NUM; i++) + { + if ((sSrcMatchShortData.srcMatchEn[i / 32] & (1 << (i % 32))) == 0u) + { + ret = i; + break; + } + } + + return ret; +} + +/** + * Walks the extended address source match list to find an address. + * + * @param [in] aAddress The extended address to search for. + * + * @return The index where the address was found. + * @retval CC1352_SRC_MATCH_NONE The address was not found. + */ +static uint8_t rfCoreFindExtSrcMatchIdx(const uint64_t *aAddress) +{ + uint8_t i; + uint8_t ret = CC1352_SRC_MATCH_NONE; + + for (i = 0; i < CC1352_EXTADD_SRC_MATCH_NUM; i++) + { + if (sSrcMatchExtData.extAddrEnt[i] == *aAddress) + { + ret = i; + break; + } + } + + return ret; +} + +/** + * Walks the extended address source match list to find an empty slot. + * + * @return The index of an unused address slot. + * @retval CC1352_SRC_MATCH_NONE No unused slots available. + */ +static uint8_t rfCoreFindEmptyExtSrcMatchIdx(void) +{ + uint8_t i; + uint8_t ret = CC1352_SRC_MATCH_NONE; + + for (i = 0; i < CC1352_EXTADD_SRC_MATCH_NUM; i++) + { + if ((sSrcMatchExtData.srcMatchEn[i / 32] & (1 << (i % 32))) != 0u) + { + ret = i; + break; + } + } + + return ret; +} + +/** + * Sends the tx command to the radio core. + * + * Sends the packet to the radio core to be sent asynchronously. + * + * @note @ref aPsdu *must* be 4 byte aligned and not include the FCS. + * + * @param [in] aPsdu A pointer to the data to be sent. + * @param [in] aLen The length in bytes of data pointed to by PSDU. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreSendTransmitCmd(uint8_t *aPsdu, uint8_t aLen) +{ + // clang-format off + static const rfc_CMD_IEEE_CSMA_t cCsmacaBackoffCmd = + { + .commandNo = CMD_IEEE_CSMA, + .status = IDLE, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_ALWAYS, + }, + .macMaxBE = IEEE802154_MAC_MAX_BE, + .macMaxCSMABackoffs = IEEE802154_MAC_MAX_CSMA_BACKOFFS, + .csmaConfig = + { + .initCW = 1, + .bSlotted = 0, + .rxOffMode = 0, + }, + .NB = 0, + .BE = IEEE802154_MAC_MIN_BE, + .remainingPeriods = 0, + .endTrigger = + { + .triggerType = TRIG_NEVER, + }, + .endTime = 0x00000000, + }; + static const rfc_CMD_IEEE_TX_t cTransmitCmd = + { + .commandNo = CMD_IEEE_TX, + .status = IDLE, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_NEVER, + }, + .pNextOp = NULL, + }; + static const rfc_CMD_IEEE_RX_ACK_t cTransmitRxAckCmd = + { + .commandNo = CMD_IEEE_RX_ACK, + .status = IDLE, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .endTrigger = + { + .triggerType = TRIG_REL_START, + .pastTrig = 1, + }, + .condition = { + .rule = COND_NEVER, + }, + .pNextOp = NULL, + /* number of RAT ticks to wait before claiming we haven't received an ack */ + .endTime = ((IEEE802154_MAC_ACK_WAIT_DURATION * CC1352_RAT_TICKS_PER_SEC) / IEEE802154_SYMBOLS_PER_SEC), + }; + // clang-format on + + /* reset retry count */ + sTransmitRetryCount = 0; + + sCsmacaBackoffCmd = cCsmacaBackoffCmd; + /* initialize the random state with a true random seed for the radio core's + * psudo rng */ + sCsmacaBackoffCmd.randomState = otPlatRandomGet(); + sCsmacaBackoffCmd.pNextOp = (rfc_radioOp_t *)&sTransmitCmd; + + sTransmitCmd = cTransmitCmd; + /* no need to look for an ack if the tx operation was stopped */ + sTransmitCmd.payloadLen = aLen; + sTransmitCmd.pPayload = aPsdu; + + if (aPsdu[0] & IEEE802154_ACK_REQUEST) + { + /* setup the receive ack command to follow the tx command */ + sTransmitCmd.condition.rule = COND_STOP_ON_FALSE; + sTransmitCmd.pNextOp = (rfc_radioOp_t *)&sTransmitRxAckCmd; + + sTransmitRxAckCmd = cTransmitRxAckCmd; + sTransmitRxAckCmd.seqNo = aPsdu[IEEE802154_DSN_OFFSET]; + } + + return (RFCDoorbellSendTo((uint32_t)&sCsmacaBackoffCmd) & 0xFF); +} + +/** + * Sends the rx command to the radio core. + * + * Sends the pre-built receive command to the radio core. This sets up the + * radio to receive packets according to the settings in the global rx command. + * + * @note This function does not alter any of the parameters of the rx command. + * It is only concerned with sending the command to the radio core. See @ref + * otPlatRadioSetPanId for an example of how the rx settings are set changed. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command completed correctly. + */ +static uint_fast8_t rfCoreSendReceiveCmd(void) +{ + sReceiveCmd.status = IDLE; + return (RFCDoorbellSendTo((uint32_t)&sReceiveCmd) & 0xFF); +} + +static uint_fast8_t rfCoreSendEdScanCmd(uint8_t aChannel, uint16_t aDurration) +{ + // clang-format off + static const rfc_CMD_IEEE_ED_SCAN_t cEdScanCmd = + { + .commandNo = CMD_IEEE_ED_SCAN, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_NEVER, + }, + .ccaOpt = + { + .ccaEnEnergy = 1, + .ccaEnCorr = 1, + .ccaEnSync = 1, + .ccaCorrOp = 1, + .ccaSyncOp = 0, + .ccaCorrThr = 3, + }, + .ccaRssiThr = -90, + .endTrigger = + { + .triggerType = TRIG_REL_START, + .pastTrig = 1, + }, + }; + // clang-format on + sEdScanCmd = cEdScanCmd; + + sEdScanCmd.channel = aChannel; + + /* durration is in ms */ + sEdScanCmd.endTime = aDurration * (CC1352_RAT_TICKS_PER_SEC / 1000); + + return (RFCDoorbellSendTo((uint32_t)&sEdScanCmd) & 0xFF); +} + +/** + * Enables the cpe0 and cpe1 radio interrupts. + * + * Enables the @ref IRQ_LAST_COMMAND_DONE and @ref IRQ_LAST_FG_COMMAND_DONE to + * be handled by the @ref RFCCPE0IntHandler interrupt handler. + */ +static void rfCoreSetupInt(void) +{ + bool interruptsWereDisabled; + + otEXPECT(PRCMRfReady()); + + interruptsWereDisabled = IntMasterDisable(); + + /* Set all interrupt channels to CPE0 channel, error to CPE1 */ + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEISL) = IRQ_INTERNAL_ERROR; + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = IRQ_LAST_COMMAND_DONE | IRQ_LAST_FG_COMMAND_DONE; + + IntRegister(INT_RFC_CPE_0, RFCCPE0IntHandler); + IntRegister(INT_RFC_CPE_1, RFCCPE1IntHandler); + IntPendClear(INT_RFC_CPE_0); + IntPendClear(INT_RFC_CPE_1); + IntEnable(INT_RFC_CPE_0); + IntEnable(INT_RFC_CPE_1); + + if (!interruptsWereDisabled) + { + IntMasterEnable(); + } + +exit: + return; +} + +/** + * Disables and clears the cpe0 and cpe1 radio interrupts. + */ +static void rfCoreStopInt(void) +{ + bool interruptsWereDisabled; + + interruptsWereDisabled = IntMasterDisable(); + + /* clear and disable interrupts */ + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0; + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIEN) = 0x0; + + IntUnregister(INT_RFC_CPE_0); + IntUnregister(INT_RFC_CPE_1); + IntPendClear(INT_RFC_CPE_0); + IntPendClear(INT_RFC_CPE_1); + IntDisable(INT_RFC_CPE_0); + IntDisable(INT_RFC_CPE_1); + + if (!interruptsWereDisabled) + { + IntMasterEnable(); + } +} + +/** + * Turns on the radio core. + * + * Sets up the power and resources for the radio core. + * - switches the high frequency clock to the xosc crystal + * - sets the mode for the radio core to IEEE 802.15.4 + * - initializes the rx buffers and command + * - powers on the radio core power domain + * - enables the radio core power domain + * - sets up the interrupts + * - sends the ping command to the radio core to make sure it is running + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command was received. + */ +static uint_fast8_t rfCorePowerOn(void) +{ + bool interruptsWereDisabled; + bool oscSourceSwitch = false; + + /* Request the HF XOSC as the source for the HF clock. Needed before we can + * use the FS. This will only request, it will _not_ perform the switch. + */ + if (OSCClockSourceGet(OSC_SRC_CLK_HF) != OSC_XOSC_HF) + { + /* Request to switch to the crystal to enable radio operation. It takes a + * while for the XTAL to be ready so instead of performing the actual + * switch, we do other stuff while the XOSC is getting ready. + */ + OSCClockSourceSet(OSC_SRC_CLK_HF, OSC_XOSC_HF); + oscSourceSwitch = true; + } + + /* Set of RF Core data queue. Circular buffer, no last entry */ + sRxDataQueue.pCurrEntry = sRxBuf0; + sRxDataQueue.pLastEntry = NULL; + + rfCoreInitBufs(); + + /* + * Trigger a switch to the XOSC, so that we can subsequently use the RF FS + * This will block until the XOSC is actually ready, but give how we + * requested it early on, this won't be too long a wait. + * This should be done before starting the RAT. + */ + if (oscSourceSwitch) + { + /* Block until the high frequency clock source is ready */ + while (!OSCHfSourceReady()) + ; + + /* Switch the HF clock source (cc26xxware executes this from ROM) */ + OSCHfSourceSwitch(); + } + + interruptsWereDisabled = IntMasterDisable(); + + /* Enable RF Core power domain */ + PRCMPowerDomainOn(PRCM_DOMAIN_RFCORE); + + while (PRCMPowerDomainStatus(PRCM_DOMAIN_RFCORE) != PRCM_DOMAIN_POWER_ON) + ; + + PRCMDomainEnable(PRCM_DOMAIN_RFCORE); + PRCMLoadSet(); + + while (!PRCMLoadGet()) + ; + + rfCoreSetupInt(); + + if (!interruptsWereDisabled) + { + IntMasterEnable(); + } + + /* Let CPE boot */ + HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = + (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M | RFC_PWR_PWMCLKEN_CPERAM_M); + + /* Send ping (to verify RFCore is ready and alive) */ + return rfCoreExecutePingCmd(); +} + +/** + * Turns off the radio core. + * + * Switches off the power and resources for the radio core. + * - disables the interrupts + * - disables the radio core power domain + * - powers off the radio core power domain + * - switches the high frequency clock to the rcosc to save power + */ +static void rfCorePowerOff(void) +{ + rfCoreStopInt(); + + PRCMDomainDisable(PRCM_DOMAIN_RFCORE); + PRCMLoadSet(); + + while (!PRCMLoadGet()) + ; + + PRCMPowerDomainOff(PRCM_DOMAIN_RFCORE); + + while (PRCMPowerDomainStatus(PRCM_DOMAIN_RFCORE) != PRCM_DOMAIN_POWER_OFF) + ; + + if (OSCClockSourceGet(OSC_SRC_CLK_HF) != OSC_RCOSC_HF) + { + /* Request to switch to the RC osc for low power mode. */ + OSCClockSourceSet(OSC_SRC_CLK_HF, OSC_RCOSC_HF); + /* Switch the HF clock source (cc26xxware executes this from ROM) */ + OSCHfSourceSwitch(); + } +} + +/** + * Sends the setup command string to the radio core. + * + * Enables the clock line from the RTC to the RF core RAT. Enables the RAT + * timer and sets up the radio in IEEE mode. + * + * @return The value from the command status register. + * @retval CMDSTA_Done The command was received. + */ +static uint_fast16_t rfCoreSendEnableCmd(void) +{ + uint8_t doorbellRet; + bool interruptsWereDisabled; + uint_fast16_t ret; + + // clang-format off + static const rfc_CMD_SYNC_START_RAT_t cStartRatCmd = + { + .commandNo = CMD_SYNC_START_RAT, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_STOP_ON_FALSE, + }, + }; + static const rfc_CMD_RADIO_SETUP_t cRadioSetupCmd = + { + .commandNo = CMD_RADIO_SETUP, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_NEVER, + }, + .mode = 1, // IEEE 802.15.4 mode + }; + // clang-format on + /* turn on the clock line to the radio core */ + HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RTC_UPD_EN_BITN) = 1; + + /* initialize the rat start command */ + sStartRatCmd = cStartRatCmd; + sStartRatCmd.pNextOp = (rfc_radioOp_t *)&sRadioSetupCmd; + sStartRatCmd.rat0 = sRatOffset; + + /* initialize radio setup command */ + sRadioSetupCmd = cRadioSetupCmd; + /* initally set the radio tx power to the max */ + sRadioSetupCmd.txPower = sCurrentOutputPower->value; + sRadioSetupCmd.pRegOverride = sIEEEOverrides; + + interruptsWereDisabled = IntMasterDisable(); + + doorbellRet = (RFCDoorbellSendTo((uint32_t)&sStartRatCmd) & 0xFF); + otEXPECT_ACTION(CMDSTA_Done == doorbellRet, ret = doorbellRet); + + /* synchronously wait for the CM0 to stop executing */ + while ((HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & IRQ_LAST_COMMAND_DONE) == 0x00) + ; + + ret = sRadioSetupCmd.status; + +exit: + + if (!interruptsWereDisabled) + { + IntMasterEnable(); + } + + return ret; +} + +/** + * Sends the shutdown command string to the radio core. + * + * Powers down the frequency synthesizer and stops the RAT. + * + * @note synchronously waits until the command string completes. + * + * @return The status of the RAT stop command. + * @retval DONE_OK The command string executed properly. + */ +static uint_fast16_t rfCoreSendDisableCmd(void) +{ + uint8_t doorbellRet; + bool interruptsWereDisabled; + uint_fast16_t ret; + + // clang-format off + static const rfc_CMD_FS_POWERDOWN_t cFsPowerdownCmd = + { + .commandNo = CMD_FS_POWERDOWN, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_ALWAYS, + }, + }; + static const rfc_CMD_SYNC_STOP_RAT_t cStopRatCmd = + { + .commandNo = CMD_SYNC_STOP_RAT, + .startTrigger = + { + .triggerType = TRIG_NOW, + }, + .condition = { + .rule = COND_NEVER, + }, + }; + // clang-format on + + HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RTC_UPD_EN_BITN) = 1; + + /* initialize the command to power down the frequency synth */ + sFsPowerdownCmd = cFsPowerdownCmd; + sFsPowerdownCmd.pNextOp = (rfc_radioOp_t *)&sStopRatCmd; + + sStopRatCmd = cStopRatCmd; + + interruptsWereDisabled = IntMasterDisable(); + + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = ~IRQ_LAST_COMMAND_DONE; + + doorbellRet = (RFCDoorbellSendTo((uint32_t)&sFsPowerdownCmd) & 0xFF); + otEXPECT_ACTION(CMDSTA_Done == doorbellRet, ret = doorbellRet); + + /* synchronously wait for the CM0 to stop */ + while ((HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & IRQ_LAST_COMMAND_DONE) == 0x00) + ; + + ret = sStopRatCmd.status; + + if (sStopRatCmd.status == DONE_OK) + { + sRatOffset = sStopRatCmd.rat0; + } + +exit: + + if (!interruptsWereDisabled) + { + IntMasterEnable(); + } + + return ret; +} + +/** + * Error interrupt handler. + */ +void RFCCPE1IntHandler(void) +{ + /* Clear INTERNAL_ERROR interrupt flag */ + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = 0x7FFFFFFF; +} + +/** + * Command done handler. + */ +void RFCCPE0IntHandler(void) +{ + if (HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & IRQ_LAST_COMMAND_DONE) + { + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = ~IRQ_LAST_COMMAND_DONE; + + if (sState == cc1352_stateReceive && sReceiveCmd.status != ACTIVE && sReceiveCmd.status != IEEE_SUSPENDED) + { + /* the rx command was probably aborted to change the channel */ + sState = cc1352_stateSleep; + } + else if (sState == cc1352_stateEdScan) + { + sState = cc1352_stateSleep; + } + } + + if (HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) & IRQ_LAST_FG_COMMAND_DONE) + { + HWREG(RFC_DBELL_NONBUF_BASE + RFC_DBELL_O_RFCPEIFG) = ~IRQ_LAST_FG_COMMAND_DONE; + + if (sState == cc1352_stateTransmit) + { + if (sTransmitCmd.pPayload[0] & IEEE802154_ACK_REQUEST) + { + /* we are looking for an ack */ + switch (sTransmitRxAckCmd.status) + { + case IEEE_DONE_TIMEOUT: + if (sTransmitRetryCount < IEEE802154_MAC_MAX_FRAMES_RETRIES) + { + /* re-submit the tx command chain */ + sTransmitRetryCount++; + RFCDoorbellSendTo((uint32_t)&sCsmacaBackoffCmd); + } + else + { + sTransmitError = OT_ERROR_NO_ACK; + /* signal polling function we are done transmitting, we failed to send the packet */ + sTxCmdChainDone = true; + } + + break; + + case IEEE_DONE_ACK: + sTransmitError = OT_ERROR_NONE; + /* signal polling function we are done transmitting */ + sTxCmdChainDone = true; + break; + + case IEEE_DONE_ACKPEND: + sTransmitError = OT_ERROR_NONE; + /* signal polling function we are done transmitting */ + sTxCmdChainDone = true; + break; + + default: + sTransmitError = OT_ERROR_FAILED; + /* signal polling function we are done transmitting */ + sTxCmdChainDone = true; + break; + } + } + else + { + /* The TX command was either stopped or we are not looking for + * an ack */ + switch (sTransmitCmd.status) + { + case IEEE_DONE_OK: + sTransmitError = OT_ERROR_NONE; + break; + + case IEEE_DONE_TIMEOUT: + sTransmitError = OT_ERROR_CHANNEL_ACCESS_FAILURE; + break; + + case IEEE_ERROR_NO_SETUP: + case IEEE_ERROR_NO_FS: + case IEEE_ERROR_SYNTH_PROG: + sTransmitError = OT_ERROR_INVALID_STATE; + break; + + case IEEE_ERROR_TXUNF: + sTransmitError = OT_ERROR_NO_BUFS; + break; + + default: + sTransmitError = OT_ERROR_FAILED; + break; + } + + /* signal polling function we are done transmitting */ + sTxCmdChainDone = true; + } + } + } +} + +/** + * Function documented in platform-cc1352.h + */ +void cc1352RadioInit(void) +{ + /* Populate the RX parameters data structure with default values */ + rfCoreInitReceiveParams(); + + sState = cc1352_stateDisabled; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioEnable(otInstance *aInstance) +{ + otError error = OT_ERROR_BUSY; + (void)aInstance; + + if (sState == cc1352_stateSleep) + { + error = OT_ERROR_NONE; + } + else if (sState == cc1352_stateDisabled) + { + otEXPECT_ACTION(rfCorePowerOn() == CMDSTA_Done, error = OT_ERROR_FAILED); + otEXPECT_ACTION(rfCoreSendEnableCmd() == DONE_OK, error = OT_ERROR_FAILED); + + /* The CC1352R1_LAUNCHXL development board has an RF switch to enable + * usage of the same antenna between the 2.4G and sub-1G RF paths. This + * is connected to IOID 30 on the LaunchPad, and a low voltage will set + * the switch to the 2.4G path. + */ + + /* Enable the peripheral domain for the GPIO module */ + PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH); + /* Enable the GPIO module in all power modes, this will not be turned off */ + PRCMPeripheralRunEnable(PRCM_PERIPH_GPIO); + PRCMPeripheralSleepEnable(PRCM_PERIPH_GPIO); + PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_GPIO); + /* Ensure the PRCM module is synced with these settings */ + PRCMLoadSet(); + /* Enable output on RF switch */ + IOCPinTypeGpioOutput(IOID_30); + /* Set the RF Switch to the 2.4 GHz path */ + GPIO_writeDio(IOID_30, 0); + + sState = cc1352_stateSleep; + } + +exit: + + if (error == OT_ERROR_FAILED) + { + rfCorePowerOff(); + sState = cc1352_stateDisabled; + } + + return error; +} + +/** + * Function documented in platform/radio.h + */ +bool otPlatRadioIsEnabled(otInstance *aInstance) +{ + (void)aInstance; + return (sState != cc1352_stateDisabled); +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioDisable(otInstance *aInstance) +{ + otError error = OT_ERROR_BUSY; + (void)aInstance; + + if (sState == cc1352_stateDisabled) + { + error = OT_ERROR_NONE; + } + else if (sState == cc1352_stateSleep) + { + rfCoreSendDisableCmd(); + /* we don't want to fail if this command string doesn't work, just turn + * off the whole core + */ + rfCorePowerOff(); + sState = cc1352_stateDisabled; + error = OT_ERROR_NONE; + } + + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration) +{ + otError error = OT_ERROR_BUSY; + (void)aInstance; + + if (sState == cc1352_stateSleep) + { + sState = cc1352_stateEdScan; + otEXPECT_ACTION(rfCoreSendEdScanCmd(aScanChannel, aScanDuration) == CMDSTA_Done, error = OT_ERROR_FAILED); + error = OT_ERROR_NONE; + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioGetTransmitPower(otInstance *aInstance, int8_t *aPower) +{ + otError error = OT_ERROR_NONE; + (void)aInstance; + + otEXPECT_ACTION(aPower != NULL, error = OT_ERROR_INVALID_ARGS); + *aPower = sCurrentOutputPower->dbm; + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioSetTransmitPower(otInstance *aInstance, int8_t aPower) +{ + unsigned int i; + output_config_t const *powerCfg = &(rgOutputPower[0]); + (void)aInstance; + + for (i = 1; i < OUTPUT_CONFIG_COUNT; i++) + { + if (rgOutputPower[i].dbm >= aPower) + { + powerCfg = &(rgOutputPower[i]); + } + else + { + break; + } + } + + sCurrentOutputPower = powerCfg; + + return OT_ERROR_NONE; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel) +{ + otError error = OT_ERROR_BUSY; + (void)aInstance; + + if (sState == cc1352_stateSleep) + { + sState = cc1352_stateReceive; + + /* + * initialize the receive command + * XXX: no memset here because we assume init has been called and we + * may have changed some values in the rx command + */ + sReceiveCmd.channel = aChannel; + otEXPECT_ACTION(rfCoreSendReceiveCmd() == CMDSTA_Done, error = OT_ERROR_FAILED); + error = OT_ERROR_NONE; + } + else if (sState == cc1352_stateReceive) + { + if (sReceiveCmd.status == ACTIVE && sReceiveCmd.channel == aChannel) + { + /* we are already running on the right channel */ + sState = cc1352_stateReceive; + error = OT_ERROR_NONE; + } + else + { + /* + * we have either not fallen back into our receive command or + * we are running on the wrong channel. Either way assume the + * caller correctly called us and abort all running commands. + */ + otEXPECT_ACTION(rfCoreExecuteAbortCmd() == CMDSTA_Done, error = OT_ERROR_FAILED); + + /* any frames in the queue will be for the old channel */ + otEXPECT_ACTION(rfCoreClearReceiveQueue(&sRxDataQueue) == CMDSTA_Done, error = OT_ERROR_FAILED); + + sReceiveCmd.channel = aChannel; + otEXPECT_ACTION(rfCoreSendReceiveCmd() == CMDSTA_Done, error = OT_ERROR_FAILED); + + sState = cc1352_stateReceive; + error = OT_ERROR_NONE; + } + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioSleep(otInstance *aInstance) +{ + otError error = OT_ERROR_BUSY; + (void)aInstance; + + if (sState == cc1352_stateSleep) + { + error = OT_ERROR_NONE; + } + else if (sState == cc1352_stateReceive) + { + if (rfCoreExecuteAbortCmd() != CMDSTA_Done) + { + error = OT_ERROR_BUSY; + } + else + { + sState = cc1352_stateSleep; + } + } + + return error; +} + +/** + * Function documented in platform/radio.h + */ +otRadioFrame *otPlatRadioGetTransmitBuffer(otInstance *aInstance) +{ + (void)aInstance; + return &sTransmitFrame; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame) +{ + otError error = OT_ERROR_BUSY; + + if (sState == cc1352_stateReceive) + { + sState = cc1352_stateTransmit; + + /* removing 2 bytes of CRC placeholder because we generate that in hardware */ + otEXPECT_ACTION(rfCoreSendTransmitCmd(aFrame->mPsdu, aFrame->mLength - 2) == CMDSTA_Done, + error = OT_ERROR_FAILED); + error = OT_ERROR_NONE; + sTransmitError = OT_ERROR_NONE; + sTxCmdChainDone = false; + otPlatRadioTxStarted(aInstance, aFrame); + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +int8_t otPlatRadioGetRssi(otInstance *aInstance) +{ + (void)aInstance; + return sRfStats.maxRssi; +} + +/** + * Function documented in platform/radio.h + */ +otRadioCaps otPlatRadioGetCaps(otInstance *aInstance) +{ + (void)aInstance; + return OT_RADIO_CAPS_ACK_TIMEOUT | OT_RADIO_CAPS_ENERGY_SCAN | OT_RADIO_CAPS_TRANSMIT_RETRIES; +} + +/** + * Function documented in platform/radio.h + */ +void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable) +{ + (void)aInstance; + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + /* we have a running or backgrounded rx command */ + rfCoreModifyRxAutoPend(aEnable); + } + else + { + /* if we are promiscuous, then frame filtering should be disabled */ + sReceiveCmd.frameFiltOpt.autoPendEn = aEnable ? 1 : 0; + } +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress) +{ + otError error = OT_ERROR_NONE; + (void)aInstance; + uint8_t idx = rfCoreFindShortSrcMatchIdx(aShortAddress); + + if (idx == CC1352_SRC_MATCH_NONE) + { + /* the entry does not exist already, add it */ + otEXPECT_ACTION((idx = rfCoreFindEmptyShortSrcMatchIdx()) != CC1352_SRC_MATCH_NONE, error = OT_ERROR_NO_BUFS); + sSrcMatchShortData.extAddrEnt[idx].shortAddr = aShortAddress; + sSrcMatchShortData.extAddrEnt[idx].panId = sReceiveCmd.localPanID; + } + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + /* we have a running or backgrounded rx command */ + otEXPECT_ACTION(rfCoreModifySourceMatchEntry(idx, SHORT_ADDRESS, true) == CMDSTA_Done, error = OT_ERROR_FAILED); + } + else + { + /* we are not running, so we must update the values ourselves */ + sSrcMatchShortData.srcPendEn[idx / 32] |= (1 << (idx % 32)); + sSrcMatchShortData.srcMatchEn[idx / 32] |= (1 << (idx % 32)); + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress) +{ + otError error = OT_ERROR_NONE; + (void)aInstance; + uint8_t idx; + otEXPECT_ACTION((idx = rfCoreFindShortSrcMatchIdx(aShortAddress)) != CC1352_SRC_MATCH_NONE, + error = OT_ERROR_NO_ADDRESS); + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + /* we have a running or backgrounded rx command */ + otEXPECT_ACTION(rfCoreModifySourceMatchEntry(idx, SHORT_ADDRESS, false) == CMDSTA_Done, + error = OT_ERROR_FAILED); + } + else + { + /* we are not running, so we must update the values ourselves */ + sSrcMatchShortData.srcPendEn[idx / 32] &= ~(1 << (idx % 32)); + sSrcMatchShortData.srcMatchEn[idx / 32] &= ~(1 << (idx % 32)); + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioAddSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress) +{ + otError error = OT_ERROR_NONE; + (void)aInstance; + uint8_t idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress); + + if (idx == CC1352_SRC_MATCH_NONE) + { + /* the entry does not exist already, add it */ + otEXPECT_ACTION((idx = rfCoreFindEmptyExtSrcMatchIdx()) != CC1352_SRC_MATCH_NONE, error = OT_ERROR_NO_BUFS); + sSrcMatchExtData.extAddrEnt[idx] = *((uint64_t *)aExtAddress); + } + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + /* we have a running or backgrounded rx command */ + otEXPECT_ACTION(rfCoreModifySourceMatchEntry(idx, EXT_ADDRESS, true) == CMDSTA_Done, error = OT_ERROR_FAILED); + } + else + { + /* we are not running, so we must update the values ourselves */ + sSrcMatchExtData.srcPendEn[idx / 32] |= (1 << (idx % 32)); + sSrcMatchExtData.srcMatchEn[idx / 32] |= (1 << (idx % 32)); + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +otError otPlatRadioClearSrcMatchExtEntry(otInstance *aInstance, const otExtAddress *aExtAddress) +{ + otError error = OT_ERROR_NONE; + (void)aInstance; + uint8_t idx; + otEXPECT_ACTION((idx = rfCoreFindExtSrcMatchIdx((uint64_t *)aExtAddress)) != CC1352_SRC_MATCH_NONE, + error = OT_ERROR_NO_ADDRESS); + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + /* we have a running or backgrounded rx command */ + otEXPECT_ACTION(rfCoreModifySourceMatchEntry(idx, EXT_ADDRESS, false) == CMDSTA_Done, error = OT_ERROR_FAILED); + } + else + { + /* we are not running, so we must update the values ourselves */ + sSrcMatchExtData.srcPendEn[idx] = 0u; + sSrcMatchExtData.srcMatchEn[idx] = 0u; + sSrcMatchExtData.srcPendEn[idx / 32] &= ~(1 << (idx % 32)); + sSrcMatchExtData.srcMatchEn[idx / 32] &= ~(1 << (idx % 32)); + } + +exit: + return error; +} + +/** + * Function documented in platform/radio.h + */ +void otPlatRadioClearSrcMatchShortEntries(otInstance *aInstance) +{ + (void)aInstance; + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + unsigned int i; + + for (i = 0; i < CC1352_SHORTADD_SRC_MATCH_NUM; i++) + { + /* we have a running or backgrounded rx command */ + otEXPECT(rfCoreModifySourceMatchEntry(i, SHORT_ADDRESS, false) == CMDSTA_Done); + } + } + else + { + /* we are not running, so we can erase them ourselves */ + memset((void *)&sSrcMatchShortData, 0, sizeof(sSrcMatchShortData)); + } + +exit: + return; +} + +/** + * Function documented in platform/radio.h + */ +void otPlatRadioClearSrcMatchExtEntries(otInstance *aInstance) +{ + (void)aInstance; + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + unsigned int i; + + for (i = 0; i < CC1352_EXTADD_SRC_MATCH_NUM; i++) + { + /* we have a running or backgrounded rx command */ + otEXPECT(rfCoreModifySourceMatchEntry(i, EXT_ADDRESS, false) == CMDSTA_Done); + } + } + else + { + /* we are not running, so we can erase them ourselves */ + memset((void *)&sSrcMatchExtData, 0, sizeof(sSrcMatchExtData)); + } + +exit: + return; +} + +/** + * Function documented in platform/radio.h + */ +bool otPlatRadioGetPromiscuous(otInstance *aInstance) +{ + (void)aInstance; + /* we are promiscuous if we are not filtering */ + return sReceiveCmd.frameFiltOpt.frameFiltEn == 0; +} + +/** + * Function documented in platform/radio.h + */ +void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable) +{ + (void)aInstance; + + if (sReceiveCmd.status == ACTIVE || sReceiveCmd.status == IEEE_SUSPENDED) + { + /* we have a running or backgrounded rx command */ + /* if we are promiscuous, then frame filtering should be disabled */ + rfCoreModifyRxFrameFilter(!aEnable); + /* XXX should we dump any queued messages ? */ + } + else + { + /* if we are promiscuous, then frame filtering should be disabled */ + sReceiveCmd.frameFiltOpt.frameFiltEn = aEnable ? 0 : 1; + } +} + +/** + * Function documented in platform/radio.h + */ +void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64) +{ + uint8_t * eui64; + unsigned int i; + (void)aInstance; + + /* + * The IEEE MAC address can be stored two places. We check the Customer + * Configuration was not set before defaulting to the Factory + * Configuration. + */ + eui64 = (uint8_t *)(CCFG_BASE + CCFG_O_IEEE_MAC_0); + + for (i = 0; i < OT_EXT_ADDRESS_SIZE; i++) + { + if (eui64[i] != CC1352_UNKNOWN_EUI64) + { + break; + } + } + + if (i >= OT_EXT_ADDRESS_SIZE) + { + /* The ccfg address was all 0xFF, switch to the fcfg */ + eui64 = (uint8_t *)(FCFG1_BASE + FCFG1_O_MAC_15_4_0); + } + + /* + * The IEEE MAC address is stored in network byte order. The caller seems + * to want the address stored in little endian format, which is backwards + * of the conventions setup by @ref otPlatRadioSetExtendedAddress. + * otPlatRadioSetExtendedAddress assumes that the address being passed to + * it is in network byte order, so the caller of + * otPlatRadioSetExtendedAddress must swap the endianness before calling. + * + * It may be easier to have the caller of this function store the IEEE + * address in network byte order. + */ + for (i = 0; i < OT_EXT_ADDRESS_SIZE; i++) + { + aIeeeEui64[i] = eui64[(OT_EXT_ADDRESS_SIZE - 1) - i]; + } +} + +/** + * Function documented in platform/radio.h + * + * @note it is entirely possible for this function to fail, but there is no + * valid way to return that error since the function prototype was changed. + */ +void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanid) +{ + (void)aInstance; + + /* XXX: if the pan id is the broadcast pan id (0xFFFF) the auto ack will + * not work. This is due to the design of the CM0 and follows IEEE 802.15.4 + */ + if (sState == cc1352_stateReceive) + { + otEXPECT(rfCoreExecuteAbortCmd() == CMDSTA_Done); + sReceiveCmd.localPanID = aPanid; + otEXPECT(rfCoreClearReceiveQueue(&sRxDataQueue) == CMDSTA_Done); + otEXPECT(rfCoreSendReceiveCmd() == CMDSTA_Done); + /* the interrupt from abort changed our state to sleep */ + sState = cc1352_stateReceive; + } + else if (sState != cc1352_stateTransmit) + { + sReceiveCmd.localPanID = aPanid; + } + +exit: + return; +} + +/** + * Function documented in platform/radio.h + * + * @note it is entirely possible for this function to fail, but there is no + * valid way to return that error since the function prototype was changed. + */ +void otPlatRadioSetExtendedAddress(otInstance *aInstance, const otExtAddress *aAddress) +{ + (void)aInstance; + + /* XXX: assuming little endian format */ + if (sState == cc1352_stateReceive) + { + otEXPECT(rfCoreExecuteAbortCmd() == CMDSTA_Done); + sReceiveCmd.localExtAddr = *((uint64_t *)(aAddress)); + otEXPECT(rfCoreClearReceiveQueue(&sRxDataQueue) == CMDSTA_Done); + otEXPECT(rfCoreSendReceiveCmd() == CMDSTA_Done); + /* the interrupt from abort changed our state to sleep */ + sState = cc1352_stateReceive; + } + else if (sState != cc1352_stateTransmit) + { + sReceiveCmd.localExtAddr = *((uint64_t *)(aAddress)); + } + +exit: + return; +} + +/** + * Function documented in platform/radio.h + * + * @note it is entirely possible for this function to fail, but there is no + * valid way to return that error since the function prototype was changed. + */ +void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aAddress) +{ + (void)aInstance; + + if (sState == cc1352_stateReceive) + { + otEXPECT(rfCoreExecuteAbortCmd() == CMDSTA_Done); + sReceiveCmd.localShortAddr = aAddress; + otEXPECT(rfCoreClearReceiveQueue(&sRxDataQueue) == CMDSTA_Done); + otEXPECT(rfCoreSendReceiveCmd() == CMDSTA_Done); + /* the interrupt from abort changed our state to sleep */ + sState = cc1352_stateReceive; + } + else if (sState != cc1352_stateTransmit) + { + sReceiveCmd.localShortAddr = aAddress; + } + +exit: + return; +} + +static void cc1352RadioProcessTransmitDone(otInstance * aInstance, + otRadioFrame *aTransmitFrame, + otRadioFrame *aAckFrame, + otError aTransmitError) +{ +#if OPENTHREAD_ENABLE_DIAG + + if (otPlatDiagModeGet()) + { + otPlatDiagRadioTransmitDone(aInstance, aTransmitFrame, aTransmitError); + } + else +#endif /* OPENTHREAD_ENABLE_DIAG */ + { + otPlatRadioTxDone(aInstance, aTransmitFrame, aAckFrame, aTransmitError); + } +} + +static void cc1352RadioProcessReceiveDone(otInstance *aInstance, otRadioFrame *aReceiveFrame, otError aReceiveError) +{ +#if OPENTHREAD_ENABLE_DIAG + + if (otPlatDiagModeGet()) + { + otPlatDiagRadioReceiveDone(aInstance, aReceiveFrame, aReceiveError); + } + else +#endif /* OPENTHREAD_ENABLE_DIAG */ + { + otPlatRadioReceiveDone(aInstance, aReceiveFrame, aReceiveError); + } +} + +static void cc1352RadioProcessReceiveQueue(otInstance *aInstance) +{ + rfc_ieeeRxCorrCrc_t * crcCorr; + rfc_dataEntryGeneral_t *curEntry, *startEntry; + uint8_t rssi; + + startEntry = (rfc_dataEntryGeneral_t *)sRxDataQueue.pCurrEntry; + curEntry = startEntry; + + /* loop through receive queue */ + do + { + uint8_t *payload = &(curEntry->data); + + if (curEntry->status == DATA_ENTRY_FINISHED) + { + uint8_t len; + otError receiveError; + otRadioFrame receiveFrame; + + /* get the information appended to the end of the frame. + * This array access looks like it is a fencepost error, but the + * first byte is the number of bytes that follow. + */ + len = payload[0]; + crcCorr = (rfc_ieeeRxCorrCrc_t *)&payload[len]; + rssi = payload[len - 1]; + + if (crcCorr->status.bCrcErr == 0 && (len - 2) < OT_RADIO_FRAME_MAX_SIZE) + { +#if OPENTHREAD_ENABLE_RAW_LINK_API + // TODO: Propagate CM0 timestamp + receiveFrame.mInfo.mRxInfo.mMsec = otPlatAlarmMilliGetNow(); + receiveFrame.mInfo.mRxInfo.mUsec = 0; // Don't support microsecond timer for now. +#endif + + receiveFrame.mLength = len; + receiveFrame.mPsdu = &(payload[1]); + receiveFrame.mChannel = sReceiveCmd.channel; + receiveFrame.mInfo.mRxInfo.mRssi = rssi; + receiveFrame.mInfo.mRxInfo.mLqi = crcCorr->status.corr; + + receiveError = OT_ERROR_NONE; + } + else + { + receiveError = OT_ERROR_FCS; + } + + if ((receiveFrame.mPsdu[0] & IEEE802154_FRAME_TYPE_MASK) == IEEE802154_FRAME_TYPE_ACK) + { + if (receiveFrame.mPsdu[IEEE802154_DSN_OFFSET] == sTransmitFrame.mPsdu[IEEE802154_DSN_OFFSET]) + { + sState = cc1352_stateReceive; + cc1352RadioProcessTransmitDone(aInstance, &sTransmitFrame, &receiveFrame, receiveError); + } + } + else + { + cc1352RadioProcessReceiveDone(aInstance, &receiveFrame, receiveError); + } + + curEntry->status = DATA_ENTRY_PENDING; + break; + } + else if (curEntry->status == DATA_ENTRY_UNFINISHED) + { + curEntry->status = DATA_ENTRY_PENDING; + } + + curEntry = (rfc_dataEntryGeneral_t *)(curEntry->pNextEntry); + } while (curEntry != startEntry); +} + +/** + * Function documented in platform-cc1352.h + */ +void cc1352RadioProcess(otInstance *aInstance) +{ + if (sState == cc1352_stateEdScan) + { + if (sEdScanCmd.status == IEEE_DONE_OK) + { + otPlatRadioEnergyScanDone(aInstance, sEdScanCmd.maxRssi); + } + else if (sEdScanCmd.status == ACTIVE) + { + otPlatRadioEnergyScanDone(aInstance, CC1352_INVALID_RSSI); + } + } + + if (sState == cc1352_stateReceive || sState == cc1352_stateTransmit) + { + cc1352RadioProcessReceiveQueue(aInstance); + } + + if (sTxCmdChainDone) + { + if (sState == cc1352_stateTransmit) + { + /* we are not looking for an ACK packet, or failed */ + sState = cc1352_stateReceive; + cc1352RadioProcessTransmitDone(aInstance, &sTransmitFrame, NULL, sTransmitError); + } + + sTransmitError = OT_ERROR_NONE; + sTxCmdChainDone = false; + } +} + +int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance) +{ + (void)aInstance; + return CC1352_RECEIVE_SENSITIVITY; +} diff --git a/examples/platforms/cc1352/random.c b/examples/platforms/cc1352/random.c new file mode 100644 index 000000000..1e20a0449 --- /dev/null +++ b/examples/platforms/cc1352/random.c @@ -0,0 +1,139 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include + +#include +#include +#include + +#include +#include + +enum +{ + CC1352_TRNG_MIN_SAMPLES_PER_CYCLE = (1 << 6), + CC1352_TRNG_MAX_SAMPLES_PER_CYCLE = (1 << 24), + CC1352_TRNG_CLOCKS_PER_SAMPLE = 0, +}; + +/** + * \note if more than 32 bits of entropy are needed, the TRNG core produces + * 64 bits of random data, we just ignore the upper 32 bytes + */ + +/** + * Function documented in platform-cc1352.h + */ +void cc1352RandomInit(void) +{ + PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH); + + while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON) + ; + + PRCMPeripheralRunEnable(PRCM_PERIPH_TRNG); + PRCMPeripheralSleepEnable(PRCM_DOMAIN_PERIPH); + PRCMPeripheralDeepSleepEnable(PRCM_DOMAIN_PERIPH); + PRCMLoadSet(); + TRNGConfigure(CC1352_TRNG_MIN_SAMPLES_PER_CYCLE, CC1352_TRNG_MAX_SAMPLES_PER_CYCLE, CC1352_TRNG_CLOCKS_PER_SAMPLE); + TRNGEnable(); +} + +/** + * Function documented in platform/random.h + */ +uint32_t otPlatRandomGet(void) +{ + while (!(TRNGStatusGet() & TRNG_NUMBER_READY)) + ; + + return TRNGNumberGet(TRNG_LOW_WORD); +} + +/** + * Fill an arbitrary area with random data. + * + * @param [out] aOutput Area to place the random data. + * @param [in] aLen Size of the area to place random data. + * @param [out] oLen How much of the output was written to. + * + * @return Indication of error. + * @retval 0 No error occurred. + */ +static int TRNGPoll(unsigned char *aOutput, size_t aLen) +{ + size_t length = 0; + union + { + uint32_t u32[2]; + uint8_t u8[8]; + } buffer; + + while (length < aLen) + { + if (length % 8 == 0) + { + /* we've run to the end of the buffer */ + while (!(TRNGStatusGet() & TRNG_NUMBER_READY)) + ; + + /* + * don't use TRNGNumberGet here because it will tell the TRNG to + * refill the entropy pool, instead we do it ourself. + */ + buffer.u32[0] = HWREG(TRNG_BASE + TRNG_O_OUT0); + buffer.u32[1] = HWREG(TRNG_BASE + TRNG_O_OUT1); + HWREG(TRNG_BASE + TRNG_O_IRQFLAGCLR) = 0x1; + } + + aOutput[length] = buffer.u8[length % 8]; + + length++; + } + + return 0; +} + +/** + * Function documented in platform/random.h + */ +otError otPlatRandomGetTrue(uint8_t *aOutput, uint16_t aOutputLength) +{ + otError error = OT_ERROR_NONE; + size_t length = aOutputLength; + + otEXPECT_ACTION(aOutput, error = OT_ERROR_INVALID_ARGS); + + otEXPECT_ACTION(TRNGPoll((unsigned char *)aOutput, length) == 0, error = OT_ERROR_FAILED); + +exit: + return error; +} diff --git a/examples/platforms/cc1352/uart.c b/examples/platforms/cc1352/uart.c new file mode 100644 index 000000000..f7ec0845c --- /dev/null +++ b/examples/platforms/cc1352/uart.c @@ -0,0 +1,334 @@ +/* + * Copyright (c) 2018, The OpenThread Authors. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holder nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * This file implements the OpenThread platform abstraction for UART communication. + * + */ + +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "utils/code_utils.h" + +#include + +#include +#include +#include +#include + +/** + * @note This will configure the uart for 115200 baud 8-N-1, no HW flow control + * RX pin IOID_2 TX pin IOID_3. + * + * If the DEBUG UART is enabled, IOID_0 = debug tx, IOID_1 = debug rx + */ + +enum +{ + CC1352_RECV_CIRC_BUFF_SIZE = 256, +}; + +static uint8_t const *sSendBuffer = NULL; +static uint16_t sSendLen = 0; + +static uint8_t sReceiveBuffer[CC1352_RECV_CIRC_BUFF_SIZE]; +static uint16_t sReceiveHeadIdx = 0; +static uint16_t sReceiveTailIdx = 0; + +void UART0_intHandler(void); + +static void uart_power_control(uint32_t who_base, int turnon) +{ + uint32_t value; + + if (turnon) + { + /* UART0 is in the SERIAL domain + * UART1 is in the PERIPH domain. + * See: ti/devices/cc13x2_cc26x2/driverlib/pcrm.h, line: 658 + */ + value = (who_base == UART0_BASE) ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH; + PRCMPowerDomainOn(value); + + while (PRCMPowerDomainStatus(value) != PRCM_DOMAIN_POWER_ON) + ; + + value = (who_base == UART0_BASE) ? PRCM_PERIPH_UART0 : PRCM_PERIPH_UART1; + PRCMPeripheralRunEnable(value); + PRCMPeripheralSleepEnable(value); + PRCMPeripheralDeepSleepEnable(value); + PRCMLoadSet(); + + while (!PRCMLoadGet()) + ; + } + else + { + if (who_base == UART0_BASE) + { + PRCMPeripheralRunDisable(PRCM_PERIPH_UART0); + PRCMPeripheralSleepDisable(PRCM_PERIPH_UART0); + PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UART0); + PRCMLoadSet(); + PRCMPowerDomainOff(PRCM_DOMAIN_SERIAL); + } + else + { + /* we never turn the debug uart off */ + } + } +} + +/** + * Function documented in platform/uart.h + */ +otError otPlatUartEnable(void) +{ + uart_power_control(UART0_BASE, true); + + IOCPinTypeUart(UART0_BASE, IOID_12, IOID_13, IOID_UNUSED, IOID_UNUSED); + UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200, + UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); + + /* Note: UART1 could use IRQs + * However, for reasons of debug simplicity + * we do not use IRQs for the debug uart + */ + UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT); + UARTIntRegister(UART0_BASE, UART0_intHandler); + UARTEnable(UART0_BASE); + + return OT_ERROR_NONE; +} + +/** + * Function documented in platform/uart.h + */ +otError otPlatUartDisable(void) +{ + UARTDisable(UART0_BASE); + UARTIntUnregister(UART0_BASE); + UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT); + IOCPortConfigureSet(IOID_2, IOC_PORT_GPIO, IOC_STD_INPUT); + IOCPortConfigureSet(IOID_3, IOC_PORT_GPIO, IOC_STD_INPUT); + + uart_power_control(UART0_BASE, false); + + return OT_ERROR_NONE; +} + +/** + * Function documented in platform/uart.h + */ +otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength) +{ + otError error = OT_ERROR_NONE; + otEXPECT_ACTION(sSendBuffer == NULL, error = OT_ERROR_BUSY); + + sSendBuffer = aBuf; + sSendLen = aBufLength; + +exit: + return error; +} + +/** + * @brief process the receive side of the buffers + */ +static void processReceive(void) +{ + while (sReceiveHeadIdx != sReceiveTailIdx) + { + uint16_t tailIdx; + + if (sReceiveHeadIdx < sReceiveTailIdx) + { + tailIdx = sReceiveTailIdx; + otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx); + sReceiveHeadIdx = tailIdx; + } + else + { + tailIdx = CC1352_RECV_CIRC_BUFF_SIZE; + otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx); + sReceiveHeadIdx = 0; + } + } +} + +/** + * @brief process the transmit side of the buffers + */ +static void processTransmit(void) +{ + otEXPECT(sSendBuffer != NULL); + + for (; sSendLen > 0; sSendLen--) + { + UARTCharPut(UART0_BASE, *sSendBuffer); + sSendBuffer++; + } + + sSendBuffer = NULL; + sSendLen = 0; + otPlatUartSendDone(); + +exit: + return; +} + +/** + * Function documented in platform-cc1352.h + */ +void cc1352UartProcess(void) +{ + processReceive(); + processTransmit(); +} + +/** + * @brief the interrupt handler for the uart interrupt vector + */ +void UART0_intHandler(void) +{ + while (UARTCharsAvail(UART0_BASE)) + { + uint32_t c = UARTCharGet(UART0_BASE); + /* XXX process error flags for this character ?? */ + sReceiveBuffer[sReceiveTailIdx] = (uint8_t)c; + sReceiveTailIdx++; + + if (sReceiveTailIdx >= CC1352_RECV_CIRC_BUFF_SIZE) + { + sReceiveTailIdx = 0; + } + } +} + +#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART + +/* + * Documented in platform-cc1352.h + */ +void cc1352DebugUartInit(void) +{ + uart_power_control(UART1_BASE, true); + /* + * LaunchPad Pin29 = tx, Pin 30 = rxd + * + * The function IOCPinTypeUart() is hard coded to + * only support UART0 - and does not support UART1. + * + * Thus, these pins are configured using a different way. + */ + IOCPortConfigureSet(IOID_0, IOC_PORT_MCU_UART1_TX, IOC_STD_INPUT); + IOCPortConfigureSet(IOID_1, IOC_PORT_MCU_UART1_RX, IOC_STD_INPUT); + + UARTConfigSetExpClk(UART1_BASE, SysCtrlClockGet(), 115200, + UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); + UARTEnable(UART1_BASE); +} + +/* This holds the last key pressed */ +static int debug_uart_ungetbuf; + +/* + * Documented in "src/core/common/debug_uart.h" + */ +int otPlatDebugUart_getc(void) +{ + int ch = -1; + + if (otPlatDebugUart_kbhit()) + { + /* get & clear 0x100 bit used below as flag */ + ch = debug_uart_ungetbuf & 0x0ff; + debug_uart_ungetbuf = 0; + } + + return ch; +} + +/* + * Documented in "src/core/common/debug_uart.h" + */ +int otPlatDebugUart_kbhit(void) +{ + int r; + + /* if something is in the unget buf... */ + r = !!debug_uart_ungetbuf; + + if (!r) + { + /* + * Driverlib code returns "-1", or "char" on something + * but it comes with flags in upper bits + */ + r = (int)UARTCharGetNonBlocking(UART1_BASE); + + if (r < 0) + { + r = 0; /* no key pressed */ + } + else + { + /* key was pressed, mask flags + * and set 0x100 bit, to distinguish + * the value "0x00" from "no-key-pressed" + */ + debug_uart_ungetbuf = ((r & 0x0ff) | 0x0100); + + r = 1; /* key pressed */ + } + } + + return r; +} + +/* + * Documented in "src/core/common/debug_uart.h" + */ +void otPlatDebugUart_putchar_raw(int b) +{ + UARTCharPut(UART1_BASE, b); +} + +#endif /* OPENTHREAD_CONFIG_ENABLE_DEBUG_UART */ diff --git a/examples/platforms/cc2650/diag.c b/examples/platforms/cc2650/diag.c index 932bb8cc6..27b1714c8 100644 --- a/examples/platforms/cc2650/diag.c +++ b/examples/platforms/cc2650/diag.c @@ -26,14 +26,17 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#include -#include -#include #include + +#include +#include +#include + #include #if OPENTHREAD_ENABLE_DIAG +#include "platform-cc2650.h" /** * Diagnostics mode variables. * diff --git a/examples/platforms/cc2650/misc.c b/examples/platforms/cc2650/misc.c index 69f5f4a44..09676a133 100644 --- a/examples/platforms/cc2650/misc.c +++ b/examples/platforms/cc2650/misc.c @@ -55,7 +55,6 @@ otPlatResetReason otPlatGetResetReason(otInstance *aInstance) return OT_PLAT_RESET_REASON_EXTERNAL; case RSTSRC_VDDS_LOSS: - case RSTSRC_VDD_LOSS: case RSTSRC_VDDR_LOSS: case RSTSRC_CLK_LOSS: return OT_PLAT_RESET_REASON_CRASH; diff --git a/examples/platforms/cc2650/radio.c b/examples/platforms/cc2650/radio.c index 9deb61444..614158d2d 100644 --- a/examples/platforms/cc2650/radio.c +++ b/examples/platforms/cc2650/radio.c @@ -26,12 +26,15 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include + #include #include "cc2650_radio.h" #include #include #include +#include #include #include /* to seed the CSMA-CA funciton */ diff --git a/examples/platforms/cc2652/Makefile.am b/examples/platforms/cc2652/Makefile.am index b8ee60153..f63e99dc7 100644 --- a/examples/platforms/cc2652/Makefile.am +++ b/examples/platforms/cc2652/Makefile.am @@ -28,58 +28,58 @@ include $(abs_top_nlbuild_autotools_dir)/automake/pre.am -lib_LIBRARIES = libopenthread-cc2652.a +lib_LIBRARIES = libopenthread-cc2652.a # Do not enable -pedantic-errors for cc26xx driverlib -override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS)) -override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS)) +override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS)) +override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS)) -libopenthread_cc2652_a_CPPFLAGS = \ - -I$(top_srcdir)/include \ - -I$(top_srcdir)/src \ - -I$(top_srcdir)/src/core \ - -I$(top_srcdir)/examples/platforms \ - -I$(top_srcdir)/examples/platforms/cc2652 \ - -I$(top_srcdir)/third_party/ti/devices/cc26x2 \ - -I$(top_srcdir)/third_party/mbedtls/repo/include \ - $(MBEDTLS_CPPFLAGS) \ +libopenthread_cc2652_a_CPPFLAGS = \ + -I$(top_srcdir)/include \ + -I$(top_srcdir)/src \ + -I$(top_srcdir)/src/core \ + -I$(top_srcdir)/examples/platforms \ + -I$(top_srcdir)/examples/platforms/cc2652 \ + -I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \ + -I$(top_srcdir)/third_party/mbedtls/repo/include \ + $(MBEDTLS_CPPFLAGS) \ $(NULL) -PLATFORM_SOURCES = \ - alarm.c \ - diag.c \ - flash.c \ - logging.c \ - misc.c \ - platform.c \ - radio.c \ - random.c \ - uart.c \ - crypto/aes_alt.c \ - cc2652_ccfg.c \ - cc2652_startup.c \ - cxx_helpers.c \ +PLATFORM_SOURCES = \ + alarm.c \ + diag.c \ + flash.c \ + logging.c \ + misc.c \ + platform.c \ + radio.c \ + random.c \ + uart.c \ + crypto/aes_alt.c \ + cc2652_ccfg.c \ + cc2652_startup.c \ + cxx_helpers.c \ $(NULL) -libopenthread_cc2652_a_SOURCES = \ - $(PLATFORM_SOURCES) \ +libopenthread_cc2652_a_SOURCES = \ + $(PLATFORM_SOURCES) \ $(NULL) -libopenthread_cc2652_a_DEPENDENCIES = \ - $(top_srcdir)/third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a \ +libopenthread_cc2652_a_DEPENDENCIES = \ + $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \ $(NULL) -noinst_HEADERS = \ - platform-cc2652.h \ +noinst_HEADERS = \ + platform-cc2652.h \ $(NULL) -PRETTY_FILES = \ - $(PLATFORM_SOURCES) \ - $(noinst_HEADERS) \ +PRETTY_FILES = \ + $(PLATFORM_SOURCES) \ + $(noinst_HEADERS) \ $(NULL) -Dash = - -libopenthread_cc2652_a_LIBADD = \ +Dash = - +libopenthread_cc2652_a_LIBADD = \ $(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") include $(abs_top_nlbuild_autotools_dir)/automake/post.am diff --git a/examples/platforms/cc2652/Makefile.platform.am b/examples/platforms/cc2652/Makefile.platform.am index 67492168f..e8a64cc9d 100644 --- a/examples/platforms/cc2652/Makefile.platform.am +++ b/examples/platforms/cc2652/Makefile.platform.am @@ -30,15 +30,15 @@ # cc2652 platform-specific Makefile # -CPPFLAGS_COMMON += \ - -I$(top_srcdir)/third_party/ti/devices/cc26x2 \ +CPPFLAGS_COMMON += \ + -I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \ $(NULL) -LDADD_COMMON += \ - $(top_builddir)/examples/platforms/cc2652/libopenthread-cc2652.a \ - $(top_srcdir)/third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a \ +LDADD_COMMON += \ + $(top_builddir)/examples/platforms/cc2652/libopenthread-cc2652.a \ + $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \ $(NULL) -LDFLAGS_COMMON += \ - -T $(top_srcdir)/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.lds \ +LDFLAGS_COMMON += \ + -T $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds \ $(NULL) diff --git a/examples/platforms/cc2652/cc2652_ccfg.c b/examples/platforms/cc2652/cc2652_ccfg.c index aea2c046a..7f1e9b641 100644 --- a/examples/platforms/cc2652/cc2652_ccfg.c +++ b/examples/platforms/cc2652/cc2652_ccfg.c @@ -37,8 +37,7 @@ #define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor -#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0D // DIO13 (BTN-1 button) on CC2650 LaunchPad Board for boot loader backdoor -// #define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0B // DIO11 (SELECT button) on CC2650DK (QFN48/7*7) for boot loader backdoor +#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0D // DIO13 (BTN-1 button) on CC2652 LaunchPad Board for boot loader backdoor #define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor diff --git a/examples/platforms/cc2652/cc2652_radio.h b/examples/platforms/cc2652/cc2652_radio.h index c797a3d15..07cfa4dfa 100644 --- a/examples/platforms/cc2652/cc2652_radio.h +++ b/examples/platforms/cc2652/cc2652_radio.h @@ -72,22 +72,26 @@ typedef struct output_config uint16_t value; } output_config_t; -/* TODO: update with power measurments */ +/** + * TX Power dBm lookup table from SmartRF Studio 7 2.10.0#94 + */ static const output_config_t rgOutputPower[] = { - { 5, 0x9330}, - { 4, 0x9324}, - { 3, 0x5a1c}, - { 2, 0x4e18}, - { 1, 0x4214}, - { 0, 0x3161}, - { -3, 0x2558}, - { -6, 0x1d52}, - { -9, 0x194e}, - { -12, 0x144b}, - { -15, 0x0ccb}, - { -18, 0x0cc9}, - { -21, 0x0cc7}, + { 5, 0x941e}, + { 4, 0x6c16}, + { 3, 0x5411}, + { 2, 0x440d}, + { 1, 0x385c}, + { 0, 0x3459}, + { -3, 0x2851}, + { -5, 0x224e}, + { -6, 0x204d}, + { -9, 0x0a8d}, + { -10, 0x168c}, + { -12, 0x10a8}, + { -15, 0xc88c}, + { -18, 0x06c9}, + { -21, 0x06c7}, }; #define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0])) diff --git a/examples/platforms/cc2652/crypto/cc2652-mbedtls-config.h b/examples/platforms/cc2652/crypto/cc2652-mbedtls-config.h index ced68f81c..5bcf94c76 100644 --- a/examples/platforms/cc2652/crypto/cc2652-mbedtls-config.h +++ b/examples/platforms/cc2652/crypto/cc2652-mbedtls-config.h @@ -2461,7 +2461,7 @@ #define MBEDTLS_ECP_FIXED_POINT_OPTIM 0 /**< Enable fixed-point speed-up */ /* Entropy options */ -#define MBEDTLS_ENTROPY_MAX_SOURCES 1 /**< Maximum number of sources supported */ +#define MBEDTLS_ENTROPY_MAX_SOURCES 1 /**< Maximum number of sources supported */ //#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */ /* Memory buffer allocator options */ diff --git a/examples/platforms/cc2652/misc.c b/examples/platforms/cc2652/misc.c index 142aa0a17..0550e6599 100644 --- a/examples/platforms/cc2652/misc.c +++ b/examples/platforms/cc2652/misc.c @@ -67,7 +67,6 @@ otPlatResetReason otPlatGetResetReason(otInstance *aInstance) break; case RSTSRC_VDDS_LOSS: - case RSTSRC_VDD_LOSS: case RSTSRC_VDDR_LOSS: case RSTSRC_CLK_LOSS: ret = OT_PLAT_RESET_REASON_CRASH; diff --git a/examples/platforms/cc2652/radio.c b/examples/platforms/cc2652/radio.c index 31807c5af..86de3c81c 100644 --- a/examples/platforms/cc2652/radio.c +++ b/examples/platforms/cc2652/radio.c @@ -69,13 +69,40 @@ static volatile cc2652_PhyState_t sState; /* set to max transmit power by default */ static output_config_t const *sCurrentOutputPower = &(rgOutputPower[0]); -/* TODO: replace with correct overrides, pre-Alpha */ -/* Overrides for IEEE 802.15.4, differential mode */ +/* Overrides from SmartRF Studio 7 2.10.0#94 */ static uint32_t sIEEEOverrides[] = { - 0x00008403, // Use 48 MHz Crystal - 0x000088C3, // Disabling dynamic DCDC settings control in RX - 0x000088D3, // Disabling dynamic DCDC settings control in TX - 0xFFFFFFFF, // END_OVERRIDE + // override_ieee_802_15_4.xml + // PHY: Use MCE RAM patch, RFE ROM bank 1 + MCE_RFE_OVERRIDE(1, 0, 0, 0, 1, 0), + // Synth: Use 48 MHz crystal, enable extra PLL filtering + (uint32_t)0x02400403, + // Synth: Configure extra PLL filtering + (uint32_t)0x001C8473, + // Synth: Configure synth hardware + (uint32_t)0x00088433, + // Synth: Set minimum RTRIM to 3 + (uint32_t)0x00038793, + // Synth: Configure faster calibration + HW32_ARRAY_OVERRIDE(0x4004, 1), + // Synth: Configure faster calibration + (uint32_t)0x1C0C0618, + // Synth: Configure faster calibration + (uint32_t)0xC00401A1, + // Synth: Configure faster calibration + (uint32_t)0x00010101, + // Synth: Configure faster calibration + (uint32_t)0xC0040141, + // Synth: Configure faster calibration + (uint32_t)0x00214AD3, + // Synth: Decrease synth programming time-out (0x0298 RAT ticks = 166 us) + (uint32_t)0x02980243, + // DC/DC regulator: In Tx, use DCDCCTL5[3:0]=0xC (DITHER_EN=1 and IPEAK=4). In Rx, use DCDCCTL5[3:0]=0xC + // (DITHER_EN=1 and IPEAK=4). + (uint32_t)0xFCFC08C3, + // Rx: Set LNA bias current offset to +15 to saturate trim to max (default: 0) + (uint32_t)0x000F8883, + // override_frontend_id.xml + (uint32_t)0xFFFFFFFF, }; /* diff --git a/examples/platforms/cc2652/uart.c b/examples/platforms/cc2652/uart.c index 97877e603..13fc515f5 100644 --- a/examples/platforms/cc2652/uart.c +++ b/examples/platforms/cc2652/uart.c @@ -82,7 +82,7 @@ static void uart_power_control(uint32_t who_base, int turnon) { /* UART0 is in the SERIAL domain * UART1 is in the PERIPH domain. - * See: ti/devices/cc26x2/driverlib/pcrm.h, line: 658 + * See: ti/devices/cc13x2_cc26x2/driverlib/pcrm.h, line: 658 */ value = (who_base == UART0_BASE) ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH; PRCMPowerDomainOn(value); diff --git a/include/openthread/platform/toolchain.h b/include/openthread/platform/toolchain.h index 5dfec8221..5aec6762c 100644 --- a/include/openthread/platform/toolchain.h +++ b/include/openthread/platform/toolchain.h @@ -258,6 +258,25 @@ extern "C" { #define OT_UNREACHABLE_CODE(CODE) CODE +#elif defined(__TI_ARM__) + +#include + +#define OT_UNUSED_VARIABLE(VARIABLE) \ + do \ + { \ + if (&VARIABLE == NULL) \ + { \ + } \ + } while (false) + +/* + * #112-D statement is unreachable + * #129-D loop is not reachable + */ +#define OT_UNREACHABLE_CODE(CODE) \ + _Pragma("diag_push") _Pragma("diag_suppress 112") _Pragma("diag_suppress 129") CODE _Pragma("diag_pop") + #else #define OT_UNUSED_VARIABLE(VARIABLE) \ diff --git a/tests/unit/Makefile.am b/tests/unit/Makefile.am index 2ec53a361..f388e5502 100644 --- a/tests/unit/Makefile.am +++ b/tests/unit/Makefile.am @@ -274,3 +274,4 @@ endif # OPENTHREAD_BUILD_COVERAGE endif # OPENTHREAD_BUILD_TESTS include $(abs_top_nlbuild_autotools_dir)/automake/post.am + diff --git a/third_party/ti/README.md b/third_party/ti/README.md index 5d34822d3..461935802 100644 --- a/third_party/ti/README.md +++ b/third_party/ti/README.md @@ -1,10 +1,11 @@ #CC26XXware ## URL + http://www.ti.com/tool/simplelink-cc26x2-sdk ## Version -`driverlib_cc13xx_cc26xx_3_01_01_17779` +`driverlib_cc13xx_cc26xx_3_30_03_00` ## License @@ -12,7 +13,7 @@ BSD-3-Clause ## License File -[Export Manifest](cc26xxware/cc26xxware_2_24_0x_manifest.html) +[Export Manifest] manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html ## Documentation @@ -20,21 +21,24 @@ This version of cc26xxware is copied from the [SimpleLink CC26x2 Software Development Kit](http://www.ti.com/tool/simplelink-cc26x2-sdk). Modifications were made to the software package to support the GCC Automake pedantic build. -| file | change | -|-----------------------------------------------|------------------------------------------------------------------------------| -| `device/cc26x0/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library | -| `device/cc26x2/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library | -| `device/cc26x0/driverlib/cpu.h` | GCC asm extensions added to avoid unused variable warning in `CPUbasepriSet` | -| `device/cc26x2/driverlib/cpu.h` | GCC asm extensions added to avoid unused variable warning in `CPUbasepriSet` | -| `device/cc26x0/linker_files/cc26x0f128.lds` | `end` symbol added for GCC stdlib | -| `device/cc26x2/linker_files/cc26x2r1f.lds` | `end` symbol added for GCC stdlib | +Also see: release_notes_driverlib_cc13xx_cc26xx.html + +| file | change | +|-------------------------------------------------------|------------------------------------------------------------------------------| +| `device/cc26x0/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library | +| `device/cc13x52_cc26x2/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library | +| `device/cc26x0/linker_files/cc26x0f128.lds` | `end` symbol added for GCC stdlib | +| `device/cc13x52_cc26x2/linker_files/cc26x2r1f.lds` | `end` symbol added for GCC stdlib | Documentation can be found within the [SimpleLink CC26x2 Software Development Kit](http://www.ti.com/tool/simplelink-cc26x2-sdk). +**TODO** Update above link + ## Description CC26XXware is the board support library for Texas Instruments' CC26XX line of connected MCUs for developers to easily leverage the hardware capabilities of those platforms. Texas Instruments Incorporated recommends TI-RTOS and its associated drivers for future development. + diff --git a/third_party/ti/devices/DeviceFamily.h b/third_party/ti/devices/DeviceFamily.h index c2a0c3c67..8566650a7 100644 --- a/third_party/ti/devices/DeviceFamily.h +++ b/third_party/ti/devices/DeviceFamily.h @@ -50,77 +50,138 @@ extern "C" { #endif -/* List of DeviceFamily_ID_XYZ values. - * DeviceFamily_ID may be used in the preprocessor for conditional compilation. - * DeviceFamily_ID is set as one of these IDs is set based on the top - * level DeviceFamily_XYZ define. - */ -#define DeviceFamily_ID_CC26X0 0x00000001 -#define DeviceFamily_ID_CC26X0R2 0x00000002 -#define DeviceFamily_ID_CC26X2 0x00000004 -#define DeviceFamily_ID_CC13X0 0x00000100 -#define DeviceFamily_ID_CC13X2 0x00000200 -#define DeviceFamily_ID_CC3200 0x00010000 -#define DeviceFamily_ID_CC3220 0x00020000 -#define DeviceFamily_ID_MSP432P401x 0x01000000 -#define DeviceFamily_ID_MSP432P4x1xI 0x02000000 -#define DeviceFamily_ID_MSP432P4x1xT 0x04000000 - -/* Lookup table that sets DeviceFamily_ID and DeviceFamily_DIRECTORY based on the existence - * of a DeviceFamily_XYZ define. - * If DeviceFamily_XYZ is undefined, a compiler error is thrown. If multiple DeviceFamily_XYZ - * are defined, the first one encountered is used. +/* + * DeviceFamily_ID_XYZ values. * - * Currently supported values of DeviceFamily_XYZ are: - * - DeviceFamily_CC26X0 - * - DeviceFamily_CC26X0R2 - * - DeviceFamily_CC26X2 - * - DeviceFamily_CC13X0 - * - DeviceFamily_CC13X2 - * - DeviceFamily_CC3200 - * - DeviceFamily_CC3220 - * - DeviceFamily_MSP432P401x - * - DeviceFamily_MSP432P4x1 + * DeviceFamily_ID may be used in the preprocessor for conditional compilation. + * DeviceFamily_ID is set to one of these values based on the top level + * DeviceFamily_XYZ define. */ -#if defined(DeviceFamily_CC26X0) +#define DeviceFamily_ID_CC13X0 1 +#define DeviceFamily_ID_CC26X0 2 +#define DeviceFamily_ID_CC26X0R2 3 +#define DeviceFamily_ID_CC13X2_V1 4 +#define DeviceFamily_ID_CC13X2_V2 5 +#define DeviceFamily_ID_CC13X2 DeviceFamily_ID_CC13X2_V1 +#define DeviceFamily_ID_CC26X2_V1 6 +#define DeviceFamily_ID_CC26X2_V2 7 +#define DeviceFamily_ID_CC26X2 DeviceFamily_ID_CC26X2_V1 +#define DeviceFamily_ID_CC3200 8 +#define DeviceFamily_ID_CC3220 9 +#define DeviceFamily_ID_MSP432P401x 10 +#define DeviceFamily_ID_MSP432P4x1xI 11 +#define DeviceFamily_ID_MSP432P4x1xT 12 +#define DeviceFamily_ID_MSP432E401Y 13 +#define DeviceFamily_ID_MSP432E411Y 14 + +/* + * DeviceFamily_PARENT_XYZ values. + * + * DeviceFamily_PARENT may be used in the preprocessor for conditional + * compilation. DeviceFamily_PARENT is set to one of these values based + * on the top-level DeviceFamily_XYZ define. + */ +#define DeviceFamily_PARENT_CC13X0_CC26X0 1 +#define DeviceFamily_PARENT_CC13X2_CC26X2 2 +#define DeviceFamily_PARENT_MSP432P401R 3 +#define DeviceFamily_PARENT_MSP432P4111 4 + +/* + * Lookup table that sets DeviceFamily_ID, DeviceFamily_DIRECTORY, and + * DeviceFamily_PARENT based on the DeviceFamily_XYZ define. + * If DeviceFamily_XYZ is undefined, a compiler error is thrown. If + * multiple DeviceFamily_XYZ are defined, the first one encountered is used. + */ +#if defined(DeviceFamily_CC13X0) + #define DeviceFamily_ID DeviceFamily_ID_CC13X0 + #define DeviceFamily_DIRECTORY cc13x0 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0 + +#elif defined(DeviceFamily_CC13X2) + #define DeviceFamily_ID DeviceFamily_ID_CC13X2 + #define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2 + +#elif defined(DeviceFamily_CC13X2_V1) + #define DeviceFamily_ID DeviceFamily_ID_CC13X2_V1 + #define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2 + +#elif defined(DeviceFamily_CC13X2_V2) + #define DeviceFamily_ID DeviceFamily_ID_CC13X2_V2 + #define DeviceFamily_DIRECTORY cc13x2_cc26x2_v2 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2 + +#elif defined(DeviceFamily_CC26X0) #define DeviceFamily_ID DeviceFamily_ID_CC26X0 #define DeviceFamily_DIRECTORY cc26x0 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0 + #elif defined(DeviceFamily_CC26X0R2) #define DeviceFamily_ID DeviceFamily_ID_CC26X0R2 #define DeviceFamily_DIRECTORY cc26x0r2 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0 + #elif defined(DeviceFamily_CC26X2) #define DeviceFamily_ID DeviceFamily_ID_CC26X2 - #define DeviceFamily_DIRECTORY cc26x2 -#elif defined(DeviceFamily_CC13X0) - #define DeviceFamily_ID DeviceFamily_ID_CC13X0 - #define DeviceFamily_DIRECTORY cc13x0 -#elif defined(DeviceFamily_CC13X2) - #define DeviceFamily_ID DeviceFamily_ID_CC13X2 - #define DeviceFamily_DIRECTORY cc26x2 + #define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2 + +#elif defined(DeviceFamily_CC26X2_V1) + #define DeviceFamily_ID DeviceFamily_ID_CC26X2_V1 + #define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2 + +#elif defined(DeviceFamily_CC26X2_V2) + #define DeviceFamily_ID DeviceFamily_ID_CC26X2_V2 + #define DeviceFamily_DIRECTORY cc13x2_cc26x2_v2 + #define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2 + #elif defined(DeviceFamily_CC3200) #define DeviceFamily_ID DeviceFamily_ID_CC3200 #define DeviceFamily_DIRECTORY cc32xx + #elif defined(DeviceFamily_CC3220) #define DeviceFamily_ID DeviceFamily_ID_CC3220 #define DeviceFamily_DIRECTORY cc32xx + #elif defined(DeviceFamily_MSP432P401x) || defined(__MSP432P401R__) #define DeviceFamily_ID DeviceFamily_ID_MSP432P401x #define DeviceFamily_DIRECTORY msp432p4xx + #define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P401R #if !defined(__MSP432P401R__) #define __MSP432P401R__ #endif + #elif defined(DeviceFamily_MSP432P4x1xI) #define DeviceFamily_ID DeviceFamily_ID_MSP432P4x1xI #define DeviceFamily_DIRECTORY msp432p4xx + #define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P4111 #if !defined(__MSP432P4111__) #define __MSP432P4111__ #endif + #elif defined(DeviceFamily_MSP432P4x1xT) #define DeviceFamily_ID DeviceFamily_ID_MSP432P4x1xT #define DeviceFamily_DIRECTORY msp432p4xx + #define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P4111 #if !defined(__MSP432P4111__) #define __MSP432P4111__ #endif + +#elif defined(DeviceFamily_MSP432E401Y) + #define DeviceFamily_ID DeviceFamily_ID_MSP432E401Y + #define DeviceFamily_DIRECTORY msp432e4 + #if !defined(__MSP432E401Y__) + #define __MSP432E401Y__ + #endif + +#elif defined(DeviceFamily_MSP432E411Y) + #define DeviceFamily_ID DeviceFamily_ID_MSP432E411Y + #define DeviceFamily_DIRECTORY msp432e4 + #if !defined(__MSP432E411Y__) + #define __MSP432E411Y__ + #endif #else #error "DeviceFamily_XYZ undefined. You must defined DeviceFamily_XYZ!" #endif @@ -128,11 +189,12 @@ extern "C" { /*! * @brief Macro to include correct driverlib path. * - * @pre DeviceFamily_XYZ which sets DeviceFamily_DIRECTORY must be defined first. + * @pre DeviceFamily_XYZ which sets DeviceFamily_DIRECTORY must be defined + * first. * - * @param x A token containing the path of the file to include based on the root - * device folder. The preceding forward slash must be omitted. - * For example: + * @param x A token containing the path of the file to include based on + * the root device folder. The preceding forward slash must be + * omitted. For example: * - #include DeviceFamily_constructPath(inc/hw_memmap.h) * - #include DeviceFamily_constructPath(driverlib/ssi.h) * diff --git a/third_party/ti/devices/cc26x2/driverlib/adi.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/adi.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/adi.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/adi.c diff --git a/third_party/ti/devices/cc26x2/driverlib/adi.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/adi.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/adi.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/adi.h diff --git a/third_party/ti/devices/cc26x2/driverlib/adi_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/adi_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/adi_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/adi_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/aes.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aes.c similarity index 60% rename from third_party/ti/devices/cc26x2/driverlib/aes.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aes.c index 83c0f583a..43c030c92 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aes.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aes.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: crypto.c -* Revised: 2017-03-29 13:49:36 +0200 (Wed, 29 Mar 2017) -* Revision: 48751 +* Revised: 2018-05-08 10:29:36 +0200 (Tue, 08 May 2018) +* Revision: 51973 * * Description: Driver for the aes functions of the crypto module * @@ -47,24 +47,32 @@ #if !defined(DOXYGEN) #undef AESStartDMAOperation #define AESStartDMAOperation NOROM_AESStartDMAOperation - #undef AESLoadInitializationVector - #define AESLoadInitializationVector NOROM_AESLoadInitializationVector + #undef AESSetInitializationVector + #define AESSetInitializationVector NOROM_AESSetInitializationVector + #undef AESWriteCCMInitializationVector + #define AESWriteCCMInitializationVector NOROM_AESWriteCCMInitializationVector #undef AESReadTag #define AESReadTag NOROM_AESReadTag + #undef AESVerifyTag + #define AESVerifyTag NOROM_AESVerifyTag #undef AESWriteToKeyStore #define AESWriteToKeyStore NOROM_AESWriteToKeyStore #undef AESReadFromKeyStore #define AESReadFromKeyStore NOROM_AESReadFromKeyStore #undef AESWaitForIRQFlags #define AESWaitForIRQFlags NOROM_AESWaitForIRQFlags + #undef AESConfigureCCMCtrl + #define AESConfigureCCMCtrl NOROM_AESConfigureCCMCtrl #endif + + //***************************************************************************** // -// Load the initialisation vector. +// Load the initialization vector. // //***************************************************************************** -void AESLoadInitializationVector(uint32_t *initializationVector) +void AESSetInitializationVector(const uint32_t *initializationVector) { // Write initialization vector to the aes registers HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0) = initializationVector[0]; @@ -78,15 +86,14 @@ void AESLoadInitializationVector(uint32_t *initializationVector) // Start a crypto DMA operation. // //***************************************************************************** -void AESStartDMAOperation(uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length) +void AESStartDMAOperation(const uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length) { - - // Clear any outstanding events. - HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = CRYPTO_IRQCLR_RESULT_AVAIL_M | CRYPTO_IRQEN_DMA_IN_DONE_M; // This might need AES_IRQEN_DMA_IN_DONE as well - - while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M)); - if (channel0Length && channel0Addr) { + // We actually want to perform an operation. Clear any outstanding events. + HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = CRYPTO_IRQCLR_RESULT_AVAIL_M | CRYPTO_IRQEN_DMA_IN_DONE_M; // This might need AES_IRQEN_DMA_IN_DONE as well + + while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M)); + // Configure the DMA controller - enable both DMA channels. HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1; @@ -122,15 +129,16 @@ uint32_t AESWaitForIRQFlags(uint32_t irqFlags) do { CPUdelay(1); } - while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M))); + while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | + CRYPTO_IRQSTAT_RESULT_AVAIL_M | + CRYPTO_IRQSTAT_DMA_BUS_ERR_M | + CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M))); // Save the IRQ trigger source - irqTrigger = HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT); + irqTrigger = HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags; // Clear IRQ flags - HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = irqFlags; - - while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M)); + HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = irqTrigger; return irqTrigger; } @@ -140,7 +148,7 @@ uint32_t AESWaitForIRQFlags(uint32_t irqFlags) // Transfer a key from CM3 memory to a key store location. // //***************************************************************************** -uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t keyStoreArea) +uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea) { // Check the arguments. ASSERT((keyStoreArea == AES_KEY_AREA_0) || @@ -152,13 +160,13 @@ uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t (keyStoreArea == AES_KEY_AREA_6) || (keyStoreArea == AES_KEY_AREA_7)); - ASSERT((aesKeySizeBytes == AES_128_KEY_LENGTH_BYTES) || - (aesKeySizeBytes == AES_192_KEY_LENGTH_BYTES) || - (aesKeySizeBytes == AES_256_KEY_LENGTH_BYTES)); + ASSERT((aesKeyLength == AES_128_KEY_LENGTH_BYTES) || + (aesKeyLength == AES_192_KEY_LENGTH_BYTES) || + (aesKeyLength == AES_256_KEY_LENGTH_BYTES)); uint32_t keySize = 0; - switch (aesKeySizeBytes) { + switch (aesKeyLength) { case AES_128_KEY_LENGTH_BYTES: keySize = CRYPTO_KEYSIZE_SIZE_128_BIT; break; @@ -196,16 +204,20 @@ uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t } // Enable key to write (e.g. Key 0). - HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = (1 << keyStoreArea); + HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = 1 << keyStoreArea; // Total key length in bytes (16 for 1 x 128-bit key and 32 for 1 x 256-bit key). - AESStartDMAOperation(aesKey, aesKeySizeBytes, 0, 0); + AESStartDMAOperation(aesKey, aesKeyLength, 0, 0); // Wait for the DMA operation to complete. - uint32_t irqTrigger = AESWaitForIRQFlags(CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQCLR_RESULT_AVAIL | CRYPTO_IRQSTAT_DMA_BUS_ERR | CRYPTO_IRQSTAT_KEY_ST_WR_ERR); + uint32_t irqTrigger = AESWaitForIRQFlags(CRYPTO_IRQCLR_RESULT_AVAIL | CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQSTAT_DMA_BUS_ERR | CRYPTO_IRQSTAT_KEY_ST_WR_ERR); - // If we correctly transfered the key into the keystore, return success. - if ((irqTrigger & (CRYPTO_IRQSTAT_DMA_BUS_ERR_M | CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)) && !(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (1 << keyStoreArea))) { + // Re-enable interrupts globally. + IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ); + IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ); + + // If we had a bus error or the key is not in the CRYPTO_O_KEYWRITTENAREA, return an error. + if ((irqTrigger & (CRYPTO_IRQSTAT_DMA_BUS_ERR_M | CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)) || !(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (1 << keyStoreArea))) { // There was an error in writing to the keyStore. return AES_KEYSTORE_ERROR; } @@ -258,21 +270,102 @@ uint32_t AESReadFromKeyStore(uint32_t keyStoreArea) //***************************************************************************** // -// Read the tag after a completed CCM or CBC-MAC operation. +// Read the tag after a completed CCM, GCM, or CBC-MAC operation. // //***************************************************************************** -uint32_t AESReadTag(uint32_t *tag) +uint32_t AESReadTag(uint8_t *tag, uint32_t tagLength) { - // If the tag is not ready, return an error code. - if (!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) & CRYPTO_AESCTL_SAVED_CONTEXT_RDY_M)) { - return AES_TAG_NOT_READY; - } + // The intermediate array is used instead of a caller-provided one + // to enable a simple API with no unintuitive alignment or size requirements. + // This is a trade-off of stack-depth vs ease-of-use that came out on the + // ease-of-use side. + uint32_t computedTag[AES_BLOCK_SIZE / sizeof(uint32_t)]; - // Read tag - tag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0); - tag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1); - tag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2); - tag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3); + // Wait until the computed tag is ready. + while (!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) & CRYPTO_AESCTL_SAVED_CONTEXT_RDY_M)); + + // Read computed tag out from the HW registers + // Need to read out all 128 bits in four reads to correctly clear CRYPTO_AESCTL_SAVED_CONTEXT_RDY flag + computedTag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0); + computedTag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1); + computedTag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2); + computedTag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3); + + memcpy(tag, computedTag, tagLength); return AES_SUCCESS; } + +//***************************************************************************** +// +// Verify the provided tag against the computed tag after a completed CCM or +// GCM operation. +// +//***************************************************************************** +uint32_t AESVerifyTag(const uint8_t *tag, uint32_t tagLength) +{ + uint32_t resultStatus; + // The intermediate array is allocated on the stack to ensure users do not + // point the tag they provide and the one computed at the same location. + // That would cause memcmp to compare an array against itself. We could add + // a check that verifies that the arrays are not the same. If we did that and + // modified AESReadTag to just copy all 128 bits into a provided array, + // we could save 16 bytes of stack space while making the API much more + // complicated. + uint8_t computedTag[AES_BLOCK_SIZE]; + + resultStatus = AESReadTag(computedTag, tagLength); + + if (resultStatus != AES_SUCCESS) { + return resultStatus; + } + + resultStatus = memcmp(computedTag, tag, tagLength); + + if (resultStatus != 0) { + return AES_TAG_VERIFICATION_FAILED; + } + + return AES_SUCCESS; +} + +//***************************************************************************** +// +// Configure the AES module for CCM mode +// +//***************************************************************************** +void AESConfigureCCMCtrl(uint32_t nonceLength, uint32_t macLength, bool encrypt) +{ + uint32_t ctrlVal = 0; + + ctrlVal = ((15 - nonceLength - 1) << CRYPTO_AESCTL_CCM_L_S); + if ( macLength >= 2 ) { + ctrlVal |= ((( macLength - 2 ) >> 1 ) << CRYPTO_AESCTL_CCM_M_S ); + } + ctrlVal |= CRYPTO_AESCTL_CCM | + CRYPTO_AESCTL_CTR | + CRYPTO_AESCTL_SAVE_CONTEXT | + CRYPTO_AESCTL_CTR_WIDTH_128_BIT; + ctrlVal |= encrypt ? CRYPTO_AESCTL_DIR : 0; + + AESSetCtrl(ctrlVal); +} + +//***************************************************************************** +// +// Configure an IV for CCM mode of operation +// +//***************************************************************************** +void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength) +{ + union { + uint32_t word[4]; + uint8_t byte[16]; + } initializationVector = {{0}}; + + initializationVector.byte[0] = 15 - nonceLength - 1; + + memcpy(&(initializationVector.byte[1]), nonce, nonceLength); + + AESSetInitializationVector(initializationVector.word); +} diff --git a/third_party/ti/devices/cc26x2/driverlib/aes.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aes.h similarity index 73% rename from third_party/ti/devices/cc26x2/driverlib/aes.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aes.h index 14e848fb7..636337895 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aes.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aes.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aes.h -* Revised: 2017-03-29 13:20:12 +0200 (Wed, 29 Mar 2017) -* Revision: 48750 +* Revised: 2018-04-17 14:54:06 +0200 (Tue, 17 Apr 2018) +* Revision: 51890 * * Description: AES header file. * @@ -61,6 +61,7 @@ extern "C" #include #include +#include #include "../inc/hw_types.h" #include "../inc/hw_memmap.h" #include "../inc/hw_ints.h" @@ -84,13 +85,17 @@ extern "C" //***************************************************************************** #if !defined(DOXYGEN) #define AESStartDMAOperation NOROM_AESStartDMAOperation - #define AESLoadInitializationVector NOROM_AESLoadInitializationVector + #define AESSetInitializationVector NOROM_AESSetInitializationVector + #define AESWriteCCMInitializationVector NOROM_AESWriteCCMInitializationVector #define AESReadTag NOROM_AESReadTag + #define AESVerifyTag NOROM_AESVerifyTag #define AESWriteToKeyStore NOROM_AESWriteToKeyStore #define AESReadFromKeyStore NOROM_AESReadFromKeyStore #define AESWaitForIRQFlags NOROM_AESWaitForIRQFlags + #define AESConfigureCCMCtrl NOROM_AESConfigureCCMCtrl #endif + //***************************************************************************** // // Values that can be passed to AESIntEnable, AESIntDisable, and AESIntClear @@ -119,6 +124,7 @@ extern "C" #define AES_DMA_BUSY 3 #define AES_DMA_ERROR 4 #define AES_TAG_NOT_READY 5 +#define AES_TAG_VERIFICATION_FAILED 6 // Key store module defines #define AES_IV_LENGTH_BYTES 16 @@ -127,7 +133,7 @@ extern "C" #define AES_192_KEY_LENGTH_BYTES (192 / 8) #define AES_256_KEY_LENGTH_BYTES (256 / 8) -#define AES_ECB_BLOCK_SIZE 16 +#define AES_BLOCK_SIZE 16 // DMA status codes #define AES_DMA_CHANNEL0_ACTIVE CRYPTO_DMASTAT_CH0_ACT_M @@ -182,32 +188,32 @@ extern "C" //! transfer. It is also used by the hardware module as a signal to //! begin the encryption, decryption, or MAC operation. //! -//! \param channel0Addr A pointer to the address channel 0 shall use. +//! \param [in] channel0Addr A pointer to the address channel 0 shall use. //! -//! \param channel0Length Length of the data in bytes to be read from or -//! written to at channel0Addr. Set to 0 to not set up -//! this channel. Permitted ranges are mode dependent -//! and displayed below. -//! - ECB: [16] -//! - CBC: [1, sizeof(RAM)] -//! - CBC-MAC: [1, sizeof(RAM)] -//! - CCM: [1, sizeof(RAM)] +//! \param [in] channel0Length Length of the data in bytes to be read from or +//! written to at channel0Addr. Set to 0 to not set up +//! this channel. Permitted ranges are mode dependent +//! and displayed below. +//! - ECB: [16] +//! - CBC: [1, sizeof(RAM)] +//! - CBC-MAC: [1, sizeof(RAM)] +//! - CCM: [1, sizeof(RAM)] //! -//! \param channel1Addr A pointer to the address channel 1 shall use. +//! \param [out] channel1Addr A pointer to the address channel 1 shall use. //! -//! \param channel1Length Length of the data in bytes to be read from or -//! written to at channel1Addr. Set to 0 to not set up -//! this channel.Permitted ranges are mode dependent -//! and displayed below. -//! - ECB: [16] -//! - CBC: [1, sizeof(RAM)] -//! - CBC-MAC: [1, sizeof(RAM)] -//! - CCM: [1, sizeof(RAM)] +//! \param [in] channel1Length Length of the data in bytes to be read from or +//! written to at channel1Addr. Set to 0 to not set up +//! this channel.Permitted ranges are mode dependent +//! and displayed below. +//! - ECB: [16] +//! - CBC: [1, sizeof(RAM)] +//! - CBC-MAC: [1, sizeof(RAM)] +//! - CCM: [1, sizeof(RAM)] //! //! \return None // //***************************************************************************** -extern void AESStartDMAOperation(uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length); +extern void AESStartDMAOperation(const uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length); //***************************************************************************** // @@ -241,29 +247,68 @@ extern void AESStartDMAOperation(uint8_t *channel0Addr, uint32_t channel0Length, //! } //! \endcode //! -//! \param initializationVector Pointer to an array with four 32-bit elements -//! to be used as initialization vector. -//! Elements of array must be word aligned in memory. +//! \param [in] initializationVector Pointer to an array with four 32-bit elements +//! to be used as initialization vector. +//! Elements of array must be word aligned in memory. //! //! \return None // //***************************************************************************** -extern void AESLoadInitializationVector(uint32_t *initializationVector); +extern void AESSetInitializationVector(const uint32_t *initializationVector); + +//***************************************************************************** +// +//! \brief Generate and load the initialization vector for a CCM operation. +//! +//! +//! \param [in] nonce Pointer to a nonce of length \c nonceLength. +//! +//! \param [in] nonceLength Number of bytes to copy from \c nonce when creating +//! the CCM IV. The L-value is also derived from it. +//! +//! \return None +// +//***************************************************************************** +extern void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength); //***************************************************************************** // //! \brief Read the tag out from the crypto module. //! -//! \param tag Pointer to an array with four 32-bit elements -//! to be used as initialization vector. -//! Elements of array must be word aligned in memory. +//! This function copies the \c tagLength bytes from the tag calculated by the +//! crypto module in CCM, GCM, or CBC-MAC mode to \c tag. +//! +//! \param [out] tag Pointer to an array of \c tagLength bytes. +//! +//! \param [in] tagLength Number of bytes to copy to \c tag. //! //! \return Returns a status code depending on the result of the transfer. //! - \ref AES_TAG_NOT_READY if the tag is not ready yet //! - \ref AES_SUCCESS otherwise // //***************************************************************************** -extern uint32_t AESReadTag(uint32_t *tag); +extern uint32_t AESReadTag(uint8_t *tag, uint32_t tagLength); + +//***************************************************************************** +// +//! \brief Verifies the provided \c tag against calculated one +//! +//! This function compares the provided tag against the tag calculated by the +//! crypto module during the last CCM, GCM, or CBC-MAC +//! +//! This function copies the \c tagLength bytes from the tag calculated by the +//! crypto module in CCM, GCM, or CBC-MAC mode to \c tag. +//! +//! \param [in] tag Pointer to an array of \c tagLength bytes. +//! +//! \param [in] tagLength Number of bytes to compare. +//! +//! \return Returns a status code depending on the result of the transfer. +//! - \ref AES_TAG_VERIFICATION_FAILED if the verification failed +//! - \ref AES_SUCCESS otherwise +// +//***************************************************************************** +extern uint32_t AESVerifyTag(const uint8_t *tag, uint32_t tagLength); //***************************************************************************** // @@ -271,25 +316,25 @@ extern uint32_t AESReadTag(uint32_t *tag); //! //! The crypto DMA transfers the key and function does not return until //! the operation completes. -//! The keyStore can only contain valid keys of one \c aesKeySizeBytes at +//! The keyStore can only contain valid keys of one \c aesKeyLength at //! any one point in time. The keyStore cannot contain both 128-bit and -//! 256-bit keys simultaneously. When a key of a different \c aesKeySizeBytes -//! from the previous \c aesKeySizeBytes is loaded, all previous keys are +//! 256-bit keys simultaneously. When a key of a different \c aesKeyLength +//! from the previous \c aesKeyLength is loaded, all previous keys are //! invalidated. //! -//! \param aesKey Pointer to key. Does not need to be word-aligned. +//! \param [in] aesKey Pointer to key. Does not need to be word-aligned. //! -//! \param aesKeySizeBytes The key size in bytes. Currently, 128-bit, 192-bit, -//! and 256-bit keys are supported. +//! \param [in] aesKeyLength The key size in bytes. Currently, 128-bit, 192-bit, +//! and 256-bit keys are supported. //! - \ref AES_128_KEY_LENGTH_BYTES //! - \ref AES_192_KEY_LENGTH_BYTES //! - \ref AES_256_KEY_LENGTH_BYTES //! -//! \param keyStoreArea The key store area to transfer the key to. -//! When using 128-bit keys, only the specified key store -//! area will be occupied. -//! When using 256-bit or 192-bit keys, two consecutive key areas -//! are used to store the key. +//! \param [in] keyStoreArea The key store area to transfer the key to. +//! When using 128-bit keys, only the specified key store +//! area will be occupied. +//! When using 256-bit or 192-bit keys, two consecutive key areas +//! are used to store the key. //! - \ref AES_KEY_AREA_0 //! - \ref AES_KEY_AREA_1 //! - \ref AES_KEY_AREA_2 @@ -322,7 +367,7 @@ extern uint32_t AESReadTag(uint32_t *tag); //! \sa AESReadFromKeyStore // //***************************************************************************** -extern uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t keyStoreArea); +extern uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea); //***************************************************************************** // @@ -331,12 +376,12 @@ extern uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, ui //! //! The function polls until the transfer is complete. //! -//! \param keyStoreArea The key store area to transfer the key from. When using -//! 256-bit keys, either of the occupied key areas may be -//! specified to load the key. There is no need to specify -//! the length of the key here as the key store keeps track -//! of how long a key associated with any valid key area is -//! and where is starts. +//! \param [in] keyStoreArea The key store area to transfer the key from. When using +//! 256-bit keys, either of the occupied key areas may be +//! specified to load the key. There is no need to specify +//! the length of the key here as the key store keeps track +//! of how long a key associated with any valid key area is +//! and where is starts. //! - \ref AES_KEY_AREA_0 //! - \ref AES_KEY_AREA_1 //! - \ref AES_KEY_AREA_2 @@ -372,10 +417,10 @@ extern uint32_t AESReadFromKeyStore(uint32_t keyStoreArea); //! always be included in \c irqFlags and will always be returned together //! with any error codes. //! -//! \param irqFlags IRQ flags to poll and mask that the status register will be -//! masked with. May consist of any bitwise OR of the flags -//! below that includes at least one of -//! \ref AES_DMA_IN_DONE or \ref AES_RESULT_RDY : +//! \param [in] irqFlags IRQ flags to poll and mask that the status register will be +//! masked with. May consist of any bitwise OR of the flags +//! below that includes at least one of +//! \ref AES_DMA_IN_DONE or \ref AES_RESULT_RDY : //! - \ref AES_DMA_IN_DONE //! - \ref AES_RESULT_RDY //! - \ref AES_DMA_BUS_ERR @@ -393,12 +438,29 @@ extern uint32_t AESReadFromKeyStore(uint32_t keyStoreArea); //***************************************************************************** extern uint32_t AESWaitForIRQFlags(uint32_t irqFlags); +//***************************************************************************** +// +//! \brief Configure AES engine for CCM operation. +//! +//! \param [in] nonceLength Length of the nonce. Must be <= 14. +//! +//! \param [in] macLength Length of the MAC. Must be <= 16. +//! +//! \param [in] encrypt Whether to set up an encrypt or decrypt operation. +//! - true: encrypt +//! - false: decrypt +//! +//! \return None +// +//***************************************************************************** +extern void AESConfigureCCMCtrl(uint32_t nonceLength, uint32_t macLength, bool encrypt); + //***************************************************************************** // //! \brief Invalidate a key in the key store //! -//! \param keyStoreArea is the entry in the key store to invalidate. This -//! permanently deletes the key from the key store. +//! \param [in] keyStoreArea is the entry in the key store to invalidate. This +//! permanently deletes the key from the key store. //! - \ref AES_KEY_AREA_0 //! - \ref AES_KEY_AREA_1 //! - \ref AES_KEY_AREA_2 @@ -430,8 +492,8 @@ __STATIC_INLINE void AESInvalidateKey(uint32_t keyStoreArea) // //! \brief Select type of operation //! -//! \param algorithm Flags that specify which type of operation the crypto -//! module shall perform. The flags are mutually exclusive. +//! \param [in] algorithm Flags that specify which type of operation the crypto +//! module shall perform. The flags are mutually exclusive. //! - 0 : Reset the module //! - \ref AES_ALGSEL_AES //! - \ref AES_ALGSEL_TAG @@ -442,9 +504,9 @@ __STATIC_INLINE void AESInvalidateKey(uint32_t keyStoreArea) //***************************************************************************** __STATIC_INLINE void AESSelectAlgorithm(uint32_t algorithm) { - ASSERT((keyStoreEntry == AES_ALGSEL_AES) || - (keyStoreEntry == AES_ALGSEL_AES | AES_ALGSEL_TAG) || - (keyStoreEntry == AES_ALGSEL_KEY_STORE)); + ASSERT((algorithm == AES_ALGSEL_AES) || + (algorithm == AES_ALGSEL_AES | AES_ALGSEL_TAG) || + (algorithm == AES_ALGSEL_KEY_STORE)); HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = algorithm; } @@ -457,12 +519,12 @@ __STATIC_INLINE void AESSelectAlgorithm(uint32_t algorithm) //! register. The relevant field names have the format: //! - CRYPTO_AESCTL_[field name] //! -//! \param ctrlMask Specifies which register fields shall be set. +//! \param [in] ctrlMask Specifies which register fields shall be set. //! //! \return None // //***************************************************************************** -__STATIC_INLINE void AESSetupCtrl(uint32_t ctrlMask) +__STATIC_INLINE void AESSetCtrl(uint32_t ctrlMask) { HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = ctrlMask; } @@ -474,22 +536,22 @@ __STATIC_INLINE void AESSetupCtrl(uint32_t ctrlMask) //! Despite specifying it here, the crypto DMA must still be //! set up with the correct data length. //! -//! \param length Data length in bytes. If this -//! value is set to 0, only authentication of the AAD is -//! performed in CCM-mode and AESWriteAuthLength() must be set to -//! >0. -//! Range depends on the mode: -//! - ECB: [16] -//! - CBC: [1, sizeof(RAM)] -//! - CBC-MAC: [1, sizeof(RAM)] -//! - CCM: [0, sizeof(RAM)] +//! \param [in] length Data length in bytes. If this +//! value is set to 0, only authentication of the AAD is +//! performed in CCM-mode and AESWriteAuthLength() must be set to +//! >0. +//! Range depends on the mode: +//! - ECB: [16] +//! - CBC: [1, sizeof(RAM)] +//! - CBC-MAC: [1, sizeof(RAM)] +//! - CCM: [0, sizeof(RAM)] //! //! \return None //! //! \sa AESWriteAuthLength // //***************************************************************************** -__STATIC_INLINE void AESWriteDataLength(uint32_t length) +__STATIC_INLINE void AESSetDataLength(uint32_t length) { HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = length; HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0; @@ -502,21 +564,21 @@ __STATIC_INLINE void AESWriteDataLength(uint32_t length) //! Despite specifying it here, the crypto DMA must still be set up with //! the correct AAD length. //! -//! \param length Specifies how long the AAD is in a CCM operation. In CCM mode, -//! set this to 0 if no AAD is required. If set to 0, -//! AESWriteDataLength() must be set to >0. -//! Range depends on the mode: -//! - ECB: Do not call. -//! - CBC: [0] -//! - CBC-MAC: [0] -//! - CCM: [0, sizeof(RAM)] +//! \param [in] length Specifies how long the AAD is in a CCM operation. In CCM mode, +//! set this to 0 if no AAD is required. If set to 0, +//! AESWriteDataLength() must be set to >0. +//! Range depends on the mode: +//! - ECB: Do not call. +//! - CBC: [0] +//! - CBC-MAC: [0] +//! - CCM: [0, sizeof(RAM)] //! //! \return None //! //! \sa AESWriteDataLength // //***************************************************************************** -__STATIC_INLINE void AESWriteAuthLength(uint32_t length) +__STATIC_INLINE void AESSetAuthLength(uint32_t length) { HWREG(CRYPTO_BASE + CRYPTO_O_AESAUTHLEN) = length; } @@ -529,7 +591,7 @@ __STATIC_INLINE void AESWriteAuthLength(uint32_t length) //! sources that are enabled can be reflected to the processor interrupt. //! Disabled sources have no effect on the processor. //! -//! \param intFlags is the bitwise OR of the interrupt sources to be enabled. +//! \param [in] intFlags is the bitwise OR of the interrupt sources to be enabled. //! - \ref AES_DMA_IN_DONE //! - \ref AES_RESULT_RDY //! @@ -557,7 +619,7 @@ __STATIC_INLINE void AESIntEnable(uint32_t intFlags) //! sources that are enabled can be reflected to the processor interrupt. //! Disabled sources have no effect on the processor. //! -//! \param intFlags is the bitwise OR of the interrupt sources to be enabled. +//! \param [in] intFlags is the bitwise OR of the interrupt sources to be enabled. //! - \ref AES_DMA_IN_DONE //! - \ref AES_RESULT_RDY //! @@ -630,7 +692,7 @@ __STATIC_INLINE uint32_t AESIntStatusRaw(void) //! clear the event source early in the interrupt service routine (ISR) to allow //! the event clear to propagate to the NVIC before returning from the ISR. //! -//! \param intFlags is a bit mask of the interrupt sources to be cleared. +//! \param [in] intFlags is a bit mask of the interrupt sources to be cleared. //! - \ref AES_DMA_IN_DONE //! - \ref AES_RESULT_RDY //! @@ -714,14 +776,22 @@ __STATIC_INLINE void AESIntUnregister(void) #undef AESStartDMAOperation #define AESStartDMAOperation ROM_AESStartDMAOperation #endif - #ifdef ROM_AESLoadInitializationVector - #undef AESLoadInitializationVector - #define AESLoadInitializationVector ROM_AESLoadInitializationVector + #ifdef ROM_AESSetInitializationVector + #undef AESSetInitializationVector + #define AESSetInitializationVector ROM_AESSetInitializationVector + #endif + #ifdef ROM_AESWriteCCMInitializationVector + #undef AESWriteCCMInitializationVector + #define AESWriteCCMInitializationVector ROM_AESWriteCCMInitializationVector #endif #ifdef ROM_AESReadTag #undef AESReadTag #define AESReadTag ROM_AESReadTag #endif + #ifdef ROM_AESVerifyTag + #undef AESVerifyTag + #define AESVerifyTag ROM_AESVerifyTag + #endif #ifdef ROM_AESWriteToKeyStore #undef AESWriteToKeyStore #define AESWriteToKeyStore ROM_AESWriteToKeyStore @@ -734,6 +804,10 @@ __STATIC_INLINE void AESIntUnregister(void) #undef AESWaitForIRQFlags #define AESWaitForIRQFlags ROM_AESWaitForIRQFlags #endif + #ifdef ROM_AESConfigureCCMCtrl + #undef AESConfigureCCMCtrl + #define AESConfigureCCMCtrl ROM_AESConfigureCCMCtrl + #endif #endif //***************************************************************************** diff --git a/third_party/ti/devices/cc26x2/driverlib/aes_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aes_doc.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/aes_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aes_doc.h index 502f95431..6d156a4ab 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aes_doc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aes_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aes_doc.h -* Revised: 2016-12-10 13:57:16 +0100 (Sat, 10 Dec 2016) -* Revision: 47952 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_batmon.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_batmon.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aon_batmon.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_batmon.c diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_batmon.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_batmon.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aon_batmon.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_batmon.h diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_event.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event.c similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/aon_event.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event.c index c94e9bfbc..cb699a152 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_event.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_event.c -* Revised: 2017-04-26 16:53:03 +0200 (Wed, 26 Apr 2017) -* Revision: 48850 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AON Event fabric. * diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_event.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event.h similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/aon_event.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event.h index 7bd2ca623..999844a0d 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_event.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_event.h -* Revised: 2017-04-26 16:53:03 +0200 (Wed, 26 Apr 2017) -* Revision: 48850 +* Revised: 2017-08-09 16:56:05 +0200 (Wed, 09 Aug 2017) +* Revision: 49506 * * Description: Defines and prototypes for the AON Event fabric. * @@ -63,7 +63,6 @@ extern "C" #include #include "../inc/hw_types.h" #include "../inc/hw_memmap.h" -#include "../inc/hw_device.h" #include "../inc/hw_aon_event.h" #include "debug.h" @@ -168,11 +167,10 @@ extern "C" // //! \brief Select event source for the specified MCU wake-up programmable event. //! -//! The AON event fabric has several programmable events that can -//! wake up the MCU. The events are forwarded to the wake-up controller (WUC). +//! The AON event fabric has several programmable events that can wake up the MCU. //! //! \note The programmable event sources are effectively OR'ed together -//! to form a single wake-up event forwarded to the WUC. +//! to form a single wake-up event. //! //! \param ui32MCUWUEvent is one of the programmable MCU wake-up event sources. //! - \ref AON_EVENT_MCU_WU0 diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_event_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event_doc.h similarity index 83% rename from third_party/ti/devices/cc26x2/driverlib/aon_event_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event_doc.h index 96dc5b57a..5210bbfc7 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_event_doc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_event_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_event_doc.h -* Revised: 2016-07-07 19:12:02 +0200 (Thu, 07 Jul 2016) -* Revision: 46848 +* Revised: 2017-08-09 16:56:05 +0200 (Wed, 09 Aug 2017) +* Revision: 49506 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -42,11 +42,10 @@ //! to the AON event fabric. For more information on MCU event fabric, see [MCU event API](@ref event_api). //! //! The AON event fabric is a configurable combinatorial router between AON event sources and event -//! subscribers in both AON and MCU domains. The AON event fabric has three main event subscribers: AON WUC, -//! AON RTC, and MCU event fabric. The API to control the AON event fabric configuration can be grouped based -//! on the event subscriber to configure: +//! subscribers in both AON and MCU domains. The API to control the AON event fabric configuration +//! can be grouped based on the event subscriber to configure: //! -//! - AON WUC receives two programmable event lines from AON event fabric. One for MCU wake-up events and one for AUX wake-up events. For more information, see [AON WUC API](@ref aonwuc_api). +//! - Wake-up events. //! - MCU wake-up event //! - @ref AONEventMcuWakeUpSet() //! - @ref AONEventMcuWakeUpGet() diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_ioc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_ioc.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aon_ioc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_ioc.c diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_ioc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_ioc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aon_ioc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_ioc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_ioc_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_ioc_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aon_ioc_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_ioc_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_pmctl.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl.c similarity index 95% rename from third_party/ti/devices/cc26x2/driverlib/aon_pmctl.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl.c index 771db904a..b680fd73e 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_pmctl.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_pmctl.c -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AON Power-Management Controller. * diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_pmctl.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl.h similarity index 86% rename from third_party/ti/devices/cc26x2/driverlib/aon_pmctl.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl.h index f1123d63b..ec6bf2e53 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_pmctl.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_pmctl.h -* Revised: 2017-04-20 13:30:18 +0200 (Thu, 20 Apr 2017) -* Revision: 48814 +* Revised: 2017-11-02 14:16:14 +0100 (Thu, 02 Nov 2017) +* Revision: 50156 * * Description: Defines and prototypes for the AON Power-Management Controller * @@ -127,11 +127,11 @@ AONPMCTLMcuSRamRetConfig(uint32_t ui32Retention) uint32_t ui32Reg; // Check the arguments. - ASSERT(ui32Retention == MCU_RAM_RET_NONE || - ui32Retention == MCU_RAM_RET_LVL1 || - ui32Retention == MCU_RAM_RET_LVL2 || - ui32Retention == MCU_RAM_RET_LVL3 || - ui32Retention == MCU_RAM_RET_FULL); + ASSERT((ui32Retention == MCU_RAM_RET_NONE) || + (ui32Retention == MCU_RAM_RET_LVL1) || + (ui32Retention == MCU_RAM_RET_LVL2) || + (ui32Retention == MCU_RAM_RET_LVL3) || + (ui32Retention == MCU_RAM_RET_FULL)); // Configure the retention. ui32Reg = HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_M; @@ -157,27 +157,6 @@ AONPMCTLPowerStatusGet(void) return (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT)); } -//***************************************************************************** -// -//! \brief Enable shut-down of the device. -//! -//! Use this function to enable shut-down of the device. This will force all I/O -//! values to be latched - possibly enabling I/O wakeup - then all internal power -//! supplies are turned off, effectively putting the device into shut-down mode. -//! -//! -//! \return None -// -//***************************************************************************** -__STATIC_INLINE void -AONPMCTLShutDownEnable(void) -{ - // Power down the JTAG domain - HWREGBITW(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT, AON_PMCTL_PWRSTAT_JTAG_PD_ON_BITN) = 0; - // Enable shutdown of the device - HWREGBITW(AON_PMCTL_BASE + AON_PMCTL_O_SHUTDOWN, AON_PMCTL_SHUTDOWN_EN_BITN) = 1; -} - //***************************************************************************** // diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_pmctl_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl_doc.h similarity index 95% rename from third_party/ti/devices/cc26x2/driverlib/aon_pmctl_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl_doc.h index 5347a990a..0f44256b2 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_pmctl_doc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_pmctl_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_pmctl_doc.h -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 +* Revised: 2017-11-02 15:41:14 +0100 (Thu, 02 Nov 2017) +* Revision: 50165 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -83,13 +83,10 @@ //! Functions to perform device configuration: //! - \ref AONPMCTLJtagPowerOff() //! - \ref AONPMCTLMcuSRamRetConfig() -//! - \ref AONPMCTLShutDownEnable() //! //! Please note that due to legacy software compatibility some functionalities controlled //! by the AON Power Management Controller module are supported through the APIs of //! the [System Controller](@ref sysctrl_api) and [Power Controller](@ref pwrctrl_api). Relevant functions are: -//! - \ref PowerCtrlIOFreezeDisable() -//! - \ref PowerCtrlIOFreezeEnable() //! - \ref PowerCtrlSourceGet() //! - \ref PowerCtrlSourceSet() //! - \ref PowerCtrlResetSourceGet() diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_rtc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc.c similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/aon_rtc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc.c index 21a45a54e..7187f84de 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_rtc.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_rtc.c -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AON RTC. * diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_rtc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc.h similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/aon_rtc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc.h index 2a6270dbf..6e131d2f3 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aon_rtc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_rtc.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-08-16 15:13:43 +0200 (Wed, 16 Aug 2017) +* Revision: 49593 * * Description: Defines and prototypes for the AON RTC * diff --git a/third_party/ti/devices/cc26x2/driverlib/aon_rtc_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aon_rtc_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aon_rtc_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/aux_adc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_adc.c similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/aux_adc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_adc.c index 2e946484b..b1b3f198f 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aux_adc.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_adc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_adc.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-11-20 14:31:35 +0100 (Mon, 20 Nov 2017) +* Revision: 50315 * * Description: Driver for the AUX Time to Digital Converter interface. * @@ -95,6 +95,10 @@ AUXADCDisable(void) // Ensure that scaling is enabled by default before next use of the ADC ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M); + // Flush the FIFO before disabling the clocks + HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3) + HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1) + // Disable the ADC clock (no need to wait since IOB_WUC_ADCCLKCTL_ACK goes low immediately) HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = 0; diff --git a/third_party/ti/devices/cc26x2/driverlib/aux_adc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_adc.h similarity index 96% rename from third_party/ti/devices/cc26x2/driverlib/aux_adc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_adc.h index 69d271403..c87fd2fb9 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aux_adc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_adc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_adc.h -* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016) -* Revision: 47179 +* Revised: 2018-02-07 09:45:39 +0100 (Wed, 07 Feb 2018) +* Revision: 51437 * * Description: Defines and prototypes for the AUX Analog-to-Digital * Converter @@ -132,6 +132,15 @@ extern "C" #define AUXADC_TRIGGER_GPT2B (EVENT_AUXSEL0_EV_GPT2B) #define AUXADC_TRIGGER_GPT3A (EVENT_AUXSEL0_EV_GPT3A) #define AUXADC_TRIGGER_GPT3B (EVENT_AUXSEL0_EV_GPT3B) +// Additional triggers specific for cc26x2 and cc13x2 devices +#define AUXADC_TRIGGER_GPT0A_CMP (EVENT_AUXSEL0_EV_GPT0A_CMP) +#define AUXADC_TRIGGER_GPT0B_CMP (EVENT_AUXSEL0_EV_GPT0B_CMP) +#define AUXADC_TRIGGER_GPT1A_CMP (EVENT_AUXSEL0_EV_GPT1A_CMP) +#define AUXADC_TRIGGER_GPT1B_CMP (EVENT_AUXSEL0_EV_GPT1B_CMP) +#define AUXADC_TRIGGER_GPT2A_CMP (EVENT_AUXSEL0_EV_GPT2A_CMP) +#define AUXADC_TRIGGER_GPT2B_CMP (EVENT_AUXSEL0_EV_GPT2B_CMP) +#define AUXADC_TRIGGER_GPT3A_CMP (EVENT_AUXSEL0_EV_GPT3A_CMP) +#define AUXADC_TRIGGER_GPT3B_CMP (EVENT_AUXSEL0_EV_GPT3B_CMP) //***************************************************************************** // diff --git a/third_party/ti/devices/cc26x2/driverlib/aux_smph.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_smph.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aux_smph.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_smph.c diff --git a/third_party/ti/devices/cc26x2/driverlib/aux_smph.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_smph.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aux_smph.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_smph.h diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_sysif.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_sysif.c new file mode 100644 index 000000000..5e3e90b7c --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_sysif.c @@ -0,0 +1,96 @@ +/****************************************************************************** +* Filename: aux_sysif.c +* Revised: 2018-04-17 14:54:06 +0200 (Tue, 17 Apr 2018) +* Revision: 51890 +* +* Description: Driver for the AUX System Interface +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#include "aux_sysif.h" + +//***************************************************************************** +// +// Handle support for DriverLib in ROM: +// This section will undo prototype renaming made in the header file +// +//***************************************************************************** +#if !defined(DOXYGEN) + #undef AUXSYSIFOpModeChange + #define AUXSYSIFOpModeChange NOROM_AUXSYSIFOpModeChange +#endif + + +//***************************************************************************** +// +// Used in AUXSYSIFOpModeChange() to control the change of the operational mode. +// +//***************************************************************************** +static const uint8_t g_OpMode_to_order[4] = {1,2,0,3}; +static const uint8_t g_Order_to_OpMode[4] = {2,0,1,3}; + +//***************************************************************************** +// +// Controls AUX operational mode change +// +//***************************************************************************** +void +AUXSYSIFOpModeChange(uint32_t targetOpMode) +{ + uint32_t currentOpMode; + uint32_t currentOrder; + uint32_t nextMode; + + // Check the argument + ASSERT((targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_PDLP)|| + (targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_PDA) || + (targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_LP) || + (targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_A)); + + do { + currentOpMode = HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ); + while ( currentOpMode != HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEACK)); + if (currentOpMode != targetOpMode) + { + currentOrder = g_OpMode_to_order[currentOpMode]; + if ( currentOrder < g_OpMode_to_order[targetOpMode]) + { + nextMode = g_Order_to_OpMode[currentOrder + 1]; + } + else + { + nextMode = g_Order_to_OpMode[currentOrder - 1]; + } + HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ) = nextMode; + } + } while ( currentOpMode != targetOpMode ); +} diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_sysif.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_sysif.h new file mode 100644 index 000000000..04214bc1a --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_sysif.h @@ -0,0 +1,154 @@ +/****************************************************************************** +* Filename: aux_sysif.h +* Revised: 2017-06-27 08:41:49 +0200 (Tue, 27 Jun 2017) +* Revision: 49245 +* +* Description: Defines and prototypes for the AUX System Interface +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +//***************************************************************************** +// +//! \addtogroup aux_group +//! @{ +//! \addtogroup auxsysif_api +//! @{ +// +//***************************************************************************** + +#ifndef __AUX_SYSIF_H__ +#define __AUX_SYSIF_H__ + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include +#include "../inc/hw_types.h" +#include "../inc/hw_memmap.h" +#include "../inc/hw_aux_sysif.h" +#include "debug.h" + +//***************************************************************************** +// +// Support for DriverLib in ROM: +// This section renames all functions that are not "static inline", so that +// calling these functions will default to implementation in flash. At the end +// of this file a second renaming will change the defaults to implementation in +// ROM for available functions. +// +// To force use of the implementation in flash, e.g. for debugging: +// - Globally: Define DRIVERLIB_NOROM at project level +// - Per function: Use prefix "NOROM_" when calling the function +// +//***************************************************************************** +#if !defined(DOXYGEN) + #define AUXSYSIFOpModeChange NOROM_AUXSYSIFOpModeChange +#endif + + +//***************************************************************************** +// +// API Functions and prototypes +// +//***************************************************************************** + +//***************************************************************************** +// +// Defines for AUX operational modes. +// +//***************************************************************************** +#define AUX_SYSIF_OPMODE_TARGET_PDLP (AUX_SYSIF_OPMODEREQ_REQ_PDLP) +#define AUX_SYSIF_OPMODE_TARGET_PDA (AUX_SYSIF_OPMODEREQ_REQ_PDA) +#define AUX_SYSIF_OPMODE_TARGET_LP (AUX_SYSIF_OPMODEREQ_REQ_LP) +#define AUX_SYSIF_OPMODE_TARGET_A (AUX_SYSIF_OPMODEREQ_REQ_A) + +//***************************************************************************** +// +//! \brief Changes the AUX operational mode to the requested target mode. +//! +//! This function controls the change of the AUX operational mode. +//! The function controls the change of the current operational mode to the +//! operational mode target by adhering to rules specified by HW. +//! +//! \param targetOpMode +//! AUX operational mode: +//! - \ref AUX_SYSIF_OPMODE_TARGET_PDLP (Powerdown operational mode with wakeup to lowpower mode) +//! - \ref AUX_SYSIF_OPMODE_TARGET_PDA (Powerdown operational mode with wakeup to active mode) +//! - \ref AUX_SYSIF_OPMODE_TARGET_LP (Lowpower operational mode) +//! - \ref AUX_SYSIF_OPMODE_TARGET_A (Active operational mode) +//! +//! \return None +// +//***************************************************************************** +extern void AUXSYSIFOpModeChange(uint32_t targetOpMode); + +//***************************************************************************** +// +// Support for DriverLib in ROM: +// Redirect to implementation in ROM when available. +// +//***************************************************************************** +#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN) + #include "../driverlib/rom.h" + #ifdef ROM_AUXSYSIFOpModeChange + #undef AUXSYSIFOpModeChange + #define AUXSYSIFOpModeChange ROM_AUXSYSIFOpModeChange + #endif +#endif + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // __AUX_SYSIF_H__ + +//***************************************************************************** +// +//! Close the Doxygen group. +//! @} +//! @} +// +//***************************************************************************** diff --git a/third_party/ti/devices/cc26x2/driverlib/aux_tdc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_tdc.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/aux_tdc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_tdc.c diff --git a/third_party/ti/devices/cc26x2/driverlib/aux_tdc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_tdc.h similarity index 78% rename from third_party/ti/devices/cc26x2/driverlib/aux_tdc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_tdc.h index 7c869b116..402c83423 100644 --- a/third_party/ti/devices/cc26x2/driverlib/aux_tdc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/aux_tdc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_tdc.h -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the AUX Time-to-Digital Converter * @@ -128,19 +128,6 @@ extern "C" #define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event #define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW) // Falling edge polarity for stop event -#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2) -#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA) -#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB) -#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_ISRC_RESET) -#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER0_EV) -#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER1_EV) -#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_SMPH_AUTOTAKE_DONE) -#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_ADC_DONE) -#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_ADC_FIFO_ALMOST_FULL) -#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX0) -#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX1) -#define AUXTDC_STOP_AON_SW (AUX_TDC_TRIGSRC_STOP_SRC_AON_SW) -#define AUXTDC_STOP_AON_PROG_WU (AUX_TDC_TRIGSRC_STOP_SRC_AON_PROG_WU) #define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0) #define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1) #define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2) @@ -157,26 +144,58 @@ extern "C" #define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13) #define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14) #define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15) +#define AUXTDC_STOP_AUXIO16 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO16) +#define AUXTDC_STOP_AUXIO17 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO17) +#define AUXTDC_STOP_AUXIO18 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO18) +#define AUXTDC_STOP_AUXIO19 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO19) +#define AUXTDC_STOP_AUXIO20 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO20) +#define AUXTDC_STOP_AUXIO21 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO21) +#define AUXTDC_STOP_AUXIO22 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO22) +#define AUXTDC_STOP_AUXIO23 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO23) +#define AUXTDC_STOP_AUXIO24 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO24) +#define AUXTDC_STOP_AUXIO25 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO25) +#define AUXTDC_STOP_AUXIO26 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO26) +#define AUXTDC_STOP_AUXIO27 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO27) +#define AUXTDC_STOP_AUXIO28 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO28) +#define AUXTDC_STOP_AUXIO29 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO29) +#define AUXTDC_STOP_AUXIO30 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO30) +#define AUXTDC_STOP_AUXIO31 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO31) +#define AUXTDC_STOP_MANUAL_EV (AUX_TDC_TRIGSRC_STOP_SRC_MANUAL_EV) +#define AUXTDC_STOP_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2_DLY) +#define AUXTDC_STOP_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_4KHZ) +#define AUXTDC_STOP_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_BAT_UPD) +#define AUXTDC_STOP_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_TEMP_UPD) +#define AUXTDC_STOP_SCLK_LF (AUX_TDC_TRIGSRC_STOP_SRC_SCLK_LF) +#define AUXTDC_STOP_PWR_DWN (AUX_TDC_TRIGSRC_STOP_SRC_PWR_DWN) +#define AUXTDC_STOP_MCU_ACTIVE (AUX_TDC_TRIGSRC_STOP_SRC_MCU_ACTIVE) +#define AUXTDC_STOP_VDDR_RECHARGE (AUX_TDC_TRIGSRC_STOP_SRC_VDDR_RECHARGE) +#define AUXTDC_STOP_TIMER2_EV0 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV0) +#define AUXTDC_STOP_TIMER2_EV1 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV1) +#define AUXTDC_STOP_TIMER2_EV2 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV2) +#define AUXTDC_STOP_TIMER2_EV3 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV3) +#define AUXTDC_STOP_TIMER2_PULSE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_PULSE) +#define AUXTDC_STOP_TDC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_DONE) +#define AUXTDC_STOP_ADC_IRQ (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_IRQ) +#define AUXTDC_STOP_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_NOT_EMPTY) +#define AUXTDC_STOP_NO_EVENT (AUX_TDC_TRIGSRC_STOP_SRC_NO_EVENT) +#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_DONE) +#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_ALMOST_FULL) +#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ISRC_RESET_N) +#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX0) +#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX1) +#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_SMPH_AUTOTAKE_DONE) +#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_PRE) +#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER0_EV) +#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER1_EV) +#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2) +#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA) +#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB) #define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF) #define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV) -#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_TDC_PRE) #define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event #define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW) // Falling edge polarity for start event -#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2) -#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA) -#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB) -#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_ISRC_RESET) -#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER0_EV) -#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER1_EV) -#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_SMPH_AUTOTAKE_DONE) -#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_ADC_DONE) -#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_ADC_FIFO_ALMOST_FULL) -#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX0) -#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX1) -#define AUXTDC_START_AON_SW (AUX_TDC_TRIGSRC_START_SRC_AON_SW) -#define AUXTDC_START_AON_PROG_WU (AUX_TDC_TRIGSRC_START_SRC_AON_PROG_WU) #define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0) #define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1) #define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2) @@ -193,9 +212,54 @@ extern "C" #define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13) #define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14) #define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15) +#define AUXTDC_START_AUXIO16 (AUX_TDC_TRIGSRC_START_SRC_AUXIO16) +#define AUXTDC_START_AUXIO17 (AUX_TDC_TRIGSRC_START_SRC_AUXIO17) +#define AUXTDC_START_AUXIO18 (AUX_TDC_TRIGSRC_START_SRC_AUXIO18) +#define AUXTDC_START_AUXIO19 (AUX_TDC_TRIGSRC_START_SRC_AUXIO19) +#define AUXTDC_START_AUXIO20 (AUX_TDC_TRIGSRC_START_SRC_AUXIO20) +#define AUXTDC_START_AUXIO21 (AUX_TDC_TRIGSRC_START_SRC_AUXIO21) +#define AUXTDC_START_AUXIO22 (AUX_TDC_TRIGSRC_START_SRC_AUXIO22) +#define AUXTDC_START_AUXIO23 (AUX_TDC_TRIGSRC_START_SRC_AUXIO23) +#define AUXTDC_START_AUXIO24 (AUX_TDC_TRIGSRC_START_SRC_AUXIO24) +#define AUXTDC_START_AUXIO25 (AUX_TDC_TRIGSRC_START_SRC_AUXIO25) +#define AUXTDC_START_AUXIO26 (AUX_TDC_TRIGSRC_START_SRC_AUXIO26) +#define AUXTDC_START_AUXIO27 (AUX_TDC_TRIGSRC_START_SRC_AUXIO27) +#define AUXTDC_START_AUXIO28 (AUX_TDC_TRIGSRC_START_SRC_AUXIO28) +#define AUXTDC_START_AUXIO29 (AUX_TDC_TRIGSRC_START_SRC_AUXIO29) +#define AUXTDC_START_AUXIO30 (AUX_TDC_TRIGSRC_START_SRC_AUXIO30) +#define AUXTDC_START_AUXIO31 (AUX_TDC_TRIGSRC_START_SRC_AUXIO31) +#define AUXTDC_START_MANUAL_EV (AUX_TDC_TRIGSRC_START_SRC_MANUAL_EV) +#define AUXTDC_START_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2_DLY) +#define AUXTDC_START_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_4KHZ) +#define AUXTDC_START_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_BAT_UPD) +#define AUXTDC_START_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_TEMP_UPD) +#define AUXTDC_START_SCLK_LF (AUX_TDC_TRIGSRC_START_SRC_SCLK_LF) +#define AUXTDC_START_PWR_DWN (AUX_TDC_TRIGSRC_START_SRC_PWR_DWN) +#define AUXTDC_START_MCU_ACTIVE (AUX_TDC_TRIGSRC_START_SRC_MCU_ACTIVE) +#define AUXTDC_START_VDDR_RECHARGE (AUX_TDC_TRIGSRC_START_SRC_VDDR_RECHARGE) +#define AUXTDC_START_TIMER2_EV0 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV0) +#define AUXTDC_START_TIMER2_EV1 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV1) +#define AUXTDC_START_TIMER2_EV2 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV2) +#define AUXTDC_START_TIMER2_EV3 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV3) +#define AUXTDC_START_TIMER2_PULSE (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_PULSE) +#define AUXTDC_START_TDC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_DONE) +#define AUXTDC_START_ADC_IRQ (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_IRQ) +#define AUXTDC_START_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_NOT_EMPTY) +#define AUXTDC_START_NO_EVENT (AUX_TDC_TRIGSRC_START_SRC_NO_EVENT) +#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_DONE) +#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_ALMOST_FULL) +#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_AUX_ISRC_RESET_N) +#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX0) +#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX1) +#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_SMPH_AUTOTAKE_DONE) +#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_PRE) +#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER0_EV) +#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER1_EV) +#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2) +#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA) +#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB) #define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF) #define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV) -#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_TDC_PRE) //***************************************************************************** // @@ -286,19 +350,6 @@ AUXTDCStatusGet(uint32_t ui32Base) //! //! The \c ui32StartCondition must be a bitwise OR of the start event and the //! polarity of the start event. The start events are: -//! - \ref AUXTDC_START_AON_RTC_CH2 -//! - \ref AUXTDC_START_AUX_COMPA -//! - \ref AUXTDC_START_AUX_COMPB -//! - \ref AUXTDC_START_ISRC_RESET -//! - \ref AUXTDC_START_TIMER0_EV -//! - \ref AUXTDC_START_TIMER1_EV -//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE -//! - \ref AUXTDC_START_ADC_DONE -//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL -//! - \ref AUXTDC_START_OBSMUX0 -//! - \ref AUXTDC_START_OBSMUX1 -//! - \ref AUXTDC_START_AON_SW -//! - \ref AUXTDC_START_AON_PROG_WU //! - \ref AUXTDC_START_AUXIO0 //! - \ref AUXTDC_START_AUXIO1 //! - \ref AUXTDC_START_AUXIO2 @@ -315,28 +366,60 @@ AUXTDCStatusGet(uint32_t ui32Base) //! - \ref AUXTDC_START_AUXIO13 //! - \ref AUXTDC_START_AUXIO14 //! - \ref AUXTDC_START_AUXIO15 +//! - \ref AUXTDC_START_AUXIO16 +//! - \ref AUXTDC_START_AUXIO17 +//! - \ref AUXTDC_START_AUXIO18 +//! - \ref AUXTDC_START_AUXIO19 +//! - \ref AUXTDC_START_AUXIO20 +//! - \ref AUXTDC_START_AUXIO21 +//! - \ref AUXTDC_START_AUXIO22 +//! - \ref AUXTDC_START_AUXIO23 +//! - \ref AUXTDC_START_AUXIO24 +//! - \ref AUXTDC_START_AUXIO25 +//! - \ref AUXTDC_START_AUXIO26 +//! - \ref AUXTDC_START_AUXIO27 +//! - \ref AUXTDC_START_AUXIO28 +//! - \ref AUXTDC_START_AUXIO29 +//! - \ref AUXTDC_START_AUXIO30 +//! - \ref AUXTDC_START_AUXIO31 +//! - \ref AUXTDC_START_MANUAL_EV +//! - \ref AUXTDC_START_AON_RTC_CH2_DLY +//! - \ref AUXTDC_START_AON_RTC_4KHZ +//! - \ref AUXTDC_START_AON_BATMON_BAT_UPD +//! - \ref AUXTDC_START_AON_BATMON_TEMP_UPD +//! - \ref AUXTDC_START_SCLK_LF +//! - \ref AUXTDC_START_PWR_DWN +//! - \ref AUXTDC_START_MCU_ACTIVE +//! - \ref AUXTDC_START_VDDR_RECHARGE +//! - \ref AUXTDC_START_TIMER2_EV0 +//! - \ref AUXTDC_START_TIMER2_EV1 +//! - \ref AUXTDC_START_TIMER2_EV2 +//! - \ref AUXTDC_START_TIMER2_EV3 +//! - \ref AUXTDC_START_TIMER2_PULSE +//! - \ref AUXTDC_START_TDC_DONE +//! - \ref AUXTDC_START_ADC_IRQ +//! - \ref AUXTDC_START_ADC_FIFO_NOT_EMPTY +//! - \ref AUXTDC_START_NO_EVENT +//! - \ref AUXTDC_START_ADC_DONE +//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL +//! - \ref AUXTDC_START_ISRC_RESET +//! - \ref AUXTDC_START_OBSMUX0 +//! - \ref AUXTDC_START_OBSMUX1 +//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE +//! - \ref AUXTDC_START_TDC_PRE +//! - \ref AUXTDC_START_TIMER0_EV +//! - \ref AUXTDC_START_TIMER1_EV +//! - \ref AUXTDC_START_AON_RTC_CH2 +//! - \ref AUXTDC_START_AUX_COMPA +//! - \ref AUXTDC_START_AUX_COMPB //! - \ref AUXTDC_START_ACLK_REF //! - \ref AUXTDC_START_MCU_EV -//! - \ref AUXTDC_START_TDC_PRE //! //! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS //! or falling \ref AUXTDC_STARTPOL_FALL. //! //! The \c ui32StopCondition must be a bitwise OR of the stop event and the //! polarity of the stop event. The stop events are: -//! - \ref AUXTDC_STOP_AON_RTC_CH2 -//! - \ref AUXTDC_STOP_AUX_COMPA -//! - \ref AUXTDC_STOP_AUX_COMPB -//! - \ref AUXTDC_STOP_ISRC_RESET -//! - \ref AUXTDC_STOP_TIMER0_EV -//! - \ref AUXTDC_STOP_TIMER1_EV -//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE -//! - \ref AUXTDC_STOP_ADC_DONE -//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL -//! - \ref AUXTDC_STOP_OBSMUX0 -//! - \ref AUXTDC_STOP_OBSMUX1 -//! - \ref AUXTDC_STOP_AON_SW -//! - \ref AUXTDC_STOP_AON_PROG_WU //! - \ref AUXTDC_STOP_AUXIO0 //! - \ref AUXTDC_STOP_AUXIO1 //! - \ref AUXTDC_STOP_AUXIO2 @@ -353,9 +436,54 @@ AUXTDCStatusGet(uint32_t ui32Base) //! - \ref AUXTDC_STOP_AUXIO13 //! - \ref AUXTDC_STOP_AUXIO14 //! - \ref AUXTDC_STOP_AUXIO15 +//! - \ref AUXTDC_STOP_AUXIO16 +//! - \ref AUXTDC_STOP_AUXIO17 +//! - \ref AUXTDC_STOP_AUXIO18 +//! - \ref AUXTDC_STOP_AUXIO19 +//! - \ref AUXTDC_STOP_AUXIO20 +//! - \ref AUXTDC_STOP_AUXIO21 +//! - \ref AUXTDC_STOP_AUXIO22 +//! - \ref AUXTDC_STOP_AUXIO23 +//! - \ref AUXTDC_STOP_AUXIO24 +//! - \ref AUXTDC_STOP_AUXIO25 +//! - \ref AUXTDC_STOP_AUXIO26 +//! - \ref AUXTDC_STOP_AUXIO27 +//! - \ref AUXTDC_STOP_AUXIO28 +//! - \ref AUXTDC_STOP_AUXIO29 +//! - \ref AUXTDC_STOP_AUXIO30 +//! - \ref AUXTDC_STOP_AUXIO31 +//! - \ref AUXTDC_STOP_MANUAL_EV +//! - \ref AUXTDC_STOP_AON_RTC_CH2_DLY +//! - \ref AUXTDC_STOP_AON_RTC_4KHZ +//! - \ref AUXTDC_STOP_AON_BATMON_BAT_UPD +//! - \ref AUXTDC_STOP_AON_BATMON_TEMP_UPD +//! - \ref AUXTDC_STOP_SCLK_LF +//! - \ref AUXTDC_STOP_PWR_DWN +//! - \ref AUXTDC_STOP_MCU_ACTIVE +//! - \ref AUXTDC_STOP_VDDR_RECHARGE +//! - \ref AUXTDC_STOP_TIMER2_EV0 +//! - \ref AUXTDC_STOP_TIMER2_EV1 +//! - \ref AUXTDC_STOP_TIMER2_EV2 +//! - \ref AUXTDC_STOP_TIMER2_EV3 +//! - \ref AUXTDC_STOP_TIMER2_PULSE +//! - \ref AUXTDC_STOP_TDC_DONE +//! - \ref AUXTDC_STOP_ADC_IRQ +//! - \ref AUXTDC_STOP_ADC_FIFO_NOT_EMPTY +//! - \ref AUXTDC_STOP_NO_EVENT +//! - \ref AUXTDC_STOP_ADC_DONE +//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL +//! - \ref AUXTDC_STOP_ISRC_RESET +//! - \ref AUXTDC_STOP_OBSMUX0 +//! - \ref AUXTDC_STOP_OBSMUX1 +//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE +//! - \ref AUXTDC_STOP_TDC_PRE +//! - \ref AUXTDC_STOP_TIMER0_EV +//! - \ref AUXTDC_STOP_TIMER1_EV +//! - \ref AUXTDC_STOP_AON_RTC_CH2 +//! - \ref AUXTDC_STOP_AUX_COMPA +//! - \ref AUXTDC_STOP_AUX_COMPB //! - \ref AUXTDC_STOP_ACLK_REF //! - \ref AUXTDC_STOP_MCU_EV -//! - \ref AUXTDC_STOP_TDC_PRE //! //! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS //! or falling \ref AUXTDC_STOPPOL_FALL. diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/ccs/driverlib.lib b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/driverlib.lib similarity index 58% rename from third_party/ti/devices/cc26x2/driverlib/bin/ccs/driverlib.lib rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/driverlib.lib index 609b11e9e..0f663e6ce 100644 Binary files a/third_party/ti/devices/cc26x2/driverlib/bin/ccs/driverlib.lib and b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/driverlib.lib differ diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/ccs/makedefs b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/makedefs similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/bin/ccs/makedefs rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/makedefs diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/ccs/makefile b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/makefile similarity index 92% rename from third_party/ti/devices/cc26x2/driverlib/bin/ccs/makefile rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/makefile index c68000c52..6904fb041 100644 --- a/third_party/ti/devices/cc26x2/driverlib/bin/ccs/makefile +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/ccs/makefile @@ -31,6 +31,8 @@ all : @ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_adc.c" @ echo CCS: Compile aux_smph.c @ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_smph.c" + @ echo CCS: Compile aux_sysif.c + @ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_sysif.c" @ echo CCS: Compile aux_tdc.c @ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_tdc.c" @ echo CCS: Compile ccfgread.c @@ -102,7 +104,7 @@ all : @ echo CCS: Compile watchdog.c @ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/watchdog.c" @ echo CCS: Archive driverlib.lib - @ $(ARCHIVER_TOOL) r "driverlib.lib" "$(MAKEFILE_DIR)adi.obj" "$(MAKEFILE_DIR)aes.obj" "$(MAKEFILE_DIR)aon_batmon.obj" "$(MAKEFILE_DIR)aon_event.obj" "$(MAKEFILE_DIR)aon_ioc.obj" "$(MAKEFILE_DIR)aon_pmctl.obj" "$(MAKEFILE_DIR)aon_rtc.obj" "$(MAKEFILE_DIR)aux_adc.obj" "$(MAKEFILE_DIR)aux_smph.obj" "$(MAKEFILE_DIR)aux_tdc.obj" "$(MAKEFILE_DIR)ccfgread.obj" "$(MAKEFILE_DIR)chipinfo.obj" "$(MAKEFILE_DIR)cpu.obj" "$(MAKEFILE_DIR)crypto.obj" "$(MAKEFILE_DIR)ddi.obj" "$(MAKEFILE_DIR)debug.obj" "$(MAKEFILE_DIR)driverlib_release.obj" "$(MAKEFILE_DIR)event.obj" "$(MAKEFILE_DIR)flash.obj" "$(MAKEFILE_DIR)gpio.obj" "$(MAKEFILE_DIR)i2c.obj" "$(MAKEFILE_DIR)i2s.obj" "$(MAKEFILE_DIR)interrupt.obj" "$(MAKEFILE_DIR)ioc.obj" "$(MAKEFILE_DIR)osc.obj" "$(MAKEFILE_DIR)pka.obj" "$(MAKEFILE_DIR)prcm.obj" "$(MAKEFILE_DIR)pwr_ctrl.obj" "$(MAKEFILE_DIR)rfc.obj" "$(MAKEFILE_DIR)setup.obj" "$(MAKEFILE_DIR)setup_rom.obj" "$(MAKEFILE_DIR)sha2.obj" "$(MAKEFILE_DIR)smph.obj" "$(MAKEFILE_DIR)ssi.obj" "$(MAKEFILE_DIR)sw_chacha.obj" "$(MAKEFILE_DIR)sw_poly1305-donna.obj" "$(MAKEFILE_DIR)systick.obj" "$(MAKEFILE_DIR)sys_ctrl.obj" "$(MAKEFILE_DIR)timer.obj" "$(MAKEFILE_DIR)trng.obj" "$(MAKEFILE_DIR)uart.obj" "$(MAKEFILE_DIR)udma.obj" "$(MAKEFILE_DIR)vims.obj" "$(MAKEFILE_DIR)watchdog.obj" + @ $(ARCHIVER_TOOL) r "driverlib.lib" "$(MAKEFILE_DIR)adi.obj" "$(MAKEFILE_DIR)aes.obj" "$(MAKEFILE_DIR)aon_batmon.obj" "$(MAKEFILE_DIR)aon_event.obj" "$(MAKEFILE_DIR)aon_ioc.obj" "$(MAKEFILE_DIR)aon_pmctl.obj" "$(MAKEFILE_DIR)aon_rtc.obj" "$(MAKEFILE_DIR)aux_adc.obj" "$(MAKEFILE_DIR)aux_smph.obj" "$(MAKEFILE_DIR)aux_sysif.obj" "$(MAKEFILE_DIR)aux_tdc.obj" "$(MAKEFILE_DIR)ccfgread.obj" "$(MAKEFILE_DIR)chipinfo.obj" "$(MAKEFILE_DIR)cpu.obj" "$(MAKEFILE_DIR)crypto.obj" "$(MAKEFILE_DIR)ddi.obj" "$(MAKEFILE_DIR)debug.obj" "$(MAKEFILE_DIR)driverlib_release.obj" "$(MAKEFILE_DIR)event.obj" "$(MAKEFILE_DIR)flash.obj" "$(MAKEFILE_DIR)gpio.obj" "$(MAKEFILE_DIR)i2c.obj" "$(MAKEFILE_DIR)i2s.obj" "$(MAKEFILE_DIR)interrupt.obj" "$(MAKEFILE_DIR)ioc.obj" "$(MAKEFILE_DIR)osc.obj" "$(MAKEFILE_DIR)pka.obj" "$(MAKEFILE_DIR)prcm.obj" "$(MAKEFILE_DIR)pwr_ctrl.obj" "$(MAKEFILE_DIR)rfc.obj" "$(MAKEFILE_DIR)setup.obj" "$(MAKEFILE_DIR)setup_rom.obj" "$(MAKEFILE_DIR)sha2.obj" "$(MAKEFILE_DIR)smph.obj" "$(MAKEFILE_DIR)ssi.obj" "$(MAKEFILE_DIR)sw_chacha.obj" "$(MAKEFILE_DIR)sw_poly1305-donna.obj" "$(MAKEFILE_DIR)systick.obj" "$(MAKEFILE_DIR)sys_ctrl.obj" "$(MAKEFILE_DIR)timer.obj" "$(MAKEFILE_DIR)trng.obj" "$(MAKEFILE_DIR)uart.obj" "$(MAKEFILE_DIR)udma.obj" "$(MAKEFILE_DIR)vims.obj" "$(MAKEFILE_DIR)watchdog.obj" @ rm -f $(MAKEFILE_DIR)*.obj # Deletes previous output and temporary files diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a similarity index 59% rename from third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a index 4732c4925..6e6a57be5 100644 Binary files a/third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a and b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a differ diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/gcc/makedefs b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/makedefs similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/bin/gcc/makedefs rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/makedefs diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/gcc/makefile b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/makefile similarity index 92% rename from third_party/ti/devices/cc26x2/driverlib/bin/gcc/makefile rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/makefile index 528799471..73ea2dcf0 100644 --- a/third_party/ti/devices/cc26x2/driverlib/bin/gcc/makefile +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/makefile @@ -31,6 +31,8 @@ all : @ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c @ echo GCC: Compile aux_smph.c @ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c + @ echo GCC: Compile aux_sysif.c + @ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_sysif.o" $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c @ echo GCC: Compile aux_tdc.c @ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c @ echo GCC: Compile ccfgread.c @@ -102,7 +104,7 @@ all : @ echo GCC: Compile watchdog.c @ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c @ echo GCC: Archive driverlib.lib - @ $(ARCHIVER_TOOL) rcs $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o + @ $(ARCHIVER_TOOL) rcs $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o @ rm -f $(MAKEFILE_DIR)*.o # Deletes previous output and temporary files diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/iar/driverlib.lib b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/driverlib.lib similarity index 54% rename from third_party/ti/devices/cc26x2/driverlib/bin/iar/driverlib.lib rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/driverlib.lib index 92e93f957..5c4ec94e3 100644 Binary files a/third_party/ti/devices/cc26x2/driverlib/bin/iar/driverlib.lib and b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/driverlib.lib differ diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/iar/makedefs b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/makedefs similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/bin/iar/makedefs rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/makedefs diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/iar/makefile b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/makefile similarity index 93% rename from third_party/ti/devices/cc26x2/driverlib/bin/iar/makefile rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/makefile index e94187a6c..f8e350027 100644 --- a/third_party/ti/devices/cc26x2/driverlib/bin/iar/makefile +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/iar/makefile @@ -45,6 +45,9 @@ all : @ echo IAR: Compile aux_smph.c @ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_smph.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_smph.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent @ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_smph.o + @ echo IAR: Compile aux_sysif.c + @ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_sysif.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent + @ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_sysif.o @ echo IAR: Compile aux_tdc.c @ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_tdc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent @ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_tdc.o @@ -151,7 +154,7 @@ all : @ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/watchdog.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)watchdog.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent @ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)watchdog.o $(MAKEFILE_DIR)watchdog.o @ echo IAR: Archive driverlib.lib - @ $(ARCHIVER_TOOL) $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o --create -o $(MAKEFILE_DIR)driverlib.lib + @ $(ARCHIVER_TOOL) $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o --create -o $(MAKEFILE_DIR)driverlib.lib @ rm -f $(MAKEFILE_DIR)*.o # Deletes previous output and temporary files diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/keil/driverlib.lib b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/driverlib.lib similarity index 58% rename from third_party/ti/devices/cc26x2/driverlib/bin/keil/driverlib.lib rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/driverlib.lib index 1e116b12d..51d5922a0 100644 Binary files a/third_party/ti/devices/cc26x2/driverlib/bin/keil/driverlib.lib and b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/driverlib.lib differ diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/keil/makedefs b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/makedefs similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/bin/keil/makedefs rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/makedefs diff --git a/third_party/ti/devices/cc26x2/driverlib/bin/keil/makefile b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/makefile similarity index 90% rename from third_party/ti/devices/cc26x2/driverlib/bin/keil/makefile rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/makefile index 97696992d..14f8d8a05 100644 --- a/third_party/ti/devices/cc26x2/driverlib/bin/keil/makefile +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/keil/makefile @@ -31,6 +31,8 @@ all : @ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c @ echo KEIL: Compile aux_smph.c @ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c + @ echo KEIL: Compile aux_sysif.c + @ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_sysif.o" $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c @ echo KEIL: Compile aux_tdc.c @ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c @ echo KEIL: Compile ccfgread.c @@ -102,7 +104,7 @@ all : @ echo KEIL: Compile watchdog.c @ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c @ echo KEIL: Archive driverlib.lib - @ $(ARCHIVER_TOOL) --create $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o + @ $(ARCHIVER_TOOL) --create $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o @ rm -f $(MAKEFILE_DIR)*.o # Deletes previous output and temporary files diff --git a/third_party/ti/devices/cc26x2/driverlib/ccfgread.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ccfgread.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ccfgread.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ccfgread.c diff --git a/third_party/ti/devices/cc26x2/driverlib/ccfgread.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ccfgread.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ccfgread.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ccfgread.h diff --git a/third_party/ti/devices/cc26x2/driverlib/ccfgread_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ccfgread_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ccfgread_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ccfgread_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/chipinfo.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/chipinfo.c similarity index 72% rename from third_party/ti/devices/cc26x2/driverlib/chipinfo.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/chipinfo.c index 7fcd763f2..36c3ca8ea 100644 --- a/third_party/ti/devices/cc26x2/driverlib/chipinfo.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/chipinfo.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: chipinfo.c -* Revised: 2017-01-06 12:37:45 +0100 (Fri, 06 Jan 2017) -* Revision: 48166 +* Revised: 2018-01-29 18:45:34 +0100 (Mon, 29 Jan 2018) +* Revision: 51355 * * Description: Collection of functions returning chip information. * @@ -55,8 +55,8 @@ #define ChipInfo_GetChipFamily NOROM_ChipInfo_GetChipFamily #undef ChipInfo_GetHwRevision #define ChipInfo_GetHwRevision NOROM_ChipInfo_GetHwRevision - #undef ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated - #define ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated + #undef ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated + #define ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated #endif //***************************************************************************** @@ -108,7 +108,7 @@ ChipInfo_GetChipFamily( void ) FCFG1_ICEPICK_DEVICE_ID_WAFER_ID_S ) ; if ( waferId == 0xBB41 ) { - chipFam = FAMILY_CC13x2_13x4_26x2_26x4 ; + chipFam = FAMILY_CC13x2_CC26x2 ; } return ( chipFam ); @@ -123,10 +123,40 @@ ChipType_t ChipInfo_GetChipType( void ) { ChipType_t chipType = CHIP_TYPE_Unknown ; + ChipFamily_t chipFam = ChipInfo_GetChipFamily() ; + uint32_t fcfg1UserId = ChipInfo_GetUserId() ; + uint32_t fcfg1Protocol = (( fcfg1UserId & FCFG1_USER_ID_PROTOCOL_M ) >> + FCFG1_USER_ID_PROTOCOL_S ) ; + uint32_t fcfg1Cc13 = (( fcfg1UserId & FCFG1_USER_ID_CC13_M ) >> + FCFG1_USER_ID_CC13_S ) ; + uint32_t fcfg1Pa = (( fcfg1UserId & FCFG1_USER_ID_PA_M ) >> + FCFG1_USER_ID_PA_S ) ; - // TBD - // TBD Definition of ChipType for CC13x2, CC13x4, CC26x2 and CC26x4 in function ChipInfo_GetChipType() must be defined before RTM - // TBD + if ( chipFam == FAMILY_CC13x2_CC26x2 ) { + switch ( fcfg1Protocol ) { + case 0xF : + if( fcfg1Cc13 ) { + if ( fcfg1Pa ) { + chipType = CHIP_TYPE_CC1352P ; + } else { + chipType = CHIP_TYPE_CC1352 ; + } + } else { + chipType = CHIP_TYPE_CC2652 ; + } + break; + case 0x9 : + if( fcfg1Pa ) { + chipType = CHIP_TYPE_unused ; + } else { + chipType = CHIP_TYPE_CC2642 ; + } + break; + case 0x8 : + chipType = CHIP_TYPE_CC1312 ; + break; + } + } return ( chipType ); } @@ -144,11 +174,14 @@ ChipInfo_GetHwRevision( void ) uint32_t minorHwRev = ChipInfo_GetMinorHwRev() ; ChipFamily_t chipFam = ChipInfo_GetChipFamily() ; - if ( chipFam == FAMILY_CC13x2_13x4_26x2_26x4 ) { + if ( chipFam == FAMILY_CC13x2_CC26x2 ) { switch ( fcfg1Rev ) { - case 0 : // CC13x2, CC13x4, CC26x2, CC26x4 - PG1.0 (or later) - case 1 : // CC13x2, CC13x4, CC26x2, CC26x4 - PG1.01 (will show up as PG1.0 as long as minorHwRev=0) - hwRev = (HwRevision_t)(((uint32_t)HWREV_1_0 ) + minorHwRev ); + case 0 : // CC13x2, CC26x2 - PG1.0 + case 1 : // CC13x2, CC26x2 - PG1.01 (will also show up as PG1.0) + hwRev = (HwRevision_t)((uint32_t)HWREV_1_0 ); + break; + case 2 : // CC13x2, CC26x2 - PG1.1 (or later) + hwRev = (HwRevision_t)(((uint32_t)HWREV_1_1 ) + minorHwRev ); break; } } @@ -157,16 +190,16 @@ ChipInfo_GetHwRevision( void ) } //***************************************************************************** -// ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated() +// ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated() //***************************************************************************** void -ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated( void ) +ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated( void ) { - if ( ! ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4() ) + if ( ! ChipInfo_ChipFamilyIs_CC13x2_CC26x2() ) { while(1) { - // This driverlib version is for the CCxxx2/xxx4 chips. + // This driverlib version is for the CC13x2/CC26x2 chips. // Do nothing - stay here forever } } diff --git a/third_party/ti/devices/cc26x2/driverlib/chipinfo.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/chipinfo.h similarity index 87% rename from third_party/ti/devices/cc26x2/driverlib/chipinfo.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/chipinfo.h index b06f05d61..c83005943 100644 --- a/third_party/ti/devices/cc26x2/driverlib/chipinfo.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/chipinfo.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: chipinfo.h -* Revised: 2017-01-19 13:55:31 +0100 (Thu, 19 Jan 2017) -* Revision: 48292 +* Revised: 2018-05-01 11:59:00 +0200 (Tue, 01 May 2018) +* Revision: 51944 * * Description: Collection of functions returning chip information. * @@ -84,7 +84,7 @@ extern "C" #define ChipInfo_GetChipType NOROM_ChipInfo_GetChipType #define ChipInfo_GetChipFamily NOROM_ChipInfo_GetChipFamily #define ChipInfo_GetHwRevision NOROM_ChipInfo_GetHwRevision - #define ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated + #define ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated #endif //***************************************************************************** @@ -143,10 +143,10 @@ ChipInfo_SupportsIEEE_802_15_4( void ) //***************************************************************************** // -//! \brief Returns true if the chip supports propriatary protocols. +//! \brief Returns true if the chip supports proprietary protocols. //! //! \return -//! Returns \c true if supporting propriatary protocols, \c false otherwise. +//! Returns \c true if supporting proprietary protocols, \c false otherwise. // //***************************************************************************** __STATIC_INLINE bool @@ -313,7 +313,7 @@ ChipInfo_GetMinorHwRev( void ) //! How to decode the USER_ID filed is described in the Technical Reference Manual (TRM) //! //! \return -//! Returns the the 32 bits USER_ID field +//! Returns the 32 bits USER_ID field // //***************************************************************************** __STATIC_INLINE uint32_t @@ -337,7 +337,13 @@ typedef enum { CHIP_TYPE_CC2650 = 5, //!< 5 means that this is a CC2650 chip. CHIP_TYPE_CUSTOM_0 = 6, //!< 6 means that this is a CUSTOM_0 chip. CHIP_TYPE_CUSTOM_1 = 7, //!< 7 means that this is a CUSTOM_1 chip. - CHIP_TYPE_CC2640R2 = 8 //!< 4 means that this is a CC2640R2 chip. + CHIP_TYPE_CC2640R2 = 8, //!< 8 means that this is a CC2640R2 chip. + CHIP_TYPE_CC2642 = 9, //!< 9 means that this is a CC2642 chip. + CHIP_TYPE_unused = 10,//!< 10 unused value + CHIP_TYPE_CC2652 = 11,//!< 11 means that this is a CC2652 chip. + CHIP_TYPE_CC1312 = 12,//!< 12 means that this is a CC1312 chip. + CHIP_TYPE_CC1352 = 13,//!< 13 means that this is a CC1352 chip. + CHIP_TYPE_CC1352P = 14 //!< 14 means that this is a CC1352P chip. } ChipType_t; //***************************************************************************** @@ -356,12 +362,12 @@ extern ChipType_t ChipInfo_GetChipType( void ); // //***************************************************************************** typedef enum { - FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown. - FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member. - FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member. - FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member. - FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents). - FAMILY_CC13x2_13x4_26x2_26x4 = 4 //!< 4 means that the chip is a CC13x2, CC13x4, CC26x2, CC26x4 family member. + FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown. + FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member. + FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member. + FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member. + FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents). + FAMILY_CC13x2_CC26x2 = 4 //!< 4 means that the chip is a CC13x2, CC26x2 family member. } ChipFamily_t; //***************************************************************************** @@ -374,6 +380,26 @@ typedef enum { //***************************************************************************** extern ChipFamily_t ChipInfo_GetChipFamily( void ); +//***************************************************************************** +// +// Options for the define THIS_DRIVERLIB_BUILD +// +//***************************************************************************** +#define DRIVERLIB_BUILD_CC26X0 0 //!< 0 is the driverlib build ID for the cc26x0 driverlib. +#define DRIVERLIB_BUILD_CC13X0 1 //!< 1 is the driverlib build ID for the cc13x0 driverlib. +#define DRIVERLIB_BUILD_CC26X1 2 //!< 2 is the driverlib build ID for the cc26x1 driverlib. +#define DRIVERLIB_BUILD_CC26X0R2 3 //!< 3 is the driverlib build ID for the cc26x0r2 driverlib. +#define DRIVERLIB_BUILD_CC13X2_CC26X2 4 //!< 4 is the driverlib build ID for the cc13x2_cc26x2 driverlib. + +//***************************************************************************** +// +//! \brief Define THIS_DRIVERLIB_BUILD, identifying current driverlib build ID. +//! +//! This driverlib build identifier can be useful for compile time checking/optimization (supporting C preprocessor expressions). +// +//***************************************************************************** +#define THIS_DRIVERLIB_BUILD DRIVERLIB_BUILD_CC13X2_CC26X2 + //***************************************************************************** // //! \brief Returns true if this chip is member of the CC13x0 family. @@ -432,16 +458,16 @@ ChipInfo_ChipFamilyIs_CC26x1( void ) //***************************************************************************** // -//! \brief Returns true if this chip is member of the CC13x2, CC13x4, CC26x2, CC26x4 family. +//! \brief Returns true if this chip is member of the CC13x2, CC26x2 family. //! //! \return -//! Returns \c true if this chip is member of the CC13x2, CC13x4, CC26x2, CC26x4 family, \c false otherwise. +//! Returns \c true if this chip is member of the CC13x2, CC26x2 family, \c false otherwise. // //***************************************************************************** __STATIC_INLINE bool -ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4( void ) +ChipInfo_ChipFamilyIs_CC13x2_CC26x2( void ) { - return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_13x4_26x2_26x4 ); + return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_CC26x2 ); } //***************************************************************************** @@ -452,7 +478,7 @@ ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4( void ) typedef enum { HWREV_Unknown = -1, //!< -1 means that the chip's HW revision is unknown. HWREV_1_0 = 10, //!< 10 means that the chip's HW revision is 1.0 - HWREV_1_1 = 11, //!< 10 means that the chip's HW revision is 1.0 + HWREV_1_1 = 11, //!< 11 means that the chip's HW revision is 1.1 HWREV_2_0 = 20, //!< 20 means that the chip's HW revision is 2.0 HWREV_2_1 = 21, //!< 21 means that the chip's HW revision is 2.1 HWREV_2_2 = 22, //!< 22 means that the chip's HW revision is 2.2 @@ -598,12 +624,12 @@ ChipInfo_HwRevisionIs_GTEQ_2_4( void ) //***************************************************************************** // -//! \brief Verifies that current chip is CC13x2, CC13x4, CC26x2 or CC26x4 and never returns if violated. +//! \brief Verifies that current chip is CC13x2 or CC26x2 and never returns if violated. //! //! \return None // //***************************************************************************** -extern void ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated( void ); +extern void ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated( void ); //***************************************************************************** // @@ -633,9 +659,9 @@ extern void ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated( void ); #undef ChipInfo_GetHwRevision #define ChipInfo_GetHwRevision ROM_ChipInfo_GetHwRevision #endif - #ifdef ROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated - #undef ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated - #define ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated ROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated + #ifdef ROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated + #undef ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated + #define ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated ROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated #endif #endif diff --git a/third_party/ti/devices/cc26x2/driverlib/cpu.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu.c similarity index 91% rename from third_party/ti/devices/cc26x2/driverlib/cpu.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu.c index bfb7e43d5..14d549e8b 100644 --- a/third_party/ti/devices/cc26x2/driverlib/cpu.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: cpu.c -* Revised: 2017-01-16 19:17:22 +0100 (Mon, 16 Jan 2017) -* Revision: 48249 +* Revised: 2018-05-08 10:04:01 +0200 (Tue, 08 May 2018) +* Revision: 51972 * * Description: Instruction wrappers for special CPU instructions needed by * the drivers. @@ -115,10 +115,11 @@ CPUcpsid(void) uint32_t ui32Ret; // Read PRIMASK and disable interrupts - __asm(" mrs r0, PRIMASK\n" - " cpsid i\n" - " bx lr\n" - : "=r"(ui32Ret)); + __asm volatile (" mrs %0, PRIMASK\n" + " cpsid i\n" + " bx lr\n" + : "=r"(ui32Ret) + ); // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact @@ -182,9 +183,10 @@ CPUprimask(void) uint32_t ui32Ret; // Read PRIMASK - __asm(" mrs r0, PRIMASK\n" - " bx lr\n" - : "=r"(ui32Ret)); + __asm volatile (" mrs %0, PRIMASK\n" + " bx lr\n" + : "=r"(ui32Ret) + ); // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact @@ -251,10 +253,11 @@ CPUcpsie(void) uint32_t ui32Ret; // Read PRIMASK and enable interrupts. - __asm(" mrs r0, PRIMASK\n" - " cpsie i\n" - " bx lr\n" - : "=r"(ui32Ret)); + __asm volatile (" mrs %0, PRIMASK\n" + " cpsie i\n" + " bx lr\n" + : "=r"(ui32Ret) + ); // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact @@ -318,9 +321,10 @@ CPUbasepriGet(void) uint32_t ui32Ret; // Read BASEPRI. - __asm(" mrs r0, BASEPRI\n" - " bx lr\n" - : "=r"(ui32Ret)); + __asm volatile (" mrs %0, BASEPRI\n" + " bx lr\n" + : "=r"(ui32Ret) + ); // The return is handled in the inline assembly, but the compiler will // still complain if there is not an explicit return here (despite the fact @@ -344,7 +348,7 @@ CPUdelay(uint32_t ui32Count) void CPUdelay(uint32_t ui32Count) { - // Delay the specified number of times (3 cycles pr. loop) + // Loop the specified number of times __asm("CPUdelay:\n" " subs r0, #1\n" " bne.n CPUdelay\n" @@ -366,7 +370,7 @@ CPUdel // For CCS implement this function in pure assembly. This prevents the TI // compiler from doing funny things with the optimizer. - // Delay the specified number of times (3 cycles pr. loop) + // Loop the specified number of times __asm(" .sect \".text:NOROM_CPUdelay\"\n" " .clink\n" " .thumbfunc NOROM_CPUdelay\n" @@ -377,12 +381,16 @@ __asm(" .sect \".text:NOROM_CPUdelay\"\n" " bne.n NOROM_CPUdelay\n" " bx lr\n"); #else +// GCC void __attribute__((naked)) CPUdelay(uint32_t ui32Count) { - // Delay the specified number of times (3 cycles pr. loop) - __asm(" subs r0, #1\n" - " bne NOROM_CPUdelay\n" - " bx lr"); + // Loop the specified number of times + __asm volatile ("%=: subs %0, #1\n" + " bne %=b\n" + " bx lr\n" + : /* No output */ + : "r" (ui32Count) + ); } #endif diff --git a/third_party/ti/devices/cc26x2/driverlib/cpu.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu.h similarity index 89% rename from third_party/ti/devices/cc26x2/driverlib/cpu.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu.h index 3c16a2cf1..531fbd439 100644 --- a/third_party/ti/devices/cc26x2/driverlib/cpu.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: cpu.h -* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017) -* Revision: 48248 +* Revised: 2017-08-21 13:20:52 +0200 (Mon, 21 Aug 2017) +* Revision: 49618 * * Description: Defines and prototypes for the CPU instruction wrapper * functions. @@ -135,7 +135,7 @@ extern uint32_t CPUcpsie(void); // //! \brief Get the interrupt priority disable level. //! -//! Use this function to get the the level of priority that will disable +//! Use this function to get the level of priority that will disable //! interrupts with a lower priority level. //! //! \return Returns the value of the \b BASEPRI register. @@ -145,13 +145,31 @@ extern uint32_t CPUbasepriGet(void); //***************************************************************************** // -//! \brief Provide a small delay. +//! \brief Provide a small delay using a simple loop counter. //! //! This function provides means for generating a constant length delay. It //! is written in assembly to keep the delay consistent across tool chains, //! avoiding the need to tune the delay based on the tool chain in use. //! -//! The loop takes 3 cycles/loop. +//! \note It is not recommended using this function for long delays. +//! +//! Notice that interrupts can affect the delay if not manually disabled in advance. +//! +//! The delay depends on where code resides and the path for code fetching: +//! - Code in flash, cache enabled, prefetch enabled : 4 cycles per loop (Default) +//! - Code in flash, cache enabled, prefetch disabled : 5 cycles per loop +//! - Code in flash, cache disabled : 7 cycles per loop +//! - Code in SRAM : 6 cycles per loop +//! - Code in GPRAM : 3 cycles per loop +//! +//! \note If using an RTOS, consider using RTOS provided delay functions because +//! these will not block task scheduling and will potentially save power. +//! +//! Calculate delay count based on the wanted delay in microseconds (us): +//! - ui32Count = [delay in us] * [CPU clock in MHz] / [cycles per loop] +//! +//! Example: 250 us delay with code in flash and with cache and prefetch enabled: +//! - ui32Count = 250 * 48 / 4 = 3000 //! //! \param ui32Count is the number of delay loop iterations to perform. //! @@ -203,7 +221,7 @@ __STATIC_INLINE void __attribute__((always_inline)) CPUwfi(void) { // Wait for the next interrupt. - __asm(" wfi\n"); + __asm volatile (" wfi\n"); } #endif @@ -250,7 +268,7 @@ __STATIC_INLINE void __attribute__((always_inline)) CPUwfe(void) { // Wait for the next event. - __asm(" wfe\n"); + __asm volatile (" wfe\n"); } #endif @@ -297,7 +315,7 @@ __STATIC_INLINE void __attribute__((always_inline)) CPUsev(void) { // Send event. - __asm(" sev\n"); + __asm volatile (" sev\n"); } #endif @@ -348,13 +366,12 @@ CPUbasepriSet(uint32_t ui32NewBasepri) __STATIC_INLINE void __attribute__ ((naked)) CPUbasepriSet(uint32_t ui32NewBasepri) { - // Set the BASEPRI register. - __asm(" msr BASEPRI, %0\n" - " bx lr\n" - : - : "r" (ui32NewBasepri) - : - ); + // Set the BASEPRI register. + __asm volatile (" msr BASEPRI, %0\n" + " bx lr\n" + : /* No output */ + : "r" (ui32NewBasepri) + ); } #pragma GCC diagnostic pop #endif diff --git a/third_party/ti/devices/cc26x2/driverlib/cpu_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/cpu_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/cpu_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/crypto.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/crypto.c similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/crypto.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/crypto.c index e165e5acc..1944f85a6 100644 --- a/third_party/ti/devices/cc26x2/driverlib/crypto.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/crypto.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: crypto.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-12-20 16:40:03 +0100 (Wed, 20 Dec 2017) +* Revision: 50869 * * Description: Driver for the Crypto module * @@ -138,7 +138,11 @@ CRYPTOAesLoadKey(uint32_t *pui32AesKey, { CPUdelay(1); } - while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & 0x00000001)); + while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & + (CRYPTO_IRQSTAT_DMA_BUS_ERR_M | + CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M | + CRYPTO_IRQSTAT_DMA_IN_DONE | + CRYPTO_IRQSTAT_RESULT_AVAIL_M))); // Check for errors in DMA and key store. if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & diff --git a/third_party/ti/devices/cc26x2/driverlib/crypto.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/crypto.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/crypto.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/crypto.h index 6356c22ea..e9e449625 100644 --- a/third_party/ti/devices/cc26x2/driverlib/crypto.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/crypto.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: crypto.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2018-01-12 18:46:31 +0100 (Fri, 12 Jan 2018) +* Revision: 51161 * * Description: AES header file. * @@ -234,8 +234,8 @@ extern uint32_t CRYPTOAesLoadKey(uint32_t *pui32AesKey, // //! \brief Start an AES-CBC operation (encryption or decryption). //! -//! The function starts an AES CBC mode encypt or decrypt operation. -//! End operation can be deteced by enabling interrupt or by polling +//! The function starts an AES CBC mode encrypt or decrypt operation. +//! End operation can be detected by enabling interrupt or by polling //! CRYPTOAesCbcStatus(). Result of operation is returned by CRYPTOAesCbcStatus(). //! //! \param pui32MsgIn is a pointer to the input data. @@ -386,7 +386,7 @@ CRYPTOAesCbcFinish(void) //! location in which the key is stored. //! //! \param bEncrypt determines whether to run encryption or not. -//! \param ui32AuthLength is the the length of the authentication field - +//! \param ui32AuthLength is the length of the authentication field - //! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets. //! \param pui32Nonce is a pointer to 13-byte or 12-byte Nonce (Number used once). //! \param pui32PlainText is a pointer to the octet string input message. @@ -467,7 +467,7 @@ extern uint32_t CRYPTOCcmAuthEncryptResultGet(uint32_t ui32TagLength, //! location in which the key is stored. //! //! \param bDecrypt determines whether to run decryption or not. -//! \param ui32AuthLength is the the length of the authentication field - +//! \param ui32AuthLength is the length of the authentication field - //! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets. //! \param pui32Nonce is a pointer to 13-byte or 12-byte Nonce (Number used once). //! \param pui32CipherText is a pointer to the octet string encrypted message. @@ -520,7 +520,7 @@ extern uint32_t CRYPTOCcmInvAuthDecryptStatus(void); // //! \brief Get the result of the CCM operation. //! -//! \param ui32AuthLength is the the length of the authentication field - +//! \param ui32AuthLength is the length of the authentication field - //! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets. //! \param pui32CipherText is a pointer to the octet string encrypted message. //! \param ui32CipherTextLength is the length of the encrypted message. @@ -720,12 +720,15 @@ CRYPTOIntClear(uint32_t ui32IntFlags) //***************************************************************************** // -//! \brief Registers an interrupt handler for a Crypto interrupt. +//! \brief Registers an interrupt handler for a Crypto interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the //! UART interrupt occurs. @@ -748,7 +751,7 @@ CRYPTOIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a Crypto interrupt. +//! \brief Unregisters an interrupt handler for a Crypto interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a Crypto interrupt occurs. This diff --git a/third_party/ti/devices/cc26x2/driverlib/ddi.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ddi.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ddi.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ddi.c diff --git a/third_party/ti/devices/cc26x2/driverlib/ddi.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ddi.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ddi.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ddi.h diff --git a/third_party/ti/devices/cc26x2/driverlib/ddi_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ddi_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ddi_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ddi_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/debug.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/debug.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/debug.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/debug.c diff --git a/third_party/ti/devices/cc26x2/driverlib/debug.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/debug.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/debug.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/debug.h diff --git a/third_party/ti/devices/cc26x2/driverlib/driverlib_release.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/driverlib_release.c similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/driverlib_release.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/driverlib_release.c index 456c7ebf6..00b054730 100644 --- a/third_party/ti/devices/cc26x2/driverlib/driverlib_release.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/driverlib_release.c @@ -42,4 +42,4 @@ /// Declare the current DriverLib release -DRIVERLIB_DECLARE_RELEASE(0, 48919); +DRIVERLIB_DECLARE_RELEASE(0, 51995); diff --git a/third_party/ti/devices/cc26x2/driverlib/driverlib_release.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/driverlib_release.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/driverlib_release.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/driverlib_release.h index 5ab88fd95..5d52f7e6c 100644 --- a/third_party/ti/devices/cc26x2/driverlib/driverlib_release.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/driverlib_release.h @@ -63,7 +63,7 @@ extern "C" /// DriverLib release group number #define DRIVERLIB_RELEASE_GROUP 0 /// DriverLib release build number -#define DRIVERLIB_RELEASE_BUILD 48919 +#define DRIVERLIB_RELEASE_BUILD 51995 @@ -83,7 +83,7 @@ extern "C" const volatile uint8_t driverlib_release_##group##_##build /// External declaration of the DriverLib release locking object -extern DRIVERLIB_DECLARE_RELEASE(0, 48919); +extern DRIVERLIB_DECLARE_RELEASE(0, 51995); @@ -135,7 +135,7 @@ extern DRIVERLIB_DECLARE_RELEASE(0, 48919); // //***************************************************************************** #define DRIVERLIB_ASSERT_CURR_RELEASE() \ - DRIVERLIB_ASSERT_RELEASE(0, 48919) + DRIVERLIB_ASSERT_RELEASE(0, 51995) diff --git a/third_party/ti/devices/cc26x2/driverlib/event.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/event.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/event.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/event.c diff --git a/third_party/ti/devices/cc26x2/driverlib/event.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/event.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/event.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/event.h diff --git a/third_party/ti/devices/cc26x2/driverlib/event_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/event_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/event_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/event_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/flash.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/flash.c similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/flash.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/flash.c index 546807b01..f51b30fee 100644 --- a/third_party/ti/devices/cc26x2/driverlib/flash.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/flash.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: flash.c -* Revised: 2017-04-26 18:34:53 +0200 (Wed, 26 Apr 2017) -* Revision: 48853 +* Revised: 2017-10-30 13:37:49 +0100 (Mon, 30 Oct 2017) +* Revision: 50105 * * Description: Driver for on chip Flash. * @@ -344,7 +344,7 @@ FlashSectorErase(uint32_t ui32SectorAddress) FlashSectorSizeGet())); ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00); - // Call ROM function + // Call ROM function that handles the actual erase operation FuncPointer = (uint32_t (*)(uint32_t)) (ROM_API_FLASH_TABLE[5]); ui32ErrorReturn = FuncPointer(ui32SectorAddress); @@ -371,7 +371,7 @@ FlashProgram(uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count) // Check the arguments. ASSERT((ui32Address + ui32Count) <= (FLASHMEM_BASE + FlashSizeGet())); - // Call ROM function + // Call ROM function that handles the actual program operation FuncPointer = (uint32_t (*)(uint8_t *, uint32_t, uint32_t)) (ROM_API_FLASH_TABLE[6]); ui32ErrorReturn = FuncPointer( pui8DataBuffer, ui32Address, ui32Count); diff --git a/third_party/ti/devices/cc26x2/driverlib/flash.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/flash.h similarity index 94% rename from third_party/ti/devices/cc26x2/driverlib/flash.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/flash.h index ebb6ec222..a44b02dad 100644 --- a/third_party/ti/devices/cc26x2/driverlib/flash.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/flash.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: flash.h -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-11-02 16:09:32 +0100 (Thu, 02 Nov 2017) +* Revision: 50166 * * Description: Defines and prototypes for the Flash driver. * @@ -461,12 +461,15 @@ FlashCheckFsmForReady(void) //***************************************************************************** // -//! \brief Registers an interrupt handler for the flash interrupt. +//! \brief Registers an interrupt handler for the flash interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! FLASH interrupts must be enabled via \ref FlashIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific FLASH interrupts must be enabled via \ref FlashIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the flash //! interrupt occurs. @@ -489,7 +492,7 @@ FlashIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters the interrupt handler for the flash interrupt. +//! \brief Unregisters the interrupt handler for the flash interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a FLASH interrupt occurs. This @@ -652,9 +655,10 @@ FlashIntClear(uint32_t ui32IntFlags) //! must have valid values at all times. These values affect the configuration //! of the device during boot. //! -//! \note Please note that code can not execute in flash while any part of the flash -//! is being programmed or erased. This function must only be executed from ROM -//! or SRAM. +//! \warning Please note that code can not execute in flash while any part of the flash +//! is being programmed or erased. The application must disable interrupts that have +//! interrupt routines in flash. This function calls a ROM function which handles the +//! actual program operation. //! //! \param ui32SectorAddress is the starting address in flash of the sector to be //! erased. @@ -670,22 +674,30 @@ extern uint32_t FlashSectorErase(uint32_t ui32SectorAddress); //***************************************************************************** // -//! \brief Programs unprotected main bank flash sectors. +//! \brief Programs unprotected flash sectors in the main bank. //! -//! This function will program a sequence of bytes into the on-chip flash. +//! This function programs a sequence of bytes into the on-chip flash. //! Programming each location consists of the result of an AND operation //! of the new data and the existing data; in other words bits that contain //! 1 can remain 1 or be changed to 0, but bits that are 0 cannot be changed -//! to 1. Therefore, a byte can be programmed multiple times as long as these +//! to 1. Therefore, a byte can be programmed multiple times as long as these //! rules are followed; if a program operation attempts to change a 0 bit to //! a 1 bit, that bit will not have its value changed. //! -//! This function will not return until the data has been programmed or an -//! programming error has occurred. +//! This function does not return until the data has been programmed or a +//! programming error occurs. //! -//! \note Please note that code can not execute in flash while any part of the flash -//! is being programmed or erased. This function must only be executed from ROM -//! or SRAM. +//! \note It is recommended to disable cache and line buffer before programming the +//! flash. Cache and line buffer are not automatically updated if a flash program +//! causes a mismatch between new flash content and old content in cache and +//! line buffer. Remember to enable cache and line buffer when the program +//! operation completes. See \ref VIMSModeSafeSet(), \ref VIMSLineBufDisable(), +//! and \ref VIMSLineBufEnable() for more information. +//! +//! \warning Please note that code can not execute in flash while any part of the flash +//! is being programmed or erased. The application must disable interrupts that have +//! interrupt routines in flash. This function calls a ROM function which handles the +//! actual program operation. //! //! The \c pui8DataBuffer pointer can not point to flash. //! diff --git a/third_party/ti/devices/cc26x2/driverlib/gpio.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/gpio.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio.c diff --git a/third_party/ti/devices/cc26x2/driverlib/gpio.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/gpio.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio.h index 554e90489..2829ea62b 100644 --- a/third_party/ti/devices/cc26x2/driverlib/gpio.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: gpio.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2018-05-02 11:11:40 +0200 (Wed, 02 May 2018) +* Revision: 51951 * * Description: Defines and prototypes for the GPIO. * @@ -82,13 +82,22 @@ dioNumberLegal( uint32_t dioNumber ) FCFG1_IOCONF_GPIO_CNT_M ) >> FCFG1_IOCONF_GPIO_CNT_S ) ; - // Special handling of CC13xx 7x7, where IO_CNT = 30 and legal range is 1..30 + // CC13x2 + CC26x2 + if ( ChipInfo_ChipFamilyIs_CC13x2_CC26x2() ) + { + return ( (dioNumber >= (31 - ioCount)) && (dioNumber < 31) ) + } + // Special handling of CC13x0 7x7, where IO_CNT = 30 and legal range is 1..30 // for all other chips legal range is 0..(dioNumber-1) - if (( ioCount == 30 ) && ChipInfo_ChipFamilyIsCC13xx() ) { + else if (( ioCount == 30 ) && ChipInfo_ChipFamilyIs_CC13x0() ) + { return (( dioNumber > 0 ) && ( dioNumber <= ioCount )); - } else { + } + else + { return ( dioNumber < ioCount ); } + } #endif @@ -172,7 +181,7 @@ GPIO_readDio( uint32_t dioNumber ) // //! \brief Reads the input value for the specified DIOs. //! -//! This function returns the the input value for multiple DIOs. +//! This function returns the input value for multiple DIOs. //! The value returned is not shifted and hence matches the corresponding dioMask bits. //! //! \param dioMask is the bit-mask representation of the DIOs to read. @@ -550,7 +559,7 @@ GPIO_getEventDio( uint32_t dioNumber ) //! - ... //! - \ref GPIO_DIO_31_MASK //! -//! \return Returns a bit vector with the current event status correspondig to the specified DIOs. +//! \return Returns a bit vector with the current event status corresponding to the specified DIOs. //! - 0 : Corresponding DIO has no triggered event. //! - 1 : Corresponding DIO has a triggered event. //! diff --git a/third_party/ti/devices/cc26x2/driverlib/gpio_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/gpio_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/gpio_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/group_analog_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/group_analog_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/group_analog_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/group_analog_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/group_aon_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/group_aon_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/group_aon_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/group_aon_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/group_aux_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/group_aux_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/group_aux_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/group_aux_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/i2c.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/i2c.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c.c diff --git a/third_party/ti/devices/cc26x2/driverlib/i2c.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c.h similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/i2c.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c.h index 62fee0d45..4ef0930f8 100644 --- a/third_party/ti/devices/cc26x2/driverlib/i2c.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: i2c.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the I2C. * @@ -886,11 +886,14 @@ I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked) //***************************************************************************** // -//! \brief Registers an interrupt handler for the I2C module. +//! \brief Registers an interrupt handler for the I2C module in the dynamic interrupt table. //! -//! This sets the handler to be called when an I2C interrupt occurs. This will -//! enable the global interrupt in the interrupt controller; specific I2C -//! interrupts must be enabled via \ref I2CMasterIntEnable() and +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific I2C interrupts must be enabled via \ref I2CMasterIntEnable() and //! \ref I2CSlaveIntEnable(). If necessary, it is the interrupt handler's //! responsibility to clear the interrupt source via \ref I2CMasterIntClear() and //! \ref I2CSlaveIntClear(). @@ -909,7 +912,7 @@ extern void I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the I2C module. +//! \brief Unregisters an interrupt handler for the I2C module in the dynamic interrupt table. //! //! This function will clear the handler to be called when an I2C interrupt //! occurs. This will also mask off the interrupt in the interrupt controller diff --git a/third_party/ti/devices/cc26x2/driverlib/i2c_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/i2c_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/i2c_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/i2s.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2s.c similarity index 96% rename from third_party/ti/devices/cc26x2/driverlib/i2s.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/i2s.c index e30bbd3e1..b8b38a0b7 100644 --- a/third_party/ti/devices/cc26x2/driverlib/i2s.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2s.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: i2s.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-05-08 12:18:04 +0200 (Mon, 08 May 2017) +* Revision: 48924 * * Description: Driver for the I2S. * @@ -139,10 +139,9 @@ I2SChannelConfigure(uint32_t ui32Base, uint32_t ui32Chan0Cfg, ui32OutChan = 0; // Configure input/output channels. - HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = ((ui32Chan0Cfg << I2S_AIFDIRCFG_AD0_S) - & I2S_AIFDIRCFG_AD0_M) | - ((ui32Chan1Cfg << I2S_AIFDIRCFG_AD1_S) - & I2S_AIFDIRCFG_AD1_M); + HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = ( + (( ui32Chan0Cfg << I2S_AIFDIRCFG_AD0_S) & I2S_AIFDIRCFG_AD0_M ) | + (( ui32Chan1Cfg << I2S_AIFDIRCFG_AD1_S) & I2S_AIFDIRCFG_AD1_M ) ); // Configure the valid channel mask. HWREG(I2S0_BASE + I2S_O_AIFWMASK0) = (ui32Chan0Cfg >> 8) & I2S_AIFWMASK0_MASK_M; diff --git a/third_party/ti/devices/cc26x2/driverlib/i2s.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2s.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/i2s.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/i2s.h index 255c2930d..0ef2441c6 100644 --- a/third_party/ti/devices/cc26x2/driverlib/i2s.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/i2s.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: i2s.h -* Revised: 2017-04-20 16:29:17 +0200 (Thu, 20 Apr 2017) -* Revision: 48817 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the I2S. * @@ -498,14 +498,17 @@ extern void I2SPointerSet(uint32_t ui32Base, bool bInput, void * pNextPointer); //***************************************************************************** // -//! \brief Registers an interrupt handler for an I2S interrupt. +//! \brief Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! I2S interrupts must be enabled via \ref I2SIntEnable(). It is the interrupt +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific I2S interrupts must be enabled via \ref I2SIntEnable(). It is the interrupt //! handler's responsibility to clear the interrupt source. //! -//! \param ui32Base is the base address of the I2S port. +//! \param ui32Base is the base address of the I2S module. //! \param pfnHandler is a pointer to the function to be called when the //! I2S interrupt occurs. //! @@ -530,7 +533,7 @@ I2SIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a I2S interrupt. +//! \brief Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when an I2S interrupt occurs. This diff --git a/third_party/ti/devices/cc26x2/driverlib/interrupt.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt.c similarity index 96% rename from third_party/ti/devices/cc26x2/driverlib/interrupt.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt.c index dcb72ed9b..d0cd9bc59 100644 --- a/third_party/ti/devices/cc26x2/driverlib/interrupt.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: interrupt.c -* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017) -* Revision: 48248 +* Revised: 2017-05-19 11:31:39 +0200 (Fri, 19 May 2017) +* Revision: 49017 * * Description: Driver for the NVIC Interrupt Controller. * @@ -118,16 +118,17 @@ IntDefaultHandler(void) //***************************************************************************** // -// The processor vector table. -// -// This contains a list of the handlers for the various interrupt sources in -// the system. The layout of this list is defined by the hardware; assertion -// of an interrupt causes the processor to start executing directly at the -// address given in the corresponding location in this list. +//! \brief Global pointer to the (dynamic) interrupt vector table when placed in SRAM. +//! +//! Interrupt vector table is placed at "vtable_ram" defined in the linker file +//! provided by Texas Instruments. By default, this is at the beginning of SRAM. +//! +//! \note See \ti_code{interrupt.c} for compiler specific implementation! // //***************************************************************************** #if defined(DOXYGEN) -// Don't document in Doxygen because this is compiler dependent. +// Dummy void pointer used as placeholder to generate Doxygen documentation. +void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void); #elif defined(__IAR_SYSTEMS_ICC__) #pragma data_alignment=256 static __no_init void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) @ ".vtable_ram"; diff --git a/third_party/ti/devices/cc26x2/driverlib/interrupt.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt.h similarity index 57% rename from third_party/ti/devices/cc26x2/driverlib/interrupt.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt.h index 52e153184..3a2d1dd61 100644 --- a/third_party/ti/devices/cc26x2/driverlib/interrupt.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: interrupt.h -* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017) -* Revision: 48248 +* Revised: 2017-11-14 15:26:03 +0100 (Tue, 14 Nov 2017) +* Revision: 50272 * * Description: Defines and prototypes for the NVIC Interrupt Controller * @@ -122,45 +122,96 @@ extern "C" //***************************************************************************** // -//! \brief Registers a function to be called when an interrupt occurs. +//! \brief Registers a function as an interrupt handler in the dynamic vector table. //! -//! This function is used to specify the handler function to be called when the -//! given interrupt is asserted to the processor. When the interrupt occurs, -//! if it is enabled (via \ref IntEnable()), the handler function will be called in -//! interrupt context. Since the handler function can preempt other code, care -//! must be taken to protect memory or peripherals that are accessed by the -//! handler and other non-handler code. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! //! -//! \note The use of this function (directly or indirectly via a peripheral -//! driver interrupt register function) moves the interrupt vector table from -//! flash to SRAM. Therefore, care must be taken when linking the application -//! to ensure that the SRAM vector table is located at the beginning of SRAM; -//! otherwise NVIC will not look in the correct portion of memory for the -//! vector table (it requires the vector table be on a 1 kB memory alignment). -//! Normally, the SRAM vector table is so placed via the use of linker scripts. +//! This function writes a function pointer to the dynamic interrupt vector table +//! in SRAM to register the function as an interrupt handler (ISR). When the corresponding +//! interrupt occurs, and it has been enabled (see \ref IntEnable()), the function +//! pointer is fetched from the dynamic vector table, and the System CPU will +//! execute the interrupt handler. //! -//! \param ui32Interrupt specifies the interrupt in question. -//! \param pfnHandler is a pointer to the function to be called. +//! \note The first call to this function (directly or indirectly via a peripheral +//! driver interrupt register function) copies the interrupt vector table from +//! Flash to SRAM. NVIC uses the static vector table (in Flash) until this function +//! is called. +//! +//! \param ui32Interrupt specifies the index in the vector table to modify. +//! - System exceptions (vectors 0 to 15): +//! - INT_NMI_FAULT +//! - INT_HARD_FAULT +//! - INT_MEMMANAGE_FAULT +//! - INT_BUS_FAULT +//! - INT_USAGE_FAULT +//! - INT_SVCALL +//! - INT_DEBUG +//! - INT_PENDSV +//! - INT_SYSTICK +//! - Interrupts (vectors >15): +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_PKA_IRQ +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ +//! - INT_OSC_COMB +//! - INT_AUX_TIMER2_EV0 +//! - INT_UART1_COMB +//! - INT_BATMON_COMB +//! \param pfnHandler is a pointer to the function to register as interrupt handler. //! //! \return None. +//! +//! \sa \ref IntUnregister(), \ref IntEnable() // //***************************************************************************** extern void IntRegister(uint32_t ui32Interrupt, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters the function to be called when an interrupt occurs. +//! \brief Unregisters an interrupt handler in the dynamic vector table. //! -//! This function is used to indicate that no handler should be called when the -//! given interrupt is asserted to the processor. The interrupt source will be -//! automatically disabled (via \ref IntDisable()) if necessary. +//! This function removes an interrupt handler from the dynamic vector table and +//! replaces it with the default interrupt handler \ref IntDefaultHandler(). //! -//! \param ui32Interrupt specifies the interrupt in question. +//! \note Remember to disable the interrupt before removing its interrupt handler +//! from the vector table. +//! +//! \param ui32Interrupt specifies the index in the vector table to modify. +//! - See \ref IntRegister() for list of valid arguments. //! //! \return None. //! -//! \sa \ref IntRegister() for important information about registering interrupt -//! handlers. +//! \sa \ref IntRegister(), \ref IntDisable() // //***************************************************************************** extern void IntUnregister(uint32_t ui32Interrupt); @@ -170,15 +221,20 @@ extern void IntUnregister(uint32_t ui32Interrupt); //! \brief Sets the priority grouping of the interrupt controller. //! //! This function specifies the split between preemptable priority levels and -//! subpriority levels in the interrupt priority specification. The range of -//! the grouping values are dependent upon the hardware implementation; on -//! the CC26xx family, three bits are available for hardware interrupt -//! prioritization and therefore priority grouping values of three through -//! seven have the same effect. +//! subpriority levels in the interrupt priority specification. +//! +//! Three bits are available for hardware interrupt prioritization thus priority +//! grouping values of three through seven have the same effect. //! //! \param ui32Bits specifies the number of bits of preemptable priority. +//! - 0 : No pre-emption priority, eight bits of subpriority. +//! - 1 : One bit of pre-emption priority, seven bits of subpriority +//! - 2 : Two bits of pre-emption priority, six bits of subpriority +//! - 3-7 : Three bits of pre-emption priority, five bits of subpriority //! //! \return None +//! +//! \sa \ref IntPrioritySet() // //***************************************************************************** extern void IntPriorityGroupingSet(uint32_t ui32Bits); @@ -191,6 +247,10 @@ extern void IntPriorityGroupingSet(uint32_t ui32Bits); //! subpriority levels in the interrupt priority specification. //! //! \return Returns the number of bits of preemptable priority. +//! - 0 : No pre-emption priority, eight bits of subpriority. +//! - 1 : One bit of pre-emption priority, seven bits of subpriority +//! - 2 : Two bits of pre-emption priority, six bits of subpriority +//! - 3-7 : Three bits of pre-emption priority, five bits of subpriority // //***************************************************************************** extern uint32_t IntPriorityGroupingGet(void); @@ -199,21 +259,66 @@ extern uint32_t IntPriorityGroupingGet(void); // //! \brief Sets the priority of an interrupt. //! -//! This function is used to set the priority of an interrupt. When multiple -//! interrupts are asserted simultaneously, the ones with the highest priority -//! are processed before the lower priority interrupts. Smaller numbers -//! correspond to higher interrupt priorities; priority 0 is the highest +//! This function sets the priority of an interrupt, including system exceptions. +//! When multiple interrupts are asserted simultaneously, the ones with the highest +//! priority are processed before the lower priority interrupts. Smaller numbers +//! correspond to higher interrupt priorities thus priority 0 is the highest //! interrupt priority. //! -//! The hardware priority mechanism will only look at the upper N bits of the -//! priority level (where N is 3 for cc26xx), so any prioritization must be -//! performed in those bits. The remaining bits can be used to sub-prioritize -//! the interrupt sources, and may be used by the hardware priority mechanism -//! on a future part. This arrangement allows priorities to migrate to -//! different NVIC implementations without changing the gross prioritization -//! of the interrupts. +//! \warning This function does not support setting priority of interrupt vectors +//! one through three which are: +//! - 1: Reset handler +//! - 2: NMI handler +//! - 3: Hard fault handler //! -//! \param ui32Interrupt specifies the interrupt in question. +//! \param ui32Interrupt specifies the index in the vector table to change priority for. +//! - System exceptions: +//! - INT_MEMMANAGE_FAULT +//! - INT_BUS_FAULT +//! - INT_USAGE_FAULT +//! - INT_SVCALL +//! - INT_DEBUG +//! - INT_PENDSV +//! - INT_SYSTICK +//! - Interrupts: +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_PKA_IRQ +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ +//! - INT_OSC_COMB +//! - INT_AUX_TIMER2_EV0 +//! - INT_UART1_COMB +//! - INT_BATMON_COMB //! \param ui8Priority specifies the priority of the interrupt. //! - \ref INT_PRI_LEVEL0 : Highest priority. //! - \ref INT_PRI_LEVEL1 @@ -225,6 +330,8 @@ extern uint32_t IntPriorityGroupingGet(void); //! - \ref INT_PRI_LEVEL7 : Lowest priority. //! //! \return None +//! +//! \sa \ref IntPriorityGroupingSet() // //***************************************************************************** extern void IntPrioritySet(uint32_t ui32Interrupt, uint8_t ui8Priority); @@ -235,10 +342,16 @@ extern void IntPrioritySet(uint32_t ui32Interrupt, uint8_t ui8Priority); //! //! This function gets the priority of an interrupt. //! -//! \param ui32Interrupt specifies the interrupt in question. +//! \warning This function does not support getting priority of interrupt vectors +//! one through three which are: +//! - 1: Reset handler +//! - 2: NMI handler +//! - 3: Hard fault handler +//! +//! \param ui32Interrupt specifies the index in the vector table to read priority of. +//! - See \ref IntPrioritySet() for list of valid arguments. //! //! \return Returns the interrupt priority: -//! - (-1) : Invalid interrupt specified as parameter! //! - \ref INT_PRI_LEVEL0 : Highest priority. //! - \ref INT_PRI_LEVEL1 //! - \ref INT_PRI_LEVEL2 @@ -253,30 +366,78 @@ extern int32_t IntPriorityGet(uint32_t ui32Interrupt); //***************************************************************************** // -//! \brief Enables an interrupt. +//! \brief Enables an interrupt or system exception. //! -//! The specified interrupt is enabled in the interrupt controller. Other -//! enables for the interrupt (such as at the peripheral level) are unaffected -//! by this function. +//! This function enables the specified interrupt in the interrupt controller. //! -//! \param ui32Interrupt specifies the interrupt to be enabled. +//! \note If a fault condition occurs while the corresponding system exception +//! is disabled, the fault is treated as a Hard Fault. +//! +//! \param ui32Interrupt specifies the index in the vector table to enable. +//! - System exceptions: +//! - INT_MEMMANAGE_FAULT +//! - INT_BUS_FAULT +//! - INT_USAGE_FAULT +//! - INT_SYSTICK +//! - Interrupts: +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_PKA_IRQ +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ +//! - INT_OSC_COMB +//! - INT_AUX_TIMER2_EV0 +//! - INT_UART1_COMB +//! - INT_BATMON_COMB //! //! \return None +//! +//! \sa \ref IntDisable() // //***************************************************************************** extern void IntEnable(uint32_t ui32Interrupt); //***************************************************************************** // -//! \brief Disables an interrupt. +//! \brief Disables an interrupt or system exception. //! -//! The specified interrupt is disabled in the interrupt controller. Other -//! enables for the interrupt (such as at the peripheral level) are unaffected -//! by this function. +//! This function disables the specified interrupt in the interrupt controller. //! -//! \param ui32Interrupt specifies the interrupt to be disabled. +//! \param ui32Interrupt specifies the index in the vector table to disable. +//! - See \ref IntEnable() for list of valid arguments. //! //! \return None +//! +//! \sa \ref IntEnable() // //***************************************************************************** extern void IntDisable(uint32_t ui32Interrupt); @@ -285,34 +446,82 @@ extern void IntDisable(uint32_t ui32Interrupt); // //! \brief Pends an interrupt. //! -//! The specified interrupt is pended in the interrupt controller. This will -//! cause the interrupt controller to execute the corresponding interrupt +//! This function pends the specified interrupt in the interrupt controller. +//! This causes the interrupt controller to execute the corresponding interrupt //! handler at the next available time, based on the current interrupt state -//! priorities. For example, if called by a higher priority interrupt handler, -//! the specified interrupt handler will not be called until after the current -//! interrupt handler has completed execution. The interrupt must have been -//! enabled for it to be called. +//! priorities. //! -//! \param ui32Interrupt specifies the interrupt to be pended. +//! This interrupt controller automatically clears the pending interrupt once the +//! interrupt handler is executed. +//! +//! \param ui32Interrupt specifies the index in the vector table to pend. +//! - System exceptions: +//! - INT_NMI_FAULT +//! - INT_PENDSV +//! - INT_SYSTICK +//! - Interrupts: +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_PKA_IRQ +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ +//! - INT_OSC_COMB +//! - INT_AUX_TIMER2_EV0 +//! - INT_UART1_COMB +//! - INT_BATMON_COMB //! //! \return None +//! +//! \sa \ref IntEnable() // //***************************************************************************** extern void IntPendSet(uint32_t ui32Interrupt); //***************************************************************************** // -//! \brief Query whether an interrupt is pending. +//! \brief Checks if an interrupt is pending. //! -//! This function will check whether the specified interrupt is pending in the -//! interrupt controller. The interrupt must have been enabled for it to be -//! called, so an interrupt can very well be pending waiting to be enabled or -//! waiting for an interrupt of higher priority to be done executing. +//! This function checks the interrupt controller to see if an interrupt is pending. //! -//! \note This function does not support the lower 16 IRQ vectors which are -//! hardware defined for the System CPU. +//! The interrupt must be enabled in order for the corresponding interrupt handler +//! to be executed, so an interrupt can be pending waiting to be enabled or waiting +//! for an interrupt of higher priority to be done executing. //! -//! \param ui32Interrupt specifies the interrupt to be queried. +//! \note This function does not support reading pending status for system exceptions +//! (vector table indexes <16). +//! +//! \param ui32Interrupt specifies the index in the vector table to check pending +//! status for. +//! - See \ref IntPendSet() for list of valid arguments (except system exceptions). //! //! \return Returns: //! - \c true : Specified interrupt is pending. @@ -325,12 +534,16 @@ extern bool IntPendGet(uint32_t ui32Interrupt); // //! \brief Unpends an interrupt. //! -//! The specified interrupt is unpended in the interrupt controller. This will -//! cause any previously generated interrupts that have not been handled yet +//! This function unpends the specified interrupt in the interrupt controller. +//! This causes any previously generated interrupts that have not been handled yet //! (due to higher priority interrupts or the interrupt no having been enabled //! yet) to be discarded. //! -//! \param ui32Interrupt specifies the interrupt to be unpended. +//! \note It is not possible to unpend the NMI because it takes effect +//! immediately when being pended. +//! +//! \param ui32Interrupt specifies the index in the vector table to unpend. +//! - See \ref IntPendSet() for list of valid arguments (except NMI). //! //! \return None // @@ -339,11 +552,9 @@ extern void IntPendClear(uint32_t ui32Interrupt); //***************************************************************************** // -//! \brief Enables the processor interrupt. +//! \brief Enables the CPU interrupt. //! -//! Allows the processor to respond to interrupts. This does not affect the -//! set of interrupts enabled in the interrupt controller; it just gates the -//! single interrupt from the controller to the processor. +//! Allows the CPU to respond to interrupts. //! //! \return Returns: //! - \c true : Interrupts were disabled and are now enabled. @@ -353,17 +564,17 @@ extern void IntPendClear(uint32_t ui32Interrupt); __STATIC_INLINE bool IntMasterEnable(void) { - // Enable processor interrupts. + // Enable CPU interrupts. return(CPUcpsie()); } //***************************************************************************** // -//! \brief Disables the processor interrupt. +//! \brief Disables the CPU interrupts with configurable priority. //! -//! Prevents the processor from receiving interrupts. This does not affect the -//! set of interrupts enabled in the interrupt controller; it just gates the -//! single interrupt from the controller to the processor. +//! Prevents the CPU from receiving interrupts except NMI and hard fault. This +//! does not affect the set of interrupts enabled in the interrupt controller; +//! it just gates the interrupt from the interrupt controller to the CPU. //! //! \return Returns: //! - \c true : Interrupts were already disabled when the function was called. @@ -373,7 +584,7 @@ IntMasterEnable(void) __STATIC_INLINE bool IntMasterDisable(void) { - // Disable processor interrupts. + // Disable CPU interrupts. return(CPUcpsid()); } @@ -390,12 +601,17 @@ IntMasterDisable(void) //! Smaller numbers correspond to higher interrupt priorities. So for example //! a priority level mask of 4 will allow interrupts of priority level 0-3, //! and interrupts with a numerical priority of 4 and greater will be blocked. -//! -//! The hardware priority mechanism will only look at the upper N bits of the -//! priority level (where N is 3 for the CC26xx family), so any -//! prioritization must be performed in those bits. +//! The device supports priority levels 0 through 7. //! //! \param ui32PriorityMask is the priority level that will be masked. +//! - 0 : Disable priority masking. +//! - 1 : Allow priority 0 interrupts, mask interrupts with priority 1-7. +//! - 2 : Allow priority 0-1 interrupts, mask interrupts with priority 2-7. +//! - 3 : Allow priority 0-2 interrupts, mask interrupts with priority 3-7. +//! - 4 : Allow priority 0-3 interrupts, mask interrupts with priority 4-7. +//! - 5 : Allow priority 0-4 interrupts, mask interrupts with priority 5-7. +//! - 6 : Allow priority 0-5 interrupts, mask interrupts with priority 6-7. +//! - 7 : Allow priority 0-6 interrupts, mask interrupts with priority 7. //! //! \return None. // @@ -419,10 +635,6 @@ IntPriorityMaskSet(uint32_t ui32PriorityMask) //! a priority level mask of 4 will allow interrupts of priority level 0-3, //! and interrupts with a numerical priority of 4 and greater will be blocked. //! -//! The hardware priority mechanism will only look at the upper N bits of the -//! priority level (where N is 3 for the CC26xx family), so any -//! prioritization must be performed in those bits. -//! //! \return Returns the value of the interrupt priority level mask. // //***************************************************************************** diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt_doc.h new file mode 100644 index 000000000..a8a0ad491 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/interrupt_doc.h @@ -0,0 +1,162 @@ +/****************************************************************************** +* Filename: interrupt_doc.h +* Revised: 2017-11-14 15:26:03 +0100 (Tue, 14 Nov 2017) +* Revision: 50272 +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +//! \addtogroup interrupt_api +//! @{ +//! \section sec_interrupt Introduction +//! +//! The interrupt controller API provides a set of functions for dealing with the +//! Nested Vectored Interrupt Controller (NVIC). Functions are provided to enable +//! and disable interrupts, register interrupt handlers, and set the priority of +//! interrupts. +//! +//! The event sources that trigger the interrupt lines in the NVIC are controlled by +//! the MCU event fabric. All event sources are statically connected to the NVIC interrupt lines +//! except one which is programmable. For more information about the MCU event fabric, see the +//! [MCU event fabric API](\ref event_api). +//! +//! \section sec_interrupt_api API +//! +//! Interrupts and system exceptions must be individually enabled and disabled through: +//! - \ref IntEnable() +//! - \ref IntDisable() +//! +//! The global CPU interrupt can be enabled and disabled with the following functions: +//! - \ref IntMasterEnable() +//! - \ref IntMasterDisable() +//! +//! This does not affect the individual interrupt enable states. Masking of the CPU +//! interrupt can be used as a simple critical section (only an NMI can interrupt the +//! CPU while the CPU interrupt is disabled), although masking the CPU +//! interrupt can increase the interrupt response time. +//! +//! It is possible to access the NVIC to see if any interrupts are pending and manually +//! clear pending interrupts which have not yet been serviced or set a specific interrupt as +//! pending to be handled based on its priority. Pending interrupts are cleared automatically +//! when the interrupt is accepted and executed. However, the event source which caused the +//! interrupt might need to be cleared manually to avoid re-triggering the corresponding interrupt. +//! The functions to read, clear, and set pending interrupts are: +//! - \ref IntPendGet() +//! - \ref IntPendClear() +//! - \ref IntPendSet() +//! +//! The interrupt prioritization in the NVIC allows handling of higher priority interrupts +//! before lower priority interrupts, as well as allowing preemption of lower priority interrupt +//! handlers by higher priority interrupts. +//! The device supports eight priority levels from 0 to 7 with 0 being the highest priority. +//! The priority of each interrupt source can be set and examined using: +//! - \ref IntPrioritySet() +//! - \ref IntPriorityGet() +//! +//! Interrupts can be masked based on their priority such that interrupts with the same or lower +//! priority than the mask are effectively disabled. This can be configured with: +//! - \ref IntPriorityMaskSet() +//! - \ref IntPriorityMaskGet() +//! +//! Subprioritization is also possible. Instead of having three bits of preemptable +//! prioritization (eight levels), the NVIC can be configured for 3 - M bits of +//! preemptable prioritization and M bits of subpriority. In this scheme, two +//! interrupts with the same preemptable prioritization but different subpriorities +//! do not cause a preemption. Instead, tail chaining is used to process +//! the two interrupts back-to-back. +//! If two interrupts with the same priority (and subpriority if so configured) are +//! asserted at the same time, the one with the lower interrupt number is +//! processed first. +//! Subprioritization is handled by: +//! - \ref IntPriorityGroupingSet() +//! - \ref IntPriorityGroupingGet() +//! +//! \section sec_interrupt_table Interrupt Vector Table +//! +//! The interrupt vector table can be configured in one of two ways: +//! - Statically (at compile time): Vector table is placed in Flash and each entry has a fixed +//! pointer to an interrupt handler (ISR). +//! - Dynamically (at runtime): Vector table is placed in SRAM and each entry can be changed +//! (registered or unregistered) at runtime. This allows a single interrupt to trigger different +//! interrupt handlers (ISRs) depending on which interrupt handler is registered at the time the +//! System CPU responds to the interrupt. +//! +//! When configured, the interrupts must be explicitly enabled in the NVIC through \ref IntEnable() +//! before the CPU can respond to the interrupt (in addition to any interrupt enabling required +//! within the peripheral). +//! +//! \subsection sec_interrupt_table_static Static Vector Table +//! +//! Static registration of interrupt handlers is accomplished by editing the interrupt handler +//! table in the startup code of the application. Texas Instruments provides startup files for +//! each supported compiler ( \ti_code{startup_.c} ) and these startup files include +//! a default static interrupt vector table. +//! All entries, except ResetISR, are declared as \c extern with weak assignment to a default +//! interrupt handler. This allows the user to declare and define a function (in the user's code) +//! with the same name as an entry in the vector table. At compile time, the linker then replaces +//! the pointer to the default interrupt handler in the vector table with the pointer to the +//! interrupt handler defined by the user. +//! +//! Statically configuring the interrupt table provides the fastest interrupt response time +//! because the stacking operation (a write to SRAM on the data bus) is performed in parallel +//! with the interrupt handler table fetch (a read from Flash on the instruction bus), as well +//! as the prefetch of the interrupt handler (assuming it is also in Flash). +//! +//! \subsection sec_interrupt_table_dynamic Dynamic Vector Table +//! +//! Alternatively, interrupts can be registered in the vector table at runtime, thus dynamically. +//! The dynamic vector table is placed in SRAM and the code can then modify the pointers to +//! interrupt handlers throughout the application. +//! +//! DriverLib uses these two functions to modify the dynamic vector table: +//! - \ref IntRegister() : Write a pointer to an interrupt handler into the vector table. +//! - \ref IntUnregister() : Write pointer to default interrupt handler into the vector table. +//! +//! \note First call to \ref IntRegister() initializes the vector table in SRAM by copying the +//! static vector table from Flash and forcing the NVIC to use the dynamic vector table from +//! this point forward. If using the dynamic vector table it is highly recommended to +//! initialize it during the setup phase of the application. The NVIC uses the static vector +//! table in Flash until the application initializes the dynamic vector table in SRAM. +//! +//! Runtime configuration of interrupts adds a small latency to the interrupt response time +//! because the stacking operation (a write to SRAM on the data bus) and the interrupt handler +//! fetch from the vector table (a read from SRAM on the instruction bus) must be performed +//! sequentially. +//! +//! The dynamic vector table, \ref g_pfnRAMVectors, is placed in SRAM in the section called +//! \c vtable_ram which is a section defined in the linker file. By default the linker file +//! places this section at the start of the SRAM but this is configurable by the user. +//! +//! \warning Runtime configuration of interrupt handlers requires that the interrupt +//! handler table is placed on a 256-byte boundary in SRAM (typically, this is +//! at the beginning of SRAM). Failure to do so results in an incorrect vector +//! address being fetched in response to an interrupt. +//! +//! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/ioc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc.c similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/ioc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc.c index 6280b1238..d92f81106 100644 --- a/third_party/ti/devices/cc26x2/driverlib/ioc.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: ioc.c -* Revised: 2017-04-28 19:38:35 +0200 (Fri, 28 Apr 2017) -* Revision: 48864 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the IOC. * diff --git a/third_party/ti/devices/cc26x2/driverlib/ioc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc.h similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/ioc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc.h index d15e430a8..6e4caaab7 100644 --- a/third_party/ti/devices/cc26x2/driverlib/ioc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: ioc.h -* Revised: 2017-05-04 16:35:28 +0200 (Thu, 04 May 2017) -* Revision: 48901 +* Revised: 2017-11-02 14:16:14 +0100 (Thu, 02 Nov 2017) +* Revision: 50156 * * Description: Defines and prototypes for the IO Controller. * @@ -490,6 +490,8 @@ extern uint32_t IOCPortConfigureGet(uint32_t ui32IOId); //! //! This function is used to set the wake-up mode from shutdown of an IO. //! +//! IO must be configured as input in order for wakeup to work. See \ref IOCIOInputSet(). +//! //! \param ui32IOId defines the IO to configure. //! - \ref IOID_0 //! - ... @@ -754,11 +756,14 @@ extern void IOCIOPortIdSet(uint32_t ui32IOId, uint32_t ui32PortId); //***************************************************************************** // -//! \brief Register an interrupt handler for an IO edge interrupt. +//! \brief Register an interrupt handler for an IO edge interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! IO interrupts must be enabled via \ref IOCIntEnable(). It is the interrupt +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific IO interrupts must be enabled via \ref IOCIntEnable(). It is the interrupt //! handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the @@ -782,7 +787,7 @@ IOCIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a IO edge interrupt. +//! \brief Unregisters an interrupt handler for a IO edge interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when an IO edge interrupt occurs. diff --git a/third_party/ti/devices/cc26x2/driverlib/ioc_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ioc_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ioc_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/osc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/osc.c similarity index 94% rename from third_party/ti/devices/cc26x2/driverlib/osc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/osc.c index 8d26e5d05..3c557c182 100644 --- a/third_party/ti/devices/cc26x2/driverlib/osc.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/osc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: osc.c -* Revised: 2017-02-18 20:04:02 +0100 (Sat, 18 Feb 2017) -* Revision: 48484 +* Revised: 2017-09-01 10:21:01 +0200 (Fri, 01 Sep 2017) +* Revision: 49677 * * Description: Driver for setting up the system Oscillators * @@ -42,6 +42,7 @@ #include "aon_batmon.h" #include "aon_rtc.h" #include "osc.h" +#include "setup_rom.h" //***************************************************************************** // @@ -68,6 +69,8 @@ #define OSCHF_DebugGetExpectedAverageCrystalAmplitude NOROM_OSCHF_DebugGetExpectedAverageCrystalAmplitude #undef OSC_HPOSCRelativeFrequencyOffsetGet #define OSC_HPOSCRelativeFrequencyOffsetGet NOROM_OSC_HPOSCRelativeFrequencyOffsetGet + #undef OSC_AdjustXoscHfCapArray + #define OSC_AdjustXoscHfCapArray NOROM_OSC_AdjustXoscHfCapArray #undef OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert #define OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert NOROM_OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert #endif @@ -270,8 +273,6 @@ OSCHF_AttemptToSwitchToXosc( void ) void OSCHF_SwitchToRcOscTurnOffXosc( void ) { - // Set SCLK_HF and SCLK_MF to RCOSC_HF without checking - // Doing this anyway to keep HF and MF in sync #if ( defined( ROM_OSCClockSourceSet )) ROM_OSCClockSourceSet( OSC_SRC_CLK_HF, OSC_RCOSC_HF ); #else @@ -292,6 +293,24 @@ OSCHF_SwitchToRcOscTurnOffXosc( void ) oscHfGlobals.tempXoscOff = AONBatMonTemperatureGetDegC(); } +//***************************************************************************** +// +// Adjust the XOSC HF cap array relative to the factory setting +// +//***************************************************************************** +void +OSC_AdjustXoscHfCapArray( int32_t capArrDelta ) +{ + // read the MODE_CONF register in CCFG + uint32_t ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF ); + // Clear CAP_MODE and the CAPARRAY_DELATA field + ccfg_ModeConfReg &= ~( CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M | CCFG_MODE_CONF_XOSC_CAP_MOD_M ); + // Insert new delta value + ccfg_ModeConfReg |= ((((uint32_t)capArrDelta) << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S ) & CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M ); + // Update the HW register with the new delta value + DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, SetupGetTrimForAnabypassValue1( ccfg_ModeConfReg )); +} + //***************************************************************************** // // Calculate the temperature dependent relative frequency offset of HPOSC diff --git a/third_party/ti/devices/cc26x2/driverlib/osc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/osc.h similarity index 93% rename from third_party/ti/devices/cc26x2/driverlib/osc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/osc.h index dba894c80..20215fd14 100644 --- a/third_party/ti/devices/cc26x2/driverlib/osc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/osc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: osc.h -* Revised: 2017-02-18 20:04:02 +0100 (Sat, 18 Feb 2017) -* Revision: 48484 +* Revised: 2018-04-18 15:47:09 +0200 (Wed, 18 Apr 2018) +* Revision: 51907 * * Description: Defines and prototypes for the system oscillator control. * @@ -93,6 +93,7 @@ extern "C" #define OSCHF_DebugGetCrystalAmplitude NOROM_OSCHF_DebugGetCrystalAmplitude #define OSCHF_DebugGetExpectedAverageCrystalAmplitude NOROM_OSCHF_DebugGetExpectedAverageCrystalAmplitude #define OSC_HPOSCRelativeFrequencyOffsetGet NOROM_OSC_HPOSCRelativeFrequencyOffsetGet + #define OSC_AdjustXoscHfCapArray NOROM_OSC_AdjustXoscHfCapArray #define OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert NOROM_OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert #endif @@ -120,9 +121,6 @@ extern "C" #define SCLK_HF_RCOSC_HF 0 #define SCLK_HF_XOSC_HF 1 -#define SCLK_MF_RCOSC_HF 0 -#define SCLK_MF_XOSC_HF 1 - #define SCLK_LF_FROM_RCOSC_HF 0 #define SCLK_LF_FROM_XOSC_HF 1 #define SCLK_LF_FROM_RCOSC_LF 2 @@ -435,6 +433,24 @@ extern uint32_t OSCHF_DebugGetExpectedAverageCrystalAmplitude( void ); //***************************************************************************** extern int32_t OSC_HPOSCRelativeFrequencyOffsetGet( int32_t tempDegC ); +//***************************************************************************** +// +//! \brief Adjust the XOSC HF cap array relative to the factory setting +//! +//! The cap array factory setting (FCFG) can be converted to a number in the range 0 - 63. +//! Both this function and the customer configuration (CCFG) setting can apply a delta to the FCFG setting. +//! The CCFG setting is automatically applied at boot time (See ../startup_files/ccfg.c). +//! Calling this function will discard the CCFG setting and adjust relative to the FCFG setting. +//! +//! \note Adjusted value will not take effect before XOSC_HF is stopped and restarted +//! +//! \param capArrDelta specifies number of step to adjust the cap array relative to the factory setting. +//! +//! \return None +// +//***************************************************************************** +extern void OSC_AdjustXoscHfCapArray( int32_t capArrDelta ); + //***************************************************************************** // //! \brief Converts the relative frequency offset of HPOSC to the RF Core parameter format. @@ -456,6 +472,8 @@ extern int32_t OSC_HPOSCRelativeFrequencyOffsetGet( int32_t tempDegC ); //! - F_HPOSC is the current HPOSC frequency. //! - RfCoreRelFreqOffset is the relative frequency offset in the "RF Core" format (the value returned). //! +//! \param HPOSC_RelFreqOffset is the relative frequency offset parameter d returned from \ref OSC_HPOSCRelativeFrequencyOffsetGet() +//! //! \return Returns the relative frequency offset in RF Core format. //! //! \sa OSC_HPOSCRelativeFrequencyOffsetGet() @@ -507,6 +525,10 @@ extern int16_t OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert( int32_t HP #undef OSC_HPOSCRelativeFrequencyOffsetGet #define OSC_HPOSCRelativeFrequencyOffsetGet ROM_OSC_HPOSCRelativeFrequencyOffsetGet #endif + #ifdef ROM_OSC_AdjustXoscHfCapArray + #undef OSC_AdjustXoscHfCapArray + #define OSC_AdjustXoscHfCapArray ROM_OSC_AdjustXoscHfCapArray + #endif #ifdef ROM_OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert #undef OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert #define OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert ROM_OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka.c new file mode 100644 index 000000000..ad3f04e68 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka.c @@ -0,0 +1,1634 @@ +/****************************************************************************** +* Filename: pka.c +* Revised: 2018-05-08 10:58:47 +0200 (Tue, 08 May 2018) +* Revision: 51975 +* +* Description: Driver for the PKA module +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#include "pka.h" + +//***************************************************************************** +// +// Handle support for DriverLib in ROM: +// This section will undo prototype renaming made in the header file +// +//***************************************************************************** +#if !defined(DOXYGEN) + #undef PKAGetOpsStatus + #define PKAGetOpsStatus NOROM_PKAGetOpsStatus + #undef PKAArrayAllZeros + #define PKAArrayAllZeros NOROM_PKAArrayAllZeros + #undef PKAZeroOutArray + #define PKAZeroOutArray NOROM_PKAZeroOutArray + #undef PKABigNumModStart + #define PKABigNumModStart NOROM_PKABigNumModStart + #undef PKABigNumModGetResult + #define PKABigNumModGetResult NOROM_PKABigNumModGetResult + #undef PKABigNumDivideStart + #define PKABigNumDivideStart NOROM_PKABigNumDivideStart + #undef PKABigNumDivideGetQuotient + #define PKABigNumDivideGetQuotient NOROM_PKABigNumDivideGetQuotient + #undef PKABigNumDivideGetRemainder + #define PKABigNumDivideGetRemainder NOROM_PKABigNumDivideGetRemainder + #undef PKABigNumCmpStart + #define PKABigNumCmpStart NOROM_PKABigNumCmpStart + #undef PKABigNumCmpGetResult + #define PKABigNumCmpGetResult NOROM_PKABigNumCmpGetResult + #undef PKABigNumInvModStart + #define PKABigNumInvModStart NOROM_PKABigNumInvModStart + #undef PKABigNumInvModGetResult + #define PKABigNumInvModGetResult NOROM_PKABigNumInvModGetResult + #undef PKABigNumMultiplyStart + #define PKABigNumMultiplyStart NOROM_PKABigNumMultiplyStart + #undef PKABigNumMultGetResult + #define PKABigNumMultGetResult NOROM_PKABigNumMultGetResult + #undef PKABigNumAddStart + #define PKABigNumAddStart NOROM_PKABigNumAddStart + #undef PKABigNumAddGetResult + #define PKABigNumAddGetResult NOROM_PKABigNumAddGetResult + #undef PKABigNumSubStart + #define PKABigNumSubStart NOROM_PKABigNumSubStart + #undef PKABigNumSubGetResult + #define PKABigNumSubGetResult NOROM_PKABigNumSubGetResult + #undef PKAEccMultiplyStart + #define PKAEccMultiplyStart NOROM_PKAEccMultiplyStart + #undef PKAEccMontgomeryMultiplyStart + #define PKAEccMontgomeryMultiplyStart NOROM_PKAEccMontgomeryMultiplyStart + #undef PKAEccMultiplyGetResult + #define PKAEccMultiplyGetResult NOROM_PKAEccMultiplyGetResult + #undef PKAEccAddStart + #define PKAEccAddStart NOROM_PKAEccAddStart + #undef PKAEccAddGetResult + #define PKAEccAddGetResult NOROM_PKAEccAddGetResult + #undef PKAEccVerifyPublicKeyWeierstrassStart + #define PKAEccVerifyPublicKeyWeierstrassStart NOROM_PKAEccVerifyPublicKeyWeierstrassStart +#endif + +//***************************************************************************** +// +// Handle support for DriverLib in ROM: +// This section will undo prototype renaming made in the header file +// +//***************************************************************************** +#if !defined(DOXYGEN) + #undef PKAGetOpsStatus + #define PKAGetOpsStatus NOROM_PKAGetOpsStatus + #undef PKAArrayAllZeros + #define PKAArrayAllZeros NOROM_PKAArrayAllZeros + #undef PKAZeroOutArray + #define PKAZeroOutArray NOROM_PKAZeroOutArray + #undef PKABigNumModStart + #define PKABigNumModStart NOROM_PKABigNumModStart + #undef PKABigNumModGetResult + #define PKABigNumModGetResult NOROM_PKABigNumModGetResult + #undef PKABigNumDivideStart + #define PKABigNumDivideStart NOROM_PKABigNumDivideStart + #undef PKABigNumDivideGetQuotient + #define PKABigNumDivideGetQuotient NOROM_PKABigNumDivideGetQuotient + #undef PKABigNumDivideGetRemainder + #define PKABigNumDivideGetRemainder NOROM_PKABigNumDivideGetRemainder + #undef PKABigNumCmpStart + #define PKABigNumCmpStart NOROM_PKABigNumCmpStart + #undef PKABigNumCmpGetResult + #define PKABigNumCmpGetResult NOROM_PKABigNumCmpGetResult + #undef PKABigNumInvModStart + #define PKABigNumInvModStart NOROM_PKABigNumInvModStart + #undef PKABigNumInvModGetResult + #define PKABigNumInvModGetResult NOROM_PKABigNumInvModGetResult + #undef PKABigNumMultiplyStart + #define PKABigNumMultiplyStart NOROM_PKABigNumMultiplyStart + #undef PKABigNumMultGetResult + #define PKABigNumMultGetResult NOROM_PKABigNumMultGetResult + #undef PKABigNumAddStart + #define PKABigNumAddStart NOROM_PKABigNumAddStart + #undef PKABigNumAddGetResult + #define PKABigNumAddGetResult NOROM_PKABigNumAddGetResult + #undef PKABigNumSubStart + #define PKABigNumSubStart NOROM_PKABigNumSubStart + #undef PKABigNumSubGetResult + #define PKABigNumSubGetResult NOROM_PKABigNumSubGetResult + #undef PKAEccMultiplyStart + #define PKAEccMultiplyStart NOROM_PKAEccMultiplyStart + #undef PKAEccMontgomeryMultiplyStart + #define PKAEccMontgomeryMultiplyStart NOROM_PKAEccMontgomeryMultiplyStart + #undef PKAEccMultiplyGetResult + #define PKAEccMultiplyGetResult NOROM_PKAEccMultiplyGetResult + #undef PKAEccAddStart + #define PKAEccAddStart NOROM_PKAEccAddStart + #undef PKAEccAddGetResult + #define PKAEccAddGetResult NOROM_PKAEccAddGetResult + #undef PKAEccVerifyPublicKeyWeierstrassStart + #define PKAEccVerifyPublicKeyWeierstrassStart NOROM_PKAEccVerifyPublicKeyWeierstrassStart +#endif + + + +#define MAX(x,y) (((x) > (y)) ? (x) : (y)) +#define MIN(x,y) (((x) < (y)) ? (x) : (y)) +#define INRANGE(x,y,z) ((x) > (y) && (x) < (z)) + + +//***************************************************************************** +// +// Define for the maximum curve size supported by the PKA module in 32 bit +// word. +// \note PKA hardware module can support up to 384 bit curve size due to the +// 2K of PKA RAM. +// +//***************************************************************************** +#define PKA_MAX_CURVE_SIZE_32_BIT_WORD 12 + +//***************************************************************************** +// +// Define for the maximum length of the big number supported by the PKA module +// in 32 bit word. +// +//***************************************************************************** +#define PKA_MAX_LEN_IN_32_BIT_WORD PKA_MAX_CURVE_SIZE_32_BIT_WORD + +//***************************************************************************** +// +// Used in PKAWritePkaParam() and PKAWritePkaParamExtraOffset() to specify that +// the base address of the parameter should not be written to a NPTR register. +// +//***************************************************************************** +#define PKA_NO_POINTER_REG 0xFF + +//***************************************************************************** +// +// NIST P224 constants in little endian format. byte[0] is the least +// significant byte and byte[NISTP224_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint224 NISTP224_generator = { + .x = {.byte = {0x21, 0x1D, 0x5C, 0x11, 0xD6, 0x80, 0x32, 0x34, + 0x22, 0x11, 0xC2, 0x56, 0xD3, 0xC1, 0x03, 0x4A, + 0xB9, 0x90, 0x13, 0x32, 0x7F, 0xBF, 0xB4, 0x6B, + 0xBD, 0x0C, 0x0E, 0xB7, }}, + .y = {.byte = {0x34, 0x7E, 0x00, 0x85, 0x99, 0x81, 0xD5, 0x44, + 0x64, 0x47, 0x07, 0x5A, 0xA0, 0x75, 0x43, 0xCD, + 0xE6, 0xDF, 0x22, 0x4C, 0xFB, 0x23, 0xF7, 0xB5, + 0x88, 0x63, 0x37, 0xBD, }}, +}; + +const PKA_EccParam224 NISTP224_prime = {.byte = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF}}; + +const PKA_EccParam224 NISTP224_a = {.byte = {0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF}}; + +const PKA_EccParam224 NISTP224_b = {.byte = {0xB4, 0xFF, 0x55, 0x23, 0x43, 0x39, 0x0B, 0x27, + 0xBA, 0xD8, 0xBF, 0xD7, 0xB7, 0xB0, 0x44, 0x50, + 0x56, 0x32, 0x41, 0xF5, 0xAB, 0xB3, 0x04, 0x0C, + 0x85, 0x0A, 0x05, 0xB4}}; + +const PKA_EccParam224 NISTP224_order = {.byte = {0x3D, 0x2A, 0x5C, 0x5C, 0x45, 0x29, 0xDD, 0x13, + 0x3E, 0xF0, 0xB8, 0xE0, 0xA2, 0x16, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF}}; + +//***************************************************************************** +// +// NIST P256 constants in little endian format. byte[0] is the least +// significant byte and byte[NISTP256_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint256 NISTP256_generator = { + .x = {.byte = {0x96, 0xc2, 0x98, 0xd8, 0x45, 0x39, 0xa1, 0xf4, + 0xa0, 0x33, 0xeb, 0x2d, 0x81, 0x7d, 0x03, 0x77, + 0xf2, 0x40, 0xa4, 0x63, 0xe5, 0xe6, 0xbc, 0xf8, + 0x47, 0x42, 0x2c, 0xe1, 0xf2, 0xd1, 0x17, 0x6b}}, + .y = {.byte = {0xf5, 0x51, 0xbf, 0x37, 0x68, 0x40, 0xb6, 0xcb, + 0xce, 0x5e, 0x31, 0x6b, 0x57, 0x33, 0xce, 0x2b, + 0x16, 0x9e, 0x0f, 0x7c, 0x4a, 0xeb, 0xe7, 0x8e, + 0x9b, 0x7f, 0x1a, 0xfe, 0xe2, 0x42, 0xe3, 0x4f}}, +}; + +const PKA_EccParam256 NISTP256_prime = {.byte = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff}}; + +const PKA_EccParam256 NISTP256_a = {.byte = {0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff}}; + +const PKA_EccParam256 NISTP256_b = {.byte = {0x4b, 0x60, 0xd2, 0x27, 0x3e, 0x3c, 0xce, 0x3b, + 0xf6, 0xb0, 0x53, 0xcc, 0xb0, 0x06, 0x1d, 0x65, + 0xbc, 0x86, 0x98, 0x76, 0x55, 0xbd, 0xeb, 0xb3, + 0xe7, 0x93, 0x3a, 0xaa, 0xd8, 0x35, 0xc6, 0x5a}}; + +const PKA_EccParam256 NISTP256_order = {.byte = {0x51, 0x25, 0x63, 0xfc, 0xc2, 0xca, 0xb9, 0xf3, + 0x84, 0x9e, 0x17, 0xa7, 0xad, 0xfa, 0xe6, 0xbc, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff}}; + +//***************************************************************************** +// +// NIST P384 constants in little endian format. byte[0] is the least +// significant byte and byte[NISTP384_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint384 NISTP384_generator = { + .x = {.byte = {0xb7, 0x0a, 0x76, 0x72, 0x38, 0x5e, 0x54, 0x3a, + 0x6c, 0x29, 0x55, 0xbf, 0x5d, 0xf2, 0x02, 0x55, + 0x38, 0x2a, 0x54, 0x82, 0xe0, 0x41, 0xf7, 0x59, + 0x98, 0x9b, 0xa7, 0x8b, 0x62, 0x3b, 0x1d, 0x6e, + 0x74, 0xad, 0x20, 0xf3, 0x1e, 0xc7, 0xb1, 0x8e, + 0x37, 0x05, 0x8b, 0xbe, 0x22, 0xca, 0x87, 0xaa}}, + .y = {.byte = {0x5f, 0x0e, 0xea, 0x90, 0x7c, 0x1d, 0x43, 0x7a, + 0x9d, 0x81, 0x7e, 0x1d, 0xce, 0xb1, 0x60, 0x0a, + 0xc0, 0xb8, 0xf0, 0xb5, 0x13, 0x31, 0xda, 0xe9, + 0x7c, 0x14, 0x9a, 0x28, 0xbd, 0x1d, 0xf4, 0xf8, + 0x29, 0xdc, 0x92, 0x92, 0xbf, 0x98, 0x9e, 0x5d, + 0x6f, 0x2c, 0x26, 0x96, 0x4a, 0xde, 0x17, 0x36,}}, +}; + +const PKA_EccParam384 NISTP384_prime = {.byte = {0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, + 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}}; + +const PKA_EccParam384 NISTP384_a = {.byte = {0xfc, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, + 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}}; + +const PKA_EccParam384 NISTP384_b = {.byte = {0xef, 0x2a, 0xec, 0xd3, 0xed, 0xc8, 0x85, 0x2a, + 0x9d, 0xd1, 0x2e, 0x8a, 0x8d, 0x39, 0x56, 0xc6, + 0x5a, 0x87, 0x13, 0x50, 0x8f, 0x08, 0x14, 0x03, + 0x12, 0x41, 0x81, 0xfe, 0x6e, 0x9c, 0x1d, 0x18, + 0x19, 0x2d, 0xf8, 0xe3, 0x6b, 0x05, 0x8e, 0x98, + 0xe4, 0xe7, 0x3e, 0xe2, 0xa7, 0x2f, 0x31, 0xb3}}; + +const PKA_EccParam384 NISTP384_order = {.byte = {0x73, 0x29, 0xc5, 0xcc, 0x6a, 0x19, 0xec, 0xec, + 0x7a, 0xa7, 0xb0, 0x48, 0xb2, 0x0d, 0x1a, 0x58, + 0xdf, 0x2d, 0x37, 0xf4, 0x81, 0x4d, 0x63, 0xc7, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}}; + + +//***************************************************************************** +// +// NIST P521 constants in little endian format. byte[0] is the least +// significant byte and byte[NISTP521_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint521 NISTP521_generator = { + .x = {.byte = {0x66, 0xbd, 0xe5, 0xc2, 0x31, 0x7e, 0x7e, 0xf9, + 0x9b, 0x42, 0x6a, 0x85, 0xc1, 0xb3, 0x48, 0x33, + 0xde, 0xa8, 0xff, 0xa2, 0x27, 0xc1, 0x1d, 0xfe, + 0x28, 0x59, 0xe7, 0xef, 0x77, 0x5e, 0x4b, 0xa1, + 0xba, 0x3d, 0x4d, 0x6b, 0x60, 0xaf, 0x28, 0xf8, + 0x21, 0xb5, 0x3f, 0x05, 0x39, 0x81, 0x64, 0x9c, + 0x42, 0xb4, 0x95, 0x23, 0x66, 0xcb, 0x3e, 0x9e, + 0xcd, 0xe9, 0x04, 0x04, 0xb7, 0x06, 0x8e, 0x85, + 0xc6, 0x00}}, + .y = {.byte = {0x50, 0x66, 0xd1, 0x9f, 0x76, 0x94, 0xbe, 0x88, + 0x40, 0xc2, 0x72, 0xa2, 0x86, 0x70, 0x3c, 0x35, + 0x61, 0x07, 0xad, 0x3f, 0x01, 0xb9, 0x50, 0xc5, + 0x40, 0x26, 0xf4, 0x5e, 0x99, 0x72, 0xee, 0x97, + 0x2c, 0x66, 0x3e, 0x27, 0x17, 0xbd, 0xaf, 0x17, + 0x68, 0x44, 0x9b, 0x57, 0x49, 0x44, 0xf5, 0x98, + 0xd9, 0x1b, 0x7d, 0x2c, 0xb4, 0x5f, 0x8a, 0x5c, + 0x04, 0xc0, 0x3b, 0x9a, 0x78, 0x6a, 0x29, 0x39, + 0x18, 0x01}}, +}; + +const PKA_EccParam521 NISTP521_prime = {.byte = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x01}}; + +const PKA_EccParam521 NISTP521_a = {.byte = {0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x01}}; + +const PKA_EccParam521 NISTP521_b = {.byte = {0x00, 0x3f, 0x50, 0x6b, 0xd4, 0x1f, 0x45, 0xef, + 0xf1, 0x34, 0x2c, 0x3d, 0x88, 0xdf, 0x73, 0x35, + 0x07, 0xbf, 0xb1, 0x3b, 0xbd, 0xc0, 0x52, 0x16, + 0x7b, 0x93, 0x7e, 0xec, 0x51, 0x39, 0x19, 0x56, + 0xe1, 0x09, 0xf1, 0x8e, 0x91, 0x89, 0xb4, 0xb8, + 0xf3, 0x15, 0xb3, 0x99, 0x5b, 0x72, 0xda, 0xa2, + 0xee, 0x40, 0x85, 0xb6, 0xa0, 0x21, 0x9a, 0x92, + 0x1f, 0x9a, 0x1c, 0x8e, 0x61, 0xb9, 0x3e, 0x95, + 0x51, 0x00}}; + +const PKA_EccParam521 NISTP521_order = {.byte = {0x09, 0x64, 0x38, 0x91, 0x1e, 0xb7, 0x6f, 0xbb, + 0xae, 0x47, 0x9c, 0x89, 0xb8, 0xc9, 0xb5, 0x3b, + 0xd0, 0xa5, 0x09, 0xf7, 0x48, 0x01, 0xcc, 0x7f, + 0x6b, 0x96, 0x2f, 0xbf, 0x83, 0x87, 0x86, 0x51, + 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x01}}; + + +//***************************************************************************** +// +// Brainpool P256r1 constants in little endian format. byte[0] is the least +// significant byte and byte[BrainpoolP256R1_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint256 BrainpoolP256R1_generator = { + .x = {.byte = {0x62, 0x32, 0xCE, 0x9A, 0xBD, 0x53, 0x44, 0x3A, + 0xC2, 0x23, 0xBD, 0xE3, 0xE1, 0x27, 0xDE, 0xB9, + 0xAF, 0xB7, 0x81, 0xFC, 0x2F, 0x48, 0x4B, 0x2C, + 0xCB, 0x57, 0x7E, 0xCB, 0xB9, 0xAE, 0xD2, 0x8B}}, + .y = {.byte = {0x97, 0x69, 0x04, 0x2F, 0xC7, 0x54, 0x1D, 0x5C, + 0x54, 0x8E, 0xED, 0x2D, 0x13, 0x45, 0x77, 0xC2, + 0xC9, 0x1D, 0x61, 0x14, 0x1A, 0x46, 0xF8, 0x97, + 0xFD, 0xC4, 0xDA, 0xC3, 0x35, 0xF8, 0x7E, 0x54}}, +}; + +const PKA_EccParam256 BrainpoolP256R1_prime = {.byte = {0x77, 0x53, 0x6E, 0x1F, 0x1D, 0x48, 0x13, 0x20, + 0x28, 0x20, 0x26, 0xD5, 0x23, 0xF6, 0x3B, 0x6E, + 0x72, 0x8D, 0x83, 0x9D, 0x90, 0x0A, 0x66, 0x3E, + 0xBC, 0xA9, 0xEE, 0xA1, 0xDB, 0x57, 0xFB, 0xA9}}; + +const PKA_EccParam256 BrainpoolP256R1_a = {.byte = {0xD9, 0xB5, 0x30, 0xF3, 0x44, 0x4B, 0x4A, 0xE9, + 0x6C, 0x5C, 0xDC, 0x26, 0xC1, 0x55, 0x80, 0xFB, + 0xE7, 0xFF, 0x7A, 0x41, 0x30, 0x75, 0xF6, 0xEE, + 0x57, 0x30, 0x2C, 0xFC, 0x75, 0x09, 0x5A, 0x7D}}; + +const PKA_EccParam256 BrainpoolP256R1_b = {.byte = {0xB6, 0x07, 0x8C, 0xFF, 0x18, 0xDC, 0xCC, 0x6B, + 0xCE, 0xE1, 0xF7, 0x5C, 0x29, 0x16, 0x84, 0x95, + 0xBF, 0x7C, 0xD7, 0xBB, 0xD9, 0xB5, 0x30, 0xF3, + 0x44, 0x4B, 0x4A, 0xE9, 0x6C, 0x5C, 0xDC, 0x26,}}; + +const PKA_EccParam256 BrainpoolP256R1_order = {.byte = {0xA7, 0x56, 0x48, 0x97, 0x82, 0x0E, 0x1E, 0x90, + 0xF7, 0xA6, 0x61, 0xB5, 0xA3, 0x7A, 0x39, 0x8C, + 0x71, 0x8D, 0x83, 0x9D, 0x90, 0x0A, 0x66, 0x3E, + 0xBC, 0xA9, 0xEE, 0xA1, 0xDB, 0x57, 0xFB, 0xA9}}; + +//***************************************************************************** +// +// Brainpool P384r1 constants in little endian format. byte[0] is the least +// significant byte and byte[BrainpoolP384R1_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint384 BrainpoolP384R1_generator = { + .x = {.byte = {0x1E, 0xAF, 0xD4, 0x47, 0xE2, 0xB2, 0x87, 0xEF, + 0xAA, 0x46, 0xD6, 0x36, 0x34, 0xE0, 0x26, 0xE8, + 0xE8, 0x10, 0xBD, 0x0C, 0xFE, 0xCA, 0x7F, 0xDB, + 0xE3, 0x4F, 0xF1, 0x7E, 0xE7, 0xA3, 0x47, 0x88, + 0x6B, 0x3F, 0xC1, 0xB7, 0x81, 0x3A, 0xA6, 0xA2, + 0xFF, 0x45, 0xCF, 0x68, 0xF0, 0x64, 0x1C, 0x1D}}, + .y = {.byte = {0x15, 0x53, 0x3C, 0x26, 0x41, 0x03, 0x82, 0x42, + 0x11, 0x81, 0x91, 0x77, 0x21, 0x46, 0x46, 0x0E, + 0x28, 0x29, 0x91, 0xF9, 0x4F, 0x05, 0x9C, 0xE1, + 0x64, 0x58, 0xEC, 0xFE, 0x29, 0x0B, 0xB7, 0x62, + 0x52, 0xD5, 0xCF, 0x95, 0x8E, 0xEB, 0xB1, 0x5C, + 0xA4, 0xC2, 0xF9, 0x20, 0x75, 0x1D, 0xBE, 0x8A}}, +}; + +const PKA_EccParam384 BrainpoolP384R1_prime = {.byte = {0x53, 0xEC, 0x07, 0x31, 0x13, 0x00, 0x47, 0x87, + 0x71, 0x1A, 0x1D, 0x90, 0x29, 0xA7, 0xD3, 0xAC, + 0x23, 0x11, 0xB7, 0x7F, 0x19, 0xDA, 0xB1, 0x12, + 0xB4, 0x56, 0x54, 0xED, 0x09, 0x71, 0x2F, 0x15, + 0xDF, 0x41, 0xE6, 0x50, 0x7E, 0x6F, 0x5D, 0x0F, + 0x28, 0x6D, 0x38, 0xA3, 0x82, 0x1E, 0xB9, 0x8C}}; + +const PKA_EccParam384 BrainpoolP384R1_a = {.byte = {0x26, 0x28, 0xCE, 0x22, 0xDD, 0xC7, 0xA8, 0x04, + 0xEB, 0xD4, 0x3A, 0x50, 0x4A, 0x81, 0xA5, 0x8A, + 0x0F, 0xF9, 0x91, 0xBA, 0xEF, 0x65, 0x91, 0x13, + 0x87, 0x27, 0xB2, 0x4F, 0x8E, 0xA2, 0xBE, 0xC2, + 0xA0, 0xAF, 0x05, 0xCE, 0x0A, 0x08, 0x72, 0x3C, + 0x0C, 0x15, 0x8C, 0x3D, 0xC6, 0x82, 0xC3, 0x7B}}; + +const PKA_EccParam384 BrainpoolP384R1_b = {.byte = {0x11, 0x4C, 0x50, 0xFA, 0x96, 0x86, 0xB7, 0x3A, + 0x94, 0xC9, 0xDB, 0x95, 0x02, 0x39, 0xB4, 0x7C, + 0xD5, 0x62, 0xEB, 0x3E, 0xA5, 0x0E, 0x88, 0x2E, + 0xA6, 0xD2, 0xDC, 0x07, 0xE1, 0x7D, 0xB7, 0x2F, + 0x7C, 0x44, 0xF0, 0x16, 0x54, 0xB5, 0x39, 0x8B, + 0x26, 0x28, 0xCE, 0x22, 0xDD, 0xC7, 0xA8, 0x04}}; + +const PKA_EccParam384 BrainpoolP384R1_order = {.byte = {0x65, 0x65, 0x04, 0xE9, 0x02, 0x32, 0x88, 0x3B, + 0x10, 0xC3, 0x7F, 0x6B, 0xAF, 0xB6, 0x3A, 0xCF, + 0xA7, 0x25, 0x04, 0xAC, 0x6C, 0x6E, 0x16, 0x1F, + 0xB3, 0x56, 0x54, 0xED, 0x09, 0x71, 0x2F, 0x15, + 0xDF, 0x41, 0xE6, 0x50, 0x7E, 0x6F, 0x5D, 0x0F, + 0x28, 0x6D, 0x38, 0xA3, 0x82, 0x1E, 0xB9, 0x8C}}; + +//***************************************************************************** +// +// Brainpool P512r1 constants in little endian format. byte[0] is the least +// significant byte and byte[BrainpoolP512R1_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint512 BrainpoolP512R1_generator = { + .x = {.byte = {0x22, 0xF8, 0xB9, 0xBC, 0x09, 0x22, 0x35, 0x8B, + 0x68, 0x5E, 0x6A, 0x40, 0x47, 0x50, 0x6D, 0x7C, + 0x5F, 0x7D, 0xB9, 0x93, 0x7B, 0x68, 0xD1, 0x50, + 0x8D, 0xD4, 0xD0, 0xE2, 0x78, 0x1F, 0x3B, 0xFF, + 0x8E, 0x09, 0xD0, 0xF4, 0xEE, 0x62, 0x3B, 0xB4, + 0xC1, 0x16, 0xD9, 0xB5, 0x70, 0x9F, 0xED, 0x85, + 0x93, 0x6A, 0x4C, 0x9C, 0x2E, 0x32, 0x21, 0x5A, + 0x64, 0xD9, 0x2E, 0xD8, 0xBD, 0xE4, 0xAE, 0x81}}, + .y = {.byte = {0x92, 0x08, 0xD8, 0x3A, 0x0F, 0x1E, 0xCD, 0x78, + 0x06, 0x54, 0xF0, 0xA8, 0x2F, 0x2B, 0xCA, 0xD1, + 0xAE, 0x63, 0x27, 0x8A, 0xD8, 0x4B, 0xCA, 0x5B, + 0x5E, 0x48, 0x5F, 0x4A, 0x49, 0xDE, 0xDC, 0xB2, + 0x11, 0x81, 0x1F, 0x88, 0x5B, 0xC5, 0x00, 0xA0, + 0x1A, 0x7B, 0xA5, 0x24, 0x00, 0xF7, 0x09, 0xF2, + 0xFD, 0x22, 0x78, 0xCF, 0xA9, 0xBF, 0xEA, 0xC0, + 0xEC, 0x32, 0x63, 0x56, 0x5D, 0x38, 0xDE, 0x7D}}, +}; + +const PKA_EccParam512 BrainpoolP512R1_prime = {.byte = {0xF3, 0x48, 0x3A, 0x58, 0x56, 0x60, 0xAA, 0x28, + 0x85, 0xC6, 0x82, 0x2D, 0x2F, 0xFF, 0x81, 0x28, + 0xE6, 0x80, 0xA3, 0xE6, 0x2A, 0xA1, 0xCD, 0xAE, + 0x42, 0x68, 0xC6, 0x9B, 0x00, 0x9B, 0x4D, 0x7D, + 0x71, 0x08, 0x33, 0x70, 0xCA, 0x9C, 0x63, 0xD6, + 0x0E, 0xD2, 0xC9, 0xB3, 0xB3, 0x8D, 0x30, 0xCB, + 0x07, 0xFC, 0xC9, 0x33, 0xAE, 0xE6, 0xD4, 0x3F, + 0x8B, 0xC4, 0xE9, 0xDB, 0xB8, 0x9D, 0xDD, 0xAA}}; + +const PKA_EccParam512 BrainpoolP512R1_a = {.byte = {0xCA, 0x94, 0xFC, 0x77, 0x4D, 0xAC, 0xC1, 0xE7, + 0xB9, 0xC7, 0xF2, 0x2B, 0xA7, 0x17, 0x11, 0x7F, + 0xB5, 0xC8, 0x9A, 0x8B, 0xC9, 0xF1, 0x2E, 0x0A, + 0xA1, 0x3A, 0x25, 0xA8, 0x5A, 0x5D, 0xED, 0x2D, + 0xBC, 0x63, 0x98, 0xEA, 0xCA, 0x41, 0x34, 0xA8, + 0x10, 0x16, 0xF9, 0x3D, 0x8D, 0xDD, 0xCB, 0x94, + 0xC5, 0x4C, 0x23, 0xAC, 0x45, 0x71, 0x32, 0xE2, + 0x89, 0x3B, 0x60, 0x8B, 0x31, 0xA3, 0x30, 0x78}}; + +const PKA_EccParam512 BrainpoolP512R1_b = {.byte = {0x23, 0xF7, 0x16, 0x80, 0x63, 0xBD, 0x09, 0x28, + 0xDD, 0xE5, 0xBA, 0x5E, 0xB7, 0x50, 0x40, 0x98, + 0x67, 0x3E, 0x08, 0xDC, 0xCA, 0x94, 0xFC, 0x77, + 0x4D, 0xAC, 0xC1, 0xE7, 0xB9, 0xC7, 0xF2, 0x2B, + 0xA7, 0x17, 0x11, 0x7F, 0xB5, 0xC8, 0x9A, 0x8B, + 0xC9, 0xF1, 0x2E, 0x0A, 0xA1, 0x3A, 0x25, 0xA8, + 0x5A, 0x5D, 0xED, 0x2D, 0xBC, 0x63, 0x98, 0xEA, + 0xCA, 0x41, 0x34, 0xA8, 0x10, 0x16, 0xF9, 0x3D}}; + +const PKA_EccParam512 BrainpoolP512R1_order = {.byte = {0x69, 0x00, 0xA9, 0x9C, 0x82, 0x96, 0x87, 0xB5, + 0xDD, 0xDA, 0x5D, 0x08, 0x81, 0xD3, 0xB1, 0x1D, + 0x47, 0x10, 0xAC, 0x7F, 0x19, 0x61, 0x86, 0x41, + 0x19, 0x26, 0xA9, 0x4C, 0x41, 0x5C, 0x3E, 0x55, + 0x70, 0x08, 0x33, 0x70, 0xCA, 0x9C, 0x63, 0xD6, + 0x0E, 0xD2, 0xC9, 0xB3, 0xB3, 0x8D, 0x30, 0xCB, + 0x07, 0xFC, 0xC9, 0x33, 0xAE, 0xE6, 0xD4, 0x3F, + 0x8B, 0xC4, 0xE9, 0xDB, 0xB8, 0x9D, 0xDD, 0xAA}}; + +//***************************************************************************** +// +// Curve25519 constants in little endian format. byte[0] is the least +// significant byte and byte[Curve25519_PARAM_SIZE_BYTES - 1] is the most +// significant. +// +//***************************************************************************** +const PKA_EccPoint256 Curve25519_generator = { + .x = {.byte = {0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,}}, + .y = {.byte = {0xd9, 0xd3, 0xce, 0x7e, 0xa2, 0xc5, 0xe9, 0x29, + 0xb2, 0x61, 0x7c, 0x6d, 0x7e, 0x4d, 0x3d, 0x92, + 0x4c, 0xd1, 0x48, 0x77, 0x2c, 0xdd, 0x1e, 0xe0, + 0xb4, 0x86, 0xa0, 0xb8, 0xa1, 0x19, 0xae, 0x20}}, +}; + +const PKA_EccParam256 Curve25519_prime = {.byte = {0xed, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f}}; + +const PKA_EccParam256 Curve25519_a = {.byte = {0x06, 0x6d, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,}}; + +const PKA_EccParam256 Curve25519_b = {.byte = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,}}; + +const PKA_EccParam256 Curve25519_order = {.byte = {0xb9, 0xdc, 0xf5, 0x5c, 0x1a, 0x63, 0x12, 0x58, + 0xd6, 0x9c, 0xf7, 0xa2, 0xde, 0xf9, 0xde, 0x14, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,}}; + +//***************************************************************************** +// +// Write a PKA parameter to the PKA module, set required registers, and add an offset. +// +//***************************************************************************** +static uint32_t PKAWritePkaParam(const uint8_t *param, uint32_t paramLength, uint32_t paramOffset, uint32_t ptrRegOffset) +{ + uint32_t i; + uint32_t *paramWordAlias = (uint32_t *)param; + // Take the floor of paramLength in 32-bit words + uint32_t paramLengthInWords = paramLength / sizeof(uint32_t); + + // Only copy data if it is specified. We may wish to simply allocate another buffer and get + // the required offset. + if (param) { + // Load the number in PKA RAM + for (i = 0; i < paramLengthInWords; i++) { + HWREG(PKA_RAM_BASE + paramOffset + sizeof(uint32_t) * i) = paramWordAlias[i]; + } + + // If the length is not a word-multiple, fill up a temporary word and copy that in + // to avoid a bus error. The extra zeros at the end should not matter, as the large + // number is little-endian and thus has no effect. + // We could have correctly calculated ceiling(paramLength / sizeof(uint32_t)) above. + // However, we would not have been able to zero-out the extra few most significant + // bytes of the most significant word. That would have resulted in doing maths operations + // on whatever follows param in RAM. + if (paramLength % sizeof(uint32_t)) { + uint32_t temp = 0; + uint8_t j; + + // Load the entire word line of the param remainder + temp = paramWordAlias[i]; + + // Zero-out all bytes beyond the end of the param + for (j = paramLength % sizeof(uint32_t); j < sizeof(uint32_t); j++) { + ((uint8_t *)&temp)[j] = 0; + } + + HWREG(PKA_RAM_BASE + paramOffset + sizeof(uint32_t) * i) = temp; + + // Increment paramLengthInWords since we take the ceiling of length / sizeof(uint32_t) + paramLengthInWords++; + } + } + + // Update the A, B, C, or D pointer with the offset address of the PKA RAM location + // where the number will be stored. + switch (ptrRegOffset) { + case PKA_O_APTR: + HWREG(PKA_BASE + PKA_O_APTR) = paramOffset >> 2; + HWREG(PKA_BASE + PKA_O_ALENGTH) = paramLengthInWords; + break; + case PKA_O_BPTR: + HWREG(PKA_BASE + PKA_O_BPTR) = paramOffset >> 2; + HWREG(PKA_BASE + PKA_O_BLENGTH) = paramLengthInWords; + break; + case PKA_O_CPTR: + HWREG(PKA_BASE + PKA_O_CPTR) = paramOffset >> 2; + break; + case PKA_O_DPTR: + HWREG(PKA_BASE + PKA_O_DPTR) = paramOffset >> 2; + break; + } + + // Ensure 8-byte alignment of next parameter. + // Returns the offset for the next parameter. + return paramOffset + sizeof(uint32_t) * (paramLengthInWords + (paramLengthInWords % 2)); +} + +//***************************************************************************** +// +// Write a PKA parameter to the PKA module but return a larger offset. +// +//***************************************************************************** +static uint32_t PKAWritePkaParamExtraOffset(const uint8_t *param, uint32_t paramLength, uint32_t paramOffset, uint32_t ptrRegOffset) +{ + // Ensure 16-byte alignment. + return (sizeof(uint32_t) * 2) + PKAWritePkaParam(param, paramLength, paramOffset, ptrRegOffset); +} + +//***************************************************************************** +// +// Writes the result of a large number arithmetic operation to a provided buffer. +// +//***************************************************************************** +static uint32_t PKAGetBigNumResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr) +{ + uint32_t mswOffset; + uint32_t lswOffset; + uint32_t lengthInWords; + uint32_t i; + uint32_t *resultWordAlias = (uint32_t *)resultBuf; + + // Check the arguments. + ASSERT(resultBuf); + ASSERT((resultPKAMemAddr > PKA_RAM_BASE) && + (resultPKAMemAddr < (PKA_RAM_BASE + PKA_RAM_TOT_BYTE_SIZE))); + + // Verify that the operation is complete. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + // Get the MSW register value. + mswOffset = HWREG(PKA_BASE + PKA_O_MSW); + + // If the result vector is zero, write back one zero byte so the caller does not need + // to handle a special error for the perhaps valid result of zero. + // They will only get the error status if they do not provide a buffer + if (mswOffset & PKA_MSW_RESULT_IS_ZERO_M) { + if (*resultLength){ + if(resultBuf){ + resultBuf[0] = 0; + } + + *resultLength = 1; + + return PKA_STATUS_SUCCESS; + } + else { + return PKA_STATUS_BUF_UNDERFLOW; + } + } + + // Get the length of the result + mswOffset = ((mswOffset & PKA_MSW_MSW_ADDRESS_M) + 1); + lswOffset = ((resultPKAMemAddr - PKA_RAM_BASE) >> 2); + + if (mswOffset >= lswOffset) { + lengthInWords = mswOffset - lswOffset; + } + else { + return PKA_STATUS_RESULT_ADDRESS_INCORRECT; + } + + // Check if the provided buffer length is adequate to store the result data. + if (*resultLength < lengthInWords * sizeof(uint32_t)) { + return PKA_STATUS_BUF_UNDERFLOW; + } + + // Copy the resultant length. + *resultLength = lengthInWords * sizeof(uint32_t); + + + if (resultBuf) { + // Copy the result into the resultBuf. + for (i = 0; i < lengthInWords; i++) { + resultWordAlias[i]= HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); + } + } + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Retrieve the result of a modulo operation or the remainder of a division. +// +//***************************************************************************** +static uint32_t PKAGetBigNumResultRemainder(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr) +{ + uint32_t regMSWVal; + uint32_t lengthInWords; + uint32_t i; + uint32_t *resultWordAlias = (uint32_t *)resultBuf; + + // Check the arguments. + ASSERT(resultBuf); + ASSERT((resultPKAMemAddr > PKA_RAM_BASE) && + (resultPKAMemAddr < (PKA_RAM_BASE + PKA_RAM_TOT_BYTE_SIZE))); + + // Verify that the operation is complete. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + // Get the MSW register value. + regMSWVal = HWREG(PKA_BASE + PKA_O_DIVMSW); + + // If the result vector is zero, write back one zero byte so the caller does not need + // to handle a special error for the perhaps valid result of zero. + // They will only get the error status if they do not provide a buffer + if (regMSWVal & PKA_DIVMSW_RESULT_IS_ZERO_M) { + if (*resultLength){ + if(resultBuf){ + resultBuf[0] = 0; + } + + *resultLength = 1; + + return PKA_STATUS_SUCCESS; + } + else { + return PKA_STATUS_BUF_UNDERFLOW; + } + } + + // Get the length of the result + lengthInWords = ((regMSWVal & PKA_DIVMSW_MSW_ADDRESS_M) + 1) - ((resultPKAMemAddr - PKA_RAM_BASE) >> 2); + + // Check if the provided buffer length is adequate to store the result data. + if (*resultLength < lengthInWords * sizeof(uint32_t)) { + return PKA_STATUS_BUF_UNDERFLOW; + } + + // Copy the resultant length. + *resultLength = lengthInWords * sizeof(uint32_t); + + if (resultBuf) { + // Copy the result into the resultBuf. + for (i = 0; i < lengthInWords; i++) { + resultWordAlias[i] = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); + } + } + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Writes the resultant curve point of an ECC operation to the provided buffer. +// +//***************************************************************************** +static uint32_t PKAGetECCResult(uint8_t *curvePointX, uint8_t *curvePointY, uint32_t resultPKAMemAddr, uint32_t length) +{ + uint32_t i = 0; + uint32_t *xWordAlias = (uint32_t *)curvePointX; + uint32_t *yWordAlias = (uint32_t *)curvePointY; + uint32_t lengthInWordsCeiling = 0; + + // Check for the arguments. + ASSERT(curvePointX); + ASSERT(curvePointY); + ASSERT((resultPKAMemAddr > PKA_RAM_BASE) && + (resultPKAMemAddr < (PKA_RAM_BASE + PKA_RAM_TOT_BYTE_SIZE))); + + // Verify that the operation is completed. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + if (HWREG(PKA_BASE + PKA_O_SHIFT)) { + return PKA_STATUS_FAILURE; + } + + // Check to make sure that the result vector is not the point at infinity. + if (HWREG(PKA_BASE + PKA_O_MSW) & PKA_MSW_RESULT_IS_ZERO) { + return PKA_STATUS_POINT_AT_INFINITY; + } + + if (curvePointX != NULL) { + // Copy the x co-ordinate value of the result from vector D into + // the curvePoint. + for (i = 0; i < (length / sizeof(uint32_t)); i++) { + xWordAlias[i] = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); + } + + // If the length is not a word-multiple, fill up a temporary word and copy that in + // to avoid a bus error. + if (length % sizeof(uint32_t)) { + uint32_t temp = 0; + uint8_t j; + + // Load the entire word line of the coordinate remainder + temp = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); + + // Write all remaining bytes to the coordinate + for (j = 0; j < length % sizeof(uint32_t); j++) { + curvePointX[i * sizeof(uint32_t) + j] = ((uint8_t *)&temp)[j]; + } + + } + } + + lengthInWordsCeiling = (length % sizeof(uint32_t)) ? length / sizeof(uint32_t) + 1 : length / sizeof(uint32_t); + + resultPKAMemAddr += sizeof(uint32_t) * (2 + lengthInWordsCeiling + (lengthInWordsCeiling % 2)); + + if (curvePointY != NULL) { + // Copy the y co-ordinate value of the result from vector D into + // the curvePoint. + for (i = 0; i < (length / sizeof(uint32_t)); i++) { + yWordAlias[i] = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); + } + + // If the length is not a word-multiple, fill up a temporary word and copy that in + // to avoid a bus error. + if (length % sizeof(uint32_t)) { + uint32_t temp = 0; + uint8_t j; + + // Load the entire word line of the coordinate remainder + temp = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); + + // Write all remaining bytes to the coordinate + for (j = 0; j < length % sizeof(uint32_t); j++) { + curvePointY[i * sizeof(uint32_t) + j] = ((uint8_t *)&temp)[j]; + } + } + } + + + return PKA_STATUS_SUCCESS; +} + + +//***************************************************************************** +// +// Provides the PKA operation status. +// +//***************************************************************************** +uint32_t PKAGetOpsStatus(void) +{ + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN_M) { + return PKA_STATUS_OPERATION_BUSY; + } + else { + return PKA_STATUS_OPERATION_RDY; + } +} + +//***************************************************************************** +// +// Check if an array consists only of zeros. +// +//***************************************************************************** +bool PKAArrayAllZeros(const uint8_t *array, uint32_t arrayLength) +{ + uint32_t i; + uint8_t arrayBits = 0; + + // We could speed things up by comparing word-wise rather than byte-wise. + // However, this extra overhead is inconsequential compared to running an + // actual PKA operation. Especially ECC operations. + for (i = 0; i < arrayLength; i++) { + arrayBits |= array[i]; + } + + if (arrayBits) { + return false; + } + else { + return true; + } + +} + +//***************************************************************************** +// +// Fill an array with zeros +// +//***************************************************************************** +void PKAZeroOutArray(const uint8_t *array, uint32_t arrayLength) +{ + uint32_t i; + // Take the floor of paramLength in 32-bit words + uint32_t arrayLengthInWords = arrayLength / sizeof(uint32_t); + + // Zero-out the array word-wise until i >= arrayLength + for (i = 0; i < arrayLengthInWords * sizeof(uint32_t); i += 4) { + HWREG(array + i) = 0; + } + + // If i != arrayLength, there are some remaining bytes to zero-out + if (arrayLength % sizeof(uint32_t)) { + // Subtract 4 from i, since i has already overshot the array + for (i -= 4; i < arrayLength; i++) { + HWREGB(array + i * sizeof(uint32_t)); + } + } +} + +//***************************************************************************** +// +// Start the big number modulus operation. +// +//***************************************************************************** +uint32_t PKABigNumModStart(const uint8_t *bigNum, uint32_t bigNumLength, const uint8_t *modulus, uint32_t modulusLength, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check the arguments. + ASSERT(bigNum); + ASSERT(modulus); + ASSERT(resultPKAMemAddr); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(bigNum, bigNumLength, offset, PKA_O_APTR); + + offset = PKAWritePkaParamExtraOffset(modulus, modulusLength, offset, PKA_O_BPTR); + + // Copy the result vector address location. + *resultPKAMemAddr = PKA_RAM_BASE + offset; + + // Load C pointer with the result location in PKA RAM + HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; + + // Start the PKCP modulo operation by setting the PKA Function register. + HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_MODULO); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the result of the big number modulus operation. +// +//***************************************************************************** +uint32_t PKABigNumModGetResult(uint8_t *resultBuf, uint32_t length, uint32_t resultPKAMemAddr) +{ + // Zero-out array in case modulo result is shorter than length + PKAZeroOutArray(resultBuf, length); + + return PKAGetBigNumResultRemainder(resultBuf, &length, resultPKAMemAddr); +} + +//***************************************************************************** +// +// Start the big number divide operation. +// +//***************************************************************************** +uint32_t PKABigNumDivideStart(const uint8_t *dividend, uint32_t dividendLength, const uint8_t *divisor, uint32_t divisorLength, uint32_t *resultQuotientMemAddr, uint32_t *resultRemainderMemAddr) +{ + uint32_t offset = 0; + + // Check the arguments. + ASSERT(dividend); + ASSERT(divisor); + ASSERT(resultQuotientMemAddr); + ASSERT(resultRemainderMemAddr); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(dividend, dividendLength, offset, PKA_O_APTR); + + offset = PKAWritePkaParamExtraOffset(divisor, divisorLength, offset, PKA_O_BPTR); + + // Copy the remainder result vector address location. + if (resultRemainderMemAddr) { + *resultRemainderMemAddr = PKA_RAM_BASE + offset; + } + + // The remainder cannot ever be larger than the divisor. It should fit inside + // a buffer of that size. + offset = PKAWritePkaParamExtraOffset(0, divisorLength, offset, PKA_O_CPTR); + + // Copy the remainder result vector address location. + if (resultQuotientMemAddr) { + *resultQuotientMemAddr = PKA_RAM_BASE + offset; + } + + // Load D pointer with the quotient location in PKA RAM + HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; + + // Start the PKCP modulo operation by setting the PKA Function register. + HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_DIVIDE); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the quotient of the big number divide operation. +// +//***************************************************************************** +uint32_t PKABigNumDivideGetQuotient(uint8_t *resultBuf, uint32_t *length, uint32_t resultQuotientMemAddr) +{ + return PKAGetBigNumResult(resultBuf, length, resultQuotientMemAddr); +} + +//***************************************************************************** +// +// Get the remainder of the big number divide operation. +// +//***************************************************************************** +uint32_t PKABigNumDivideGetRemainder(uint8_t *resultBuf, uint32_t *length, uint32_t resultQuotientMemAddr) +{ + return PKAGetBigNumResultRemainder(resultBuf, length, resultQuotientMemAddr); +} + + +//***************************************************************************** +// +// Start the comparison of two big numbers. +// +//***************************************************************************** +uint32_t PKABigNumCmpStart(const uint8_t *bigNum1, const uint8_t *bigNum2, uint32_t length) +{ + uint32_t offset = 0; + + // Check the arguments. + ASSERT(bigNum1); + ASSERT(bigNum2); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(bigNum1, length, offset, PKA_O_APTR); + + offset = PKAWritePkaParam(bigNum2, length, offset, PKA_O_BPTR); + + // Set the PKA Function register for the Compare operation + // and start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_COMPARE); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the result of the comparison operation of two big numbers. +// +//***************************************************************************** +uint32_t PKABigNumCmpGetResult(void) +{ + uint32_t status; + + // verify that the operation is complete. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + // Check the COMPARE register. + switch(HWREG(PKA_BASE + PKA_O_COMPARE)) { + case PKA_COMPARE_A_EQUALS_B: + status = PKA_STATUS_EQUAL; + break; + + case PKA_COMPARE_A_GREATER_THAN_B: + status = PKA_STATUS_A_GREATER_THAN_B; + break; + + case PKA_COMPARE_A_LESS_THAN_B: + status = PKA_STATUS_A_LESS_THAN_B; + break; + + default: + status = PKA_STATUS_FAILURE; + break; + } + + return status; +} + +//***************************************************************************** +// +// Start the big number inverse modulo operation. +// +//***************************************************************************** +uint32_t PKABigNumInvModStart(const uint8_t *bigNum, uint32_t bigNumLength, const uint8_t *modulus, uint32_t modulusLength, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check the arguments. + ASSERT(bigNum); + ASSERT(modulus); + ASSERT(resultPKAMemAddr); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(bigNum, bigNumLength, offset, PKA_O_APTR); + + offset = PKAWritePkaParam(modulus, modulusLength, offset, PKA_O_BPTR); + + // Copy the result vector address location. + *resultPKAMemAddr = PKA_RAM_BASE + offset; + + // Load D pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; + + // set the PKA function to InvMod operation and the start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION) = 0x0000F000; + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the result of the big number inverse modulo operation. +// +//***************************************************************************** +uint32_t PKABigNumInvModGetResult(uint8_t *resultBuf, uint32_t length, uint32_t resultPKAMemAddr) +{ + // Zero-out array in case modulo result is shorter than length + PKAZeroOutArray(resultBuf, length); + + return PKAGetBigNumResult(resultBuf, &length, resultPKAMemAddr); +} + +//***************************************************************************** +// +// Start the big number multiplication. +// +//***************************************************************************** +uint32_t PKABigNumMultiplyStart(const uint8_t *multiplicand, uint32_t multiplicandLength, const uint8_t *multiplier, uint32_t multiplierLength, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check for the arguments. + ASSERT(multiplicand); + ASSERT(multiplier); + ASSERT(resultPKAMemAddr); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(multiplicand, multiplicandLength, offset, PKA_O_APTR); + + offset = PKAWritePkaParam(multiplier, multiplierLength, offset, PKA_O_BPTR); + + + // Copy the result vector address location. + *resultPKAMemAddr = PKA_RAM_BASE + offset; + + // Load C pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; + + // Set the PKA function to the multiplication and start it. + HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_MULTIPLY); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the results of the big number multiplication. +// +//***************************************************************************** +uint32_t PKABigNumMultGetResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr) +{ + return PKAGetBigNumResult(resultBuf, resultLength, resultPKAMemAddr); +} + +//***************************************************************************** +// +// Start the addition of two big number. +// +//***************************************************************************** +uint32_t PKABigNumAddStart(const uint8_t *bigNum1, uint32_t bigNum1Length, const uint8_t *bigNum2, uint32_t bigNum2Length, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check for arguments. + ASSERT(bigNum1); + ASSERT(bigNum2); + ASSERT(resultPKAMemAddr); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(bigNum1, bigNum1Length, offset, PKA_O_APTR); + + offset = PKAWritePkaParam(bigNum2, bigNum2Length, offset, PKA_O_BPTR); + + // Copy the result vector address location. + *resultPKAMemAddr = PKA_RAM_BASE + offset; + + // Load C pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; + + // Set the function for the add operation and start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_ADD); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the result of the addition operation on two big number. +// +//***************************************************************************** +uint32_t PKABigNumSubGetResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr) +{ + return PKAGetBigNumResult(resultBuf, resultLength, resultPKAMemAddr); +} + +//***************************************************************************** +// +// Start the addition of two big number. +// +//***************************************************************************** +uint32_t PKABigNumSubStart(const uint8_t *minuend, uint32_t minuendLength, const uint8_t *subtrahend, uint32_t subtrahendLength, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check for arguments. + ASSERT(minuend); + ASSERT(subtrahend); + ASSERT(resultPKAMemAddr); + + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(minuend, minuendLength, offset, PKA_O_APTR); + + offset = PKAWritePkaParam(subtrahend, subtrahendLength, offset, PKA_O_BPTR); + + // Copy the result vector address location. + *resultPKAMemAddr = PKA_RAM_BASE + offset; + + // Load C pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; + + // Set the function for the add operation and start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_SUBTRACT); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the result of the addition operation on two big number. +// +//***************************************************************************** +uint32_t PKABigNumAddGetResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr) +{ + return PKAGetBigNumResult(resultBuf, resultLength, resultPKAMemAddr); +} + + +//***************************************************************************** +// +// Start ECC Multiplication. +// +//***************************************************************************** +uint32_t PKAEccMultiplyStart(const uint8_t *scalar, const uint8_t *curvePointX, const uint8_t *curvePointY, const uint8_t *prime, const uint8_t *a, const uint8_t *b, uint32_t length, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check for the arguments. + ASSERT(scalar); + ASSERT(curvePointX); + ASSERT(curvePointY); + ASSERT(prime); + ASSERT(a); + ASSERT(b); + ASSERT(length <= PKA_MAX_CURVE_SIZE_32_BIT_WORD * sizeof(uint32_t)); + ASSERT(resultPKAMemAddr); + + // Make sure no PKA operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(scalar, length, offset, PKA_O_APTR); + + offset = PKAWritePkaParamExtraOffset(prime, length, offset, PKA_O_BPTR); + offset = PKAWritePkaParamExtraOffset(a, length, offset, PKA_NO_POINTER_REG); + offset = PKAWritePkaParamExtraOffset(b, length, offset, PKA_NO_POINTER_REG); + + offset = PKAWritePkaParamExtraOffset(curvePointX, length, offset, PKA_O_CPTR); + offset = PKAWritePkaParamExtraOffset(curvePointY, length, offset, PKA_NO_POINTER_REG); + + // Update the result location. + // The resultPKAMemAddr may be 0 if we only want to check that we generated the point at infinity + if (resultPKAMemAddr) { + *resultPKAMemAddr = PKA_RAM_BASE + offset; + } + + // Load D pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; + + // Set the PKA function to ECC-MULT and start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION) = PKA_FUNCTION_RUN_M | (0x05 << PKA_FUNCTION_SEQUENCER_OPERATIONS_S); + + return PKA_STATUS_SUCCESS; +} + + +//***************************************************************************** +// +// Start ECC Montgomery Multiplication. +// +//***************************************************************************** +uint32_t PKAEccMontgomeryMultiplyStart(const uint8_t *scalar, const uint8_t *curvePointX, const uint8_t *prime, const uint8_t *a, uint32_t length, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check for the arguments. + ASSERT(scalar); + ASSERT(curvePointX); + ASSERT(prime); + ASSERT(a); + ASSERT(length <= PKA_MAX_CURVE_SIZE_32_BIT_WORD * sizeof(uint32_t)); + ASSERT(resultPKAMemAddr); + + // Make sure no PKA operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParam(scalar, length, offset, PKA_O_APTR); + + offset = PKAWritePkaParamExtraOffset(prime, length, offset, PKA_O_BPTR); + offset = PKAWritePkaParamExtraOffset(a, length, offset, PKA_NO_POINTER_REG); + + offset = PKAWritePkaParamExtraOffset(curvePointX, length, offset, PKA_O_CPTR); + + // Update the result location. + // The resultPKAMemAddr may be 0 if we only want to check that we generated the point at infinity + if (resultPKAMemAddr) { + *resultPKAMemAddr = PKA_RAM_BASE + offset; + } + + // Load D pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; + + // Set the PKA function to Montgomery ECC-MULT and start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION) = PKA_FUNCTION_RUN_M | (0x02 << PKA_FUNCTION_SEQUENCER_OPERATIONS_S); + + return PKA_STATUS_SUCCESS; +} + + +//***************************************************************************** +// +// Get the result of ECC Multiplication +// +//***************************************************************************** +uint32_t PKAEccMultiplyGetResult(uint8_t *curvePointX, uint8_t *curvePointY, uint32_t resultPKAMemAddr, uint32_t length) +{ + return PKAGetECCResult(curvePointX, curvePointY, resultPKAMemAddr, length); +} + +//***************************************************************************** +// +// Start the ECC Addition. +// +//***************************************************************************** +uint32_t PKAEccAddStart(const uint8_t *curvePoint1X, const uint8_t *curvePoint1Y, const uint8_t *curvePoint2X, const uint8_t *curvePoint2Y, const uint8_t *prime, const uint8_t *a, uint32_t length, uint32_t *resultPKAMemAddr) +{ + uint32_t offset = 0; + + // Check for the arguments. + ASSERT(curvePoint1X); + ASSERT(curvePoint1Y); + ASSERT(curvePoint2X); + ASSERT(curvePoint2Y); + ASSERT(prime); + ASSERT(a); + ASSERT(resultPKAMemAddr); + + // Make sure no operation is in progress. + if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { + return PKA_STATUS_OPERATION_BUSY; + } + + offset = PKAWritePkaParamExtraOffset(curvePoint1X, length, offset, PKA_O_APTR); + offset = PKAWritePkaParamExtraOffset(curvePoint1Y, length, offset, PKA_NO_POINTER_REG); + + + offset = PKAWritePkaParamExtraOffset(prime, length, offset, PKA_O_BPTR); + offset = PKAWritePkaParamExtraOffset(a, length, offset, PKA_NO_POINTER_REG); + + offset = PKAWritePkaParamExtraOffset(curvePoint2X, length, offset, PKA_O_CPTR); + offset = PKAWritePkaParamExtraOffset(curvePoint2Y, length, offset, PKA_NO_POINTER_REG); + + // Copy the result vector location. + *resultPKAMemAddr = PKA_RAM_BASE + offset; + + // Load D pointer with the result location in PKA RAM. + HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; + + // Set the PKA Function to ECC-ADD and start the operation. + HWREG(PKA_BASE + PKA_O_FUNCTION ) = PKA_FUNCTION_RUN_M | (0x03 << PKA_FUNCTION_SEQUENCER_OPERATIONS_S); + + return PKA_STATUS_SUCCESS; +} + +//***************************************************************************** +// +// Get the result of the ECC Addition +// +//***************************************************************************** +uint32_t PKAEccAddGetResult(uint8_t *curvePointX, uint8_t *curvePointY, uint32_t resultPKAMemAddr, uint32_t length) +{ + return PKAGetECCResult(curvePointX, curvePointY, resultPKAMemAddr, length); +} + +//***************************************************************************** +// +// Verify a public key against the supplied elliptic curve equation +// +//***************************************************************************** +uint32_t PKAEccVerifyPublicKeyWeierstrassStart(const uint8_t *curvePointX, const uint8_t *curvePointY, const uint8_t *prime, const uint8_t *a, const uint8_t *b, const uint8_t *order, uint32_t length) +{ + uint32_t pkaResult; + uint32_t resultAddress; + uint32_t resultLength; + uint8_t *scratchBuffer = (uint8_t *)(PKA_RAM_BASE + PKA_RAM_TOT_BYTE_SIZE / 2); + uint8_t *scratchBuffer2 = scratchBuffer + 512; + + + // Verify X in range [0, prime - 1] + PKABigNumCmpStart(curvePointX, + prime, + length); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + pkaResult = PKABigNumCmpGetResult(); + + if (pkaResult != PKA_STATUS_A_LESS_THAN_B) { + return PKA_STATUS_X_LARGER_THAN_PRIME; + } + + // Verify Y in range [0, prime - 1] + PKABigNumCmpStart(curvePointY, + prime, + length); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + pkaResult = PKABigNumCmpGetResult(); + + if (pkaResult != PKA_STATUS_A_LESS_THAN_B) { + return PKA_STATUS_Y_LARGER_THAN_PRIME; + } + + // Verify point on curve + // Short-Weierstrass equation: Y ^ 2 = X ^3 + a * X + b mod P + // Reduced: Y ^ 2 = X * (X ^ 2 + a) + b + + // tmp = X ^ 2 + PKABigNumMultiplyStart(curvePointX, length, curvePointX, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + resultLength = 200; + pkaResult = PKABigNumMultGetResult(scratchBuffer, &resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + // tmp += a + PKABigNumAddStart(scratchBuffer, resultLength, a, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + resultLength = 200; + pkaResult = PKABigNumAddGetResult(scratchBuffer, &resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + // tmp *= x + PKABigNumMultiplyStart(scratchBuffer, resultLength, curvePointX, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + resultLength = 200; + pkaResult = PKABigNumMultGetResult(scratchBuffer, &resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + // tmp += b + PKABigNumAddStart(scratchBuffer, resultLength, b, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + resultLength = 200; + pkaResult = PKABigNumAddGetResult(scratchBuffer, &resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + + // tmp2 = tmp % prime to ensure we have no fraction in the division. + // The number will only shrink from here on out. + PKABigNumModStart(scratchBuffer, resultLength, prime, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + // If the result is not a multiple of the word-length, the PKA HW will round up + // because it deals in words only. That means that using 'length' directly + // would cause and underflow, since length refers to the actual length in bytes of + // the curve parameters while the PKA HW reports that rounded up to the next + // word boundary. + // Use 200 as the resultLength instead since we are copying to the scratch buffer + // anyway. + // Practically, this only happens with curves such as NIST-P521 that are not word + // multiples. + resultLength = 200; + pkaResult = PKABigNumModGetResult(scratchBuffer2, resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + // tmp = y^2 + PKABigNumMultiplyStart(curvePointY, length, curvePointY, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + resultLength = 200; + pkaResult = PKABigNumMultGetResult(scratchBuffer, &resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + // tmp %= prime + PKABigNumModStart(scratchBuffer, resultLength, prime, length, &resultAddress); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + // If the result is not a multiple of the word-length, the PKA HW will round up + // because it deals in words only. That means that using 'length' directly + // would cause and underflow, since length refers to the actual length in bytes of + // the curve parameters while the PKA HW reports that rounded up to the next + // word boundary. + // Use 200 as the resultLength instead since we are copying to the scratch buffer + // anyway. + // Practically, this only happens with curves such as NIST-P521 that are not word + // multiples. + resultLength = 200; + pkaResult = PKABigNumModGetResult(scratchBuffer, resultLength, resultAddress); + + if (pkaResult != PKA_STATUS_SUCCESS) { + return PKA_STATUS_FAILURE; + } + + // tmp ?= tmp2 + PKABigNumCmpStart(scratchBuffer, + scratchBuffer2, + length); + + while(PKAGetOpsStatus() == PKA_STATUS_OPERATION_BUSY); + + pkaResult = PKABigNumCmpGetResult(); + + if (pkaResult != PKA_STATUS_EQUAL) { + return PKA_STATUS_POINT_NOT_ON_CURVE; + } + else { + return PKA_STATUS_SUCCESS; + } +} diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka.h new file mode 100644 index 000000000..d178c9249 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka.h @@ -0,0 +1,1441 @@ +/****************************************************************************** +* Filename: pka.h +* Revised: 2018-03-02 10:51:37 +0100 (Fri, 02 Mar 2018) +* Revision: 51635 +* +* Description: PKA header file. +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +//***************************************************************************** +// +//! \addtogroup peripheral_group +//! @{ +//! \addtogroup pka_api +//! @{ +// +//***************************************************************************** + +#ifndef __PKA_H__ +#define __PKA_H__ + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include "../inc/hw_types.h" +#include "../inc/hw_memmap.h" +#include "../inc/hw_ints.h" +#include "../inc/hw_pka.h" +#include "../inc/hw_pka_ram.h" +#include "interrupt.h" +#include "sys_ctrl.h" +#include "debug.h" +#include + +//***************************************************************************** +// +// Support for DriverLib in ROM: +// This section renames all functions that are not "static inline", so that +// calling these functions will default to implementation in flash. At the end +// of this file a second renaming will change the defaults to implementation in +// ROM for available functions. +// +// To force use of the implementation in flash, e.g. for debugging: +// - Globally: Define DRIVERLIB_NOROM at project level +// - Per function: Use prefix "NOROM_" when calling the function +// +//***************************************************************************** +#if !defined(DOXYGEN) + #define PKAGetOpsStatus NOROM_PKAGetOpsStatus + #define PKAArrayAllZeros NOROM_PKAArrayAllZeros + #define PKAZeroOutArray NOROM_PKAZeroOutArray + #define PKABigNumModStart NOROM_PKABigNumModStart + #define PKABigNumModGetResult NOROM_PKABigNumModGetResult + #define PKABigNumDivideStart NOROM_PKABigNumDivideStart + #define PKABigNumDivideGetQuotient NOROM_PKABigNumDivideGetQuotient + #define PKABigNumDivideGetRemainder NOROM_PKABigNumDivideGetRemainder + #define PKABigNumCmpStart NOROM_PKABigNumCmpStart + #define PKABigNumCmpGetResult NOROM_PKABigNumCmpGetResult + #define PKABigNumInvModStart NOROM_PKABigNumInvModStart + #define PKABigNumInvModGetResult NOROM_PKABigNumInvModGetResult + #define PKABigNumMultiplyStart NOROM_PKABigNumMultiplyStart + #define PKABigNumMultGetResult NOROM_PKABigNumMultGetResult + #define PKABigNumAddStart NOROM_PKABigNumAddStart + #define PKABigNumAddGetResult NOROM_PKABigNumAddGetResult + #define PKABigNumSubStart NOROM_PKABigNumSubStart + #define PKABigNumSubGetResult NOROM_PKABigNumSubGetResult + #define PKAEccMultiplyStart NOROM_PKAEccMultiplyStart + #define PKAEccMontgomeryMultiplyStart NOROM_PKAEccMontgomeryMultiplyStart + #define PKAEccMultiplyGetResult NOROM_PKAEccMultiplyGetResult + #define PKAEccAddStart NOROM_PKAEccAddStart + #define PKAEccAddGetResult NOROM_PKAEccAddGetResult + #define PKAEccVerifyPublicKeyWeierstrassStart NOROM_PKAEccVerifyPublicKeyWeierstrassStart +#endif + + + + +//***************************************************************************** +// +// Function return values +// +//***************************************************************************** +#define PKA_STATUS_SUCCESS 0 //!< Success +#define PKA_STATUS_FAILURE 1 //!< Failure +#define PKA_STATUS_INVALID_PARAM 2 //!< Invalid parameter +#define PKA_STATUS_BUF_UNDERFLOW 3 //!< Buffer underflow +#define PKA_STATUS_RESULT_0 4 //!< Result is all zeros +#define PKA_STATUS_A_GREATER_THAN_B 5 //!< Big number compare return status if the first big number is greater than the second. +#define PKA_STATUS_A_LESS_THAN_B 6 //!< Big number compare return status if the first big number is less than the second. +#define PKA_STATUS_EQUAL 7 //!< Big number compare return status if the first big number is equal to the second. +#define PKA_STATUS_OPERATION_BUSY 8 //!< PKA operation is in progress. +#define PKA_STATUS_OPERATION_RDY 9 //!< No PKA operation is in progress. +#define PKA_STATUS_LOCATION_IN_USE 10 //!< Location in PKA RAM is not available +#define PKA_STATUS_X_ZERO 11 //!< X coordinate of public key is 0 +#define PKA_STATUS_Y_ZERO 12 //!< Y coordinate of public key is 0 +#define PKA_STATUS_X_LARGER_THAN_PRIME 13 //!< X coordinate of public key is larger than the curve prime +#define PKA_STATUS_Y_LARGER_THAN_PRIME 14 //!< Y coordinate of public key is larger than the curve prime +#define PKA_STATUS_POINT_NOT_ON_CURVE 15 //!< The public key is not on the specified elliptic curve +#define PKA_STATUS_RESULT_ADDRESS_INCORRECT 16 //!< The address of the result passed into one of the PKA*GetResult functions is incorrect +#define PKA_STATUS_POINT_AT_INFINITY 17 //!< The ECC operation resulted in the point at infinity + + +//***************************************************************************** +// +// Length in bytes of NISTP224 parameters. +// +//***************************************************************************** +#define NISTP224_PARAM_SIZE_BYTES 28 + +//***************************************************************************** +// +// Length in bytes of NISTP256 parameters. +// +//***************************************************************************** +#define NISTP256_PARAM_SIZE_BYTES 32 + +//***************************************************************************** +// +// Length in bytes of NISTP384 parameters. +// +//***************************************************************************** +#define NISTP384_PARAM_SIZE_BYTES 48 + +//***************************************************************************** +// +// Length in bytes of NISTP521 parameters. +// +//***************************************************************************** +#define NISTP521_PARAM_SIZE_BYTES 66 + +//***************************************************************************** +// +// Length in bytes of BrainpoolP256R1 parameters. +// +//***************************************************************************** +#define BrainpoolP256R1_PARAM_SIZE_BYTES 32 + +//***************************************************************************** +// +// Length in bytes of BrainpoolP384R1 parameters. +// +//***************************************************************************** +#define BrainpoolP384R1_PARAM_SIZE_BYTES 48 + +//***************************************************************************** +// +// Length in bytes of BrainpoolP512R1 parameters. +// +//***************************************************************************** +#define BrainpoolP512R1_PARAM_SIZE_BYTES 64 + +//***************************************************************************** +// +// Length in bytes of Curve25519 parameters. +// +//***************************************************************************** +#define Curve25519_PARAM_SIZE_BYTES 32 + +//***************************************************************************** +// +// Union for parameters that forces 32-bit alignment on the byte array. +// +//***************************************************************************** +typedef union { + uint8_t byte[28]; + uint32_t word[28 / sizeof(uint32_t)]; +} PKA_EccParam224; + +typedef union { + uint8_t byte[32]; + uint32_t word[32 / sizeof(uint32_t)]; +} PKA_EccParam256; + +typedef union { + uint8_t byte[48]; + uint32_t word[48 / sizeof(uint32_t)]; +} PKA_EccParam384; + +typedef union { + uint8_t byte[64]; + uint32_t word[64 / sizeof(uint32_t)]; +} PKA_EccParam512; + +typedef union { + uint8_t byte[68]; + uint32_t word[68 / sizeof(uint32_t)]; +} PKA_EccParam521; + +//***************************************************************************** +// +// Struct to keep points in that forces adjacency of X and Y coordinates in +// memmory. +// +//***************************************************************************** + + +typedef struct PKA_EccPoint224_ { + PKA_EccParam224 x; + PKA_EccParam224 y; +} PKA_EccPoint224; + +typedef struct PKA_EccPoint256_ { + PKA_EccParam256 x; + PKA_EccParam256 y; +} PKA_EccPoint256; + +typedef struct PKA_EccPoint384_ { + PKA_EccParam384 x; + PKA_EccParam384 y; +} PKA_EccPoint384; + +typedef struct PKA_EccPoint512_ { + PKA_EccParam512 x; + PKA_EccParam512 y; +} PKA_EccPoint512; + +typedef struct PKA_EccPoint521_ { + PKA_EccParam521 x; + PKA_EccParam521 y; +} PKA_EccPoint521; + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the NISTP224 curve. +// +//***************************************************************************** +extern const PKA_EccPoint224 NISTP224_generator; + +//***************************************************************************** +// +//! \brief Prime of the NISTP224 curve. +// +//***************************************************************************** +extern const PKA_EccParam224 NISTP224_prime; + + +//***************************************************************************** +// +//! \brief a constant of the NISTP224 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam224 NISTP224_a; + + +//***************************************************************************** +// +//! \brief b constant of the NISTP224 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam224 NISTP224_b; + + +//***************************************************************************** +// +//! \brief Order of the NISTP224 curve. +// +//***************************************************************************** +extern const PKA_EccParam224 NISTP224_order; + + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the NISTP256 curve. +// +//***************************************************************************** +extern const PKA_EccPoint256 NISTP256_generator; + +//***************************************************************************** +// +//! \brief Prime of the NISTP256 curve. +// +//***************************************************************************** +extern const PKA_EccParam256 NISTP256_prime; + + +//***************************************************************************** +// +//! \brief a constant of the NISTP256 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam256 NISTP256_a; + + +//***************************************************************************** +// +//! \brief b constant of the NISTP256 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam256 NISTP256_b; + + +//***************************************************************************** +// +//! \brief Order of the NISTP256 curve. +// +//***************************************************************************** +extern const PKA_EccParam256 NISTP256_order; + + + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the NISTP384 curve. +// +//***************************************************************************** +extern const PKA_EccPoint384 NISTP384_generator; + +//***************************************************************************** +// +//! \brief Prime of the NISTP384 curve. +// +//***************************************************************************** +extern const PKA_EccParam384 NISTP384_prime; + + +//***************************************************************************** +// +//! \brief a constant of the NISTP384 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam384 NISTP384_a; + + +//***************************************************************************** +// +//! \brief b constant of the NISTP384 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam384 NISTP384_b; + + +//***************************************************************************** +// +//! \brief Order of the NISTP384 curve. +// +//***************************************************************************** +extern const PKA_EccParam384 NISTP384_order; + + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the NISTP521 curve. +// +//***************************************************************************** +extern const PKA_EccPoint521 NISTP521_generator; + +//***************************************************************************** +// +//! \brief Prime of the NISTP521 curve. +// +//***************************************************************************** +extern const PKA_EccParam521 NISTP521_prime; + + +//***************************************************************************** +// +//! \brief a constant of the NISTP521 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam521 NISTP521_a; + + +//***************************************************************************** +// +//! \brief b constant of the NISTP521 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam521 NISTP521_b; + + +//***************************************************************************** +// +//! \brief Order of the NISTP521 curve. +// +//***************************************************************************** +extern const PKA_EccParam521 NISTP521_order; + + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the BrainpoolP256R1 curve. +// +//***************************************************************************** +extern const PKA_EccPoint256 BrainpoolP256R1_generator; + +//***************************************************************************** +// +//! \brief Prime of the BrainpoolP256R1 curve. +// +//***************************************************************************** +extern const PKA_EccParam256 BrainpoolP256R1_prime; + + +//***************************************************************************** +// +//! \brief a constant of the BrainpoolP256R1 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam256 BrainpoolP256R1_a; + + +//***************************************************************************** +// +//! \brief b constant of the BrainpoolP256R1 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam256 BrainpoolP256R1_b; + + +//***************************************************************************** +// +//! \brief Order of the BrainpoolP256R1 curve. +// +//***************************************************************************** +extern const PKA_EccParam256 BrainpoolP256R1_order; + + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the BrainpoolP384R1 curve. +// +//***************************************************************************** +extern const PKA_EccPoint384 BrainpoolP384R1_generator; + +//***************************************************************************** +// +//! \brief Prime of the BrainpoolP384R1 curve. +// +//***************************************************************************** +extern const PKA_EccParam384 BrainpoolP384R1_prime; + + +//***************************************************************************** +// +//! \brief a constant of the BrainpoolP384R1 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam384 BrainpoolP384R1_a; + + +//***************************************************************************** +// +//! \brief b constant of the BrainpoolP384R1 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam384 BrainpoolP384R1_b; + + +//***************************************************************************** +// +//! \brief Order of the BrainpoolP384R1 curve. +// +//***************************************************************************** +extern const PKA_EccParam384 BrainpoolP384R1_order; + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the BrainpoolP512R1 curve. +// +//***************************************************************************** +extern const PKA_EccPoint512 BrainpoolP512R1_generator; + +//***************************************************************************** +// +//! \brief Prime of the BrainpoolP512R1 curve. +// +//***************************************************************************** +extern const PKA_EccParam512 BrainpoolP512R1_prime; + + +//***************************************************************************** +// +//! \brief a constant of the BrainpoolP512R1 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam512 BrainpoolP512R1_a; + + +//***************************************************************************** +// +//! \brief b constant of the BrainpoolP512R1 curve when expressed in short +//! Weierstrass form (y^3 = x^2 + a*x + b). +// +//***************************************************************************** +extern const PKA_EccParam512 BrainpoolP512R1_b; + + +//***************************************************************************** +// +//! \brief Order of the BrainpoolP512R1 curve. +// +//***************************************************************************** +extern const PKA_EccParam512 BrainpoolP512R1_order; + + + +//***************************************************************************** +// +//! \brief X coordinate of the generator point of the Curve25519 curve. +// +//***************************************************************************** +extern const PKA_EccPoint256 Curve25519_generator; + +//***************************************************************************** +// +//! \brief Prime of the Curve25519 curve. +// +//***************************************************************************** +extern const PKA_EccParam256 Curve25519_prime; + + +//***************************************************************************** +// +//! \brief a constant of the Curve25519 curve when expressed in Montgomery +//! form (By^2 = x^3 + a*x^2 + x). +// +//***************************************************************************** +extern const PKA_EccParam256 Curve25519_a; + + +//***************************************************************************** +// +//! \brief b constant of the Curve25519 curve when expressed in Montgomery +//! form (By^2 = x^3 + a*x^2 + x). +// +//***************************************************************************** +extern const PKA_EccParam256 Curve25519_b; + + +//***************************************************************************** +// +//! \brief Order of the Curve25519 curve. +// +//***************************************************************************** +extern const PKA_EccParam256 Curve25519_order; + +//***************************************************************************** +// +// Prototypes for the APIs. +// +//***************************************************************************** + +//***************************************************************************** +// +//! \brief Gets the PKA operation status. +//! +//! This function gets information on whether any PKA operation is in +//! progress or not. This function allows to check the PKA operation status +//! before starting any new PKA operation. +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA operation is in progress. +//! - \ref PKA_STATUS_OPERATION_RDY if the PKA operation is not in progress. +// +//***************************************************************************** +extern uint32_t PKAGetOpsStatus(void); + +//***************************************************************************** +// +//! \brief Checks whether and array only consists of zeros +//! +//! \param [in] array is the array to check. +//! +//! \param [in] arrayLength is the length of the array. +//! +//! \return Returns true if the array contains only zeros and false if one +//! or more bits are set. +// +//***************************************************************************** +extern bool PKAArrayAllZeros(const uint8_t *array, uint32_t arrayLength); + +//***************************************************************************** +// +//! \brief Zeros-out an array +//! +//! \param [in] array is the array to zero-out. +//! +//! \param [in] arrayLength is the length of the array. +// +//***************************************************************************** +extern void PKAZeroOutArray(const uint8_t *array, uint32_t arrayLength); + +//***************************************************************************** +// +//! \brief Starts a big number modulus operation. +//! +//! This function starts the modulo operation on the big number \c bigNum +//! using the divisor \c modulus. The PKA RAM location where the result +//! will be available is stored in \c resultPKAMemAddr. +//! +//! \param [in] bigNum is the pointer to the big number on which modulo operation +//! needs to be carried out. +//! +//! \param [in] bigNumLength is the size of the big number \c bigNum in bytes. +//! +//! \param [in] modulus is the pointer to the divisor. +//! +//! \param [in] modulusLength is the size of the divisor \c modulus in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY, if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumModGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumModStart(const uint8_t *bigNum, uint32_t bigNumLength, const uint8_t *modulus, uint32_t modulusLength, uint32_t *resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Gets the result of the big number modulus operation. +//! +//! This function gets the result of the big number modulus operation which was +//! previously started using the function PKABigNumModStart(). +//! The function will zero-out \c resultBuf prior to copying in the result of +//! the modulo operation. +//! +//! \param [out] resultBuf is the pointer to buffer where the result needs to +//! be stored. +//! +//! \param [in] length is the size of the provided buffer in bytes. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKABigNumModStart(). +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the \c length is less than the length +//! of the result. +//! +//! \sa PKABigNumModStart() +// +//***************************************************************************** +extern uint32_t PKABigNumModGetResult(uint8_t *resultBuf, uint32_t length, uint32_t resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Starts a big number divide operation. +//! +//! This function starts the dive operation on the big number \c bigNum +//! using the \c divisor. The PKA RAM location where the result +//! will be available is stored in \c resultPKAMemAddr. +//! +//! \param [in] dividend is the pointer to the big number to be divided. +//! +//! \param [in] dividendLength is the size of the big number \c dividend in bytes. +//! +//! \param [in] divisor is the pointer to the divisor. +//! +//! \param [in] divisorLength is the size of the \c divisor in bytes. +//! +//! \param [out] resultQuotientMemAddr is the pointer to the quotient vector location +//! which will be set by this function. +//! +//! \param [out] resultRemainderMemAddr is the pointer to the remainder vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY, if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumDivideGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumDivideStart(const uint8_t *dividend, + uint32_t dividendLength, + const uint8_t *divisor, + uint32_t divisorLength, + uint32_t *resultQuotientMemAddr, + uint32_t *resultRemainderMemAddr); + +//***************************************************************************** +// +//! \brief Gets the quotient of the big number divide operation. +//! +//! This function gets the quotient of the big number divide operation which was +//! previously started using the function PKABigNumDivideStart(). +//! +//! \param [out] resultBuf is the pointer to buffer where the result needs to +//! be stored. +//! +//! \param [in] length is the size of the provided buffer in bytes. +//! +//! \param [in] resultQuotientMemAddr is the address of the result location which +//! was provided by the start function PKABigNumDivideStart(). +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the \c length is less than the length +//! of the result. +//! +//! \sa PKABigNumDivideStart() +// +//***************************************************************************** +extern uint32_t PKABigNumDivideGetQuotient(uint8_t *resultBuf, uint32_t *length, uint32_t resultQuotientMemAddr); + +//***************************************************************************** +// +//! \brief Gets the remainder of the big number divide operation. +//! +//! This function gets the remainder of the big number divide operation which was +//! previously started using the function PKABigNumDivideStart(). +//! +//! \param [out] resultBuf is the pointer to buffer where the result needs to +//! be stored. +//! +//! \param [in] length is the size of the provided buffer in bytes. +//! +//! \param [in] resultRemainderMemAddr is the address of the result location which +//! was provided by the start function PKABigNumDivideStart(). +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the \c length is less than the length +//! of the result. +//! +//! \sa PKABigNumDivideStart() +// +//***************************************************************************** +extern uint32_t PKABigNumDivideGetRemainder(uint8_t *resultBuf, uint32_t *length, uint32_t resultRemainderMemAddr); + +//***************************************************************************** +// +//! \brief Starts the comparison of two big numbers. +//! +//! This function starts the comparison of two big numbers pointed by +//! \c bigNum1 and \c bigNum2. +//! +//! \note \c bigNum1 and \c bigNum2 must have same size. +//! +//! \param [in] bigNum1 is the pointer to the first big number. +//! +//! \param [in] bigNum2 is the pointer to the second big number. +//! +//! \param [in] length is the size of the big numbers in bytes. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumCmpGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumCmpStart(const uint8_t *bigNum1, const uint8_t *bigNum2, uint32_t length); + +//***************************************************************************** +// +//! \brief Gets the result of the comparison operation of two big numbers. +//! +//! This function provides the results of the comparison of two big numbers +//! which was started using the PKABigNumCmpStart(). +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_OPERATION_BUSY if the operation is in progress. +//! - \ref PKA_STATUS_SUCCESS if the two big numbers are equal. +//! - \ref PKA_STATUS_A_GREATER_THAN_B if the first number is greater than the second. +//! - \ref PKA_STATUS_A_LESS_THAN_B if the first number is less than the second. +//! +//! \sa PKABigNumCmpStart() +// +//***************************************************************************** +extern uint32_t PKABigNumCmpGetResult(void); + +//***************************************************************************** +// +//! \brief Starts a big number inverse modulo operation. +//! +//! This function starts the inverse modulo operation on \c bigNum +//! using the divisor \c modulus. +//! +//! \param [in] bigNum is the pointer to the buffer containing the big number +//! (dividend). +//! +//! \param [in] bigNumLength is the size of the \c bigNum in bytes. +//! +//! \param [in] modulus is the pointer to the buffer containing the divisor. +//! +//! \param [in] modulusLength is the size of the divisor in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumInvModGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumInvModStart(const uint8_t *bigNum, uint32_t bigNumLength, const uint8_t *modulus, uint32_t modulusLength, uint32_t *resultPKAMemAddr); + + +//***************************************************************************** +// +//! \brief Gets the result of the big number inverse modulo operation. +//! +//! This function gets the result of the big number inverse modulo operation +//! previously started using the function PKABigNumInvModStart(). +//! The function will zero-out \c resultBuf prior to copying in the result of +//! the inverse modulo operation. +//! +//! \param [out] resultBuf is the pointer to buffer where the result needs to be +//! stored. +//! +//! \param [in] length is the size of the provided buffer in bytes. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKABigNumInvModStart(). +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less +//! than the result. +//! +//! \sa PKABigNumInvModStart() +// +//***************************************************************************** +extern uint32_t PKABigNumInvModGetResult(uint8_t *resultBuf, uint32_t length, uint32_t resultPKAMemAddr); + + +//***************************************************************************** +// +//! \brief Starts the multiplication of two big numbers. +//! +//! \param [in] multiplicand is the pointer to the buffer containing the big +//! number multiplicand. +//! +//! \param [in] multiplicandLength is the size of the multiplicand in bytes. +//! +//! \param [in] multiplier is the pointer to the buffer containing the big +//! number multiplier. +//! +//! \param [in] multiplierLength is the size of the multiplier in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumMultGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumMultiplyStart(const uint8_t *multiplicand, uint32_t multiplicandLength, const uint8_t *multiplier, uint32_t multiplierLength, uint32_t *resultPKAMemAddr); + + +//***************************************************************************** +// +//! \brief Gets the result of the big number multiplication. +//! +//! This function gets the result of the multiplication of two big numbers +//! operation previously started using the function PKABigNumMultiplyStart(). +//! +//! \param [out] resultBuf is the pointer to buffer where the result needs to be +//! stored. +//! +//! \param [in, out] resultLength is the address of the variable containing the length of the +//! buffer in bytes. After the operation, the actual length of the resultant is stored +//! at this address. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKABigNumMultiplyStart(). +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_FAILURE if the operation is not successful. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less +//! then the length of the result. +//! +//! \sa PKABigNumMultiplyStart() +// +//***************************************************************************** +extern uint32_t PKABigNumMultGetResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Starts the addition of two big numbers. +//! +//! \param [in] bigNum1 is the pointer to the buffer containing the first +//! big number. +//! +//! \param [in] bigNum1Length is the size of the first big number in bytes. +//! +//! \param [in] bigNum2 is the pointer to the buffer containing the second +//! big number. +//! +//! \param [in] bigNum2Length is the size of the second big number in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumAddGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumAddStart(const uint8_t *bigNum1, uint32_t bigNum1Length, const uint8_t *bigNum2, uint32_t bigNum2Length, uint32_t *resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Gets the result of the addition operation on two big numbers. +//! +//! \param [out] resultBuf is the pointer to buffer where the result +//! needs to be stored. +//! +//! \param [in, out] resultLength is the address of the variable containing +//! the length of the buffer. After the operation the actual length of the +//! resultant is stored at this address. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKABigNumAddStart(). +//! +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_FAILURE if the operation is not successful. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less +//! then the length of the result. +//! +//! \sa PKABigNumAddStart() +// +//***************************************************************************** +extern uint32_t PKABigNumAddGetResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Starts the subtraction of one big number from another. +//! +//! \param [in] minuend is the pointer to the buffer containing the big number +//! to be subtracted from. +//! +//! \param [in] minuendLength is the size of the minuend in bytes. +//! +//! \param [in] subtrahend is the pointer to the buffer containing the big +//! number to subtract from the \c minuend. +//! +//! \param [in] subtrahendLength is the size of the subtrahend in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKABigNumSubGetResult() +// +//***************************************************************************** +extern uint32_t PKABigNumSubStart(const uint8_t *minuend, uint32_t minuendLength, const uint8_t *subtrahend, uint32_t subtrahendLength, uint32_t *resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Gets the result of the subtraction operation on two big numbers. +//! +//! \param [out] resultBuf is the pointer to buffer where the result +//! needs to be stored. +//! +//! \param [in, out] resultLength is the address of the variable containing +//! the length of the buffer. After the operation the actual length of the +//! resultant is stored at this address. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKABigNumAddStart(). +//! +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_FAILURE if the operation is not successful. +//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less +//! then the length of the result. +//! +//! \sa PKABigNumSubStart() +// +//***************************************************************************** +extern uint32_t PKABigNumSubGetResult(uint8_t *resultBuf, uint32_t *resultLength, uint32_t resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Starts ECC multiplication. +//! +//! \param [in] scalar is pointer to the buffer containing the scalar +//! value to be multiplied. +//! +//! \param [in] curvePointX is the pointer to the buffer containing the +//! X coordinate of the elliptic curve point to be multiplied. +//! The point must be on the given curve. +//! +//! \param [in] curvePointY is the pointer to the buffer containing the +//! Y coordinate of the elliptic curve point to be multiplied. +//! The point must be on the given curve. +//! +//! \param [in] prime is the prime of the curve. +//! +//! \param [in] a is the a constant of the curve when the curve equation is expressed +//! in short Weierstrass form (y^3 = x^2 + a*x + b). +//! +//! \param [in] b is the b constant of the curve when the curve equation is expressed +//! in short Weierstrass form (y^3 = x^2 + a*x + b). +//! +//! \param [in] length is the length of the curve parameters in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKAEccMultiplyGetResult() +// +//***************************************************************************** +extern uint32_t PKAEccMultiplyStart(const uint8_t *scalar, + const uint8_t *curvePointX, + const uint8_t *curvePointY, + const uint8_t *prime, + const uint8_t *a, + const uint8_t *b, + uint32_t length, + uint32_t *resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Starts ECC Montgomery multiplication. +//! +//! \param [in] scalar is pointer to the buffer containing the scalar +//! value to be multiplied. +//! +//! \param [in] curvePointX is the pointer to the buffer containing the +//! X coordinate of the elliptic curve point to be multiplied. +//! The point must be on the given curve. +//! +//! \param [in] prime is the prime of the curve. +//! +//! \param [in] a is the a constant of the curve when the curve equation is expressed +//! in short Weierstrass form (y^3 = x^2 + a*x + b). +//! +//! \param [in] length is the length of the curve parameters in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKAEccMultiplyGetResult() +// +//***************************************************************************** +extern uint32_t PKAEccMontgomeryMultiplyStart(const uint8_t *scalar, + const uint8_t *curvePointX, + const uint8_t *prime, + const uint8_t *a, + uint32_t length, + uint32_t *resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Gets the result of ECC multiplication +//! +//! This function gets the result of ECC point multiplication operation on the +//! EC point and the scalar value, previously started using the function +//! PKAEccMultiplyStart(). +//! +//! \param [out] curvePointX is the pointer to the structure where the X coordinate +//! of the resultant EC point will be stored. +//! +//! \param [out] curvePointY is the pointer to the structure where the Y coordinate +//! of the resultant EC point will be stored. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKAEccMultiplyStart(). +//! +//! \param [in] length is the length of the curve parameters in bytes. +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing +//! the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_FAILURE if the operation is not successful. +//! +//! \sa PKAEccMultiplyStart() +// +//***************************************************************************** +extern uint32_t PKAEccMultiplyGetResult(uint8_t *curvePointX, uint8_t *curvePointY, uint32_t resultPKAMemAddr, uint32_t length); + +//***************************************************************************** +// +//! \brief Starts the ECC addition. +//! +//! \param [in] curvePoint1X is the pointer to the buffer containing the +//! X coordinate of the first elliptic curve point to be added. +//! The point must be on the given curve. +//! +//! \param [in] curvePoint1Y is the pointer to the buffer containing the +//! Y coordinate of the first elliptic curve point to be added. +//! The point must be on the given curve. +//! +//! \param [in] curvePoint2X is the pointer to the buffer containing the +//! X coordinate of the second elliptic curve point to be added. +//! The point must be on the given curve. +//! +//! \param [in] curvePoint2Y is the pointer to the buffer containing the +//! Y coordinate of the second elliptic curve point to be added. +//! The point must be on the given curve. +//! +//! \param [in] prime is the prime of the curve. +//! +//! \param [in] a is the a constant of the curve when the curve equation is expressed +//! in short Weierstrass form (y^3 = x^2 + a*x + b). +//! +//! \param [in] length is the length of the curve parameters in bytes. +//! +//! \param [out] resultPKAMemAddr is the pointer to the result vector location +//! which will be set by this function. +//! +//!\return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing +//! some other operation. +//! +//! \sa PKAEccAddGetResult() +// +//***************************************************************************** +extern uint32_t PKAEccAddStart(const uint8_t *curvePoint1X, + const uint8_t *curvePoint1Y, + const uint8_t *curvePoint2X, + const uint8_t *curvePoint2Y, + const uint8_t *prime, + const uint8_t *a, + uint32_t length, + uint32_t *resultPKAMemAddr); + +//***************************************************************************** +// +//! \brief Gets the result of the ECC addition +//! +//! This function gets the result of ECC point addition operation on the +//! on the two given EC points, previously started using the function +//! PKAEccAddStart(). +//! +//! \param [out] curvePointX is the pointer to the structure where the X coordinate +//! of the resultant EC point will be stored. +//! +//! \param [out] curvePointY is the pointer to the structure where the Y coordinate +//! of the resultant EC point will be stored. +//! +//! \param [in] resultPKAMemAddr is the address of the result location which +//! was provided by the start function PKAEccAddGetResult(). +//! +//! \param [in] length is the length of the curve parameters in bytes. +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing the operation. +//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. +//! - \ref PKA_STATUS_FAILURE if the operation is not successful. +//! +//! \sa PKAEccAddStart() +// +//***************************************************************************** +extern uint32_t PKAEccAddGetResult(uint8_t *curvePointX, uint8_t *curvePointY, uint32_t resultPKAMemAddr, uint32_t length); + + +//***************************************************************************** +// +//! \brief Begins the validation of a public key against a Short-Weierstrass curve +//! +//! This function validates a public key against a curve. +//! After performing multiple smaller PKA operations in polling mode, +//! it starts an ECC scalar multiplication. +//! +//! The function verifies that: +//! - X and Y are in the range [1, prime - 1] +//! - The point is not the point at infinity +//! - X and Y satisfy the Short-Weierstrass curve equation Y^2 = X^3 + a*X + b mod P +//! - Multiplying the point by the order of the curve yields the point at infinity +//! +//! \param [in] curvePointX is the pointer to the buffer containing the +//! X coordinate of the elliptic curve point to verify. +//! +//! \param [in] curvePointY is the pointer to the buffer containing the +//! Y coordinate of the elliptic curve point to verify. +//! +//! \param [in] prime is the prime of the curve. +//! +//! \param [in] a is the a constant of the curve when the curve equation is expressed +//! in Short-Weierstrass form (y^3 = x^2 + a*x + b). +//! +//! \param [in] b is the b constant of the curve when the curve equation is expressed +//! in Short-Weierstrass form (y^3 = x^2 + a*x + b). +//! +//! \param [in] order is the order of the curve. +//! +//! \param [in] length is the length of the curve parameters in bytes. +//! +//! \return Returns a status code. +//! - \ref PKA_STATUS_SUCCESS if the operation is successful. +//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing the operation. +//! - \ref PKA_STATUS_FAILURE if the operation is not successful. +//! - \ref PKA_STATUS_X_ZERO if X is zero. +//! - \ref PKA_STATUS_Y_ZERO if Y is zero. +//! - \ref PKA_STATUS_X_LARGER_THAN_PRIME if X is larger than the curve prime +//! - \ref PKA_STATUS_Y_LARGER_THAN_PRIME if Y is larger than the curve prime +//! - \ref PKA_STATUS_POINT_NOT_ON_CURVE if X and Y do not satisfy the curve equation +//! +//! \sa PKAEccVerifyPublicKeyGetResult() +// +//***************************************************************************** +extern uint32_t PKAEccVerifyPublicKeyWeierstrassStart(const uint8_t *curvePointX, + const uint8_t *curvePointY, + const uint8_t *prime, + const uint8_t *a, + const uint8_t *b, + const uint8_t *order, + uint32_t length); + +//***************************************************************************** +// +// Support for DriverLib in ROM: +// Redirect to implementation in ROM when available. +// +//***************************************************************************** +#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN) + #include "../driverlib/rom.h" + #ifdef ROM_PKAGetOpsStatus + #undef PKAGetOpsStatus + #define PKAGetOpsStatus ROM_PKAGetOpsStatus + #endif + #ifdef ROM_PKAArrayAllZeros + #undef PKAArrayAllZeros + #define PKAArrayAllZeros ROM_PKAArrayAllZeros + #endif + #ifdef ROM_PKAZeroOutArray + #undef PKAZeroOutArray + #define PKAZeroOutArray ROM_PKAZeroOutArray + #endif + #ifdef ROM_PKABigNumModStart + #undef PKABigNumModStart + #define PKABigNumModStart ROM_PKABigNumModStart + #endif + #ifdef ROM_PKABigNumModGetResult + #undef PKABigNumModGetResult + #define PKABigNumModGetResult ROM_PKABigNumModGetResult + #endif + #ifdef ROM_PKABigNumDivideStart + #undef PKABigNumDivideStart + #define PKABigNumDivideStart ROM_PKABigNumDivideStart + #endif + #ifdef ROM_PKABigNumDivideGetQuotient + #undef PKABigNumDivideGetQuotient + #define PKABigNumDivideGetQuotient ROM_PKABigNumDivideGetQuotient + #endif + #ifdef ROM_PKABigNumDivideGetRemainder + #undef PKABigNumDivideGetRemainder + #define PKABigNumDivideGetRemainder ROM_PKABigNumDivideGetRemainder + #endif + #ifdef ROM_PKABigNumCmpStart + #undef PKABigNumCmpStart + #define PKABigNumCmpStart ROM_PKABigNumCmpStart + #endif + #ifdef ROM_PKABigNumCmpGetResult + #undef PKABigNumCmpGetResult + #define PKABigNumCmpGetResult ROM_PKABigNumCmpGetResult + #endif + #ifdef ROM_PKABigNumInvModStart + #undef PKABigNumInvModStart + #define PKABigNumInvModStart ROM_PKABigNumInvModStart + #endif + #ifdef ROM_PKABigNumInvModGetResult + #undef PKABigNumInvModGetResult + #define PKABigNumInvModGetResult ROM_PKABigNumInvModGetResult + #endif + #ifdef ROM_PKABigNumMultiplyStart + #undef PKABigNumMultiplyStart + #define PKABigNumMultiplyStart ROM_PKABigNumMultiplyStart + #endif + #ifdef ROM_PKABigNumMultGetResult + #undef PKABigNumMultGetResult + #define PKABigNumMultGetResult ROM_PKABigNumMultGetResult + #endif + #ifdef ROM_PKABigNumAddStart + #undef PKABigNumAddStart + #define PKABigNumAddStart ROM_PKABigNumAddStart + #endif + #ifdef ROM_PKABigNumAddGetResult + #undef PKABigNumAddGetResult + #define PKABigNumAddGetResult ROM_PKABigNumAddGetResult + #endif + #ifdef ROM_PKABigNumSubStart + #undef PKABigNumSubStart + #define PKABigNumSubStart ROM_PKABigNumSubStart + #endif + #ifdef ROM_PKABigNumSubGetResult + #undef PKABigNumSubGetResult + #define PKABigNumSubGetResult ROM_PKABigNumSubGetResult + #endif + #ifdef ROM_PKAEccMultiplyStart + #undef PKAEccMultiplyStart + #define PKAEccMultiplyStart ROM_PKAEccMultiplyStart + #endif + #ifdef ROM_PKAEccMontgomeryMultiplyStart + #undef PKAEccMontgomeryMultiplyStart + #define PKAEccMontgomeryMultiplyStart ROM_PKAEccMontgomeryMultiplyStart + #endif + #ifdef ROM_PKAEccMultiplyGetResult + #undef PKAEccMultiplyGetResult + #define PKAEccMultiplyGetResult ROM_PKAEccMultiplyGetResult + #endif + #ifdef ROM_PKAEccAddStart + #undef PKAEccAddStart + #define PKAEccAddStart ROM_PKAEccAddStart + #endif + #ifdef ROM_PKAEccAddGetResult + #undef PKAEccAddGetResult + #define PKAEccAddGetResult ROM_PKAEccAddGetResult + #endif + #ifdef ROM_PKAEccVerifyPublicKeyWeierstrassStart + #undef PKAEccVerifyPublicKeyWeierstrassStart + #define PKAEccVerifyPublicKeyWeierstrassStart ROM_PKAEccVerifyPublicKeyWeierstrassStart + #endif +#endif + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // __PKA_H__ + +//***************************************************************************** +// +//! Close the Doxygen group. +//! @} +//! @} +// +//***************************************************************************** diff --git a/third_party/ti/devices/cc26x2/driverlib/pka_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka_doc.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/pka_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/pka_doc.h index ed51442a2..c780a5345 100644 --- a/third_party/ti/devices/cc26x2/driverlib/pka_doc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pka_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: pka_doc.h -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/driverlib/prcm.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/prcm.c similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/prcm.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/prcm.c index 33abe8187..b4e36119d 100644 --- a/third_party/ti/devices/cc26x2/driverlib/prcm.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/prcm.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: prcm.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-07-19 10:58:53 +0200 (Wed, 19 Jul 2017) +* Revision: 49363 * * Description: Driver for the PRCM. * diff --git a/third_party/ti/devices/cc26x2/driverlib/prcm.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/prcm.h similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/prcm.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/prcm.h index c80325818..fabda4b42 100644 --- a/third_party/ti/devices/cc26x2/driverlib/prcm.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/prcm.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: prcm.h -* Revised: 2017-04-26 10:04:08 +0200 (Wed, 26 Apr 2017) -* Revision: 48836 +* Revised: 2017-12-11 16:44:38 +0100 (Mon, 11 Dec 2017) +* Revision: 50602 * * Description: Defines and prototypes for the PRCM * @@ -233,7 +233,7 @@ PRCMPeripheralValid(uint32_t ui32Peripheral) (ui32Peripheral == PRCM_PERIPH_I2C0) || (ui32Peripheral == PRCM_PERIPH_CRYPTO) || (ui32Peripheral == PRCM_PERIPH_TRNG) || - (ui32Peripheral == PRCM_PERIPH_PKA || + (ui32Peripheral == PRCM_PERIPH_PKA) || (ui32Peripheral == PRCM_PERIPH_UDMA) || (ui32Peripheral == PRCM_PERIPH_GPIO) || (ui32Peripheral == PRCM_PERIPH_I2S)); @@ -502,11 +502,11 @@ extern void PRCMAudioClockConfigSetOverride(uint32_t ui32ClkConfig, uint32_t ui3 //! - \ref PRCMDomainEnable() //! - \ref PRCMDomainDisable() //! - \ref PRCMPeripheralRunEnable() -//! - \ref PRCMPeripheralRunEnable() -//! - \ref PRCMPeripheralSleepEnable() +//! - \ref PRCMPeripheralRunDisable() //! - \ref PRCMPeripheralSleepEnable() +//! - \ref PRCMPeripheralSleepDisable() //! - \ref PRCMPeripheralDeepSleepEnable() -//! - \ref PRCMPeripheralDeepSleepEnable() +//! - \ref PRCMPeripheralDeepSleepDisable() //! //! \return None //! @@ -656,8 +656,7 @@ PRCMDomainDisable(uint32_t ui32Domains) //! The domains that can be turned on/off are: //! - \b PRCM_DOMAIN_RFCORE : RF Core //! - \b PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0 -//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, -//! DMA, UART1, I2C1 +//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1 //! - \b PRCM_DOMAIN_VIMS : SRAM, FLASH, ROM //! - \b PRCM_DOMAIN_SYSBUS //! - \b PRCM_DOMAIN_CPU @@ -680,8 +679,7 @@ extern void PRCMPowerDomainOn(uint32_t ui32Domains); //! The domains that can be turned on/off are: //! - \b PRCM_DOMAIN_RFCORE : RF Core //! - \b PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0 -//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, -//! DMA, UART1, I2C1 +//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1 //! - \b PRCM_DOMAIN_VIMS : SRAM, FLASH, ROM //! - \b PRCM_DOMAIN_VIMS_OFF_NO_WAKEUP : SRAM, FLASH, ROM //! - \b PRCM_DOMAIN_SYSBUS @@ -757,7 +755,7 @@ extern void PRCMPeripheralRunEnable(uint32_t ui32Peripheral); //***************************************************************************** // -//! Disables a peripheral in Run mode +//! \brief Disables a peripheral in Run mode //! //! Peripherals are disabled with this function. Once disabled, they will not //! operate or respond to register reads/writes. @@ -972,7 +970,7 @@ extern void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral); //! The parameter must be an OR'ed combination of one or several of: //! - \ref PRCM_DOMAIN_RFCORE : RF Core. //! - \ref PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0 -//! - \ref PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1, I2C1 +//! - \ref PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1 //! //! \return Returns status of the requested domains: //! - \ref PRCM_DOMAIN_POWER_ON : The specified domains are \b all powered up. diff --git a/third_party/ti/devices/cc26x2/driverlib/pwr_ctrl.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pwr_ctrl.c similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/pwr_ctrl.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/pwr_ctrl.c index 816966952..92e79557e 100644 --- a/third_party/ti/devices/cc26x2/driverlib/pwr_ctrl.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pwr_ctrl.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: pwr_ctrl.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Power Control driver. * diff --git a/third_party/ti/devices/cc26x2/driverlib/pwr_ctrl.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pwr_ctrl.h similarity index 90% rename from third_party/ti/devices/cc26x2/driverlib/pwr_ctrl.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/pwr_ctrl.h index 4b619703e..fe9897217 100644 --- a/third_party/ti/devices/cc26x2/driverlib/pwr_ctrl.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/pwr_ctrl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: pwr_ctrl.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-11-02 15:41:14 +0100 (Thu, 02 Nov 2017) +* Revision: 50165 * * Description: Defines and prototypes for the System Power Control. * @@ -196,7 +196,9 @@ PowerCtrlSourceGet(void) // //! \brief OBSOLETE: Get the last known reset source of the system. //! -//! Recommend using function \ref SysCtrlResetSourceGet() instead of this one. +//! \deprecated This function will be removed in a future release. +//! Use \ref SysCtrlResetSourceGet() instead. +//! //! This function returns reset source but does not cover if waking up from shutdown. //! This function can be seen as a subset of function \ref SysCtrlResetSourceGet() //! and will be removed in a future release. @@ -226,45 +228,41 @@ PowerCtrlResetSourceGet(void) //***************************************************************************** // -//! \brief Close the latches in the AON IOC interface and in padring. +//! \brief Enables pad sleep in order to latch device outputs before shutdown. //! -//! Use this function to unfreeze the current value retained on the IOs driven -//! by the device. This is required if it is desired to maintain the level of -//! any IO driven when going through a shutdown/powerdown cycle. +//! See \ref SysCtrlShutdown() for more information about how to enter +//! shutdown and how to wake up from shutdown. //! //! \return None //! -//! \sa \ref PowerCtrlIOFreezeDisable() +//! \sa \ref PowerCtrlPadSleepDisable() // //***************************************************************************** __STATIC_INLINE void -PowerCtrlIOFreezeEnable(void) +PowerCtrlPadSleepEnable(void) { - // Close the IO latches at AON_IOC level and in the padring. - AONIOCFreezeEnable(); HWREG(AON_PMCTL_BASE + AON_PMCTL_O_SLEEPCTL) = 0; HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); } //***************************************************************************** // -//! Open the latches in the AON IOC interface and in padring. +//! \brief Disables pad sleep in order to unlatch device outputs after wakeup from shutdown. //! -//! Use this function to unfreeze the latches that retained on the IOs driven -//! by the device. This function should not be called before the application -//! has reinitialized the IO configuration that will drive the IOs to the -//! desired level. +//! This function must be called by the application after the device wakes up +//! from shutdown. +//! +//! See \ref SysCtrlShutdown() for more information about how to enter +//! shutdown and how to wake up from shutdown. //! //! \return None //! -//! \sa \ref PowerCtrlIOFreezeEnable() +//! \sa \ref PowerCtrlPadSleepEnable() // //***************************************************************************** __STATIC_INLINE void -PowerCtrlIOFreezeDisable(void) +PowerCtrlPadSleepDisable(void) { - // Open the IO latches at AON_IOC level and in the padring - AONIOCFreezeDisable(); HWREG(AON_PMCTL_BASE + AON_PMCTL_O_SLEEPCTL) = 1; HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); } diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_ble_cmd.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ble_cmd.h similarity index 77% rename from third_party/ti/devices/cc26x2/driverlib/rf_ble_cmd.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ble_cmd.h index 4902448af..2fc251fbb 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_ble_cmd.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ble_cmd.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_ble_cmd.h -* Revised: 2017-05-03 15:31:44 +0200 (Wed, 03 May 2017) -* Revision: 17775 +* Revised: 2018-05-07 15:02:01 +0200 (Mon, 07 May 2018) +* Revision: 18438 * -* Description: CC26xx/CC13xx API for Bluetooth Low Energy commands +* Description: CC13x2/CC26x2 API for Bluetooth Low Energy commands * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -40,11 +40,17 @@ #define __BLE_CMD_H #ifndef __RFC_STRUCT -#ifdef __GNUC__ -#define __RFC_STRUCT __attribute__ ((aligned (4))) -#else #define __RFC_STRUCT #endif + +#ifndef __RFC_STRUCT_ATTR +#if defined(__GNUC__) +#define __RFC_STRUCT_ATTR __attribute__ ((aligned (4))) +#elif defined(__TI_ARM__) +#define __RFC_STRUCT_ATTR __attribute__ ((__packed__,aligned (4))) +#else +#define __RFC_STRUCT_ATTR +#endif #endif //! \addtogroup rfc @@ -59,6 +65,7 @@ typedef struct __RFC_STRUCT rfc_bleRadioOp_s rfc_bleRadioOp_t; typedef struct __RFC_STRUCT rfc_ble5RadioOp_s rfc_ble5RadioOp_t; +typedef struct __RFC_STRUCT rfc_ble5Tx20RadioOp_s rfc_ble5Tx20RadioOp_t; typedef struct __RFC_STRUCT rfc_CMD_BLE_SLAVE_s rfc_CMD_BLE_SLAVE_t; typedef struct __RFC_STRUCT rfc_CMD_BLE_MASTER_s rfc_CMD_BLE_MASTER_t; typedef struct __RFC_STRUCT rfc_CMD_BLE_ADV_s rfc_CMD_BLE_ADV_t; @@ -79,6 +86,11 @@ typedef struct __RFC_STRUCT rfc_CMD_BLE5_SCANNER_s rfc_CMD_BLE5_SCANNER_t; typedef struct __RFC_STRUCT rfc_CMD_BLE5_INITIATOR_s rfc_CMD_BLE5_INITIATOR_t; typedef struct __RFC_STRUCT rfc_CMD_BLE5_GENERIC_RX_s rfc_CMD_BLE5_GENERIC_RX_t; typedef struct __RFC_STRUCT rfc_CMD_BLE5_TX_TEST_s rfc_CMD_BLE5_TX_TEST_t; +typedef struct __RFC_STRUCT rfc_CMD_BLE5_ADV_s rfc_CMD_BLE5_ADV_t; +typedef struct __RFC_STRUCT rfc_CMD_BLE5_ADV_DIR_s rfc_CMD_BLE5_ADV_DIR_t; +typedef struct __RFC_STRUCT rfc_CMD_BLE5_ADV_NC_s rfc_CMD_BLE5_ADV_NC_t; +typedef struct __RFC_STRUCT rfc_CMD_BLE5_ADV_SCAN_s rfc_CMD_BLE5_ADV_SCAN_t; +typedef struct __RFC_STRUCT rfc_CMD_BLE5_RADIO_SETUP_PA_s rfc_CMD_BLE5_RADIO_SETUP_PA_t; typedef struct __RFC_STRUCT rfc_bleMasterSlavePar_s rfc_bleMasterSlavePar_t; typedef struct __RFC_STRUCT rfc_bleSlavePar_s rfc_bleSlavePar_t; typedef struct __RFC_STRUCT rfc_bleMasterPar_s rfc_bleMasterPar_t; @@ -129,7 +141,7 @@ struct __RFC_STRUCT rfc_bleRadioOp_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -142,7 +154,7 @@ struct __RFC_STRUCT rfc_bleRadioOp_s { } whitening; uint8_t* pParams; //!< Pointer to command specific parameter structure uint8_t* pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -168,7 +180,7 @@ struct __RFC_STRUCT rfc_ble5RadioOp_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -185,16 +197,80 @@ struct __RFC_STRUCT rfc_ble5RadioOp_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) uint8_t* pParams; //!< Pointer to command specific parameter structure uint8_t* pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup ble5Tx20RadioOp +//! @{ +//! Command structure for Bluetooth commands which includes the optional field for 20-dBm PA TX power +struct __RFC_STRUCT rfc_ble5Tx20RadioOp_s { + uint16_t commandNo; //!< The command ID number + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + uint8_t channel; //!< \brief Channel to use
+ //!< 0--39: BLE advertising/data channel index
+ //!< 60--207: Custom frequency; (2300 + channel) MHz
+ //!< 255: Use existing frequency
+ //!< Others: Reserved + struct { + uint8_t init:7; //!< \brief If bOverride = 1 or custom frequency is used:
+ //!< 0: Do not use whitening
+ //!< Other value: Initialization for 7-bit LFSR whitener + uint8_t bOverride:1; //!< \brief 0: Use default whitening for BLE advertising/data channels
+ //!< 1: Override whitening initialization with value of init + } whitening; + struct { + uint8_t mainMode:2; //!< \brief PHY to use:
+ //!< 0: 1 Mbps
+ //!< 1: 2 Mbps
+ //!< 2: Coded
+ //!< 3: Reserved + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. + } phyMode; + uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) + uint8_t* pParams; //!< Pointer to command specific parameter structure + uint8_t* pOutput; //!< Pointer to command specific output structure + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} @@ -222,7 +298,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_SLAVE_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -235,7 +311,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_SLAVE_s { } whitening; rfc_bleSlavePar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleMasterSlaveOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -263,7 +339,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_MASTER_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -276,7 +352,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_MASTER_s { } whitening; rfc_bleMasterPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleMasterSlaveOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -304,7 +380,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -317,7 +393,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_s { } whitening; rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -345,7 +421,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_DIR_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -358,7 +434,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_DIR_s { } whitening; rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -386,7 +462,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_NC_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -399,7 +475,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_NC_s { } whitening; rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -427,7 +503,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_SCAN_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -440,7 +516,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_SCAN_s { } whitening; rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -468,7 +544,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_SCANNER_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -481,7 +557,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_SCANNER_s { } whitening; rfc_bleScannerPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleScannerOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -509,7 +585,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_INITIATOR_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -522,7 +598,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_INITIATOR_s { } whitening; rfc_bleInitiatorPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleInitiatorOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -550,7 +626,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_GENERIC_RX_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -563,7 +639,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_GENERIC_RX_s { } whitening; rfc_bleGenericRxPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleGenericRxOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -591,7 +667,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_TX_TEST_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -604,7 +680,7 @@ struct __RFC_STRUCT rfc_CMD_BLE_TX_TEST_s { } whitening; rfc_bleTxTestPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleTxTestOutput_t *pOutput; //!< Pointer to command specific output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -619,14 +695,14 @@ struct __RFC_STRUCT rfc_CMD_BLE_ADV_PAYLOAD_s { uint8_t newLen; //!< Length of the new payload uint8_t* pNewData; //!< Pointer to the buffer containing the new data rfc_bleAdvPar_t *pParams; //!< Pointer to the parameter structure to update -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_RADIO_SETUP //! @{ #define CMD_BLE5_RADIO_SETUP 0x1820 -//! BLE Radio Setup Command for all v5.0 PHYs +//! Bluetooth 5 Radio Setup Command for all PHYs struct __RFC_STRUCT rfc_CMD_BLE5_RADIO_SETUP_s { uint16_t commandNo; //!< The command ID number 0x1820 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -656,8 +732,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_RADIO_SETUP_s { //!< 0: S = 8 (125 kbps)
//!< 1: S = 2 (500 kbps) } defaultPhy; - uint8_t loDivider; //!< \brief LO divider setting to use. Supported values: 0, 2, (4, - //!< 5, 6, 10, 12, 15, and 30.) + uint8_t loDivider; //!< LO divider setting to use. Supported values: 0 or 2. struct { uint16_t frontEndMode:3; //!< \brief 0x00: Differential mode
//!< 0x01: Single-ended mode RFP
@@ -686,14 +761,14 @@ struct __RFC_STRUCT rfc_CMD_BLE5_RADIO_SETUP_s { //!< 2 Mbps PHY mode. If NULL, no override is used. uint32_t* pRegOverrideCoded; //!< \brief Pointer to a list of hardware and configuration registers to override when selecting //!< coded PHY mode. If NULL, no override is used. -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_SLAVE //! @{ #define CMD_BLE5_SLAVE 0x1821 -//! BLE Slave Command +//! Bluetooth 5 Slave Command struct __RFC_STRUCT rfc_CMD_BLE5_SLAVE_s { uint16_t commandNo; //!< The command ID number 0x1821 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -714,7 +789,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_SLAVE_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -731,23 +806,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_SLAVE_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_ble5SlavePar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleMasterSlaveOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_MASTER //! @{ #define CMD_BLE5_MASTER 0x1822 -//! BLE Master Command +//! Bluetooth 5 Master Command struct __RFC_STRUCT rfc_CMD_BLE5_MASTER_s { uint16_t commandNo; //!< The command ID number 0x1822 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -768,7 +852,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_MASTER_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -785,23 +869,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_MASTER_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_ble5MasterPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleMasterSlaveOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_ADV_EXT //! @{ #define CMD_BLE5_ADV_EXT 0x1823 -//! BLE Extended Advertiser Command +//! Bluetooth 5 Extended Advertiser Command struct __RFC_STRUCT rfc_CMD_BLE5_ADV_EXT_s { uint16_t commandNo; //!< The command ID number 0x1823 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -822,7 +915,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_ADV_EXT_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -839,23 +932,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_ADV_EXT_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_ble5AdvExtPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_ADV_AUX //! @{ #define CMD_BLE5_ADV_AUX 0x1824 -//! BLE Secondary Channel Advertiser Command +//! Bluetooth 5 Secondary Channel Advertiser Command struct __RFC_STRUCT rfc_CMD_BLE5_ADV_AUX_s { uint16_t commandNo; //!< The command ID number 0x1824 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -876,7 +978,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_ADV_AUX_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -893,23 +995,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_ADV_AUX_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_ble5AdvAuxPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_SCANNER //! @{ #define CMD_BLE5_SCANNER 0x1827 -//! BLE Scanner Command +//! Bluetooth 5 Scanner Command struct __RFC_STRUCT rfc_CMD_BLE5_SCANNER_s { uint16_t commandNo; //!< The command ID number 0x1827 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -930,7 +1041,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_SCANNER_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -947,23 +1058,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_SCANNER_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_ble5ScannerPar_t *pParams; //!< Pointer to command specific parameter structure rfc_ble5ScanInitOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_INITIATOR //! @{ #define CMD_BLE5_INITIATOR 0x1828 -//! BLE Initiator Command +//! Bluetooth 5 Initiator Command struct __RFC_STRUCT rfc_CMD_BLE5_INITIATOR_s { uint16_t commandNo; //!< The command ID number 0x1828 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -984,7 +1104,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_INITIATOR_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -1001,23 +1121,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_INITIATOR_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_ble5InitiatorPar_t *pParams; //!< Pointer to command specific parameter structure rfc_ble5ScanInitOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_GENERIC_RX //! @{ #define CMD_BLE5_GENERIC_RX 0x1829 -//! BLE Generic Receiver Command +//! Bluetooth 5 Generic Receiver Command struct __RFC_STRUCT rfc_CMD_BLE5_GENERIC_RX_s { uint16_t commandNo; //!< The command ID number 0x1829 uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -1038,7 +1167,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_GENERIC_RX_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -1055,23 +1184,32 @@ struct __RFC_STRUCT rfc_CMD_BLE5_GENERIC_RX_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_bleGenericRxPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleGenericRxOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_BLE5_TX_TEST //! @{ #define CMD_BLE5_TX_TEST 0x182A -//! BLE PHY Test Transmitter Command +//! Bluetooth 5 PHY Test Transmitter Command struct __RFC_STRUCT rfc_CMD_BLE5_TX_TEST_s { uint16_t commandNo; //!< The command ID number 0x182A uint16_t status; //!< \brief An integer telling the status of the command. This value is @@ -1092,7 +1230,7 @@ struct __RFC_STRUCT rfc_CMD_BLE5_TX_TEST_s { uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; uint8_t channel; //!< \brief Channel to use
- //!< 0--39: BLE advertising/data channel number
+ //!< 0--39: BLE advertising/data channel index
//!< 60--207: Custom frequency; (2300 + channel) MHz
//!< 255: Use existing frequency
//!< Others: Reserved @@ -1109,16 +1247,346 @@ struct __RFC_STRUCT rfc_CMD_BLE5_TX_TEST_s { //!< 1: 2 Mbps
//!< 2: Coded
//!< 3: Reserved - uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected.
- //!< 0: S = 8 (125 kbps)
- //!< 1: S = 2 (500 kbps) + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. } phyMode; uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS - uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup). - //!< 0x0000: Use default TX power. + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) rfc_bleTxTestPar_t *pParams; //!< Pointer to command specific parameter structure rfc_bleTxTestOutput_t *pOutput; //!< Pointer to command specific output structure -}; + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_BLE5_ADV +//! @{ +#define CMD_BLE5_ADV 0x182B +//! Bluetooth 5 Connectable Undirected Advertiser Command +struct __RFC_STRUCT rfc_CMD_BLE5_ADV_s { + uint16_t commandNo; //!< The command ID number 0x182B + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + uint8_t channel; //!< \brief Channel to use
+ //!< 0--39: BLE advertising/data channel index
+ //!< 60--207: Custom frequency; (2300 + channel) MHz
+ //!< 255: Use existing frequency
+ //!< Others: Reserved + struct { + uint8_t init:7; //!< \brief If bOverride = 1 or custom frequency is used:
+ //!< 0: Do not use whitening
+ //!< Other value: Initialization for 7-bit LFSR whitener + uint8_t bOverride:1; //!< \brief 0: Use default whitening for BLE advertising/data channels
+ //!< 1: Override whitening initialization with value of init + } whitening; + struct { + uint8_t mainMode:2; //!< \brief PHY to use:
+ //!< 0: 1 Mbps
+ //!< 1: 2 Mbps
+ //!< 2: Coded
+ //!< 3: Reserved + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. + } phyMode; + uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) + rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure + rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_BLE5_ADV_DIR +//! @{ +#define CMD_BLE5_ADV_DIR 0x182C +//! Bluetooth 5 Connectable Directed Advertiser Command +struct __RFC_STRUCT rfc_CMD_BLE5_ADV_DIR_s { + uint16_t commandNo; //!< The command ID number 0x182C + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + uint8_t channel; //!< \brief Channel to use
+ //!< 0--39: BLE advertising/data channel index
+ //!< 60--207: Custom frequency; (2300 + channel) MHz
+ //!< 255: Use existing frequency
+ //!< Others: Reserved + struct { + uint8_t init:7; //!< \brief If bOverride = 1 or custom frequency is used:
+ //!< 0: Do not use whitening
+ //!< Other value: Initialization for 7-bit LFSR whitener + uint8_t bOverride:1; //!< \brief 0: Use default whitening for BLE advertising/data channels
+ //!< 1: Override whitening initialization with value of init + } whitening; + struct { + uint8_t mainMode:2; //!< \brief PHY to use:
+ //!< 0: 1 Mbps
+ //!< 1: 2 Mbps
+ //!< 2: Coded
+ //!< 3: Reserved + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. + } phyMode; + uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) + rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure + rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_BLE5_ADV_NC +//! @{ +#define CMD_BLE5_ADV_NC 0x182D +//! Bluetooth 5 Non-Connectable Advertiser Command +struct __RFC_STRUCT rfc_CMD_BLE5_ADV_NC_s { + uint16_t commandNo; //!< The command ID number 0x182D + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + uint8_t channel; //!< \brief Channel to use
+ //!< 0--39: BLE advertising/data channel index
+ //!< 60--207: Custom frequency; (2300 + channel) MHz
+ //!< 255: Use existing frequency
+ //!< Others: Reserved + struct { + uint8_t init:7; //!< \brief If bOverride = 1 or custom frequency is used:
+ //!< 0: Do not use whitening
+ //!< Other value: Initialization for 7-bit LFSR whitener + uint8_t bOverride:1; //!< \brief 0: Use default whitening for BLE advertising/data channels
+ //!< 1: Override whitening initialization with value of init + } whitening; + struct { + uint8_t mainMode:2; //!< \brief PHY to use:
+ //!< 0: 1 Mbps
+ //!< 1: 2 Mbps
+ //!< 2: Coded
+ //!< 3: Reserved + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. + } phyMode; + uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) + rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure + rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_BLE5_ADV_SCAN +//! @{ +#define CMD_BLE5_ADV_SCAN 0x182E +//! Bluetooth 5 Scannable Undirected Advertiser Command +struct __RFC_STRUCT rfc_CMD_BLE5_ADV_SCAN_s { + uint16_t commandNo; //!< The command ID number 0x182E + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + uint8_t channel; //!< \brief Channel to use
+ //!< 0--39: BLE advertising/data channel index
+ //!< 60--207: Custom frequency; (2300 + channel) MHz
+ //!< 255: Use existing frequency
+ //!< Others: Reserved + struct { + uint8_t init:7; //!< \brief If bOverride = 1 or custom frequency is used:
+ //!< 0: Do not use whitening
+ //!< Other value: Initialization for 7-bit LFSR whitener + uint8_t bOverride:1; //!< \brief 0: Use default whitening for BLE advertising/data channels
+ //!< 1: Override whitening initialization with value of init + } whitening; + struct { + uint8_t mainMode:2; //!< \brief PHY to use:
+ //!< 0: 1 Mbps
+ //!< 1: 2 Mbps
+ //!< 2: Coded
+ //!< 3: Reserved + uint8_t coding:6; //!< \brief Coding to use for TX if coded PHY is selected. + //!< See the Technical Reference Manual for details. + } phyMode; + uint8_t rangeDelay; //!< Number of RAT ticks to add to the listening time after T_IFS + uint16_t txPower; //!< \brief Transmit power to use (overrides the one given in radio setup)
+ //!< 0x0000: Use default TX power
+ //!< 0xFFFF: Use field tx20Power to set power for 20-dBm PA or to switch PA + //!< (command structure that includes tx20Power must be used; patch + //!< required) + rfc_bleAdvPar_t *pParams; //!< Pointer to command specific parameter structure + rfc_bleAdvOutput_t *pOutput; //!< Pointer to command specific output structure + uint32_t tx20Power; //!< \brief If txPower = 0xFFFF (patch required):
+ //!< If tx20Power < 0x10000000: Transmit power to use for the 20-dBm PA; + //!< overrides the one given in radio setup for the duration of the command.
+ //!< If tx20Power >= 0x10000000: Pointer to PA change override structure + //!< as for CMD_CHANGE_PA ; permanently changes the PA and PA power set in radio setup.
+ //!< For other values of txPower, this field is not accessed by the radio + //!< CPU and may be omitted from the structure. +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_BLE5_RADIO_SETUP_PA +//! @{ +//! Bluetooth 5 Radio Setup Command for all PHYs with PA Switching Fields +struct __RFC_STRUCT rfc_CMD_BLE5_RADIO_SETUP_PA_s { + uint16_t commandNo; //!< The command ID number + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + struct { + uint8_t mainMode:2; //!< \brief PHY to use for non-BLE commands:
+ //!< 0: 1 Mbps
+ //!< 1: 2 Mbps
+ //!< 2: Coded
+ //!< 3: Reserved + uint8_t coding:1; //!< \brief Coding to use for TX if coded PHY is selected for non-BLE commands
+ //!< 0: S = 8 (125 kbps)
+ //!< 1: S = 2 (500 kbps) + } defaultPhy; + uint8_t loDivider; //!< LO divider setting to use. Supported values: 0 or 2. + struct { + uint16_t frontEndMode:3; //!< \brief 0x00: Differential mode
+ //!< 0x01: Single-ended mode RFP
+ //!< 0x02: Single-ended mode RFN
+ //!< 0x05 Single-ended mode RFP with external frontend control on RF pins (RFN and RXTX)
+ //!< 0x06 Single-ended mode RFN with external frontend control on RF pins (RFP and RXTX)
+ //!< Others: Reserved + uint16_t biasMode:1; //!< \brief 0: Internal bias
+ //!< 1: External bias + uint16_t analogCfgMode:6; //!< \brief 0x00: Write analog configuration.
+ //!< Required first time after boot and when changing frequency band + //!< or front-end configuration
+ //!< 0x2D: Keep analog configuration.
+ //!< May be used after standby or when changing mode with the same frequency + //!< band and front-end configuration
+ //!< Others: Reserved + uint16_t bNoFsPowerUp:1; //!< \brief 0: Power up frequency synth
+ //!< 1: Do not power up frequency synth + } config; //!< Configuration options + uint16_t txPower; //!< Default transmit power + uint32_t* pRegOverrideCommon; //!< \brief Pointer to a list of hardware and configuration registers to override during common + //!< initialization. If NULL, no override is used. + uint32_t* pRegOverride1Mbps; //!< \brief Pointer to a list of hardware and configuration registers to override when selecting + //!< 1 Mbps PHY mode. If NULL, no override is used. + uint32_t* pRegOverride2Mbps; //!< \brief Pointer to a list of hardware and configuration registers to override when selecting + //!< 2 Mbps PHY mode. If NULL, no override is used. + uint32_t* pRegOverrideCoded; //!< \brief Pointer to a list of hardware and configuration registers to override when selecting + //!< coded PHY mode. If NULL, no override is used. + uint32_t* pRegOverrideTxStd; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< standard PA. Used by RF driver only, not radio CPU. + uint32_t* pRegOverrideTx20; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< 20-dBm PA. Used by RF driver only, not radio CPU. +} __RFC_STRUCT_ATTR; //! @} @@ -1153,7 +1621,7 @@ struct __RFC_STRUCT rfc_bleMasterSlavePar_s { uint8_t crcInit0; //!< CRC initialization value used on the connection -- least significant byte uint8_t crcInit1; //!< CRC initialization value used on the connection -- middle byte uint8_t crcInit2; //!< CRC initialization value used on the connection -- most significant byte -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1212,7 +1680,7 @@ struct __RFC_STRUCT rfc_bleSlavePar_s { } endTrigger; //!< Trigger that causes the device to end the connection event as soon as allowed ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< connection event as soon as allowed -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1259,13 +1727,13 @@ struct __RFC_STRUCT rfc_bleMasterPar_s { } endTrigger; //!< Trigger that causes the device to end the connection event as soon as allowed ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< connection event as soon as allowed -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup bleAdvPar //! @{ -//! Parameter structure for legacy advertiser (CMD_BLE_ADV*) +//! Parameter structure for legacy advertiser (CMD_BLE_ADV* and CMD_BLE5_ADV*) struct __RFC_STRUCT rfc_bleAdvPar_s { dataQueue_t* pRxQ; //!< Pointer to receive queue @@ -1321,7 +1789,7 @@ struct __RFC_STRUCT rfc_bleAdvPar_s { } endTrigger; //!< Trigger that causes the device to end the advertiser event as soon as allowed ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< advertiser event as soon as allowed -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1398,7 +1866,7 @@ struct __RFC_STRUCT rfc_bleScannerPar_s { //!< receiving as soon as allowed, ending with BLE_DONE_RXTIMEOUT ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to stop //!< receiving as soon as allowed, ending with BLE_DONE_ENDED -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1464,7 +1932,7 @@ struct __RFC_STRUCT rfc_bleInitiatorPar_s { //!< receiving as soon as allowed, ending with BLE_DONE_RXTIMEOUT ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to stop //!< receiving as soon as allowed, ending with BLE_DONE_ENDED -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1501,7 +1969,7 @@ struct __RFC_STRUCT rfc_bleGenericRxPar_s { } endTrigger; //!< Trigger that causes the device to end the Rx operation ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< Rx operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1538,13 +2006,13 @@ struct __RFC_STRUCT rfc_bleTxTestPar_s { } endTrigger; //!< Trigger that causes the device to end the Test Tx operation ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< Test Tx operation -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup ble5SlavePar //! @{ -//! Parameter structure for BLE 5 slave (CMD_BLE5_SLAVE) +//! Parameter structure for Bluetooth 5 slave (CMD_BLE5_SLAVE) struct __RFC_STRUCT rfc_ble5SlavePar_s { dataQueue_t* pRxQ; //!< Pointer to receive queue @@ -1598,13 +2066,13 @@ struct __RFC_STRUCT rfc_ble5SlavePar_s { } endTrigger; //!< Trigger that causes the device to end the connection event as soon as allowed ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< connection event as soon as allowed -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup ble5MasterPar //! @{ -//! Parameter structure for BLE 5 master (CMD_BLE5_MASTER) +//! Parameter structure for Bluetooth 5 master (CMD_BLE5_MASTER) struct __RFC_STRUCT rfc_ble5MasterPar_s { dataQueue_t* pRxQ; //!< Pointer to receive queue @@ -1647,7 +2115,7 @@ struct __RFC_STRUCT rfc_ble5MasterPar_s { //!< connection event as soon as allowed uint8_t maxRxPktLen; //!< Maximum packet length currently allowed for received packets on the connection uint8_t maxLenLowRate; //!< Maximum packet length for which using S = 8 (125 kbps) is allowed when transmitting. 0: no limit. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1669,7 +2137,7 @@ struct __RFC_STRUCT rfc_ble5AdvExtPar_s { uint16_t* pDeviceAddress; //!< \brief Pointer (with least significant bit set to 0) to device address used for this device. //!< If least significant bit is 1, the address type given by //!< advConfig.deviceAddrType is inverted. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1722,7 +2190,7 @@ struct __RFC_STRUCT rfc_ble5AdvAuxPar_s { rfc_bleWhiteListEntry_t *pWhiteList; //!< \brief Pointer (with least significant bit set to 0) to white list or peer address (directed //!< advertiser). If least significant bit is 1, the address type given by //!< advConfig.peerAddrType is inverted. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1731,19 +2199,19 @@ struct __RFC_STRUCT rfc_ble5AdvAuxPar_s { struct __RFC_STRUCT rfc_ble5AuxChRes_s { ratmr_t rxStartTime; //!< The time needed to start RX in order to receive the packet uint16_t rxListenTime; //!< The time needed to listen in order to receive the packet. 0: No AUX packet - uint8_t channelNo; //!< The channel number used for secondary advertising + uint8_t channelNo; //!< The channel index used for secondary advertising uint8_t phyMode; //!< \brief PHY to use on secondary channel:
//!< 0: 1 Mbps
//!< 1: 2 Mbps
//!< 2: Coded
//!< Others: Reserved -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup ble5ScannerPar //! @{ -//! Parameter structure for BLE 5 scanner (CMD_BLE5_SCANNER) +//! Parameter structure for Bluetooth 5 scanner (CMD_BLE5_SCANNER) struct __RFC_STRUCT rfc_ble5ScannerPar_s { dataQueue_t* pRxQ; //!< Pointer to receive queue @@ -1828,19 +2296,19 @@ struct __RFC_STRUCT rfc_ble5ScannerPar_s { //!< receiving as soon as allowed, ending with BLE_DONE_ENDED ratmr_t rxStartTime; //!< The time needed to start RX in order to receive the packet uint16_t rxListenTime; //!< The time needed to listen in order to receive the packet. 0: No AUX packet - uint8_t channelNo; //!< The channel number used for secondary advertising + uint8_t channelNo; //!< The channel index used for secondary advertising uint8_t phyMode; //!< \brief PHY to use on secondary channel:
//!< 0: 1 Mbps
//!< 1: 2 Mbps
//!< 2: Coded
//!< Others: Reserved -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup ble5InitiatorPar //! @{ -//! Parameter structure for BLE 5 initiator (CMD_BLE5_INITIATOR) +//! Parameter structure for Bluetooth 5 initiator (CMD_BLE5_INITIATOR) struct __RFC_STRUCT rfc_ble5InitiatorPar_s { dataQueue_t* pRxQ; //!< Pointer to receive queue @@ -1911,13 +2379,13 @@ struct __RFC_STRUCT rfc_ble5InitiatorPar_s { //!< receiving as soon as allowed, ending with BLE_DONE_ENDED ratmr_t rxStartTime; //!< The time needed to start RX in order to receive the packet uint16_t rxListenTime; //!< The time needed to listen in order to receive the packet. 0: No AUX packet - uint8_t channelNo; //!< The channel number used for secondary advertising + uint8_t channelNo; //!< The channel index used for secondary advertising uint8_t phyMode; //!< \brief PHY to use on secondary channel:
//!< 0: 1 Mbps
//!< 1: 2 Mbps
//!< 2: Coded
//!< Others: Reserved -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1956,7 +2424,7 @@ struct __RFC_STRUCT rfc_bleMasterSlaveOutput_s { //!< 0 otherwise } pktStatus; //!< Status of received packets ratmr_t timeStamp; //!< Slave operation: Time stamp of first received packet -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1975,7 +2443,7 @@ struct __RFC_STRUCT rfc_bleAdvOutput_s { uint8_t nRxBufFull; //!< Number of packets received that did not fit in Rx queue int8_t lastRssi; //!< The RSSI of the last received packet (signed) ratmr_t timeStamp; //!< Time stamp of the last received packet -}; +} __RFC_STRUCT_ATTR; //! @} @@ -1997,7 +2465,7 @@ struct __RFC_STRUCT rfc_bleScannerOutput_s { int8_t lastRssi; //!< The RSSI of the last received packet (signed) uint8_t __dummy0; ratmr_t timeStamp; //!< Time stamp of the last successfully received ADV*_IND packet that was not ignored -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2013,7 +2481,7 @@ struct __RFC_STRUCT rfc_bleInitiatorOutput_s { uint8_t nRxAdvBufFull; //!< Number of ADV*_IND packets received that did not fit in Rx queue int8_t lastRssi; //!< The RSSI of the last received packet (signed) ratmr_t timeStamp; //!< Time stamp of the received ADV*_IND packet that caused transmission of CONNECT_IND (CONNECT_REQ) -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2035,7 +2503,7 @@ struct __RFC_STRUCT rfc_ble5ScanInitOutput_s { int8_t lastRssi; //!< The RSSI of the last received packet (signed) uint8_t __dummy0; ratmr_t timeStamp; //!< Time stamp of the last successfully received *ADV*_IND packet that was not ignored -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2050,7 +2518,7 @@ struct __RFC_STRUCT rfc_bleGenericRxOutput_s { int8_t lastRssi; //!< The RSSI of the last received packet (signed) uint8_t __dummy0; ratmr_t timeStamp; //!< Time stamp of the last received packet -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2060,7 +2528,7 @@ struct __RFC_STRUCT rfc_bleGenericRxOutput_s { struct __RFC_STRUCT rfc_bleTxTestOutput_s { uint16_t nTx; //!< Number of packets transmitted -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2088,7 +2556,7 @@ struct __RFC_STRUCT rfc_ble5ExtAdvEntry_s { //!< by the received address when sending
//!< 1: TargetA is inserted automatically from command structure or received //!< address if configured in extHdrFlags and is omitted from - //!< extended header + //!< extended header. Not supported with CMD_BLE5_ADV_EXT. uint8_t deviceAddrType:1; //!< \brief If bSkipAdvA = 0: The type of the device address in extended //!< header buffer -- public (0) or random (1) uint8_t targetAddrType:1; //!< \brief If bSkipAdvA = 0: The type of the target address in extended @@ -2100,7 +2568,7 @@ struct __RFC_STRUCT rfc_ble5ExtAdvEntry_s { //!< present, pointer may be NULL. uint8_t* pAdvData; //!< \brief Pointer to buffer containing advData. If advDataLen = 0, //!< pointer may be NULL. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2122,7 +2590,7 @@ struct __RFC_STRUCT rfc_bleWhiteListEntry_s { } conf; uint16_t address; //!< Least significant 16 bits of the address contained in the entry uint32_t addressHi; //!< Most significant 32 bits of the address contained in the entry -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2140,7 +2608,7 @@ struct __RFC_STRUCT rfc_ble5AdiEntry_s { //!< 2: Entry is blocked (always ignore packet with the given SID)
//!< 3: Reserved } advDataInfo; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -2155,13 +2623,13 @@ struct __RFC_STRUCT rfc_bleRxStatus_s { uint8_t bIgnore:1; //!< 1 if the packet is marked as ignored, 0 otherwise uint8_t bCrcErr:1; //!< 1 if the packet was received with CRC error, 0 otherwise } status; -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup ble5RxStatus //! @{ -//! Receive status field that may be appended to message in receive buffer for BLE 5.0 commands +//! Receive status field that may be appended to message in receive buffer for Bluetooth 5 commands struct __RFC_STRUCT rfc_ble5RxStatus_s { struct { @@ -2175,7 +2643,7 @@ struct __RFC_STRUCT rfc_ble5RxStatus_s { //!< 2: Coded, S = 8 (125 kbps)
//!< 3: Coded, S = 2 (500 kbps) } status; -}; +} __RFC_STRUCT_ATTR; //! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_ble_mailbox.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ble_mailbox.h similarity index 95% rename from third_party/ti/devices/cc26x2/driverlib/rf_ble_mailbox.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ble_mailbox.h index bb6f3a4df..66bf7c208 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_ble_mailbox.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ble_mailbox.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_ble_mailbox.h -* Revised: $ $ -* Revision: $ $ +* Revised: 2018-01-23 19:51:42 +0100 (Tue, 23 Jan 2018) +* Revision: 18189 * * Description: Definitions for BLE interface * @@ -59,8 +59,8 @@ ///@{ #define BLE_ERROR_PAR 0x1800 ///< Illegal parameter #define BLE_ERROR_RXBUF 0x1801 ///< No available Rx buffer (Advertiser, Scanner, Initiator) -#define BLE_ERROR_NO_SETUP 0x1802 ///< Operation using Rx or Tx attemted when not in BLE mode -#define BLE_ERROR_NO_FS 0x1803 ///< Operation using Rx or Tx attemted without frequency synth configured +#define BLE_ERROR_NO_SETUP 0x1802 ///< Operation using Rx or Tx attempted when not in BLE mode +#define BLE_ERROR_NO_FS 0x1803 ///< Operation using Rx or Tx attempted without frequency synth configured #define BLE_ERROR_SYNTH_PROG 0x1804 ///< Synthesizer programming failed to complete on time #define BLE_ERROR_RXOVF 0x1805 ///< Receiver overflowed during operation #define BLE_ERROR_TXUNF 0x1806 ///< Transmitter underflowed during operation @@ -71,4 +71,5 @@ /// Special trigger for BLE slave command #define BLE_TRIG_REL_SYNC 15 + #endif diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_common_cmd.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_common_cmd.h similarity index 88% rename from third_party/ti/devices/cc26x2/driverlib/rf_common_cmd.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_common_cmd.h index af43a9688..5bf60b069 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_common_cmd.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_common_cmd.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_common_cmd.h -* Revised: 2017-03-17 11:43:24 +0100 (Fri, 17 Mar 2017) -* Revision: 17699 +* Revised: 2018-05-07 15:02:01 +0200 (Mon, 07 May 2018) +* Revision: 18438 * -* Description: Agama API for common/generic commands +* Description: CC13x2/CC26x2 API for common/generic commands * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -40,11 +40,17 @@ #define __COMMON_CMD_H #ifndef __RFC_STRUCT -#ifdef __GNUC__ -#define __RFC_STRUCT __attribute__ ((aligned (4))) -#else #define __RFC_STRUCT #endif + +#ifndef __RFC_STRUCT_ATTR +#if defined(__GNUC__) +#define __RFC_STRUCT_ATTR __attribute__ ((aligned (4))) +#elif defined(__TI_ARM__) +#define __RFC_STRUCT_ATTR __attribute__ ((__packed__,aligned (4))) +#else +#define __RFC_STRUCT_ATTR +#endif #endif //! \addtogroup rfc @@ -73,6 +79,7 @@ typedef struct __RFC_STRUCT rfc_CMD_FS_POWERDOWN_s rfc_CMD_FS_POWERDOWN_t; typedef struct __RFC_STRUCT rfc_CMD_SCH_IMM_s rfc_CMD_SCH_IMM_t; typedef struct __RFC_STRUCT rfc_CMD_COUNT_BRANCH_s rfc_CMD_COUNT_BRANCH_t; typedef struct __RFC_STRUCT rfc_CMD_PATTERN_CHECK_s rfc_CMD_PATTERN_CHECK_t; +typedef struct __RFC_STRUCT rfc_CMD_RADIO_SETUP_PA_s rfc_CMD_RADIO_SETUP_PA_t; typedef struct __RFC_STRUCT rfc_CMD_ABORT_s rfc_CMD_ABORT_t; typedef struct __RFC_STRUCT rfc_CMD_STOP_s rfc_CMD_STOP_t; typedef struct __RFC_STRUCT rfc_CMD_GET_RSSI_s rfc_CMD_GET_RSSI_t; @@ -95,6 +102,7 @@ typedef struct __RFC_STRUCT rfc_CMD_ARM_RAT_CH_s rfc_CMD_ARM_RAT_CH_t; typedef struct __RFC_STRUCT rfc_CMD_DISARM_RAT_CH_s rfc_CMD_DISARM_RAT_CH_t; typedef struct __RFC_STRUCT rfc_CMD_SET_TX_POWER_s rfc_CMD_SET_TX_POWER_t; typedef struct __RFC_STRUCT rfc_CMD_SET_TX20_POWER_s rfc_CMD_SET_TX20_POWER_t; +typedef struct __RFC_STRUCT rfc_CMD_CHANGE_PA_s rfc_CMD_CHANGE_PA_t; typedef struct __RFC_STRUCT rfc_CMD_UPDATE_FS_s rfc_CMD_UPDATE_FS_t; typedef struct __RFC_STRUCT rfc_CMD_MODIFY_FS_s rfc_CMD_MODIFY_FS_t; typedef struct __RFC_STRUCT rfc_CMD_BUS_REQUEST_s rfc_CMD_BUS_REQUEST_t; @@ -103,7 +111,7 @@ typedef struct __RFC_STRUCT rfc_CMD_BUS_REQUEST_s rfc_CMD_BUS_REQUEST_t; //! @{ struct __RFC_STRUCT rfc_command_s { uint16_t commandNo; //!< The command ID number -}; +} __RFC_STRUCT_ATTR; //! @} @@ -130,7 +138,7 @@ struct __RFC_STRUCT rfc_radioOp_s { uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -157,7 +165,7 @@ struct __RFC_STRUCT rfc_CMD_NOP_s { uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -215,7 +223,7 @@ struct __RFC_STRUCT rfc_CMD_RADIO_SETUP_s { uint16_t txPower; //!< Transmit power uint32_t* pRegOverride; //!< \brief Pointer to a list of hardware and configuration registers to override. If NULL, no //!< override is used. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -248,13 +256,13 @@ struct __RFC_STRUCT rfc_CMD_FS_s { uint8_t bTxMode:1; //!< \brief 0: Start synth in RX mode
//!< 1: Start synth in TX mode uint8_t refFreq:6; //!< \brief 0: Use default reference frequency
- //!< Others: Use reference frequency 48 MHz/refFreq + //!< Others: Use reference frequency 24 MHz/refFreq } synthConf; uint8_t __dummy0; //!< Reserved, always write 0 uint8_t __dummy1; //!< Reserved uint8_t __dummy2; //!< Reserved uint16_t __dummy3; //!< Reserved -}; +} __RFC_STRUCT_ATTR; //! @} @@ -281,7 +289,7 @@ struct __RFC_STRUCT rfc_CMD_FS_OFF_s { uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -326,7 +334,7 @@ struct __RFC_STRUCT rfc_CMD_RX_TEST_s { } endTrigger; //!< Trigger classifier for ending the operation uint32_t syncWord; //!< Sync word to use for receiver ratmr_t endTime; //!< Time to end the operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -376,7 +384,7 @@ struct __RFC_STRUCT rfc_CMD_TX_TEST_s { } endTrigger; //!< Trigger classifier for ending the operation uint32_t syncWord; //!< Sync word to use for transmitter ratmr_t endTime; //!< Time to end the operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -406,7 +414,7 @@ struct __RFC_STRUCT rfc_CMD_SYNC_STOP_RAT_s { uint16_t __dummy0; ratmr_t rat0; //!< \brief The returned RAT timer value corresponding to the value the RAT would have had when the //!< RTC was zero -}; +} __RFC_STRUCT_ATTR; //! @} @@ -436,7 +444,7 @@ struct __RFC_STRUCT rfc_CMD_SYNC_START_RAT_s { uint16_t __dummy0; ratmr_t rat0; //!< \brief The desired RAT timer value corresponding to the value the RAT would have had when the //!< RTC was zero. This parameter is returned by CMD_SYNC_STOP_RAT -}; +} __RFC_STRUCT_ATTR; //! @} @@ -466,7 +474,7 @@ struct __RFC_STRUCT rfc_CMD_RESYNC_RAT_s { uint16_t __dummy0; ratmr_t rat0; //!< \brief The desired RAT timer value corresponding to the value the RAT would have had when the //!< RTC was zero -}; +} __RFC_STRUCT_ATTR; //! @} @@ -495,7 +503,7 @@ struct __RFC_STRUCT rfc_CMD_COUNT_s { } condition; uint16_t counter; //!< \brief Counter. On start, the radio CPU decrements the value, and the end status of the operation //!< differs if the result is zero -}; +} __RFC_STRUCT_ATTR; //! @} @@ -524,7 +532,7 @@ struct __RFC_STRUCT rfc_CMD_FS_POWERUP_s { } condition; uint16_t __dummy0; uint32_t* pRegOverride; //!< Pointer to a list of hardware and configuration registers to override. If NULL, no override is used. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -551,7 +559,7 @@ struct __RFC_STRUCT rfc_CMD_FS_POWERDOWN_s { uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -581,7 +589,7 @@ struct __RFC_STRUCT rfc_CMD_SCH_IMM_s { uint16_t __dummy0; uint32_t cmdrVal; //!< Value as would be written to CMDR uint32_t cmdstaVal; //!< Value as would be returned in CMDSTA -}; +} __RFC_STRUCT_ATTR; //! @} @@ -611,7 +619,7 @@ struct __RFC_STRUCT rfc_CMD_COUNT_BRANCH_s { uint16_t counter; //!< \brief Counter. On start, the radio CPU decrements the value, and the end status of the operation //!< differs if the result is zero rfc_radioOp_t *pNextOpIfOk; //!< Pointer to next operation if counter did not expire -}; +} __RFC_STRUCT_ATTR; //! @} @@ -658,7 +666,68 @@ struct __RFC_STRUCT rfc_CMD_PATTERN_CHECK_s { uint8_t* pValue; //!< Pointer to read from, or offset from last RX entry if patternOpt.bRxVal == 1 uint32_t mask; //!< Bit mask to apply before comparison uint32_t compareVal; //!< Value to compare to -}; +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_RADIO_SETUP_PA +//! @{ +//! Radio Setup Command for Pre-Defined Schemes with PA Switching Fields +struct __RFC_STRUCT rfc_CMD_RADIO_SETUP_PA_s { + uint16_t commandNo; //!< The command ID number + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + uint8_t mode; //!< \brief The main mode to use
+ //!< 0x00: BLE
+ //!< 0x01: IEEE 802.15.4
+ //!< 0x02: 2 Mbps GFSK
+ //!< 0x05: 5 Mbps coded 8-FSK
+ //!< 0xFF: Keep existing mode; update overrides only
+ //!< Others: Reserved + uint8_t loDivider; //!< \brief LO divider setting to use. Supported values: 0, 2, 4, + //!< 5, 6, 10, 12, 15, and 30. + struct { + uint16_t frontEndMode:3; //!< \brief 0x00: Differential mode
+ //!< 0x01: Single-ended mode RFP
+ //!< 0x02: Single-ended mode RFN
+ //!< 0x05 Single-ended mode RFP with external frontend control on RF pins (RFN and RXTX)
+ //!< 0x06 Single-ended mode RFN with external frontend control on RF pins (RFP and RXTX)
+ //!< Others: Reserved + uint16_t biasMode:1; //!< \brief 0: Internal bias
+ //!< 1: External bias + uint16_t analogCfgMode:6; //!< \brief 0x00: Write analog configuration.
+ //!< Required first time after boot and when changing frequency band + //!< or front-end configuration
+ //!< 0x2D: Keep analog configuration.
+ //!< May be used after standby or when changing mode with the same frequency + //!< band and front-end configuration
+ //!< Others: Reserved + uint16_t bNoFsPowerUp:1; //!< \brief 0: Power up frequency synth
+ //!< 1: Do not power up frequency synth + } config; //!< Configuration options + uint16_t txPower; //!< Transmit power + uint32_t* pRegOverride; //!< \brief Pointer to a list of hardware and configuration registers to override. If NULL, no + //!< override is used. + uint32_t* pRegOverrideTxStd; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< standard PA. Used by RF driver only, not radio CPU. + uint32_t* pRegOverrideTx20; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< 20-dBm PA. Used by RF driver only, not radio CPU. +} __RFC_STRUCT_ATTR; //! @} @@ -668,7 +737,7 @@ struct __RFC_STRUCT rfc_CMD_PATTERN_CHECK_s { //! Abort Running Radio Operation Command struct __RFC_STRUCT rfc_CMD_ABORT_s { uint16_t commandNo; //!< The command ID number 0x0401 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -678,7 +747,7 @@ struct __RFC_STRUCT rfc_CMD_ABORT_s { //! Stop Running Radio Operation Command Gracefully struct __RFC_STRUCT rfc_CMD_STOP_s { uint16_t commandNo; //!< The command ID number 0x0402 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -688,7 +757,7 @@ struct __RFC_STRUCT rfc_CMD_STOP_s { //! Read RSSI Command struct __RFC_STRUCT rfc_CMD_GET_RSSI_s { uint16_t commandNo; //!< The command ID number 0x0403 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -700,7 +769,7 @@ struct __RFC_STRUCT rfc_CMD_UPDATE_RADIO_SETUP_s { uint16_t commandNo; //!< The command ID number 0x0001 uint16_t __dummy0; uint32_t* pRegOverride; //!< Pointer to a list of hardware and configuration registers to override -}; +} __RFC_STRUCT_ATTR; //! @} @@ -711,7 +780,7 @@ struct __RFC_STRUCT rfc_CMD_UPDATE_RADIO_SETUP_s { struct __RFC_STRUCT rfc_CMD_TRIGGER_s { uint16_t commandNo; //!< The command ID number 0x0404 uint8_t triggerNo; //!< Command trigger number -}; +} __RFC_STRUCT_ATTR; //! @} @@ -725,7 +794,7 @@ struct __RFC_STRUCT rfc_CMD_GET_FW_INFO_s { uint16_t startOffset; //!< The start of free RAM uint16_t freeRamSz; //!< The size of free RAM uint16_t availRatCh; //!< Bitmap of available RAT channels -}; +} __RFC_STRUCT_ATTR; //! @} @@ -735,7 +804,7 @@ struct __RFC_STRUCT rfc_CMD_GET_FW_INFO_s { //! Asynchronously Start Radio Timer Command struct __RFC_STRUCT rfc_CMD_START_RAT_s { uint16_t commandNo; //!< The command ID number 0x0405 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -745,7 +814,7 @@ struct __RFC_STRUCT rfc_CMD_START_RAT_s { //! Respond with Command ACK Only struct __RFC_STRUCT rfc_CMD_PING_s { uint16_t commandNo; //!< The command ID number 0x0406 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -757,7 +826,7 @@ struct __RFC_STRUCT rfc_CMD_READ_RFREG_s { uint16_t commandNo; //!< The command ID number 0x0601 uint16_t address; //!< The offset from the start of the RF core HW register bank (0x40040000) uint32_t value; //!< Returned value of the register -}; +} __RFC_STRUCT_ATTR; //! @} @@ -770,7 +839,7 @@ struct __RFC_STRUCT rfc_CMD_ADD_DATA_ENTRY_s { uint16_t __dummy0; dataQueue_t* pQueue; //!< Pointer to the queue structure to which the entry will be added uint8_t* pEntry; //!< Pointer to the entry -}; +} __RFC_STRUCT_ATTR; //! @} @@ -783,7 +852,7 @@ struct __RFC_STRUCT rfc_CMD_REMOVE_DATA_ENTRY_s { uint16_t __dummy0; dataQueue_t* pQueue; //!< Pointer to the queue structure from which the entry will be removed uint8_t* pEntry; //!< Pointer to the entry that was removed -}; +} __RFC_STRUCT_ATTR; //! @} @@ -796,7 +865,7 @@ struct __RFC_STRUCT rfc_CMD_FLUSH_QUEUE_s { uint16_t __dummy0; dataQueue_t* pQueue; //!< Pointer to the queue structure to be flushed uint8_t* pFirstEntry; //!< Pointer to the first entry that was removed -}; +} __RFC_STRUCT_ATTR; //! @} @@ -808,7 +877,7 @@ struct __RFC_STRUCT rfc_CMD_CLEAR_RX_s { uint16_t commandNo; //!< The command ID number 0x0008 uint16_t __dummy0; dataQueue_t* pQueue; //!< Pointer to the queue structure to be cleared -}; +} __RFC_STRUCT_ATTR; //! @} @@ -821,7 +890,7 @@ struct __RFC_STRUCT rfc_CMD_REMOVE_PENDING_ENTRIES_s { uint16_t __dummy0; dataQueue_t* pQueue; //!< Pointer to the queue structure to be flushed uint8_t* pFirstEntry; //!< Pointer to the first entry that was removed -}; +} __RFC_STRUCT_ATTR; //! @} @@ -834,7 +903,7 @@ struct __RFC_STRUCT rfc_CMD_SET_RAT_CMP_s { uint8_t ratCh; //!< The radio timer channel number uint8_t __dummy0; ratmr_t compareTime; //!< The time at which the compare occurs -}; +} __RFC_STRUCT_ATTR; //! @} @@ -856,7 +925,7 @@ struct __RFC_STRUCT rfc_CMD_SET_RAT_CPT_s { //!< 2: Capture on both edges
//!< 3: Reserved } config; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -867,7 +936,7 @@ struct __RFC_STRUCT rfc_CMD_SET_RAT_CPT_s { struct __RFC_STRUCT rfc_CMD_DISABLE_RAT_CH_s { uint16_t commandNo; //!< The command ID number 0x0408 uint8_t ratCh; //!< The radio timer channel number -}; +} __RFC_STRUCT_ATTR; //! @} @@ -889,7 +958,7 @@ struct __RFC_STRUCT rfc_CMD_SET_RAT_OUTPUT_s { //!< Others: Reserved uint16_t ratCh:4; //!< The radio timer channel number } config; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -900,7 +969,7 @@ struct __RFC_STRUCT rfc_CMD_SET_RAT_OUTPUT_s { struct __RFC_STRUCT rfc_CMD_ARM_RAT_CH_s { uint16_t commandNo; //!< The command ID number 0x0409 uint8_t ratCh; //!< The radio timer channel number -}; +} __RFC_STRUCT_ATTR; //! @} @@ -911,7 +980,7 @@ struct __RFC_STRUCT rfc_CMD_ARM_RAT_CH_s { struct __RFC_STRUCT rfc_CMD_DISARM_RAT_CH_s { uint16_t commandNo; //!< The command ID number 0x040A uint8_t ratCh; //!< The radio timer channel number -}; +} __RFC_STRUCT_ATTR; //! @} @@ -922,26 +991,39 @@ struct __RFC_STRUCT rfc_CMD_DISARM_RAT_CH_s { struct __RFC_STRUCT rfc_CMD_SET_TX_POWER_s { uint16_t commandNo; //!< The command ID number 0x0010 uint16_t txPower; //!< New TX power setting -}; +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_SET_TX20_POWER //! @{ #define CMD_SET_TX20_POWER 0x0014 -//! Set Transmit Power for 20 dBm PA +//! Set Transmit Power for 20-dBm PA struct __RFC_STRUCT rfc_CMD_SET_TX20_POWER_s { uint16_t commandNo; //!< The command ID number 0x0014 uint16_t __dummy0; - uint32_t txPower; //!< New TX power setting -}; + uint32_t tx20Power; //!< New TX power setting +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_CHANGE_PA +//! @{ +#define CMD_CHANGE_PA 0x0015 +//! Set TX power with possibility to switch between PAs +struct __RFC_STRUCT rfc_CMD_CHANGE_PA_s { + uint16_t commandNo; //!< The command ID number 0x0015 + uint16_t __dummy0; + uint32_t* pRegOverride; //!< \brief Pointer to a list of hardware and configuration registers to override as part of the + //!< change, including new TX power +} __RFC_STRUCT_ATTR; //! @} //! \addtogroup CMD_UPDATE_FS //! @{ #define CMD_UPDATE_FS 0x0011 -//! Set New Synthesizer Frequency without Recalibration (Depricated; use CMD_MODIFY_FS) +//! Set New Synthesizer Frequency without Recalibration (Deprecated; use CMD_MODIFY_FS) struct __RFC_STRUCT rfc_CMD_UPDATE_FS_s { uint16_t commandNo; //!< The command ID number 0x0011 uint16_t __dummy0; @@ -950,7 +1032,7 @@ struct __RFC_STRUCT rfc_CMD_UPDATE_FS_s { uint16_t __dummy3; uint16_t frequency; //!< The frequency in MHz to tune to uint16_t fractFreq; //!< Fractional part of the frequency to tune to -}; +} __RFC_STRUCT_ATTR; //! @} @@ -962,7 +1044,7 @@ struct __RFC_STRUCT rfc_CMD_MODIFY_FS_s { uint16_t commandNo; //!< The command ID number 0x0013 uint16_t frequency; //!< The frequency in MHz to tune to uint16_t fractFreq; //!< Fractional part of the frequency to tune to -}; +} __RFC_STRUCT_ATTR; //! @} @@ -974,7 +1056,7 @@ struct __RFC_STRUCT rfc_CMD_BUS_REQUEST_s { uint16_t commandNo; //!< The command ID number 0x040E uint8_t bSysBusNeeded; //!< \brief 0: System bus may sleep
//!< 1: System bus access needed -}; +} __RFC_STRUCT_ATTR; //! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_data_entry.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_data_entry.h similarity index 96% rename from third_party/ti/devices/cc26x2/driverlib/rf_data_entry.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_data_entry.h index 98a32ce40..a8a2031ff 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_data_entry.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_data_entry.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_data_entry.h -* Revised: 2016-11-14 16:07:52 +0100 (Mon, 14 Nov 2016) -* Revision: 17451 +* Revised: 2017-11-10 10:42:47 +0100 (Fri, 10 Nov 2017) +* Revision: 18052 * * Description: Definition of API for data exchange * @@ -40,11 +40,17 @@ #define __DATA_ENTRY_H #ifndef __RFC_STRUCT -#ifdef __GNUC__ -#define __RFC_STRUCT __attribute__ ((aligned (4))) -#else #define __RFC_STRUCT #endif + +#ifndef __RFC_STRUCT_ATTR +#if defined(__GNUC__) +#define __RFC_STRUCT_ATTR __attribute__ ((aligned (4))) +#elif defined(__TI_ARM__) +#define __RFC_STRUCT_ATTR __attribute__ ((__packed__,aligned (4))) +#else +#define __RFC_STRUCT_ATTR +#endif #endif //! \addtogroup rfc @@ -83,7 +89,7 @@ struct __RFC_STRUCT rfc_dataEntry_s { } config; uint16_t length; //!< \brief For pointer entries: Number of bytes in the data buffer pointed to
//!< For other entries: Number of bytes following this length field -}; +} __RFC_STRUCT_ATTR; //! @} @@ -111,7 +117,7 @@ struct __RFC_STRUCT rfc_dataEntryGeneral_s { uint16_t length; //!< \brief For pointer entries: Number of bytes in the data buffer pointed to
//!< For other entries: Number of bytes following this length field uint8_t data; //!< First byte of the data array to be received or transmitted -}; +} __RFC_STRUCT_ATTR; //! @} @@ -141,7 +147,7 @@ struct __RFC_STRUCT rfc_dataEntryMulti_s { uint16_t numElements; //!< Number of entry elements committed in the entry uint16_t nextIndex; //!< Index to the byte after the last byte of the last entry element committed by the radio CPU uint8_t rxData; //!< First byte of the data array of received data entry elements -}; +} __RFC_STRUCT_ATTR; //! @} @@ -169,7 +175,7 @@ struct __RFC_STRUCT rfc_dataEntryPointer_s { uint16_t length; //!< \brief For pointer entries: Number of bytes in the data buffer pointed to
//!< For other entries: Number of bytes following this length field uint8_t* pData; //!< Pointer to data buffer of data to be received ro transmitted -}; +} __RFC_STRUCT_ATTR; //! @} @@ -204,7 +210,7 @@ struct __RFC_STRUCT rfc_dataEntryPartial_s { } pktStatus; uint16_t nextIndex; //!< Index to the byte after the last byte of the last entry element committed by the radio CPU uint8_t rxData; //!< First byte of the data array of received data entry elements -}; +} __RFC_STRUCT_ATTR; //! @} diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_hs_cmd.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_hs_cmd.h new file mode 100644 index 000000000..90345694e --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_hs_cmd.h @@ -0,0 +1,210 @@ +/****************************************************************************** +* Filename: rf_hs_cmd.h +* Revised: 2017-11-10 10:42:47 +0100 (Fri, 10 Nov 2017) +* Revision: 18052 +* +* Description: CC13x2/CC26x2 API for high-speed mode commands +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef __HS_CMD_H +#define __HS_CMD_H + +#ifndef __RFC_STRUCT +#define __RFC_STRUCT +#endif + +#ifndef __RFC_STRUCT_ATTR +#if defined(__GNUC__) +#define __RFC_STRUCT_ATTR __attribute__ ((aligned (4))) +#elif defined(__TI_ARM__) +#define __RFC_STRUCT_ATTR __attribute__ ((__packed__,aligned (4))) +#else +#define __RFC_STRUCT_ATTR +#endif +#endif + +//! \addtogroup rfc +//! @{ + +//! \addtogroup hs_cmd +//! @{ + +#include +#include "rf_mailbox.h" +#include "rf_common_cmd.h" + +typedef struct __RFC_STRUCT rfc_CMD_HS_TX_s rfc_CMD_HS_TX_t; +typedef struct __RFC_STRUCT rfc_CMD_HS_RX_s rfc_CMD_HS_RX_t; +typedef struct __RFC_STRUCT rfc_hsRxOutput_s rfc_hsRxOutput_t; +typedef struct __RFC_STRUCT rfc_hsRxStatus_s rfc_hsRxStatus_t; + +//! \addtogroup CMD_HS_TX +//! @{ +#define CMD_HS_TX 0x3841 +//! High-Speed Transmit Command +struct __RFC_STRUCT rfc_CMD_HS_TX_s { + uint16_t commandNo; //!< The command ID number 0x3841 + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + struct { + uint8_t bFsOff:1; //!< \brief 0: Keep frequency synth on after command
+ //!< 1: Turn frequency synth off after command + uint8_t bUseCrc:1; //!< \brief 0: Do not append CRC
+ //!< 1: Append CRC + uint8_t bVarLen:1; //!< \brief 0: Fixed length
+ //!< 1: Transmit length as first half-word + uint8_t bCheckQAtEnd:1; //!< \brief 0: Always end with HS_DONE_OK when packet has been transmitted
+ //!< 1: Check if Tx queue is empty when packet has been transmitted + } pktConf; + uint8_t __dummy0; + dataQueue_t* pQueue; //!< Pointer to Tx queue +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_HS_RX +//! @{ +#define CMD_HS_RX 0x3842 +//! High-Speed Receive Command +struct __RFC_STRUCT rfc_CMD_HS_RX_s { + uint16_t commandNo; //!< The command ID number 0x3842 + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + struct { + uint8_t bFsOff:1; //!< \brief 0: Keep frequency synth on after command
+ //!< 1: Turn frequency synth off after command + uint8_t bUseCrc:1; //!< \brief 0: Do not receive or check CRC
+ //!< 1: Receive and check CRC + uint8_t bVarLen:1; //!< \brief 0: Fixed length
+ //!< 1: Receive length as first byte + uint8_t bRepeatOk:1; //!< \brief 0: End operation after receiving a packet correctly
+ //!< 1: Go back to sync search after receiving a packet correctly + uint8_t bRepeatNok:1; //!< \brief 0: End operation after receiving a packet with CRC error
+ //!< 1: Go back to sync search after receiving a packet with CRC error + uint8_t addressMode:2; //!< \brief 0: No address check
+ //!< 1: Accept address0 and address1
+ //!< 2: Accept address0, address1, and 0x0000
+ //!< 3: Accept address0, address1, 0x0000, and 0xFFFF + } pktConf; + struct { + uint8_t bAutoFlushCrcErr:1; //!< If 1, automatically remove packets with CRC error from Rx queue + uint8_t bIncludeLen:1; //!< If 1, include the received length field in the stored packet; otherwise discard it + uint8_t bIncludeCrc:1; //!< If 1, include the received CRC field in the stored packet; otherwise 3scard it + uint8_t bAppendStatus:1; //!< If 1, append a status word to the packet in the Rx queue + uint8_t bAppendTimestamp:1; //!< If 1, append a timestamp to the packet in the Rx queue + } rxConf; + uint16_t maxPktLen; //!< Packet length for fixed length; maximum packet length for variable length + uint16_t address0; //!< Address + uint16_t address1; //!< Address (set equal to address0 to accept only one address) + uint8_t __dummy0; + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } endTrigger; //!< Trigger classifier for ending the operation + ratmr_t endTime; //!< Time used together with endTrigger for ending the operation + dataQueue_t* pQueue; //!< Pointer to receive queue + rfc_hsRxOutput_t *pOutput; //!< Pointer to output structure +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup hsRxOutput +//! @{ +//! Output structure for CMD_HS_RX + +struct __RFC_STRUCT rfc_hsRxOutput_s { + uint16_t nRxOk; //!< Number of packets that have been received with CRC OK + uint16_t nRxNok; //!< Number of packets that have been received with CRC error + uint16_t nRxAborted; //!< Number of packets not received due to illegal length or address mismatch + uint8_t nRxBufFull; //!< Number of packets that have been received and discarded due to lack of buffer space + int8_t lastRssi; //!< RSSI of last received packet + ratmr_t timeStamp; //!< Time stamp of last received packet +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup hsRxStatus +//! @{ +//! Receive status word that may be appended to message in receive buffer + +struct __RFC_STRUCT rfc_hsRxStatus_s { + struct { + uint16_t rssi:8; //!< RSSI of the received packet in dBm (signed) + uint16_t bCrcErr:1; //!< \brief 0: Packet received OK
+ //!< 1: Packet received with CRC error + uint16_t addressInd:2; //!< \brief 0: Received address0 (or no address check)
+ //!< 1: Received address1
+ //!< 2: Received address 0x0000
+ //!< 3: Received address 0xFFFF + } status; +} __RFC_STRUCT_ATTR; + +//! @} + +//! @} +//! @} +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_hs_mailbox.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_hs_mailbox.h new file mode 100644 index 000000000..f112d4f57 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_hs_mailbox.h @@ -0,0 +1,65 @@ +/****************************************************************************** +* Filename: rf_hs_mailbox.h +* Revised: 2017-11-03 15:06:37 +0100 (Fri, 03 Nov 2017) +* Revision: 18032 +* +* Description: Definitions for high-speed mode radio interface +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef _HS_MAILBOX_H +#define _HS_MAILBOX_H + +/// \name Radio operation status +///@{ +/// \name Operation finished normally +///@{ +#define HS_DONE_OK 0x3440 ///< Operation ended normally +#define HS_DONE_RXTIMEOUT 0x3441 ///< Operation stopped after end trigger while waiting for sync +#define HS_DONE_RXERR 0x3442 ///< Operation ended after CRC error +#define HS_DONE_TXBUF 0x3443 ///< Tx queue was empty at start of operation +#define HS_DONE_ENDED 0x3444 ///< Operation stopped after end trigger during reception +#define HS_DONE_STOPPED 0x3445 ///< Operation stopped after stop command +#define HS_DONE_ABORT 0x3446 ///< Operation aborted by abort command +///@} +/// \name Operation finished with error +///@{ +#define HS_ERROR_PAR 0x3840 ///< Illegal parameter +#define HS_ERROR_RXBUF 0x3841 ///< No available Rx buffer at the start of a packet +#define HS_ERROR_NO_SETUP 0x3842 ///< Radio was not set up in a compatible mode +#define HS_ERROR_NO_FS 0x3843 ///< Synth was not programmed when running Rx or Tx +#define HS_ERROR_RXOVF 0x3844 ///< Rx overflow observed during operation +#define HS_ERROR_TXUNF 0x3845 ///< Tx underflow observed during operation +///@} +///@} + +#endif diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_ieee_cmd.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ieee_cmd.h similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/rf_ieee_cmd.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ieee_cmd.h index cd4ebb995..fa54308c7 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_ieee_cmd.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ieee_cmd.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_ieee_cmd.h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: 2017-11-10 10:42:47 +0100 (Fri, 10 Nov 2017) +* Revision: 18052 * -* Description: CC26xx/CC13xx API for IEEE 802.15.4 commands +* Description: CC13x2/CC26x2 API for IEEE 802.15.4 commands * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -40,11 +40,17 @@ #define __IEEE_CMD_H #ifndef __RFC_STRUCT -#ifdef __GNUC__ -#define __RFC_STRUCT __attribute__ ((aligned (4))) -#else #define __RFC_STRUCT #endif + +#ifndef __RFC_STRUCT_ATTR +#if defined(__GNUC__) +#define __RFC_STRUCT_ATTR __attribute__ ((aligned (4))) +#elif defined(__TI_ARM__) +#define __RFC_STRUCT_ATTR __attribute__ ((__packed__,aligned (4))) +#else +#define __RFC_STRUCT_ATTR +#endif #endif //! \addtogroup rfc @@ -198,7 +204,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_RX_s { } endTrigger; //!< Trigger that causes the device to end the Rx operation ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the Rx //!< operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -255,7 +261,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_ED_SCAN_s { } endTrigger; //!< Trigger that causes the device to end the Rx operation ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the Rx //!< operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -294,7 +300,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_TX_s { uint8_t payloadLen; //!< Number of bytes in the payload uint8_t* pPayload; //!< Pointer to payload buffer of size payloadLen ratmr_t timeStamp; //!< Time stamp of transmitted frame -}; +} __RFC_STRUCT_ATTR; //! @} @@ -349,7 +355,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_CSMA_s { ratmr_t lastTimeStamp; //!< Time of the last CCA operation ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to end the //!< CSMA-CA operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -387,7 +393,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_RX_ACK_s { } endTrigger; //!< Trigger that causes the device to give up acknowledgement reception ratmr_t endTime; //!< \brief Time used together with endTrigger that causes the device to give up //!< acknowledgement reception -}; +} __RFC_STRUCT_ATTR; //! @} @@ -414,7 +420,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_ABORT_BG_s { uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... } condition; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -437,7 +443,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_MOD_CCA_s { uint8_t ccaCorrThr:2; //!< Threshold for number of correlation peaks in correlator based carrier sense } newCcaOpt; //!< New value of ccaOpt for the running background level operation int8_t newCcaRssiThr; //!< New value of ccaRssiThr for the running background level operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -499,7 +505,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_MOD_FILT_s { //!< 0: Reject
//!< 1: Accept } newFrameTypes; //!< New value of frameTypes for the running background level operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -513,11 +519,11 @@ struct __RFC_STRUCT rfc_CMD_IEEE_MOD_SRC_MATCH_s { uint8_t bEnable:1; //!< \brief 0: Disable entry
//!< 1: Enable entry uint8_t srcPend:1; //!< New value of the pending bit for the entry - uint8_t entryType:1; //!< \brief 0: Extended address
- //!< 1: Short address + uint8_t entryType:1; //!< \brief 0: Short address
+ //!< 1: Extended address } options; uint8_t entryNo; //!< Index of entry to enable or disable -}; +} __RFC_STRUCT_ATTR; //! @} @@ -527,7 +533,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_MOD_SRC_MATCH_s { //! IEEE 802.15.4 Abort Foreground Level Command struct __RFC_STRUCT rfc_CMD_IEEE_ABORT_FG_s { uint16_t commandNo; //!< The command ID number 0x2401 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -537,7 +543,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_ABORT_FG_s { //! IEEE 802.15.4 Gracefully Stop Foreground Level Command struct __RFC_STRUCT rfc_CMD_IEEE_STOP_FG_s { uint16_t commandNo; //!< The command ID number 0x2402 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -566,7 +572,7 @@ struct __RFC_STRUCT rfc_CMD_IEEE_CCA_REQ_s { //!< 0: Idle
//!< 1: Busy } ccaInfo; -}; +} __RFC_STRUCT_ATTR; //! @} @@ -588,7 +594,7 @@ struct __RFC_STRUCT rfc_ieeeRxOutput_s { int8_t maxRssi; //!< Highest RSSI observed in the operation uint8_t __dummy0; ratmr_t beaconTimeStamp; //!< Time stamp of last received beacon frame -}; +} __RFC_STRUCT_ATTR; //! @} @@ -599,7 +605,7 @@ struct __RFC_STRUCT rfc_ieeeRxOutput_s { struct __RFC_STRUCT rfc_shortAddrEntry_s { uint16_t shortAddr; //!< Short address uint16_t panId; //!< PAN ID -}; +} __RFC_STRUCT_ATTR; //! @} @@ -613,7 +619,7 @@ struct __RFC_STRUCT rfc_ieeeRxCorrCrc_s { uint8_t bIgnore:1; //!< 1 if the packet should be rejected by frame filtering, 0 otherwise uint8_t bCrcErr:1; //!< 1 if the packet was received with CRC error, 0 otherwise } status; -}; +} __RFC_STRUCT_ATTR; //! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_ieee_mailbox.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ieee_mailbox.h similarity index 94% rename from third_party/ti/devices/cc26x2/driverlib/rf_ieee_mailbox.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ieee_mailbox.h index 4f89ce32a..a9fc22162 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_ieee_mailbox.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_ieee_mailbox.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_ieee_mailbox.h -* Revised: $ $ -* Revision: $ $ +* Revised: 2018-01-23 19:51:42 +0100 (Tue, 23 Jan 2018) +* Revision: 18189 * * Description: Definitions for IEEE 802.15.4 interface * @@ -41,7 +41,6 @@ #include "rf_mailbox.h" - /// \name Radio operation status ///@{ /// \name Operation not finished @@ -63,8 +62,8 @@ /// \name Operation finished with error ///@{ #define IEEE_ERROR_PAR 0x2800 ///< Illegal parameter -#define IEEE_ERROR_NO_SETUP 0x2801 ///< Operation using Rx or Tx attemted when not in 15.4 mode -#define IEEE_ERROR_NO_FS 0x2802 ///< Operation using Rx or Tx attemted without frequency synth configured +#define IEEE_ERROR_NO_SETUP 0x2801 ///< Operation using Rx or Tx attempted when not in 15.4 mode +#define IEEE_ERROR_NO_FS 0x2802 ///< Operation using Rx or Tx attempted without frequency synth configured #define IEEE_ERROR_SYNTH_PROG 0x2803 ///< Synthesizer programming failed to complete on time #define IEEE_ERROR_RXOVF 0x2804 ///< Receiver overflowed during operation #define IEEE_ERROR_TXUNF 0x2805 ///< Transmitter underflowed during operation diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_mailbox.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_mailbox.h similarity index 57% rename from third_party/ti/devices/cc26x2/driverlib/rf_mailbox.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_mailbox.h index fb55d5d3d..48af9ab12 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_mailbox.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_mailbox.h @@ -1,28 +1,40 @@ -//------------------------------------------------------------------------------ -// TI Confidential - NDA Restrictions -// -// Copyright (c) 2011 Texas Instruments, Inc. -// -// This is an unpublished work created in the year stated above. -// Texas Instruments owns all rights in and to this work and -// intends to maintain and protect it as an unpublished copyright. -// In the event of either inadvertent or deliberate publication, -// the above stated date shall be treated as the year of first -// publication. In the event of such publication, Texas Instruments -// intends to enforce its rights in the work under the copyright -// laws as a published work. -// -//------------------------------------------------------------------------------ -/// -/// \file rf_mailbox.h -/// \brief Definitions for interface between system and radio CPU -/// -/// \author Low Power RF Wireless Business Unit -/// Helge Coward (h.coward@ti.com) -/// -/// \date Thu Nov 24 09:00:42 CET 2011 -/// -//----------------------------------------------------------------------------- +/****************************************************************************** +* Filename: rf_mailbox.h +* Revised: 2018-05-07 15:02:01 +0200 (Mon, 07 May 2018) +* Revision: 18438 +* +* Description: Definitions for interface between system and radio CPU +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ #ifndef _MAILBOX_H #define _MAILBOX_H @@ -71,7 +83,7 @@ typedef struct { #define IRQN_TX_RETRANS 9 ///< Packet retransmitted #define IRQN_TX_ENTRY_DONE 10 ///< Tx queue data entry state changed to Finished #define IRQN_TX_BUFFER_CHANGED 11 ///< A buffer change is complete -#define IRQN_BG_COMMAND_SUSPENDED 12 ///< A background level radio operation command has been suspended +#define IRQN_PA_CHANGED 14 ///< PA is changed #define IRQN_RX_OK 16 ///< Packet received with CRC OK, payload, and not to be ignored #define IRQN_RX_NOK 17 ///< Packet received with CRC error #define IRQN_RX_IGNORED 18 ///< Packet received with CRC OK, but to be ignored @@ -105,7 +117,7 @@ typedef struct { #define IRQ_TX_ENTRY_DONE (1U << IRQN_TX_ENTRY_DONE) #define IRQ_TX_BUFFER_CHANGED (1U << IRQN_TX_BUFFER_CHANGED) -#define IRQ_BG_COMMAND_SUSPENDED (1U << IRQN_BG_COMMAND_SUSPENDED) +#define IRQ_PA_CHANGED (1U << IRQN_PA_CHANGED) #define IRQ_RX_OK (1U << IRQN_RX_OK) #define IRQ_RX_NOK (1U << IRQN_RX_NOK) @@ -151,250 +163,6 @@ typedef struct { -/// \name Macros for use with command definition files -/// The script create_command.pl generates header files from command and structure definitions in the -/// *_def.txt files. These are the macros to access the definitions -///@{ - -/// Get a field from a structure -// -/// Gets a field from a structure defined in a _def.txt file. This may be used both in assignments and -/// references (e.g. GET_FIELD(pCmd1, CMD_TEST, testParam) = GET_FIELD(pCmd2, CMD_DUMMY, dummyParam);) -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the accessed field as defined in the _def.txt file -/// -#define GET_FIELD(ptr, cmd, field) \ -(*((_TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) - -/// Get a field from a structure, reading as volatile -// -/// Gets a field from a structure defined in a _def.txt file, reading it as a volatile parameter, which -/// takes into account that it may be changed by the other side. This may be used both in assignments and -/// references (e.g. GET_FIELD(pCmd1, CMD_TEST, testParam) = GET_FIELD(pCmd2, CMD_DUMMY, dummyParam);) -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the accessed field as defined in the _def.txt file -/// -#define GET_FIELD_V(ptr, cmd, field) \ -(*((volatile _TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) - -/// Get the pointer to a field from a structure -// -/// Gets the pointer to a field from a structure defined in a _def.txt file. -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the accessed field as defined in the _def.txt file -/// -#define GET_FIELD_PTR(ptr, cmd, field) \ -((_TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field))) - -/// Get the volatile pointer to a field from a structure -// -/// Gets the volatile pointer to a field from a structure defined in a _def.txt file. -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the accessed field as defined in the _def.txt file -/// -#define GET_FIELD_VPTR(ptr, cmd, field) \ -((volatile _TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field))) - -/// Get bits from a bit field -// -/// Returns bits from a bit field defined in a _def.txt file. -/// \param[in] value -/// The value of the entire field that contains the bit field -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// -#define GET_BITS(value, cmd, field, bitfield) \ -(((value) >> (_BITPOS_##cmd##_##field##_##bitfield)) & \ - ((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1)) - -/// Get bits from a bit field as a signed value -// -/// Returns sign extended bits from a bit field defined in a _def.txt file. -/// \param[in] value -/// The value of the entire field that contains the bit field -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// -#define GET_BITS_S(value, cmd, field, bitfield) \ -(((int)(value) << (32 - ((_BITPOS_##cmd##_##field##_##bitfield) + (_NBITS_##cmd##_##field##_##bitfield)))) >> \ - (32 - (_NBITS_##cmd##_##field##_##bitfield))) - -/// Set bits in a bit field -// -/// Modifies a bit field defined in a _def.txt file. -/// \param[in,out] value -/// The value of the entire field that contains the bit field -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// \param[in] bvalue -/// The value to set in the bitfield -/// -#define SET_BITS(value, cmd, field, bitfield, bvalue) \ -(((value) = ((value) & \ - (~(((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1) << (_BITPOS_##cmd##_##field##_##bitfield))) | \ - ((bvalue) << (_BITPOS_##cmd##_##field##_##bitfield))))) - - -/// Get bits from a bit field in a structure -// -/// Returns bits from a bit field in a structure defined in a _def.txt file. -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// -#define GET_BITFIELD(ptr, cmd, field, bitfield) \ -((*((_TYPE_##cmd##_##field *) ((((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) >> \ - ((_BITPOS_##cmd##_##field##_##bitfield))) & \ - ((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1)) - -/// Get bits from a bit field in a structure, reading as volatile -// -/// Returns bits from a bit field in a structure defined in a _def.txt file, reading it as a -/// volatile parameter. -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// -#define GET_BITFIELD_V(ptr, cmd, field, bitfield) \ -((*((volatile _TYPE_##cmd##_##field *) ((((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) >> \ - ((_BITPOS_##cmd##_##field##_##bitfield))) & \ - ((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1)) - - -/// Set bits in a bit field in a structure -// -/// Modifies a bit field in a field in a structure defined in a _def.txt file. -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// \param[in] value -/// The value to set in the bitfield -/// -#define SET_BITFIELD(ptr, cmd, field, bitfield, value) \ -((*((_TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) = \ - ((*((_TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) & \ - (~(((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1) << (_BITPOS_##cmd##_##field##_##bitfield))) | \ - (((uint32_t)(value)) << (_BITPOS_##cmd##_##field##_##bitfield)))) - -/// Set bits in a bit field in a structure, reading and writing as volatile -// -/// Modifies a bit field in a field in a structure defined in a _def.txt file, accessing it as a volatile -/// parameter. -/// \param[in] ptr -/// Pointer to the structure -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// \param[in] value -/// The value to set in the bitfield -/// -#define SET_BITFIELD_V(ptr, cmd, field, bitfield, value) \ -((*((volatile _TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) = \ - ((*((volatile _TYPE_##cmd##_##field *) (((uint8_t *)(ptr)) + (_POSITION_##cmd##_##field)))) & \ - (~(((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1) << (_BITPOS_##cmd##_##field##_##bitfield))) | \ - (((uint32_t)(value)) << (_BITPOS_##cmd##_##field##_##bitfield)))) - -/// Get the value of specific bifield in a field with the remaining bits set to 0 -// -/// Returns a bitfield so that the value of the full field can be obtained by bitwise -/// OR between these -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] field -/// Name of the field that contains the bit field definition as defined in the _def.txt file -/// \param[in] bitfield -/// Name of the bitfield as defined in the _def.txt file -/// \param[in] value -/// The value to use in the bitfield -/// -#define BITVALUE(cmd, field, bitfield, value) \ -((((uint32_t)(value)) & ((1U << (_NBITS_##cmd##_##field##_##bitfield)) - 1)) << \ - (_BITPOS_##cmd##_##field##_##bitfield)) - -/// Get the size of a structure -// -/// Gets the size of a structure defined in a _def.txt file. -/// -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// -#define SIZEOF_STRUCT(cmd) \ -(_SIZEOF_##cmd) - -/// Get the size of a radio operation command structure -// -/// Gets the size of a radio operation command structure defined in a _def.txt file. The difference from -/// SIZEOF_STRUCT is for legacy reasons only. -/// -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// -#define SIZEOF_RADIO_OP(cmd) \ -(_SIZEOF_##cmd) - -/// Initializes a structure to an initialization set -// -/// Sets the value of a structure to its given initialization values -/// \param[in] ptr -/// Pointer to the structure, must be word aligned -/// \param[in] cmd -/// Name of the command or structure as defined in the _def.txt file -/// \param[in] set -/// Index of the set of initializations to use -/// -#define INIT_STRUCT(ptr, cmd, set) \ -(memcpy(((uint32_t *)(ptr)) + (_START_INIT_WIDX_##cmd), (__init_##cmd[(set)]), \ - (_N_INIT_WORDS_##cmd) * sizeof(uint32_t))) - -///@} - - /// \name Macros for sending direct commands ///@{ /// Direct command with no parameter @@ -445,18 +213,6 @@ typedef struct { /// \name Radio operation status -/// Radio operation status format: -/// Bits 15:12: Protocol -/// 0000: Common/Generic -/// 0001: BLE -/// 0010: IEEE 802.15.4 -/// 0011: Proprietary -/// 0100: ANT -/// Bits 11:10: Type -/// 00: Not finished -/// 01: Done successfully -/// 10: Done with error -/// Bits 9:0: Identifier ///@{ /// \name Operation not finished ///@{ @@ -485,8 +241,8 @@ typedef struct { #define ERROR_CMDID 0x0805 ///< Next operation has a command ID that is undefined or not a radio ///< operation command #define ERROR_WRONG_BG 0x0806 ///< FG level command not compatible with running BG level command -#define ERROR_NO_SETUP 0x0807 ///< Operation using Rx or Tx attemted without CMD_RADIO_SETUP -#define ERROR_NO_FS 0x0808 ///< Operation using Rx or Tx attemted without frequency synth configured +#define ERROR_NO_SETUP 0x0807 ///< Operation using Rx or Tx attempted without CMD_RADIO_SETUP +#define ERROR_NO_FS 0x0808 ///< Operation using Rx or Tx attempted without frequency synth configured #define ERROR_SYNTH_PROG 0x0809 ///< Synthesizer calibration failed #define ERROR_TXUNF 0x080A ///< Tx underflow observed #define ERROR_RXOVF 0x080B ///< Rx overflow observed @@ -514,9 +270,6 @@ typedef struct { #define DATA_ENTRY_UNFINISHED 4 ///< Radio CPU is finished accessing the entry, but packet could not be finished ///@} -/// Difference between length and size of rxData field in multi-element Rx entry -#define DATA_ENTRY_MULTI_LEN_OFFSET (_POSITION_dataEntryMulti_rxData - _POSITION_dataEntryGeneral_data) - /// \name Macros for RF register override ///@{ @@ -564,10 +317,10 @@ typedef struct { ((mceCfg & 1) << 6) | (((mceRomBank) & 0x0F) << 7) | \ ((rfeCfg & 1) << 11) | (((rfeRomBank) & 0x0F) << 12) | \ (((mceMode) & 0x00FF) << 16) | (((rfeMode) & 0x00FF) << 24)) -#define BAW_OVERRIDE(freqOffset) (0x000B | ((freqOffset) << 16)) #define CENTER_FREQ_OVERRIDE(centerFreq, flags) (0x001B | ((flags & 0x07) << 9) | \ ((((((12 * 24) << 20) / ((uint32_t) centerFreq)) + 1) / 2) << 12)) #define TX20_POWER_OVERRIDE(tx20Power) (0x002B | (((uint32_t) tx20Power) << 10)) +#define TX_STD_POWER_OVERRIDE(txPower) (0x022B | (((uint32_t) txPower) << 10)) #define NEW_OVERRIDE_SEGMENT(address) (((((uintptr_t)(address)) & 0x03FFFFFC) << 6) | 0x000F | \ (((((uintptr_t)(address) >> 24) == 0x20) ? 0x01 : \ (((uintptr_t)(address) >> 24) == 0x21) ? 0x02 : \ @@ -582,10 +335,6 @@ typedef struct { #define END_OVERRIDE 0xFFFFFFFF -#define FWPAR_8BIT_ADDR(cmd, field) (0x1800 | (_POSITION_##cmd##_##field)) -#define FWPAR_16BIT_ADDR(cmd, field) (0x1000 | (_POSITION_##cmd##_##field)) -#define FWPAR_32BIT_ADDR(cmd, field) (0x0000 | (_POSITION_##cmd##_##field)) - /// ADI address-value pair #define ADI_ADDR_VAL(addr, value) ((((addr) & 0x7F) << 8) | ((value) & 0xFF)) #define ADI_ADDR_VAL_MASK(addr, mask, value) ((((addr) & 0x7F) << 8) | ADI_VAL_MASK(addr, mask, value)) diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_prop_cmd.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_prop_cmd.h similarity index 76% rename from third_party/ti/devices/cc26x2/driverlib/rf_prop_cmd.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_prop_cmd.h index 0112edc74..ba069f975 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rf_prop_cmd.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_prop_cmd.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_prop_cmd.h -* Revised: 2016-11-14 16:07:52 +0100 (Mon, 14 Nov 2016) -* Revision: 17451 +* Revised: 2018-05-07 15:02:01 +0200 (Mon, 07 May 2018) +* Revision: 18438 * -* Description: Agama API for Proprietary mode commands +* Description: CC13x2/CC26x2 API for Proprietary mode commands * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -40,11 +40,17 @@ #define __PROP_CMD_H #ifndef __RFC_STRUCT -#ifdef __GNUC__ -#define __RFC_STRUCT __attribute__ ((aligned (4))) -#else #define __RFC_STRUCT #endif + +#ifndef __RFC_STRUCT_ATTR +#if defined(__GNUC__) +#define __RFC_STRUCT_ATTR __attribute__ ((aligned (4))) +#elif defined(__TI_ARM__) +#define __RFC_STRUCT_ATTR __attribute__ ((__packed__,aligned (4))) +#else +#define __RFC_STRUCT_ATTR +#endif #endif //! \addtogroup rfc @@ -67,6 +73,8 @@ typedef struct __RFC_STRUCT rfc_CMD_PROP_RADIO_SETUP_s rfc_CMD_PROP_RADIO_SETUP_ typedef struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_s rfc_CMD_PROP_RADIO_DIV_SETUP_t; typedef struct __RFC_STRUCT rfc_CMD_PROP_RX_SNIFF_s rfc_CMD_PROP_RX_SNIFF_t; typedef struct __RFC_STRUCT rfc_CMD_PROP_RX_ADV_SNIFF_s rfc_CMD_PROP_RX_ADV_SNIFF_t; +typedef struct __RFC_STRUCT rfc_CMD_PROP_RADIO_SETUP_PA_s rfc_CMD_PROP_RADIO_SETUP_PA_t; +typedef struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_PA_s rfc_CMD_PROP_RADIO_DIV_SETUP_PA_t; typedef struct __RFC_STRUCT rfc_CMD_PROP_SET_LEN_s rfc_CMD_PROP_SET_LEN_t; typedef struct __RFC_STRUCT rfc_CMD_PROP_RESTART_RX_s rfc_CMD_PROP_RESTART_RX_t; typedef struct __RFC_STRUCT rfc_propRxOutput_s rfc_propRxOutput_t; @@ -109,7 +117,7 @@ struct __RFC_STRUCT rfc_carrierSense_s { //!< 1: A trigger in the past is triggered as soon as possible } csEndTrigger; //!< Trigger classifier for ending the carrier sense ratmr_t csEndTime; //!< Time used together with csEndTrigger for ending the operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -148,7 +156,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_TX_s { uint8_t pktLen; //!< Packet length uint32_t syncWord; //!< Sync word to transmit uint8_t* pPkt; //!< Pointer to packet -}; +} __RFC_STRUCT_ATTR; //! @} @@ -220,7 +228,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RX_s { ratmr_t endTime; //!< Time used together with endTrigger for ending the operation dataQueue_t* pQueue; //!< Pointer to receive queue uint8_t* pOutput; //!< Pointer to output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -284,7 +292,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_TX_ADV_s { //!< this trigger is observed. uint32_t syncWord; //!< Sync word to transmit uint8_t* pPkt; //!< Pointer to packet, or TX queue for unlimited length -}; +} __RFC_STRUCT_ATTR; //! @} @@ -370,7 +378,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RX_ADV_s { uint8_t* pAddr; //!< Pointer to address list dataQueue_t* pQueue; //!< Pointer to receive queue uint8_t* pOutput; //!< Pointer to output structure -}; +} __RFC_STRUCT_ATTR; //! @} @@ -438,7 +446,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_CS_s { //!< 1: A trigger in the past is triggered as soon as possible } csEndTrigger; //!< Trigger classifier for ending the carrier sense ratmr_t csEndTime; //!< Time used together with csEndTrigger for ending the operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -470,11 +478,21 @@ struct __RFC_STRUCT rfc_CMD_PROP_RADIO_SETUP_s { //!< 1: GFSK
//!< 2: OOK
//!< Others: Reserved - uint16_t deviation:13; //!< Deviation (250 Hz steps) + uint16_t deviation:11; //!< Deviation (specified in number of steps, with step size given by deviationStepSz) + uint16_t deviationStepSz:2; //!< \brief Deviation step size
+ //!< 0: 250 Hz
+ //!< 1: 1000 Hz
+ //!< 2: 15.625 Hz
+ //!< 3: 62.5 Hz } modulation; struct { uint32_t preScale:8; //!< Prescaler value uint32_t rateWord:21; //!< Rate word + uint32_t decimMode:3; //!< \brief 0: Use automatic PDIF decimation
+ //!< 1: Force PDIF decimation to 0
+ //!< 3: Force PDIF decimation to 1
+ //!< 5: Force PDIF decimation to 2
+ //!< Others: Reserved } symbolRate; //!< Symbol rate setting uint8_t rxBw; //!< Receiver bandwidth struct { @@ -531,7 +549,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RADIO_SETUP_s { uint16_t txPower; //!< Transmit power uint32_t* pRegOverride; //!< \brief Pointer to a list of hardware and configuration registers to override. If NULL, no //!< override is used. -}; +} __RFC_STRUCT_ATTR; //! @} @@ -540,8 +558,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RADIO_SETUP_s { #define CMD_PROP_RADIO_DIV_SETUP 0x3807 //! Proprietary Mode Radio Setup Command for All Frequency Bands struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_s { - uint16_t commandNo; //!< \brief Proprietary Mode Radio Setup Command for 2.4 GHz - //!< The command ID number 0x3807 + uint16_t commandNo; //!< The command ID number 0x3807 uint16_t status; //!< \brief An integer telling the status of the command. This value is //!< updated by the radio CPU during operation and may be read by the //!< system CPU at any time. @@ -564,11 +581,21 @@ struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_s { //!< 1: GFSK
//!< 2: OOK
//!< Others: Reserved - uint16_t deviation:13; //!< Deviation (250 Hz steps) + uint16_t deviation:11; //!< Deviation (specified in number of steps, with step size given by deviationStepSz) + uint16_t deviationStepSz:2; //!< \brief Deviation step size
+ //!< 0: 250 Hz
+ //!< 1: 1000 Hz
+ //!< 2: 15.625 Hz
+ //!< 3: 62.5 Hz } modulation; struct { uint32_t preScale:8; //!< Prescaler value uint32_t rateWord:21; //!< Rate word + uint32_t decimMode:3; //!< \brief 0: Use automatic PDIF decimation
+ //!< 1: Force PDIF decimation to 0
+ //!< 3: Force PDIF decimation to 1
+ //!< 5: Force PDIF decimation to 2
+ //!< Others: Reserved } symbolRate; //!< Symbol rate setting uint8_t rxBw; //!< Receiver bandwidth struct { @@ -633,7 +660,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_s { //!< intermediate frequency if supported, otherwise 0.
//!< 0x8000: Use default. uint8_t loDivider; //!< LO frequency divider setting to use. Supported values: 0, 2, 4, 5, 6, 10, 12, 15, and 30 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -642,8 +669,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_s { #define CMD_PROP_RX_SNIFF 0x3808 //! Proprietary Mode Receive Command with Sniff Mode struct __RFC_STRUCT rfc_CMD_PROP_RX_SNIFF_s { - uint16_t commandNo; //!< \brief Proprietary Mode Receive Command - //!< The command ID number 0x3808 + uint16_t commandNo; //!< The command ID number 0x3808 uint16_t status; //!< \brief An integer telling the status of the command. This value is //!< updated by the radio CPU during operation and may be read by the //!< system CPU at any time. @@ -740,7 +766,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RX_SNIFF_s { //!< 1: A trigger in the past is triggered as soon as possible } csEndTrigger; //!< Trigger classifier for ending the carrier sense ratmr_t csEndTime; //!< Time used together with csEndTrigger for ending the operation -}; +} __RFC_STRUCT_ATTR; //! @} @@ -749,8 +775,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RX_SNIFF_s { #define CMD_PROP_RX_ADV_SNIFF 0x3809 //! Proprietary Mode Advanced Receive Command with Sniff Mode struct __RFC_STRUCT rfc_CMD_PROP_RX_ADV_SNIFF_s { - uint16_t commandNo; //!< \brief Proprietary Mode Advanced Receive Command - //!< The command ID number 0x3809 + uint16_t commandNo; //!< The command ID number 0x3809 uint16_t status; //!< \brief An integer telling the status of the command. This value is //!< updated by the radio CPU during operation and may be read by the //!< system CPU at any time. @@ -861,7 +886,229 @@ struct __RFC_STRUCT rfc_CMD_PROP_RX_ADV_SNIFF_s { //!< 1: A trigger in the past is triggered as soon as possible } csEndTrigger; //!< Trigger classifier for ending the carrier sense ratmr_t csEndTime; //!< Time used together with csEndTrigger for ending the operation -}; +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_PROP_RADIO_SETUP_PA +//! @{ +//! Proprietary Mode Radio Setup Command for 2.4 GHz with PA Switching Fields +struct __RFC_STRUCT rfc_CMD_PROP_RADIO_SETUP_PA_s { + uint16_t commandNo; //!< The command ID number + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + struct { + uint16_t modType:3; //!< \brief 0: FSK
+ //!< 1: GFSK
+ //!< 2: OOK
+ //!< Others: Reserved + uint16_t deviation:11; //!< Deviation (specified in number of steps, with step size given by deviationStepSz) + uint16_t deviationStepSz:2; //!< \brief Deviation step size
+ //!< 0: 250 Hz
+ //!< 1: 1000 Hz
+ //!< 2: 15.625 Hz
+ //!< 3: 62.5 Hz + } modulation; + struct { + uint32_t preScale:8; //!< Prescaler value + uint32_t rateWord:21; //!< Rate word + uint32_t decimMode:3; //!< \brief 0: Use automatic PDIF decimation
+ //!< 1: Force PDIF decimation to 0
+ //!< 3: Force PDIF decimation to 1
+ //!< 5: Force PDIF decimation to 2
+ //!< Others: Reserved + } symbolRate; //!< Symbol rate setting + uint8_t rxBw; //!< Receiver bandwidth + struct { + uint8_t nPreamBytes:6; //!< \brief 0: 1 preamble bit
+ //!< 1--16: Number of preamble bytes
+ //!< 18, 20, ..., 30: Number of preamble bytes
+ //!< 31: 4 preamble bits
+ //!< 32: 32 preamble bytes
+ //!< Others: Reserved + uint8_t preamMode:2; //!< \brief 0: Send 0 as the first preamble bit
+ //!< 1: Send 1 as the first preamble bit
+ //!< 2: Send same first bit in preamble and sync word
+ //!< 3: Send different first bit in preamble and sync word + } preamConf; + struct { + uint16_t nSwBits:6; //!< Number of sync word bits (8--32) + uint16_t bBitReversal:1; //!< \brief 0: Use positive deviation for 1
+ //!< 1: Use positive deviation for 0 + uint16_t bMsbFirst:1; //!< \brief 0: Least significant bit transmitted first
+ //!< 1: Most significant bit transmitted first + uint16_t fecMode:4; //!< \brief Select coding
+ //!< 0: Uncoded binary modulation
+ //!< 10: Manchester coded binary modulation
+ //!< Others: Reserved + uint16_t :1; + uint16_t whitenMode:3; //!< \brief 0: No whitening
+ //!< 1: CC1101/CC2500 compatible whitening
+ //!< 2: PN9 whitening without byte reversal
+ //!< 3: Reserved
+ //!< 4: No whitener, 32-bit IEEE 802.15.4g compatible CRC
+ //!< 5: IEEE 802.15.4g compatible whitener and 32-bit CRC
+ //!< 6: No whitener, dynamically IEEE 802.15.4g compatible 16-bit or 32-bit CRC
+ //!< 7: Dynamically IEEE 802.15.4g compatible whitener and 16-bit or 32-bit CRC + } formatConf; + struct { + uint16_t frontEndMode:3; //!< \brief 0x00: Differential mode
+ //!< 0x01: Single-ended mode RFP
+ //!< 0x02: Single-ended mode RFN
+ //!< 0x05 Single-ended mode RFP with external frontend control on RF pins (RFN and RXTX)
+ //!< 0x06 Single-ended mode RFN with external frontend control on RF pins (RFP and RXTX)
+ //!< Others: Reserved + uint16_t biasMode:1; //!< \brief 0: Internal bias
+ //!< 1: External bias + uint16_t analogCfgMode:6; //!< \brief 0x00: Write analog configuration.
+ //!< Required first time after boot and when changing frequency band + //!< or front-end configuration
+ //!< 0x2D: Keep analog configuration.
+ //!< May be used after standby or when changing mode with the same frequency + //!< band and front-end configuration
+ //!< Others: Reserved + uint16_t bNoFsPowerUp:1; //!< \brief 0: Power up frequency synth
+ //!< 1: Do not power up frequency synth + } config; //!< Configuration options + uint16_t txPower; //!< Transmit power + uint32_t* pRegOverride; //!< \brief Pointer to a list of hardware and configuration registers to override. If NULL, no + //!< override is used. + uint32_t* pRegOverrideTxStd; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< standard PA. Used by RF driver only, not radio CPU. + uint32_t* pRegOverrideTx20; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< 20-dBm PA. Used by RF driver only, not radio CPU. +} __RFC_STRUCT_ATTR; + +//! @} + +//! \addtogroup CMD_PROP_RADIO_DIV_SETUP_PA +//! @{ +//! Proprietary Mode Radio Setup Command for All Frequency Bands with PA Switching Fields +struct __RFC_STRUCT rfc_CMD_PROP_RADIO_DIV_SETUP_PA_s { + uint16_t commandNo; //!< The command ID number + uint16_t status; //!< \brief An integer telling the status of the command. This value is + //!< updated by the radio CPU during operation and may be read by the + //!< system CPU at any time. + rfc_radioOp_t *pNextOp; //!< Pointer to the next operation to run after this operation is done + ratmr_t startTime; //!< Absolute or relative start time (depending on the value of startTrigger) + struct { + uint8_t triggerType:4; //!< The type of trigger + uint8_t bEnaCmd:1; //!< \brief 0: No alternative trigger command
+ //!< 1: CMD_TRIGGER can be used as an alternative trigger + uint8_t triggerNo:2; //!< The trigger number of the CMD_TRIGGER command that triggers this action + uint8_t pastTrig:1; //!< \brief 0: A trigger in the past is never triggered, or for start of commands, give an error
+ //!< 1: A trigger in the past is triggered as soon as possible + } startTrigger; //!< Identification of the trigger that starts the operation + struct { + uint8_t rule:4; //!< Condition for running next command: Rule for how to proceed + uint8_t nSkip:4; //!< Number of skips + 1 if the rule involves skipping. 0: same, 1: next, 2: skip next, ... + } condition; + struct { + uint16_t modType:3; //!< \brief 0: FSK
+ //!< 1: GFSK
+ //!< 2: OOK
+ //!< Others: Reserved + uint16_t deviation:11; //!< Deviation (specified in number of steps, with step size given by deviationStepSz) + uint16_t deviationStepSz:2; //!< \brief Deviation step size
+ //!< 0: 250 Hz
+ //!< 1: 1000 Hz
+ //!< 2: 15.625 Hz
+ //!< 3: 62.5 Hz + } modulation; + struct { + uint32_t preScale:8; //!< Prescaler value + uint32_t rateWord:21; //!< Rate word + uint32_t decimMode:3; //!< \brief 0: Use automatic PDIF decimation
+ //!< 1: Force PDIF decimation to 0
+ //!< 3: Force PDIF decimation to 1
+ //!< 5: Force PDIF decimation to 2
+ //!< Others: Reserved + } symbolRate; //!< Symbol rate setting + uint8_t rxBw; //!< Receiver bandwidth + struct { + uint8_t nPreamBytes:6; //!< \brief 0: 1 preamble bit
+ //!< 1--16: Number of preamble bytes
+ //!< 18, 20, ..., 30: Number of preamble bytes
+ //!< 31: 4 preamble bits
+ //!< 32: 32 preamble bytes
+ //!< Others: Reserved + uint8_t preamMode:2; //!< \brief 0: Send 0 as the first preamble bit
+ //!< 1: Send 1 as the first preamble bit
+ //!< 2: Send same first bit in preamble and sync word
+ //!< 3: Send different first bit in preamble and sync word + } preamConf; + struct { + uint16_t nSwBits:6; //!< Number of sync word bits (8--32) + uint16_t bBitReversal:1; //!< \brief 0: Use positive deviation for 1
+ //!< 1: Use positive deviation for 0 + uint16_t bMsbFirst:1; //!< \brief 0: Least significant bit transmitted first
+ //!< 1: Most significant bit transmitted first + uint16_t fecMode:4; //!< \brief Select coding
+ //!< 0: Uncoded binary modulation
+ //!< 10: Manchester coded binary modulation
+ //!< Others: Reserved + uint16_t :1; + uint16_t whitenMode:3; //!< \brief 0: No whitening
+ //!< 1: CC1101/CC2500 compatible whitening
+ //!< 2: PN9 whitening without byte reversal
+ //!< 3: Reserved
+ //!< 4: No whitener, 32-bit IEEE 802.15.4g compatible CRC
+ //!< 5: IEEE 802.15.4g compatible whitener and 32-bit CRC
+ //!< 6: No whitener, dynamically IEEE 802.15.4g compatible 16-bit or 32-bit CRC
+ //!< 7: Dynamically IEEE 802.15.4g compatible whitener and 16-bit or 32-bit CRC + } formatConf; + struct { + uint16_t frontEndMode:3; //!< \brief 0x00: Differential mode
+ //!< 0x01: Single-ended mode RFP
+ //!< 0x02: Single-ended mode RFN
+ //!< 0x05 Single-ended mode RFP with external frontend control on RF pins (RFN and RXTX)
+ //!< 0x06 Single-ended mode RFN with external frontend control on RF pins (RFP and RXTX)
+ //!< Others: Reserved + uint16_t biasMode:1; //!< \brief 0: Internal bias
+ //!< 1: External bias + uint16_t analogCfgMode:6; //!< \brief 0x00: Write analog configuration.
+ //!< Required first time after boot and when changing frequency band + //!< or front-end configuration
+ //!< 0x2D: Keep analog configuration.
+ //!< May be used after standby or when changing mode with the same frequency + //!< band and front-end configuration
+ //!< Others: Reserved + uint16_t bNoFsPowerUp:1; //!< \brief 0: Power up frequency synth
+ //!< 1: Do not power up frequency synth + } config; //!< Configuration options + uint16_t txPower; //!< Transmit power + uint32_t* pRegOverride; //!< \brief Pointer to a list of hardware and configuration registers to override. If NULL, no + //!< override is used. + uint16_t centerFreq; //!< \brief Center frequency of the frequency band used, in MHz; used for calculating some internal TX and RX parameters. + //!< For a single channel RF system, this should be set equal to the RF frequency used. + //!< For a multi channel RF system (e.g. frequency hopping spread spectrum), this should be set equal + //!< to the center frequency of the frequency band used. + int16_t intFreq; //!< \brief Intermediate frequency to use for RX, in MHz on 4.12 signed format. TX will use same + //!< intermediate frequency if supported, otherwise 0.
+ //!< 0x8000: Use default. + uint8_t loDivider; //!< LO frequency divider setting to use. Supported values: 0, 2, 4, 5, 6, 10, 12, 15, and 30 + uint8_t __dummy0; + uint16_t __dummy1; + uint32_t* pRegOverrideTxStd; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< standard PA. Used by RF driver only, not radio CPU. + uint32_t* pRegOverrideTx20; //!< \brief Pointer to a list of hardware and configuration registers to override when switching to + //!< 20-dBm PA. Used by RF driver only, not radio CPU. +} __RFC_STRUCT_ATTR; //! @} @@ -872,7 +1119,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_RX_ADV_SNIFF_s { struct __RFC_STRUCT rfc_CMD_PROP_SET_LEN_s { uint16_t commandNo; //!< The command ID number 0x3401 uint16_t rxLen; //!< Payload length to use -}; +} __RFC_STRUCT_ATTR; //! @} @@ -882,7 +1129,7 @@ struct __RFC_STRUCT rfc_CMD_PROP_SET_LEN_s { //! Restart Packet Command struct __RFC_STRUCT rfc_CMD_PROP_RESTART_RX_s { uint16_t commandNo; //!< The command ID number 0x3402 -}; +} __RFC_STRUCT_ATTR; //! @} @@ -898,7 +1145,7 @@ struct __RFC_STRUCT rfc_propRxOutput_s { uint8_t nRxBufFull; //!< Number of packets that have been received and discarded due to lack of buffer space int8_t lastRssi; //!< RSSI of last received packet ratmr_t timeStamp; //!< Time stamp of last received packet -}; +} __RFC_STRUCT_ATTR; //! @} @@ -915,7 +1162,7 @@ struct __RFC_STRUCT rfc_propRxStatus_s { //!< 2: Packet received correctly, but can be ignored
//!< 3: Packet reception was aborted } status; -}; +} __RFC_STRUCT_ATTR; //! @} diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_prop_mailbox.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_prop_mailbox.h new file mode 100644 index 000000000..bb8c541e0 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rf_prop_mailbox.h @@ -0,0 +1,71 @@ +/****************************************************************************** +* Filename: rf_prop_mailbox.h +* Revised: 2017-11-03 15:06:37 +0100 (Fri, 03 Nov 2017) +* Revision: 18032 +* +* Description: Definitions for proprietary mode radio interface +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef _PROP_MAILBOX_H +#define _PROP_MAILBOX_H + +/// \name Radio operation status +///@{ +/// \name Operation finished normally +///@{ +#define PROP_DONE_OK 0x3400 ///< Operation ended normally +#define PROP_DONE_RXTIMEOUT 0x3401 ///< Operation stopped after end trigger while waiting for sync +#define PROP_DONE_BREAK 0x3402 ///< Rx stopped due to timeout in the middle of a packet +#define PROP_DONE_ENDED 0x3403 ///< Operation stopped after end trigger during reception +#define PROP_DONE_STOPPED 0x3404 ///< Operation stopped after stop command +#define PROP_DONE_ABORT 0x3405 ///< Operation aborted by abort command +#define PROP_DONE_RXERR 0x3406 ///< Operation ended after receiving packet with CRC error +#define PROP_DONE_IDLE 0x3407 ///< Carrier sense operation ended because of idle channel +#define PROP_DONE_BUSY 0x3408 ///< Carrier sense operation ended because of busy channel +#define PROP_DONE_IDLETIMEOUT 0x3409 ///< Carrier sense operation ended because of timeout with csConf.timeoutRes = 1 +#define PROP_DONE_BUSYTIMEOUT 0x340A ///< Carrier sense operation ended because of timeout with csConf.timeoutRes = 0 + +///@} +/// \name Operation finished with error +///@{ +#define PROP_ERROR_PAR 0x3800 ///< Illegal parameter +#define PROP_ERROR_RXBUF 0x3801 ///< No available Rx buffer at the start of a packet +#define PROP_ERROR_RXFULL 0x3802 ///< Out of Rx buffer during reception in a partial read buffer +#define PROP_ERROR_NO_SETUP 0x3803 ///< Radio was not set up in proprietary mode +#define PROP_ERROR_NO_FS 0x3804 ///< Synth was not programmed when running Rx or Tx +#define PROP_ERROR_RXOVF 0x3805 ///< Rx overflow observed during operation +#define PROP_ERROR_TXUNF 0x3806 ///< Tx underflow observed during operation +///@} +///@} + +#endif diff --git a/third_party/ti/devices/cc26x2/driverlib/rfc.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rfc.c similarity index 55% rename from third_party/ti/devices/cc26x2/driverlib/rfc.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rfc.c index c102f3b05..14db54f3a 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rfc.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rfc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rfc.c -* Revised: 2017-05-05 10:41:25 +0200 (Fri, 05 May 2017) -* Revision: 48919 +* Revised: 2018-01-30 17:42:58 +0100 (Tue, 30 Jan 2018) +* Revision: 51371 * * Description: Driver for the RF Core. * @@ -37,6 +37,7 @@ ******************************************************************************/ #include "rfc.h" +#include "rf_mailbox.h" #include //***************************************************************************** @@ -52,130 +53,89 @@ #define RFCDoorbellSendTo NOROM_RFCDoorbellSendTo #undef RFCSynthPowerDown #define RFCSynthPowerDown NOROM_RFCSynthPowerDown - #undef RFCRfTrimRead - #define RFCRfTrimRead NOROM_RFCRfTrimRead - #undef RFCRfTrimSet - #define RFCRfTrimSet NOROM_RFCRfTrimSet - #undef RFCRTrim - #define RFCRTrim NOROM_RFCRTrim - #undef RFCCPEPatchReset - #define RFCCPEPatchReset NOROM_RFCCPEPatchReset - #undef RFCAdi3VcoLdoVoltageMode - #define RFCAdi3VcoLdoVoltageMode NOROM_RFCAdi3VcoLdoVoltageMode + #undef RFCCpePatchReset + #define RFCCpePatchReset NOROM_RFCCpePatchReset + #undef RFCOverrideSearch + #define RFCOverrideSearch NOROM_RFCOverrideSearch #undef RFCOverrideUpdate #define RFCOverrideUpdate NOROM_RFCOverrideUpdate - #undef RFCHWIntGetAndClear - #define RFCHWIntGetAndClear NOROM_RFCHWIntGetAndClear + #undef RFCHwIntGetAndClear + #define RFCHwIntGetAndClear NOROM_RFCHwIntGetAndClear #endif -#define RFC_RESERVED0 0x40046054 -#define RFC_RESERVED1 0x40046060 -#define RFC_RESERVED2 0x40046058 -#define RFC_RESERVED3 0x40044100 - - - - - -// Position of divider value -#define CONFIG_MISC_ADC_DIVIDER 27 -#define CONFIG_MISC_ADC_DIVIDER_BM 0xF8000000U - - // Function is not complete + // Function is not complete //***************************************************************************** // -// Get and clear CPE interrupt flags +// Get and clear CPE interrupt flags which match the provided bitmask // //***************************************************************************** uint32_t -RFCCpeIntGetAndClear(void) +RFCCpeIntGetAndClear(uint32_t ui32Mask) { - uint32_t ui32Ifg = HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFCPEIFG); + // Read the CPE interrupt flags which match the provided bitmask + uint32_t ui32Ifg = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) & ui32Mask; - do { - HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFCPEIFG) = ~ui32Ifg; - } while (HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFCPEIFG) & ui32Ifg); + // Clear the interrupt flags + RFCCpeIntClear(ui32Ifg); + // Return with the interrupt flags return (ui32Ifg); } //***************************************************************************** // -// Send command to doorbell and wait for ack +// Send a radio operation to the doorbell and wait for an acknowledgement // //***************************************************************************** uint32_t RFCDoorbellSendTo(uint32_t pOp) { + // Wait until the doorbell becomes available while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) != 0); - RFCAckIntClear(); - HWREG(RFC_DBELL_BASE+RFC_DBELL_O_CMDR) = pOp; + // Submit the command to the CM0 through the doorbell + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDR) = pOp; + // Wait until the CM0 starts to parse the command while(!HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG)); RFCAckIntClear(); + // Return with the content of status register return(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_CMDSTA)); } //***************************************************************************** // -// Turn off synth, NOTE: Radio will no longer respond to commands! +// Turn off the RF synthesizer. The radio will no longer respond to commands! // //***************************************************************************** void -RFCSynthPowerDown() +RFCSynthPowerDown(void) { - // Disable CPE clock, enable FSCA clock. NOTE: Radio will no longer respond to commands! - HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = (HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) & ~RFC_PWR_PWMCLKEN_CPE_M) | RFC_PWR_PWMCLKEN_FSCA_M | RFC_PWR_PWMCLKEN_RFE_M; + // Definition of reserved words + const uint32_t RFC_RESERVED0 = 0x40046054; + const uint32_t RFC_RESERVED1 = 0x40046060; + const uint32_t RFC_RESERVED2 = 0x40046058; + const uint32_t RFC_RESERVED3 = 0x40044100; - HWREG(RFC_RESERVED0) = 3; - HWREG(RFC_RESERVED1) = 0x1030; - HWREG(RFC_RESERVED2) = 1; - HWREG(RFC_RESERVED1) = 0x50; - HWREG(RFC_RESERVED2) = 1; - HWREG(RFC_RESERVED1) = 0x650; - HWREG(RFC_RESERVED2) = 1; - HWREG(RFC_RESERVED1) = 0x10C0; - HWREG(RFC_RESERVED2) = 1; - HWREG(RFC_RESERVED3) = 1; -} + // Disable CPE clock, enable FSCA clock. + HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = (HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) + & ~RFC_PWR_PWMCLKEN_CPE_M) | RFC_PWR_PWMCLKEN_FSCA_M | RFC_PWR_PWMCLKEN_RFE_M; - -//***************************************************************************** -// -// Read RF Trim from flash using the CM3 -// -//***************************************************************************** -void RFCRfTrimRead(rfc_radioOp_t *pOpSetup, rfTrim_t* pRfTrim) -{ -// Function is left blank for compatibility reasons. -} - - -//***************************************************************************** -// -// Check Override RTrim vs FCFG RTrim -// -//***************************************************************************** -void RFCRTrim(rfc_radioOp_t *pOpSetup) -{ - // Function is left blank for compatibility reasons. -} - - -//***************************************************************************** -// -// Write preloaded RF trim values to CM0 -// -//***************************************************************************** -void RFCRfTrimSet(rfTrim_t* pRfTrim) -{ - // Function is left blank for compatibility reasons. + HWREG(RFC_RESERVED0) = 3; + HWREG(RFC_RESERVED1) = 0x1030; + HWREG(RFC_RESERVED2) = 1; + HWREG(RFC_RESERVED1) = 0x50; + HWREG(RFC_RESERVED2) = 1; + HWREG(RFC_RESERVED1) = 0x650; + HWREG(RFC_RESERVED2) = 1; + HWREG(RFC_RESERVED1) = 0x10C0; + HWREG(RFC_RESERVED2) = 1; + HWREG(RFC_RESERVED3) = 1; } @@ -184,32 +144,46 @@ void RFCRfTrimSet(rfTrim_t* pRfTrim) // Reset previously patched CPE RAM to a state where it can be patched again // //***************************************************************************** -void RFCCPEPatchReset(void) +void RFCCpePatchReset(void) { - // Function is not complete + // Function is not complete } //***************************************************************************** // -// Function to set VCOLDO reference to voltage mode +// Function to search an override list for the provided pattern within the search depth. // //***************************************************************************** -void RFCAdi3VcoLdoVoltageMode(bool bEnable) +uint8_t +RFCOverrideSearch(const uint32_t *pOverride, const uint32_t pattern, const uint32_t mask, const uint8_t searchDepth) { - // Function is left blank for compatibility reasons. + // Search from start of the override list, to look for first override entry that matches search pattern + uint8_t override_index; + for(override_index = 0; (override_index < searchDepth) && (pOverride[override_index] != END_OVERRIDE); override_index++) + { + // Compare the value to the given pattern + if((pOverride[override_index] & mask) == pattern) + { + // Return with the index of override in case of match + return override_index; + } + } + + // Return with an invalid index + return 0xFF; } - //***************************************************************************** +//***************************************************************************** // -// Update Overrides +// Update the override list based on values stored in FCFG1 // //***************************************************************************** uint8_t RFCOverrideUpdate(rfc_radioOp_t *pOpSetup, uint32_t *pParams) { - // Function is left blank for compatibility reasons. - return 0; + // Function is not complete + return 0; } @@ -219,19 +193,19 @@ uint8_t RFCOverrideUpdate(rfc_radioOp_t *pOpSetup, uint32_t *pParams) // //***************************************************************************** uint32_t -RFCHWIntGetAndClear(uint32_t ui32Mask) +RFCHwIntGetAndClear(uint32_t ui32Mask) { - uint32_t ui32Ifg = HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFHWIFG) & ui32Mask; + // Read the CPE interrupt flags which match the provided bitmask + uint32_t ui32Ifg = HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) & ui32Mask; - do { - HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFHWIFG) = ~ui32Ifg; - } while (HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFHWIFG) & ui32Ifg); + // Clear the interupt flags + RFCHwIntClear(ui32Ifg); + // Return with the interrupt flags return (ui32Ifg); } - //***************************************************************************** // // Handle support for DriverLib in ROM: @@ -245,20 +219,14 @@ RFCHWIntGetAndClear(uint32_t ui32Mask) #define RFCDoorbellSendTo NOROM_RFCDoorbellSendTo #undef RFCSynthPowerDown #define RFCSynthPowerDown NOROM_RFCSynthPowerDown - #undef RFCRfTrimRead - #define RFCRfTrimRead NOROM_RFCRfTrimRead - #undef RFCRfTrimSet - #define RFCRfTrimSet NOROM_RFCRfTrimSet - #undef RFCRTrim - #define RFCRTrim NOROM_RFCRTrim - #undef RFCCPEPatchReset - #define RFCCPEPatchReset NOROM_RFCCPEPatchReset - #undef RFCAdi3VcoLdoVoltageMode - #define RFCAdi3VcoLdoVoltageMode NOROM_RFCAdi3VcoLdoVoltageMode + #undef RFCCpePatchReset + #define RFCCpePatchReset NOROM_RFCCpePatchReset + #undef RFCOverrideSearch + #define RFCOverrideSearch NOROM_RFCOverrideSearch #undef RFCOverrideUpdate #define RFCOverrideUpdate NOROM_RFCOverrideUpdate - #undef RFCHWIntGetAndClear - #define RFCHWIntGetAndClear NOROM_RFCHWIntGetAndClear + #undef RFCHwIntGetAndClear + #define RFCHwIntGetAndClear NOROM_RFCHwIntGetAndClear #endif // See rfc.h for implementation diff --git a/third_party/ti/devices/cc26x2/driverlib/rfc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rfc.h similarity index 63% rename from third_party/ti/devices/cc26x2/driverlib/rfc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rfc.h index 931e13360..45c8717ba 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rfc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rfc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rfc.h -* Revised: 2017-05-03 15:46:38 +0200 (Wed, 03 May 2017) -* Revision: 48887 +* Revised: 2018-04-25 22:52:33 +0200 (Wed, 25 Apr 2018) +* Revision: 51935 * * Description: Defines and prototypes for the RF Core. * @@ -70,6 +70,7 @@ extern "C" #include "../inc/hw_adi_3_refsys.h" #include "../inc/hw_adi.h" +// Definition of RFTRIM container typedef struct { uint32_t configIfAdc; uint32_t configRfFrontend; @@ -77,8 +78,12 @@ typedef struct { uint32_t configMiscAdc; } rfTrim_t; -// Define for RFCOverrideSearch -#define RFC_MAX_SEARCH_DEPTH 5 +// Definition of maximum search depth used by the RFCOverrideUpdate function +#define RFC_MAX_SEARCH_DEPTH 5 +#define RFC_PA_TYPE_ADDRESS 0x21000345 +#define RFC_PA_TYPE_MASK 0x04 +#define RFC_PA_GAIN_ADDRESS 0x2100034C +#define RFC_PA_GAIN_MASK 0x003FFFFF //***************************************************************************** // @@ -97,13 +102,10 @@ typedef struct { #define RFCCpeIntGetAndClear NOROM_RFCCpeIntGetAndClear #define RFCDoorbellSendTo NOROM_RFCDoorbellSendTo #define RFCSynthPowerDown NOROM_RFCSynthPowerDown - #define RFCRfTrimRead NOROM_RFCRfTrimRead - #define RFCRfTrimSet NOROM_RFCRfTrimSet - #define RFCRTrim NOROM_RFCRTrim - #define RFCCPEPatchReset NOROM_RFCCPEPatchReset - #define RFCAdi3VcoLdoVoltageMode NOROM_RFCAdi3VcoLdoVoltageMode + #define RFCCpePatchReset NOROM_RFCCpePatchReset + #define RFCOverrideSearch NOROM_RFCOverrideSearch #define RFCOverrideUpdate NOROM_RFCOverrideUpdate - #define RFCHWIntGetAndClear NOROM_RFCHWIntGetAndClear + #define RFCHwIntGetAndClear NOROM_RFCHwIntGetAndClear #endif //***************************************************************************** @@ -126,21 +128,13 @@ typedef struct { __STATIC_INLINE void RFCClockEnable(void) { - // Enable all clocks - HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = - RFC_PWR_PWMCLKEN_RFCTRC | - RFC_PWR_PWMCLKEN_FSCA | - RFC_PWR_PWMCLKEN_PHA | - RFC_PWR_PWMCLKEN_RAT | - RFC_PWR_PWMCLKEN_RFERAM | - RFC_PWR_PWMCLKEN_RFE | - RFC_PWR_PWMCLKEN_MDMRAM | - RFC_PWR_PWMCLKEN_MDM | - RFC_PWR_PWMCLKEN_CPERAM | - RFC_PWR_PWMCLKEN_CPE | - RFC_PWR_PWMCLKEN_RFC; + // Enable basic clocks to get the CPE run + HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RFC_PWR_PWMCLKEN_CPERAM + | RFC_PWR_PWMCLKEN_CPE + | RFC_PWR_PWMCLKEN_RFC; } + //***************************************************************************** // //! \brief Disable the RF core clocks. @@ -150,7 +144,7 @@ RFCClockEnable(void) //! the radio can be ping'ed through the command interface. //! //! When disabling clocks it is the programmers responsibility that the -//! RF core clocks can be safely gated. I.e. the RF core should be safely +//! RF core clocks are safely gated. I.e. the RF core should be safely //! 'parked'. //! //! \return None @@ -163,212 +157,173 @@ RFCClockDisable(void) HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = 0x0; } -//***************************************************************************** -// -//! \brief Enable some of the RF core clocks. -//! -//! As soon as the RF core is started it will handle clock control -//! autonomously. No check should be performed to check the clocks. Instead -//! the radio can be ping'ed through the command interface. -//! -//! \return None -// -//***************************************************************************** -__STATIC_INLINE void -RFCClockSet(uint32_t ui32Mask) -{ - // - // Enable clocks - // - HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) |= ui32Mask; -} //***************************************************************************** // -//! \brief Disable some of the RF core clocks. -//! -//! As soon as the RF core is started it will handle clock control -//! autonomously. No check should be performed to check the clocks. Instead -//! the radio can be ping'ed through the command interface. -//! -//! When disabling clocks it is the programmers responsibility that the -//! RF core clocks can be safely gated. I.e. the RF core should be safely -//! 'parked'. -//! -//! \return None -// -//***************************************************************************** -__STATIC_INLINE void -RFCClockClear(uint32_t ui32Mask) -{ - // - // Disable clocks - // - HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) &= ~ui32Mask; -} - -//***************************************************************************** -// -//! Enable CPE0 interrupt -// -//***************************************************************************** -__STATIC_INLINE void -RFCCpe0IntEnable(uint32_t ui32Mask) -{ - // Multiplex RF Core interrupts to CPE0 IRQ. - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) &= ~ui32Mask; - - do - { - // Clear any pending interrupts. - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0; - }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0); - - // Enable the masked interrupts - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask; -} - - -//***************************************************************************** -// -//! Enable CPE1 interrupt -// -//***************************************************************************** -__STATIC_INLINE void -RFCCpe1IntEnable(uint32_t ui32Mask) -{ - // Multiplex RF Core interrupts to CPE1 IRQ. - HWREG( RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) |= ui32Mask; - - do - { - // Clear any pending interrupts. - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = 0x0; - }while(HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) != 0x0); - - // Enable the masked interrupts - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask; -} - - -//***************************************************************************** -// -//! This function is used to map only HW interrupts, and -//! clears/unmasks them. These interrupts are then enabled. -// -//***************************************************************************** -__STATIC_INLINE void -RFCHwIntEnable(uint32_t ui32Mask) -{ - // Clear any pending interrupts. - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = 0x0; - - // Enable the masked interrupts - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) |= ui32Mask; -} - - -//***************************************************************************** -// -//! Disable CPE interrupt -// -//***************************************************************************** -__STATIC_INLINE void -RFCCpeIntDisable(uint32_t ui32Mask) -{ - // Disable the masked interrupts - HWREG( RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN ) &= ~ui32Mask; -} - - -//***************************************************************************** -// -//! Disable HW interrupt -// -//***************************************************************************** -__STATIC_INLINE void -RFCHwIntDisable(uint32_t ui32Mask) -{ - // Disable the masked interrupts - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) &= ~ui32Mask; -} - - -//***************************************************************************** -// -//! Get and clear CPE interrupt flags -// -//***************************************************************************** -extern uint32_t RFCCpeIntGetAndClear(void); - - -//***************************************************************************** -// -//! Clear interrupt flags +//! Clear HW interrupt flags // //***************************************************************************** __STATIC_INLINE void RFCCpeIntClear(uint32_t ui32Mask) { - do - { - // Clear interrupts that may now be pending - HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFCPEIFG) = ~ui32Mask; - }while (HWREG(RFC_DBELL_BASE+RFC_DBELL_O_RFCPEIFG) & ui32Mask); + // Clear the masked pending interrupts. + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIFG) = ~ui32Mask; } //***************************************************************************** // -//! Clear interrupt flags +//! Clear CPE interrupt flags. // //***************************************************************************** __STATIC_INLINE void RFCHwIntClear(uint32_t ui32Mask) { - // Clear pending interrupts. - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = ~ui32Mask; + // Clear the masked pending interrupts. + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIFG) = ~ui32Mask; } //***************************************************************************** // -//! Clear interrupt flags +//! Select interrupt sources to CPE0 (assign to INT_RFC_CPE_0 interrupt vector). +// +//***************************************************************************** +__STATIC_INLINE void +RFCCpe0IntSelect(uint32_t ui32Mask) +{ + // Multiplex RF Core interrupts to CPE0 IRQ. + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) &= ~ui32Mask; +} + + +//***************************************************************************** +// +//! Select interrupt sources to CPE1 (assign to INT_RFC_CPE_1 interrupt vector). +// +//***************************************************************************** +__STATIC_INLINE void +RFCCpe1IntSelect(uint32_t ui32Mask) +{ + // Multiplex RF Core interrupts to CPE1 IRQ. + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEISL) |= ui32Mask; +} + + +//***************************************************************************** +// +//! Enable CPEx interrupt sources. +// +//***************************************************************************** +__STATIC_INLINE void +RFCCpeIntEnable(uint32_t ui32Mask) +{ + // Enable CPE interrupts from RF Core. + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) |= ui32Mask; +} + + +//***************************************************************************** +// +//! Select, clear, and enable interrupt sources to CPE0. +// +//***************************************************************************** +__STATIC_INLINE void +RFCCpe0IntSelectClearEnable(uint32_t ui32Mask) +{ + // Multiplex RF Core interrupts to CPE0 IRQ. + RFCCpe0IntSelect(ui32Mask); + + // Clear the masked interrupts. + RFCCpeIntClear(ui32Mask); + + // Enable the masked interrupts. + RFCCpeIntEnable(ui32Mask); +} + + +//***************************************************************************** +// +//! Select, clear, and enable interrupt sources to CPE1. +// +//***************************************************************************** +__STATIC_INLINE void +RFCCpe1IntSelectClearEnable(uint32_t ui32Mask) +{ + // Multiplex RF Core interrupts to CPE1 IRQ. + RFCCpe1IntSelect(ui32Mask); + + // Clear the masked interrupts. + RFCCpeIntClear(ui32Mask); + + // Enable the masked interrupts. + RFCCpeIntEnable(ui32Mask); +} + + +//***************************************************************************** +// +//! Enable HW interrupt sources. +// +//***************************************************************************** +__STATIC_INLINE void +RFCHwIntEnable(uint32_t ui32Mask) +{ + // Enable the masked interrupts + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) |= ui32Mask; +} + + +//***************************************************************************** +// +//! Disable CPE interrupt sources. +// +//***************************************************************************** +__STATIC_INLINE void +RFCCpeIntDisable(uint32_t ui32Mask) +{ + // Disable the masked interrupts + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFCPEIEN) &= ~ui32Mask; +} + + +//***************************************************************************** +// +//! Disable HW interrupt sources. +// +//***************************************************************************** +__STATIC_INLINE void +RFCHwIntDisable(uint32_t ui32Mask) +{ + // Disable the masked interrupts + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFHWIEN) &= ~ui32Mask; +} + + +//***************************************************************************** +// +//! Get and clear CPE interrupt flags. +// +//***************************************************************************** +extern uint32_t RFCCpeIntGetAndClear(uint32_t ui32Mask); + + +//***************************************************************************** +// +//! Clear ACK interrupt flag. // //***************************************************************************** __STATIC_INLINE void RFCAckIntClear(void) { - // Clear any pending interrupts. - HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0x0; + // Clear any pending interrupts. + HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0x0; } //***************************************************************************** // -//! Function to search top RFC_MAX_SEARCH_DEPTH (5) overrides -// -//***************************************************************************** -__STATIC_INLINE uint8_t -RFCOverrideSearch(const uint32_t *pOverride, const uint32_t pattern, const uint32_t mask) -{ - uint8_t override_index; - - // Search top overrides for RTRIM - for(override_index = 0; override_index < RFC_MAX_SEARCH_DEPTH; override_index++) - { - if((pOverride[override_index] & mask) == pattern) - { - return override_index; - } - } - return 0xFF; -} - - -//***************************************************************************** -// -//! Send command to doorbell and wait for ack +//! Send a radio operation to the doorbell and wait for an acknowledgment. // //***************************************************************************** extern uint32_t RFCDoorbellSendTo(uint32_t pOp); @@ -376,7 +331,7 @@ extern uint32_t RFCDoorbellSendTo(uint32_t pOp); //***************************************************************************** // -//! Turn off synth, NOTE: Radio will no longer respond to commands! +//! This function implements a fast way to turn off the synthesizer. // //***************************************************************************** extern void RFCSynthPowerDown(void); @@ -384,42 +339,18 @@ extern void RFCSynthPowerDown(void); //***************************************************************************** // -//! Read RF trim from flash using CM3 +//! Reset previously patched CPE RAM to a state where it can be patched again. // //***************************************************************************** -extern void RFCRfTrimRead(rfc_radioOp_t *pOpSetup, rfTrim_t* rfTrim); +extern void RFCCpePatchReset(void); //***************************************************************************** // -//! Write preloaded RF trim values to CM0 +// Function to search an override list for the provided pattern within the search depth. // //***************************************************************************** -extern void RFCRfTrimSet(rfTrim_t* rfTrim); - - -//***************************************************************************** -// -//! Check Override RTrim vs FCFG RTrim -// -//***************************************************************************** -extern void RFCRTrim(rfc_radioOp_t *pOpSetup); - - -//***************************************************************************** -// -//! Reset previously patched CPE RAM to a state where it can be patched again -// -//***************************************************************************** -extern void RFCCPEPatchReset(void); - - -//***************************************************************************** -// -//! Function to set VCOLDO reference to voltage mode -// -//***************************************************************************** -extern void RFCAdi3VcoLdoVoltageMode(bool bEnable); +extern uint8_t RFCOverrideSearch(const uint32_t *pOverride, const uint32_t pattern, const uint32_t mask, const uint8_t searchDepth); //***************************************************************************** @@ -432,12 +363,34 @@ extern uint8_t RFCOverrideUpdate(rfc_radioOp_t *pOpSetup, uint32_t *pParams); //***************************************************************************** // -//! Get and clear HW interrupt flags +//! Get and clear HW interrupt flags. // //***************************************************************************** -extern uint32_t RFCHWIntGetAndClear(uint32_t ui32Mask); +extern uint32_t RFCHwIntGetAndClear(uint32_t ui32Mask); +//***************************************************************************** +// +//! Get the type of currently selected PA. +// +//***************************************************************************** +__STATIC_INLINE bool +RFCGetPaType(void) +{ + return (bool)(HWREGB(RFC_PA_TYPE_ADDRESS) & RFC_PA_TYPE_MASK); +} + +//***************************************************************************** +// +//! Get the gain of currently selected PA. +// +//***************************************************************************** +__STATIC_INLINE uint32_t +RFCGetPaGain(void) +{ + return (HWREG(RFC_PA_GAIN_ADDRESS) & RFC_PA_GAIN_MASK); +} + //***************************************************************************** // @@ -459,33 +412,21 @@ extern uint32_t RFCHWIntGetAndClear(uint32_t ui32Mask); #undef RFCSynthPowerDown #define RFCSynthPowerDown ROM_RFCSynthPowerDown #endif - #ifdef ROM_RFCRfTrimRead - #undef RFCRfTrimRead - #define RFCRfTrimRead ROM_RFCRfTrimRead + #ifdef ROM_RFCCpePatchReset + #undef RFCCpePatchReset + #define RFCCpePatchReset ROM_RFCCpePatchReset #endif - #ifdef ROM_RFCRfTrimSet - #undef RFCRfTrimSet - #define RFCRfTrimSet ROM_RFCRfTrimSet - #endif - #ifdef ROM_RFCRTrim - #undef RFCRTrim - #define RFCRTrim ROM_RFCRTrim - #endif - #ifdef ROM_RFCCPEPatchReset - #undef RFCCPEPatchReset - #define RFCCPEPatchReset ROM_RFCCPEPatchReset - #endif - #ifdef ROM_RFCAdi3VcoLdoVoltageMode - #undef RFCAdi3VcoLdoVoltageMode - #define RFCAdi3VcoLdoVoltageMode ROM_RFCAdi3VcoLdoVoltageMode + #ifdef ROM_RFCOverrideSearch + #undef RFCOverrideSearch + #define RFCOverrideSearch ROM_RFCOverrideSearch #endif #ifdef ROM_RFCOverrideUpdate #undef RFCOverrideUpdate #define RFCOverrideUpdate ROM_RFCOverrideUpdate #endif - #ifdef ROM_RFCHWIntGetAndClear - #undef RFCHWIntGetAndClear - #define RFCHWIntGetAndClear ROM_RFCHWIntGetAndClear + #ifdef ROM_RFCHwIntGetAndClear + #undef RFCHwIntGetAndClear + #define RFCHwIntGetAndClear ROM_RFCHwIntGetAndClear #endif #endif diff --git a/third_party/ti/devices/cc26x2/driverlib/rom.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rom.h similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/rom.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/rom.h index fcea42e4c..9dd309b6a 100644 --- a/third_party/ti/devices/cc26x2/driverlib/rom.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/rom.h @@ -301,6 +301,10 @@ typedef struct // FLASH FUNCTIONS +#define ROM_FlashPowerModeSet \ + ((void (*)(uint32_t ui32PowerMode, uint32_t ui32BankGracePeriod, uint32_t ui32PumpGracePeriod)) \ + ROM_API_FLASH_TABLE[0]) + #define ROM_FlashPowerModeGet \ ((uint32_t (*)(void)) \ ROM_API_FLASH_TABLE[1]) @@ -803,10 +807,6 @@ typedef struct // SETUP_ROM FUNCTIONS -#define ROM_SetupAfterColdResetWakeupFromShutDownCfg1 \ - ((void (*)(uint32_t ccfg_ModeConfReg)) \ - ROM_API_SETUP_ROM_TABLE[0]) - #define ROM_SetupAfterColdResetWakeupFromShutDownCfg2 \ ((void (*)(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)) \ ROM_API_SETUP_ROM_TABLE[1]) diff --git a/third_party/ti/devices/cc26x2/driverlib/setup.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup.c similarity index 81% rename from third_party/ti/devices/cc26x2/driverlib/setup.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/setup.c index 4b3c0f51e..8752ff3a3 100644 --- a/third_party/ti/devices/cc26x2/driverlib/setup.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: setup.c -* Revised: 2017-05-04 22:07:49 +0200 (Thu, 04 May 2017) -* Revision: 48905 +* Revised: 2018-04-05 13:46:03 +0200 (Thu, 05 Apr 2018) +* Revision: 51853 * * Description: Setup file for CC13xx/CC26xx devices. * @@ -42,6 +42,13 @@ #include "../inc/hw_adi.h" #include "../inc/hw_adi_2_refsys.h" #include "../inc/hw_adi_3_refsys.h" +#include "../inc/hw_adi_4_aux.h" +// Temporarily adding these defines as they are missing in hw_adi_4_aux.h +#define ADI_4_AUX_O_LPMBIAS 0x0000000E +#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M 0x0000003F +#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S 0 +#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M 0x00000038 +#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S 3 #include "../inc/hw_aon_ioc.h" #include "../inc/hw_aon_pmctl.h" #include "../inc/hw_aon_rtc.h" @@ -52,15 +59,10 @@ #include "../inc/hw_prcm.h" #include "../inc/hw_vims.h" // Driverlib headers +#include "aux_sysif.h" #include "chipinfo.h" #include "setup.h" #include "setup_rom.h" -// ##### INCLUDE IN ROM BEGIN ##### -// We need intrinsic functions for IAR (if used in source code) -#ifdef __IAR_SYSTEMS_ICC__ -#include -#endif -// ##### INCLUDE IN ROM END ##### //***************************************************************************** // @@ -119,9 +121,9 @@ SetupTrimDevice(void) ui32Fcfg1Revision = 0; } - // This driverlib version and setup file is for the CC13x2, CC13x4, CC26x2, CC26x4 chips. + // This driverlib version and setup file is for the CC13x2, CC26x2 chips. // Halt if violated - ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated(); + ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated(); // Enable standby in flash bank HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0; @@ -372,36 +374,42 @@ TrimAfterColdResetWakeupFromShutDown(uint32_t ui32Fcfg1Revision) AON_PMCTL_RESETCTL_VDDS_LOSS_EN )); HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait for xxx_LOSS_EN setting to propagate - if(HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL) & - AON_PMCTL_PWRCTL_EXT_REG_MODE) + // The VDDS_BOD trim and the VDDR trim is already stepped up to max/HH if "CC1352 boost mode" is requested. + // See function SetupAfterColdResetWakeupFromShutDownCfg1() in setup_rom.c for details. + if ((( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDR_EXT_LOAD ) != 0 ) || + (( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDS_BOD_LEVEL ) == 0 ) ) { - // Apply VDDS BOD trim value - // Write to register CTLSOCREFSYS1 (addr offset 3) bit[7:3] (TRIMBOD) - // in ADI_3_REFSYS - HWREGH(ADI3_BASE + ADI_O_MASK8B + (ADI_3_REFSYS_O_REFSYSCTL1 << 1)) = - (ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_M << 8) | - (((ui32EfuseData & FCFG1_SHDW_ANA_TRIM_TRIMBOD_EXTMODE_M) >> - FCFG1_SHDW_ANA_TRIM_TRIMBOD_EXTMODE_S) << - ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_S); - } - else - { - // Apply VDDS BOD trim value - // Write to register CTLSOCREFSYS1 (addr offset 3) bit[7:3] (TRIMBOD) - // in ADI_3_REFSYS - HWREGH(ADI3_BASE + ADI_O_MASK8B + (ADI_3_REFSYS_O_REFSYSCTL1 << 1)) = - (ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_M << 8) | - (((ui32EfuseData & FCFG1_SHDW_ANA_TRIM_TRIMBOD_INTMODE_M) >> - FCFG1_SHDW_ANA_TRIM_TRIMBOD_INTMODE_S) << - ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_S); - } - // Load the new VDDS_BOD setting - HWREGB( ADI3_BASE + ADI_3_REFSYS_O_REFSYSCTL3 ) &= ~ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN; // Bit clear by doing a read modify write - HWREGB( ADI3_BASE + ADI_3_REFSYS_O_REFSYSCTL3 ) |= ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN; // Bit set by doing a read modify write + if(HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL) & + AON_PMCTL_PWRCTL_EXT_REG_MODE) + { + // Apply VDDS BOD trim value + // Write to register CTLSOCREFSYS1 (addr offset 3) bit[7:3] (TRIMBOD) + // in ADI_3_REFSYS + HWREGH(ADI3_BASE + ADI_O_MASK8B + (ADI_3_REFSYS_O_REFSYSCTL1 << 1)) = + (ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_M << 8) | + (((ui32EfuseData & FCFG1_SHDW_ANA_TRIM_TRIMBOD_EXTMODE_M) >> + FCFG1_SHDW_ANA_TRIM_TRIMBOD_EXTMODE_S) << + ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_S); + } + else + { + // Apply VDDS BOD trim value + // Write to register CTLSOCREFSYS1 (addr offset 3) bit[7:3] (TRIMBOD) + // in ADI_3_REFSYS + HWREGH(ADI3_BASE + ADI_O_MASK8B + (ADI_3_REFSYS_O_REFSYSCTL1 << 1)) = + (ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_M << 8) | + (((ui32EfuseData & FCFG1_SHDW_ANA_TRIM_TRIMBOD_INTMODE_M) >> + FCFG1_SHDW_ANA_TRIM_TRIMBOD_INTMODE_S) << + ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_S); + } + // Load the new VDDS_BOD setting + HWREGB( ADI3_BASE + ADI_3_REFSYS_O_REFSYSCTL3 ) &= ~ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN; // Bit clear by doing a read modify write + HWREGB( ADI3_BASE + ADI_3_REFSYS_O_REFSYSCTL3 ) |= ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN; // Bit set by doing a read modify write - SetupStepVddrTrimTo(( ui32EfuseData & - FCFG1_SHDW_ANA_TRIM_VDDR_TRIM_M ) >> - FCFG1_SHDW_ANA_TRIM_VDDR_TRIM_S ) ; + SetupStepVddrTrimTo(( ui32EfuseData & + FCFG1_SHDW_ANA_TRIM_VDDR_TRIM_M ) >> + FCFG1_SHDW_ANA_TRIM_VDDR_TRIM_S ) ; + } // VBG (ANA_TRIM[5:0]=TRIMTEMP --> ADI_3_REFSYS:REFSYSCTL3.TRIM_VBG) Step_VBG(((int32_t)( ui32EfuseData << ( 32 - FCFG1_SHDW_ANA_TRIM_TRIMTEMP_W - FCFG1_SHDW_ANA_TRIM_TRIMTEMP_S ))) @@ -414,6 +422,23 @@ TrimAfterColdResetWakeupFromShutDown(uint32_t ui32Fcfg1Revision) HWREG( AON_RTC_BASE + AON_RTC_O_SYNC ); // Wait for xxx_LOSS_EN setting to propagate } + { + uint32_t trimReg ; + uint32_t ui32TrimValue ; + + //--- Propagate the LPM_BIAS trim --- + trimReg = HWREG( FCFG1_BASE + FCFG1_O_DAC_BIAS_CNF ); + ui32TrimValue = (( trimReg & FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_M ) >> + FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_S ) ; + HWREGB( AUX_ADI4_BASE + ADI_4_AUX_O_LPMBIAS ) = (( ui32TrimValue << ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S ) & + ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M ) ; + //--- Set fixed LPM_BIAS values --- LPM_BIAS_BACKUP_EN = 1 and LPM_BIAS_WIDTH_TRIM = 3 + HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN; + HWREGH( AUX_ADI4_BASE + ADI_O_MASK8B + ( ADI_4_AUX_O_COMP * 2 )) = // Set LPM_BIAS_WIDTH_TRIM = 3 + (( ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M << 8 ) | // Set mask (bits to be written) in [15:8] + ( 3 << ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S ) ); // Set value (in correct bit pos) in [7:0] + } + // Third part of trim done after cold reset and wakeup from shutdown: // -Configure HPOSC. // -Setup the LF clock. @@ -423,7 +448,8 @@ TrimAfterColdResetWakeupFromShutDown(uint32_t ui32Fcfg1Revision) NOROM_SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg ); #endif - // TBD-Agama - Temporarily removed for Agama + // Set AUX into power down active mode + AUXSYSIFOpModeChange( AUX_SYSIF_OPMODE_TARGET_PDA ); // Disable EFUSE clock HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_EFUSECLK_BITN ) = 1; diff --git a/third_party/ti/devices/cc26x2/driverlib/setup.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/setup.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/setup.h diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_doc.h new file mode 100644 index 000000000..469279907 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_doc.h @@ -0,0 +1,41 @@ +/****************************************************************************** +* Filename: setup_doc.h +* Revised: 2017-06-05 12:13:49 +0200 (ma, 05 jun 2017) +* Revision: 49096 +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +//! \addtogroup setup_api +//! @{ +//! +//! This module contains functions for device setup which is not done in boot code. +//! +//! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/setup_rom.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom.c similarity index 95% rename from third_party/ti/devices/cc26x2/driverlib/setup_rom.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom.c index 3292c1e52..745204b44 100644 --- a/third_party/ti/devices/cc26x2/driverlib/setup_rom.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: setup_rom.c -* Revised: 2017-05-04 22:39:45 +0200 (Thu, 04 May 2017) -* Revision: 48907 +* Revised: 2017-11-02 11:31:15 +0100 (Thu, 02 Nov 2017) +* Revision: 50143 * * Description: Setup file for CC13xx/CC26xx devices. * @@ -54,12 +54,6 @@ #include "osc.h" #include "sys_ctrl.h" #include "setup_rom.h" -// ##### INCLUDE IN ROM BEGIN ##### -// We need intrinsic functions for IAR (if used in source code) -#ifdef __IAR_SYSTEMS_ICC__ -#include -#endif -// ##### INCLUDE IN ROM END ##### //***************************************************************************** // @@ -172,28 +166,28 @@ SetupStepVddrTrimTo( uint32_t toCode ) void SetupAfterColdResetWakeupFromShutDownCfg1( uint32_t ccfg_ModeConfReg ) { - int32_t i32VddrSleepTrim; - int32_t i32VddrSleepDelta; - + // Check for CC1352 boost mode + // The combination VDDR_EXT_LOAD=0 and VDDS_BOD_LEVEL=1 is defined to select boost mode + if ((( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDR_EXT_LOAD ) == 0 ) && + (( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDS_BOD_LEVEL ) != 0 ) ) { - i32VddrSleepTrim = SetupSignExtendVddrTrimValue(( - HWREG( FCFG1_BASE + FCFG1_O_LDO_TRIM ) & - FCFG1_LDO_TRIM_VDDR_TRIM_SLEEP_M ) >> - FCFG1_LDO_TRIM_VDDR_TRIM_SLEEP_S ) ; - } + // Set VDDS_BOD trim - using masked write {MASK8:DATA8} + // - TRIM_VDDS_BOD is bits[7:3] of ADI3..REFSYSCTL1 + // - Needs a positive transition on BOD_BG_TRIM_EN (bit[7] of REFSYSCTL3) to + // latch new VDDS BOD. Set to 0 first to guarantee a positive transition. + HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_REFSYSCTL3 ) = ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN; + // + // VDDS_BOD_LEVEL = 1 means that boost mode is selected + // - Max out the VDDS_BOD trim (=VDDS_BOD_POS_31) + HWREGH( ADI3_BASE + ADI_O_MASK8B + ( ADI_3_REFSYS_O_REFSYSCTL1 * 2 )) = + ( ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_M << 8 ) | + ( ADI_3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_POS_31 ) ; + HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_REFSYSCTL3 ) = ADI_3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN; - // Adjust the VDDR_TRIM_SLEEP value with value adjustable by customer (CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA) - // Read and sign extend VddrSleepDelta (in range -8 to +7) - i32VddrSleepDelta = - (((int32_t)( ccfg_ModeConfReg << ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S ))) - >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W )); - // Calculate new VDDR sleep trim - i32VddrSleepTrim = ( i32VddrSleepTrim + i32VddrSleepDelta + 1 ); - if ( i32VddrSleepTrim > 21 ) i32VddrSleepTrim = 21; - if ( i32VddrSleepTrim < -10 ) i32VddrSleepTrim = -10; - // Write adjusted value using MASKED write (MASK8) - HWREGH( ADI3_BASE + ADI_O_MASK8B + ( ADI_3_REFSYS_O_DCDCCTL1 * 2 )) = (( ADI_3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_M << 8 ) | - (( i32VddrSleepTrim << ADI_3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_S ) & ADI_3_REFSYS_DCDCCTL1_VDDR_TRIM_SLEEP_M )); + SetupStepVddrTrimTo(( HWREG( FCFG1_BASE + FCFG1_O_VOLT_TRIM ) & + FCFG1_VOLT_TRIM_VDDR_TRIM_HH_M ) >> + FCFG1_VOLT_TRIM_VDDR_TRIM_HH_S ) ; + } // 1. // Do not allow DCDC to be enabled if in external regulator mode. @@ -431,12 +425,6 @@ SetupAfterColdResetWakeupFromShutDownCfg3( uint32_t ccfg_ModeConfReg ) ADI_4_AUX_ADCREF1_VTRIM_S ) & ADI_4_AUX_ADCREF1_VTRIM_M ); - // Set ADI_4_AUX:ADC0.SMPL_CYCLE_EXP to it's default minimum value (=3) - // (Note: Using MASK8B requires that the bits to be modified must be within the same - // byte boundary which is the case for the ADI_4_AUX_ADC0_SMPL_CYCLE_EXP field) - HWREGH( AUX_ADI4_BASE + ADI_O_MASK8B + ( ADI_4_AUX_O_ADC0 * 2 )) = - ( ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M << 8 ) | ( 3 << ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S ); - // Sync with AON SysCtrlAonSync(); } diff --git a/third_party/ti/devices/cc26x2/driverlib/setup_rom.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom.h similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/setup_rom.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom.h index e143def0c..dcc0751ca 100644 --- a/third_party/ti/devices/cc26x2/driverlib/setup_rom.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: setup_rom.h -* Revised: 2017-04-04 12:19:11 +0200 (Tue, 04 Apr 2017) -* Revision: 48771 +* Revised: 2017-09-04 19:00:53 +0200 (Mon, 04 Sep 2017) +* Revision: 49686 * * Description: Prototypes and defines for the setup API. * @@ -40,7 +40,7 @@ // //! \addtogroup system_control_group //! @{ -//! \addtogroup setup_api +//! \addtogroup setup_rom_api //! @{ // //***************************************************************************** diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom_doc.h new file mode 100644 index 000000000..072e4eedf --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/setup_rom_doc.h @@ -0,0 +1,44 @@ +/****************************************************************************** +* Filename: setup_rom_doc.h +* Revised: 2017-06-05 12:13:49 +0200 (ma, 05 jun 2017) +* Revision: 49096 +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +//! \addtogroup setup_rom_api +//! @{ +//! +//! This module contains functions from the Setup API which are likely to be in ROM. +//! +//! \note Do not use functions from this module directly! This module is only to be used by +//! SetupTrimDevice(). +//! +//! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/sha2.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2.c similarity index 79% rename from third_party/ti/devices/cc26x2/driverlib/sha2.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2.c index e38ceb8a8..814e73729 100644 --- a/third_party/ti/devices/cc26x2/driverlib/sha2.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: sha2.c -* Revised: 2017-02-06 19:32:22 +0100 (Mon, 06 Feb 2017) -* Revision: 48408 +* Revised: 2018-04-17 15:57:27 +0200 (Tue, 17 Apr 2018) +* Revision: 51892 * * Description: Driver for the SHA-2 functions of the crypto module * @@ -49,18 +49,19 @@ #define SHA2StartDMAOperation NOROM_SHA2StartDMAOperation #undef SHA2WaitForIRQFlags #define SHA2WaitForIRQFlags NOROM_SHA2WaitForIRQFlags - #undef SHA2GenerateInitialHash - #define SHA2GenerateInitialHash NOROM_SHA2GenerateInitialHash - #undef SHA2GenerateIntermediateHash - #define SHA2GenerateIntermediateHash NOROM_SHA2GenerateIntermediateHash - #undef SHA2GenerateFinalHash - #define SHA2GenerateFinalHash NOROM_SHA2GenerateFinalHash - #undef SHA2GenerateHash - #define SHA2GenerateHash NOROM_SHA2GenerateHash + #undef SHA2ComputeInitialHash + #define SHA2ComputeInitialHash NOROM_SHA2ComputeInitialHash + #undef SHA2ComputeIntermediateHash + #define SHA2ComputeIntermediateHash NOROM_SHA2ComputeIntermediateHash + #undef SHA2ComputeFinalHash + #define SHA2ComputeFinalHash NOROM_SHA2ComputeFinalHash + #undef SHA2ComputeHash + #define SHA2ComputeHash NOROM_SHA2ComputeHash #endif -static uint32_t SHA2ExecuteHash(uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm, bool initialHash, bool finalHash); +static uint32_t SHA2ExecuteHash(const uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t messageLength, uint32_t hashAlgorithm, bool initialHash, bool finalHash); + //***************************************************************************** // @@ -124,40 +125,38 @@ uint32_t SHA2WaitForIRQFlags(uint32_t irqFlags) return irqTrigger; } - //***************************************************************************** // // Start a new SHA-2 hash operation. // //***************************************************************************** -uint32_t SHA2GenerateInitialHash(uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm) +uint32_t SHA2ComputeInitialHash(const uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm, uint32_t initialMessageLength) { ASSERT(message); ASSERT((hashAlgorithm == SHA2_MODE_SELECT_SHA224) || (hashAlgorithm == SHA2_MODE_SELECT_SHA256) || (hashAlgorithm == SHA2_MODE_SELECT_SHA384) || (hashAlgorithm == SHA2_MODE_SELECT_SHA512)); - ASSERT(!(intermediateDigest == NULL) && !(intermediateDigest & 0x03)); + ASSERT(!(intermediateDigest == NULL) && !((uint32_t)intermediateDigest & 0x03)); - return SHA2ExecuteHash(message, (uint8_t *)intermediateDigest, intermediateDigest, 0, hashAlgorithm, true, false); + return SHA2ExecuteHash(message, (uint8_t *)intermediateDigest, intermediateDigest, initialMessageLength, initialMessageLength, hashAlgorithm, true, false); } - //***************************************************************************** // // Start an intermediate SHA-2 hash operation. // //***************************************************************************** -uint32_t SHA2GenerateIntermediateHash(uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm) +uint32_t SHA2ComputeIntermediateHash(const uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm, uint32_t intermediateMessageLength) { ASSERT(message); - ASSERT(!(intermediateDigest == NULL) && !(intermediateDigest & 0x03)); + ASSERT(!(intermediateDigest == NULL) && !((uint32_t)intermediateDigest & 0x03)); ASSERT((hashAlgorithm == SHA2_MODE_SELECT_SHA224) || (hashAlgorithm == SHA2_MODE_SELECT_SHA256) || (hashAlgorithm == SHA2_MODE_SELECT_SHA384) || (hashAlgorithm == SHA2_MODE_SELECT_SHA512)); - return SHA2ExecuteHash(message, (uint8_t *)intermediateDigest, intermediateDigest, 0, hashAlgorithm, false, false); + return SHA2ExecuteHash(message, (uint8_t *)intermediateDigest, intermediateDigest, 0, intermediateMessageLength, hashAlgorithm, false, false); } //***************************************************************************** @@ -165,18 +164,18 @@ uint32_t SHA2GenerateIntermediateHash(uint8_t *message, uint32_t *intermediateDi // Start an intermediate SHA-2 hash operation and finalize it. // //***************************************************************************** -uint32_t SHA2GenerateFinalHash(uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm) +uint32_t SHA2ComputeFinalHash(const uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t messageLength, uint32_t hashAlgorithm) { ASSERT(message); ASSERT(totalMsgLength); - ASSERT(!(intermediateDigest == NULL) && !(intermediateDigest & 0x03)); + ASSERT(!(intermediateDigest == NULL) && !((uint32_t)intermediateDigest & 0x03)); ASSERT(resultDigest); ASSERT((hashAlgorithm == SHA2_MODE_SELECT_SHA224) || (hashAlgorithm == SHA2_MODE_SELECT_SHA256) || (hashAlgorithm == SHA2_MODE_SELECT_SHA384) || (hashAlgorithm == SHA2_MODE_SELECT_SHA512)); - return SHA2ExecuteHash(message, resultDigest, intermediateDigest, totalMsgLength, hashAlgorithm, false, true); + return SHA2ExecuteHash(message, resultDigest, intermediateDigest, totalMsgLength, messageLength, hashAlgorithm, false, true); } //***************************************************************************** @@ -184,7 +183,7 @@ uint32_t SHA2GenerateFinalHash(uint8_t *message, uint8_t *resultDigest, uint32_t // Start and finalize a new SHA-2 hash operation. // //***************************************************************************** -uint32_t SHA2GenerateHash(uint8_t *message, uint8_t *resultDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm) +uint32_t SHA2ComputeHash(const uint8_t *message, uint8_t *resultDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm) { ASSERT(message); ASSERT(totalMsgLength); @@ -194,20 +193,17 @@ uint32_t SHA2GenerateHash(uint8_t *message, uint8_t *resultDigest, uint32_t tota (hashAlgorithm == SHA2_MODE_SELECT_SHA384) || (hashAlgorithm == SHA2_MODE_SELECT_SHA512)); - return SHA2ExecuteHash(message, resultDigest, 0, totalMsgLength, hashAlgorithm, true, true); + return SHA2ExecuteHash(message, resultDigest, 0, totalMsgLength, totalMsgLength, hashAlgorithm, true, true); } - //***************************************************************************** // // Start any SHA-2 hash operation. // //***************************************************************************** -static uint32_t SHA2ExecuteHash(uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm, bool initialHash, bool finalHash) +static uint32_t SHA2ExecuteHash(const uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t messageLength, uint32_t hashAlgorithm, bool initialHash, bool finalHash) { uint8_t digestLength = 0; - uint32_t messageLength = 0; - uint32_t blockLength = 0; uint32_t dmaAlgorithmSelect = 0; SHA2ClearDigestAvailableFlag(); @@ -215,22 +211,18 @@ static uint32_t SHA2ExecuteHash(uint8_t *message, uint8_t *resultDigest, uint32_ switch (hashAlgorithm) { case SHA2_MODE_SELECT_SHA224: digestLength = SHA2_SHA224_DIGEST_LENGTH_BYTES; - blockLength = SHA2_SHA224_BLOCK_SIZE_BYTES; dmaAlgorithmSelect = SHA2_ALGSEL_SHA256; break; case SHA2_MODE_SELECT_SHA256: digestLength = SHA2_SHA256_DIGEST_LENGTH_BYTES; - blockLength = SHA2_SHA256_BLOCK_SIZE_BYTES; dmaAlgorithmSelect = SHA2_ALGSEL_SHA256; break; case SHA2_MODE_SELECT_SHA384: digestLength = SHA2_SHA384_DIGEST_LENGTH_BYTES; - blockLength = SHA2_SHA384_BLOCK_SIZE_BYTES; dmaAlgorithmSelect = SHA2_ALGSEL_SHA512; break; case SHA2_MODE_SELECT_SHA512: digestLength = SHA2_SHA512_DIGEST_LENGTH_BYTES; - blockLength = SHA2_SHA512_BLOCK_SIZE_BYTES; dmaAlgorithmSelect = SHA2_ALGSEL_SHA512; break; default: @@ -246,19 +238,8 @@ static uint32_t SHA2ExecuteHash(uint8_t *message, uint8_t *resultDigest, uint32_ // Altering totalMsgLength would alter the final hash digest. // Because totalMsgLength specifies that the message is of length 0, the content of the byte loaded // through the DMA is irrelevant. It is overwritten internally in the hash engine. - messageLength = totalMsgLength ? totalMsgLength : 1; - } - else if (finalHash) { - messageLength = totalMsgLength % blockLength; - // If we are hashing block-wise and the totalMsgLength is a multiple of - // of the hash block length, the last hash must be the last block of the - // data rather than doing an intermediate hash followed by a finalized - // hash on the empty string. messageLength = messageLength ? messageLength : 1; } - else { - messageLength = blockLength; - } // Setting the incorrect number of bits here leads to the calculation of the correct result // but a failure to read them out. @@ -283,7 +264,9 @@ static uint32_t SHA2ExecuteHash(uint8_t *message, uint8_t *resultDigest, uint32_ } - SHA2StartDMAOperation(message, messageLength, resultDigest, digestLength); + // The cast is fine in this case. SHA2StartDMAOperation channel one serves as input and no one does + // hash operations in-place. + SHA2StartDMAOperation((uint8_t *)message, messageLength, resultDigest, digestLength); return SHA2_SUCCESS; } diff --git a/third_party/ti/devices/cc26x2/driverlib/sha2.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2.h similarity index 88% rename from third_party/ti/devices/cc26x2/driverlib/sha2.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2.h index 52c932bdf..4910222cc 100644 --- a/third_party/ti/devices/cc26x2/driverlib/sha2.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: sha2.h -* Revised: 2017-03-07 10:12:50 +0100 (Tue, 07 Mar 2017) -* Revision: 48576 +* Revised: 2018-04-17 16:04:03 +0200 (Tue, 17 Apr 2018) +* Revision: 51893 * * Description: SHA-2 header file. * @@ -61,6 +61,7 @@ extern "C" #include #include +#include #include "../inc/hw_types.h" #include "../inc/hw_memmap.h" #include "../inc/hw_ints.h" @@ -86,10 +87,10 @@ extern "C" #if !defined(DOXYGEN) #define SHA2StartDMAOperation NOROM_SHA2StartDMAOperation #define SHA2WaitForIRQFlags NOROM_SHA2WaitForIRQFlags - #define SHA2GenerateInitialHash NOROM_SHA2GenerateInitialHash - #define SHA2GenerateIntermediateHash NOROM_SHA2GenerateIntermediateHash - #define SHA2GenerateFinalHash NOROM_SHA2GenerateFinalHash - #define SHA2GenerateHash NOROM_SHA2GenerateHash + #define SHA2ComputeInitialHash NOROM_SHA2ComputeInitialHash + #define SHA2ComputeIntermediateHash NOROM_SHA2ComputeIntermediateHash + #define SHA2ComputeFinalHash NOROM_SHA2ComputeFinalHash + #define SHA2ComputeHash NOROM_SHA2ComputeHash #endif //***************************************************************************** @@ -146,8 +147,8 @@ extern "C" #define SHA2_DMA_PORT_ERROR (CRYPTO_DMASTAT_PORT_ERR_M) // Crypto module DMA operation types -#define SHA2_ALGSEL_SHA256 0x04; -#define SHA2_ALGSEL_SHA512 0x08; +#define SHA2_ALGSEL_SHA256 0x04 +#define SHA2_ALGSEL_SHA512 0x08 #define SHA2_ALGSEL_TAG (CRYPTO_ALGSEL_TAG_M) @@ -224,12 +225,12 @@ extern uint32_t SHA2WaitForIRQFlags(uint32_t irqFlags); //! Call this function when starting a new hash operation and the //! entire message is not yet available. //! -//! Call SHA2GenerateIntermediateHash() or SHA2GenerateFinalHash() +//! Call SHA2ComputeIntermediateHash() or SHA2ComputeFinalHash() //! after this call. //! //! If the device shall go into standby in between calls to this -//! function and either SHA2GenerateIntermediateHash() or -//! SHA2GenerateFinalHash(), the intermediate digest must be saved in +//! function and either SHA2ComputeIntermediateHash() or +//! SHA2ComputeFinalHash(), the intermediate digest must be saved in //! system RAM. //! //! \param [in] message @@ -252,7 +253,7 @@ extern uint32_t SHA2WaitForIRQFlags(uint32_t irqFlags); //! hash algorithm. //! Must be 32-bit aligned. \c intermediateDigest is copied into the //! registers through the AHB slave interface in -//! SHA2GenerateIntermediateHash() and SHA2GenerateFinalHash(). +//! SHA2ComputeIntermediateHash() and SHA2ComputeFinalHash(). //! This can only be done word-by-word. //! //! \param [in] hashAlgorithm Selects the hash algorithm to use. One of: @@ -261,15 +262,19 @@ extern uint32_t SHA2WaitForIRQFlags(uint32_t irqFlags); //! - \ref SHA2_MODE_SELECT_SHA384 //! - \ref SHA2_MODE_SELECT_SHA512 //! +//! \param [in] initialMessageLength The length in bytes of the first +//! section of the message to process. Must be a multiple of the +//! block size. +//! //! \return Returns a SHA-2 return code. //! - \ref SHA2_SUCCESS //! - \ref SHA2_INVALID_ALGORITHM //! -//! \sa SHA2GenerateIntermediateHash() -//! \sa SHA2GenerateFinalHash() +//! \sa SHA2ComputeIntermediateHash() +//! \sa SHA2ComputeFinalHash() // //***************************************************************************** -extern uint32_t SHA2GenerateInitialHash(uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm); +extern uint32_t SHA2ComputeInitialHash(const uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm, uint32_t initialMessageLength); //***************************************************************************** // @@ -280,11 +285,11 @@ extern uint32_t SHA2GenerateInitialHash(uint8_t *message, uint32_t *intermediate //! Call this function when continuing a hash operation and the //! message is not yet complete. //! -//! Call this function again or SHA2GenerateFinalHash() +//! Call this function again or SHA2ComputeFinalHash() //! after this call. //! //! If the device shall go into standby in between calls to this -//! function and SHA2GenerateFinalHash(), the intermediate +//! function and SHA2ComputeFinalHash(), the intermediate //! digest must be saved in system RAM. //! //! \param [in] message @@ -317,15 +322,19 @@ extern uint32_t SHA2GenerateInitialHash(uint8_t *message, uint32_t *intermediate //! - \ref SHA2_MODE_SELECT_SHA384 //! - \ref SHA2_MODE_SELECT_SHA512 //! +//! \param [in] intermediateMessageLength The length in bytes of this +//! section of the message to process. Must be a multiple of the +//! block size. +//! //! \return Returns a SHA-2 return code. //! - \ref SHA2_SUCCESS //! - \ref SHA2_INVALID_ALGORITHM //! -//! \sa SHA2GenerateInitialHash() -//! \sa SHA2GenerateFinalHash() +//! \sa SHA2ComputeInitialHash() +//! \sa SHA2ComputeFinalHash() // //***************************************************************************** -extern uint32_t SHA2GenerateIntermediateHash(uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm); +extern uint32_t SHA2ComputeIntermediateHash(const uint8_t *message, uint32_t *intermediateDigest, uint32_t hashAlgorithm, uint32_t intermediateMessageLength); //***************************************************************************** // @@ -363,8 +372,12 @@ extern uint32_t SHA2GenerateIntermediateHash(uint8_t *message, uint32_t *interme //! //! \param [in] totalMsgLength //! The length in bytes of the entire \c message including the sections -//! passed to previous calls to SHA2GenerateInitialHash() and -//! SHA2GenerateIntermediateHash(). +//! passed to previous calls to SHA2ComputeInitialHash() and +//! SHA2ComputeIntermediateHash(). +//! +//! \param [in] messageLength The length in bytes of the last +//! section of the message to process. Does not need to be +//! a multiple of the block size. //! //! \param [in] hashAlgorithm Selects the hash algorithm to use. One of: //! - \ref SHA2_MODE_SELECT_SHA224 @@ -376,11 +389,11 @@ extern uint32_t SHA2GenerateIntermediateHash(uint8_t *message, uint32_t *interme //! - \ref SHA2_SUCCESS //! - \ref SHA2_INVALID_ALGORITHM //! -//! \sa SHA2GenerateInitialHash() -//! \sa SHA2GenerateIntermediateHash() +//! \sa SHA2ComputeInitialHash() +//! \sa SHA2ComputeIntermediateHash() // //***************************************************************************** -extern uint32_t SHA2GenerateFinalHash(uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm); +extern uint32_t SHA2ComputeFinalHash(const uint8_t *message, uint8_t *resultDigest, uint32_t *intermediateDigest, uint32_t totalMsgLength, uint32_t messageLength, uint32_t hashAlgorithm); //***************************************************************************** // @@ -420,7 +433,7 @@ extern uint32_t SHA2GenerateFinalHash(uint8_t *message, uint8_t *resultDigest, u //! // //***************************************************************************** -extern uint32_t SHA2GenerateHash(uint8_t *message, uint8_t *resultDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm); +extern uint32_t SHA2ComputeHash(const uint8_t *message, uint8_t *resultDigest, uint32_t totalMsgLength, uint32_t hashAlgorithm); //***************************************************************************** // @@ -493,7 +506,7 @@ __STATIC_INLINE void SHA2SetMessageLength(uint32_t length) __STATIC_INLINE void SHA2SetDigest(uint32_t *digest, uint8_t digestLength) { // Check the arguments. - ASSERT(!(intermediateDigest == NULL) && !(intermediateDigest & 0x03)); + ASSERT(!(digest == NULL) && !((uint32_t)digest & 0x03)); ASSERT((digestLength == SHA2_SHA224_DIGEST_LENGTH_BYTES) || (digestLength == SHA2_SHA256_DIGEST_LENGTH_BYTES) || (digestLength == SHA2_SHA384_DIGEST_LENGTH_BYTES) || @@ -520,7 +533,7 @@ __STATIC_INLINE void SHA2SetDigest(uint32_t *digest, uint8_t digestLength) //! \param [out] digest //! Pointer to an intermediate digest. Must be 32-bit aligned. //! -//! \return REturns a status code. +//! \return Returns a status code. //! - \ref SHA2_OLD_DIGEST_NOT_READ //! - \ref SHA2_SUCCESS // @@ -528,7 +541,7 @@ __STATIC_INLINE void SHA2SetDigest(uint32_t *digest, uint8_t digestLength) __STATIC_INLINE uint32_t SHA2GetDigest(uint32_t *digest, uint8_t digestLength) { // Check the arguments. - ASSERT(!(intermediateDigest == NULL) && !(intermediateDigest & 0x03)); + ASSERT(!(digest == NULL) && !((uint32_t)digest & 0x03)); ASSERT((digestLength == SHA2_SHA224_DIGEST_LENGTH_BYTES) || (digestLength == SHA2_SHA256_DIGEST_LENGTH_BYTES) || (digestLength == SHA2_SHA384_DIGEST_LENGTH_BYTES) || @@ -683,12 +696,15 @@ __STATIC_INLINE void SHA2IntClear(uint32_t intFlags) //***************************************************************************** // -//! \brief Register an interrupt handler for a crypto interrupt. +//! \brief Register an interrupt handler for a crypto interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! crypto interrupts must be enabled via \ref SHA2IntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific crypto interrupts must be enabled via \ref SHA2IntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. //! //! \param handlerFxn is a pointer to the function to be called when the //! crypto interrupt occurs. @@ -710,7 +726,7 @@ __STATIC_INLINE void SHA2IntRegister(void (*handlerFxn)(void)) //***************************************************************************** // -//! \brief Unregister an interrupt handler for a crypto interrupt. +//! \brief Unregister an interrupt handler for a crypto interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler called when a crypto interrupt occurs. This @@ -748,21 +764,21 @@ __STATIC_INLINE void SHA2IntUnregister(void) #undef SHA2WaitForIRQFlags #define SHA2WaitForIRQFlags ROM_SHA2WaitForIRQFlags #endif - #ifdef ROM_SHA2GenerateInitialHash - #undef SHA2GenerateInitialHash - #define SHA2GenerateInitialHash ROM_SHA2GenerateInitialHash + #ifdef ROM_SHA2ComputeInitialHash + #undef SHA2ComputeInitialHash + #define SHA2ComputeInitialHash ROM_SHA2ComputeInitialHash #endif - #ifdef ROM_SHA2GenerateIntermediateHash - #undef SHA2GenerateIntermediateHash - #define SHA2GenerateIntermediateHash ROM_SHA2GenerateIntermediateHash + #ifdef ROM_SHA2ComputeIntermediateHash + #undef SHA2ComputeIntermediateHash + #define SHA2ComputeIntermediateHash ROM_SHA2ComputeIntermediateHash #endif - #ifdef ROM_SHA2GenerateFinalHash - #undef SHA2GenerateFinalHash - #define SHA2GenerateFinalHash ROM_SHA2GenerateFinalHash + #ifdef ROM_SHA2ComputeFinalHash + #undef SHA2ComputeFinalHash + #define SHA2ComputeFinalHash ROM_SHA2ComputeFinalHash #endif - #ifdef ROM_SHA2GenerateHash - #undef SHA2GenerateHash - #define SHA2GenerateHash ROM_SHA2GenerateHash + #ifdef ROM_SHA2ComputeHash + #undef SHA2ComputeHash + #define SHA2ComputeHash ROM_SHA2ComputeHash #endif #endif diff --git a/third_party/ti/devices/cc26x2/driverlib/sha2_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2_doc.h similarity index 94% rename from third_party/ti/devices/cc26x2/driverlib/sha2_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2_doc.h index fffb511da..2ca7c754d 100644 --- a/third_party/ti/devices/cc26x2/driverlib/sha2_doc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sha2_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: sha2_doc.h -* Revised: 2017-02-06 19:32:22 +0100 (Mon, 06 Feb 2017) -* Revision: 48408 +* Revised: 2017-11-01 10:33:37 +0100 (Wed, 01 Nov 2017) +* Revision: 50125 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -49,7 +49,7 @@ //! - 512 bits //! //! Messages are hashed in one go or in multiple steps. Stepwise hashing -//! consists of an initial hash, multiple intermediary hashes, and a +//! consists of an initial hash, multiple intermediate hashes, and a //! finalization hash. //! //! The crypto core does not have retention and all configuration settings diff --git a/third_party/ti/devices/cc26x2/driverlib/smph.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/smph.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/smph.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/smph.c diff --git a/third_party/ti/devices/cc26x2/driverlib/smph.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/smph.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/smph.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/smph.h diff --git a/third_party/ti/devices/cc26x2/driverlib/smph_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/smph_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/smph_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/smph_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/ssi.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ssi.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/ssi.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ssi.c diff --git a/third_party/ti/devices/cc26x2/driverlib/ssi.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ssi.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/ssi.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/ssi.h index ef38b30b1..21eacf8a6 100644 --- a/third_party/ti/devices/cc26x2/driverlib/ssi.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/ssi.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: ssi.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and macros for the SSI. * @@ -412,11 +412,14 @@ SSIStatus(uint32_t ui32Base) //***************************************************************************** // -//! \brief Registers an interrupt handler for the synchronous serial port. +//! \brief Registers an interrupt handler for the Synchronous Serial Interface in the dynamic interrupt table. //! -//! This sets the handler to be called when an SSI interrupt -//! occurs. This will enable the global interrupt in the interrupt controller; -//! specific SSI interrupts must be enabled via \ref SSIIntEnable(). If necessary, +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific SSI interrupts must be enabled via \ref SSIIntEnable(). If necessary, //! it is the interrupt handler's responsibility to clear the interrupt source //! via \ref SSIIntClear(). //! @@ -434,7 +437,7 @@ extern void SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the synchronous serial port. +//! \brief Unregisters an interrupt handler for the Synchronous Serial Interface in the dynamic interrupt table. //! //! This function will clear the handler to be called when a SSI //! interrupt occurs. This will also mask off the interrupt in the interrupt diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_chacha.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_chacha.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_chacha.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_chacha.c diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-config.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-config.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-config.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-config.h diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-machine.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-machine.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-machine.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-machine.h diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-portable.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-portable.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-portable.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-portable.h diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-sync.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-sync.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_ecrypt-sync.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_ecrypt-sync.h diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_poly1305-donna-32.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_poly1305-donna-32.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_poly1305-donna-32.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_poly1305-donna-32.h diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_poly1305-donna.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_poly1305-donna.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_poly1305-donna.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_poly1305-donna.c diff --git a/third_party/ti/devices/cc26x2/driverlib/sw_poly1305-donna.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_poly1305-donna.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/sw_poly1305-donna.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sw_poly1305-donna.h diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/sys_ctrl.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sys_ctrl.c new file mode 100644 index 000000000..3cfefa8c6 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sys_ctrl.c @@ -0,0 +1,380 @@ +/****************************************************************************** +* Filename: sys_ctrl.c +* Revised: 2017-11-07 11:56:04 +0100 (Tue, 07 Nov 2017) +* Revision: 50203 +* +* Description: Driver for the System Control. +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +// Hardware headers +#include "../inc/hw_types.h" +#include "../inc/hw_ccfg.h" +#include "../inc/hw_ioc.h" +// Driverlib headers +#include "aon_batmon.h" +#include "flash.h" +#include "gpio.h" +#include "setup_rom.h" +#include "sys_ctrl.h" + + +//***************************************************************************** +// +// Handle support for DriverLib in ROM: +// This section will undo prototype renaming made in the header file +// +//***************************************************************************** +#if !defined(DOXYGEN) + #undef SysCtrlIdle + #define SysCtrlIdle NOROM_SysCtrlIdle + #undef SysCtrlShutdownWithAbort + #define SysCtrlShutdownWithAbort NOROM_SysCtrlShutdownWithAbort + #undef SysCtrlShutdown + #define SysCtrlShutdown NOROM_SysCtrlShutdown + #undef SysCtrlStandby + #define SysCtrlStandby NOROM_SysCtrlStandby + #undef SysCtrlSetRechargeBeforePowerDown + #define SysCtrlSetRechargeBeforePowerDown NOROM_SysCtrlSetRechargeBeforePowerDown + #undef SysCtrlAdjustRechargeAfterPowerDown + #define SysCtrlAdjustRechargeAfterPowerDown NOROM_SysCtrlAdjustRechargeAfterPowerDown + #undef SysCtrl_DCDC_VoltageConditionalControl + #define SysCtrl_DCDC_VoltageConditionalControl NOROM_SysCtrl_DCDC_VoltageConditionalControl + #undef SysCtrlResetSourceGet + #define SysCtrlResetSourceGet NOROM_SysCtrlResetSourceGet +#endif + + + +//***************************************************************************** +// +// Force the system in to idle mode +// +//***************************************************************************** +void SysCtrlIdle(uint32_t vimsPdMode) +{ + // Configure the VIMS mode + HWREG(PRCM_BASE + PRCM_O_PDCTL1VIMS) = vimsPdMode; + + // Always keep cache retention ON in IDLE + PRCMCacheRetentionEnable(); + + // Turn off the CPU power domain, will take effect when PRCMDeepSleep() executes + PRCMPowerDomainOff(PRCM_DOMAIN_CPU); + + // Ensure any possible outstanding AON writes complete + SysCtrlAonSync(); + + // Invoke deep sleep to go to IDLE + PRCMDeepSleep(); +} + +//***************************************************************************** +// +// Try to enter shutdown but abort if wakeup event happened before shutdown +// +//***************************************************************************** +void SysCtrlShutdownWithAbort(void) +{ + uint32_t wu_detect_vector = 0; + uint32_t io_num = 0; + + // For all IO CFG registers check if wakeup detect is enabled + for(io_num = 0; io_num < 32; io_num++) + { + // Read MSB from WU_CFG bit field + if( HWREG(IOC_BASE + IOC_O_IOCFG0 + (io_num * 4) ) & (1 << (IOC_IOCFG0_WU_CFG_S + IOC_IOCFG0_WU_CFG_W - 1)) ) + { + wu_detect_vector |= (1 << io_num); + } + } + + // Wakeup events are detected when pads are in sleep mode + PowerCtrlPadSleepEnable(); + + // Make sure all potential events have propagated before checking event flags + SysCtrlAonUpdate(); + SysCtrlAonUpdate(); + + // If no edge detect flags for wakeup enabled IOs are set then shut down the device + if( GPIO_getEventMultiDio(wu_detect_vector) == 0 ) + { + SysCtrlShutdown(); + } + else + { + PowerCtrlPadSleepDisable(); + } +} + +//***************************************************************************** +// +// Force the system into shutdown mode +// +//***************************************************************************** +void SysCtrlShutdown(void) +{ + // Request shutdown mode + HWREG(AON_PMCTL_BASE + AON_PMCTL_O_SHUTDOWN) = AON_PMCTL_SHUTDOWN_EN; + + // Make sure System CPU does not continue beyond this point. + // Shutdown happens when all shutdown conditions are met. + while(1); +} + +//***************************************************************************** +// +// Force the system in to standby mode +// +//***************************************************************************** +void SysCtrlStandby(bool retainCache, uint32_t vimsPdMode, uint32_t rechargeMode) +{ + uint32_t modeVIMS; + + // Freeze the IOs on the boundary between MCU and AON + AONIOCFreezeEnable(); + + // Ensure any possible outstanding AON writes complete before turning off the power domains + SysCtrlAonSync(); + + // Request power off of domains in the MCU voltage domain + PRCMPowerDomainOff(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_SERIAL | PRCM_DOMAIN_PERIPH | PRCM_DOMAIN_CPU); + + // Ensure that no clocks are forced on in any modes for Crypto, DMA and I2S + HWREG(PRCM_BASE + PRCM_O_SECDMACLKGR) &= (~PRCM_SECDMACLKGR_CRYPTO_AM_CLK_EN & ~PRCM_SECDMACLKGR_DMA_AM_CLK_EN); + HWREG(PRCM_BASE + PRCM_O_I2SCLKGR) &= ~PRCM_I2SCLKGR_AM_CLK_EN; + + // Gate running deep sleep clocks for Crypto, DMA and I2S + PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO); + PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UDMA); + PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_I2S); + + // Load the new clock settings + PRCMLoadSet(); + + // Configure the VIMS power domain mode + HWREG(PRCM_BASE + PRCM_O_PDCTL1VIMS) = vimsPdMode; + + // Request uLDO during standby + PRCMMcuUldoConfigure(1); + + // Check the regulator mode + if (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL) & AON_PMCTL_PWRCTL_EXT_REG_MODE) + { + // In external regulator mode the recharge functionality is disabled + HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RECHARGECFG) = 0x00000000; + } + else + { + // In internal regulator mode the recharge functionality is set up with + // adaptive recharge mode and fixed parameter values + if(rechargeMode == SYSCTRL_PREFERRED_RECHARGE_MODE) + { + if (( HWREG( FCFG1_BASE + FCFG1_O_TFW_FT ) % 10000 ) >= 683 ) { + // Enable the Recharge Comparator + HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RECHARGECFG) = AON_PMCTL_RECHARGECFG_MODE_COMPARATOR; + } else { + // Set conservative recharge mode + HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RECHARGECFG) = 0x80A4E708; + } + } + else + { + // Set requested recharge mode + HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RECHARGECFG) = rechargeMode; + } + } + + // Ensure all writes have taken effect + SysCtrlAonSync(); + + // Ensure UDMA, Crypto and I2C clocks are turned off + while (!PRCMLoadGet()) {;} + + // Ensure power domains have been turned off. + // CPU power domain will power down when PRCMDeepSleep() executes. + while (PRCMPowerDomainStatus(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_SERIAL | PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_OFF) {;} + + // Turn off cache retention if requested + if (retainCache == false) { + + // Get the current VIMS mode + do { + modeVIMS = VIMSModeGet(VIMS_BASE); + } while (modeVIMS == VIMS_MODE_CHANGING); + + // If in a cache mode, turn VIMS off + if (modeVIMS == VIMS_MODE_ENABLED) { + VIMSModeSet(VIMS_BASE, VIMS_MODE_OFF); + } + + // Disable retention of cache RAM + PRCMCacheRetentionDisable(); + } + + // Invoke deep sleep to go to STANDBY + PRCMDeepSleep(); +} + +//***************************************************************************** +// +// SysCtrlSetRechargeBeforePowerDown( xoscPowerMode ) +// +//***************************************************************************** +void +SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ) +{ + uint32_t ccfg_ModeConfReg ; + + // read the MODE_CONF register in CCFG + ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF ); + // Do temperature compensation if enabled + if (( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC ) == 0 ) { + int32_t vddrSleepDelta ; + int32_t curTemp ; + int32_t tcDelta ; + int32_t vddrSleepTrim ; + + // Get VDDR_TRIM_SLEEP_DELTA + 1 (sign extended) ==> vddrSleepDelta = -7..+8 + vddrSleepDelta = (((int32_t)( ccfg_ModeConfReg << ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S ))) + >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W )) + 1 ; + curTemp = AONBatMonTemperatureGetDegC(); + tcDelta = ( 62 - curTemp ) >> 3; + if ( tcDelta > 7 ) { + tcDelta = 7 ; + } + if ( tcDelta > vddrSleepDelta ) { + vddrSleepDelta = tcDelta ; + } + vddrSleepTrim = (( HWREG( FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_MISC_TRIM ) & FCFG1_MISC_TRIM_TRIM_RECHARGE_COMP_REFLEVEL_M ) >> + FCFG1_MISC_TRIM_TRIM_RECHARGE_COMP_REFLEVEL_S ) ; + vddrSleepTrim -= vddrSleepDelta ; + if ( vddrSleepTrim > 15 ) vddrSleepTrim = 15 ; + if ( vddrSleepTrim < 1 ) vddrSleepTrim = 1 ; + // Write adjusted value using MASKED write (MASK8) + HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_CTL_RECHARGE_CMP0 * 2 )) = (( ADI_3_REFSYS_CTL_RECHARGE_CMP0_TRIM_RECHARGE_COMP_REFLEVEL_M << 4 ) | + (( vddrSleepTrim << ADI_3_REFSYS_CTL_RECHARGE_CMP0_TRIM_RECHARGE_COMP_REFLEVEL_S ) & ADI_3_REFSYS_CTL_RECHARGE_CMP0_TRIM_RECHARGE_COMP_REFLEVEL_M ) ); + // Make a dummy read in order to make sure the write above is done before going into standby + HWREGB( ADI3_BASE + ADI_3_REFSYS_O_CTL_RECHARGE_CMP0 ); + } +} + + +//***************************************************************************** +// +// SysCtrlAdjustRechargeAfterPowerDown() +// +//***************************************************************************** +void +SysCtrlAdjustRechargeAfterPowerDown( uint32_t vddrRechargeMargin ) +{ + // Nothing to be done but keeping this function for platform compatibility. +} + + +//***************************************************************************** +// +// SysCtrl_DCDC_VoltageConditionalControl() +// +//***************************************************************************** +void +SysCtrl_DCDC_VoltageConditionalControl( void ) +{ + uint32_t batThreshold ; // Fractional format with 8 fractional bits. + uint32_t aonBatmonBat ; // Fractional format with 8 fractional bits. + uint32_t ccfg_ModeConfReg ; // Holds a copy of the CCFG_O_MODE_CONF register. + uint32_t aonPmctlPwrctl ; // Reflect whats read/written to the AON_PMCTL_O_PWRCTL register. + + // We could potentially call this function before any battery voltage measurement + // is made/available. In that case we must make sure that we do not turn off the DCDC. + // This can be done by doing nothing as long as the battery voltage is 0 (Since the + // reset value of the battery voltage register is 0). + aonBatmonBat = HWREG( AON_BATMON_BASE + AON_BATMON_O_BAT ); + if ( aonBatmonBat != 0 ) { + // Check if Voltage Conditional Control is enabled + // It is enabled if all the following are true: + // - DCDC in use (either in active or recharge mode), (in use if one of the corresponding CCFG bits are zero). + // - Alternative DCDC settings are enabled ( DIS_ALT_DCDC_SETTING == 0 ) + // - Not in external regulator mode ( EXT_REG_MODE == 0 ) + ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF ); + + if (((( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_RECHARGE_M ) == 0 ) || + (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_ACTIVE_M ) == 0 ) ) && + (( HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) & AON_PMCTL_PWRCTL_EXT_REG_MODE ) == 0 ) && + (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING ) == 0 ) ) + { + aonPmctlPwrctl = HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ); + batThreshold = (((( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) & + CCFG_MODE_CONF_1_ALT_DCDC_VMIN_M ) >> + CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S ) + 28 ) << 4 ); + + if ( aonPmctlPwrctl & ( AON_PMCTL_PWRCTL_DCDC_EN_M | AON_PMCTL_PWRCTL_DCDC_ACTIVE_M )) { + // DCDC is ON, check if it should be switched off + if ( aonBatmonBat < batThreshold ) { + aonPmctlPwrctl &= ~( AON_PMCTL_PWRCTL_DCDC_EN_M | AON_PMCTL_PWRCTL_DCDC_ACTIVE_M ); + + HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) = aonPmctlPwrctl; + } + } else { + // DCDC is OFF, check if it should be switched on + if ( aonBatmonBat > batThreshold ) { + if (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_RECHARGE_M ) == 0 ) aonPmctlPwrctl |= AON_PMCTL_PWRCTL_DCDC_EN_M ; + if (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_ACTIVE_M ) == 0 ) aonPmctlPwrctl |= AON_PMCTL_PWRCTL_DCDC_ACTIVE_M ; + + HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) = aonPmctlPwrctl; + } + } + } + } +} + + +//***************************************************************************** +// +// SysCtrlResetSourceGet() +// +//***************************************************************************** +uint32_t +SysCtrlResetSourceGet( void ) +{ + uint32_t aonPmctlResetCtl = HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ); + + if ( aonPmctlResetCtl & AON_PMCTL_RESETCTL_WU_FROM_SD_M ) { + if ( aonPmctlResetCtl & AON_PMCTL_RESETCTL_GPIO_WU_FROM_SD_M ) { + return ( RSTSRC_WAKEUP_FROM_SHUTDOWN ); + } else { + return ( RSTSRC_WAKEUP_FROM_TCK_NOISE ); + } + } else { + return (( aonPmctlResetCtl & AON_PMCTL_RESETCTL_RESET_SRC_M ) >> AON_PMCTL_RESETCTL_RESET_SRC_S ); + } +} diff --git a/third_party/ti/devices/cc26x2/driverlib/sys_ctrl.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sys_ctrl.h similarity index 55% rename from third_party/ti/devices/cc26x2/driverlib/sys_ctrl.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/sys_ctrl.h index 513d7295c..4742ba8d1 100644 --- a/third_party/ti/devices/cc26x2/driverlib/sys_ctrl.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/sys_ctrl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: sys_ctrl.h -* Revised: 2017-01-31 10:31:33 +0100 (Tue, 31 Jan 2017) -* Revision: 48347 +* Revised: 2017-11-07 11:56:04 +0100 (Tue, 07 Nov 2017) +* Revision: 50203 * * Description: Defines and prototypes for the System Controller. * @@ -99,6 +99,10 @@ extern "C" // //***************************************************************************** #if !defined(DOXYGEN) + #define SysCtrlIdle NOROM_SysCtrlIdle + #define SysCtrlShutdownWithAbort NOROM_SysCtrlShutdownWithAbort + #define SysCtrlShutdown NOROM_SysCtrlShutdown + #define SysCtrlStandby NOROM_SysCtrlStandby #define SysCtrlSetRechargeBeforePowerDown NOROM_SysCtrlSetRechargeBeforePowerDown #define SysCtrlAdjustRechargeAfterPowerDown NOROM_SysCtrlAdjustRechargeAfterPowerDown #define SysCtrl_DCDC_VoltageConditionalControl NOROM_SysCtrl_DCDC_VoltageConditionalControl @@ -130,12 +134,172 @@ extern "C" #define XOSC_IN_HIGH_POWER_MODE 0 // When xosc_hf is in HIGH_POWER_XOSC #define XOSC_IN_LOW_POWER_MODE 1 // When xosc_hf is in LOW_POWER_XOSC +//***************************************************************************** +// +// Defines for the vimsPdMode parameter of SysCtrlIdle and SysCtrlStandby +// +//***************************************************************************** +#define VIMS_ON_CPU_ON_MODE 0 // VIMS power domain is only powered when CPU power domain is powered +#define VIMS_ON_BUS_ON_MODE 1 // VIMS power domain is powered whenever the BUS power domain is powered +#define VIMS_NO_PWR_UP_MODE 2 // VIMS power domain is not powered up at next wakeup. + +//***************************************************************************** +// +// Defines for the rechargeMode parameter of SysCtrlStandby +// +//***************************************************************************** +#define SYSCTRL_PREFERRED_RECHARGE_MODE \ + 0xFFFFFFFF // Preferred recharge mode + //***************************************************************************** // // API Functions and prototypes // //***************************************************************************** +//***************************************************************************** +// +//! \brief Force the system into idle mode. +//! +//! This function forces the system into IDLE mode by configuring the requested +//! VIMS mode, enabling cache retention and powering off the CPU power domain. +//! +//! \param vimsPdMode selects the requested VIMS power domain mode +//! The parameter must be one of the following: +//! - \ref VIMS_ON_CPU_ON_MODE +//! - \ref VIMS_ON_BUS_ON_MODE +//! - \ref VIMS_NO_PWR_UP_MODE +//! +//! \return None +// +//***************************************************************************** +extern void SysCtrlIdle(uint32_t vimsPdMode); + +//***************************************************************************** +// +//! \brief Try to enter shutdown but abort if wakeup event happened before shutdown. +//! +//! This function puts the device in shutdown state if no wakeup events are +//! detected before shutdown. +//! +//! Compared to the basic \ref SysCtrlShutdown() function this function makes sure +//! that wakeup events that happen before actual shutdown are also detected. This +//! function either enters shutdown with a guaranteed wakeup detection or returns +//! to the caller function due to a pre-shutdown wakeup event. +//! +//! See \ref SysCtrlShutdown() for basic information about how to configure the device before +//! shutdown and how to wakeup from shutdown. +//! +//! This function uses IO edge detection in addition to the mandatory wakeup configuration. +//! Additional requirements to the application for this function are: +//! - \b Before : +//! - When the application configures an IO for wakeup (see \ref IOCIOShutdownSet()) +//! the application must also configure the same IO for edge detection +//! (see \ref IOCIOIntSet()). +//! - Edge detection must use the same polarity as the wakeup configuration. +//! - Application must enable peripheral power domain (see \ref PRCMPowerDomainOn()) +//! and enable GPIO module in the peripheral power domain (see \ref PRCMPeripheralRunEnable()). +//! - \b After : +//! - An edge, with same polarity as a wakeup event, was detected on a wakeup +//! enabled IO before shutdown, and the shutdown was aborted. The application must +//! clear the event generated by the edge detect (see \ref GPIO_clearEventDio()) and +//! decide what happens next. +//! +//! Useful functions related to shutdown: +//! - \ref IOCIOShutdownSet() : Enables wakeup from shutdown. +//! - \ref IOCIOIntSet() : Enables IO edge detection. +//! - \ref PRCMPowerDomainOn() : Enables peripheral power domain. +//! - \ref PRCMPeripheralRunEnable() : Enables GPIO module. +//! - \ref SysCtrlResetSourceGet() : Detects wakeup from shutdown. +//! - \ref PowerCtrlPadSleepDisable() : Unlatches outputs (disables pad sleep) after +//! wakeup from shutdown. +//! - \ref GPIO_clearEventDio() : Clears edge detects. +//! +//! It is recommended to disable interrupts before calling this function because: +//! - Pads are in sleep mode while this function runs. +//! - An interrupt routine might be terminated if it is triggered after the decision +//! to enter shutdown. +//! +//! \return None +// +//***************************************************************************** +extern void SysCtrlShutdownWithAbort(void); + +//***************************************************************************** +// +//! \brief Enable shutdown of the device. +//! +//! This function puts the device in shutdown state. The device automatically +//! latches all outputs (pads in sleep) before it turns off all internal power +//! supplies. +//! +//! JTAG must be disconnected and JTAG power domain must be off before device can +//! enter shutdown. This function waits until the device satisfies all shutdown +//! conditions before it enters shutdown. +//! +//! \note The application must unlatch the outputs when the device wakes up from shutdown. +//! It is recommended that any outputs that need to be restored after a wakeup from +//! shutdown are restored before outputs are unlatched in order to avoid glitches. +//! +//! See \ref PowerCtrlPadSleepDisable() for information about how to unlatch outputs +//! (disable pad sleep) after wakeup from shutdown. +//! +//! \note Wakeup events are only detected after the device enters shutdown. +//! +//! See \ref IOCIOShutdownSet() for information about how to enable wakeup from shutdown. +//! +//! See \ref SysCtrlResetSourceGet() for information about how to detect wakeup +//! from shutdown. +//! +//! It is recommended to disable interrupts before calling this function. Shutdown +//! happens immediately when the device satisfies all shutdown conditions thus +//! interrupt routines triggered after this function is called might be +//! aborted. +//! +//! \return This function does \b not return. +// +//***************************************************************************** +extern void SysCtrlShutdown(void); + +//***************************************************************************** +// +//! \brief Force the system into standby mode. +//! +//! This function forces all power domains (RFCORE, SERIAL, PERIPHERAL) off. +//! The VIMS and CPU power domains are turned off by the HW when the +//! \ref PRCMDeepSleep() function is called. +//! The IOs are latched (frozen) before the power domains are turned off to +//! avoid glitches. +//! The VIMS retention (cache) and VIMS module are turned off if requested. +//! The deep-sleep clock for the crypto and DMA modules are turned off, +//! as they must be off in order to enter standby. +//! This function assumes that the LF clock has already been switched to +//! and that the LF clock qualifiers must have been disabled/bypassed. +//! +//! In internal regulator mode the adaptive recharge functionality is enabled +//! with fixed parameter values. +//! In external regulator mode the recharge functionality is disabled. +//! +//! \note This function is optimized to execute with TI-RTOS. There might be +//! application specific prerequisites you would want to do before entering +//! standby which deviate from this specific implementation. +//! +//! \param retainCache selects if VIMS cache shall be retained or not. +//! - false : VIMS cache is not retained +//! - true : VIMS cache is retained +//! \param vimsPdMode selects the VIMS power domain mode. +//! The parameter must be one of the following: +//! - \ref VIMS_ON_CPU_ON_MODE +//! - \ref VIMS_NO_PWR_UP_MODE +//! \param rechargeMode specifies the requested recharge mode. +//! The parameter must be one of the following: +//! - \ref SYSCTRL_PREFERRED_RECHARGE_MODE : Preferred recharge mode specified by TI +//! +//! \return None +// +//***************************************************************************** +extern void SysCtrlStandby(bool retainCache, uint32_t vimsPdMode, uint32_t rechargeMode); + //***************************************************************************** // //! \brief Get the CPU core clock frequency. @@ -203,22 +367,15 @@ SysCtrlAonUpdate(void) HWREG(AON_RTC_BASE + AON_RTC_O_SYNC); } - //***************************************************************************** // //! \brief Set Recharge values before entering Power Down. //! //! This function shall be called just before entering Power Down. -//! It calculates an optimal and safe recharge setting of the adaptive recharge -//! controller. The results of previous setting are also taken into account. -//! -//! \note In order to make sure that the register writes are completed, \ref SysCtrlAonSync() -//! must be called before entering standby/power down. This is not done internally -//! in this function due to two reasons: -//! - 1) There might be other register writes that must be synchronized as well. -//! - 2) It is possible to save some time by doing other things before calling -//! \ref SysCtrlAonSync() since this call will not return before there are no -//! outstanding write requests between MCU and AON. +//! This function typically does nothing (default setting), but +//! if temperature compensated recharge level are enabled (by setting +//! CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC = 0) +//! it adds temperature compensation to the recharge level. //! //! \param xoscPowerMode (typically running in XOSC_IN_HIGH_POWER_MODE all the time). //! - \ref XOSC_IN_HIGH_POWER_MODE : When xosc_hf is in HIGH_POWER_XOSC. @@ -229,28 +386,16 @@ SysCtrlAonUpdate(void) //***************************************************************************** extern void SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ); - //***************************************************************************** // //! \brief Adjust Recharge calculations to be used next. //! -//! This function shall be called just after returning from Power Down. -//! -//! Reads the results from the adaptive recharge controller and current chip -//! temperature. This is used as additional information when calculating -//! optimal recharge controller settings next time (When -//! \ref SysCtrlSetRechargeBeforePowerDown() is called next time). -//! -//! \note -//! Special care must be taken to make sure that the AON registers read are -//! updated after the wakeup. Writing to an AON register and then calling -//! \ref SysCtrlAonSync() will handle this. +//! Nothing to be done but keeping this function for platform compatibility. //! //! \return None // //***************************************************************************** -extern void SysCtrlAdjustRechargeAfterPowerDown( void ); - +extern void SysCtrlAdjustRechargeAfterPowerDown( uint32_t vddrRechargeMargin ); //***************************************************************************** // @@ -269,27 +414,39 @@ extern void SysCtrlAdjustRechargeAfterPowerDown( void ); //***************************************************************************** extern void SysCtrl_DCDC_VoltageConditionalControl( void ); - //***************************************************************************** // \name Return values from calling SysCtrlResetSourceGet() //@{ //***************************************************************************** -#define RSTSRC_PWR_ON (( AON_PMCTL_RESETCTL_RESET_SRC_PWR_ON ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_PIN_RESET (( AON_PMCTL_RESETCTL_RESET_SRC_PIN_RESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_VDDS_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDDS_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_VDD_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDD_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_VDDR_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDDR_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_CLK_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_CLK_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_SYSRESET (( AON_PMCTL_RESETCTL_RESET_SRC_SYSRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_WARMRESET (( AON_PMCTL_RESETCTL_RESET_SRC_WARMRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_WAKEUP_FROM_SHUTDOWN ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 1 ) +#define RSTSRC_PWR_ON (( AON_PMCTL_RESETCTL_RESET_SRC_PWR_ON ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_PIN_RESET (( AON_PMCTL_RESETCTL_RESET_SRC_PIN_RESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_VDDS_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDDS_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_VDDR_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_VDDR_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_CLK_LOSS (( AON_PMCTL_RESETCTL_RESET_SRC_CLK_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_SYSRESET (( AON_PMCTL_RESETCTL_RESET_SRC_SYSRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_WARMRESET (( AON_PMCTL_RESETCTL_RESET_SRC_WARMRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) +#define RSTSRC_WAKEUP_FROM_SHUTDOWN ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 1 ) +#define RSTSRC_WAKEUP_FROM_TCK_NOISE ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 2 ) //@} //***************************************************************************** // -//! \brief Returns last reset source (including "wakeup from shutdown"). +//! \brief Returns the reset source (including "wakeup from shutdown"). //! -//! \return Returns one of the RSTSRC_ defines. +//! In case of \ref RSTSRC_WAKEUP_FROM_SHUTDOWN the application is +//! responsible for unlatching the outputs (disable pad sleep). +//! See \ref PowerCtrlPadSleepDisable() for more information. +//! +//! \return Returns the reset source. +//! - \ref RSTSRC_PWR_ON +//! - \ref RSTSRC_PIN_RESET +//! - \ref RSTSRC_VDDS_LOSS +//! - \ref RSTSRC_VDDR_LOSS +//! - \ref RSTSRC_CLK_LOSS +//! - \ref RSTSRC_SYSRESET +//! - \ref RSTSRC_WARMRESET +//! - \ref RSTSRC_WAKEUP_FROM_SHUTDOWN +//! - \ref RSTSRC_WAKEUP_FROM_TCK_NOISE // //***************************************************************************** extern uint32_t SysCtrlResetSourceGet( void ); @@ -366,6 +523,22 @@ SysCtrlClockLossResetDisable(void) //***************************************************************************** #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN) #include "../driverlib/rom.h" + #ifdef ROM_SysCtrlIdle + #undef SysCtrlIdle + #define SysCtrlIdle ROM_SysCtrlIdle + #endif + #ifdef ROM_SysCtrlShutdownWithAbort + #undef SysCtrlShutdownWithAbort + #define SysCtrlShutdownWithAbort ROM_SysCtrlShutdownWithAbort + #endif + #ifdef ROM_SysCtrlShutdown + #undef SysCtrlShutdown + #define SysCtrlShutdown ROM_SysCtrlShutdown + #endif + #ifdef ROM_SysCtrlStandby + #undef SysCtrlStandby + #define SysCtrlStandby ROM_SysCtrlStandby + #endif #ifdef ROM_SysCtrlSetRechargeBeforePowerDown #undef SysCtrlSetRechargeBeforePowerDown #define SysCtrlSetRechargeBeforePowerDown ROM_SysCtrlSetRechargeBeforePowerDown diff --git a/third_party/ti/devices/cc26x2/driverlib/systick.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/systick.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/systick.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/systick.c diff --git a/third_party/ti/devices/cc26x2/driverlib/systick.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/systick.h similarity index 95% rename from third_party/ti/devices/cc26x2/driverlib/systick.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/systick.h index 8e7029c20..a70702c31 100644 --- a/third_party/ti/devices/cc26x2/driverlib/systick.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/systick.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: systick.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Prototypes for the SysTick driver. * @@ -117,9 +117,12 @@ SysTickDisable(void) //***************************************************************************** // -//! \brief Registers an interrupt handler for the SysTick interrupt. +//! \brief Registers an interrupt handler for the SysTick interrupt in the dynamic interrupt table. //! -//! This sets the handler to be called when a SysTick interrupt occurs. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. //! //! \param pfnHandler is a pointer to the function to be called when the //! SysTick interrupt occurs. @@ -142,7 +145,7 @@ SysTickIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters the interrupt handler for the SysTick interrupt. +//! \brief Unregisters the interrupt handler for the SysTick interrupt in the dynamic interrupt table. //! //! This function will clear the handler to be called when a SysTick interrupt //! occurs. diff --git a/third_party/ti/devices/cc26x2/driverlib/systick_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/systick_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/systick_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/systick_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/timer.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/timer.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/timer.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/timer.c diff --git a/third_party/ti/devices/cc26x2/driverlib/timer.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/timer.h similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/timer.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/timer.h index bd43eeab1..d34e6ce32 100644 --- a/third_party/ti/devices/cc26x2/driverlib/timer.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/timer.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: timer.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -792,13 +792,16 @@ TimerMatchGet(uint32_t ui32Base, uint32_t ui32Timer) //***************************************************************************** // -//! \brief Registers an interrupt handler for the timer interrupt. +//! \brief Registers an interrupt handler for the timer interrupt in the dynamic interrupt table. //! -//! This function registers the handler to be called when a timer interrupt -//! occurs. In addition, this function enables the global interrupt in the -//! interrupt controller; specific timer interrupts must be enabled via -//! \ref TimerIntEnable(). It is the interrupt handler's responsibility to clear -//! the interrupt source via \ref TimerIntClear(). +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific timer interrupts must be enabled via \ref TimerIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source via +//! \ref TimerIntClear(). //! //! \param ui32Base is the base address of the timer module. //! \param ui32Timer specifies the timer(s); must be one of: @@ -819,7 +822,7 @@ extern void TimerIntRegister(uint32_t ui32Base, uint32_t ui32Timer, //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the timer interrupt. +//! \brief Unregisters an interrupt handler for the timer interrupt in the dynamic interrupt table. //! //! This function unregisters the handler to be called when a timer interrupt //! occurs. This function also masks off the interrupt in the interrupt diff --git a/third_party/ti/devices/cc26x2/driverlib/timer_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/timer_doc.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/timer_doc.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/timer_doc.h diff --git a/third_party/ti/devices/cc26x2/driverlib/trng.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/trng.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/trng.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/trng.c diff --git a/third_party/ti/devices/cc26x2/driverlib/trng.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/trng.h similarity index 96% rename from third_party/ti/devices/cc26x2/driverlib/trng.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/trng.h index 19c7c4e50..2a2f047cd 100644 --- a/third_party/ti/devices/cc26x2/driverlib/trng.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/trng.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: trng.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the true random number gen. * @@ -359,15 +359,18 @@ TRNGIntClear(uint32_t ui32IntFlags) //***************************************************************************** // -//! \brief Registers an interrupt handler for a TRNG interrupt. +//! \brief Registers an interrupt handler for a TRNG interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via \ref TRNGIntEnable(). It is the interrupt +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific TRNG interrupts must be enabled via \ref TRNGIntEnable(). It is the interrupt //! handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the -//! UART interrupt occurs. +//! TRNG interrupt occurs. //! //! \return None //! @@ -387,7 +390,7 @@ TRNGIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a TRNG interrupt. +//! \brief Unregisters an interrupt handler for a TRNG interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a Crypto interrupt occurs. This diff --git a/third_party/ti/devices/cc26x2/driverlib/uart.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart.c similarity index 99% rename from third_party/ti/devices/cc26x2/driverlib/uart.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/uart.c index 5818d4447..d9f493ba1 100644 --- a/third_party/ti/devices/cc26x2/driverlib/uart.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: uart.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the UART. * diff --git a/third_party/ti/devices/cc26x2/driverlib/uart.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart.h similarity index 98% rename from third_party/ti/devices/cc26x2/driverlib/uart.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/uart.h index b989b8e48..82ec13022 100644 --- a/third_party/ti/devices/cc26x2/driverlib/uart.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: uart.h -* Revised: 2016-11-21 13:43:38 +0100 (Mon, 21 Nov 2016) -* Revision: 47731 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the UART. * @@ -675,14 +675,17 @@ UARTBreakCtl(uint32_t ui32Base, bool bBreakState) //***************************************************************************** // -//! \brief Registers an interrupt handler for a UART interrupt. +//! \brief Registers an interrupt handler for a UART interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via \ref UARTIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! //! -//! \param ui32Base is the base address of the UART port. +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific UART interrupts must be enabled via \ref UARTIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. +//! +//! \param ui32Base is the base address of the UART module. //! \param pfnHandler is a pointer to the function to be called when the //! UART interrupt occurs. //! @@ -696,14 +699,14 @@ extern void UARTIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a UART interrupt. +//! \brief Unregisters an interrupt handler for a UART interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a UART interrupt occurs. This //! function also masks off the interrupt in the interrupt controller so that //! the interrupt handler no longer is called. //! -//! \param ui32Base is the base address of the UART port. +//! \param ui32Base is the base address of the UART module. //! //! \return None //! diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart_doc.h new file mode 100644 index 000000000..e239428e6 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/uart_doc.h @@ -0,0 +1,107 @@ +/****************************************************************************** +* Filename: uart_doc.h +* Revised: 2018-02-09 15:45:36 +0100 (fr, 09 feb 2018) +* Revision: 51470 +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +/*! +\addtogroup uart_api +@{ + +\section sec_uart_printf Use printf() + +DriverLib only supports writing a single character at a time to the UART buffer but it is +possible to utilize the library function \c printf by overriding a few of the functions used by +\c printf with a device specific definition. However, the implementation of \c printf is +compiler specific and requires different functions to be overridden depending on the compiler. + +Using \c printf can increase code size significantly but some compilers provide a highly optimized +and configurable implementation suitable for embedded systems which makes the code size increase +acceptable for most applications. See the compiler's documentation for details about how to +configure the \c printf library function. + +It is required that the application configures and enables the UART module before using \c printf +function. + +\subsection sec_uart_printf_ccs Code Composer Studio + +In Code Composer Studio the functions \c fputc and \c fputs must be overridden. + +\code{.c} +#include +#include + +#define PRINTF_UART UART0_BASE + +// Override 'fputc' function in order to use printf() to output to UART +int fputc(int _c, register FILE *_fp) +{ + UARTCharPut(PRINTF_UART, (uint8_t)_c); + return _c; +} + +// Override 'fputs' function in order to use printf() to output to UART +int fputs(const char *_ptr, register FILE *_fp) +{ + unsigned int i, len; + + len = strlen(_ptr); + + for(i=0 ; i +#include + +#define PRINTF_UART UART0_BASE + +// Override 'putchar' function in order to use printf() to output to UART. +int putchar(int data) +{ + UARTCharPut(PRINTF_UART, (uint8_t)data); + return data; +} +\endcode + +@} +*/ diff --git a/third_party/ti/devices/cc26x2/driverlib/udma.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/udma.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/udma.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/udma.c diff --git a/third_party/ti/devices/cc26x2/driverlib/udma.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/udma.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/udma.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/udma.h index 2bbbbfd72..510691b29 100644 --- a/third_party/ti/devices/cc26x2/driverlib/udma.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/udma.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: udma.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the uDMA controller. * @@ -904,21 +904,23 @@ extern uint32_t uDMAChannelModeGet(uint32_t ui32Base, //***************************************************************************** // -//! \brief Registers an interrupt handler for the uDMA controller. +//! \brief Registers an interrupt handler for the uDMA controller in the dynamic interrupt table. //! -//! This sets and enables the handler to be called when the uDMA controller -//! generates an interrupt. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. //! //! \note The interrupt handler for uDMA is for transfer completion when the -//! software channel is used, and for error interrupts. The -//! interrupts for each peripheral channel are handled through the individual -//! peripheral interrupt handlers. +//! software channel is used, and for error interrupts. The interrupts for each +//! peripheral channel are handled through the individual peripheral interrupt +//! handlers. //! -//! \param ui32Base is the base address of the uDMA port. -//! \param ui32IntChannel identifies which uDMA interrupt is to be registered. -//! - \b INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts +//! \param ui32Base is the base address of the uDMA module. +//! \param ui32IntChannel specifies which uDMA interrupt is to be registered. +//! - \c INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts //! from the uDMA software channel. -//! - \b INT_DMA_ERR : Register an interrupt handler to process uDMA error +//! - \c INT_DMA_ERR : Register an interrupt handler to process uDMA error //! interrupts. //! \param pfnHandler is a pointer to the function to be called when the //! interrupt is activated. @@ -947,16 +949,16 @@ uDMAIntRegister(uint32_t ui32Base, uint32_t ui32IntChannel, //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the uDMA controller. +//! \brief Unregisters an interrupt handler for the uDMA controller in the dynamic interrupt table. //! //! This function will disable and clear the handler to be called for the //! specified uDMA interrupt. //! -//! \param ui32Base is the base address of the uDMA port. -//! \param ui32IntChannel identifies which uDMA interrupt to unregister. -//! - \b INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts +//! \param ui32Base is the base address of the uDMA module. +//! \param ui32IntChannel specifies which uDMA interrupt to unregister. +//! - \c INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts //! from the uDMA software channel. -//! - \b INT_DMA_ERR : Register an interrupt handler to process uDMA error +//! - \c INT_DMA_ERR : Register an interrupt handler to process uDMA error //! interrupts. //! //! \return None diff --git a/third_party/ti/devices/cc26x2/driverlib/vims.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/vims.c similarity index 88% rename from third_party/ti/devices/cc26x2/driverlib/vims.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/vims.c index 7f24037fd..a80d44ea9 100644 --- a/third_party/ti/devices/cc26x2/driverlib/vims.c +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/vims.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: vims.c -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the VIMS. * @@ -163,19 +163,6 @@ VIMSModeSafeSet( uint32_t ui32Base, uint32_t ui32NewMode, bool blocking ) // First check that it actually is a mode change request if ( ui32NewMode != currentMode ) { - // Due to a hw-problem it is strongly recommended to go via VIMS_MODE_OFF - // when leaving VIMS_MODE_ENABLED (=VIMS_CTL_MODE_CACHE) - // (And no need to go via OFF, if OFF is the final state and will be set later) - if (( currentMode == VIMS_CTL_MODE_CACHE ) && - ( ui32NewMode != VIMS_CTL_MODE_OFF ) ) - { - VIMSModeSet( ui32Base, VIMS_MODE_OFF ); - - while ( HWREGBITW( VIMS_BASE + VIMS_O_STAT, VIMS_STAT_MODE_CHANGING_BITN )) { - // Do nothing - wait for change to complete. - // (Needed blocking point but it takes only some few cycles) - } - } // Set new mode VIMSModeSet( ui32Base, ui32NewMode ); diff --git a/third_party/ti/devices/cc26x2/driverlib/vims.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/vims.h similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/vims.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/vims.h diff --git a/third_party/ti/devices/cc26x2/driverlib/watchdog.c b/third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog.c similarity index 100% rename from third_party/ti/devices/cc26x2/driverlib/watchdog.c rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog.c diff --git a/third_party/ti/devices/cc26x2/driverlib/watchdog.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog.h similarity index 97% rename from third_party/ti/devices/cc26x2/driverlib/watchdog.h rename to third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog.h index d32657365..3d8de3684 100644 --- a/third_party/ti/devices/cc26x2/driverlib/watchdog.h +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: wdt.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the Watchdog Timer. * @@ -298,11 +298,14 @@ WatchdogValueGet(void) //***************************************************************************** // -//! \brief Registers an interrupt handler for the watchdog timer interrupt. +//! \brief Registers an interrupt handler for the watchdog timer interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function also enables the global interrupt in the interrupt controller; the -//! watchdog timer interrupt must be enabled via \ref WatchdogIntEnable(). It is the +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! The watchdog timer interrupt must be enabled via \ref WatchdogIntEnable(). It is the //! interrupt handler's responsibility to clear the interrupt source via //! \ref WatchdogIntClear(). //! @@ -331,7 +334,7 @@ WatchdogIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the watchdog timer interrupt. +//! \brief Unregisters an interrupt handler for the watchdog timer interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. This //! function clears the handler to be called when a watchdog timer interrupt diff --git a/third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog_doc.h b/third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog_doc.h new file mode 100644 index 000000000..ef1f23995 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/driverlib/watchdog_doc.h @@ -0,0 +1,121 @@ +/****************************************************************************** +* Filename: watchdog_doc.h +* Revised: 2018-02-09 15:45:36 +0100 (Fri, 09 Feb 2018) +* Revision: 51470 +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +//! \addtogroup wdt_api +//! @{ +//! \section sec_wdt Introduction +//! +//! The Watchdog Timer (WDT) allows the application to regain control if the system stalls due to +//! unexpected software behavior. The WDT can generate a normal interrupt or a non-maskable interrupt +//! on the first time-out and a system reset on the following time-out if the application fails to +//! restart the WDT. +//! +//! WDT has the following features: +//! - 32-bit down counter with a configurable load register. +//! - Configurable interrupt generation logic with interrupt masking and optional NMI function. +//! - Optional reset generation. +//! - Register protection from runaway software (lock). +//! - User-enabled stalling when the system CPU asserts the CPU Halt flag during debug. +//! +//! The WDT runs at system HF clock divided by 32; however, when in powerdown it runs at +//! LF clock (32 kHz) - if the LF clock to the MCU domain is enabled. +//! +//! If application does not restart the WDT, using \ref WatchdogIntClear(), before a time-out: +//! - At the first time-out the WDT asserts the interrupt, reloads the 32-bit counter with the load +//! value, and resumes counting down from that value. +//! - If the WDT counts down to zero again before the application clears the interrupt, and the +//! reset signal has been enabled, the WDT asserts its reset signal to the system. +//! +//! \note By default, a "warm reset" triggers a pin reset and thus reboots the device. +//! +//! A reset caused by the WDT can be detected as a "warm reset" using \ref SysCtrlResetSourceGet(). +//! However, it is not possible to detect which of the warm reset sources that caused the reset. +//! +//! Typical use case: +//! - Use \ref WatchdogIntTypeSet() to select either standard interrupt or non-maskable interrupt on +//! first time-out. +//! - The application must implement an interrupt handler for the selected interrupt type. If +//! application uses the \e static vector table (see startup_.c) the interrupt +//! handlers for standard interrupt and non-maskable interrupt are named WatchdogIntHandler() +//! and NmiSR() respectively. For more information about \e static and \e dynamic vector table, +//! see \ref sec_interrupt_table. +//! - Use \ref WatchdogResetEnable() to enable reset on second time-out. +//! - Use \ref WatchdogReloadSet() to set (re)load value of the counter. +//! - Use \ref WatchdogEnable() to start the WDT counter. The WDT counts down from the load value. +//! - Use \ref WatchdogLock() to lock WDT configuration to prevent unintended re-configuration. +//! - Application must use \ref WatchdogIntClear() to restart the counter before WDT times out. +//! - If application does not restart the counter before it reaches zero (times out) the WDT asserts +//! the selected type of interrupt, reloads the counter, and starts counting down again. +//! - The interrupt handler triggered by the first time-out can be used to log debug information +//! or try to enter a safe "pre-reset" state in order to have a more graceful reset when the WDT +//! times out the second time. +//! - It is \b not recommended that the WDT interrupt handler clears the WDT interrupt and thus +//! reloads the WDT counter. This means that the WDT interrupt handler never returns. +//! - If the application does not clear the WDT interrupt and the WDT times out when the interrupt +//! is still asserted then WDT triggers a reset (if enabled). +//! +//! \section sec_wdt_api API +//! +//! The API functions can be grouped like this: +//! +//! Watchdog configuration: +//! - \ref WatchdogIntTypeSet() +//! - \ref WatchdogResetEnable() +//! - \ref WatchdogResetDisable() +//! - \ref WatchdogReloadSet() +//! - \ref WatchdogEnable() +//! +//! Status: +//! - \ref WatchdogRunning() +//! - \ref WatchdogValueGet() +//! - \ref WatchdogReloadGet() +//! - \ref WatchdogIntStatus() +//! +//! Interrupt configuration: +//! - \ref WatchdogIntEnable() +//! - \ref WatchdogIntClear() +//! - \ref WatchdogIntRegister() +//! - \ref WatchdogIntUnregister() +//! +//! Register protection: +//! - \ref WatchdogLock() +//! - \ref WatchdogLockState() +//! - \ref WatchdogUnlock() +//! +//! Stall configuration for debugging: +//! - \ref WatchdogStallDisable() +//! - \ref WatchdogStallEnable() +//! +//! @} diff --git a/third_party/ti/devices/cc26x2/inc/asmdefs.h b/third_party/ti/devices/cc13x2_cc26x2/inc/asmdefs.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/asmdefs.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/asmdefs.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_adi.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_adi.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_adi_2_refsys.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi_2_refsys.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_adi_2_refsys.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi_2_refsys.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_adi_3_refsys.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi_3_refsys.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_adi_3_refsys.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi_3_refsys.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_adi_4_aux.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi_4_aux.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_adi_4_aux.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_adi_4_aux.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aon_batmon.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_batmon.h similarity index 96% rename from third_party/ti/devices/cc26x2/inc/hw_aon_batmon.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_batmon.h index 307979773..c482c44cc 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aon_batmon.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_batmon.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aon_batmon_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -82,7 +82,7 @@ // Temperature Update #define AON_BATMON_O_TEMPUPD 0x00000034 -// Internal +// Event Mask #define AON_BATMON_O_EVENTMASK 0x00000048 // Event @@ -369,7 +369,8 @@ //***************************************************************************** // Field: [5] TEMP_UPDATE_MASK // -// Internal. Only to be used through TI provided API. +// 1: EVENT.TEMP_UPDATE contributes to combined event from BATMON +// 0: EVENT.TEMP_UPDATE does not contribute to combined event from BATMON #define AON_BATMON_EVENTMASK_TEMP_UPDATE_MASK 0x00000020 #define AON_BATMON_EVENTMASK_TEMP_UPDATE_MASK_BITN 5 #define AON_BATMON_EVENTMASK_TEMP_UPDATE_MASK_M 0x00000020 @@ -377,7 +378,8 @@ // Field: [4] BATT_UPDATE_MASK // -// Internal. Only to be used through TI provided API. +// 1: EVENT.BATT_UPDATE contributes to combined event from BATMON +// 0: EVENT.BATT_UPDATE does not contribute to combined event from BATMON #define AON_BATMON_EVENTMASK_BATT_UPDATE_MASK 0x00000010 #define AON_BATMON_EVENTMASK_BATT_UPDATE_MASK_BITN 4 #define AON_BATMON_EVENTMASK_BATT_UPDATE_MASK_M 0x00000010 @@ -385,7 +387,8 @@ // Field: [3] TEMP_BELOW_LL_MASK // -// Internal. Only to be used through TI provided API. +// 1: EVENT.TEMP_BELOW_LL contributes to combined event from BATMON +// 0: EVENT.TEMP_BELOW_LL does not contribute to combined event from BATMON #define AON_BATMON_EVENTMASK_TEMP_BELOW_LL_MASK 0x00000008 #define AON_BATMON_EVENTMASK_TEMP_BELOW_LL_MASK_BITN 3 #define AON_BATMON_EVENTMASK_TEMP_BELOW_LL_MASK_M 0x00000008 @@ -393,7 +396,8 @@ // Field: [2] TEMP_OVER_UL_MASK // -// Internal. Only to be used through TI provided API. +// 1: EVENT.TEMP_OVER_UL contributes to combined event from BATMON +// 0: EVENT.TEMP_OVER_UL does not contribute to combined event from BATMON #define AON_BATMON_EVENTMASK_TEMP_OVER_UL_MASK 0x00000004 #define AON_BATMON_EVENTMASK_TEMP_OVER_UL_MASK_BITN 2 #define AON_BATMON_EVENTMASK_TEMP_OVER_UL_MASK_M 0x00000004 @@ -401,7 +405,8 @@ // Field: [1] BATT_BELOW_LL_MASK // -// Internal. Only to be used through TI provided API. +// 1: EVENT.BATT_BELOW_LL contributes to combined event from BATMON +// 0: EVENT.BATT_BELOW_LL does not contribute to combined event from BATMON #define AON_BATMON_EVENTMASK_BATT_BELOW_LL_MASK 0x00000002 #define AON_BATMON_EVENTMASK_BATT_BELOW_LL_MASK_BITN 1 #define AON_BATMON_EVENTMASK_BATT_BELOW_LL_MASK_M 0x00000002 @@ -409,7 +414,8 @@ // Field: [0] BATT_OVER_UL_MASK // -// Internal. Only to be used through TI provided API. +// 1: EVENT.BATT_OVER_UL contributes to combined event from BATMON +// 0: EVENT.BATT_OVER_UL does not contribute to combined event from BATMON #define AON_BATMON_EVENTMASK_BATT_OVER_UL_MASK 0x00000001 #define AON_BATMON_EVENTMASK_BATT_OVER_UL_MASK_BITN 0 #define AON_BATMON_EVENTMASK_BATT_OVER_UL_MASK_M 0x00000001 diff --git a/third_party/ti/devices/cc26x2/inc/hw_aon_event.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_event.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aon_event.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_event.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aon_ioc.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_ioc.h similarity index 98% rename from third_party/ti/devices/cc26x2/inc/hw_aon_ioc.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_ioc.h index 24da6b694..11c2d5c1c 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aon_ioc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_ioc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aon_ioc_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-18 09:01:49 +0200 (Thu, 18 May 2017) +* Revision: 49008 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/inc/hw_aon_pmctl.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_pmctl.h similarity index 94% rename from third_party/ti/devices/cc26x2/inc/hw_aon_pmctl.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_pmctl.h index e0892b4d9..a057f9693 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aon_pmctl.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_pmctl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aon_pmctl_h -* Revised: 2017-05-04 11:51:48 +0200 (Thu, 04 May 2017) -* Revision: 48895 +* Revised: 2018-04-16 11:16:52 +0200 (Mon, 16 Apr 2018) +* Revision: 51887 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -119,16 +119,7 @@ //***************************************************************************** // Field: [17] AUX_SRAM_PWR_OFF // -// This bit controls if the AUX SRAM is powered or not -// -// 0: Power on AUX SRAM -// 1: Power off AUX SRAM -// -// Note: During power up/down of the AUX_RAM the AUX clock will be gated low, -// independent of AUXSCECLK.SRC or AUXSCECLK.PD_SRC configuration. -// -// Note: If retention is disabled, the AUX_RAM will be powered off when it -// would otherwise be put in retention mode. +// Internal. Only to be used through TI provided API. #define AON_PMCTL_RAMCFG_AUX_SRAM_PWR_OFF 0x00020000 #define AON_PMCTL_RAMCFG_AUX_SRAM_PWR_OFF_BITN 17 #define AON_PMCTL_RAMCFG_AUX_SRAM_PWR_OFF_M 0x00020000 @@ -136,13 +127,7 @@ // Field: [16] AUX_SRAM_RET_EN // -// This bit controls retention mode for the AUX SRAM -// -// 0: Disable retention -// 1: Enable retention -// -// Note: If retention is disabled, the AUX_RAM will be powered off when it -// would otherwise be put in retention mode. +// Internal. Only to be used through TI provided API. #define AON_PMCTL_RAMCFG_AUX_SRAM_RET_EN 0x00010000 #define AON_PMCTL_RAMCFG_AUX_SRAM_RET_EN_BITN 16 #define AON_PMCTL_RAMCFG_AUX_SRAM_RET_EN_M 0x00010000 @@ -279,8 +264,9 @@ // COMPARATOR External recharge comparator. // Note that the clock to // the recharge comparator must be enabled, -// ANATOP_MMAP:DDI_0_OSC.ATESTCTL, before -// selecting this recharge algorithm. +// +// [ANATOP_MMAP:ADI_3_REFSYS:CTL_RECHARGE_CMP0:COMP_CLK_DISABLE], +// before selecting this recharge algorithm. // ADAPTIVE Adaptive timer // STATIC Static timer // OFF Recharge disabled @@ -445,8 +431,7 @@ // 0: Wakeup occurred from cold reset or brown out as seen in RESET_SRC // 1: A wakeup has occurred from SHUTDOWN // -// Note: This flag can not be cleared and will therefor remain valid until next -// poweroff/reset +// Note: This flag will be cleared when SLEEPCTL.IO_PAD_SLEEP_DIS is asserted. #define AON_PMCTL_RESETCTL_WU_FROM_SD 0x00008000 #define AON_PMCTL_RESETCTL_WU_FROM_SD_BITN 15 #define AON_PMCTL_RESETCTL_WU_FROM_SD_M 0x00008000 @@ -466,8 +451,7 @@ // only occur in a debug session. The boot code will not proceed with wakeup // from SHUTDOWN procedure until this bitfield is asserted as well. // -// Note: This flag can not be cleared and will therefor remain valid until next -// poweroff/reset +// Note: This flag will be cleared when SLEEPCTL.IO_PAD_SLEEP_DIS is asserted. #define AON_PMCTL_RESETCTL_GPIO_WU_FROM_SD 0x00004000 #define AON_PMCTL_RESETCTL_GPIO_WU_FROM_SD_BITN 14 #define AON_PMCTL_RESETCTL_GPIO_WU_FROM_SD_M 0x00004000 @@ -525,7 +509,7 @@ // Field: [5] CLK_LOSS_EN // // Controls reset generation in case SCLK_LF, SCLK_MF or SCLK_HF is lost when -// clock loss detection is enabled by DDI_0_OSC:CTL0.CLK_LOSS_EN +// clock loss detection is enabled by [ANATOP_MMAP:DDI_0_OSC:CTL0.CLK_LOSS_EN] // // 0: Clock loss is ignored // 1: Clock loss generates system reset @@ -533,7 +517,7 @@ // Note: Clock loss reset generation must be disabled when changing clock // source for SCLK_LF. Failure to do so may result in a spurious system // reset. Clock loss reset generation is controlled by -// DDI_0_OSC:CTL0.CLK_LOSS_EN +// [ANATOP_MMAP:DDI_0_OSC:CTL0.CLK_LOSS_EN] #define AON_PMCTL_RESETCTL_CLK_LOSS_EN 0x00000020 #define AON_PMCTL_RESETCTL_CLK_LOSS_EN_BITN 5 #define AON_PMCTL_RESETCTL_CLK_LOSS_EN_M 0x00000020 @@ -560,12 +544,13 @@ // cause. // ENUMs: // WARMRESET Software reset via PRCM warm reset request -// SYSRESET Software reset via SYSRESET +// SYSRESET Software reset via SYSRESET or hardware power +// management timeout detection. +// +// Note: The hardware power +// management timeout circuit is always enabled. // CLK_LOSS SCLK_LF, SCLK_MF or SCLK_HF clock loss detect // VDDR_LOSS Brown out detect on VDDR -// VDD_LOSS Brown out detect on VDD -// Tied low in SYSCTRL33 and -// will never be detected. // VDDS_LOSS Brown out detect on VDDS // PIN_RESET Reset pin // PWR_ON Power on reset @@ -576,7 +561,6 @@ #define AON_PMCTL_RESETCTL_RESET_SRC_SYSRESET 0x0000000C #define AON_PMCTL_RESETCTL_RESET_SRC_CLK_LOSS 0x0000000A #define AON_PMCTL_RESETCTL_RESET_SRC_VDDR_LOSS 0x00000008 -#define AON_PMCTL_RESETCTL_RESET_SRC_VDD_LOSS 0x00000006 #define AON_PMCTL_RESETCTL_RESET_SRC_VDDS_LOSS 0x00000004 #define AON_PMCTL_RESETCTL_RESET_SRC_PIN_RESET 0x00000002 #define AON_PMCTL_RESETCTL_RESET_SRC_PWR_ON 0x00000000 @@ -592,8 +576,9 @@ // automatically unless waking up from a SHUTDOWN ( RESETCTL.WU_FROM_SD is // set). // -// 0: I/O pad sleep mode is enabled, meaning all pads are latched and can not -// toggle. +// 0: I/O pad sleep mode is enabled, meaning all outputs and pad configurations +// are latched. Inputs are transparent if pad is configured as input before +// IO_PAD_SLEEP_DIS is set to 1 // 1: I/O pad sleep mode is disabled // // Application software must reconfigure the state for all IO's before setting diff --git a/third_party/ti/devices/cc26x2/inc/hw_aon_rtc.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_rtc.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aon_rtc.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aon_rtc.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_aiodio.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_aiodio.h similarity index 99% rename from third_party/ti/devices/cc26x2/inc/hw_aux_aiodio.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_aiodio.h index 9c7347f5f..7c725d795 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_aiodio.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_aiodio.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_aiodio_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -548,8 +548,8 @@ // AUXIO[8i+0] is enabled for analog signal // transfer. // -// When GPIODIE bit 0 is -// 1:*AUXIO[8i+0] is enabled for digital input. +// When GPIODIE bit 0 is 1: +// AUXIO[8i+0] is enabled for digital input. // OUT Output Mode: // // When IOPOE bit 0 is 0: @@ -653,7 +653,7 @@ // // Write 1 to bit index n in this bit vector to clear GPIODOUT bit n. // -// Read value is 0.. +// Read value is 0. #define AUX_AIODIO_GPIODOUTCLR_IO7_0_W 8 #define AUX_AIODIO_GPIODOUTCLR_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODOUTCLR_IO7_0_S 0 diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_anaif.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_anaif.h similarity index 94% rename from third_party/ti/devices/cc26x2/inc/hw_aux_anaif.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_anaif.h index e1176924f..c14c12fca 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_anaif.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_anaif.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_anaif_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-09-14 10:33:07 +0200 (Thu, 14 Sep 2017) +* Revision: 49733 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -88,8 +88,8 @@ // // Select active polarity for START_SRC event. // ENUMs: -// FALL Start ADC conversion on falling edge of event. -// RISE Start ADC conversion on rising edge of event. +// FALL Set ADC trigger on falling edge of event source. +// RISE Set ADC trigger on rising edge of event source. #define AUX_ANAIF_ADCCTL_START_POL 0x00004000 #define AUX_ANAIF_ADCCTL_START_POL_BITN 14 #define AUX_ANAIF_ADCCTL_START_POL_M 0x00004000 @@ -99,10 +99,10 @@ // Field: [13:8] START_SRC // -// Select ADC conversion start event from the asynchronous AUX event bus. +// Select ADC trigger event source from the asynchronous AUX event bus. // -// Set START_SRC to NO_EVENT if you want to trigger ADC conversion manually -// through ADCTRIG.START. +// Set START_SRC to NO_EVENT if you want to trigger the ADC manually through +// ADCTRIG.START. // // If you write a non-enumerated value the behavior is identical to NO_EVENT. // The written value is returned when read. @@ -259,6 +259,9 @@ // // 0: FIFO has not overflowed. // 1: FIFO has overflowed, this flag is sticky until you flush the FIFO. +// +// When the flag is set, the ADC FIFO write pointer is static. It is not +// possible to add more samples to the ADC FIFO. Flush FIFO to clear the flag. #define AUX_ANAIF_ADCFIFOSTAT_OVERFLOW 0x00000010 #define AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_BITN 4 #define AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_M 0x00000010 @@ -270,6 +273,9 @@ // // 0: FIFO has not underflowed. // 1: FIFO has underflowed, this flag is sticky until you flush the FIFO. +// +// When the flag is set, the ADC FIFO read pointer is static. Read returns the +// previous sample that was read. Flush FIFO to clear the flag. #define AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW 0x00000008 #define AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_BITN 3 #define AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_M 0x00000008 @@ -281,6 +287,9 @@ // // 0: FIFO is not full, there is less than 4 samples in the FIFO. // 1: FIFO is full, there are 4 samples in the FIFO. +// +// When the flag is set, it is not possible to add more samples to the ADC +// FIFO. An attempt to add samples sets the OVERFLOW flag. #define AUX_ANAIF_ADCFIFOSTAT_FULL 0x00000004 #define AUX_ANAIF_ADCFIFOSTAT_FULL_BITN 2 #define AUX_ANAIF_ADCFIFOSTAT_FULL_M 0x00000004 @@ -304,6 +313,9 @@ // // 0: FIFO contains one or more samples. // 1: FIFO is empty. +// +// When the flag is set, read returns the previous sample that was read and +// sets the UNDERFLOW flag. #define AUX_ANAIF_ADCFIFOSTAT_EMPTY 0x00000001 #define AUX_ANAIF_ADCFIFOSTAT_EMPTY_BITN 0 #define AUX_ANAIF_ADCFIFOSTAT_EMPTY_M 0x00000001 @@ -335,13 +347,13 @@ //***************************************************************************** // Field: [0] START // -// Manual ADC conversion. +// Manual ADC trigger. // // 0: No effect. -// 1: Start a single ADC conversion. +// 1: Single ADC trigger. // -// You must set ADCCTL.START_SRC to NO_EVENT to avoid conflict with event -// triggered ADC conversion. +// To manually trigger the ADC, you must set ADCCTL.START_SRC to NO_EVENT to +// avoid conflict with event-driven ADC trigger. #define AUX_ANAIF_ADCTRIG_START 0x00000001 #define AUX_ANAIF_ADCTRIG_START_BITN 0 #define AUX_ANAIF_ADCTRIG_START_M 0x00000001 @@ -375,7 +387,13 @@ // 0: Disable DAC. // 1: Enable DAC. // -// Do not enable the DAC when AUX_SYSIF:OPMODEREQ.REQ equals PDA. +// The Sensor Controller must not use the DAC when AUX_SYSIF:OPMODEREQ.REQ +// equals PDA. +// +// The System CPU must not use the DAC when AUX_SYSIF:OPMODEREQ.REQ equals PDA +// in Standby TI-RTOS power mode. The System CPU must set +// AUX_SYSIF:PEROPRATE.ANAIF_DAC_OP_RATE to BUS_RATE to use the DAC in Active +// and Idle TI-RTOS power modes. #define AUX_ANAIF_DACCTL_DAC_EN 0x00000020 #define AUX_ANAIF_DACCTL_DAC_EN_BITN 5 #define AUX_ANAIF_DACCTL_DAC_EN_M 0x00000020 @@ -424,7 +442,7 @@ // DAC output connection. // // An analog node must only have one driver. Other drivers for the following -// analog nodes are configured in ADI_4_AUX:ADI4_AUX. +// analog nodes are configured in [ANATOP_MMAP::ADI_4_AUX:*]. // ENUMs: // COMPA_IN Connect to COMPA_IN analog node. // @@ -432,6 +450,10 @@ // external load selected in // ADI_4_AUX:MUX1.COMPA_IN. // COMPA_REF Connect to COMPA_REF analog node. +// +// It is not possible to +// drive external loads connected to COMPA_REF I/O +// mux with this setting. // COMPB_REF Connect to COMPB_REF analog node. // // Required setting to use diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_evctl.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_evctl.h similarity index 99% rename from third_party/ti/devices/cc26x2/inc/hw_aux_evctl.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_evctl.h index 5aa5a92e6..2dbd185a6 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_evctl.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_evctl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_evctl_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2018-04-16 11:16:52 +0200 (Mon, 16 Apr 2018) +* Revision: 51887 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -451,7 +451,7 @@ // Field: [9] VDDR_RECHARGE // -// Event is high while the system recharges VDDR. +// Event is high during VDDR recharge. #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE 0x00000200 #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE_BITN 9 #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE_M 0x00000200 @@ -459,8 +459,9 @@ // Field: [8] MCU_ACTIVE // -// Event is high while MCU domain is active or transitions to active (GLDO or -// DCDC power supply state). +// Event is high while system(MCU, AUX, or JTAG domains) is active or +// transitions to active (GLDO or DCDC power supply state). Event is not high +// during VDDR recharge. #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE 0x00000100 #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE_BITN 8 #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE_M 0x00000100 @@ -468,7 +469,8 @@ // Field: [7] PWR_DWN // -// Event is high while system is in powerdown (uLDO power supply). +// Event is high while system(MCU, AUX, or JTAG domains) is in powerdown (uLDO +// power supply). #define AUX_EVCTL_EVSTAT2_PWR_DWN 0x00000080 #define AUX_EVCTL_EVSTAT2_PWR_DWN_BITN 7 #define AUX_EVCTL_EVSTAT2_PWR_DWN_M 0x00000080 @@ -556,7 +558,7 @@ // Field: [13] AUX_SMPH_AUTOTAKE_DONE // -// See AUX_SMPH:AUTOTAKE.SMPH_ID. +// See AUX_SMPH:AUTOTAKE.SMPH_ID for description. #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE 0x00002000 #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE_BITN 13 #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE_M 0x00002000 @@ -583,7 +585,7 @@ // The logical function for this event is configurable. // // When DMACTL.EN = 1 : -// Event = [uDMA0:*] Channel 7 done event OR +// Event = UDMA0 Channel 7 done event OR // AUX_ANAIF:ADCFIFOSTAT.OVERFLOW OR AUX_ANAIF:ADCFIFOSTAT.UNDERFLOW // // When DMACTL.EN = 0 : @@ -1720,7 +1722,7 @@ // Field: [0] AUX_WU_EV // -// Select the event source level that sets EVTOMCUFLAGS.AUX_WU_EV +// Select the event source level that sets EVTOMCUFLAGS.AUX_WU_EV. // ENUMs: // LOW Low level // HIGH High level diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_mac.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_mac.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aux_mac.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_mac.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_ram.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_ram.h similarity index 95% rename from third_party/ti/devices/cc26x2/inc/hw_aux_ram.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_ram.h index 76fb6b405..7a627e923 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_ram.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_ram.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_ram_h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: 2017-05-06 20:38:09 +0200 (Sat, 06 May 2017) +* Revision: 48921 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_sce.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_sce.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aux_sce.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_sce.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_smph.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_smph.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aux_smph.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_smph.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_spim.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_spim.h similarity index 96% rename from third_party/ti/devices/cc26x2/inc/hw_aux_spim.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_spim.h index 8a0080215..1dd7aa6ef 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_spim.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_spim.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_spim_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -156,8 +156,6 @@ // // Write DATA to start transfer, MSB first. When transfer completes, MOSI stays // at the value of LSB. -// -// Write operation stalls until current transfer completes. #define AUX_SPIM_TX8_DATA_W 8 #define AUX_SPIM_TX8_DATA_M 0x000000FF #define AUX_SPIM_TX8_DATA_S 0 @@ -173,8 +171,6 @@ // // Write DATA to start transfer, MSB first. When transfer completes, MOSI stays // at the value of LSB. -// -// Write operation stalls until current transfer completes. #define AUX_SPIM_TX16_DATA_W 16 #define AUX_SPIM_TX16_DATA_M 0x0000FFFF #define AUX_SPIM_TX16_DATA_S 0 @@ -187,8 +183,6 @@ // Field: [7:0] DATA // // Latest 8 bits received on MISO. -// -// Read operation stalls until current transfer completes. #define AUX_SPIM_RX8_DATA_W 8 #define AUX_SPIM_RX8_DATA_M 0x000000FF #define AUX_SPIM_RX8_DATA_S 0 @@ -201,8 +195,6 @@ // Field: [15:0] DATA // // Latest 16 bits received on MISO. -// -// Read operation stalls until current transfer completes. #define AUX_SPIM_RX16_DATA_W 16 #define AUX_SPIM_RX16_DATA_M 0x0000FFFF #define AUX_SPIM_RX16_DATA_S 0 diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_sysif.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_sysif.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aux_sysif.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_sysif.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_tdc.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_tdc.h similarity index 94% rename from third_party/ti/devices/cc26x2/inc/hw_aux_tdc.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_tdc.h index 6e4812a03..17213e3b5 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_tdc.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_tdc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_tdc_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -83,19 +83,23 @@ // TDC commands. // ENUMs: // ABORT Force TDC state machine back to IDLE state. +// +// Never write this command +// while AUX_TDC:STAT.STATE equals CLR_CNT or +// WAIT_CLR_CNT_DONE. // RUN Asynchronous counter start. // -// The counter starts when -// the start condition is true. To achieve precise -// edge-to-edge measurements you must ensure that -// the start condition is false for at least 7 -// clock periods after you write this command. +// The counter starts to +// count when the start event is high. To achieve +// precise edge-to-edge measurements you must +// ensure that the start event is low for at least +// 420 ns after you write this command. // RUN_SYNC_START Synchronous counter start. // // The counter looks for the // opposite edge of the selected start event // before it starts to count when the selected -// edge occurs. This guarantees an edge triggered +// edge occurs. This guarantees an edge-triggered // start and is recommended for frequency // measurements. // CLR_RESULT Clear STAT.SAT, STAT.DONE, and RESULT.VALUE. @@ -118,7 +122,7 @@ //***************************************************************************** // Field: [7] SAT // -// Saturation flag for TDC measurement. +// TDC measurement saturation flag. // // 0: Conversion has not saturated. // 1: Conversion stopped due to saturation. @@ -291,8 +295,8 @@ // // Change only while STAT.STATE is IDLE. // ENUMs: -// LOW TDC measurement stops when low level is detected. -// HIGH TDC measurement stops when high level is detected. +// LOW TDC conversion stops when low level is detected. +// HIGH TDC conversion stops when high level is detected. #define AUX_TDC_TRIGSRC_STOP_POL 0x00004000 #define AUX_TDC_TRIGSRC_STOP_POL_BITN 14 #define AUX_TDC_TRIGSRC_STOP_POL_M 0x00004000 @@ -445,8 +449,8 @@ // // Change only while STAT.STATE is IDLE. // ENUMs: -// LOW TDC measurement starts when low level is detected -// HIGH TDC measurement starts when high level is detected +// LOW TDC conversion starts when low level is detected. +// HIGH TDC conversion starts when high level is detected. #define AUX_TDC_TRIGSRC_START_POL 0x00000040 #define AUX_TDC_TRIGSRC_START_POL_BITN 6 #define AUX_TDC_TRIGSRC_START_POL_M 0x00000040 @@ -600,15 +604,17 @@ //***************************************************************************** // Field: [15:0] CNT // -// Number of stop events to ignore. +// Number of stop events to ignore when AUX_TDC:TRIGCNTCFG.EN is 1. // -// When TRIGCNTCFG.EN is 1, the TDC measurement ignores CNT - 1 stop events. -// The TDC measurement finishes on event number CNT. +// Read CNT to get the remaining number of stop events to ignore during a TDC +// measurement. // -// Read CNT to get the remaining number of stop events to ignore. +// Write CNT to update the remaining number of stop events to ignore during a +// TDC measurement. The TDC measurement ignores updates of CNT if there are no +// more stop events left to ignore. // -// CNT is loaded with the value of TRIGCNTLOAD.CNT at the start of every -// measurement. You can write CNT during a measurement. +// When AUX_TDC:TRIGCNTCFG.EN is 1, TRIGCNTLOAD.CNT is loaded into CNT at the +// start of the measurement. #define AUX_TDC_TRIGCNT_CNT_W 16 #define AUX_TDC_TRIGCNT_CNT_M 0x0000FFFF #define AUX_TDC_TRIGCNT_CNT_S 0 @@ -620,15 +626,26 @@ //***************************************************************************** // Field: [15:0] CNT // -// Number of stop events to ignore. +// Number of stop events to ignore when AUX_TDC:TRIGCNTCFG.EN is 1. // -// Number of stop events to ignore before the TDC measurement stops. This can -// be used to measure multiple periods of a clock signal. +// To measure frequency of an event source: +// - Set start event equal to stop event. +// - Set CNT to number of periods to measure. Both 0 and 1 values measures a +// single event source period. // -// CNT is loaded into TRIGCNT.CNT at the start of each measurement. +// To measure pulse width of an event source: +// - Set start event source equal to stop event source. +// - Select different polarity for start and stop event. +// - Set CNT to 0. // -// Note that values 0 and 1 both make the measurement stop on the first stop -// event. +// To measure time from the start event to the Nth stop event when N > 1: +// - Select different start and stop event source. +// - Set CNT to (N-1). +// +// See the Technical Reference Manual for event timing requirements. +// +// When AUX_TDC:TRIGCNTCFG.EN is 1, CNT is loaded into TRIGCNT.CNT at the start +// of the measurement. #define AUX_TDC_TRIGCNTLOAD_CNT_W 16 #define AUX_TDC_TRIGCNTLOAD_CNT_M 0x0000FFFF #define AUX_TDC_TRIGCNTLOAD_CNT_S 0 @@ -640,10 +657,10 @@ //***************************************************************************** // Field: [0] EN // -// Enable stop counter. +// Enable stop-counter. // -// 0: Disable stop counter. -// 1: Enable stop counter. +// 0: Disable stop-counter. +// 1: Enable stop-counter. // // Change only while STAT.STATE is IDLE. #define AUX_TDC_TRIGCNTCFG_EN 0x00000001 @@ -845,10 +862,15 @@ // Write a value to CNT to capture the value of the 16-bit prescaler counter // into CNT. Read CNT to get the captured value. // +// The read value gets 1 LSB uncertainty if the event source level rises when +// you release the reset. +// The read value gets 1 LSB uncertainty if the event source level rises when +// you capture the prescaler counter. +// // Please note the following: // - The prescaler counter is reset to 2 by PRECTL.RESET_N. // - The captured value is 2 when the number of rising edges on prescaler input -// is less than 3. +// is less than 3. Otherwise, captured value equals number of event pulses - 1. #define AUX_TDC_PRECNTR_CNT_W 16 #define AUX_TDC_PRECNTR_CNT_M 0x0000FFFF #define AUX_TDC_PRECNTR_CNT_S 0 diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_timer01.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_timer01.h similarity index 91% rename from third_party/ti/devices/cc26x2/inc/hw_aux_timer01.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_timer01.h index 8999758e9..8c5c5621e 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_aux_timer01.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_timer01.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_timer01_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-22 18:50:33 +0200 (Mon, 22 May 2017) +* Revision: 49040 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -76,8 +76,8 @@ // // Tick source polarity for Timer 0. // ENUMs: -// FALL Count on falling edges of TICK_SRC -// RISE Count on rising edges of TICK_SRC +// FALL Count on falling edges of TICK_SRC. +// RISE Count on rising edges of TICK_SRC. #define AUX_TIMER01_T0CFG_TICK_SRC_POL 0x00004000 #define AUX_TIMER01_T0CFG_TICK_SRC_POL_BITN 14 #define AUX_TIMER01_T0CFG_TICK_SRC_POL_M 0x00004000 @@ -257,14 +257,15 @@ // ENUMs: // CONT Continuous mode. // -// When T0CNTR.VALUE reaches -// T0TARGET.VALUE, T0CTL.EN remains 1. Timer 0 -// restarts automatically. +// Timer 0 restarts when the +// counter value becomes equal to or greater than +// ( T0TARGET.VALUE - 1). // MAN Manual mode. // -// When T0CNTR.VALUE reaches -// T0TARGET.VALUE, T0CTL.EN becomes 0. Timer 0 -// requires manual restart. +// Timer 0 stops and +// T0CTL.EN becomes 0 when the counter value +// becomes equal to or greater than +// T0TARGET.VALUE. #define AUX_TIMER01_T0CFG_RELOAD 0x00000001 #define AUX_TIMER01_T0CFG_RELOAD_BITN 0 #define AUX_TIMER01_T0CFG_RELOAD_M 0x00000001 @@ -299,19 +300,27 @@ // // Timer 0 target value. // -// The timer increments as long as T0CNTR.VALUE is less than VALUE. It then -// generates an event which is high for one peripheral clock period. -// T0CFG.RELOAD decides if Timer 0 restarts. +// Manual Reload Mode: +// - Timer 0 increments until the counter value becomes equal to or greater +// than VALUE. +// - AUX_TIMER0_EV pulses high for 1 peripheral clock period when the counter +// value is equal to or greater than VALUE. // -// When VALUE and T0CFG.RELOAD are both 0, T0CNTR.VALUE stops as 1. Otherwise -// it stops at VALUE. +// Note: When VALUE is 0, Timer 0 counts to 1. AUX_TIMER0_EV pulses high for 1 +// peripheral clock period. // -// The AUX_TIMER0_EV event will always be set given that the timer is enabled -// with the following configuration: -// - T0CFG.MODE = 0 -// - T0CFG.PRE = 0 -// - T0CFG.RELOAD = 1 -// - VALUE = 1 +// Continuous Reload Mode: +// - Timer 0 increments until the counter value becomes equal to or greater +// than ( VALUE - 1), then restarts from 0. +// - AUX_TIMER0_EV pulses high for 1 peripheral clock period when the counter +// value is 0, except for when you enable the timer. +// +// Note: When VALUE is less than 2, Timer 0 counter value remains 0. +// AUX_TIMER0_EV goes high and remains high 1 peripheral clock period after you +// enable the timer. +// +// +// It is allowed to update the VALUE while the timer runs. #define AUX_TIMER01_T0TARGET_VALUE_W 16 #define AUX_TIMER01_T0TARGET_VALUE_M 0x0000FFFF #define AUX_TIMER01_T0TARGET_VALUE_S 0 @@ -337,8 +346,8 @@ // // Tick source polarity for Timer 1. // ENUMs: -// FALL Count on falling edges of TICK_SRC -// RISE Count on rising edges of TICK_SRC +// FALL Count on falling edges of TICK_SRC. +// RISE Count on rising edges of TICK_SRC. #define AUX_TIMER01_T1CFG_TICK_SRC_POL 0x00004000 #define AUX_TIMER01_T1CFG_TICK_SRC_POL_BITN 14 #define AUX_TIMER01_T1CFG_TICK_SRC_POL_M 0x00004000 @@ -518,14 +527,15 @@ // ENUMs: // CONT Continuous mode. // -// When T1CNTR.VALUE reaches -// T1TARGET.VALUE, T1CTL.EN remains 1. Timer 1 -// restarts automatically. +// Timer 1 restarts when the +// counter value becomes equal to or greater than +// ( T1TARGET.VALUE - 1). // MAN Manual mode. // -// When T1CNTR.VALUE reaches -// T1TARGET.VALUE, T1CTL.EN becomes 0. Timer 1 -// requires manual restart. +// Timer 1 stops and +// T1CTL.EN becomes 0 when the counter value +// becomes equal to or greater than +// T1TARGET.VALUE. #define AUX_TIMER01_T1CFG_RELOAD 0x00000001 #define AUX_TIMER01_T1CFG_RELOAD_BITN 0 #define AUX_TIMER01_T1CFG_RELOAD_M 0x00000001 @@ -560,19 +570,27 @@ // // Timer 1 target value. // -// The timer increments as long as T1CNTR.VALUE is less than VALUE. It then -// generates an event which is high for one peripheral clock period. -// T1CFG.RELOAD decides if Timer 1 restarts. +// Manual Reload Mode: +// - Timer 1 increments until the counter value becomes equal to or greater +// than VALUE. +// - AUX_TIMER1_EV pulses high for 1 peripheral clock period when the counter +// value is equal to or greater than VALUE. // -// When VALUE and T1CFG.RELOAD are both 0, T1CNTR.VALUE stops as 1. Otherwise -// it stops at VALUE. +// Note: When VALUE is 0, Timer 1 counts to 1. AUX_TIMER1_EV pulses high for 1 +// peripheral clock period. // -// The AUX_TIMER1_EV event will always be set given that the timer is enabled -// with the following configuration: -// - T1CFG.MODE = 0 -// - T1CFG.PRE = 0 -// - T1CFG.RELOAD = 1 -// - VALUE = 1 +// Continuous Reload Mode: +// - Timer 1 increments until the counter value becomes equal to or greater +// than ( VALUE - 1), then restarts from 0. +// - AUX_TIMER1_EV pulses high for 1 peripheral clock period when the counter +// value is 0, except for when you enable the timer. +// +// Note: When VALUE is less than 2, Timer 1 counter value remains 0. +// AUX_TIMER1_EV goes high and remains high 1 peripheral clock period after you +// enable the timer. +// +// +// It is allowed to update the VALUE while the timer runs. #define AUX_TIMER01_T1TARGET_VALUE_W 16 #define AUX_TIMER01_T1TARGET_VALUE_M 0x0000FFFF #define AUX_TIMER01_T1TARGET_VALUE_S 0 diff --git a/third_party/ti/devices/cc26x2/inc/hw_aux_timer2.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_timer2.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_aux_timer2.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_aux_timer2.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_ccfg.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ccfg.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_ccfg.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ccfg.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_ccfg_simple_struct.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ccfg_simple_struct.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_ccfg_simple_struct.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ccfg_simple_struct.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_chip_def.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_chip_def.h similarity index 82% rename from third_party/ti/devices/cc26x2/inc/hw_chip_def.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_chip_def.h index 901439716..1b68415c2 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_chip_def.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_chip_def.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_chip_def.h -* Revised: 2016-11-17 16:01:57 +0100 (Thu, 17 Nov 2016) -* Revision: 47704 +* Revised: 2017-06-26 09:33:33 +0200 (Mon, 26 Jun 2017) +* Revision: 49227 * * Description: Defines for device properties. * @@ -152,6 +152,45 @@ extern "C" #define CC_CHIP_ID 0x13500420 #elif defined(CC1350F128_R20) || defined(CC1350F128) #define CC_CHIP_ID 0x13500020 +/* CC2640R2F */ +#elif defined(CC2640R2FRGZ_R25) || defined(CC2640R2FRGZ) + #define CC_CHIP_ID 0x26401710 +#elif defined(CC2640R2FRHB_R25) || defined(CC2640R2FRHB) + #define CC_CHIP_ID 0x26401510 +#elif defined(CC2640R2FRSM_R25) || defined(CC2640R2FRSM) + #define CC_CHIP_ID 0x26401410 +#elif defined(CC2640R2F_R25) || defined(CC2640R2F) + #define CC_CHIP_ID 0x26401010 +/* CC2652R1F */ +#elif defined(CC2652R1FRGZ_R10) || defined(CC2652R1FRGZ) + #define CC_CHIP_ID 0x26523710 +#elif defined(CC2652R1F_R10) || defined(CC2652R1F) + #define CC_CHIP_ID 0x26523010 +/* CC2644R1F */ +#elif defined(CC2644R1FRGZ_R10) || defined(CC2644R1FRGZ) + #define CC_CHIP_ID 0x26443710 +#elif defined(CC2644R1F_R10) || defined(CC2644R1F) + #define CC_CHIP_ID 0x26443010 +/* CC2642R1F */ +#elif defined(CC2642R1FRGZ_R10) || defined(CC2642R1FRGZ) + #define CC_CHIP_ID 0x26423710 +#elif defined(CC2642R1F_R10) || defined(CC2642R1F) + #define CC_CHIP_ID 0x26423010 +/* CC1354R1F */ +#elif defined(CC1354R1FRGZ_R10) || defined(CC1354R1FRGZ) + #define CC_CHIP_ID 0x13543710 +#elif defined(CC1354R1F_R10) || defined(CC1354R1F) + #define CC_CHIP_ID 0x13543010 +/* CC1352R1F */ +#elif defined(CC1352R1FRGZ_R10) || defined(CC1352R1FRGZ) + #define CC_CHIP_ID 0x13523710 +#elif defined(CC1352R1F_R10) || defined(CC1352R1F) + #define CC_CHIP_ID 0x13523010 +/* CC1312R1F */ +#elif defined(CC1312R1FRGZ_R10) || defined(CC1312R1FRGZ) + #define CC_CHIP_ID 0x13123710 +#elif defined(CC1312R1F_R10) || defined(CC1312R1F) + #define CC_CHIP_ID 0x13123010 #endif #define CC_GET_CHIP_FAMILY 0x26 @@ -168,11 +207,8 @@ extern "C" #define CC_GET_CHIP_DEVICE (((CC_CHIP_ID) & 0xFFFF0000) >> 16) /* The chip family, option and package shall match the DriverLib release */ - #if (CC_GET_CHIP_FAMILY != ((CC_CHIP_ID & 0xFF000000) >> 24)) - #error "Specified chip family does not match DriverLib release" - #endif #if (CC_GET_CHIP_OPTION != ((CC_CHIP_ID & 0x0000F000) >> 12)) - #error "Specified chip option (OTP) does not match DriverLib release" + #error "Specified chip option does not match DriverLib release" #endif #if (CC_GET_CHIP_HWREV != ((CC_CHIP_ID & 0x000000FF) >> 0)) #error "Specified chip hardware revision does not match DriverLib release" diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_dwt.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_dwt.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_dwt.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_dwt.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_fpb.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_fpb.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_fpb.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_fpb.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_itm.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_itm.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_itm.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_itm.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_rom_table.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_rom_table.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_rom_table.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_rom_table.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_scs.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_scs.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_scs.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_scs.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_tiprop.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_tiprop.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_tiprop.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_tiprop.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_cpu_tpiu.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_tpiu.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_cpu_tpiu.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_cpu_tpiu.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_crypto.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_crypto.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_crypto.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_crypto.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_ddi.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ddi.h similarity index 99% rename from third_party/ti/devices/cc26x2/inc/hw_ddi.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ddi.h index 8b0d37c39..fc93c1164 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_ddi.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ddi.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_ddi.h -* Revised: 2016-07-07 19:12:02 +0200 (Thu, 07 Jul 2016) -* Revision: 46848 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/inc/hw_ddi_0_osc.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ddi_0_osc.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_ddi_0_osc.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ddi_0_osc.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_event.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_event.h similarity index 90% rename from third_party/ti/devices/cc26x2/inc/hw_event.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_event.h index b38c412e9..de107b545 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_event.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_event.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_event_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -337,7 +337,7 @@ // Output Selection for I2S Subscriber 0 #define EVENT_O_I2SSTMPSEL0 0x00000900 -// Output Selection for FRZ Subscriber 0 +// Output Selection for FRZ Subscriber #define EVENT_O_FRZSEL0 0x00000A00 // Set or Clear Software Events @@ -455,8 +455,6 @@ // AUX_EVENT0 AON wake up event. // MCU domain wakeup control // AON_EVENT:MCUWUSEL -// AUX domain wakeup control -// AON_EVENT:AUXWUSEL #define EVENT_CPUIRQSEL6_EV_W 7 #define EVENT_CPUIRQSEL6_EV_M 0x0000007F #define EVENT_CPUIRQSEL6_EV_S 0 @@ -522,7 +520,7 @@ // // Read only selection value // ENUMs: -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG #define EVENT_CPUIRQSEL10_EV_W 7 #define EVENT_CPUIRQSEL10_EV_M 0x0000007F @@ -574,8 +572,6 @@ // AUX_EVENT2 AON wake up event. // MCU domain wakeup control // AON_EVENT:MCUWUSEL -// AUX domain wakeup control -// AON_EVENT:AUXWUSEL #define EVENT_CPUIRQSEL13_EV_W 7 #define EVENT_CPUIRQSEL13_EV_M 0x0000007F #define EVENT_CPUIRQSEL13_EV_S 0 @@ -839,49 +835,55 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // CRYPTO_DMA_DONE_IRQ CRYPTO DMA input done event, the correspondingg // flag is CRYPTO:IRQSTAT.DMA_IN_DONE. Controlled // by CRYPTO:IRQEN.DMA_IN_DONE -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // DMA_CH18_DONE DMA done for software tiggered UDMA channel 18, // see UDMA0:SOFTREQ // DMA_CH0_DONE DMA done for software tiggered UDMA channel 0, see // UDMA0:SOFTREQ // AON_AUX_SWEV0 AUX Software event 0, AUX_EVCTL:SWEVSET.SWEV0 // I2S_IRQ Interrupt event from I2S -// AON_PROG2 AON programmable event 0. Event selected by +// AON_PROG2 AON programmable event 2. Event selected by // AON_EVENT MCU event selector, // AON_EVENT:EVTOMCUSEL.AON_PROG2_EV -// AON_PROG1 AON programmable event 0. Event selected by +// AON_PROG1 AON programmable event 1. Event selected by // AON_EVENT MCU event selector, // AON_EVENT:EVTOMCUSEL.AON_PROG1_EV // NONE Always inactive @@ -899,8 +901,6 @@ #define EVENT_CPUIRQSEL30_EV_AUX_TDC_DONE 0x0000006C #define EVENT_CPUIRQSEL30_EV_AUX_COMPB 0x0000006B #define EVENT_CPUIRQSEL30_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_CPUIRQSEL30_EV_RFC_IN_EV5 0x00000060 -#define EVENT_CPUIRQSEL30_EV_RFC_IN_EV4 0x0000005F #define EVENT_CPUIRQSEL30_EV_CRYPTO_DMA_DONE_IRQ 0x0000005E #define EVENT_CPUIRQSEL30_EV_AUX_TIMER2_PULSE 0x0000003C #define EVENT_CPUIRQSEL30_EV_AUX_TIMER2_EV3 0x0000003B @@ -941,8 +941,8 @@ // Read only selection value // ENUMs: // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS #define EVENT_CPUIRQSEL32_EV_W 7 #define EVENT_CPUIRQSEL32_EV_M 0x0000007F #define EVENT_CPUIRQSEL32_EV_S 0 @@ -987,7 +987,8 @@ // // Read only selection value // ENUMs: -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 #define EVENT_CPUIRQSEL35_EV_W 7 #define EVENT_CPUIRQSEL35_EV_M 0x0000007F #define EVENT_CPUIRQSEL35_EV_S 0 @@ -1168,43 +1169,51 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // SWEV1 Software event 1, triggered by SWEV.SWEV1 // SWEV0 Software event 0, triggered by SWEV.SWEV0 // CRYPTO_RESULT_AVAIL_IRQ CRYPTO result available interupt event, the // corresponding flag is found here // CRYPTO:IRQSTAT.RESULT_AVAIL. Controlled by // CRYPTO:IRQSTAT.RESULT_AVAIL -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // DMA_DONE_COMB Combined DMA done, corresponding flags are here // UDMA0:REQDONE // UART1_COMB UART1 combined interrupt, interrupt flags are @@ -1219,7 +1228,7 @@ // WDT:CTL.INTEN // AON_AUX_SWEV0 AUX Software event 0, AUX_EVCTL:SWEVSET.SWEV0 // I2S_IRQ Interrupt event from I2S -// AON_PROG1 AON programmable event 0. Event selected by +// AON_PROG1 AON programmable event 1. Event selected by // AON_EVENT MCU event selector, // AON_EVENT:EVTOMCUSEL.AON_PROG1_EV // AON_PROG0 AON programmable event 0. Event selected by @@ -1269,36 +1278,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT1 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT1 wil be routed here. @@ -1313,11 +1323,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -1336,7 +1351,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -1370,8 +1385,6 @@ #define EVENT_GPT0ACAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT0ACAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT0ACAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT0ACAPTSEL_EV_RFC_IN_EV5 0x00000060 -#define EVENT_GPT0ACAPTSEL_EV_RFC_IN_EV4 0x0000005F #define EVENT_GPT0ACAPTSEL_EV_PORT_EVENT1 0x00000056 #define EVENT_GPT0ACAPTSEL_EV_PORT_EVENT0 0x00000055 #define EVENT_GPT0ACAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -1412,36 +1425,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT1 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT1 wil be routed here. @@ -1456,11 +1470,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -1479,7 +1498,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -1513,8 +1532,6 @@ #define EVENT_GPT0BCAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT0BCAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT0BCAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT0BCAPTSEL_EV_RFC_IN_EV5 0x00000060 -#define EVENT_GPT0BCAPTSEL_EV_RFC_IN_EV4 0x0000005F #define EVENT_GPT0BCAPTSEL_EV_PORT_EVENT1 0x00000056 #define EVENT_GPT0BCAPTSEL_EV_PORT_EVENT0 0x00000055 #define EVENT_GPT0BCAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -1555,36 +1572,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT3 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT3 wil be routed here. @@ -1599,11 +1617,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -1622,7 +1645,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -1656,8 +1679,6 @@ #define EVENT_GPT1ACAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT1ACAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT1ACAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT1ACAPTSEL_EV_RFC_IN_EV5 0x00000060 -#define EVENT_GPT1ACAPTSEL_EV_RFC_IN_EV4 0x0000005F #define EVENT_GPT1ACAPTSEL_EV_PORT_EVENT3 0x00000058 #define EVENT_GPT1ACAPTSEL_EV_PORT_EVENT2 0x00000057 #define EVENT_GPT1ACAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -1698,36 +1719,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT3 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT3 wil be routed here. @@ -1742,11 +1764,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -1765,7 +1792,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -1799,8 +1826,6 @@ #define EVENT_GPT1BCAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT1BCAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT1BCAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT1BCAPTSEL_EV_RFC_IN_EV5 0x00000060 -#define EVENT_GPT1BCAPTSEL_EV_RFC_IN_EV4 0x0000005F #define EVENT_GPT1BCAPTSEL_EV_PORT_EVENT3 0x00000058 #define EVENT_GPT1BCAPTSEL_EV_PORT_EVENT2 0x00000057 #define EVENT_GPT1BCAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -1841,36 +1866,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV7 RFC RAT event 7, configured by RFC_RAT:RATEV.OEVT7 -// RFC_IN_EV6 RFC RAT event 6, configured by RFC_RAT:RATEV.OEVT6 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT5 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT4 wil be routed here. @@ -1885,11 +1911,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -1908,7 +1939,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -1942,8 +1973,6 @@ #define EVENT_GPT2ACAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT2ACAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT2ACAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT2ACAPTSEL_EV_RFC_IN_EV7 0x00000062 -#define EVENT_GPT2ACAPTSEL_EV_RFC_IN_EV6 0x00000061 #define EVENT_GPT2ACAPTSEL_EV_PORT_EVENT5 0x0000005A #define EVENT_GPT2ACAPTSEL_EV_PORT_EVENT4 0x00000059 #define EVENT_GPT2ACAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -1984,36 +2013,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV7 RFC RAT event 7, configured by RFC_RAT:RATEV.OEVT7 -// RFC_IN_EV6 RFC RAT event 6, configured by RFC_RAT:RATEV.OEVT6 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT5 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT4 wil be routed here. @@ -2028,11 +2058,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -2051,7 +2086,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -2085,8 +2120,6 @@ #define EVENT_GPT2BCAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT2BCAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT2BCAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT2BCAPTSEL_EV_RFC_IN_EV7 0x00000062 -#define EVENT_GPT2BCAPTSEL_EV_RFC_IN_EV6 0x00000061 #define EVENT_GPT2BCAPTSEL_EV_PORT_EVENT5 0x0000005A #define EVENT_GPT2BCAPTSEL_EV_PORT_EVENT4 0x00000059 #define EVENT_GPT2BCAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -2352,7 +2385,8 @@ // // Read only selection value // ENUMs: -// AUX_SW_DMABREQ AUX observation loopback +// AUX_SW_DMABREQ DMA sofware trigger from AUX, triggered by +// AUX_EVCTL:DMASWREQ.START #define EVENT_UDMACH8SSEL_EV_W 7 #define EVENT_UDMACH8SSEL_EV_M 0x0000007F #define EVENT_UDMACH8SSEL_EV_S 0 @@ -2367,7 +2401,8 @@ // // Read only selection value // ENUMs: -// AUX_SW_DMABREQ AUX observation loopback +// AUX_SW_DMABREQ DMA sofware trigger from AUX, triggered by +// AUX_EVCTL:DMASWREQ.START #define EVENT_UDMACH8BSEL_EV_W 7 #define EVENT_UDMACH8BSEL_EV_M 0x0000007F #define EVENT_UDMACH8BSEL_EV_S 0 @@ -2381,6 +2416,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2416,6 +2454,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2449,6 +2490,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2484,6 +2528,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2517,6 +2564,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2552,6 +2602,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2585,6 +2638,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2620,6 +2676,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_DMABREQ GPT3B DMA trigger event. Configured by GPT3:DMAEV @@ -2654,7 +2713,7 @@ // // Read only selection value // ENUMs: -// AON_PROG2 AON programmable event 0. Event selected by +// AON_PROG2 AON programmable event 2. Event selected by // AON_EVENT MCU event selector, // AON_EVENT:EVTOMCUSEL.AON_PROG2_EV #define EVENT_UDMACH13BSEL_EV_W 7 @@ -2670,6 +2729,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // CPU_HALTED CPU halted @@ -2679,31 +2741,32 @@ // AUX_EVCTL:DMACTL // AUX_DMASREQ DMA single request event from AUX, configured by // AUX_EVCTL:DMACTL -// AUX_SW_DMABREQ AUX observation loopback +// AUX_SW_DMABREQ DMA sofware trigger from AUX, triggered by +// AUX_EVCTL:DMASWREQ.START // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // TRNG_IRQ TRNG Interrupt event, controlled by TRNG:IRQEN.EN // SWEV3 Software event 3, triggered by SWEV.SWEV3 // SWEV2 Software event 2, triggered by SWEV.SWEV2 @@ -2711,10 +2774,6 @@ // SWEV0 Software event 0, triggered by SWEV.SWEV0 // WDT_NMI Watchdog non maskable interrupt event, controlled // by WDT:CTL.INTTYPE -// RFC_IN_EV7 RFC RAT event 7, configured by RFC_RAT:RATEV.OEVT7 -// RFC_IN_EV6 RFC RAT event 6, configured by RFC_RAT:RATEV.OEVT6 -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 // CRYPTO_DMA_DONE_IRQ CRYPTO DMA input done event, the correspondingg // flag is CRYPTO:IRQSTAT.DMA_IN_DONE. Controlled // by CRYPTO:IRQEN.DMA_IN_DONE @@ -2762,11 +2821,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_TX_DMASREQ UART1 TX DMA single request, controlled by // UART1:DMACTL.TXDMAE // UART1_TX_DMABREQ UART1 TX DMA burst request, controlled by @@ -2821,14 +2885,12 @@ // AUX_EVENT2 AON wake up event. // MCU domain wakeup control // AON_EVENT:MCUWUSEL -// AUX domain wakeup control -// AON_EVENT:AUXWUSEL // RFC_CPE_0 Combined Interrupt for CPE Generated events. // Corresponding flags are here // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -2861,10 +2923,10 @@ // AON_GPIO_EDGE Edge detect event from IOC. Configureded by the // IOC:IOCFGn.EDGE_IRQ_EN and IOC:IOCFGn.EDGE_DET // settings -// AON_PROG2 AON programmable event 0. Event selected by +// AON_PROG2 AON programmable event 2. Event selected by // AON_EVENT MCU event selector, // AON_EVENT:EVTOMCUSEL.AON_PROG2_EV -// AON_PROG1 AON programmable event 0. Event selected by +// AON_PROG1 AON programmable event 1. Event selected by // AON_EVENT MCU event selector, // AON_EVENT:EVTOMCUSEL.AON_PROG1_EV // AON_PROG0 AON programmable event 0. Event selected by @@ -2897,10 +2959,6 @@ #define EVENT_UDMACH14BSEL_EV_SWEV1 0x00000065 #define EVENT_UDMACH14BSEL_EV_SWEV0 0x00000064 #define EVENT_UDMACH14BSEL_EV_WDT_NMI 0x00000063 -#define EVENT_UDMACH14BSEL_EV_RFC_IN_EV7 0x00000062 -#define EVENT_UDMACH14BSEL_EV_RFC_IN_EV6 0x00000061 -#define EVENT_UDMACH14BSEL_EV_RFC_IN_EV5 0x00000060 -#define EVENT_UDMACH14BSEL_EV_RFC_IN_EV4 0x0000005F #define EVENT_UDMACH14BSEL_EV_CRYPTO_DMA_DONE_IRQ 0x0000005E #define EVENT_UDMACH14BSEL_EV_CRYPTO_RESULT_AVAIL_IRQ 0x0000005D #define EVENT_UDMACH14BSEL_EV_PORT_EVENT7 0x0000005C @@ -3193,36 +3251,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV7 RFC RAT event 7, configured by RFC_RAT:RATEV.OEVT7 -// RFC_IN_EV6 RFC RAT event 6, configured by RFC_RAT:RATEV.OEVT6 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT7 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT7 wil be routed here. @@ -3237,11 +3296,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -3260,7 +3324,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -3294,8 +3358,6 @@ #define EVENT_GPT3ACAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT3ACAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT3ACAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT3ACAPTSEL_EV_RFC_IN_EV7 0x00000062 -#define EVENT_GPT3ACAPTSEL_EV_RFC_IN_EV6 0x00000061 #define EVENT_GPT3ACAPTSEL_EV_PORT_EVENT7 0x0000005C #define EVENT_GPT3ACAPTSEL_EV_PORT_EVENT6 0x0000005B #define EVENT_GPT3ACAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -3336,36 +3398,37 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // AON_RTC_UPD RTC periodic event controlled by // AON_RTC:CTL.RTC_UPD_EN // AUX_ADC_IRQ AUX ADC interrupt event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_IRQ. Status flags -// are found here AUX_EVCTL:EVTOMCUFLAGS +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_IRQ. Status +// flags are found here AUX_EVCTL:EVTOMCUFLAGS // AUX_OBSMUX0 Loopback of OBSMUX0 through AUX, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.OBSMUX0 +// AUX_EVCTL:EVTOMCUFLAGS.MCU_OBSMUX0 // AUX_ADC_FIFO_ALMOST_FULL AUX ADC FIFO watermark event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL // AUX_ADC_DONE AUX ADC done, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.ADC_DONE +// AUX_EVCTL:EVTOMCUFLAGS.AUX_ADC_DONE // AUX_SMPH_AUTOTAKE_DONE Autotake event from AUX semaphore, configured by // AUX_SMPH:AUTOTAKE // AUX_TIMER1_EV AUX timer 1 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER1_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER1_EV // AUX_TIMER0_EV AUX timer 0 event, corresponds to -// AUX_EVCTL:EVTOMCUFLAGS.TIMER0_EV +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER0_EV // AUX_TDC_DONE AUX TDC measurement done event, corresponds to the -// flag AUX_EVCTL:EVTOMCUFLAGS.TDC_DONE and the -// AUX_TDC status AUX_TDC:STAT.DONE +// flag AUX_EVCTL:EVTOMCUFLAGS.AUX_TDC_DONE and +// the AUX_TDC status AUX_TDC:STAT.DONE // AUX_COMPB AUX Compare B event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPB // AUX_COMPA AUX Compare A event, corresponds to // AUX_EVCTL:EVTOMCUFLAGS.AUX_COMPA -// AUX_AON_WU_EV AON wakeup event, corresponds flags are here -// AUX_EVCTL:EVTOMCUFLAGS.AON_WU_EV -// RFC_IN_EV7 RFC RAT event 7, configured by RFC_RAT:RATEV.OEVT7 -// RFC_IN_EV6 RFC RAT event 6, configured by RFC_RAT:RATEV.OEVT6 +// AUX_AON_WU_EV AON wakeup event, the corresponding flag is here +// AUX_EVCTL:EVTOMCUFLAGS.AUX_WU_EV // PORT_EVENT7 Port capture event from IOC, configured by // IOC:IOCFGn.PORT_ID. Events on ports configured // with ENUM PORT_EVENT7 wil be routed here. @@ -3380,11 +3443,16 @@ // GPT1A_CMP GPT1A compare event. Configured by GPT1:TAMR.TCACT // GPT0B_CMP GPT0B compare event. Configured by GPT0:TBMR.TCACT // GPT0A_CMP GPT0A compare event. Configured by GPT0:TAMR.TCACT -// AUX_TIMER2_PULSE AUX Timer2 pulse -// AUX_TIMER2_EV3 AUX Timer2 event 3 -// AUX_TIMER2_EV2 AUX Timer2 event 2 -// AUX_TIMER2_EV1 AUX Timer2 event 1 -// AUX_TIMER2_EV0 AUX Timer2 event 0 +// AUX_TIMER2_PULSE AUX Timer2 pulse, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_PULSE +// AUX_TIMER2_EV3 AUX Timer2 event 3, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV3 +// AUX_TIMER2_EV2 AUX Timer2 event 2, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV2 +// AUX_TIMER2_EV1 AUX Timer2 event 1, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV1 +// AUX_TIMER2_EV0 AUX Timer2 event 0, corresponding to flag +// AUX_EVCTL:EVTOMCUFLAGS.AUX_TIMER2_EV0 // UART1_COMB UART1 combined interrupt, interrupt flags are // found here UART1:MIS // UART0_COMB UART0 combined interrupt, interrupt flags are @@ -3403,7 +3471,7 @@ // RFC_DBELL:RFCPEIFG. Only interrupts selected // with CPE0 in RFC_DBELL:RFCPEIFG can trigger a // RFC_CPE_0 event -// RFC_HW_COMB Combined RCF hardware interrupt, corresponding +// RFC_HW_COMB Combined RFC hardware interrupt, corresponding // flag is here RFC_DBELL:RFHWIFG // RFC_CMD_ACK RFC Doorbell Command Acknowledgement Interrupt, // equvialent to RFC_DBELL:RFACKIFG.ACKFLAG @@ -3437,8 +3505,6 @@ #define EVENT_GPT3BCAPTSEL_EV_AUX_COMPB 0x0000006B #define EVENT_GPT3BCAPTSEL_EV_AUX_COMPA 0x0000006A #define EVENT_GPT3BCAPTSEL_EV_AUX_AON_WU_EV 0x00000069 -#define EVENT_GPT3BCAPTSEL_EV_RFC_IN_EV7 0x00000062 -#define EVENT_GPT3BCAPTSEL_EV_RFC_IN_EV6 0x00000061 #define EVENT_GPT3BCAPTSEL_EV_PORT_EVENT7 0x0000005C #define EVENT_GPT3BCAPTSEL_EV_PORT_EVENT6 0x0000005B #define EVENT_GPT3BCAPTSEL_EV_GPT3B_CMP 0x00000044 @@ -3479,6 +3545,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // GPT3B_CMP GPT3B compare event. Configured by GPT3:TBMR.TCACT @@ -3544,21 +3613,16 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted -// RFC_IN_EV7 RFC RAT event 7, configured by RFC_RAT:RATEV.OEVT7 -// RFC_IN_EV6 RFC RAT event 6, configured by RFC_RAT:RATEV.OEVT6 -// RFC_IN_EV5 RFC RAT event 5, configured by RFC_RAT:RATEV.OEVT5 -// RFC_IN_EV4 RFC RAT event 4, configured by RFC_RAT:RATEV.OEVT4 // NONE Always inactive #define EVENT_I2SSTMPSEL0_EV_W 7 #define EVENT_I2SSTMPSEL0_EV_M 0x0000007F #define EVENT_I2SSTMPSEL0_EV_S 0 #define EVENT_I2SSTMPSEL0_EV_ALWAYS_ACTIVE 0x00000079 -#define EVENT_I2SSTMPSEL0_EV_RFC_IN_EV7 0x00000062 -#define EVENT_I2SSTMPSEL0_EV_RFC_IN_EV6 0x00000061 -#define EVENT_I2SSTMPSEL0_EV_RFC_IN_EV5 0x00000060 -#define EVENT_I2SSTMPSEL0_EV_RFC_IN_EV4 0x0000005F #define EVENT_I2SSTMPSEL0_EV_NONE 0x00000000 //***************************************************************************** @@ -3569,6 +3633,9 @@ // Field: [6:0] EV // // Read/write selection value +// +// Writing any other value than values defined by a ENUM may result in +// undefined behavior. // ENUMs: // ALWAYS_ACTIVE Always asserted // CPU_HALTED CPU halted diff --git a/third_party/ti/devices/cc26x2/inc/hw_fcfg1.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_fcfg1.h similarity index 90% rename from third_party/ti/devices/cc26x2/inc/hw_fcfg1.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_fcfg1.h index d11ca4fdd..cf8607cd8 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_fcfg1.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_fcfg1.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_fcfg1_h -* Revised: 2017-03-21 12:16:25 +0100 (Tue, 21 Mar 2017) -* Revision: 48667 +* Revised: 2018-04-16 11:16:52 +0200 (Mon, 16 Apr 2018) +* Revision: 51887 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -271,18 +271,24 @@ // Internal #define FCFG1_O_DAC_BIAS_CNF 0x0000040C -// Internal -#define FCFG1_O_DAC_CAL0 0x00000410 - -// Internal -#define FCFG1_O_DAC_CAL1 0x00000414 - // Internal #define FCFG1_O_TFW_PROBE 0x00000418 // Internal #define FCFG1_O_TFW_FT 0x0000041C +// Internal +#define FCFG1_O_DAC_CAL0 0x00000420 + +// Internal +#define FCFG1_O_DAC_CAL1 0x00000424 + +// Internal +#define FCFG1_O_DAC_CAL2 0x00000428 + +// Internal +#define FCFG1_O_DAC_CAL3 0x0000042C + //***************************************************************************** // // Register: FCFG1_O_MISC_CONF_1 @@ -504,6 +510,18 @@ #define FCFG1_CONFIG_SYNTH_DIV2_CC26_2G4_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV2_CC26_2G4_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV2_CC13_2G4 @@ -530,6 +548,18 @@ #define FCFG1_CONFIG_SYNTH_DIV2_CC13_2G4_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV2_CC13_2G4_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_2G4_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV2_CC26_1G @@ -556,6 +586,18 @@ #define FCFG1_CONFIG_SYNTH_DIV2_CC26_1G_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV2_CC26_1G_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC26_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV2_CC13_1G @@ -582,6 +624,18 @@ #define FCFG1_CONFIG_SYNTH_DIV2_CC13_1G_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV2_CC13_1G_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV2_CC13_1G_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV4_CC26 @@ -608,6 +662,18 @@ #define FCFG1_CONFIG_SYNTH_DIV4_CC26_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV4_CC26_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV4_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV4_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV4_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV4_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV4_CC13 @@ -634,6 +700,18 @@ #define FCFG1_CONFIG_SYNTH_DIV4_CC13_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV4_CC13_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV4_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV4_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV4_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV4_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV5 @@ -660,6 +738,17 @@ #define FCFG1_CONFIG_SYNTH_DIV5_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV5_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV5_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV5_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV5_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV5_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV6_CC26 @@ -686,6 +775,18 @@ #define FCFG1_CONFIG_SYNTH_DIV6_CC26_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV6_CC26_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV6_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV6_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV6_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV6_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV6_CC13 @@ -712,6 +813,18 @@ #define FCFG1_CONFIG_SYNTH_DIV6_CC13_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV6_CC13_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV6_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV6_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV6_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV6_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV10 @@ -738,6 +851,18 @@ #define FCFG1_CONFIG_SYNTH_DIV10_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV10_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV10_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV10_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV10_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV10_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV12_CC26 @@ -764,6 +889,18 @@ #define FCFG1_CONFIG_SYNTH_DIV12_CC26_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV12_CC26_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV12_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV12_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV12_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV12_CC26_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV12_CC13 @@ -790,6 +927,18 @@ #define FCFG1_CONFIG_SYNTH_DIV12_CC13_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV12_CC13_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV12_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV12_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV12_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV12_CC13_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV15 @@ -816,6 +965,18 @@ #define FCFG1_CONFIG_SYNTH_DIV15_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV15_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV15_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV15_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV15_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV15_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_CONFIG_SYNTH_DIV30 @@ -842,6 +1003,18 @@ #define FCFG1_CONFIG_SYNTH_DIV30_LDOVCO_TRIM_OUTPUT_M 0x00000FC0 #define FCFG1_CONFIG_SYNTH_DIV30_LDOVCO_TRIM_OUTPUT_S 6 +// Field: [5] RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N +// +// Internal. Only to be used through TI provided API. +#define FCFG1_CONFIG_SYNTH_DIV30_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV30_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_BITN \ + 5 +#define FCFG1_CONFIG_SYNTH_DIV30_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_M \ + 0x00000020 +#define FCFG1_CONFIG_SYNTH_DIV30_RFC_MDM_DEMIQMC0_TRIMCOMPLETE_N_S \ + 5 + //***************************************************************************** // // Register: FCFG1_O_FLASH_NUMBER @@ -1188,6 +1361,10 @@ // Field: [31:28] PG_REV // // Field used to distinguish revisions of the device. +// +// 0: Silicon revision 1.0 +// 1: Silicon revision 1.01 +// 2: Silicon revision 1.1 #define FCFG1_USER_ID_PG_REV_W 4 #define FCFG1_USER_ID_PG_REV_M 0xF0000000 #define FCFG1_USER_ID_PG_REV_S 28 @@ -1702,6 +1879,10 @@ // Field: [31:28] PG_REV // // Field used to distinguish revisions of the device. +// +// 0: Silicon revision 1.0 +// 1: Silicon revision 1.01 +// 2: Silicon revision 1.1 #define FCFG1_ICEPICK_DEVICE_ID_PG_REV_W 4 #define FCFG1_ICEPICK_DEVICE_ID_PG_REV_M 0xF0000000 #define FCFG1_ICEPICK_DEVICE_ID_PG_REV_S 28 @@ -2764,44 +2945,6 @@ #define FCFG1_DAC_BIAS_CNF_LPM_BIAS_BACKUP_EN_M 0x00000100 #define FCFG1_DAC_BIAS_CNF_LPM_BIAS_BACKUP_EN_S 8 -//***************************************************************************** -// -// Register: FCFG1_O_DAC_CAL0 -// -//***************************************************************************** -// Field: [31:16] SOC_DAC_VOUT_CAL_C1 -// -// Internal. Only to be used through TI provided API. -#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_C1_W 16 -#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_C1_M 0xFFFF0000 -#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_C1_S 16 - -// Field: [15:0] SOC_DAC_VOUT_CAL_C2 -// -// Internal. Only to be used through TI provided API. -#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_C2_W 16 -#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_C2_M 0x0000FFFF -#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_C2_S 0 - -//***************************************************************************** -// -// Register: FCFG1_O_DAC_CAL1 -// -//***************************************************************************** -// Field: [31:16] SOC_DAC_VOUT_CAL_C3 -// -// Internal. Only to be used through TI provided API. -#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_C3_W 16 -#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_C3_M 0xFFFF0000 -#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_C3_S 16 - -// Field: [15:0] SOC_DAC_VOUT_CAL_C4 -// -// Internal. Only to be used through TI provided API. -#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_C4_W 16 -#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_C4_M 0x0000FFFF -#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_C4_S 0 - //***************************************************************************** // // Register: FCFG1_O_TFW_PROBE @@ -2826,5 +2969,81 @@ #define FCFG1_TFW_FT_REV_M 0xFFFFFFFF #define FCFG1_TFW_FT_REV_S 0 +//***************************************************************************** +// +// Register: FCFG1_O_DAC_CAL0 +// +//***************************************************************************** +// Field: [31:16] SOC_DAC_VOUT_CAL_DECOUPLE_C2 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_DECOUPLE_C2_W 16 +#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_DECOUPLE_C2_M 0xFFFF0000 +#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_DECOUPLE_C2_S 16 + +// Field: [15:0] SOC_DAC_VOUT_CAL_DECOUPLE_C1 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_DECOUPLE_C1_W 16 +#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_DECOUPLE_C1_M 0x0000FFFF +#define FCFG1_DAC_CAL0_SOC_DAC_VOUT_CAL_DECOUPLE_C1_S 0 + +//***************************************************************************** +// +// Register: FCFG1_O_DAC_CAL1 +// +//***************************************************************************** +// Field: [31:16] SOC_DAC_VOUT_CAL_PRECH_C2 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_PRECH_C2_W 16 +#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_PRECH_C2_M 0xFFFF0000 +#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_PRECH_C2_S 16 + +// Field: [15:0] SOC_DAC_VOUT_CAL_PRECH_C1 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_PRECH_C1_W 16 +#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_PRECH_C1_M 0x0000FFFF +#define FCFG1_DAC_CAL1_SOC_DAC_VOUT_CAL_PRECH_C1_S 0 + +//***************************************************************************** +// +// Register: FCFG1_O_DAC_CAL2 +// +//***************************************************************************** +// Field: [31:16] SOC_DAC_VOUT_CAL_ADCREF_C2 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL2_SOC_DAC_VOUT_CAL_ADCREF_C2_W 16 +#define FCFG1_DAC_CAL2_SOC_DAC_VOUT_CAL_ADCREF_C2_M 0xFFFF0000 +#define FCFG1_DAC_CAL2_SOC_DAC_VOUT_CAL_ADCREF_C2_S 16 + +// Field: [15:0] SOC_DAC_VOUT_CAL_ADCREF_C1 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL2_SOC_DAC_VOUT_CAL_ADCREF_C1_W 16 +#define FCFG1_DAC_CAL2_SOC_DAC_VOUT_CAL_ADCREF_C1_M 0x0000FFFF +#define FCFG1_DAC_CAL2_SOC_DAC_VOUT_CAL_ADCREF_C1_S 0 + +//***************************************************************************** +// +// Register: FCFG1_O_DAC_CAL3 +// +//***************************************************************************** +// Field: [31:16] SOC_DAC_VOUT_CAL_VDDS_C2 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL3_SOC_DAC_VOUT_CAL_VDDS_C2_W 16 +#define FCFG1_DAC_CAL3_SOC_DAC_VOUT_CAL_VDDS_C2_M 0xFFFF0000 +#define FCFG1_DAC_CAL3_SOC_DAC_VOUT_CAL_VDDS_C2_S 16 + +// Field: [15:0] SOC_DAC_VOUT_CAL_VDDS_C1 +// +// Internal. Only to be used through TI provided API. +#define FCFG1_DAC_CAL3_SOC_DAC_VOUT_CAL_VDDS_C1_W 16 +#define FCFG1_DAC_CAL3_SOC_DAC_VOUT_CAL_VDDS_C1_M 0x0000FFFF +#define FCFG1_DAC_CAL3_SOC_DAC_VOUT_CAL_VDDS_C1_S 0 + #endif // __FCFG1__ diff --git a/third_party/ti/devices/cc26x2/inc/hw_flash.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_flash.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_flash.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_flash.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_gpio.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpio.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_gpio.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpio.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_gpram.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpram.h similarity index 95% rename from third_party/ti/devices/cc26x2/inc/hw_gpram.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpram.h index 3495b622d..e21892a0c 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_gpram.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpram.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_gpram_h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: 2017-05-06 20:38:09 +0200 (Sat, 06 May 2017) +* Revision: 48921 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/inc/hw_gpt.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpt.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_gpt.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_gpt.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_i2c.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_i2c.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_i2c.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_i2c.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_i2s.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_i2s.h similarity index 97% rename from third_party/ti/devices/cc26x2/inc/hw_i2s.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_i2s.h index 1750b69ac..9886e95a6 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_i2s.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_i2s.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_i2s_h -* Revised: 2017-05-04 21:56:26 +0200 (Thu, 04 May 2017) -* Revision: 48904 +* Revised: 2017-11-02 10:21:28 +0100 (Thu, 02 Nov 2017) +* Revision: 50141 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -115,7 +115,7 @@ // Internal #define I2S_O_STMPXCNTCAPT1 0x00000064 -// Captured WCLK Counter Value, Capture Channel 1 +// Internal #define I2S_O_STMPWCNTCAPT1 0x00000068 // Interrupt Mask Register @@ -184,22 +184,6 @@ // Register: I2S_O_AIFDIRCFG // //***************************************************************************** -// Field: [9:8] AD2 -// -// Configures the AD2 audio data pin usage -// -// 0x3: Reserved -// ENUMs: -// OUT Output mode -// IN Input mode -// DIS Not in use (disabled) -#define I2S_AIFDIRCFG_AD2_W 2 -#define I2S_AIFDIRCFG_AD2_M 0x00000300 -#define I2S_AIFDIRCFG_AD2_S 8 -#define I2S_AIFDIRCFG_AD2_OUT 0x00000200 -#define I2S_AIFDIRCFG_AD2_IN 0x00000100 -#define I2S_AIFDIRCFG_AD2_DIS 0x00000000 - // Field: [5:4] AD1 // // Configures the AD1 audio data pin usage: @@ -242,7 +226,7 @@ // The number of BCLK periods between a WCLK edge and MSB of the first word in // a phase: // -// 0x00: LJF format +// 0x00: LJF and DSP format // 0x01: I2S and DSP format // 0x02: RJF format // ... @@ -707,8 +691,7 @@ //***************************************************************************** // Field: [15:0] CAPT_VALUE // -// Channel 1 is idle and can not be sampled from an external event as with -// Channel 0 STMPWCNTCAPT0 +// Internal. Only to be used through TI provided API. #define I2S_STMPWCNTCAPT1_CAPT_VALUE_W 16 #define I2S_STMPWCNTCAPT1_CAPT_VALUE_M 0x0000FFFF #define I2S_STMPWCNTCAPT1_CAPT_VALUE_S 0 diff --git a/third_party/ti/devices/cc26x2/inc/hw_ints.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ints.h similarity index 97% rename from third_party/ti/devices/cc26x2/inc/hw_ints.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ints.h index fffd39382..b5d10df81 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_ints.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ints.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_ints_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -65,7 +65,7 @@ #define INT_SSI1_COMB 24 // SSI1 combined interrupt #define INT_RFC_CPE_0 25 // Combined Interrupt for CPE // Generated events -#define INT_RFC_HW_COMB 26 // Combined RCF hardware interrupt +#define INT_RFC_HW_COMB 26 // Combined RFC hardware interrupt #define INT_RFC_CMD_ACK 27 // RFC Doorbell Command // Acknowledgement Interrupt #define INT_I2S_IRQ 28 // Interrupt event from I2S diff --git a/third_party/ti/devices/cc26x2/inc/hw_ioc.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ioc.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_ioc.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ioc.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_memmap.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_memmap.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_memmap.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_memmap.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_nvic.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_nvic.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_nvic.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_nvic.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_pka.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka.h similarity index 99% rename from third_party/ti/devices/cc26x2/inc/hw_pka.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka.h index 7e88b5ec0..f8039bb21 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_pka.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_pka_h -* Revised: 2017-01-18 10:54:28 +0100 (Wed, 18 Jan 2017) -* Revision: 48276 +* Revised: 2017-09-14 10:33:07 +0200 (Thu, 14 Sep 2017) +* Revision: 49733 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -231,7 +231,7 @@ // These bits select the complex sequencer operation to perform: // 0x0: None // 0x1: ExpMod-CRT -// 0x2: ExpMod-ACT4 +// 0x2: ECmontMUL // 0x3: ECC-ADD (if available in firmware, otherwise reserved) // 0x4: ExpMod-ACT2 // 0x5: ECC-MUL (if available in firmware, otherwise reserved) diff --git a/third_party/ti/devices/cc26x2/inc/hw_pka_int.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka_int.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_pka_int.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka_int.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_pka_ram.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka_ram.h similarity index 95% rename from third_party/ti/devices/cc26x2/inc/hw_pka_ram.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka_ram.h index bf6384222..a19b23654 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_pka_ram.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_pka_ram.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_pka_ram_h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: 2017-05-06 20:38:09 +0200 (Sat, 06 May 2017) +* Revision: 48921 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x2/inc/hw_prcm.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_prcm.h similarity index 99% rename from third_party/ti/devices/cc26x2/inc/hw_prcm.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_prcm.h index 65904b5fb..eaf43ab1c 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_prcm.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_prcm.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_prcm_h -* Revised: 2017-05-04 11:51:48 +0200 (Thu, 04 May 2017) -* Revision: 48895 +* Revised: 2017-09-14 10:33:07 +0200 (Thu, 14 Sep 2017) +* Revision: 49733 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -1411,7 +1411,7 @@ // Field: [0] EN // // -// 0: MCLK, BCLK and **WCLK** will be static low +// 0: MCLK, BCLK and WCLK will be static low // 1: Enables the generation of MCLK, BCLK and WCLK // // For changes to take effect, CLKLOADCTL.LOAD needs to be written diff --git a/third_party/ti/devices/cc26x2/inc/hw_rfc_dbell.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_dbell.h similarity index 97% rename from third_party/ti/devices/cc26x2/inc/hw_rfc_dbell.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_dbell.h index 9ae6952f7..c586325f0 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_rfc_dbell.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_dbell.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_rfc_dbell_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2018-04-16 11:16:52 +0200 (Mon, 16 Apr 2018) +* Revision: 51887 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -585,23 +585,22 @@ #define RFC_DBELL_RFCPEIFG_IRQ14_M 0x00004000 #define RFC_DBELL_RFCPEIFG_IRQ14_S 14 -// Field: [13] IRQ13 +// Field: [13] FG_COMMAND_STARTED // -// Interrupt flag 13. Write zero to clear flag. Write to one has no effect. -#define RFC_DBELL_RFCPEIFG_IRQ13 0x00002000 -#define RFC_DBELL_RFCPEIFG_IRQ13_BITN 13 -#define RFC_DBELL_RFCPEIFG_IRQ13_M 0x00002000 -#define RFC_DBELL_RFCPEIFG_IRQ13_S 13 +// Interrupt flag 13. IEEE 802.15.4 mode only: A foreground radio operation +// command has gone into active state. +#define RFC_DBELL_RFCPEIFG_FG_COMMAND_STARTED 0x00002000 +#define RFC_DBELL_RFCPEIFG_FG_COMMAND_STARTED_BITN 13 +#define RFC_DBELL_RFCPEIFG_FG_COMMAND_STARTED_M 0x00002000 +#define RFC_DBELL_RFCPEIFG_FG_COMMAND_STARTED_S 13 -// Field: [12] BG_COMMAND_SUSPENDED +// Field: [12] COMMAND_STARTED // -// Interrupt flag 12. IEEE 802.15.4 mode only: A background level radio -// operation command has been suspended. Write zero to clear flag. Write to one -// has no effect. -#define RFC_DBELL_RFCPEIFG_BG_COMMAND_SUSPENDED 0x00001000 -#define RFC_DBELL_RFCPEIFG_BG_COMMAND_SUSPENDED_BITN 12 -#define RFC_DBELL_RFCPEIFG_BG_COMMAND_SUSPENDED_M 0x00001000 -#define RFC_DBELL_RFCPEIFG_BG_COMMAND_SUSPENDED_S 12 +// Interrupt flag 12. A radio operation command has gone into active state. +#define RFC_DBELL_RFCPEIFG_COMMAND_STARTED 0x00001000 +#define RFC_DBELL_RFCPEIFG_COMMAND_STARTED_BITN 12 +#define RFC_DBELL_RFCPEIFG_COMMAND_STARTED_M 0x00001000 +#define RFC_DBELL_RFCPEIFG_COMMAND_STARTED_S 12 // Field: [11] TX_BUFFER_CHANGED // @@ -867,21 +866,21 @@ #define RFC_DBELL_RFCPEIEN_IRQ14_M 0x00004000 #define RFC_DBELL_RFCPEIEN_IRQ14_S 14 -// Field: [13] IRQ13 +// Field: [13] FG_COMMAND_STARTED // -// Interrupt enable for RFCPEIFG.IRQ13. -#define RFC_DBELL_RFCPEIEN_IRQ13 0x00002000 -#define RFC_DBELL_RFCPEIEN_IRQ13_BITN 13 -#define RFC_DBELL_RFCPEIEN_IRQ13_M 0x00002000 -#define RFC_DBELL_RFCPEIEN_IRQ13_S 13 +// Interrupt enable for RFCPEIFG.FG_COMMAND_STARTED. +#define RFC_DBELL_RFCPEIEN_FG_COMMAND_STARTED 0x00002000 +#define RFC_DBELL_RFCPEIEN_FG_COMMAND_STARTED_BITN 13 +#define RFC_DBELL_RFCPEIEN_FG_COMMAND_STARTED_M 0x00002000 +#define RFC_DBELL_RFCPEIEN_FG_COMMAND_STARTED_S 13 -// Field: [12] BG_COMMAND_SUSPENDED +// Field: [12] COMMAND_STARTED // -// Interrupt enable for RFCPEIFG.BG_COMMAND_SUSPENDED. -#define RFC_DBELL_RFCPEIEN_BG_COMMAND_SUSPENDED 0x00001000 -#define RFC_DBELL_RFCPEIEN_BG_COMMAND_SUSPENDED_BITN 12 -#define RFC_DBELL_RFCPEIEN_BG_COMMAND_SUSPENDED_M 0x00001000 -#define RFC_DBELL_RFCPEIEN_BG_COMMAND_SUSPENDED_S 12 +// Interrupt enable for RFCPEIFG.COMMAND_STARTED. +#define RFC_DBELL_RFCPEIEN_COMMAND_STARTED 0x00001000 +#define RFC_DBELL_RFCPEIEN_COMMAND_STARTED_BITN 12 +#define RFC_DBELL_RFCPEIEN_COMMAND_STARTED_M 0x00001000 +#define RFC_DBELL_RFCPEIEN_COMMAND_STARTED_S 12 // Field: [11] TX_BUFFER_CHANGED // @@ -1266,36 +1265,37 @@ #define RFC_DBELL_RFCPEISL_IRQ14_CPE1 0x00004000 #define RFC_DBELL_RFCPEISL_IRQ14_CPE0 0x00000000 -// Field: [13] IRQ13 +// Field: [13] FG_COMMAND_STARTED // -// Select which CPU interrupt vector the RFCPEIFG.IRQ13 interrupt should use. +// Select which CPU interrupt vector the RFCPEIFG.FG_COMMAND_STARTED interrupt +// should use. // ENUMs: // CPE1 Associate this interrupt line with INT_RF_CPE1 // interrupt vector // CPE0 Associate this interrupt line with INT_RF_CPE0 // interrupt vector -#define RFC_DBELL_RFCPEISL_IRQ13 0x00002000 -#define RFC_DBELL_RFCPEISL_IRQ13_BITN 13 -#define RFC_DBELL_RFCPEISL_IRQ13_M 0x00002000 -#define RFC_DBELL_RFCPEISL_IRQ13_S 13 -#define RFC_DBELL_RFCPEISL_IRQ13_CPE1 0x00002000 -#define RFC_DBELL_RFCPEISL_IRQ13_CPE0 0x00000000 +#define RFC_DBELL_RFCPEISL_FG_COMMAND_STARTED 0x00002000 +#define RFC_DBELL_RFCPEISL_FG_COMMAND_STARTED_BITN 13 +#define RFC_DBELL_RFCPEISL_FG_COMMAND_STARTED_M 0x00002000 +#define RFC_DBELL_RFCPEISL_FG_COMMAND_STARTED_S 13 +#define RFC_DBELL_RFCPEISL_FG_COMMAND_STARTED_CPE1 0x00002000 +#define RFC_DBELL_RFCPEISL_FG_COMMAND_STARTED_CPE0 0x00000000 -// Field: [12] BG_COMMAND_SUSPENDED +// Field: [12] COMMAND_STARTED // -// Select which CPU interrupt vector the RFCPEIFG.BG_COMMAND_SUSPENDED -// interrupt should use. +// Select which CPU interrupt vector the RFCPEIFG.COMMAND_STARTED interrupt +// should use. // ENUMs: // CPE1 Associate this interrupt line with INT_RF_CPE1 // interrupt vector // CPE0 Associate this interrupt line with INT_RF_CPE0 // interrupt vector -#define RFC_DBELL_RFCPEISL_BG_COMMAND_SUSPENDED 0x00001000 -#define RFC_DBELL_RFCPEISL_BG_COMMAND_SUSPENDED_BITN 12 -#define RFC_DBELL_RFCPEISL_BG_COMMAND_SUSPENDED_M 0x00001000 -#define RFC_DBELL_RFCPEISL_BG_COMMAND_SUSPENDED_S 12 -#define RFC_DBELL_RFCPEISL_BG_COMMAND_SUSPENDED_CPE1 0x00001000 -#define RFC_DBELL_RFCPEISL_BG_COMMAND_SUSPENDED_CPE0 0x00000000 +#define RFC_DBELL_RFCPEISL_COMMAND_STARTED 0x00001000 +#define RFC_DBELL_RFCPEISL_COMMAND_STARTED_BITN 12 +#define RFC_DBELL_RFCPEISL_COMMAND_STARTED_M 0x00001000 +#define RFC_DBELL_RFCPEISL_COMMAND_STARTED_S 12 +#define RFC_DBELL_RFCPEISL_COMMAND_STARTED_CPE1 0x00001000 +#define RFC_DBELL_RFCPEISL_COMMAND_STARTED_CPE0 0x00000000 // Field: [11] TX_BUFFER_CHANGED // diff --git a/third_party/ti/devices/cc26x2/inc/hw_rfc_pwr.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_pwr.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_rfc_pwr.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_pwr.h diff --git a/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_rat.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_rat.h new file mode 100644 index 000000000..f3f6f1dcc --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_rat.h @@ -0,0 +1,198 @@ +/****************************************************************************** +* Filename: hw_rfc_rat_h +* Revised: 2018-04-16 11:16:52 +0200 (Mon, 16 Apr 2018) +* Revision: 51887 +* +* Copyright (c) 2015 - 2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef __HW_RFC_RAT_H__ +#define __HW_RFC_RAT_H__ + +//***************************************************************************** +// +// This section defines the register offsets of +// RFC_RAT component +// +//***************************************************************************** +// Radio Timer Counter Value +#define RFC_RAT_O_RATCNT 0x00000004 + +// Timer Channel 0 Capture/Compare Register +#define RFC_RAT_O_RATCH0VAL 0x00000080 + +// Timer Channel 1 Capture/Compare Register +#define RFC_RAT_O_RATCH1VAL 0x00000084 + +// Timer Channel 2 Capture/Compare Register +#define RFC_RAT_O_RATCH2VAL 0x00000088 + +// Timer Channel 3 Capture/Compare Register +#define RFC_RAT_O_RATCH3VAL 0x0000008C + +// Timer Channel 4 Capture/Compare Register +#define RFC_RAT_O_RATCH4VAL 0x00000090 + +// Timer Channel 5 Capture/Compare Register +#define RFC_RAT_O_RATCH5VAL 0x00000094 + +// Timer Channel 6 Capture/Compare Register +#define RFC_RAT_O_RATCH6VAL 0x00000098 + +// Timer Channel 7 Capture/Compare Register +#define RFC_RAT_O_RATCH7VAL 0x0000009C + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCNT +// +//***************************************************************************** +// Field: [31:0] CNT +// +// Counter value. This is not writable while radio timer counter is enabled. +#define RFC_RAT_RATCNT_CNT_W 32 +#define RFC_RAT_RATCNT_CNT_M 0xFFFFFFFF +#define RFC_RAT_RATCNT_CNT_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH0VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH0VAL_VAL_W 32 +#define RFC_RAT_RATCH0VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH0VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH1VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH1VAL_VAL_W 32 +#define RFC_RAT_RATCH1VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH1VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH2VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH2VAL_VAL_W 32 +#define RFC_RAT_RATCH2VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH2VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH3VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH3VAL_VAL_W 32 +#define RFC_RAT_RATCH3VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH3VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH4VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH4VAL_VAL_W 32 +#define RFC_RAT_RATCH4VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH4VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH5VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH5VAL_VAL_W 32 +#define RFC_RAT_RATCH5VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH5VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH6VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH6VAL_VAL_W 32 +#define RFC_RAT_RATCH6VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH6VAL_VAL_S 0 + +//***************************************************************************** +// +// Register: RFC_RAT_O_RATCH7VAL +// +//***************************************************************************** +// Field: [31:0] VAL +// +// Capture/compare value. Only writable when the channel is configured for +// compare mode. In compare mode, a write to this register will auto-arm the +// channel. +#define RFC_RAT_RATCH7VAL_VAL_W 32 +#define RFC_RAT_RATCH7VAL_VAL_M 0xFFFFFFFF +#define RFC_RAT_RATCH7VAL_VAL_S 0 + + +#endif // __RFC_RAT__ diff --git a/third_party/ti/devices/cc26x2/inc/hw_rfc_ullram.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_ullram.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_rfc_ullram.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_rfc_ullram.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_smph.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_smph.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_smph.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_smph.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_sram_mmr.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_sram_mmr.h similarity index 86% rename from third_party/ti/devices/cc26x2/inc/hw_sram_mmr.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_sram_mmr.h index 1477c8ff3..c57de092e 100644 --- a/third_party/ti/devices/cc26x2/inc/hw_sram_mmr.h +++ b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_sram_mmr.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_sram_mmr_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 +* Revised: 2018-04-16 11:16:52 +0200 (Mon, 16 Apr 2018) +* Revision: 51887 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -64,8 +64,8 @@ // // Parity Status Disable // -// 0: A parity error will update PER_CHK_PER_ADDR field -// 1: Parity error does not update PER_CHK_PER_ADDR field +// 0: A parity error will update PER_CHK.PER_ADDR field +// 1: Parity error does not update PER_CHK.PER_ADDR field #define SRAM_MMR_PER_CTL_PER_DISABLE 0x00000100 #define SRAM_MMR_PER_CTL_PER_DISABLE_BITN 8 #define SRAM_MMR_PER_CTL_PER_DISABLE_M 0x00000100 @@ -76,7 +76,7 @@ // Parity Error Debug Enable // // 0: Normal operation -// 1: An address offset can be written to PER_DBG:PER_DEBUG_ADDR and parity +// 1: An address offset can be written to PER_DBG.PER_DEBUG_ADDR and parity // errors will be generated on reads from within this offset #define SRAM_MMR_PER_CTL_PER_DEBUG_ENABLE 0x00000001 #define SRAM_MMR_PER_CTL_PER_DEBUG_ENABLE_BITN 0 @@ -92,7 +92,10 @@ // // Parity Error Address Offset // Returns the last address offset which resulted in a parity error during an -// SRAM read. +// SRAM read. The address offset returned is always the word-aligned address +// that contains the location with the parity error. For parity faults on non +// word-aligned accesses, CPU_SCS:BFAR.ADDRESS will hold the address of the +// location that resulted in parity error. #define SRAM_MMR_PER_CHK_PER_ADDR_W 24 #define SRAM_MMR_PER_CHK_PER_ADDR_M 0x00FFFFFF #define SRAM_MMR_PER_CHK_PER_ADDR_S 0 @@ -105,9 +108,11 @@ // Field: [23:0] PER_DEBUG_ADDR // // Debug Parity Error Address Offset -// When PER_CTL:PER_DEBUG is 1, this field is used to set an address offset so -// that writes to this address offset followed by reads from within this -// address offset will result in parity errors. +// When PER_CTL.PER_DEBUG is 1, this field is used to set a parity debug +// address offset. The address offset must be a word-aligned address. Writes +// within this address offset will force incorrect parity bits to be stored +// together with the data written. The following reads within this same address +// offset will thus result in parity errors to be generated. #define SRAM_MMR_PER_DBG_PER_DEBUG_ADDR_W 24 #define SRAM_MMR_PER_DBG_PER_DEBUG_ADDR_M 0x00FFFFFF #define SRAM_MMR_PER_DBG_PER_DEBUG_ADDR_S 0 diff --git a/third_party/ti/devices/cc26x2/inc/hw_ssi.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_ssi.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_ssi.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_ssi.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_sysctl.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_sysctl.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_sysctl.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_sysctl.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_trng.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_trng.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_trng.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_trng.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_types.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_types.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_types.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_types.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_uart.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_uart.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_uart.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_uart.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_udma.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_udma.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_udma.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_udma.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_vims.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_vims.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_vims.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_vims.h diff --git a/third_party/ti/devices/cc26x2/inc/hw_wdt.h b/third_party/ti/devices/cc13x2_cc26x2/inc/hw_wdt.h similarity index 100% rename from third_party/ti/devices/cc26x2/inc/hw_wdt.h rename to third_party/ti/devices/cc13x2_cc26x2/inc/hw_wdt.h diff --git a/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.cmd b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.cmd similarity index 100% rename from third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.cmd rename to third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.cmd diff --git a/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.icf b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.icf similarity index 100% rename from third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.icf rename to third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.icf diff --git a/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.lds b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds similarity index 93% rename from third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.lds rename to third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds index 4a0f82ea8..c7523613b 100644 --- a/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.lds +++ b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds @@ -2,8 +2,8 @@ @file cc26x2r1f.lds @brief CC26x2R1F linker configuration file for GNU compiler. - Revised $Date: 2017-02-06 11:55:41 +0100 (ma, 06 feb 2017) $ - Revision $Revision: 17642 $ + Revised $Date: 2017-08-07 11:45:00 +0200 (ma, 07 aug 2017) $ + Revision $Revision: 17871 $ This file is auto-generated. @@ -90,6 +90,14 @@ SECTIONS *(.ARM.extab* .gnu.linkonce.armextab.*) } > FLASH + .init_array : + { + _init_array = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array*)) + _einit_array = .; + } > FLASH + .data : { _data = .; diff --git a/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.sct b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.sct similarity index 100% rename from third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.sct rename to third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.sct diff --git a/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f_ram.icf b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f_ram.icf new file mode 100644 index 000000000..742819ec1 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f_ram.icf @@ -0,0 +1,143 @@ +//***************************************************************************** +//! @file cc26x2r1f.icf +//! @brief CC26x2R1F linker file for IAR EWARM. +//! +//! Revised $Date: 2017-02-06 11:55:41 +0100 (ma, 06 feb 2017) $ +//! Revision $Revision: 17642 $ +// +// This file is auto-generated. +// +// Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ +// +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions +// are met: +// +// Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// Neither the name of Texas Instruments Incorporated nor the names of +// its contributors may be used to endorse or promote products derived +// from this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +//****************************************************************************/ + + +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x20000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x00057FFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20013FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; +define symbol __ICFEDIT_size_heap__ = 0x1000; +/**** End of ICF editor section. ###ICF###*/ + +define symbol __GPRAM_START__ = 0x11000000; +define symbol __GPRAM_END__ = 0x11001FFF; + +// +// Define a memory region that covers the entire 4 GB addressable space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +// +// Place the interrupt vectors at the start of flash. +// +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; +keep { section .intvec }; + +// +// Place the CCFG area at the end of flash +// +//place at end of FLASH_region { readonly section .ccfg }; +//keep { section .ccfg }; + +// +// Place remaining 'read only' in RAM +// +place in SRAM_region { readonly }; + + +// +// Place .vtable_ram in start of RAM +// +//place at start of SRAM_region { section .vtable_ram }; + +// +// Define CSTACK block to contain .stack section. This enables the IAR IDE +// to properly show the stack content during debug. Place stack at end of +// retention RAM, do not initialize (initializing the stack will destroy the +// return address from the initialization code, causing the processor to branch +// to zero and fault) +// +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { section .stack }; +place at end of SRAM_region { block CSTACK }; +do not initialize { section .stack, section .noinit}; + +// +// Export stack top symbol. Used by startup file. +// +define exported symbol STACK_TOP = __ICFEDIT_region_RAM_end__ + 1; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +place in SRAM_region { block HEAP }; + +// +// Place all read/write items into RAM. +// +place in SRAM_region { readwrite }; +//initialize by copy { readwrite }; + +// +// The USE_TIRTOS_ROM symbol is defined internally in the build flow (using +// --config_def USE_TIRTOS_ROM=1) for TI-RTOS applications whose app.cfg file +// specifies to use the ROM. +// +if (isdefinedsymbol(USE_TIRTOS_ROM)) { + include "TIRTOS_ROM.icf"; +} + +// +// Define a region for the on-chip GPRAM/cache. +// Application can use this region as RAM if cache is disabled in the CCFG +// (DEFAULT_CCFG_SIZE_AND_DIS_FLAGS.SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM = 0) +// +define region GPRAM_region = mem:[from __GPRAM_START__ to __GPRAM_END__]; +place in GPRAM_region {section .gpram}; diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_ble.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_ble.h new file mode 100644 index 000000000..bf7a27935 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_ble.h @@ -0,0 +1,321 @@ +/****************************************************************************** +* Filename: rf_patch_cpe_ble.h +* Revised: $Date: 2018-05-07 15:02:01 +0200 (ma, 07 mai 2018) $ +* Revision: $Revision: 18438 $ +* +* Description: RF core patch for Bluetooth low energy version 4.0, 4.1, and 4.2 support ("BLE" API command set) in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2018, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_CPE_BLE_H +#define _RF_PATCH_CPE_BLE_H + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include + +#ifndef CPE_PATCH_TYPE +#define CPE_PATCH_TYPE static const uint32_t +#endif + +#ifndef SYS_PATCH_TYPE +#define SYS_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef _APPLY_PATCH_TAB +#define _APPLY_PATCH_TAB +#endif + + +CPE_PATCH_TYPE patchImageBle[] = { + 0x210040c9, + 0x21004141, + 0x21004073, + 0x21004061, + 0x21004209, + 0x2100421d, + 0x21004237, + 0x210040ad, + 0xb081b5ff, + 0x9d0a4803, + 0xb5f84700, + 0x48024684, + 0x47004613, + 0x00007f43, + 0x00005145, + 0x2270480b, + 0x43916801, + 0x43112240, + 0x48096001, + 0x48094700, + 0x460c7801, + 0x43912208, + 0xf0007001, + 0x4805f803, + 0xbd107004, + 0x4804b510, + 0x00004700, + 0x40043018, + 0x0000710f, + 0x210000b3, + 0x00005603, + 0x4801b510, + 0x00004700, + 0x000009df, + 0x49044803, + 0x05c068c0, + 0x47880fc0, + 0x47084902, + 0x21000340, + 0x000087d1, + 0x000053cd, + 0x4614b5f8, + 0x9b06461a, + 0x46139300, + 0xf7ff4622, + 0x9000ffb5, + 0xd12d2800, + 0x6848492e, + 0xd0292800, + 0x00498809, + 0x43411b09, + 0x68c0482b, + 0x00640844, + 0x20187922, + 0xb2c61a80, + 0x04802001, + 0x0cc71808, + 0x46317965, + 0xf0004825, + 0x4824f8a1, + 0x19832201, + 0x408a1e69, + 0x21182000, + 0xe0071b8e, + 0x19090041, + 0x437988c9, + 0x40e91889, + 0x1c405419, + 0xdcf54286, + 0x4780481b, + 0xbdf89800, + 0xf7ffb510, + 0x4604ff84, + 0x20004914, + 0x60484a17, + 0x88006810, + 0x28030b00, + 0x0760d01d, + 0x6810d41b, + 0x28007bc0, + 0x2802d001, + 0x2013d115, + 0x4a0c01c0, + 0x68d08008, + 0xd00428c0, + 0xd00428d8, + 0x383938ff, + 0x480bd109, + 0x480be000, + 0x480b6048, + 0x211860d0, + 0xf0004804, + 0x4620f85f, + 0x0000bd10, + 0x21004260, + 0x21000028, + 0x21000000, + 0x0000764d, + 0x21000108, + 0x00063b91, + 0x0003fd29, + 0x000090fd, + 0x480eb570, + 0x4c0e6ac0, + 0x0f000700, + 0x28012502, + 0x2804d005, + 0x280cd00b, + 0x280dd001, + 0x6960d106, + 0x616043a8, + 0x49072001, + 0x60080280, + 0x4906bd70, + 0x47882001, + 0x43286960, + 0xbd706160, + 0x40046000, + 0x40041100, + 0xe000e180, + 0x00007d05, + 0x4c03b510, + 0xff48f7ff, + 0x28006820, + 0xbd10d1fa, + 0x40041100, + 0x780a490b, + 0xd1042aff, + 0x7ad24a0a, + 0x0f120712, + 0x4908700a, + 0x75883140, + 0x49054770, + 0x29ff7809, + 0x0900d005, + 0x43080100, + 0x31404902, + 0x47707588, + 0x210002a5, + 0x40086200, + 0x4801b403, + 0xbd019001, + 0x000089dd, + 0x00000000, + 0x00000000, +}; +#define _NWORD_PATCHIMAGE_BLE 145 + +#define _NWORD_PATCHSYS_BLE 0 + +#define _IRQ_PATCH_0 0x210041bd + + +#ifndef _BLE_SYSRAM_START +#define _BLE_SYSRAM_START 0x20000000 +#endif + +#ifndef _BLE_CPERAM_START +#define _BLE_CPERAM_START 0x21000000 +#endif + +#define _BLE_SYS_PATCH_FIXED_ADDR 0x20000000 + +#define _BLE_PARSER_PATCH_TAB_OFFSET 0x0390 +#define _BLE_PATCH_TAB_OFFSET 0x0398 +#define _BLE_IRQPATCH_OFFSET 0x0434 +#define _BLE_PATCH_VEC_OFFSET 0x4024 + +#ifndef _BLE_NO_PROG_STATE_VAR +static uint8_t bBlePatchEntered = 0; +#endif + +PATCH_FUN_SPEC void enterBleCpePatch(void) +{ +#if (_NWORD_PATCHIMAGE_BLE > 0) + uint32_t *pPatchVec = (uint32_t *) (_BLE_CPERAM_START + _BLE_PATCH_VEC_OFFSET); + + memcpy(pPatchVec, patchImageBle, sizeof(patchImageBle)); +#endif +} + +PATCH_FUN_SPEC void enterBleSysPatch(void) +{ +} + +PATCH_FUN_SPEC void configureBlePatch(void) +{ + uint8_t *pPatchTab = (uint8_t *) (_BLE_CPERAM_START + _BLE_PATCH_TAB_OFFSET); + uint32_t *pIrqPatch = (uint32_t *) (_BLE_CPERAM_START + _BLE_IRQPATCH_OFFSET); + + + pPatchTab[142] = 0; + pPatchTab[66] = 1; + pPatchTab[73] = 2; + pPatchTab[117] = 3; + pPatchTab[28] = 4; + pPatchTab[105] = 5; + pPatchTab[106] = 6; + pPatchTab[70] = 7; + + pIrqPatch[21] = _IRQ_PATCH_0; +} + +PATCH_FUN_SPEC void applyBlePatch(void) +{ +#ifdef _BLE_NO_PROG_STATE_VAR + enterBleSysPatch(); + enterBleCpePatch(); +#else + if (!bBlePatchEntered) + { + enterBleSysPatch(); + enterBleCpePatch(); + bBlePatchEntered = 1; + } +#endif + configureBlePatch(); +} + +PATCH_FUN_SPEC void refreshBlePatch(void) +{ + configureBlePatch(); +} + +#ifndef _BLE_NO_PROG_STATE_VAR +PATCH_FUN_SPEC void cleanBlePatch(void) +{ + bBlePatchEntered = 0; +} +#endif + +PATCH_FUN_SPEC void rf_patch_cpe_ble(void) +{ + applyBlePatch(); +} + +#undef _IRQ_PATCH_0 + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // _RF_PATCH_CPE_BLE_H + diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_bt5.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_bt5.h new file mode 100644 index 000000000..a676d3d34 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_bt5.h @@ -0,0 +1,651 @@ +/****************************************************************************** +* Filename: rf_patch_cpe_bt5.h +* Revised: $Date: 2018-05-07 15:02:01 +0200 (ma, 07 mai 2018) $ +* Revision: $Revision: 18438 $ +* +* Description: RF core patch for Bluetooth 5 support ("BLE" and "BLE5" API command sets) in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2018, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_CPE_BT5_H +#define _RF_PATCH_CPE_BT5_H + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include + +#ifndef CPE_PATCH_TYPE +#define CPE_PATCH_TYPE static const uint32_t +#endif + +#ifndef SYS_PATCH_TYPE +#define SYS_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef _APPLY_PATCH_TAB +#define _APPLY_PATCH_TAB +#endif + + +CPE_PATCH_TYPE patchImageBt5[] = { + 0x21004161, + 0x210041d9, + 0x21004255, + 0x2100440b, + 0x2100445b, + 0x21004091, + 0x2100409d, + 0x210040b5, + 0x210044df, + 0x210040d9, + 0x2100410b, + 0x210040f9, + 0x21004651, + 0x21004665, + 0x2100467f, + 0x21004145, + 0x21004701, + 0xb081b5ff, + 0x9d0a4803, + 0xb5f84700, + 0x48024684, + 0x47004613, + 0x00007f43, + 0x00005145, + 0x461db570, + 0x47204c00, + 0x00022281, + 0x0a804670, + 0x288d4a05, + 0x4710d004, + 0x32e44a03, + 0x90042001, + 0x20004902, + 0x47107008, + 0x00006f69, + 0x210001f8, + 0x88084903, + 0x46714a03, + 0xd0004290, + 0x47081c89, + 0x210001a6, + 0x00001404, + 0xb083b5f3, + 0x47004800, + 0x00020b17, + 0x68024805, + 0xd3030852, + 0x60da4b04, + 0x60022200, + 0x1d004670, + 0x00004700, + 0x21004764, + 0x21000340, + 0x2270480b, + 0x43916801, + 0x43112240, + 0x48096001, + 0x48094700, + 0x460c7801, + 0x43912208, + 0xf0007001, + 0x4805f803, + 0xbd107004, + 0x4804b510, + 0x00004700, + 0x40043018, + 0x0000710f, + 0x210000b3, + 0x00005603, + 0x4801b510, + 0x00004700, + 0x000009df, + 0x49044803, + 0x05c068c0, + 0x47880fc0, + 0x47084902, + 0x21000340, + 0x000087d1, + 0x000053cd, + 0x4614b5f8, + 0x9b06461a, + 0x46139300, + 0xf7ff4622, + 0x9000ff7b, + 0xd12d2800, + 0x6848492e, + 0xd0292800, + 0x00498809, + 0x43411b09, + 0x68c0482b, + 0x00640844, + 0x20187922, + 0xb2c61a80, + 0x04802001, + 0x0cc71808, + 0x46317965, + 0xf0004825, + 0x4824fad3, + 0x19832201, + 0x408a1e69, + 0x21182000, + 0xe0071b8e, + 0x19090041, + 0x437988c9, + 0x40e91889, + 0x1c405419, + 0xdcf54286, + 0x4780481b, + 0xbdf89800, + 0xf7ffb510, + 0x4604ff4a, + 0x20004914, + 0x60484a17, + 0x88006810, + 0x28030b00, + 0x0760d01d, + 0x6810d41b, + 0x28007bc0, + 0x2802d001, + 0x2013d115, + 0x4a0c01c0, + 0x68d08008, + 0xd00428c0, + 0xd00428d8, + 0x383938ff, + 0x480bd109, + 0x480be000, + 0x480b6048, + 0x211860d0, + 0xf0004804, + 0x4620fa91, + 0x0000bd10, + 0x2100475c, + 0x21000028, + 0x21000000, + 0x0000764d, + 0x21000108, + 0x00063b91, + 0x0003fd29, + 0x000090fd, + 0x4abb8801, + 0x29031889, + 0x48bad806, + 0x8501217c, + 0x624149b9, + 0x47702001, + 0x470849b8, + 0xb43048b8, + 0x31404601, + 0x2a027c0a, + 0x6802d116, + 0x754a79d2, + 0x68936802, + 0x32804602, + 0x7d486093, + 0xd00b2802, + 0xd0092800, + 0x2c061ec4, + 0x49aad809, + 0x18400080, + 0x6b803840, + 0x60901818, + 0xbc3048aa, + 0x20034700, + 0x80c802c0, + 0x72082002, + 0x2003bc30, + 0xb5704770, + 0x460448a3, + 0x7da53440, + 0xd0122d01, + 0x06497d01, + 0x21800fca, + 0x7c21540a, + 0xd10a2900, + 0x78403060, + 0x07c00880, + 0x7ce0d002, + 0xd5020700, + 0x75a02001, + 0x2000e000, + 0x489873a0, + 0x75a54780, + 0xb570bd70, + 0x48964c93, + 0x35504625, + 0x28024780, + 0x3440d109, + 0x4a9388e1, + 0xd1044291, + 0x06897ce9, + 0x1d91d401, + 0xbd7080e1, + 0x498ab570, + 0x4608890a, + 0xb2d23050, + 0xd1072a28, + 0x68d2680a, + 0x7a936142, + 0x02127ad2, + 0x8302189a, + 0x4a877803, + 0xd0102b00, + 0x2b017983, + 0x7c03d10d, + 0x07db095b, + 0x7d09d009, + 0x74c14d82, + 0x20207f6c, + 0x77684320, + 0x776c4790, + 0x21ffbd70, + 0x479074c1, + 0xb510bd70, + 0x4c75487c, + 0x28024780, + 0x4621d10e, + 0x88ca3140, + 0x429a4b75, + 0x7ccad108, + 0x07d20952, + 0x7d22d004, + 0xd4010692, + 0x80ca1d9a, + 0xb570bd10, + 0x4972486a, + 0x7cc03040, + 0x07c00940, + 0x4d6dd007, + 0x8b2c486f, + 0x83284320, + 0x832c4788, + 0x4788bd70, + 0xb570bd70, + 0x496b4c61, + 0x36404626, + 0x00a87935, + 0x6b401840, + 0x2d0a4780, + 0xd0104621, + 0x780a3154, + 0x07db0993, + 0x73b2d004, + 0x2303780a, + 0x700a431a, + 0xb2ca8921, + 0xd3012a2b, + 0x81213928, + 0x3153bd70, + 0x4952e7ed, + 0x71083140, + 0xd01a2825, + 0x280adc08, + 0x280bd011, + 0x2818d011, + 0x281ed011, + 0xe014d106, + 0xd010282a, + 0xd006283c, + 0xd010283d, + 0x00804951, + 0x6b401840, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0xb5f84770, + 0x4c3d4607, + 0x5d00204e, + 0x07ee0985, + 0x2e0025fb, + 0x7d26d017, + 0x0f240734, + 0xd0032c05, + 0x42202401, + 0xe012d002, + 0xe7fa2402, + 0xd00509c0, + 0xd5030670, + 0x0f806848, + 0xd0082801, + 0x005b085b, + 0x00520852, + 0x2800e003, + 0x402bd001, + 0x2b06402a, + 0x2010d003, + 0xd0102b02, + 0x2302e010, + 0x4638402a, + 0xfde4f7ff, + 0xda072800, + 0x1ab900c2, + 0x7e493920, + 0x42112214, + 0x2000d100, + 0x4302bdf8, + 0x46384303, + 0xfdd4f7ff, + 0xb570bdf8, + 0xfdf4f7ff, + 0xd12b0005, + 0x481a4917, + 0x30406809, + 0x4b2a8982, + 0xd123429a, + 0x210169cc, + 0x22000709, + 0xd20c428c, + 0x794b4926, + 0xd506075b, + 0x4a2568c8, + 0x1c400040, + 0x60cc6010, + 0x8182e012, + 0x8182e010, + 0x49212075, + 0x478800c0, + 0x46204606, + 0xf8b6f000, + 0xd0012800, + 0x02ed2503, + 0xb2b0491b, + 0x47883912, + 0xbd704628, + 0xffffe7d5, + 0x21000108, + 0x00020619, + 0x00020625, + 0x21000160, + 0x000245a5, + 0x00022cfd, + 0x00023b49, + 0x00001404, + 0x000238fd, + 0x210000a8, + 0x000224fb, + 0x00021d4f, + 0x00002020, + 0x00024fc0, + 0x210043cb, + 0x210043a7, + 0x2100437b, + 0x21004329, + 0x21004303, + 0x210042c3, + 0x21004271, + 0x0000ffff, + 0x21000340, + 0x21004764, + 0x000040e5, + 0x4d20b5f8, + 0x882c4820, + 0x4e206ac0, + 0x20010701, + 0x02400f09, + 0x0b222702, + 0xd0202908, + 0x2901dc0d, + 0x2904d00f, + 0x491ad114, + 0xd01207d2, + 0x43824622, + 0x2001802a, + 0x802c4788, + 0x290ce00d, + 0x290dd001, + 0x6970d106, + 0x617043b8, + 0x49122001, + 0x60080280, + 0x2001bdf8, + 0x69704788, + 0x61704338, + 0x0a61bdf8, + 0xd0fb07c9, + 0xd0f907d1, + 0x47a04c0b, + 0x2201490b, + 0x03926a48, + 0x62484310, + 0x63484909, + 0x47a02000, + 0x0000bdf8, + 0x21000068, + 0x40046000, + 0x40041100, + 0x00007d05, + 0xe000e180, + 0x000045b7, + 0x210002c0, + 0x40044000, + 0x4c03b510, + 0xfd70f7ff, + 0x28006820, + 0xbd10d1fa, + 0x40041100, + 0x780a490b, + 0xd1042aff, + 0x7ad24a0a, + 0x0f120712, + 0x4908700a, + 0x75883140, + 0x49054770, + 0x29ff7809, + 0x0900d005, + 0x43080100, + 0x31404902, + 0x47707588, + 0x210002a5, + 0x40086200, + 0x4e26b5f1, + 0x79742000, + 0x60f068f7, + 0x46254824, + 0x05c08800, + 0x2004d502, + 0x71744304, + 0x4b21221d, + 0x98002100, + 0x28004798, + 0x68f1d109, + 0x29001f03, + 0x9900d004, + 0xb2ca6809, + 0xd0032a2b, + 0x60f74618, + 0xbdf87175, + 0x0f890589, + 0xd1022902, + 0x400c21fb, + 0x21047174, + 0x400d400c, + 0xd0f242ac, + 0x03094a12, + 0xbdf86091, + 0x4604b570, + 0x28158800, + 0x490fd003, + 0x47884620, + 0x2075bd70, + 0x00c0490d, + 0x46054788, + 0xf7ff6860, + 0x2800ffbd, + 0x2487d001, + 0x2401e000, + 0x46284907, + 0x4788311c, + 0xbd704620, + 0x21000340, + 0x21000284, + 0x00004a99, + 0x40041100, + 0x0000270f, + 0x000045c7, + 0x4801b403, + 0xbd019001, + 0x000089dd, + 0x00000000, + 0x00000000, + 0x00000000, +}; +#define _NWORD_PATCHIMAGE_BT5 465 + +#define _NWORD_PATCHSYS_BT5 0 + +#define _IRQ_PATCH_0 0x210045ad + + +#ifndef _BT5_SYSRAM_START +#define _BT5_SYSRAM_START 0x20000000 +#endif + +#ifndef _BT5_CPERAM_START +#define _BT5_CPERAM_START 0x21000000 +#endif + +#define _BT5_SYS_PATCH_FIXED_ADDR 0x20000000 + +#define _BT5_PARSER_PATCH_TAB_OFFSET 0x0390 +#define _BT5_PATCH_TAB_OFFSET 0x0398 +#define _BT5_IRQPATCH_OFFSET 0x0434 +#define _BT5_PATCH_VEC_OFFSET 0x4024 + +#ifndef _BT5_NO_PROG_STATE_VAR +static uint8_t bBt5PatchEntered = 0; +#endif + +PATCH_FUN_SPEC void enterBt5CpePatch(void) +{ +#if (_NWORD_PATCHIMAGE_BT5 > 0) + uint32_t *pPatchVec = (uint32_t *) (_BT5_CPERAM_START + _BT5_PATCH_VEC_OFFSET); + + memcpy(pPatchVec, patchImageBt5, sizeof(patchImageBt5)); +#endif +} + +PATCH_FUN_SPEC void enterBt5SysPatch(void) +{ +} + +PATCH_FUN_SPEC void configureBt5Patch(void) +{ + uint8_t *pParserPatchTab = (uint8_t *) (_BT5_CPERAM_START + _BT5_PARSER_PATCH_TAB_OFFSET); + uint8_t *pPatchTab = (uint8_t *) (_BT5_CPERAM_START + _BT5_PATCH_TAB_OFFSET); + uint32_t *pIrqPatch = (uint32_t *) (_BT5_CPERAM_START + _BT5_IRQPATCH_OFFSET); + + + pPatchTab[142] = 0; + pPatchTab[66] = 1; + pParserPatchTab[1] = 2; + pPatchTab[1] = 3; + pPatchTab[18] = 4; + pPatchTab[112] = 5; + pPatchTab[115] = 6; + pPatchTab[22] = 7; + pPatchTab[10] = 8; + pPatchTab[36] = 9; + pPatchTab[73] = 10; + pPatchTab[117] = 11; + pPatchTab[28] = 12; + pPatchTab[105] = 13; + pPatchTab[106] = 14; + pPatchTab[70] = 15; + pParserPatchTab[0] = 16; + + pIrqPatch[21] = _IRQ_PATCH_0; +} + +PATCH_FUN_SPEC void applyBt5Patch(void) +{ +#ifdef _BT5_NO_PROG_STATE_VAR + enterBt5SysPatch(); + enterBt5CpePatch(); +#else + if (!bBt5PatchEntered) + { + enterBt5SysPatch(); + enterBt5CpePatch(); + bBt5PatchEntered = 1; + } +#endif + configureBt5Patch(); +} + +PATCH_FUN_SPEC void refreshBt5Patch(void) +{ + configureBt5Patch(); +} + +#ifndef _BT5_NO_PROG_STATE_VAR +PATCH_FUN_SPEC void cleanBt5Patch(void) +{ + bBt5PatchEntered = 0; +} +#endif + +PATCH_FUN_SPEC void rf_patch_cpe_bt5(void) +{ + applyBt5Patch(); +} + +#undef _IRQ_PATCH_0 + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // _RF_PATCH_CPE_BT5_H + diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_ieee_802_15_4.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_ieee_802_15_4.h new file mode 100644 index 000000000..f1ba1dd08 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_ieee_802_15_4.h @@ -0,0 +1,284 @@ +/****************************************************************************** +* Filename: rf_patch_cpe_ieee_802_15_4.h +* Revised: $Date: 2018-05-07 15:02:01 +0200 (ma, 07 mai 2018) $ +* Revision: $Revision: 18438 $ +* +* Description: RF core patch for IEEE 802.15.4-2006 support ("IEEE" API command set) in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2018, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_CPE_IEEE_802_15_4_H +#define _RF_PATCH_CPE_IEEE_802_15_4_H + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include + +#ifndef CPE_PATCH_TYPE +#define CPE_PATCH_TYPE static const uint32_t +#endif + +#ifndef SYS_PATCH_TYPE +#define SYS_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef _APPLY_PATCH_TAB +#define _APPLY_PATCH_TAB +#endif + + +CPE_PATCH_TYPE patchImageIeee802154[] = { + 0x2100403d, + 0x210040d9, + 0x210040ed, + 0x21004107, + 0x21004071, + 0x21004189, + 0x6ac34807, + 0xf808f000, + 0x009b089b, + 0x6ac14804, + 0xd10007c9, + 0xbdf862c3, + 0xb5f84902, + 0x00004708, + 0x40045040, + 0x00029dd3, + 0x4801b510, + 0x00004700, + 0x000009df, + 0x49044803, + 0x05c068c0, + 0x47880fc0, + 0x47084902, + 0x21000340, + 0x000087d1, + 0x000053cd, + 0x480eb570, + 0x4c0e6ac0, + 0x0f000700, + 0x28012502, + 0x2804d005, + 0x280cd00b, + 0x280dd001, + 0x6960d106, + 0x616043a8, + 0x49072001, + 0x60080280, + 0x4906bd70, + 0x47882001, + 0x43286960, + 0xbd706160, + 0x40046000, + 0x40041100, + 0xe000e180, + 0x00007d05, + 0x4c03b510, + 0xffc2f7ff, + 0x28006820, + 0xbd10d1fa, + 0x40041100, + 0x780a490b, + 0xd1042aff, + 0x7ad24a0a, + 0x0f120712, + 0x4908700a, + 0x75883140, + 0x49054770, + 0x29ff7809, + 0x0900d005, + 0x43080100, + 0x31404902, + 0x47707588, + 0x210002a5, + 0x40086200, + 0x4e26b5f1, + 0x79742000, + 0x60f068f7, + 0x46254824, + 0x05c08800, + 0x2004d502, + 0x71744304, + 0x4b21221d, + 0x98002100, + 0x28004798, + 0x68f1d109, + 0x29001f03, + 0x9900d004, + 0xb2ca6809, + 0xd0032a2b, + 0x60f74618, + 0xbdf87175, + 0x0f890589, + 0xd1022902, + 0x400c21fb, + 0x21047174, + 0x400d400c, + 0xd0f242ac, + 0x03094a12, + 0xbdf86091, + 0x4604b570, + 0x28158800, + 0x490fd003, + 0x47884620, + 0x2075bd70, + 0x00c0490d, + 0x46054788, + 0xf7ff6860, + 0x2800ffbd, + 0x2487d001, + 0x2401e000, + 0x46284907, + 0x4788311c, + 0xbd704620, + 0x21000340, + 0x21000284, + 0x00004a99, + 0x40041100, + 0x0000270f, + 0x000045c7, +}; +#define _NWORD_PATCHIMAGE_IEEE_802_15_4 109 + +#define _NWORD_PATCHSYS_IEEE_802_15_4 0 + +#define _IRQ_PATCH_0 0x2100408d + + +#ifndef _IEEE_802_15_4_SYSRAM_START +#define _IEEE_802_15_4_SYSRAM_START 0x20000000 +#endif + +#ifndef _IEEE_802_15_4_CPERAM_START +#define _IEEE_802_15_4_CPERAM_START 0x21000000 +#endif + +#define _IEEE_802_15_4_SYS_PATCH_FIXED_ADDR 0x20000000 + +#define _IEEE_802_15_4_PARSER_PATCH_TAB_OFFSET 0x0390 +#define _IEEE_802_15_4_PATCH_TAB_OFFSET 0x0398 +#define _IEEE_802_15_4_IRQPATCH_OFFSET 0x0434 +#define _IEEE_802_15_4_PATCH_VEC_OFFSET 0x4024 + +#ifndef _IEEE_802_15_4_NO_PROG_STATE_VAR +static uint8_t bIeee802154PatchEntered = 0; +#endif + +PATCH_FUN_SPEC void enterIeee802154CpePatch(void) +{ +#if (_NWORD_PATCHIMAGE_IEEE_802_15_4 > 0) + uint32_t *pPatchVec = (uint32_t *) (_IEEE_802_15_4_CPERAM_START + _IEEE_802_15_4_PATCH_VEC_OFFSET); + + memcpy(pPatchVec, patchImageIeee802154, sizeof(patchImageIeee802154)); +#endif +} + +PATCH_FUN_SPEC void enterIeee802154SysPatch(void) +{ +} + +PATCH_FUN_SPEC void configureIeee802154Patch(void) +{ + uint8_t *pParserPatchTab = (uint8_t *) (_IEEE_802_15_4_CPERAM_START + _IEEE_802_15_4_PARSER_PATCH_TAB_OFFSET); + uint8_t *pPatchTab = (uint8_t *) (_IEEE_802_15_4_CPERAM_START + _IEEE_802_15_4_PATCH_TAB_OFFSET); + uint32_t *pIrqPatch = (uint32_t *) (_IEEE_802_15_4_CPERAM_START + _IEEE_802_15_4_IRQPATCH_OFFSET); + + + pPatchTab[53] = 0; + pPatchTab[28] = 1; + pPatchTab[105] = 2; + pPatchTab[106] = 3; + pPatchTab[70] = 4; + pParserPatchTab[0] = 5; + + pIrqPatch[21] = _IRQ_PATCH_0; +} + +PATCH_FUN_SPEC void applyIeee802154Patch(void) +{ +#ifdef _IEEE_802_15_4_NO_PROG_STATE_VAR + enterIeee802154SysPatch(); + enterIeee802154CpePatch(); +#else + if (!bIeee802154PatchEntered) + { + enterIeee802154SysPatch(); + enterIeee802154CpePatch(); + bIeee802154PatchEntered = 1; + } +#endif + configureIeee802154Patch(); +} + +PATCH_FUN_SPEC void refreshIeee802154Patch(void) +{ + configureIeee802154Patch(); +} + +#ifndef _IEEE_802_15_4_NO_PROG_STATE_VAR +PATCH_FUN_SPEC void cleanIeee802154Patch(void) +{ + bIeee802154PatchEntered = 0; +} +#endif + +PATCH_FUN_SPEC void rf_patch_cpe_ieee_802_15_4(void) +{ + applyIeee802154Patch(); +} + +#undef _IRQ_PATCH_0 + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // _RF_PATCH_CPE_IEEE_802_15_4_H + diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_multi_protocol.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_multi_protocol.h new file mode 100644 index 000000000..d6b9c9ddd --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_multi_protocol.h @@ -0,0 +1,808 @@ +/****************************************************************************** +* Filename: rf_patch_cpe_multi_protocol.h +* Revised: $Date: 2018-05-07 15:02:01 +0200 (ma, 07 mai 2018) $ +* Revision: $Revision: 18438 $ +* +* Description: RF core patch for multi-protocol support (all available API command sets) in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2018, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_CPE_MULTI_PROTOCOL_H +#define _RF_PATCH_CPE_MULTI_PROTOCOL_H + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include + +#ifndef CPE_PATCH_TYPE +#define CPE_PATCH_TYPE static const uint32_t +#endif + +#ifndef SYS_PATCH_TYPE +#define SYS_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef _APPLY_PATCH_TAB +#define _APPLY_PATCH_TAB +#endif + + +CPE_PATCH_TYPE patchImageMultiProtocol[] = { + 0x21004245, + 0x21004265, + 0x210042dd, + 0x21004385, + 0x2100442d, + 0x210045e3, + 0x21004633, + 0x210040bd, + 0x210040c9, + 0x210040e1, + 0x210046b7, + 0x21004105, + 0x21004125, + 0x21004785, + 0x21004159, + 0x2100417d, + 0x2100419f, + 0x2100418d, + 0x2100483d, + 0x21004857, + 0x210041d1, + 0x210041ed, + 0x210041fd, + 0x21004955, + 0x2100420d, + 0xb081b5ff, + 0x9d0a4803, + 0xb5f84700, + 0x48024684, + 0x47004613, + 0x00007f43, + 0x00005145, + 0x460cb5f7, + 0x47084900, + 0x0000681d, + 0x461db570, + 0x47204c00, + 0x00022281, + 0x0a804670, + 0x288d4a05, + 0x4710d004, + 0x32e44a03, + 0x90042001, + 0x20004902, + 0x47107008, + 0x00006f69, + 0x210001f8, + 0x88084903, + 0x46714a03, + 0xd0004290, + 0x47081c89, + 0x210001a6, + 0x00001404, + 0xb083b5f3, + 0x47004800, + 0x00020b17, + 0x68024805, + 0xd3030852, + 0x60da4b04, + 0x60022200, + 0x1d004670, + 0x00004700, + 0x210049b8, + 0x21000340, + 0x6ac34807, + 0xf808f000, + 0x009b089b, + 0x6ac14804, + 0xd10007c9, + 0xbdf862c3, + 0xb5f84902, + 0x00004708, + 0x40045040, + 0x00029dd3, + 0x4801b510, + 0x00004700, + 0x000009df, + 0x460db5f8, + 0x4b0a4616, + 0x290c6d59, + 0x4b03d104, + 0x78192408, + 0x70194321, + 0x47084901, + 0x21000340, + 0x0000699d, + 0x46864810, + 0x21804801, + 0x47706041, + 0x40045000, + 0x2270480d, + 0x43916801, + 0x43112240, + 0x480b6001, + 0x480b4700, + 0x460c7801, + 0x43912208, + 0xf0007001, + 0x4807f803, + 0xbd107004, + 0xf7ffb510, + 0x4801ffe3, + 0x470038c8, + 0x000056cb, + 0x40043018, + 0x0000710f, + 0x210000b3, + 0x49044803, + 0x05c068c0, + 0x47880fc0, + 0x47084902, + 0x21000340, + 0x000087d1, + 0x000053cd, + 0xf0002000, + 0x4604fb41, + 0x47004800, + 0x0000545b, + 0xf0002004, + 0x4605fb39, + 0x47004800, + 0x0000533b, + 0xf811f000, + 0x296cb2e1, + 0x2804d00b, + 0x2806d001, + 0x4907d107, + 0x07c97809, + 0x7821d103, + 0xd4000709, + 0xb0032002, + 0xb5f0bdf0, + 0x4902b083, + 0x00004708, + 0x210000c8, + 0x0003071b, + 0x4905b672, + 0x22206808, + 0x600a4302, + 0x6ad24a03, + 0xb6626008, + 0x4770b250, + 0x40040000, + 0x40046040, + 0x4614b5f8, + 0x9b06461a, + 0x46139300, + 0xf7ff4622, + 0x9000ff09, + 0xd12d2800, + 0x6848495f, + 0xd0292800, + 0x00498809, + 0x43411b09, + 0x68c0485c, + 0x00640844, + 0x20187922, + 0xb2c61a80, + 0x04802001, + 0x0cc71808, + 0x46317965, + 0xf0004856, + 0x4855fb7b, + 0x19832201, + 0x408a1e69, + 0x21182000, + 0xe0071b8e, + 0x19090041, + 0x437988c9, + 0x40e91889, + 0x1c405419, + 0xdcf54286, + 0x4780484c, + 0xbdf89800, + 0xf7ffb570, + 0x4a46fed8, + 0x49492300, + 0x60534604, + 0x25136808, + 0x01ed8800, + 0x2e030b06, + 0x0760d00d, + 0x6808d43f, + 0x290c7bc1, + 0xdc0fd028, + 0xd0132904, + 0xd0142905, + 0xd10d290a, + 0xb2c0e01d, + 0xd0032806, + 0x8c006808, + 0xe02d8010, + 0xe02b8015, + 0xd018290f, + 0xd019291e, + 0xe0048015, + 0x01802013, + 0x4835e000, + 0x48308010, + 0x29c068c1, + 0x29d8d010, + 0x39ffd010, + 0xd1173939, + 0x20ffe00a, + 0xe7f130e7, + 0x309620ff, + 0x20ffe7ee, + 0xe7eb3045, + 0xe7e920a2, + 0xe000492a, + 0x6051492a, + 0x60c1492a, + 0x48232118, + 0xfb14f000, + 0x8013e000, + 0xbd704620, + 0x4604b5f8, + 0x4e1c481d, + 0x88003040, + 0x0a80460d, + 0xd00407c0, + 0x08644821, + 0x43447900, + 0x8830e025, + 0xd0222800, + 0x19000960, + 0xfe7af7ff, + 0x20014607, + 0x0240491b, + 0x46024788, + 0x1bc02005, + 0x40848831, + 0x18230848, + 0x62034817, + 0x21016241, + 0x430d61c1, + 0x60cd490a, + 0x07c969c1, + 0x6a80d1fc, + 0x60704910, + 0x39124610, + 0x46384788, + 0x2000bdf8, + 0x46206070, + 0xfe56f7ff, + 0x0000bdf8, + 0x210049b0, + 0x21000028, + 0x21000000, + 0x0000764d, + 0x21000108, + 0x000003cd, + 0x00063b91, + 0x0003fd29, + 0x000090fd, + 0x21000340, + 0x000040e5, + 0x40044100, + 0x4abb8801, + 0x29031889, + 0x48bad806, + 0x8501217c, + 0x624149b9, + 0x47702001, + 0x470849b8, + 0xb43048b8, + 0x31404601, + 0x2a027c0a, + 0x6802d116, + 0x754a79d2, + 0x68936802, + 0x32804602, + 0x7d486093, + 0xd00b2802, + 0xd0092800, + 0x2c061ec4, + 0x49aad809, + 0x18400080, + 0x6b803840, + 0x60901818, + 0xbc3048aa, + 0x20034700, + 0x80c802c0, + 0x72082002, + 0x2003bc30, + 0xb5704770, + 0x460448a3, + 0x7da53440, + 0xd0122d01, + 0x06497d01, + 0x21800fca, + 0x7c21540a, + 0xd10a2900, + 0x78403060, + 0x07c00880, + 0x7ce0d002, + 0xd5020700, + 0x75a02001, + 0x2000e000, + 0x489873a0, + 0x75a54780, + 0xb570bd70, + 0x48964c93, + 0x35504625, + 0x28024780, + 0x3440d109, + 0x4a9388e1, + 0xd1044291, + 0x06897ce9, + 0x1d91d401, + 0xbd7080e1, + 0x498ab570, + 0x4608890a, + 0xb2d23050, + 0xd1072a28, + 0x68d2680a, + 0x7a936142, + 0x02127ad2, + 0x8302189a, + 0x4a877803, + 0xd0102b00, + 0x2b017983, + 0x7c03d10d, + 0x07db095b, + 0x7d09d009, + 0x74c14d82, + 0x20207f6c, + 0x77684320, + 0x776c4790, + 0x21ffbd70, + 0x479074c1, + 0xb510bd70, + 0x4c75487c, + 0x28024780, + 0x4621d10e, + 0x88ca3140, + 0x429a4b75, + 0x7ccad108, + 0x07d20952, + 0x7d22d004, + 0xd4010692, + 0x80ca1d9a, + 0xb570bd10, + 0x4972486a, + 0x7cc03040, + 0x07c00940, + 0x4d6dd007, + 0x8b2c486f, + 0x83284320, + 0x832c4788, + 0x4788bd70, + 0xb570bd70, + 0x496b4c61, + 0x36404626, + 0x00a87935, + 0x6b401840, + 0x2d0a4780, + 0xd0104621, + 0x780a3154, + 0x07db0993, + 0x73b2d004, + 0x2303780a, + 0x700a431a, + 0xb2ca8921, + 0xd3012a2b, + 0x81213928, + 0x3153bd70, + 0x4952e7ed, + 0x71083140, + 0xd01a2825, + 0x280adc08, + 0x280bd011, + 0x2818d011, + 0x281ed011, + 0xe014d106, + 0xd010282a, + 0xd006283c, + 0xd010283d, + 0x00804951, + 0x6b401840, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0x48504770, + 0xb5f84770, + 0x4c3d4607, + 0x5d00204e, + 0x07ee0985, + 0x2e0025fb, + 0x7d26d017, + 0x0f240734, + 0xd0032c05, + 0x42202401, + 0xe012d002, + 0xe7fa2402, + 0xd00509c0, + 0xd5030670, + 0x0f806848, + 0xd0082801, + 0x005b085b, + 0x00520852, + 0x2800e003, + 0x402bd001, + 0x2b06402a, + 0x2010d003, + 0xd0102b02, + 0x2302e010, + 0x4638402a, + 0xfd0ef7ff, + 0xda072800, + 0x1ab900c2, + 0x7e493920, + 0x42112214, + 0x2000d100, + 0x4302bdf8, + 0x46384303, + 0xfcfef7ff, + 0xb570bdf8, + 0xfd1ef7ff, + 0xd12b0005, + 0x481a4917, + 0x30406809, + 0x4b2a8982, + 0xd123429a, + 0x210169cc, + 0x22000709, + 0xd20c428c, + 0x794b4926, + 0xd506075b, + 0x4a2568c8, + 0x1c400040, + 0x60cc6010, + 0x8182e012, + 0x8182e010, + 0x49212075, + 0x478800c0, + 0x46204606, + 0xf8f4f000, + 0xd0012800, + 0x02ed2503, + 0xb2b0491b, + 0x47883912, + 0xbd704628, + 0xffffe7d5, + 0x21000108, + 0x00020619, + 0x00020625, + 0x21000160, + 0x000245a5, + 0x00022cfd, + 0x00023b49, + 0x00001404, + 0x000238fd, + 0x210000a8, + 0x000224fb, + 0x00021d4f, + 0x00002020, + 0x00024fc0, + 0x210045a3, + 0x2100457f, + 0x21004553, + 0x21004501, + 0x210044db, + 0x2100449b, + 0x21004449, + 0x0000ffff, + 0x21000340, + 0x210049b8, + 0x000040e5, + 0x4c03b510, + 0xfce0f7ff, + 0x28006820, + 0xbd10d1fa, + 0x40041100, + 0x4d20b5f8, + 0x882c4820, + 0x4e206ac0, + 0x20010701, + 0x02400f09, + 0x0b222702, + 0xd0202908, + 0x2901dc0d, + 0x2904d00f, + 0x491ad114, + 0xd01207d2, + 0x43824622, + 0x2001802a, + 0x802c4788, + 0x290ce00d, + 0x290dd001, + 0x6970d106, + 0x617043b8, + 0x49122001, + 0x60080280, + 0x2001bdf8, + 0x69704788, + 0x61704338, + 0x0a61bdf8, + 0xd0fb07c9, + 0xd0f907d1, + 0x47a04c0b, + 0x2201490b, + 0x03926a48, + 0x62484310, + 0x63484909, + 0x47a02000, + 0x0000bdf8, + 0x21000068, + 0x40046000, + 0x40041100, + 0x00007d05, + 0xe000e180, + 0x000045b7, + 0x210002c0, + 0x40044000, + 0x780a490b, + 0xd1042aff, + 0x7ad24a0a, + 0x0f120712, + 0x4908700a, + 0x75883140, + 0x49054770, + 0x29ff7809, + 0x0900d005, + 0x43080100, + 0x31404902, + 0x47707588, + 0x210002a5, + 0x40086200, + 0x4c19b570, + 0x7ba14606, + 0xf820f000, + 0x7be14605, + 0xf0004630, + 0x4915f81b, + 0x78094604, + 0x070a2028, + 0x2d01d401, + 0x2038d100, + 0xd40106c9, + 0xd1012c01, + 0x43082140, + 0x4788490e, + 0xd0012dff, + 0x6145480d, + 0xd0012cff, + 0x61c4480c, + 0xbd704808, + 0xd0082900, + 0xd00629ff, + 0x070840c1, + 0x281c0ec0, + 0x2001d100, + 0x20ff4770, + 0x00004770, + 0x210000a8, + 0x21000340, + 0x000040e5, + 0x40045040, + 0x40046000, + 0x4e26b5f1, + 0x79742000, + 0x60f068f7, + 0x46254824, + 0x05c08800, + 0x2004d502, + 0x71744304, + 0x4b21221d, + 0x98002100, + 0x28004798, + 0x68f1d109, + 0x29001f03, + 0x9900d004, + 0xb2ca6809, + 0xd0032a2b, + 0x60f74618, + 0xbdf87175, + 0x0f890589, + 0xd1022902, + 0x400c21fb, + 0x21047174, + 0x400d400c, + 0xd0f242ac, + 0x03094a12, + 0xbdf86091, + 0x4604b570, + 0x28158800, + 0x490fd003, + 0x47884620, + 0x2075bd70, + 0x00c0490d, + 0x46054788, + 0xf7ff6860, + 0x2800ffbd, + 0x2487d001, + 0x2401e000, + 0x46284907, + 0x4788311c, + 0xbd704620, + 0x21000340, + 0x21000284, + 0x00004a99, + 0x40041100, + 0x0000270f, + 0x000045c7, + 0x4801b403, + 0xbd019001, + 0x000089dd, + 0x00000000, + 0x00000000, + 0x00000000, +}; +#define _NWORD_PATCHIMAGE_MULTI_PROTOCOL 614 + +#define _NWORD_PATCHSYS_MULTI_PROTOCOL 0 + +#define _IRQ_PATCH_0 0x21004799 + + +#ifndef _MULTI_PROTOCOL_SYSRAM_START +#define _MULTI_PROTOCOL_SYSRAM_START 0x20000000 +#endif + +#ifndef _MULTI_PROTOCOL_CPERAM_START +#define _MULTI_PROTOCOL_CPERAM_START 0x21000000 +#endif + +#define _MULTI_PROTOCOL_SYS_PATCH_FIXED_ADDR 0x20000000 + +#define _MULTI_PROTOCOL_PARSER_PATCH_TAB_OFFSET 0x0390 +#define _MULTI_PROTOCOL_PATCH_TAB_OFFSET 0x0398 +#define _MULTI_PROTOCOL_IRQPATCH_OFFSET 0x0434 +#define _MULTI_PROTOCOL_PATCH_VEC_OFFSET 0x4024 + +#ifndef _MULTI_PROTOCOL_NO_PROG_STATE_VAR +static uint8_t bMultiProtocolPatchEntered = 0; +#endif + +PATCH_FUN_SPEC void enterMultiProtocolCpePatch(void) +{ +#if (_NWORD_PATCHIMAGE_MULTI_PROTOCOL > 0) + uint32_t *pPatchVec = (uint32_t *) (_MULTI_PROTOCOL_CPERAM_START + _MULTI_PROTOCOL_PATCH_VEC_OFFSET); + + memcpy(pPatchVec, patchImageMultiProtocol, sizeof(patchImageMultiProtocol)); +#endif +} + +PATCH_FUN_SPEC void enterMultiProtocolSysPatch(void) +{ +} + +PATCH_FUN_SPEC void configureMultiProtocolPatch(void) +{ + uint8_t *pParserPatchTab = (uint8_t *) (_MULTI_PROTOCOL_CPERAM_START + _MULTI_PROTOCOL_PARSER_PATCH_TAB_OFFSET); + uint8_t *pPatchTab = (uint8_t *) (_MULTI_PROTOCOL_CPERAM_START + _MULTI_PROTOCOL_PATCH_TAB_OFFSET); + uint32_t *pIrqPatch = (uint32_t *) (_MULTI_PROTOCOL_CPERAM_START + _MULTI_PROTOCOL_IRQPATCH_OFFSET); + + + pPatchTab[84] = 0; + pPatchTab[142] = 1; + pPatchTab[66] = 2; + pPatchTab[102] = 3; + pParserPatchTab[1] = 4; + pPatchTab[1] = 5; + pPatchTab[18] = 6; + pPatchTab[112] = 7; + pPatchTab[115] = 8; + pPatchTab[22] = 9; + pPatchTab[10] = 10; + pPatchTab[36] = 11; + pPatchTab[53] = 12; + pPatchTab[28] = 13; + pPatchTab[104] = 14; + pPatchTab[75] = 15; + pPatchTab[73] = 16; + pPatchTab[117] = 17; + pPatchTab[105] = 18; + pPatchTab[106] = 19; + pPatchTab[70] = 20; + pPatchTab[71] = 21; + pPatchTab[69] = 22; + pParserPatchTab[0] = 23; + pPatchTab[60] = 24; + + pIrqPatch[21] = _IRQ_PATCH_0; +} + +PATCH_FUN_SPEC void applyMultiProtocolPatch(void) +{ +#ifdef _MULTI_PROTOCOL_NO_PROG_STATE_VAR + enterMultiProtocolSysPatch(); + enterMultiProtocolCpePatch(); +#else + if (!bMultiProtocolPatchEntered) + { + enterMultiProtocolSysPatch(); + enterMultiProtocolCpePatch(); + bMultiProtocolPatchEntered = 1; + } +#endif + configureMultiProtocolPatch(); +} + +PATCH_FUN_SPEC void refreshMultiProtocolPatch(void) +{ + configureMultiProtocolPatch(); +} + +#ifndef _MULTI_PROTOCOL_NO_PROG_STATE_VAR +PATCH_FUN_SPEC void cleanMultiProtocolPatch(void) +{ + bMultiProtocolPatchEntered = 0; +} +#endif + +PATCH_FUN_SPEC void rf_patch_cpe_multi_protocol(void) +{ + applyMultiProtocolPatch(); +} + +#undef _IRQ_PATCH_0 + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // _RF_PATCH_CPE_MULTI_PROTOCOL_H + diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_prop.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_prop.h new file mode 100644 index 000000000..c0ee68329 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_cpe_prop.h @@ -0,0 +1,514 @@ +/****************************************************************************** +* Filename: rf_patch_cpe_prop.h +* Revised: $Date: 2018-05-07 15:02:01 +0200 (ma, 07 mai 2018) $ +* Revision: $Revision: 18438 $ +* +* Description: RF core patch for proprietary radio support ("PROP" API command set) in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2018, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_CPE_PROP_H +#define _RF_PATCH_CPE_PROP_H + +//***************************************************************************** +// +// If building with a C++ compiler, make all of the definitions in this header +// have a C binding. +// +//***************************************************************************** +#ifdef __cplusplus +extern "C" +{ +#endif + +#include +#include + +#ifndef CPE_PATCH_TYPE +#define CPE_PATCH_TYPE static const uint32_t +#endif + +#ifndef SYS_PATCH_TYPE +#define SYS_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef _APPLY_PATCH_TAB +#define _APPLY_PATCH_TAB +#endif + + +CPE_PATCH_TYPE patchImageProp[] = { + 0x21004185, + 0x210041a5, + 0x2100421d, + 0x210042c5, + 0x2100436d, + 0x21004099, + 0x210040bd, + 0x210040df, + 0x210040cd, + 0x210043cd, + 0x210043e7, + 0x21004111, + 0x2100412d, + 0x2100413d, + 0x210044e5, + 0x2100414d, + 0xb081b5ff, + 0x9d0a4803, + 0xb5f84700, + 0x48024684, + 0x47004613, + 0x00007f43, + 0x00005145, + 0x460cb5f7, + 0x47084900, + 0x0000681d, + 0x4801b510, + 0x00004700, + 0x000009df, + 0x460db5f8, + 0x4b0a4616, + 0x290c6d59, + 0x4b03d104, + 0x78192408, + 0x70194321, + 0x47084901, + 0x21000340, + 0x0000699d, + 0x46864810, + 0x21804801, + 0x47706041, + 0x40045000, + 0x2270480d, + 0x43916801, + 0x43112240, + 0x480b6001, + 0x480b4700, + 0x460c7801, + 0x43912208, + 0xf0007001, + 0x4807f803, + 0xbd107004, + 0xf7ffb510, + 0x4801ffe3, + 0x470038c8, + 0x000056cb, + 0x40043018, + 0x0000710f, + 0x210000b3, + 0x49044803, + 0x05c068c0, + 0x47880fc0, + 0x47084902, + 0x21000340, + 0x000087d1, + 0x000053cd, + 0xf0002000, + 0x4604f969, + 0x47004800, + 0x0000545b, + 0xf0002004, + 0x4605f961, + 0x47004800, + 0x0000533b, + 0xf811f000, + 0x296cb2e1, + 0x2804d00b, + 0x2806d001, + 0x4907d107, + 0x07c97809, + 0x7821d103, + 0xd4000709, + 0xb0032002, + 0xb5f0bdf0, + 0x4902b083, + 0x00004708, + 0x210000c8, + 0x0003071b, + 0x4905b672, + 0x22206808, + 0x600a4302, + 0x6ad24a03, + 0xb6626008, + 0x4770b250, + 0x40040000, + 0x40046040, + 0x4614b5f8, + 0x9b06461a, + 0x46139300, + 0xf7ff4622, + 0x9000ff57, + 0xd12d2800, + 0x6848495f, + 0xd0292800, + 0x00498809, + 0x43411b09, + 0x68c0485c, + 0x00640844, + 0x20187922, + 0xb2c61a80, + 0x04802001, + 0x0cc71808, + 0x46317965, + 0xf0004856, + 0x4855f9a3, + 0x19832201, + 0x408a1e69, + 0x21182000, + 0xe0071b8e, + 0x19090041, + 0x437988c9, + 0x40e91889, + 0x1c405419, + 0xdcf54286, + 0x4780484c, + 0xbdf89800, + 0xf7ffb570, + 0x4a46ff26, + 0x49492300, + 0x60534604, + 0x25136808, + 0x01ed8800, + 0x2e030b06, + 0x0760d00d, + 0x6808d43f, + 0x290c7bc1, + 0xdc0fd028, + 0xd0132904, + 0xd0142905, + 0xd10d290a, + 0xb2c0e01d, + 0xd0032806, + 0x8c006808, + 0xe02d8010, + 0xe02b8015, + 0xd018290f, + 0xd019291e, + 0xe0048015, + 0x01802013, + 0x4835e000, + 0x48308010, + 0x29c068c1, + 0x29d8d010, + 0x39ffd010, + 0xd1173939, + 0x20ffe00a, + 0xe7f130e7, + 0x309620ff, + 0x20ffe7ee, + 0xe7eb3045, + 0xe7e920a2, + 0xe000492a, + 0x6051492a, + 0x60c1492a, + 0x48232118, + 0xf93cf000, + 0x8013e000, + 0xbd704620, + 0x4604b5f8, + 0x4e1c481d, + 0x88003040, + 0x0a80460d, + 0xd00407c0, + 0x08644821, + 0x43447900, + 0x8830e025, + 0xd0222800, + 0x19000960, + 0xfec8f7ff, + 0x20014607, + 0x0240491b, + 0x46024788, + 0x1bc02005, + 0x40848831, + 0x18230848, + 0x62034817, + 0x21016241, + 0x430d61c1, + 0x60cd490a, + 0x07c969c1, + 0x6a80d1fc, + 0x60704910, + 0x39124610, + 0x46384788, + 0x2000bdf8, + 0x46206070, + 0xfea4f7ff, + 0x0000bdf8, + 0x21004540, + 0x21000028, + 0x21000000, + 0x0000764d, + 0x21000108, + 0x000003cd, + 0x00063b91, + 0x0003fd29, + 0x000090fd, + 0x21000340, + 0x000040e5, + 0x40044100, + 0x4c03b510, + 0xfe8cf7ff, + 0x28006820, + 0xbd10d1fa, + 0x40041100, + 0x480eb570, + 0x4c0e6ac0, + 0x0f000700, + 0x28012502, + 0x2804d005, + 0x280cd00b, + 0x280dd001, + 0x6960d106, + 0x616043a8, + 0x49072001, + 0x60080280, + 0x4906bd70, + 0x47882001, + 0x43286960, + 0xbd706160, + 0x40046000, + 0x40041100, + 0xe000e180, + 0x00007d05, + 0x780a490b, + 0xd1042aff, + 0x7ad24a0a, + 0x0f120712, + 0x4908700a, + 0x75883140, + 0x49054770, + 0x29ff7809, + 0x0900d005, + 0x43080100, + 0x31404902, + 0x47707588, + 0x210002a5, + 0x40086200, + 0x4c19b570, + 0x7ba14606, + 0xf820f000, + 0x7be14605, + 0xf0004630, + 0x4915f81b, + 0x78094604, + 0x070a2028, + 0x2d01d401, + 0x2038d100, + 0xd40106c9, + 0xd1012c01, + 0x43082140, + 0x4788490e, + 0xd0012dff, + 0x6145480d, + 0xd0012cff, + 0x61c4480c, + 0xbd704808, + 0xd0082900, + 0xd00629ff, + 0x070840c1, + 0x281c0ec0, + 0x2001d100, + 0x20ff4770, + 0x00004770, + 0x210000a8, + 0x21000340, + 0x000040e5, + 0x40045040, + 0x40046000, + 0x4e26b5f1, + 0x79742000, + 0x60f068f7, + 0x46254824, + 0x05c08800, + 0x2004d502, + 0x71744304, + 0x4b21221d, + 0x98002100, + 0x28004798, + 0x68f1d109, + 0x29001f03, + 0x9900d004, + 0xb2ca6809, + 0xd0032a2b, + 0x60f74618, + 0xbdf87175, + 0x0f890589, + 0xd1022902, + 0x400c21fb, + 0x21047174, + 0x400d400c, + 0xd0f242ac, + 0x03094a12, + 0xbdf86091, + 0x4604b570, + 0x28158800, + 0x490fd003, + 0x47884620, + 0x2075bd70, + 0x00c0490d, + 0x46054788, + 0xf7ff6860, + 0x2800ffbd, + 0x2487d001, + 0x2401e000, + 0x46284907, + 0x4788311c, + 0xbd704620, + 0x21000340, + 0x21000284, + 0x00004a99, + 0x40041100, + 0x0000270f, + 0x000045c7, + 0x4801b403, + 0xbd019001, + 0x000089dd, + 0x00000000, + 0x00000000, +}; +#define _NWORD_PATCHIMAGE_PROP 329 + +#define _NWORD_PATCHSYS_PROP 0 + +#define _IRQ_PATCH_0 0x21004381 + + +#ifndef _PROP_SYSRAM_START +#define _PROP_SYSRAM_START 0x20000000 +#endif + +#ifndef _PROP_CPERAM_START +#define _PROP_CPERAM_START 0x21000000 +#endif + +#define _PROP_SYS_PATCH_FIXED_ADDR 0x20000000 + +#define _PROP_PARSER_PATCH_TAB_OFFSET 0x0390 +#define _PROP_PATCH_TAB_OFFSET 0x0398 +#define _PROP_IRQPATCH_OFFSET 0x0434 +#define _PROP_PATCH_VEC_OFFSET 0x4024 + +#ifndef _PROP_NO_PROG_STATE_VAR +static uint8_t bPropPatchEntered = 0; +#endif + +PATCH_FUN_SPEC void enterPropCpePatch(void) +{ +#if (_NWORD_PATCHIMAGE_PROP > 0) + uint32_t *pPatchVec = (uint32_t *) (_PROP_CPERAM_START + _PROP_PATCH_VEC_OFFSET); + + memcpy(pPatchVec, patchImageProp, sizeof(patchImageProp)); +#endif +} + +PATCH_FUN_SPEC void enterPropSysPatch(void) +{ +} + +PATCH_FUN_SPEC void configurePropPatch(void) +{ + uint8_t *pParserPatchTab = (uint8_t *) (_PROP_CPERAM_START + _PROP_PARSER_PATCH_TAB_OFFSET); + uint8_t *pPatchTab = (uint8_t *) (_PROP_CPERAM_START + _PROP_PATCH_TAB_OFFSET); + uint32_t *pIrqPatch = (uint32_t *) (_PROP_CPERAM_START + _PROP_IRQPATCH_OFFSET); + + + pPatchTab[84] = 0; + pPatchTab[142] = 1; + pPatchTab[66] = 2; + pPatchTab[102] = 3; + pPatchTab[28] = 4; + pPatchTab[104] = 5; + pPatchTab[75] = 6; + pPatchTab[73] = 7; + pPatchTab[117] = 8; + pPatchTab[105] = 9; + pPatchTab[106] = 10; + pPatchTab[70] = 11; + pPatchTab[71] = 12; + pPatchTab[69] = 13; + pParserPatchTab[0] = 14; + pPatchTab[60] = 15; + + pIrqPatch[21] = _IRQ_PATCH_0; +} + +PATCH_FUN_SPEC void applyPropPatch(void) +{ +#ifdef _PROP_NO_PROG_STATE_VAR + enterPropSysPatch(); + enterPropCpePatch(); +#else + if (!bPropPatchEntered) + { + enterPropSysPatch(); + enterPropCpePatch(); + bPropPatchEntered = 1; + } +#endif + configurePropPatch(); +} + +PATCH_FUN_SPEC void refreshPropPatch(void) +{ + configurePropPatch(); +} + +#ifndef _PROP_NO_PROG_STATE_VAR +PATCH_FUN_SPEC void cleanPropPatch(void) +{ + bPropPatchEntered = 0; +} +#endif + +PATCH_FUN_SPEC void rf_patch_cpe_prop(void) +{ + applyPropPatch(); +} + +#undef _IRQ_PATCH_0 + +//***************************************************************************** +// +// Mark the end of the C bindings section for C++ compilers. +// +//***************************************************************************** +#ifdef __cplusplus +} +#endif + +#endif // _RF_PATCH_CPE_PROP_H + diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_bt5.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_bt5.h new file mode 100644 index 000000000..951834610 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_bt5.h @@ -0,0 +1,623 @@ +/****************************************************************************** +* Filename: rf_patch_mce_bt5.h +* Revised: $Date: 2017-12-01 13:47:22 +0100 (fr, 01 des 2017) $ +* Revision: $Revision: 18103 $ +* +* Description: RF core patch for Bluetooth 5 support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_MCE_BT5_H +#define _RF_PATCH_MCE_BT5_H + +#include +#include "../inc/hw_types.h" + +#ifndef MCE_PATCH_TYPE +#define MCE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_MCERAM_BASE +#define RFC_MCERAM_BASE 0x21008000 +#endif + +#ifndef MCE_PATCH_MODE +#define MCE_PATCH_MODE 0 +#endif + +MCE_PATCH_TYPE patchBt5Mce[511] = { + 0x2dee609e, + 0x2dc22dce, + 0x2fef0f54, + 0x5f970fef, + 0x5000179d, + 0x048005a0, + 0x40007f40, + 0x0f080128, + 0x04000800, + 0x404003ff, + 0x00002e20, + 0x00130003, + 0x00210010, + 0x00320022, + 0x00430031, + 0x00500040, + 0x00620053, + 0x00710061, + 0x005f0072, + 0x005d0060, + 0x005b005e, + 0x0059005c, + 0x0055005a, + 0x00570056, + 0x00cc0058, + 0x003c00c3, + 0x00000033, + 0x00020001, + 0x04000003, + 0x00180800, + 0x00030008, + 0x000a001a, + 0x0011002c, + 0x0003003e, + 0x00180008, + 0x0011001a, + 0x000a002c, + 0x4000003e, + 0x0000000c, + 0x00091488, + 0x000105f9, + 0x008b8000, + 0x0f500080, + 0x0a1d0000, + 0x00000590, + 0x04000005, + 0x00c17b20, + 0x000f0000, + 0x017f7f27, + 0x000c8000, + 0x14980000, + 0x05f90009, + 0x80000000, + 0x0080008b, + 0x00000f70, + 0x0590121d, + 0x00050000, + 0x7b200400, + 0x000000c1, + 0x7f26000f, + 0x4000017f, + 0x000ca00c, + 0x00030387, + 0x050140cd, + 0x01ee8000, + 0x06700080, + 0x091e0000, + 0x00560500, + 0x0000000c, + 0x00505014, + 0x001f0000, + 0x00007f7f, + 0x7f7f8804, + 0x00002c7f, + 0x00000000, + 0x009f0000, + 0x2e204040, + 0xfd900c03, + 0x0000783c, + 0x720e720d, + 0x7210720f, + 0xa4e5a35d, + 0xb63c67d8, + 0x7100b0d0, + 0xb110a0d0, + 0x8162721b, + 0x39621020, + 0x00200630, + 0x11011630, + 0x6c011401, + 0x60cb60c2, + 0x613c60f2, + 0x60cd60c2, + 0x624e61d9, + 0x60d360c2, + 0x616460f2, + 0x60c31220, + 0x73111210, + 0x73137312, + 0x001081b1, + 0xb07091b0, + 0xc4b160a5, + 0xc79160d4, + 0xc1fb78bc, + 0xc540c302, + 0xc62160d8, + 0xc5fb78ac, + 0xc460c302, + 0x6f131820, + 0x16116e23, + 0x68d91612, + 0x9c8c94eb, + 0x1e008170, + 0xc03044c2, + 0xc1f092b0, + 0xc63292d0, + 0x1820c9c0, + 0x120340ef, + 0x16126e23, + 0x830068ec, + 0x60c29990, + 0x7291b005, + 0x91f0c100, + 0xb120b128, + 0xb111b113, + 0x7100b0e8, + 0xa0e8b128, + 0xb910b230, + 0x99308c80, + 0x84a2b111, + 0xc0f384b4, + 0x7100b0d1, + 0xb002b012, + 0xa0d1b111, + 0x722c7291, + 0xb013b630, + 0xb0e0b003, + 0xb1207100, + 0x92c08170, + 0x96408190, + 0xb1207100, + 0x964292c3, + 0xb1207100, + 0x71009644, + 0xa0e0b120, + 0xb633a630, + 0x7100b0d3, + 0xa0d3b113, + 0x9910c030, + 0x9930c020, + 0x7100b0d1, + 0xa0d1b111, + 0xa0037291, + 0x7263a002, + 0x73067305, + 0x72917391, + 0xc7c0a230, + 0x60c29010, + 0x65bd658d, + 0x710065c4, + 0x7393a910, + 0x8b4fb910, + 0x3d8f316f, + 0x7313720f, + 0x00000000, + 0xb231b074, + 0x970fb35d, + 0xa044a4e5, + 0x67d0b064, + 0x67e5c2b1, + 0x455722f3, + 0x971f7100, + 0x9933c0a3, + 0xa2359117, + 0xb0787100, + 0x67d4c243, + 0xc030453c, + 0x60c267f7, + 0x7860658d, + 0xc5f065be, + 0x65c46968, + 0xb115b0d5, + 0x7100c031, + 0x22508090, + 0xb07445ce, + 0x7393a910, + 0x720fb910, + 0xb2317313, + 0xb35da0d5, + 0x39208b40, + 0xa4e59700, + 0xb064a044, + 0xb23467d0, + 0x67e5c261, + 0x458722f3, + 0xb0787100, + 0x67d4c2a3, + 0x67f7c040, + 0x84b060c2, + 0x997095a0, + 0x100e8980, + 0x959084a0, + 0x89809970, + 0xc080140e, + 0xc080180e, + 0x8351180e, + 0x39213981, + 0x16310661, + 0x14101100, + 0x311e6c00, + 0x318e311e, + 0x972e398e, + 0x22308240, + 0xb0d545b0, + 0xb1157100, + 0x61a8a0d5, + 0x91e0c100, + 0x99107810, + 0x789a13e7, + 0xc540b4e5, + 0xb0029010, + 0xb006b004, + 0x78507000, + 0x90309050, + 0x90607870, + 0x70009040, + 0xb06cb235, + 0xb089b011, + 0xa0d1b4e5, + 0xb13da0d0, + 0x7000b0fd, + 0x8a439a31, + 0x31338a54, + 0x31343d63, + 0x96933d64, + 0xb05396a4, + 0x8990616b, + 0x73119300, + 0x721f7312, + 0x81707291, + 0x819092c0, + 0xc0509640, + 0xc15c67f7, + 0xc07ec31d, + 0xb0e8c008, + 0xb1287100, + 0xb230a0e8, + 0x8c80b910, + 0xb1119930, + 0x7100b0d1, + 0xb634a0d1, + 0xb002b0e1, + 0xb003b012, + 0xb121b013, + 0xa0e17100, + 0xb630a634, + 0xb0d3b113, + 0xb0e0b120, + 0xc0f084a4, + 0x663f104f, + 0x6a063914, + 0xc0f084b4, + 0x663f104f, + 0x6a0c3914, + 0xc0408c94, + 0x663f104f, + 0x6a123914, + 0x22048c94, + 0x81df4624, + 0x8210663f, + 0x421f2210, + 0xc0306219, + 0x663fc00f, + 0x62316a20, + 0xc01ec35d, + 0x663f81df, + 0x22108210, + 0x6224422c, + 0xc00fc030, + 0x6a2d663f, + 0xa0e16231, + 0x9910c030, + 0x9930c040, + 0xb0d1b111, + 0xa0d17100, + 0xa0037291, + 0x7223a002, + 0x061f60c2, + 0x148f313f, + 0x6ff214cf, + 0x39481028, + 0x14d20632, + 0x71006f23, + 0x92ceb120, + 0x70009643, + 0x67f7c060, + 0x93008990, + 0xdb007265, + 0xb31d9660, + 0x91e0c100, + 0x9320c0c0, + 0x97507b90, + 0xc3b1c100, + 0x6f13c7d2, + 0x16116e23, + 0x6a5f1612, + 0x677b67a8, + 0x22308240, + 0xb0d54670, + 0xb1157100, + 0x6266a0d5, + 0x67f7c070, + 0x7840b235, + 0x00018001, + 0x90109001, + 0x90307850, + 0x78809050, + 0x90609040, + 0x9380df20, + 0xb4e5b072, + 0xb63bb3f0, + 0x99107820, + 0x67f7c080, + 0xb10c7393, + 0xb13db14c, + 0xb10fb0fd, + 0xb008b14f, + 0xa0087100, + 0xa914b914, + 0xa910b14c, + 0x7100791e, + 0x894fb910, + 0x22c080c0, + 0x22f047f1, + 0xa0fd468c, + 0xa0447210, + 0xb074b064, + 0xb230b231, + 0x720f7232, + 0xa049a048, + 0xa009a04a, + 0x9930c200, + 0xb0d1b111, + 0xa0d17100, + 0x22208780, + 0xb0e74716, + 0xb127c1f0, + 0x6ab57100, + 0xa4e5b04f, + 0xb073a31d, + 0x9320c0c0, + 0xb041b04b, + 0x67f7c090, + 0x1e038183, + 0x895b42c2, + 0x18b08940, + 0x063c100c, + 0x31333920, + 0xc3201803, + 0x99331803, + 0x7830a910, + 0xb1119910, + 0xb0d1b910, + 0x46ff22f3, + 0x398a830a, + 0x866b395a, + 0x8650313b, + 0x39503980, + 0x1204000b, + 0x80907100, + 0x46ff2210, + 0x86528301, + 0xba3a8663, + 0x31858b25, + 0x1c543125, + 0x4af542fc, + 0x14b214a1, + 0x16135ef9, + 0x18a162f9, + 0x5af918b2, + 0x93011a13, + 0x96639652, + 0xb1271054, + 0xb23362e2, + 0x78d4b750, + 0x78c49794, + 0xc0e097a4, + 0x6b06b760, + 0x7223a0d1, + 0x8af473a3, + 0x9a14d0a0, + 0xa0e767f7, + 0x72047203, + 0x73067305, + 0x60c27291, + 0xc0d0a4e5, + 0x1cfe9930, + 0xd6a0471d, + 0xd690631f, + 0x93800000, + 0xb072b073, + 0x7ba0b04b, + 0xa0e79750, + 0xb0d1b111, + 0x7100b1b3, + 0xb04fb06f, + 0xb041b04d, + 0x9320c0c0, + 0x8af0ba39, + 0x97003110, + 0x7393b960, + 0x6b37cf00, + 0xa00ab01a, + 0x67f7c0b0, + 0x1e038183, + 0x895b433c, + 0x18b08940, + 0x18033133, + 0x180378e0, + 0xa9109933, + 0xb910b111, + 0x476722f3, + 0x89a189a0, + 0x434d1c10, + 0xb127b0e7, + 0x1201b750, + 0x80a07100, + 0x43632270, + 0x1e11b127, + 0x1611435d, + 0x89a06354, + 0x89b09790, + 0xb76097a0, + 0x80901201, + 0x43542210, + 0xb233a0e7, + 0xb750a04d, + 0x97a478f4, + 0x97947904, + 0xb760c0e0, + 0xa0d16b6f, + 0xc0c07223, + 0x720367f7, + 0x73057204, + 0x72917306, + 0xc15c60c2, + 0xc00ac00d, + 0xc070c008, + 0xc2db84ae, + 0x67996fb7, + 0x161b6b83, + 0xc0706fb7, + 0x6799c00a, + 0x84be6b89, + 0x6fb7161b, + 0xc00ac070, + 0x6b906799, + 0x6fb7161b, + 0xc00ac070, + 0x6b966799, + 0x10ef7000, + 0x313f061f, + 0x14cf148f, + 0x10286ff2, + 0x06323948, + 0x3f1a002a, + 0x6e7a3f1a, + 0x7000391e, + 0xc00dc15c, + 0xc0e0c008, + 0xc25b84ae, + 0x061f10ef, + 0x148f313f, + 0x6ff214cf, + 0x39481028, + 0x47ba0632, + 0x63c3ccca, + 0x47be1e12, + 0x63c3cc3a, + 0x47c21e22, + 0x63c3c3ca, + 0x2200c33a, + 0x10a643c7, + 0x6fb763cc, + 0x006a318a, + 0x161b6e7a, + 0x6bae391e, + 0x7000b064, + 0x1e038183, + 0x700043d0, + 0x91179933, + 0xa35d7100, + 0x73917223, + 0x72037291, + 0x72637204, + 0x9000c030, + 0x9010ffc0, + 0x73067305, + 0x895b7000, + 0x18b08940, + 0x18033123, + 0x99331813, + 0xb111a910, + 0xb0d1b910, + 0xb9147000, + 0xb14ca914, + 0x792ea910, + 0x9a006295, + 0x220089f0, + 0xb9e047f8, + 0x00007000 +}; + +PATCH_FUN_SPEC void rf_patch_mce_bt5(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 511; i++) { + HWREG(RFC_MCERAM_BASE + 4 * i) = patchBt5Mce[i]; + } +#else + const uint32_t *pS = patchBt5Mce; + volatile unsigned long *pD = &HWREG(RFC_MCERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 63; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); + + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_genfsk.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_genfsk.h new file mode 100644 index 000000000..d6074376a --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_genfsk.h @@ -0,0 +1,591 @@ +/****************************************************************************** +* Filename: rf_patch_mce_genfsk.h +* Revised: $Date: 2018-01-15 06:15:14 +0100 (ma, 15 jan 2018) $ +* Revision: $Revision: 18170 $ +* +* Description: RF core patch for Generic FSK support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef _RF_PATCH_MCE_GENFSK_H +#define _RF_PATCH_MCE_GENFSK_H + +#include +#include "../inc/hw_types.h" + +#ifndef MCE_PATCH_TYPE +#define MCE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_MCERAM_BASE +#define RFC_MCERAM_BASE 0x21008000 +#endif + +#ifndef MCE_PATCH_MODE +#define MCE_PATCH_MODE 0 +#endif + +MCE_PATCH_TYPE patchGenfskMce[484] = { + 0x2fcf603c, + 0x030c3f9d, + 0x070c680a, + 0xfff0003f, + 0xff0000ff, + 0x00c08080, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00070003, + 0x00003d1f, + 0x04000000, + 0x0000000f, + 0x000b0387, + 0x004340f4, + 0x00828000, + 0x06700080, + 0x091e0000, + 0x00540510, + 0x02000005, + 0x00613e10, + 0x002f0000, + 0x027f3030, + 0x00000000, + 0x00000000, + 0x00000000, + 0x0000aa00, + 0x00000000, + 0x00000000, + 0x72637223, + 0xa4e5a35d, + 0x73057303, + 0x73047203, + 0x72047306, + 0x72917391, + 0xffc0b008, + 0xa0089010, + 0x720e720d, + 0x7210720f, + 0x7100b0d0, + 0xa0d0b110, + 0x8162721b, + 0x39521020, + 0x00200670, + 0x11011630, + 0x6c011401, + 0x60796078, + 0x637960f8, + 0x60786078, + 0x60786078, + 0x60796078, + 0x637960f8, + 0x60786078, + 0x60786078, + 0x72231210, + 0x73127311, + 0x81b17313, + 0x91b00010, + 0x6050b070, + 0xc030606e, + 0xc14167c1, + 0xc4e0c2b2, + 0x6f131820, + 0x16116e23, + 0x687f1612, + 0x9c807830, + 0x9c907840, + 0x9ca07850, + 0x948078a0, + 0xc4f29490, + 0x1820c750, + 0x12034095, + 0x16126e23, + 0x78b06892, + 0x606e9990, + 0x81907291, + 0x81709640, + 0x2a703980, + 0x16111001, + 0x84b484a2, + 0xc0f5c0f3, + 0x1c01c200, + 0xc10040bd, + 0x40b31c10, + 0x10134cb5, + 0x18301803, + 0x1a101a13, + 0x68b03912, + 0x13f360bd, + 0x13f360bd, + 0xc1001015, + 0x1a151850, + 0x39141a10, + 0xb0e868bb, + 0xb1287100, + 0xb230a0e8, + 0x8990b910, + 0xb1119930, + 0x7100b0d1, + 0xb012b002, + 0xa0d1b111, + 0xb6307291, + 0xb013b003, + 0xb0e0722c, + 0xb1207100, + 0x92c08170, + 0xb1207100, + 0x22f08170, + 0x13f044d6, + 0x40e21c03, + 0x964292c3, + 0xb1207100, + 0x964492c5, + 0xb1207100, + 0xa630b0e0, + 0xa0e17000, + 0x9910c030, + 0x9930c040, + 0xb0d1b111, + 0xb1117100, + 0x7291a0d1, + 0xa002a003, + 0x7000a230, + 0x73127311, + 0x67c1c040, + 0x91f0c100, + 0xb6336498, + 0xb0d3b113, + 0xa0d37100, + 0x606e64e9, + 0xb016b006, + 0xb014b004, + 0xb012b002, + 0x78628440, + 0x81730420, + 0x2a733983, + 0xc1f294e3, + 0x31621832, + 0x31511021, + 0x00200012, + 0x10309440, + 0x10011610, + 0x39303121, + 0x41232210, + 0x31501220, + 0x31801003, + 0x16300010, + 0x12029380, + 0x22731204, + 0x84a04136, + 0x89829970, + 0x84c01a82, + 0x89849970, + 0x61381a84, + 0x41432263, + 0x997084b0, + 0x1a808980, + 0x84d01402, + 0x89809970, + 0x14041a80, + 0x84b0614f, + 0x04107891, + 0x89829970, + 0x84d01a42, + 0x04107891, + 0x89849970, + 0x31521a44, + 0x39633154, + 0x16130633, + 0x38343832, + 0x39823182, + 0x00423184, + 0x84a09722, + 0x84b09590, + 0x84c095a0, + 0x84d095b0, + 0x781095c0, + 0x90509030, + 0x90407820, + 0xb2359060, + 0x83338cb2, + 0xb0199332, + 0xc00cb018, + 0x8170c00b, + 0x39803180, + 0x81713940, + 0x0431c0f3, + 0x1441c014, + 0x1412c002, + 0x3122697b, + 0xc01084ed, + 0x312d140d, + 0x8c9e142d, + 0x311e318e, + 0x8c99397e, + 0x39793149, + 0x31293949, + 0x81a0109a, + 0x41922200, + 0xb008b009, + 0x720e720d, + 0xb121720f, + 0x7100b0e1, + 0xa0e1b072, + 0xb06ea04e, + 0xb06cb011, + 0x993ab089, + 0xb9147291, + 0xc662a914, + 0xc04f9912, + 0x8c8166fa, + 0x45ae22f1, + 0x22f18ca1, + 0x625845ae, + 0xb0737100, + 0x80b7b910, + 0x45e52207, + 0x8c81a910, + 0x41bf22f1, + 0x41bf2237, + 0x80b0b133, + 0x45ba2230, + 0x22e161cd, + 0x809041d2, + 0x41d22250, + 0x8240b115, + 0x41ae2220, + 0xb9149939, + 0xb116a914, + 0x993d61ae, + 0xa914b914, + 0x61aeb116, + 0x22f08ca0, + 0x223741de, + 0xb07541de, + 0x80b0b133, + 0x45d82230, + 0x61aeb087, + 0x433d22d1, + 0x22208090, + 0x66c0433d, + 0x993f61ae, + 0x8450c7f3, + 0x39803180, + 0x00303183, + 0xb0879450, + 0xb112a0f3, + 0xb115a0d2, + 0xb111a0d5, + 0xa0d6b0d1, + 0xb133b130, + 0x220080b0, + 0x223045f6, + 0x710045f6, + 0x99301260, + 0xba3fb111, + 0x87208b11, + 0x97011801, + 0x8c418c30, + 0xa009a008, + 0xa637a638, + 0x1801c022, + 0x4e181c21, + 0x4a161412, + 0x1c016219, + 0x4e184219, + 0x6219b637, + 0xb041b638, + 0x8ca0b061, + 0x422122e0, + 0x22208240, + 0x7100458d, + 0xb06eb04e, + 0x220180b1, + 0x223146b2, + 0x729146b2, + 0x84e1b116, + 0xc2603121, + 0x99301410, + 0x9910c7e0, + 0x9910c6f0, + 0xb0d6b116, + 0xb960a0d1, + 0x8c448c33, + 0x8c648c53, + 0x80b17100, + 0x46b22201, + 0x46b22231, + 0x22c08c80, + 0x8b414648, + 0x418d2201, + 0xc00081f1, + 0x84e091f0, + 0x6a4c81d2, + 0xc30091f1, + 0xb2319070, + 0x67c1c050, + 0xa0f3a0f0, + 0x7000a044, + 0xb0737100, + 0x80b7b910, + 0x46772207, + 0x46952237, + 0x8c81a910, + 0x427022e1, + 0x22508090, + 0xb1154270, + 0x22208240, + 0x993d4258, + 0xa914b914, + 0x6258b116, + 0x433d22d1, + 0x22208090, + 0x66c0433d, + 0x993f6258, + 0xa0d2b112, + 0xa0d5b115, + 0xb0d1b111, + 0xb130a0d6, + 0x80b0b133, + 0x467f2200, + 0x467f2230, + 0x12607100, + 0xb1119930, + 0x8b11ba3f, + 0x31808720, + 0x18013d80, + 0x8c309701, + 0xa1b28c41, + 0x993f6208, + 0xa0d2b112, + 0xa0d5b115, + 0xb0d1b111, + 0xb130a0d6, + 0x80b0b133, + 0x469d2200, + 0x469d2230, + 0x12607100, + 0xb1119930, + 0x8b11ba3f, + 0x3d808720, + 0x97011801, + 0x8c618c50, + 0x6208b1b2, + 0xa910b073, + 0xa960b910, + 0xa04eb072, + 0xb011b06e, + 0x22f08c80, + 0x220145e5, + 0x62954677, + 0x22b08c80, + 0x1e3b46c6, + 0x62c846f8, + 0x46f81e7b, + 0xba39c00b, + 0x31808af0, + 0x16103d80, + 0x140c3d30, + 0x220080b0, + 0x700042d4, + 0x39838c83, + 0x8c8106f3, + 0x0401cff0, + 0x1c1c3031, + 0x12004ef0, + 0x1c0c1810, + 0x80b04af2, + 0x42e52200, + 0x10c27000, + 0x3c321612, + 0x83508cb1, + 0x42f42210, + 0x933162f6, + 0x7000b112, + 0x62e1101c, + 0x62e1100c, + 0x62ed1821, + 0x62ed1421, + 0x62ee161b, + 0xb111b116, + 0xb133b130, + 0xb112b115, + 0x720e720d, + 0xb0f0720f, + 0x8c82b0f3, + 0x430b22f2, + 0xb913b0d6, + 0x8ca0630e, + 0x432e22f0, + 0xa444b445, + 0xa469b468, + 0x3180caa0, + 0x0001caa1, + 0x94d194c1, + 0x31838ca3, + 0x84503983, + 0x39803180, + 0x00303183, + 0x84409450, + 0x39503150, + 0x39838ca3, + 0xc1f406f3, + 0x31841834, + 0x00403134, + 0xb0899440, + 0x433822e2, + 0x394a8c9a, + 0x312a398a, + 0xb0d5993a, + 0xb913b0d6, + 0x22d28c82, + 0xb0d2433c, + 0xb23f7000, + 0xa0f3a0f0, + 0xb914993e, + 0xb116a914, + 0xb133b130, + 0x22f08240, + 0xb1154346, + 0xa0048002, + 0xa001a006, + 0x72047203, + 0x67c1c060, + 0xb9147100, + 0xb0d5b116, + 0x7100a23f, + 0xa0d5b115, + 0x90307810, + 0x78209002, + 0x90609040, + 0xa23fb072, + 0x993a66fa, + 0xb116a914, + 0xba3c61a7, + 0x8b5481b0, + 0x31843924, + 0x91b40004, + 0x67c1c070, + 0x72917391, + 0x72067263, + 0x72047202, + 0x73067305, + 0x8240606e, + 0x47812230, + 0x7100b0d5, + 0xa0d5b115, + 0x13006379, + 0xb63c91e0, + 0xc080b35d, + 0xb11867c1, + 0x12006506, + 0x99301a10, + 0x9910c380, + 0x9910c280, + 0xb0d6a0d1, + 0x22008090, + 0x81844450, + 0x43921e04, + 0xb1169934, + 0xd0908702, + 0x67c19a12, + 0x22118b41, + 0x8c5243a8, + 0xe0a08c63, + 0x9a239a12, + 0x63ae67c1, + 0x8c438c32, + 0x9a12e0b0, + 0x67c19a23, + 0x89318940, + 0x4bbe1c01, + 0x1ef11801, + 0x89314bbc, + 0x99311af1, + 0xb1167100, + 0x993116f1, + 0x7100a235, + 0xa0d6b116, + 0x9a006367, + 0x220089f0, + 0xb9e047c2, + 0x00007000 +}; + +PATCH_FUN_SPEC void rf_patch_mce_genfsk(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 484; i++) { + HWREG(RFC_MCERAM_BASE + 4 * i) = patchGenfskMce[i]; + } +#else + const uint32_t *pS = patchGenfskMce; + volatile unsigned long *pD = &HWREG(RFC_MCERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 60; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); + + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_ieee_802_15_4.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_ieee_802_15_4.h new file mode 100644 index 000000000..f72c7afb4 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_ieee_802_15_4.h @@ -0,0 +1,479 @@ +/****************************************************************************** +* Filename: rf_patch_mce_ieee_802_15_4.h +* Revised: $Date: 2018-01-15 06:15:14 +0100 (ma, 15 jan 2018) $ +* Revision: $Revision: 18170 $ +* +* Description: RF core patch for IEEE 802.15.4-2006 support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +#ifndef _RF_PATCH_MCE_IEEE_802_15_4_H +#define _RF_PATCH_MCE_IEEE_802_15_4_H + +#include +#include "../inc/hw_types.h" + +#ifndef MCE_PATCH_TYPE +#define MCE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_MCERAM_BASE +#define RFC_MCERAM_BASE 0x21008000 +#endif + +#ifndef MCE_PATCH_MODE +#define MCE_PATCH_MODE 0 +#endif + +MCE_PATCH_TYPE patchIeee_802_15_4Mce[367] = { + 0xf7036064, + 0x70399b3a, + 0x039bb3af, + 0x39b33af7, + 0x9b3aaf70, + 0xb3aff703, + 0x3af77039, + 0xaf70039b, + 0x08fcb9b3, + 0x8fc664c5, + 0xfc644c50, + 0xc64cc508, + 0x64c5508f, + 0x4c5008fc, + 0xc5088fc6, + 0x508ffc64, + 0x2fc0c64c, + 0x079c0fcf, + 0x7f7f01e0, + 0x0000dead, + 0x00000003, + 0x0000001f, + 0x80000000, + 0x0004000c, + 0x00011400, + 0x00000009, + 0x00008000, + 0x06700000, + 0x16aa002b, + 0x00000a11, + 0x00000b60, + 0x00404010, + 0x00060000, + 0x001e1e1e, + 0x00000000, + 0x00000003, + 0x0000001f, + 0x80000000, + 0x0004000c, + 0x000114c4, + 0x00000009, + 0x00008000, + 0x0f900000, + 0x121d0000, + 0x00000a11, + 0x00000b60, + 0x00404010, + 0x00060000, + 0x00202020, + 0x00000000, + 0x720d7223, + 0x720f720e, + 0x72637210, + 0x7203a35d, + 0x73057204, + 0x73917306, + 0xc7c07291, + 0xb0d09010, + 0xa0d07100, + 0x721bb110, + 0x10208162, + 0x06703952, + 0x16300020, + 0x14011101, + 0x60a16c01, + 0x60ca60b2, + 0x61466119, + 0x60a160a1, + 0x60a160a1, + 0x60ca60ad, + 0x61466119, + 0x60a160a1, + 0x60a160a1, + 0x60ca60b2, + 0x61466119, + 0x60a160a1, + 0x60a160a1, + 0x60ca60ad, + 0x61466119, + 0x60a160a1, + 0x60a460a1, + 0x60a51220, + 0x73111210, + 0x73137312, + 0x001081b1, + 0xb07091b0, + 0xc4616073, + 0xc460c2b2, + 0x60b61820, + 0xc2b2c281, + 0x1820c460, + 0x6e236f13, + 0x16121611, + 0xc63268b6, + 0x1820c9c0, + 0x120340c3, + 0x16126e23, + 0x7a4068c0, + 0xc1409c80, + 0x12209c90, + 0x60a49990, + 0xc1307291, + 0xb11391f0, + 0x81621213, + 0xd0303982, + 0x66d89a12, + 0x40e41e02, + 0x40e41e12, + 0x40dd1e22, + 0x00238992, + 0xb00560e4, + 0x1e208990, + 0x60e444e2, + 0xa005b270, + 0xb0e8b128, + 0xb1287100, + 0x9233a0e8, + 0x1e008c80, + 0x993040f2, + 0xb111b910, + 0x7100b0d1, + 0xb002b012, + 0xb013b633, + 0xb111b003, + 0x7291a0d1, + 0x7100b0d3, + 0xa0d3b113, + 0xc0301000, + 0xc0209910, + 0xb0d19930, + 0xb1117100, + 0x7291a0d1, + 0x39828162, + 0x490d1a22, + 0x726366d1, + 0xa002a003, + 0x73057263, + 0x73917306, + 0xa2307291, + 0x9010c7c0, + 0xb63c60a4, + 0x94c07810, + 0x782095b0, + 0x95c094d0, + 0xc0f18190, + 0xc0120410, + 0x14023110, + 0x94a06f20, + 0x16129590, + 0x94b06f20, + 0x824095a0, + 0x45352230, + 0x7100b0d5, + 0xa0d5b115, + 0x7291612d, + 0x91e0c030, + 0xb004b002, + 0x8160b006, + 0x41402280, + 0x61417a20, + 0x90507a10, + 0x7a309030, + 0x90409060, + 0x8460b235, + 0x84613180, + 0x39813181, + 0x94500010, + 0x06f58195, + 0x1217120e, + 0x12f01206, + 0xc1909440, + 0xb0119440, + 0xb0f9b139, + 0xb089a0fc, + 0x12041203, + 0x39828162, + 0x9a12d040, + 0x1e2266d8, + 0x1e324227, + 0x7100421d, + 0xa0d17291, + 0xa0f9b139, + 0xb0fcb13c, + 0xc600a444, + 0x99303140, + 0xb111b910, + 0x7100b0d1, + 0x7291a0d1, + 0x22108090, + 0xb13c46d5, + 0x1e7665be, + 0x81904194, + 0x06f03940, + 0x45461c0f, + 0x1c908c90, + 0x12054d46, + 0x12761202, + 0x9070c300, + 0xc050b230, + 0xc0c066d8, + 0x7a509440, + 0x619b9450, + 0x91cf1647, + 0x1e008180, + 0x1c70419b, + 0x710049a0, + 0x22008090, + 0x617b4476, + 0x7291a235, + 0x72047203, + 0x73067305, + 0xa004a002, + 0x7263a006, + 0x73067305, + 0x72917391, + 0x9010c7c0, + 0x39808160, + 0x4dbb1a30, + 0x22508000, + 0x122045b9, + 0x124061bc, + 0x89c061bc, + 0x60a49990, + 0x120a1209, + 0x120dc0cc, + 0x8ad8ba3e, + 0x49c91c89, + 0x4dcf1c8a, + 0x108961d6, + 0x18801200, + 0x10db100a, + 0x108a61d6, + 0x18801200, + 0x10db1009, + 0x61d6168b, + 0x1e8d161d, + 0x908c41db, + 0x10bf61c2, + 0x41e61e82, + 0x16121495, + 0x45e61e82, + 0x81b03125, + 0x91b50005, + 0x49e91e8b, + 0xc0701a8b, + 0x163018b0, + 0x14011101, + 0x908c6c01, + 0x908c908c, + 0x908c908c, + 0x908c908c, + 0xb082908c, + 0xba3e1000, + 0xb0838ad3, + 0x1000b083, + 0x8ad4ba3e, + 0x4a071e8f, + 0x4a0c1ca3, + 0x4a0e1ca4, + 0x1c937000, + 0x1c944e0c, + 0x70004e0e, + 0x62101a1e, + 0x6210161e, + 0x1ce0c040, + 0x10e04a17, + 0x4a1a1640, + 0xc00e7000, + 0x7000b085, + 0xb084c00e, + 0xa3a77000, + 0x66acb3a5, + 0x6a21cbe0, + 0xc7f066ac, + 0xb3a76a24, + 0x8460a3a5, + 0x31801640, + 0x16418461, + 0x39813181, + 0x94500010, + 0x94b07810, + 0x782095a0, + 0x959094a0, + 0xb0d1a0f9, + 0xb258b005, + 0xc0307291, + 0xb1309910, + 0xc290b133, + 0x80b09440, + 0x465e2230, + 0x465e2200, + 0x9930c040, + 0xb910a910, + 0xa0f0a0f3, + 0x7100b111, + 0xc2f0b064, + 0xb1309930, + 0xb111b133, + 0x80b07100, + 0x465c2230, + 0x465c2200, + 0x623f66ac, + 0x625e66ac, + 0xc0408248, + 0xa9109930, + 0x3988b910, + 0x9a18d060, + 0xb11166d8, + 0xc2f07100, + 0xb0649930, + 0xb133b130, + 0x7100b111, + 0x220080b0, + 0x22304676, + 0x627d4676, + 0x39818241, + 0x9a11d070, + 0x1c1866d8, + 0x66ac4a86, + 0x9930c040, + 0xb910a910, + 0x66d8c080, + 0xb0647100, + 0x9440c190, + 0xb139b0f9, + 0xa0f0a0f3, + 0x06f08190, + 0x3110c012, + 0x6f201402, + 0x959094a0, + 0x6f201612, + 0x95a094b0, + 0x9930c5f0, + 0x31808460, + 0x31818461, + 0x00103981, + 0xa9109450, + 0xb111b910, + 0x7100b133, + 0x229080b0, + 0x22304568, + 0x622746a1, + 0x39808160, + 0x4eb81a30, + 0x22508000, + 0xb00546b5, + 0xb27062b7, + 0x7000a005, + 0x22128232, + 0x261246c0, + 0x92322a22, + 0x62c499c2, + 0x26222a12, + 0x99c29232, + 0x96a49693, + 0x9a30c030, + 0x8a548a43, + 0x82400662, + 0x1c020660, + 0xb05346cb, + 0x89907000, + 0x99900a60, + 0xc0907000, + 0x615366d8, + 0x89f09a00, + 0x46d92200, + 0x7000b9e0 +}; + +PATCH_FUN_SPEC void rf_patch_mce_ieee_802_15_4(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 367; i++) { + HWREG(RFC_MCERAM_BASE + 4 * i) = patchIeee_802_15_4Mce[i]; + } +#else + const uint32_t *pS = patchIeee_802_15_4Mce; + volatile unsigned long *pD = &HWREG(RFC_MCERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 45; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); + + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_sl_longrange.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_sl_longrange.h new file mode 100644 index 000000000..02157e0a5 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_sl_longrange.h @@ -0,0 +1,335 @@ +/****************************************************************************** +* Filename: rf_patch_mce_sl_longrange.h +* Revised: $Date: 2018-01-15 06:15:14 +0100 (ma, 15 jan 2018) $ +* Revision: $Revision: 18170 $ +* +* Description: RF core patch for SimpleLink Long Range support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef _RF_PATCH_MCE_SL_LONGRANGE_H +#define _RF_PATCH_MCE_SL_LONGRANGE_H + +#include +#include "../inc/hw_types.h" + +#ifndef MCE_PATCH_TYPE +#define MCE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_MCERAM_BASE +#define RFC_MCERAM_BASE 0x21008000 +#endif + +#ifndef MCE_PATCH_MODE +#define MCE_PATCH_MODE 0 +#endif + +MCE_PATCH_TYPE patchSimplelinkLrmMce[228] = { + 0x60466046, + 0x2fcf146f, + 0xdb3e0f9d, + 0x00007f7f, + 0x00020001, + 0x00000003, + 0x000c0003, + 0x00cc000f, + 0x003c00c3, + 0xcccc0033, + 0x33cccc33, + 0x0f003333, + 0x005f0f0f, + 0x005d0060, + 0x005b005e, + 0x0059005c, + 0x0003005a, + 0x001f0007, + 0x00000000, + 0x000f0400, + 0x03870000, + 0x40c00001, + 0x80000043, + 0x01000004, + 0x000006f0, + 0x0524091e, + 0x00050054, + 0x48200800, + 0x00000048, + 0x7f7f001f, + 0x8004004c, + 0x2e000000, + 0x00000000, + 0x00000000, + 0x10200000, + 0x65bb7223, + 0xa4e5a35d, + 0x73057303, + 0x73047203, + 0x72047306, + 0x72917391, + 0xffc0b008, + 0xa0089010, + 0x720e720d, + 0x7210720f, + 0x7100b0d0, + 0xa0d0b110, + 0x8162721b, + 0x39521020, + 0x00200670, + 0x11011630, + 0x6c011401, + 0x607e607d, + 0x60956095, + 0x607d607d, + 0x607d607d, + 0x60731220, + 0x72231210, + 0x73127311, + 0x73147313, + 0x001081b1, + 0xb07091b0, + 0x6072605a, + 0xc2b2c211, + 0x1820c4f0, + 0x6e236f13, + 0x16121611, + 0xc6326882, + 0x1820c9c0, + 0x1203408f, + 0x16126e23, + 0xb63c688c, + 0x91a0d000, + 0x9990c0c0, + 0xb1186072, + 0x409d8cb4, + 0xb0099334, + 0xb019b008, + 0x6594b018, + 0x94507860, + 0x81a7721e, + 0x39871076, + 0x99770677, + 0x16188988, + 0x9a17d030, + 0x64dc65c1, + 0x99c07850, + 0xb00764ef, + 0xb124b017, + 0xc205b0e4, + 0x657cc004, + 0x1c54658d, + 0x91c048ba, + 0x81811614, + 0x40b51e01, + 0x1c411671, + 0xa0e74cb5, + 0x798f797e, + 0x97af979e, + 0x658d1204, + 0x1c541614, + 0x91c040cd, + 0xa23560c7, + 0x65c1c040, + 0xa0e4a0e7, + 0x72027206, + 0x72037204, + 0x73057204, + 0x73917306, + 0x60727291, + 0x3181c061, + 0xcff3c002, + 0x16116e12, + 0x16116e12, + 0x6e13c7e0, + 0x6e121611, + 0x68e51611, + 0x6e12cff0, + 0x68eb1611, + 0xb0067000, + 0xb004b016, + 0xb002b014, + 0x7830b012, + 0x90509030, + 0x90407840, + 0xb2359060, + 0xc090b072, + 0xc60093f0, + 0x99303150, + 0x9910c060, + 0xb0f7b137, + 0xb10cb14c, + 0xb0d1b111, + 0x80b07100, + 0x45272270, + 0xa10cb073, + 0xb111a0f7, + 0xb127a0d1, + 0xba3eb0e7, + 0xb14c7100, + 0xb041b127, + 0xa044b061, + 0xa008a009, + 0xb1277100, + 0xb06db04d, + 0xb231b074, + 0xb1277100, + 0x80907000, + 0x41332210, + 0xa910b111, + 0x93308cb0, + 0x93f0c090, + 0xb008b009, + 0xb0e76104, + 0xa009a0f7, + 0xba39a008, + 0x93f0c0b0, + 0x31848af4, + 0x98d43d84, + 0x98e08990, + 0x6941c050, + 0xc40188f0, + 0x3d701410, + 0x31648334, + 0x18043d64, + 0x3520cff0, + 0x93340404, + 0x22c180c1, + 0xc060450e, + 0x80c17100, + 0x450e22c1, + 0x6952b127, + 0xb910b069, + 0xa0e7b127, + 0x12096104, + 0x6572120a, + 0x141a1409, + 0x416f1e17, + 0x14196572, + 0x1e37140a, + 0x6572416f, + 0x141a1409, + 0x14196572, + 0x3c89140a, + 0x70003c8a, + 0xb1277100, + 0xb1277100, + 0x318089a0, + 0x89b13980, + 0x70003981, + 0x109b655d, + 0x655d10ac, + 0x318d10bd, + 0x10cd14db, + 0x14dc318d, + 0x14a9318a, + 0x149c149b, + 0x97ac979b, + 0xa0e77000, + 0x7100b079, + 0xb0e7b124, + 0x700089d0, + 0x65c1c050, + 0xc0fcc19b, + 0xc07084a1, + 0x06321012, + 0x6f2314c2, + 0x41a22200, + 0x61a71034, + 0x00343183, + 0x6e746fb7, + 0x3921161b, + 0x84b1699a, + 0x1012c070, + 0x14c20632, + 0x22006f23, + 0x103441b3, + 0x318361b8, + 0x6fb70034, + 0x161b6e74, + 0x69ab3921, + 0x86307000, + 0x3151c801, + 0x96300410, + 0x9a007000, + 0x220089f0, + 0xb9e045c2, + 0x00007000 +}; + +PATCH_FUN_SPEC void rf_patch_mce_sl_longrange(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 228; i++) { + HWREG(RFC_MCERAM_BASE + 4 * i) = patchSimplelinkLrmMce[i]; + } +#else + const uint32_t *pS = patchSimplelinkLrmMce; + volatile unsigned long *pD = &HWREG(RFC_MCERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 28; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); + + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_slr.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_slr.h new file mode 100644 index 000000000..f114a7ab3 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_mce_slr.h @@ -0,0 +1,365 @@ +/****************************************************************************** +* Filename: rf_patch_mce_slr.h +* Revised: $Date: 2017-12-01 13:47:22 +0100 (fr, 01 des 2017) $ +* Revision: $Revision: 18103 $ +* +* Description: RF core patch for SimpleLink Long Range support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef _RF_PATCH_MCE_SLR_H +#define _RF_PATCH_MCE_SLR_H + +#include +#include "../inc/hw_types.h" + +#ifndef MCE_PATCH_TYPE +#define MCE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_MCERAM_BASE +#define RFC_MCERAM_BASE 0x21008000 +#endif + +#ifndef MCE_PATCH_MODE +#define MCE_PATCH_MODE 0 +#endif + +MCE_PATCH_TYPE patchSlrMce[254] = { + 0x60456045, + 0x2fcf146f, + 0xdb3e0f9d, + 0x3c337f7f, + 0xcccc333c, + 0x00003cc3, + 0x00020001, + 0x00000003, + 0x000c0003, + 0x00cc000f, + 0x003c00c3, + 0xcccc0033, + 0x33cccc33, + 0x0f003333, + 0x00000f0f, + 0x00070003, + 0x0000001f, + 0x04000000, + 0x0000000f, + 0x00010387, + 0x004348c0, + 0x00048000, + 0x06f00080, + 0x091e0000, + 0x04500524, + 0x08000005, + 0x00484820, + 0x001f0000, + 0x004c7f7f, + 0x00009000, + 0x00007f7f, + 0x00000000, + 0x00000000, + 0x00000000, + 0x72230000, + 0x73037263, + 0x72037305, + 0x73067304, + 0x73917204, + 0xc7c07291, + 0x00018001, + 0x90109001, + 0x90010801, + 0x720e720d, + 0x7210720f, + 0x7100b0d0, + 0xa0d0b110, + 0x8162721b, + 0x39521020, + 0x00200670, + 0x11011630, + 0x6c011401, + 0x6077606c, + 0x610b608b, + 0x72231210, + 0x73127311, + 0x73147313, + 0x001081b1, + 0xb07091b0, + 0xc1e1605a, + 0xc4e0c2b2, + 0x6f131820, + 0x16116e23, + 0x687b1612, + 0xc9c0c632, + 0x40881820, + 0x6e231203, + 0x68851612, + 0x91a0d000, + 0x7311606c, + 0xc0007312, + 0xc00991f0, + 0x398081a0, + 0x16100670, + 0x449a1e10, + 0xc008c0b7, + 0x60a9c01e, + 0x44a01e20, + 0xc018c0f7, + 0x60a9c03e, + 0x44a61e40, + 0xc038c137, + 0x60a9c07e, + 0xc078c177, + 0xc030c0fe, + 0xb0e865f6, + 0xb1287100, + 0xb230a0e8, + 0xb003b630, + 0xb002b013, + 0x8176b012, + 0x06f63946, + 0xb0e01616, + 0xc13cc004, + 0x92c0c070, + 0xc0707821, + 0x06321012, + 0x6f2314c2, + 0x71009643, + 0x3921b120, + 0x161468c0, + 0x44be1c64, + 0x0bf17821, + 0x1012c070, + 0x14c20632, + 0x96436f23, + 0xb1207100, + 0x68cf3921, + 0xc6d5c4f4, + 0x81dfc066, + 0x821064f4, + 0x40e12210, + 0xc07060db, + 0xc00f1a10, + 0x68e364f4, + 0xc030a0e1, + 0x99309910, + 0xb0d1b111, + 0xb1117100, + 0x7291a0d1, + 0xa002a003, + 0x606c7223, + 0x316f061f, + 0x109100f9, + 0x99710441, + 0x061a898a, + 0x04511091, + 0x898b9971, + 0x311b061b, + 0x391914ba, + 0x6fa3147a, + 0x92ce9643, + 0xb1207100, + 0xb1187000, + 0x410f8cb4, + 0xc1f09334, + 0x78609440, + 0x721e9450, + 0x107681a7, + 0x06773987, + 0x89889977, + 0xd0401618, + 0x65f69a17, + 0x95907870, + 0x95a07880, + 0x95b07890, + 0x95c078a0, + 0x78506557, + 0x656a99c0, + 0xb007b017, + 0xb0e4b124, + 0xc004c205, + 0x65ef65de, + 0x49351c54, + 0x161491c0, + 0x1e018181, + 0x16714130, + 0x4d301c41, + 0x79bea0e7, + 0x979e79cf, + 0x120497af, + 0x161465ef, + 0x41481c54, + 0x614291c0, + 0xc050a235, + 0xa0e765f6, + 0x7206a0e4, + 0x72047202, + 0x72047203, + 0x73067305, + 0x72917391, + 0xc061606c, + 0xc0023181, + 0x6e12cff3, + 0x6e121611, + 0xc7e01611, + 0x16116e13, + 0x16116e12, + 0xcff06960, + 0x16116e12, + 0x70006966, + 0xb016b006, + 0xb014b004, + 0xb012b002, + 0x90307830, + 0x78409050, + 0x90609040, + 0xb072b235, + 0x93f0c090, + 0xb0f7b137, + 0xb0f6b136, + 0xb0737100, + 0xa0f7b127, + 0x80b0a0f7, + 0x459f2270, + 0xa0f7a0f6, + 0xba3eb0e7, + 0xb1367100, + 0xb041b127, + 0xc0f0b061, + 0xba3f93f0, + 0x31148b14, + 0xa0449704, + 0xb1277100, + 0xb06db04d, + 0xb231b074, + 0xb1277100, + 0xb0e77000, + 0x8af4ba39, + 0x3d843184, + 0xc05098d4, + 0xc05098e0, + 0x88f069a8, + 0x1410c201, + 0x83343d60, + 0x3d643164, + 0xcff01804, + 0x04043520, + 0xc0b09334, + 0xb06993f0, + 0x9a14d060, + 0x710065f6, + 0xa0e7b127, + 0x1209617a, + 0x65d4120a, + 0x141a1409, + 0x41d11e17, + 0x141965d4, + 0x1e37140a, + 0x65d441d1, + 0x141a1409, + 0x141965d4, + 0x3c89140a, + 0x70003c8a, + 0xb1277100, + 0xb1277100, + 0x318089a0, + 0x89b13980, + 0x70003981, + 0x109b65bf, + 0x65bf10ac, + 0x318d10bd, + 0x10cd14db, + 0x14dc318d, + 0x14a9318a, + 0x149c149b, + 0x97ac979b, + 0xa0e77000, + 0x7100b079, + 0xb0e7b124, + 0x700089d0, + 0x89f09a00, + 0x45f72200, + 0x7000b9e0 +}; + +PATCH_FUN_SPEC void rf_patch_mce_slr(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 254; i++) { + HWREG(RFC_MCERAM_BASE + 4 * i) = patchSlrMce[i]; + } +#else + const uint32_t *pS = patchSlrMce; + volatile unsigned long *pD = &HWREG(RFC_MCERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 31; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); + + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_bt5.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_bt5.h new file mode 100644 index 000000000..ea3f7696c --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_bt5.h @@ -0,0 +1,610 @@ +/****************************************************************************** +* Filename: rf_patch_rfe_bt5.h +* Revised: $Date: 2018-02-07 13:42:20 +0100 (on, 07 feb 2018) $ +* Revision: $Revision: 18248 $ +* +* Description: RF core patch for Bluetooth 5 support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + +#ifndef _RF_PATCH_RFE_BT5_H +#define _RF_PATCH_RFE_BT5_H + +#include +#include "../inc/hw_types.h" + +#ifndef RFE_PATCH_TYPE +#define RFE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_RFERAM_BASE +#define RFC_RFERAM_BASE 0x2100C000 +#endif + +#ifndef RFE_PATCH_MODE +#define RFE_PATCH_MODE 0 +#endif + +RFE_PATCH_TYPE patchBt5Rfe[512] = { + 0x35f8615b, + 0xa24675f9, + 0x1f40a357, + 0x34f11307, + 0x40004030, + 0x40034001, + 0x400f4007, + 0x40cf404f, + 0x43cf41cf, + 0x4fcf47cf, + 0x2fcf3fcf, + 0x0fcf1fcf, + 0x40004030, + 0x40034001, + 0x400f4007, + 0x40cf404f, + 0x6fcf7fcf, + 0x4fcf5fcf, + 0x2fcf3fcf, + 0x0fcf1fcf, + 0x9100c050, + 0xc0707000, + 0x70009100, + 0x00213182, + 0xb1109131, + 0x81017000, + 0xa100b101, + 0x91323182, + 0x9101b110, + 0x81411011, + 0x403b2241, + 0x700006f1, + 0x9150c050, + 0xc0707000, + 0x70009150, + 0x00213182, + 0xb1609181, + 0x10257000, + 0x9100c050, + 0xc080c3f4, + 0x6f031420, + 0x04411031, + 0x22f082a0, + 0x26514058, + 0x3182c022, + 0x91310021, + 0x3963b110, + 0x04411031, + 0x3182c082, + 0x91310021, + 0x3963b110, + 0xc0a21031, + 0x00213182, + 0xb1109131, + 0x31151050, + 0x92551405, + 0x642b7000, + 0x1031c2b2, + 0x31610631, + 0x642e02c1, + 0x1031c112, + 0x06713921, + 0x02e13151, + 0x7000642e, + 0x82b16428, + 0x39813181, + 0x642ec0e2, + 0xc111642b, + 0x642ec122, + 0x688bc470, + 0xc0c2c111, + 0x64a4642e, + 0x700064b7, + 0x82b16440, + 0x39813181, + 0x6446c182, + 0xc1116443, + 0x6446c0a2, + 0x689dc470, + 0xc162c331, + 0x64a46446, + 0x700064b7, + 0xb054b050, + 0x80407100, + 0x44b12240, + 0x40a42200, + 0x8081b060, + 0x44a41e11, + 0xa0547000, + 0x80f0b064, + 0x40a42200, + 0x12407000, + 0xb03290b0, + 0x395382a3, + 0x64713953, + 0x68bfc2f0, + 0xc1f18080, + 0xc1510410, + 0x40cb1c10, + 0xc221642b, + 0x642ec0c2, + 0x644360cf, + 0xc162c441, + 0x80906446, + 0x44d33950, + 0x68d3ce00, + 0x90b01280, + 0x7000b032, + 0xc201642b, + 0x642ec0c2, + 0x318080a0, + 0x68df3940, + 0xc0c2c101, + 0xc101642e, + 0x642ec122, + 0x647182a3, + 0x90b012c0, + 0x7000b032, + 0xc4016443, + 0x6446c162, + 0x318080a0, + 0x68f33940, + 0xc162c301, + 0xc1016446, + 0x6446c0a2, + 0x647182a3, + 0x90b012c0, + 0x7000b032, + 0xc272642b, + 0x642ec081, + 0xc111c122, + 0xc002642e, + 0x642ec111, + 0xc331c062, + 0xc362642e, + 0x642ec111, + 0xc111c302, + 0x82a3642e, + 0x64713953, + 0x6433c3e2, + 0x41162211, + 0xc881c242, + 0xc252642e, + 0x642ec111, + 0xcee1c272, + 0xc202642e, + 0x642ec881, + 0xc801c202, + 0xc170642e, + 0x7000692a, + 0xc242642b, + 0x642ec801, + 0xc011c252, + 0xc272642e, + 0x642ec0e1, + 0xc101c002, + 0xc062642e, + 0x642ec301, + 0xc101c122, + 0xc362642e, + 0x642ec101, + 0xc101c302, + 0x82a3642e, + 0x70006471, + 0x1e118081, + 0xb0504156, + 0x7100b054, + 0x22408040, + 0xa0544157, + 0x80f1b064, + 0x454b2201, + 0x22007000, + 0xb060414b, + 0x73066148, + 0x720b7205, + 0xb050720e, + 0x80817100, + 0xa050b060, + 0xeed08092, + 0x93529341, + 0x224167fa, + 0x8080457f, + 0x0410c1f1, + 0x11011630, + 0x6c011401, + 0x61a061a0, + 0x61a061a0, + 0x61a061a0, + 0x61a761a3, + 0x61b161ad, + 0x62d361a0, + 0xc0f062d6, + 0x31320402, + 0x14122a41, + 0x11011632, + 0x6c011421, + 0x61a161bf, + 0x61a561bf, + 0x61a961af, + 0x61a061a0, + 0x61b362f4, + 0x61a562f4, + 0x61a961b5, + 0x61a061a0, + 0x61a161c5, + 0x61a561c5, + 0x61a961af, + 0x61a061a0, + 0x65d661b8, + 0x648061b8, + 0x648061b8, + 0x64d86548, + 0x649261b8, + 0x64ec6548, + 0x650061b8, + 0x650061b8, + 0x652c65d6, + 0x66fe61b8, + 0x650061b8, + 0x61b166fe, + 0x61bbb0b0, + 0x7306b0b1, + 0xb0307205, + 0x7810615f, + 0x7832c451, + 0xc5247853, + 0x782061ca, + 0x7842c451, + 0xc4c47853, + 0x926091a4, + 0x92829271, + 0xc0159293, + 0xc3f09245, + 0xc0f092b0, + 0x61b890a0, + 0x66cfb0e3, + 0x80f0a054, + 0x45e02250, + 0x22008040, + 0x61d846c3, + 0xc800a0e3, + 0x81a991b0, + 0x8091b050, + 0x469e2241, + 0x12f18262, + 0x102f0412, + 0x142f311f, + 0x22d68266, + 0xc08045f3, + 0xc18061f4, + 0x6f0d1420, + 0x10de396d, + 0x044ec3f4, + 0x3182c082, + 0x396d002e, + 0x3182c0a2, + 0x826a002d, + 0x06fa398a, + 0x31808270, + 0xc00b3980, + 0x10bc180b, + 0x825318ac, + 0x149b1439, + 0x06f08260, + 0x31101001, + 0x81a11410, + 0x140c1410, + 0x39408280, + 0x100206f0, + 0x3001c011, + 0x1801c010, + 0x31821802, + 0x26c10021, + 0xcec091e1, + 0x22c667fa, + 0xb003465a, + 0xb063b013, + 0x8041b053, + 0x46c32201, + 0x92148204, + 0x1cb58225, + 0x18954e39, + 0x80f091b5, + 0x422b2210, + 0x913d629c, + 0x913eb110, + 0x80e0b110, + 0x46432200, + 0x424322e6, + 0x1895b0e0, + 0x925f91b5, + 0x14f981a9, + 0x225080f0, + 0x221041d6, + 0x62d9469c, + 0x81a966cf, + 0x14598255, + 0x7100c0f0, + 0x6a53b063, + 0x422b22c6, + 0x6272a0e0, + 0x39808280, + 0x100206f0, + 0x3001c011, + 0x1801c010, + 0x31821802, + 0x26c10021, + 0x828791d1, + 0x39873947, + 0xb013b003, + 0xb053b063, + 0xb0637100, + 0xb012b002, + 0x22018041, + 0x81f446c3, + 0x82259214, + 0x4e801cb5, + 0x91b51895, + 0x221080f0, + 0x629c4272, + 0x92148204, + 0x18458224, + 0x4e8a1c75, + 0x221080f0, + 0x629c4272, + 0xb110913d, + 0x220080e0, + 0x22e64692, + 0xb0e04292, + 0x925f91b5, + 0x14f981a9, + 0x225080f0, + 0x221041d6, + 0x62d9469c, + 0x67faceb0, + 0x8280b063, + 0x100206f0, + 0x3001c011, + 0x1801c010, + 0x31821802, + 0x26c10021, + 0xb01391e1, + 0xb063b003, + 0xb064b053, + 0x7100b054, + 0x22018041, + 0xb06346c3, + 0x80f0b064, + 0x41d62250, + 0x46b12240, + 0x92118201, + 0x18918221, + 0xb03191b1, + 0xa0e362b1, + 0x8251a0e0, + 0x318281b2, + 0xeea03d82, + 0x93529341, + 0xa00367fa, + 0x82627000, + 0x06f23942, + 0x80a2604b, + 0x61b8644b, + 0x7100b050, + 0x829061b8, + 0x22018041, + 0x820446c3, + 0x82259214, + 0x91b51895, + 0x221180f1, + 0x6ada469c, + 0x22018041, + 0x820446c3, + 0x82259214, + 0x4a4e1cc5, + 0x91b51895, + 0x221080f0, + 0x629c42e6, + 0x91e07860, + 0x9250c2d0, + 0x7870c4c4, + 0xc132c2e1, + 0x61cacb03, + 0xb0e3a0e2, + 0x80f0a054, + 0x47082250, + 0x22008040, + 0x630047ef, + 0xa040a0e3, + 0x8260827d, + 0x0410c0f1, + 0x826a1009, + 0x041a394a, + 0x39808260, + 0x100e0410, + 0x10bc10ab, + 0x644b10c2, + 0x67face90, + 0xb003b013, + 0xb05367a1, + 0xb054b050, + 0xb013b064, + 0x678a6781, + 0x80417100, + 0x47ef2201, + 0x221080f0, + 0x22f04736, + 0xb06447dc, + 0x43262231, + 0x67a7b063, + 0x6326675a, + 0x81bfb064, + 0x3d8f318f, + 0x934fde80, + 0x710067fa, + 0x22018041, + 0xb06447ef, + 0x225080f0, + 0xb063434f, + 0x22c18261, + 0x67a7474a, + 0x22d18261, + 0x675a473d, + 0x81b1633d, + 0x318181c2, + 0x31823d81, + 0xee703d82, + 0x93529341, + 0x62fe67fa, + 0x92108200, + 0x18d38223, + 0x0bf34f67, + 0x1ce31613, + 0x92134b80, + 0x143b8233, + 0x1ce3636c, + 0x92134b80, + 0x183b8233, + 0x4f7c1cab, + 0x4b7e1c9b, + 0x43801cbc, + 0x826010b2, + 0x437922d0, + 0x221080f0, + 0x644b4780, + 0x63806781, + 0x637010ab, + 0x6370109b, + 0x82807000, + 0x0410c0f1, + 0x7100b063, + 0x10bc6b84, + 0x7000b0e0, + 0x92128202, + 0x82518222, + 0x81a11812, + 0x82911812, + 0x3d813181, + 0x4b981c12, + 0xb032b0e2, + 0x1421c7f1, + 0xc8124f9c, + 0x91c291b2, + 0xb0e1b031, + 0x12087000, + 0xc800c006, + 0x91c091b0, + 0x82517000, + 0x92108200, + 0x18108220, + 0x181081a1, + 0x80e11406, + 0x31828292, + 0x1c203d82, + 0xb0e24bbb, + 0x47bf2221, + 0xce60b032, + 0x222167fa, + 0xa0e243bf, + 0x8281b032, + 0xc0f03941, + 0x1e010401, + 0x161843cd, + 0x3010c010, + 0x47db1c08, + 0x3c101060, + 0xc7f11006, + 0x4fd11461, + 0x91b6c816, + 0x318181c1, + 0x1c163d81, + 0x91c64bd8, + 0xc006b031, + 0x70001208, + 0xb063a003, + 0xb0efb064, + 0x7100652c, + 0x22008040, + 0xb06447ef, + 0xa0ef6500, + 0x80407100, + 0x47ef2200, + 0xb003b064, + 0xa0e36326, + 0x81b28251, + 0x3d823182, + 0x9341ee50, + 0x67fa9352, + 0x7000a003, + 0x83209330, + 0x47fb2200, + 0x7000b310 +}; + +PATCH_FUN_SPEC void rf_patch_rfe_bt5(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 512; i++) { + HWREG(RFC_RFERAM_BASE + 4 * i) = patchBt5Rfe[i]; + } +#else + const uint32_t *pS = patchBt5Rfe; + volatile unsigned long *pD = &HWREG(RFC_RFERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 64; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_genfsk.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_genfsk.h new file mode 100644 index 000000000..6cd4247a2 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_genfsk.h @@ -0,0 +1,611 @@ +/****************************************************************************** +* Filename: rf_patch_rfe_genfsk.h +* Revised: $Date: 2018-01-24 16:44:53 +0100 (on, 24 jan 2018) $ +* Revision: $Revision: 18195 $ +* +* Description: RF core patch for Generic FSK support in CC13x2 and CC26x2 +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ + + +#ifndef _RF_PATCH_RFE_GENFSK_H +#define _RF_PATCH_RFE_GENFSK_H + +#include +#include "../inc/hw_types.h" + +#ifndef RFE_PATCH_TYPE +#define RFE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_RFERAM_BASE +#define RFC_RFERAM_BASE 0x2100C000 +#endif + +#ifndef RFE_PATCH_MODE +#define RFE_PATCH_MODE 0 +#endif + +RFE_PATCH_TYPE patchGenfskRfe[512] = { + 0x13076286, + 0x1f2e34f1, + 0x0ab03f13, + 0xff07a000, + 0x4030ffc0, + 0x40014000, + 0x40074003, + 0x404f400f, + 0x41cf40cf, + 0x47cf43cf, + 0x3fcf4fcf, + 0x1fcf2fcf, + 0xc0500fcf, + 0x70009100, + 0x9100c070, + 0x31827000, + 0x91310021, + 0x7000b110, + 0xb1018101, + 0x3182a100, + 0xb1109132, + 0x10119101, + 0x22418141, + 0x06f1402c, + 0xc0507000, + 0x70009150, + 0x9150c070, + 0x31827000, + 0x91810021, + 0x7000b160, + 0xb1518151, + 0x3182a150, + 0xb1609182, + 0x10119151, + 0x22418191, + 0x06f14044, + 0x10257000, + 0x9100c050, + 0xc090c3f4, + 0x6f031420, + 0x04411031, + 0x22f082a0, + 0x26514056, + 0x3182c022, + 0x91310021, + 0x3963b110, + 0x04411031, + 0x3182c082, + 0x91310021, + 0x3963b110, + 0xc0a21031, + 0x00213182, + 0xb1109131, + 0x31151050, + 0x92551405, + 0x641c7000, + 0x1031c2b2, + 0x31610631, + 0x641f02c1, + 0x1031c112, + 0x06713921, + 0x02e13151, + 0x7000641f, + 0x22d082b0, + 0xc0c244a5, + 0x66416627, + 0x6419657d, + 0xb1109136, + 0xb1109134, + 0xc112665f, + 0xc3406424, + 0x40922201, + 0x1410c5f1, + 0x16356892, + 0x65b91634, + 0x65ebb051, + 0x65eb65c1, + 0x65fa65c9, + 0xb061a051, + 0xc6b0722c, + 0x128068a0, + 0xb03290b0, + 0x64197000, + 0x318182b1, + 0xc0e23981, + 0x665f641f, + 0x82b07000, + 0x44ba22d0, + 0xb05165b1, + 0x65a165eb, + 0x65a965fa, + 0xa05165fa, + 0x722cb061, + 0xc201641c, + 0x641fc0c2, + 0x318080a0, + 0x68c13940, + 0xc0c2c101, + 0xc101641f, + 0x641fc122, + 0x22d082b0, + 0x1a3544cf, + 0x91356419, + 0x82a3b110, + 0x12c0646f, + 0xb03290b0, + 0x82b07000, + 0x44f422d0, + 0x6627c162, + 0x657d6655, + 0x91866431, + 0x9184b160, + 0x6670b160, + 0x68e3c5f0, + 0x16741675, + 0xb05165b9, + 0x65c16609, + 0xa0516609, + 0x722cb061, + 0x68efc6b0, + 0x90b01280, + 0x7000b032, + 0x82b16431, + 0x39813181, + 0x6437c182, + 0x70006670, + 0x22d082b0, + 0x65a14507, + 0x6618b051, + 0x661865a9, + 0xb061a051, + 0x6434722c, + 0xc162c401, + 0x80a06437, + 0x39403180, + 0xc301690e, + 0x6437c162, + 0xc0a2c101, + 0x82b06437, + 0x451c22d0, + 0x64311a75, + 0xb1609185, + 0x646f82a3, + 0x90b012c0, + 0x7000b032, + 0xc272641c, + 0x641fc081, + 0xc111c122, + 0xc002641f, + 0x641fc111, + 0xc331c062, + 0xc362641f, + 0x641fc111, + 0xc111c302, + 0x82a3641f, + 0x646f3953, + 0x6424c3e2, + 0x41382211, + 0xc881c242, + 0xc252641f, + 0x641fc111, + 0xcee1c272, + 0xc202641f, + 0x641fc881, + 0xc801c202, + 0xc170641f, + 0x7000694c, + 0xc242641c, + 0x641fc801, + 0xc011c252, + 0xc272641f, + 0x641fc0e1, + 0xc101c002, + 0xc062641f, + 0x641fc301, + 0xc101c122, + 0xc362641f, + 0x641fc101, + 0xc101c302, + 0x82a3641f, + 0x7000646f, + 0x1e118081, + 0xb0504178, + 0x7100b054, + 0x22408040, + 0xa0544179, + 0x80f1b064, + 0x456d2201, + 0x22007000, + 0xb060416d, + 0xc108616a, + 0x39508270, + 0x1e003980, + 0xc1014186, + 0x14183001, + 0xc1091a18, + 0x39608280, + 0x1e003980, + 0xc1014190, + 0x14193001, + 0x827b1a19, + 0x393b313b, + 0x313b398b, + 0x45991e0b, + 0x828ac01b, + 0x392a312a, + 0x1e0a398a, + 0xc01a45a0, + 0x722c7000, + 0xb2c092e9, + 0x10731062, + 0xc3fd10a1, + 0x722c7000, + 0xb2c092e8, + 0x10531042, + 0xc1fd10b1, + 0x722c7000, + 0x10c292e9, + 0xc4011073, + 0xb2c0c03d, + 0x722c7000, + 0x104292e8, + 0x10b11053, + 0xb2c0c1fd, + 0x722c7000, + 0xb2c092e9, + 0x10731062, + 0xc3fd10a1, + 0x722c7000, + 0xb2c092e9, + 0x10c21073, + 0xc03dc401, + 0xb0507000, + 0x7100b054, + 0x22408040, + 0xb06441dc, + 0x220080f0, + 0x61e241d1, + 0x41d12200, + 0x8081b060, + 0x45d11e11, + 0xa054a050, + 0x90b01240, + 0x82a3b032, + 0x39533953, + 0xc0507000, + 0x10d09100, + 0x7100b061, + 0x1c231412, + 0x91334df6, + 0x7000b110, + 0xb1109132, + 0x700069ee, + 0x9100c050, + 0xb06110d0, + 0x18137100, + 0x4a051c32, + 0xb1109132, + 0x91337000, + 0x69fdb110, + 0xc0507000, + 0x10d09150, + 0x7100b061, + 0x1c231412, + 0x91834e14, + 0x7000b160, + 0xb1609182, + 0x70006a0c, + 0x9150c050, + 0xb06110d0, + 0x18137100, + 0x4a231c32, + 0xb1609182, + 0x91837000, + 0x6a1bb160, + 0x10247000, + 0x1c02c0c0, + 0x6424462d, + 0x643c622e, + 0x10421015, + 0xc0c01612, + 0x1c021610, + 0x64244637, + 0x643c6238, + 0x14153141, + 0x31801040, + 0x10541405, + 0x04047870, + 0xc0e67000, + 0x106c3186, + 0x398182b1, + 0x04017880, + 0x10671416, + 0x04077880, + 0xc3f082b1, + 0x14170401, + 0x318082b0, + 0x140c3980, + 0xc1867000, + 0x10673186, + 0x788082b1, + 0x14160401, + 0x141782b1, + 0x641c7000, + 0xc122c111, + 0xc470641f, + 0xc1116a64, + 0x641fc0c2, + 0x646f65d1, + 0x6a6bc2b0, + 0xc0c2c221, + 0x7000641f, + 0xc1116434, + 0x6437c0a2, + 0x6a75c470, + 0xc162c331, + 0x65d16437, + 0xc2b0646f, + 0xc4416a7c, + 0x6437c162, + 0x00007000, + 0x00000000, + 0x00000000, + 0x72057306, + 0x720e720b, + 0x7100b050, + 0xb0608081, + 0x8092a050, + 0x46a62241, + 0xc1f18080, + 0x16300410, + 0x14011101, + 0x62b86c01, + 0x62b862b8, + 0x62b862b8, + 0x62b862b8, + 0x62b862b8, + 0x62b862b8, + 0x62b862b8, + 0x06f18091, + 0x80823121, + 0x14122a42, + 0x11011632, + 0x6c011421, + 0x62b862cd, + 0x62b962cd, + 0x62bd62c1, + 0x62b862b8, + 0x647e62c5, + 0x64ad656a, + 0x64d562c5, + 0x64fc656a, + 0x652262c5, + 0x654e66e5, + 0x121062c5, + 0x720e90b0, + 0x72057306, + 0x90301210, + 0xc460628a, + 0x782091a0, + 0x78309260, + 0x78409270, + 0x78509280, + 0x78609290, + 0x781092b0, + 0xc1f091e0, + 0x826090a0, + 0x06f03940, + 0x31101001, + 0x92501410, + 0xa0bc62c5, + 0xb0e3a0e2, + 0x80f0a054, + 0x46f02250, + 0x22008040, + 0x62e847f6, + 0xa040a0e3, + 0x318d827d, + 0x8260398d, + 0x100906f0, + 0x394a826a, + 0x826006fa, + 0x06f03980, + 0x10ab100e, + 0x10c210bc, + 0x722e6449, + 0x67f9ce40, + 0xb003b013, + 0xb053679a, + 0xb054b050, + 0xb013b064, + 0x8260677c, + 0x471322e0, + 0x71006783, + 0x22018041, + 0x80f047f6, + 0x47262210, + 0x47e322f0, + 0x2231b064, + 0xb0634313, + 0x826067a0, + 0x471322e0, + 0x63136747, + 0x81bfb064, + 0x3d8f318f, + 0x934fde30, + 0x710067f9, + 0x22018041, + 0xb06447f6, + 0x225080f0, + 0xb0634340, + 0x22c18261, + 0x67a0473b, + 0x826167d4, + 0x472d22d1, + 0x632d6747, + 0x318181b1, + 0xde203d81, + 0x67f99341, + 0x820062e5, + 0x82239210, + 0xa2e082e7, + 0x4f5618d3, + 0x16130bf3, + 0x4b7b1ce3, + 0x82339213, + 0x6367143b, + 0x47621cba, + 0x4b621e23, + 0x4f621ce3, + 0x2207b2e0, + 0xa2e04362, + 0x636d1a1b, + 0x4b7b1ce3, + 0x82339213, + 0x1cab183b, + 0x1c9b4f77, + 0x1cbc4b79, + 0x10b2437b, + 0x22d08260, + 0x80f04374, + 0x477b2210, + 0x677c6449, + 0x10ab637b, + 0x109b636b, + 0x7000636b, + 0x06f08280, + 0x7100b063, + 0x10bc6b7e, + 0x82027000, + 0x82229212, + 0x18128251, + 0x181281a1, + 0x31818291, + 0x1c123d81, + 0xb0e24b91, + 0xc7f1b032, + 0x4f951421, + 0x91b2c812, + 0xb03191c2, + 0x7000b0e1, + 0xc0061208, + 0x91b0c800, + 0x700091c0, + 0x82008251, + 0x82209210, + 0x81a11810, + 0x14061810, + 0x829280e1, + 0x3d823182, + 0x4bb41c20, + 0x2221b0e2, + 0xb03247b8, + 0x67f9ce10, + 0x43b82221, + 0xb032a0e2, + 0x39418281, + 0x1e0106f1, + 0x161843c5, + 0x3010c010, + 0x47d31c08, + 0x3c101060, + 0xc7f11006, + 0x4fc91461, + 0x91b6c816, + 0x318181c1, + 0x1c163d81, + 0x91c64bd0, + 0xc006b031, + 0x70001208, + 0x318181b1, + 0x82903d81, + 0x18013980, + 0x4be21cf1, + 0x80b01401, + 0x47e222c0, + 0xb033b0bc, + 0xa0037000, + 0xb064b063, + 0x654eb0ef, + 0x80407100, + 0x47f62200, + 0x6522b064, + 0x7100a0ef, + 0x22008040, + 0xb06447f6, + 0x6313b003, + 0xa003a0e3, + 0x93307000, + 0x22008320, + 0xb31047fa, + 0x00007000 +}; + +PATCH_FUN_SPEC void rf_patch_rfe_genfsk(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 512; i++) { + HWREG(RFC_RFERAM_BASE + 4 * i) = patchGenfskRfe[i]; + } +#else + const uint32_t *pS = patchGenfskRfe; + volatile unsigned long *pD = &HWREG(RFC_RFERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 64; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); +#endif +} + +#endif diff --git a/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_ieee_802_15_4.h b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_ieee_802_15_4.h new file mode 100644 index 000000000..268878e39 --- /dev/null +++ b/third_party/ti/devices/cc13x2_cc26x2/rf_patches/rf_patch_rfe_ieee_802_15_4.h @@ -0,0 +1,438 @@ +/****************************************************************************** +* Filename: rf_patch_rfe_ieee_802_15_4.h +* Revised: $Date: 2018-05-07 15:02:01 +0200 (ma, 07 mai 2018) $ +* Revision: $Revision: 18438 $ +* +* Description: RF core patch for IEEE 802.15.4-2006 support in CC13x2 and CC26x2. Contains fix to correct RSSIMAXVAL calculation. +* +* Copyright (c) 2015-2017, Texas Instruments Incorporated +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1) Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2) Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3) Neither the name of the ORGANIZATION nor the names of its contributors may +* be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +* +******************************************************************************/ +// It should only be included from ONE source file to avoid duplicated constant arrays + + +#ifndef _RF_PATCH_RFE_IEEE_802_15_4_H +#define _RF_PATCH_RFE_IEEE_802_15_4_H + +#include +#include "../inc/hw_types.h" + +#ifndef RFE_PATCH_TYPE +#define RFE_PATCH_TYPE static const uint32_t +#endif + +#ifndef PATCH_FUN_SPEC +#define PATCH_FUN_SPEC static inline +#endif + +#ifndef RFC_RFERAM_BASE +#define RFC_RFERAM_BASE 0x2100C000 +#endif + +#ifndef RFE_PATCH_MODE +#define RFE_PATCH_MODE 0 +#endif + +RFE_PATCH_TYPE patchIeee_802_15_4Rfe[331] = { + 0x163f614a, + 0x07ff07f7, + 0x000f0046, + 0x00040000, + 0x003f002e, + 0x40004030, + 0x40034001, + 0x400f4007, + 0x40cf404f, + 0x43cf41cf, + 0x4fcf47cf, + 0x2fcf3fcf, + 0x0fcf1fcf, + 0x9100c050, + 0xc0707000, + 0x70009100, + 0x00213182, + 0xb1109131, + 0x81017000, + 0xa100b101, + 0x91323182, + 0x9101b110, + 0x81411011, + 0x402d2241, + 0x700006f1, + 0x9150c050, + 0xc0707000, + 0x70009150, + 0x00213182, + 0xb1609181, + 0x10257000, + 0x9100c050, + 0xc0a0c3f4, + 0x6f031420, + 0x04411031, + 0x22f082a0, + 0x2651404a, + 0x3182c022, + 0x91310021, + 0x3963b110, + 0x04411031, + 0x3182c082, + 0x91310021, + 0x3963b110, + 0xc0a21031, + 0x00213182, + 0xb1109131, + 0x31151050, + 0x92551405, + 0x641d7000, + 0x1031c2b2, + 0x31610631, + 0x642002c1, + 0x1031c112, + 0x06713921, + 0x02e13151, + 0x70006420, + 0x82b1641a, + 0x39813181, + 0x6420c0e2, + 0xc111641d, + 0x6420c122, + 0x687dc470, + 0xc0c2c111, + 0x64966420, + 0x700064a9, + 0x82b16432, + 0x39813181, + 0x6438c182, + 0xc1116435, + 0x6438c0a2, + 0x688fc470, + 0xc162c331, + 0x64966438, + 0x700064a9, + 0xb054b050, + 0x80407100, + 0x44a32240, + 0x40962200, + 0x8081b060, + 0x44961e11, + 0xa0547000, + 0x80f0b064, + 0x40962200, + 0x12407000, + 0xb03290b0, + 0x395382a3, + 0x64633953, + 0x68b1c2f0, + 0xc1f18080, + 0xc1510410, + 0x40bd1c10, + 0xc221641d, + 0x6420c0c2, + 0x643560c1, + 0xc162c441, + 0xce306438, + 0x128068c2, + 0xb03290b0, + 0x641d7000, + 0xc0c2c201, + 0x80a06420, + 0x39403180, + 0xc10168ce, + 0x6420c0c2, + 0xc122c101, + 0x82a36420, + 0x12c06463, + 0xb03290b0, + 0x64357000, + 0xc162c401, + 0x80a06438, + 0x39403180, + 0xc30168e2, + 0x6438c162, + 0xc0a2c101, + 0x82a36438, + 0x12c06463, + 0xb03290b0, + 0x641d7000, + 0xc081c272, + 0xc1226420, + 0x6420c111, + 0xc111c002, + 0xc0626420, + 0x6420c331, + 0xc111c362, + 0xc3026420, + 0x6420c111, + 0x395382a3, + 0xc3e26463, + 0x22116425, + 0xc2424105, + 0x6420c881, + 0xc111c252, + 0xc2726420, + 0x6420cee1, + 0xc881c202, + 0xc2026420, + 0x6420c801, + 0x6919c170, + 0x641d7000, + 0xc801c242, + 0xc2526420, + 0x6420c011, + 0xc0e1c272, + 0xc0026420, + 0x6420c101, + 0xc301c062, + 0xc1226420, + 0x6420c101, + 0xc101c362, + 0xc3026420, + 0x6420c101, + 0x646382a3, + 0x80817000, + 0x41451e11, + 0xb054b050, + 0x80407100, + 0x41462240, + 0xb064a054, + 0x220180f1, + 0x7000453a, + 0x413a2200, + 0x6137b060, + 0x72057306, + 0x720e720b, + 0x7100b050, + 0xb0608081, + 0x8092a050, + 0x9341ef80, + 0x668f9352, + 0x456e2241, + 0xc1f18080, + 0x16300410, + 0x14011101, + 0x617f6c01, + 0x617f617f, + 0x617f617f, + 0x6180617f, + 0x61846182, + 0x617f6186, + 0x6272626f, + 0x0402c0f0, + 0x2a413132, + 0x16321412, + 0x14211101, + 0x61a46c01, + 0x61a46188, + 0x618e618a, + 0x617f6192, + 0x6196617f, + 0x61966472, + 0x619664c7, + 0x619664ef, + 0x6196651b, + 0x619665ba, + 0x65376472, + 0x619664c7, + 0x65ba64ef, + 0x6196651b, + 0x65376484, + 0x619664db, + 0xdf708082, + 0x668f9342, + 0x90b01210, + 0x1220619f, + 0x730690b0, + 0x12107205, + 0x614e9030, + 0x91a07840, + 0x31107850, + 0x14107851, + 0x78709250, + 0x78513140, + 0x31400010, + 0x00107861, + 0x78809260, + 0x78909270, + 0xc0f092b0, + 0x619690a0, + 0xa054b0e3, + 0x225080f0, + 0x804045c3, + 0x46642200, + 0xa0e361ba, + 0x668fcf60, + 0x10e9826e, + 0x394e06f9, + 0x06fa10ea, + 0x394e10ac, + 0x10c206fe, + 0x827d643d, + 0x80f310cb, + 0x41d82213, + 0x61db6675, + 0x41db2223, + 0x78104682, + 0x662f91e0, + 0xb053b013, + 0xb050b063, + 0xb064b054, + 0x80f3b003, + 0x41ba2253, + 0x80417100, + 0x46642201, + 0x41f82241, + 0x80f3b064, + 0x41f42213, + 0x61e56675, + 0x41e52223, + 0x61e56682, + 0x8200b063, + 0x822f9210, + 0x318080e0, + 0x318f3980, + 0x90e000f0, + 0x80f3822f, + 0x46622203, + 0x22408090, + 0x10f34662, + 0x4e1418d3, + 0x16130bf3, + 0x4a621ce3, + 0x82339213, + 0x6219143b, + 0x4a621ce3, + 0x82339213, + 0x1cab183b, + 0x1c9b4e2b, + 0x1cbc4a2d, + 0x1cbc4262, + 0xa0e0b0e0, + 0x10b210bc, + 0x663f643d, + 0xb063663f, + 0xb0637100, + 0x10ab61e5, + 0x109b621d, + 0x7827621d, + 0x18707830, + 0xc0011a10, + 0x16176e71, + 0x78276a34, + 0xc0061208, + 0x91b0c800, + 0x10007000, + 0x10f01000, + 0x18108251, + 0x6d716d71, + 0x14061816, + 0x16176e70, + 0x1c177831, + 0x7827464c, + 0x1e881618, + 0x1060465f, + 0x81a13d30, + 0x80f11810, + 0x425f2251, + 0x81c191b0, + 0x3d813181, + 0x4a5d1c10, + 0xb03191c0, + 0x70001278, + 0x10001000, + 0x61e5663f, + 0x8251a0e3, + 0x318281b2, + 0xef503d82, + 0x93529341, + 0xa003668f, + 0x80a27000, + 0x6196643d, + 0x7100b050, + 0xc0506196, + 0xc0029100, + 0x3182c551, + 0x91310021, + 0xb0e1b110, + 0xcf40a0e2, + 0x7000668f, + 0x9100c050, + 0xca91c002, + 0x00213182, + 0xb1109131, + 0xb0e2a0e1, + 0x668fcf30, + 0x93307000, + 0x22008320, + 0xb3104690, + 0x00007000 +}; + +PATCH_FUN_SPEC void rf_patch_rfe_ieee_802_15_4(void) +{ +#ifdef __PATCH_NO_UNROLLING + uint32_t i; + for (i = 0; i < 331; i++) { + HWREG(RFC_RFERAM_BASE + 4 * i) = patchIeee_802_15_4Rfe[i]; + } +#else + const uint32_t *pS = patchIeee_802_15_4Rfe; + volatile unsigned long *pD = &HWREG(RFC_RFERAM_BASE); + uint32_t t1, t2, t3, t4, t5, t6, t7, t8; + uint32_t nIterations = 41; + + do { + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + t4 = *pS++; + t5 = *pS++; + t6 = *pS++; + t7 = *pS++; + t8 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; + *pD++ = t4; + *pD++ = t5; + *pD++ = t6; + *pD++ = t7; + *pD++ = t8; + } while (--nIterations); + + t1 = *pS++; + t2 = *pS++; + t3 = *pS++; + *pD++ = t1; + *pD++ = t2; + *pD++ = t3; +#endif +} + +#endif diff --git a/third_party/ti/devices/cc26x2/rom/driverlib.c b/third_party/ti/devices/cc13x2_cc26x2/rom/driverlib.c similarity index 99% rename from third_party/ti/devices/cc26x2/rom/driverlib.c rename to third_party/ti/devices/cc13x2_cc26x2/rom/driverlib.c index cca16fa76..fb87586f9 100644 --- a/third_party/ti/devices/cc26x2/rom/driverlib.c +++ b/third_party/ti/devices/cc13x2_cc26x2/rom/driverlib.c @@ -1600,7 +1600,7 @@ TrimForWrite(void) FLASH_FSM_ERA_PW_FSM_ERA_PW_M); - // Configure no of flash clock cycles from EXECUTEZ going low to the the + // Configure no of flash clock cycles from EXECUTEZ going low to the // verify data can be read in the program verify mode bits 7:0. // (FCFG1 offset 0x174 bits 23:16). ui32Value = diff --git a/third_party/ti/devices/cc26x2/rom/driverlib.elf b/third_party/ti/devices/cc13x2_cc26x2/rom/driverlib.elf similarity index 100% rename from third_party/ti/devices/cc26x2/rom/driverlib.elf rename to third_party/ti/devices/cc13x2_cc26x2/rom/driverlib.elf diff --git a/third_party/ti/devices/cc26x2/rom/readme.txt b/third_party/ti/devices/cc13x2_cc26x2/rom/readme.txt similarity index 100% rename from third_party/ti/devices/cc26x2/rom/readme.txt rename to third_party/ti/devices/cc13x2_cc26x2/rom/readme.txt diff --git a/third_party/ti/devices/cc26x2/startup_files/ccfg.c b/third_party/ti/devices/cc13x2_cc26x2/startup_files/ccfg.c similarity index 61% rename from third_party/ti/devices/cc26x2/startup_files/ccfg.c rename to third_party/ti/devices/cc13x2_cc26x2/startup_files/ccfg.c index 246c2db19..cee4b931e 100644 --- a/third_party/ti/devices/cc26x2/startup_files/ccfg.c +++ b/third_party/ti/devices/cc13x2_cc26x2/startup_files/ccfg.c @@ -1,9 +1,10 @@ /****************************************************************************** * Filename: ccfg.c -* Revised: $Date: 2017-03-28 11:37:35 +0200 (ti, 28 mar 2017) $ -* Revision: $Revision: 17728 $ +* Revised: $Date: 2017-11-02 11:36:28 +0100 (to, 02 nov 2017) $ +* Revision: $Revision: 18030 $ * -* Description: Customer Configuration for CC26xx device family (HW rev 2). +* Description: Customer Configuration for: +* CC13x2, CC13x4, CC26x2, CC26x4 device family (HW rev 1). * * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ * @@ -56,12 +57,13 @@ // DriverLib documentation (doc_overview.html -> CPU Domain Memory Map -> CCFG). // // PLEASE NOTE: -// It is not recommended to do modifications inside this file. +// It is not recommended to do modifications inside the ccfg.c file. // This file is part of the CoreSDK release and future releases may have // important modifications and new fields added without notice. -// The recommended method to do customer modifications to the CCFG settings -// is to have your own .c file that defines specific -// CCFG values to override and then includes the ccfg.c file. +// The recommended method to modify the CCFG settings is to have a separate +// .c file that defines the specific CCFG values to be +// overridden and then include the TI provided ccfg.c at the very end, +// giving default values for non-overriden settings. // // Example: // #define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader @@ -71,6 +73,22 @@ // //***************************************************************************** +//***************************************************************************** +// +// Internal settings, forcing several bit-fields to be set to a specific value. +// +//***************************************************************************** + +//##################################### +// Force VDDR high setting (Higher output power but also higher power consumption) +// This is also called "boost mode" +//##################################### + +#ifndef CCFG_FORCE_VDDR_HH +#define CCFG_FORCE_VDDR_HH 0x0 // Use default VDDR trim +// #define CCFG_FORCE_VDDR_HH 0x1 // Force VDDR voltage to the factory HH setting (FCFG1..VDDR_TRIM_HH) +#endif + //***************************************************************************** // // Set the values of the individual bit fields. @@ -86,17 +104,21 @@ // #define SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING 0x1 // Alternative DC/DC setting disabled #endif +#if ( CCFG_FORCE_VDDR_HH ) +#define SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN 0xC // Special VMIN level (2.5V) when forced VDDR HH voltage +#else #ifndef SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN -#define SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN 0x8 // 2.25V +#define SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN 0x8 // 2.25V +#endif #endif #ifndef SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN -#define SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN 0x0 // Disable -// #define SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN 0x1 // Enable +#define SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN 0x0 // Dithering disabled +// #define SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN 0x1 // Dithering enabled #endif #ifndef SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK -#define SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK 0x2 // 39mA +#define SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK 0x4 // Peak current #endif //##################################### @@ -138,10 +160,14 @@ // #define SET_CCFG_MODE_CONF_DCDC_ACTIVE 0x1 // Do not use the DC/DC during active mode #endif +#if ( CCFG_FORCE_VDDR_HH ) +#define SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x1 // Special setting to enable forced VDDR HH voltage +#else #ifndef SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL // #define SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x0 // VDDS BOD level is 2.0V #define SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x1 // VDDS BOD level is 1.8V (or 1.65V for external regulator mode) #endif +#endif #ifndef SET_CCFG_MODE_CONF_VDDR_CAP #define SET_CCFG_MODE_CONF_VDDR_CAP 0x3A // Unsigned 8-bit integer representing the min. decoupling capacitance on VDDR in units of 100nF @@ -339,7 +365,12 @@ #define SET_CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG 0x0058 #define SET_CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS (CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_M >> CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_S) +#if ( CCFG_FORCE_VDDR_HH ) +#define SET_CCFG_MODE_CONF_VDDR_EXT_LOAD 0x0 // Special setting to enable forced VDDR HH voltage +#else #define SET_CCFG_MODE_CONF_VDDR_EXT_LOAD 0x1 +#endif + #define SET_CCFG_MODE_CONF_RTC_COMP 0x1 #define SET_CCFG_MODE_CONF_HF_COMP 0x1 @@ -368,61 +399,61 @@ // //***************************************************************************** #define DEFAULT_CCFG_EXT_LF_CLK ( \ - ( ((uint32_t)( SET_CCFG_EXT_LF_CLK_DIO << CCFG_EXT_LF_CLK_DIO_S )) | ~CCFG_EXT_LF_CLK_DIO_M ) & \ - ( ((uint32_t)( SET_CCFG_EXT_LF_CLK_RTC_INCREMENT << CCFG_EXT_LF_CLK_RTC_INCREMENT_S )) | ~CCFG_EXT_LF_CLK_RTC_INCREMENT_M ) ) - + ((((uint32_t)( SET_CCFG_EXT_LF_CLK_DIO )) << CCFG_EXT_LF_CLK_DIO_S ) | ~CCFG_EXT_LF_CLK_DIO_M ) & \ + ((((uint32_t)( SET_CCFG_EXT_LF_CLK_RTC_INCREMENT )) << CCFG_EXT_LF_CLK_RTC_INCREMENT_S ) | ~CCFG_EXT_LF_CLK_RTC_INCREMENT_M ) ) + #define DEFAULT_CCFG_MODE_CONF_1 ( \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN << CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S )) | ~CCFG_MODE_CONF_1_ALT_DCDC_VMIN_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN << CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_S )) | ~CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK << CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S )) | ~CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_INIT << CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_S )) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET << CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_S )) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_XOSC_MAX_START << CCFG_MODE_CONF_1_XOSC_MAX_START_S )) | ~CCFG_MODE_CONF_1_XOSC_MAX_START_M ) ) + ((((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN )) << CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S ) | ~CCFG_MODE_CONF_1_ALT_DCDC_VMIN_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN )) << CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_S ) | ~CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK )) << CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S ) | ~CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_INIT )) << CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_S ) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET )) << CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_S ) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_XOSC_MAX_START )) << CCFG_MODE_CONF_1_XOSC_MAX_START_S ) | ~CCFG_MODE_CONF_1_XOSC_MAX_START_M ) ) #define DEFAULT_CCFG_SIZE_AND_DIS_FLAGS ( \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG << CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS << CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO << CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM << CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING << CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR << CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_M ) ) + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG )) << CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS )) << CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_M ) ) #define DEFAULT_CCFG_MODE_CONF ( \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S )) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_DCDC_RECHARGE << CCFG_MODE_CONF_DCDC_RECHARGE_S )) | ~CCFG_MODE_CONF_DCDC_RECHARGE_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_DCDC_ACTIVE << CCFG_MODE_CONF_DCDC_ACTIVE_S )) | ~CCFG_MODE_CONF_DCDC_ACTIVE_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_EXT_LOAD << CCFG_MODE_CONF_VDDR_EXT_LOAD_S )) | ~CCFG_MODE_CONF_VDDR_EXT_LOAD_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL << CCFG_MODE_CONF_VDDS_BOD_LEVEL_S )) | ~CCFG_MODE_CONF_VDDS_BOD_LEVEL_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_SCLK_LF_OPTION << CCFG_MODE_CONF_SCLK_LF_OPTION_S )) | ~CCFG_MODE_CONF_SCLK_LF_OPTION_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_S )) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_RTC_COMP << CCFG_MODE_CONF_RTC_COMP_S )) | ~CCFG_MODE_CONF_RTC_COMP_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_XOSC_FREQ << CCFG_MODE_CONF_XOSC_FREQ_S )) | ~CCFG_MODE_CONF_XOSC_FREQ_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAP_MOD << CCFG_MODE_CONF_XOSC_CAP_MOD_S )) | ~CCFG_MODE_CONF_XOSC_CAP_MOD_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_HF_COMP << CCFG_MODE_CONF_HF_COMP_S )) | ~CCFG_MODE_CONF_HF_COMP_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S )) | ~CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_CAP << CCFG_MODE_CONF_VDDR_CAP_S )) | ~CCFG_MODE_CONF_VDDR_CAP_M ) ) + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA )) << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S ) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_DCDC_RECHARGE )) << CCFG_MODE_CONF_DCDC_RECHARGE_S ) | ~CCFG_MODE_CONF_DCDC_RECHARGE_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_DCDC_ACTIVE )) << CCFG_MODE_CONF_DCDC_ACTIVE_S ) | ~CCFG_MODE_CONF_DCDC_ACTIVE_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_EXT_LOAD )) << CCFG_MODE_CONF_VDDR_EXT_LOAD_S ) | ~CCFG_MODE_CONF_VDDR_EXT_LOAD_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL )) << CCFG_MODE_CONF_VDDS_BOD_LEVEL_S ) | ~CCFG_MODE_CONF_VDDS_BOD_LEVEL_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_SCLK_LF_OPTION )) << CCFG_MODE_CONF_SCLK_LF_OPTION_S ) | ~CCFG_MODE_CONF_SCLK_LF_OPTION_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC )) << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_S ) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_RTC_COMP )) << CCFG_MODE_CONF_RTC_COMP_S ) | ~CCFG_MODE_CONF_RTC_COMP_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_XOSC_FREQ )) << CCFG_MODE_CONF_XOSC_FREQ_S ) | ~CCFG_MODE_CONF_XOSC_FREQ_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAP_MOD )) << CCFG_MODE_CONF_XOSC_CAP_MOD_S ) | ~CCFG_MODE_CONF_XOSC_CAP_MOD_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_HF_COMP )) << CCFG_MODE_CONF_HF_COMP_S ) | ~CCFG_MODE_CONF_HF_COMP_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA )) << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S ) | ~CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_CAP )) << CCFG_MODE_CONF_VDDR_CAP_S ) | ~CCFG_MODE_CONF_VDDR_CAP_M ) ) #define DEFAULT_CCFG_VOLT_LOAD_0 ( \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP45 << CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP25 << CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP5 << CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TM15 << CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_M ) ) + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP45 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP25 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP5 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TM15 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_M ) ) #define DEFAULT_CCFG_VOLT_LOAD_1 ( \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP125 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP105 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP85 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP65 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_M ) ) + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP125 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP105 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP85 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP65 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_M ) ) #define DEFAULT_CCFG_RTC_OFFSET ( \ - ( ((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P0 << CCFG_RTC_OFFSET_RTC_COMP_P0_S )) | ~CCFG_RTC_OFFSET_RTC_COMP_P0_M ) & \ - ( ((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P1 << CCFG_RTC_OFFSET_RTC_COMP_P1_S )) | ~CCFG_RTC_OFFSET_RTC_COMP_P1_M ) & \ - ( ((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P2 << CCFG_RTC_OFFSET_RTC_COMP_P2_S )) | ~CCFG_RTC_OFFSET_RTC_COMP_P2_M ) ) + ((((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P0 )) << CCFG_RTC_OFFSET_RTC_COMP_P0_S ) | ~CCFG_RTC_OFFSET_RTC_COMP_P0_M ) & \ + ((((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P1 )) << CCFG_RTC_OFFSET_RTC_COMP_P1_S ) | ~CCFG_RTC_OFFSET_RTC_COMP_P1_M ) & \ + ((((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P2 )) << CCFG_RTC_OFFSET_RTC_COMP_P2_S ) | ~CCFG_RTC_OFFSET_RTC_COMP_P2_M ) ) #define DEFAULT_CCFG_FREQ_OFFSET ( \ - ( ((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P0 << CCFG_FREQ_OFFSET_HF_COMP_P0_S )) | ~CCFG_FREQ_OFFSET_HF_COMP_P0_M ) & \ - ( ((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P1 << CCFG_FREQ_OFFSET_HF_COMP_P1_S )) | ~CCFG_FREQ_OFFSET_HF_COMP_P1_M ) & \ - ( ((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P2 << CCFG_FREQ_OFFSET_HF_COMP_P2_S )) | ~CCFG_FREQ_OFFSET_HF_COMP_P2_M ) ) + ((((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P0 )) << CCFG_FREQ_OFFSET_HF_COMP_P0_S ) | ~CCFG_FREQ_OFFSET_HF_COMP_P0_M ) & \ + ((((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P1 )) << CCFG_FREQ_OFFSET_HF_COMP_P1_S ) | ~CCFG_FREQ_OFFSET_HF_COMP_P1_M ) & \ + ((((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P2 )) << CCFG_FREQ_OFFSET_HF_COMP_P2_S ) | ~CCFG_FREQ_OFFSET_HF_COMP_P2_M ) ) #define DEFAULT_CCFG_IEEE_MAC_0 SET_CCFG_IEEE_MAC_0 #define DEFAULT_CCFG_IEEE_MAC_1 SET_CCFG_IEEE_MAC_1 @@ -430,30 +461,29 @@ #define DEFAULT_CCFG_IEEE_BLE_1 SET_CCFG_IEEE_BLE_1 #define DEFAULT_CCFG_BL_CONFIG ( \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE << CCFG_BL_CONFIG_BOOTLOADER_ENABLE_S )) | ~CCFG_BL_CONFIG_BOOTLOADER_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BL_LEVEL << CCFG_BL_CONFIG_BL_LEVEL_S )) | ~CCFG_BL_CONFIG_BL_LEVEL_M ) & \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BL_PIN_NUMBER << CCFG_BL_CONFIG_BL_PIN_NUMBER_S )) | ~CCFG_BL_CONFIG_BL_PIN_NUMBER_M ) & \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BL_ENABLE << CCFG_BL_CONFIG_BL_ENABLE_S )) | ~CCFG_BL_CONFIG_BL_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE )) << CCFG_BL_CONFIG_BOOTLOADER_ENABLE_S ) | ~CCFG_BL_CONFIG_BOOTLOADER_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_BL_CONFIG_BL_LEVEL )) << CCFG_BL_CONFIG_BL_LEVEL_S ) | ~CCFG_BL_CONFIG_BL_LEVEL_M ) & \ + ((((uint32_t)( SET_CCFG_BL_CONFIG_BL_PIN_NUMBER )) << CCFG_BL_CONFIG_BL_PIN_NUMBER_S ) | ~CCFG_BL_CONFIG_BL_PIN_NUMBER_M ) & \ + ((((uint32_t)( SET_CCFG_BL_CONFIG_BL_ENABLE )) << CCFG_BL_CONFIG_BL_ENABLE_S ) | ~CCFG_BL_CONFIG_BL_ENABLE_M ) ) #define DEFAULT_CCFG_ERASE_CONF ( \ - ( ((uint32_t)( SET_CCFG_ERASE_CONF_CHIP_ERASE_DIS_N << CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_S )) | ~CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_M ) & \ - ( ((uint32_t)( SET_CCFG_ERASE_CONF_BANK_ERASE_DIS_N << CCFG_ERASE_CONF_BANK_ERASE_DIS_N_S )) | ~CCFG_ERASE_CONF_BANK_ERASE_DIS_N_M ) ) + ((((uint32_t)( SET_CCFG_ERASE_CONF_CHIP_ERASE_DIS_N )) << CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_S ) | ~CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_M ) & \ + ((((uint32_t)( SET_CCFG_ERASE_CONF_BANK_ERASE_DIS_N )) << CCFG_ERASE_CONF_BANK_ERASE_DIS_N_S ) | ~CCFG_ERASE_CONF_BANK_ERASE_DIS_N_M ) ) #define DEFAULT_CCFG_CCFG_TI_OPTIONS ( \ - ( ((uint32_t)( SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE << CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_S )) | ~CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE )) << CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_S ) | ~CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_M ) ) #define DEFAULT_CCFG_CCFG_TAP_DAP_0 ( \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE << CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE << CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE << CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE )) << CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_M ) ) #define DEFAULT_CCFG_CCFG_TAP_DAP_1 ( \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE << CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE << CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_AON_TAP_ENABLE << CCFG_CCFG_TAP_DAP_1_AON_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_1_AON_TAP_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_AON_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_1_AON_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_1_AON_TAP_ENABLE_M ) ) -#define DEFAULT_CCFG_IMAGE_VALID_CONF ( \ - ( ((uint32_t)( SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID << CCFG_IMAGE_VALID_CONF_IMAGE_VALID_S )) | ~CCFG_IMAGE_VALID_CONF_IMAGE_VALID_M ) ) +#define DEFAULT_CCFG_IMAGE_VALID_CONF SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID #define DEFAULT_CCFG_CCFG_PROT_31_0 SET_CCFG_CCFG_PROT_31_0 #define DEFAULT_CCFG_CCFG_PROT_63_32 SET_CCFG_CCFG_PROT_63_32 diff --git a/third_party/ti/devices/cc26x2/startup_files/startup_ccs.c b/third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_ccs.c similarity index 100% rename from third_party/ti/devices/cc26x2/startup_files/startup_ccs.c rename to third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_ccs.c diff --git a/third_party/ti/devices/cc26x2/startup_files/startup_gcc.c b/third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_gcc.c similarity index 96% rename from third_party/ti/devices/cc26x2/startup_files/startup_gcc.c rename to third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_gcc.c index acffecdc9..3d02145fe 100644 --- a/third_party/ti/devices/cc26x2/startup_files/startup_gcc.c +++ b/third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_gcc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: startup_gcc.c -* Revised: $Date: 2017-05-03 09:38:30 +0200 (on, 03 mai 2017) $ -* Revision: $Revision: 17770 $ +* Revised: $Date: 2017-06-01 16:01:48 +0200 (to, 01 jun 2017) $ +* Revision: $Revision: 17804 $ * * Description: Startup code for CC26x2 device family for use with GCC. * @@ -246,6 +246,16 @@ ResetISR(void) " strlt r2, [r0], #4\n" " blt zero_loop"); + // + // Enable the FPU + // CPACR is located at address 0xE000ED88 + // Set bits 20-23 in CPACR to enable CP10 and CP11 coprocessors + // + __asm(" ldr.w r0, =0xE000ED88\n" + " ldr r1, [r0]\n" + " orr r1, r1, #(0xF << 20)\n" + " str r1, [r0]\n"); + // // Call the application's entry point. // diff --git a/third_party/ti/devices/cc26x2/startup_files/startup_iar.c b/third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_iar.c similarity index 100% rename from third_party/ti/devices/cc26x2/startup_files/startup_iar.c rename to third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_iar.c diff --git a/third_party/ti/devices/cc26x2/startup_files/startup_keil.s b/third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_keil.s similarity index 100% rename from third_party/ti/devices/cc26x2/startup_files/startup_keil.s rename to third_party/ti/devices/cc13x2_cc26x2/startup_files/startup_keil.s diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_event.c b/third_party/ti/devices/cc26x0/driverlib/aon_event.c index 40b493f46..4fcad6978 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_event.c +++ b/third_party/ti/devices/cc26x0/driverlib/aon_event.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_event.c -* Revised: 2017-04-26 16:53:03 +0200 (Wed, 26 Apr 2017) -* Revision: 48850 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AON Event fabric. * diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_event.h b/third_party/ti/devices/cc26x0/driverlib/aon_event.h index b7ec1788b..dd6865268 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_event.h +++ b/third_party/ti/devices/cc26x0/driverlib/aon_event.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_event.h -* Revised: 2017-04-26 16:53:03 +0200 (Wed, 26 Apr 2017) -* Revision: 48850 +* Revised: 2017-06-21 11:05:14 +0200 (Wed, 21 Jun 2017) +* Revision: 49178 * * Description: Defines and prototypes for the AON Event fabric. * diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_event_doc.h b/third_party/ti/devices/cc26x0/driverlib/aon_event_doc.h index dfc26e6f5..c02a5f109 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_event_doc.h +++ b/third_party/ti/devices/cc26x0/driverlib/aon_event_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_event_doc.h -* Revised: 2016-07-07 19:12:02 +0200 (Thu, 07 Jul 2016) -* Revision: 46848 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_rtc.c b/third_party/ti/devices/cc26x0/driverlib/aon_rtc.c index 21f59a957..625f0bb6d 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_rtc.c +++ b/third_party/ti/devices/cc26x0/driverlib/aon_rtc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_rtc.c -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AON RTC. * diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_rtc.h b/third_party/ti/devices/cc26x0/driverlib/aon_rtc.h index dc51bea8a..9efaccd64 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_rtc.h +++ b/third_party/ti/devices/cc26x0/driverlib/aon_rtc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_rtc.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the AON RTC * diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_wuc.c b/third_party/ti/devices/cc26x0/driverlib/aon_wuc.c index f0deb09cd..4f3d54724 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_wuc.c +++ b/third_party/ti/devices/cc26x0/driverlib/aon_wuc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_wuc.c -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AON Wake-Up Controller. * diff --git a/third_party/ti/devices/cc26x0/driverlib/aon_wuc.h b/third_party/ti/devices/cc26x0/driverlib/aon_wuc.h index 49b931204..b871c5b4e 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aon_wuc.h +++ b/third_party/ti/devices/cc26x0/driverlib/aon_wuc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_wuc.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the AON Wake-Up Controller * diff --git a/third_party/ti/devices/cc26x0/driverlib/aux_adc.c b/third_party/ti/devices/cc26x0/driverlib/aux_adc.c index 1573576a4..72b3d7823 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aux_adc.c +++ b/third_party/ti/devices/cc26x0/driverlib/aux_adc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_adc.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AUX Time to Digital Converter interface. * diff --git a/third_party/ti/devices/cc26x0/driverlib/aux_tdc.h b/third_party/ti/devices/cc26x0/driverlib/aux_tdc.h index 7c869b116..c66bced5c 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aux_tdc.h +++ b/third_party/ti/devices/cc26x0/driverlib/aux_tdc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_tdc.h -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the AUX Time-to-Digital Converter * @@ -128,19 +128,6 @@ extern "C" #define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event #define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW) // Falling edge polarity for stop event -#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2) -#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA) -#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB) -#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_ISRC_RESET) -#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER0_EV) -#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER1_EV) -#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_SMPH_AUTOTAKE_DONE) -#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_ADC_DONE) -#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_ADC_FIFO_ALMOST_FULL) -#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX0) -#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX1) -#define AUXTDC_STOP_AON_SW (AUX_TDC_TRIGSRC_STOP_SRC_AON_SW) -#define AUXTDC_STOP_AON_PROG_WU (AUX_TDC_TRIGSRC_STOP_SRC_AON_PROG_WU) #define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0) #define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1) #define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2) @@ -157,26 +144,26 @@ extern "C" #define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13) #define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14) #define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15) +#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_ADC_DONE) +#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_ADC_FIFO_ALMOST_FULL) +#define AUXTDC_STOP_AON_PROG_WU (AUX_TDC_TRIGSRC_STOP_SRC_AON_PROG_WU) +#define AUXTDC_STOP_AON_SW (AUX_TDC_TRIGSRC_STOP_SRC_AON_SW) +#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_ISRC_RESET) +#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX0) +#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX1) +#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_SMPH_AUTOTAKE_DONE) +#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_TDC_PRE) +#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER0_EV) +#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER1_EV) +#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2) +#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA) +#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB) #define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF) #define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV) -#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_TDC_PRE) #define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event #define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW) // Falling edge polarity for start event -#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2) -#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA) -#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB) -#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_ISRC_RESET) -#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER0_EV) -#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER1_EV) -#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_SMPH_AUTOTAKE_DONE) -#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_ADC_DONE) -#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_ADC_FIFO_ALMOST_FULL) -#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX0) -#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX1) -#define AUXTDC_START_AON_SW (AUX_TDC_TRIGSRC_START_SRC_AON_SW) -#define AUXTDC_START_AON_PROG_WU (AUX_TDC_TRIGSRC_START_SRC_AON_PROG_WU) #define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0) #define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1) #define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2) @@ -193,9 +180,22 @@ extern "C" #define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13) #define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14) #define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15) +#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_ADC_DONE) +#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_ADC_FIFO_ALMOST_FULL) +#define AUXTDC_START_AON_PROG_WU (AUX_TDC_TRIGSRC_START_SRC_AON_PROG_WU) +#define AUXTDC_START_AON_SW (AUX_TDC_TRIGSRC_START_SRC_AON_SW) +#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_ISRC_RESET) +#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX0) +#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX1) +#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_SMPH_AUTOTAKE_DONE) +#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_TDC_PRE) +#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER0_EV) +#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER1_EV) +#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2) +#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA) +#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB) #define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF) #define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV) -#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_TDC_PRE) //***************************************************************************** // @@ -286,19 +286,6 @@ AUXTDCStatusGet(uint32_t ui32Base) //! //! The \c ui32StartCondition must be a bitwise OR of the start event and the //! polarity of the start event. The start events are: -//! - \ref AUXTDC_START_AON_RTC_CH2 -//! - \ref AUXTDC_START_AUX_COMPA -//! - \ref AUXTDC_START_AUX_COMPB -//! - \ref AUXTDC_START_ISRC_RESET -//! - \ref AUXTDC_START_TIMER0_EV -//! - \ref AUXTDC_START_TIMER1_EV -//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE -//! - \ref AUXTDC_START_ADC_DONE -//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL -//! - \ref AUXTDC_START_OBSMUX0 -//! - \ref AUXTDC_START_OBSMUX1 -//! - \ref AUXTDC_START_AON_SW -//! - \ref AUXTDC_START_AON_PROG_WU //! - \ref AUXTDC_START_AUXIO0 //! - \ref AUXTDC_START_AUXIO1 //! - \ref AUXTDC_START_AUXIO2 @@ -315,28 +302,28 @@ AUXTDCStatusGet(uint32_t ui32Base) //! - \ref AUXTDC_START_AUXIO13 //! - \ref AUXTDC_START_AUXIO14 //! - \ref AUXTDC_START_AUXIO15 +//! - \ref AUXTDC_START_ADC_DONE +//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL +//! - \ref AUXTDC_START_AON_PROG_WU +//! - \ref AUXTDC_START_AON_SW +//! - \ref AUXTDC_START_ISRC_RESET +//! - \ref AUXTDC_START_OBSMUX0 +//! - \ref AUXTDC_START_OBSMUX1 +//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE +//! - \ref AUXTDC_START_TDC_PRE +//! - \ref AUXTDC_START_TIMER0_EV +//! - \ref AUXTDC_START_TIMER1_EV +//! - \ref AUXTDC_START_AON_RTC_CH2 +//! - \ref AUXTDC_START_AUX_COMPA +//! - \ref AUXTDC_START_AUX_COMPB //! - \ref AUXTDC_START_ACLK_REF //! - \ref AUXTDC_START_MCU_EV -//! - \ref AUXTDC_START_TDC_PRE //! //! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS //! or falling \ref AUXTDC_STARTPOL_FALL. //! //! The \c ui32StopCondition must be a bitwise OR of the stop event and the //! polarity of the stop event. The stop events are: -//! - \ref AUXTDC_STOP_AON_RTC_CH2 -//! - \ref AUXTDC_STOP_AUX_COMPA -//! - \ref AUXTDC_STOP_AUX_COMPB -//! - \ref AUXTDC_STOP_ISRC_RESET -//! - \ref AUXTDC_STOP_TIMER0_EV -//! - \ref AUXTDC_STOP_TIMER1_EV -//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE -//! - \ref AUXTDC_STOP_ADC_DONE -//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL -//! - \ref AUXTDC_STOP_OBSMUX0 -//! - \ref AUXTDC_STOP_OBSMUX1 -//! - \ref AUXTDC_STOP_AON_SW -//! - \ref AUXTDC_STOP_AON_PROG_WU //! - \ref AUXTDC_STOP_AUXIO0 //! - \ref AUXTDC_STOP_AUXIO1 //! - \ref AUXTDC_STOP_AUXIO2 @@ -353,9 +340,22 @@ AUXTDCStatusGet(uint32_t ui32Base) //! - \ref AUXTDC_STOP_AUXIO13 //! - \ref AUXTDC_STOP_AUXIO14 //! - \ref AUXTDC_STOP_AUXIO15 +//! - \ref AUXTDC_STOP_ADC_DONE +//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL +//! - \ref AUXTDC_STOP_AON_PROG_WU +//! - \ref AUXTDC_STOP_AON_SW +//! - \ref AUXTDC_STOP_ISRC_RESET +//! - \ref AUXTDC_STOP_OBSMUX0 +//! - \ref AUXTDC_STOP_OBSMUX1 +//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE +//! - \ref AUXTDC_STOP_TDC_PRE +//! - \ref AUXTDC_STOP_TIMER0_EV +//! - \ref AUXTDC_STOP_TIMER1_EV +//! - \ref AUXTDC_STOP_AON_RTC_CH2 +//! - \ref AUXTDC_STOP_AUX_COMPA +//! - \ref AUXTDC_STOP_AUX_COMPB //! - \ref AUXTDC_STOP_ACLK_REF //! - \ref AUXTDC_STOP_MCU_EV -//! - \ref AUXTDC_STOP_TDC_PRE //! //! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS //! or falling \ref AUXTDC_STOPPOL_FALL. diff --git a/third_party/ti/devices/cc26x0/driverlib/aux_timer.c b/third_party/ti/devices/cc26x0/driverlib/aux_timer.c index c3eec1a7c..686009bab 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aux_timer.c +++ b/third_party/ti/devices/cc26x0/driverlib/aux_timer.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_timer.c -* Revised: 2017-05-03 15:10:31 +0200 (Wed, 03 May 2017) -* Revision: 48885 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AUX Timer Module * diff --git a/third_party/ti/devices/cc26x0/driverlib/aux_timer.h b/third_party/ti/devices/cc26x0/driverlib/aux_timer.h index a4dc9c75c..6c0105a5c 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aux_timer.h +++ b/third_party/ti/devices/cc26x0/driverlib/aux_timer.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_timer.h -* Revised: 2017-05-03 14:53:24 +0200 (Wed, 03 May 2017) -* Revision: 48884 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the AUX Timer * diff --git a/third_party/ti/devices/cc26x0/driverlib/aux_wuc.c b/third_party/ti/devices/cc26x0/driverlib/aux_wuc.c index f93c5a064..f86e12202 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aux_wuc.c +++ b/third_party/ti/devices/cc26x0/driverlib/aux_wuc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aux_wuc.c -* Revised: 2016-12-08 10:34:56 +0100 (Thu, 08 Dec 2016) -* Revision: 47910 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the AUX Wakeup Controller. * diff --git a/third_party/ti/devices/cc26x0/driverlib/aux_wuc.h b/third_party/ti/devices/cc26x0/driverlib/aux_wuc.h index c2326917a..58ae1d152 100644 --- a/third_party/ti/devices/cc26x0/driverlib/aux_wuc.h +++ b/third_party/ti/devices/cc26x0/driverlib/aux_wuc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: aon_wuc.h -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the AUX Wakeup Controller * diff --git a/third_party/ti/devices/cc26x0/driverlib/bin/ccs/driverlib.lib b/third_party/ti/devices/cc26x0/driverlib/bin/ccs/driverlib.lib index 3644613e9..cd5c6f921 100644 Binary files a/third_party/ti/devices/cc26x0/driverlib/bin/ccs/driverlib.lib and b/third_party/ti/devices/cc26x0/driverlib/bin/ccs/driverlib.lib differ diff --git a/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a b/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a index 6f5ac65b6..05ea71218 100644 Binary files a/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a and b/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a differ diff --git a/third_party/ti/devices/cc26x0/driverlib/bin/iar/driverlib.lib b/third_party/ti/devices/cc26x0/driverlib/bin/iar/driverlib.lib index f4e7b635f..c44528d55 100644 Binary files a/third_party/ti/devices/cc26x0/driverlib/bin/iar/driverlib.lib and b/third_party/ti/devices/cc26x0/driverlib/bin/iar/driverlib.lib differ diff --git a/third_party/ti/devices/cc26x0/driverlib/bin/keil/driverlib.lib b/third_party/ti/devices/cc26x0/driverlib/bin/keil/driverlib.lib index 47f63f104..7e562ccbc 100644 Binary files a/third_party/ti/devices/cc26x0/driverlib/bin/keil/driverlib.lib and b/third_party/ti/devices/cc26x0/driverlib/bin/keil/driverlib.lib differ diff --git a/third_party/ti/devices/cc26x0/driverlib/chipinfo.c b/third_party/ti/devices/cc26x0/driverlib/chipinfo.c index fa5fc334c..0d8ceaafd 100644 --- a/third_party/ti/devices/cc26x0/driverlib/chipinfo.c +++ b/third_party/ti/devices/cc26x0/driverlib/chipinfo.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: chipinfo.c -* Revised: 2017-01-06 12:37:45 +0100 (Fri, 06 Jan 2017) -* Revision: 48166 +* Revised: 2017-08-30 11:09:05 +0200 (Wed, 30 Aug 2017) +* Revision: 49664 * * Description: Collection of functions returning chip information. * diff --git a/third_party/ti/devices/cc26x0/driverlib/chipinfo.h b/third_party/ti/devices/cc26x0/driverlib/chipinfo.h index 860f4aff6..4268e59cf 100644 --- a/third_party/ti/devices/cc26x0/driverlib/chipinfo.h +++ b/third_party/ti/devices/cc26x0/driverlib/chipinfo.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: chipinfo.h -* Revised: 2017-01-19 13:55:31 +0100 (Thu, 19 Jan 2017) -* Revision: 48292 +* Revised: 2017-08-30 11:09:05 +0200 (Wed, 30 Aug 2017) +* Revision: 49664 * * Description: Collection of functions returning chip information. * @@ -313,7 +313,7 @@ ChipInfo_GetMinorHwRev( void ) //! How to decode the USER_ID filed is described in the Technical Reference Manual (TRM) //! //! \return -//! Returns the the 32 bits USER_ID field +//! Returns the 32 bits USER_ID field // //***************************************************************************** __STATIC_INLINE uint32_t @@ -337,7 +337,13 @@ typedef enum { CHIP_TYPE_CC2650 = 5, //!< 5 means that this is a CC2650 chip. CHIP_TYPE_CUSTOM_0 = 6, //!< 6 means that this is a CUSTOM_0 chip. CHIP_TYPE_CUSTOM_1 = 7, //!< 7 means that this is a CUSTOM_1 chip. - CHIP_TYPE_CC2640R2 = 8 //!< 4 means that this is a CC2640R2 chip. + CHIP_TYPE_CC2640R2 = 8, //!< 8 means that this is a CC2640R2 chip. + CHIP_TYPE_CC2642 = 9, //!< 9 means that this is a CC2642 chip. + CHIP_TYPE_CC2644 = 10,//!< 10 means that this is a CC2644 chip. + CHIP_TYPE_CC2652 = 11,//!< 11 means that this is a CC2652 chip. + CHIP_TYPE_CC1312 = 12,//!< 12 means that this is a CC1312 chip. + CHIP_TYPE_CC1352 = 13,//!< 13 means that this is a CC1352 chip. + CHIP_TYPE_CC1354 = 14 //!< 14 means that this is a CC1354 chip. } ChipType_t; //***************************************************************************** @@ -356,12 +362,12 @@ extern ChipType_t ChipInfo_GetChipType( void ); // //***************************************************************************** typedef enum { - FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown. - FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member. - FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member. - FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member. - FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents). - FAMILY_CC13x2_13x4_26x2_26x4 = 4 //!< 4 means that the chip is a CC13x2, CC13x4, CC26x2, CC26x4 family member. + FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown. + FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member. + FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member. + FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member. + FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents). + FAMILY_CC13x2_CC26x2 = 4 //!< 4 means that the chip is a CC13x2, CC26x2 family member. } ChipFamily_t; //***************************************************************************** @@ -374,6 +380,26 @@ typedef enum { //***************************************************************************** extern ChipFamily_t ChipInfo_GetChipFamily( void ); +//***************************************************************************** +// +// Options for the define THIS_DRIVERLIB_BUILD +// +//***************************************************************************** +#define DRIVERLIB_BUILD_CC26X0 0 //!< 0 is the driverlib build ID for the cc26x0 driverlib. +#define DRIVERLIB_BUILD_CC13X0 1 //!< 1 is the driverlib build ID for the cc13x0 driverlib. +#define DRIVERLIB_BUILD_CC26X1 2 //!< 2 is the driverlib build ID for the cc26x1 driverlib. +#define DRIVERLIB_BUILD_CC26X0R2 3 //!< 3 is the driverlib build ID for the cc26x0r2 driverlib. +#define DRIVERLIB_BUILD_CC13X2_CC26X2 4 //!< 4 is the driverlib build ID for the cc13x2_cc26x2 driverlib. + +//***************************************************************************** +// +//! \brief Define THIS_DRIVERLIB_BUILD, identifying current driverlib build ID. +//! +//! This driverlib build identifier can be useful for compile time checking/optimization (supporting C preprocessor expressions). +// +//***************************************************************************** +#define THIS_DRIVERLIB_BUILD DRIVERLIB_BUILD_CC26X0 + //***************************************************************************** // //! \brief Returns true if this chip is member of the CC13x0 family. @@ -432,16 +458,16 @@ ChipInfo_ChipFamilyIs_CC26x1( void ) //***************************************************************************** // -//! \brief Returns true if this chip is member of the CC13x2, CC13x4, CC26x2, CC26x4 family. +//! \brief Returns true if this chip is member of the CC13x2, CC26x2 family. //! //! \return -//! Returns \c true if this chip is member of the CC13x2, CC13x4, CC26x2, CC26x4 family, \c false otherwise. +//! Returns \c true if this chip is member of the CC13x2, CC26x2 family, \c false otherwise. // //***************************************************************************** __STATIC_INLINE bool -ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4( void ) +ChipInfo_ChipFamilyIs_CC13x2_CC26x2( void ) { - return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_13x4_26x2_26x4 ); + return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_CC26x2 ); } //***************************************************************************** diff --git a/third_party/ti/devices/cc26x0/driverlib/cpu.h b/third_party/ti/devices/cc26x0/driverlib/cpu.h index 3c16a2cf1..b5f2df5ae 100644 --- a/third_party/ti/devices/cc26x0/driverlib/cpu.h +++ b/third_party/ti/devices/cc26x0/driverlib/cpu.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: cpu.h -* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017) -* Revision: 48248 +* Revised: 2017-07-25 09:34:46 +0200 (Tue, 25 Jul 2017) +* Revision: 49395 * * Description: Defines and prototypes for the CPU instruction wrapper * functions. diff --git a/third_party/ti/devices/cc26x0/driverlib/crypto.h b/third_party/ti/devices/cc26x0/driverlib/crypto.h index 6356c22ea..1785ef540 100644 --- a/third_party/ti/devices/cc26x0/driverlib/crypto.h +++ b/third_party/ti/devices/cc26x0/driverlib/crypto.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: crypto.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: AES header file. * @@ -720,12 +720,15 @@ CRYPTOIntClear(uint32_t ui32IntFlags) //***************************************************************************** // -//! \brief Registers an interrupt handler for a Crypto interrupt. +//! \brief Registers an interrupt handler for a Crypto interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the //! UART interrupt occurs. @@ -748,7 +751,7 @@ CRYPTOIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a Crypto interrupt. +//! \brief Unregisters an interrupt handler for a Crypto interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a Crypto interrupt occurs. This diff --git a/third_party/ti/devices/cc26x0/driverlib/driverlib_release.c b/third_party/ti/devices/cc26x0/driverlib/driverlib_release.c index 456c7ebf6..d05057d6d 100644 --- a/third_party/ti/devices/cc26x0/driverlib/driverlib_release.c +++ b/third_party/ti/devices/cc26x0/driverlib/driverlib_release.c @@ -42,4 +42,4 @@ /// Declare the current DriverLib release -DRIVERLIB_DECLARE_RELEASE(0, 48919); +DRIVERLIB_DECLARE_RELEASE(0, 49664); diff --git a/third_party/ti/devices/cc26x0/driverlib/driverlib_release.h b/third_party/ti/devices/cc26x0/driverlib/driverlib_release.h index 5ab88fd95..a7b931dbb 100644 --- a/third_party/ti/devices/cc26x0/driverlib/driverlib_release.h +++ b/third_party/ti/devices/cc26x0/driverlib/driverlib_release.h @@ -63,7 +63,7 @@ extern "C" /// DriverLib release group number #define DRIVERLIB_RELEASE_GROUP 0 /// DriverLib release build number -#define DRIVERLIB_RELEASE_BUILD 48919 +#define DRIVERLIB_RELEASE_BUILD 49664 @@ -83,7 +83,7 @@ extern "C" const volatile uint8_t driverlib_release_##group##_##build /// External declaration of the DriverLib release locking object -extern DRIVERLIB_DECLARE_RELEASE(0, 48919); +extern DRIVERLIB_DECLARE_RELEASE(0, 49664); @@ -135,7 +135,7 @@ extern DRIVERLIB_DECLARE_RELEASE(0, 48919); // //***************************************************************************** #define DRIVERLIB_ASSERT_CURR_RELEASE() \ - DRIVERLIB_ASSERT_RELEASE(0, 48919) + DRIVERLIB_ASSERT_RELEASE(0, 49664) diff --git a/third_party/ti/devices/cc26x0/driverlib/flash.c b/third_party/ti/devices/cc26x0/driverlib/flash.c index 1b096fa90..0c885c00f 100644 --- a/third_party/ti/devices/cc26x0/driverlib/flash.c +++ b/third_party/ti/devices/cc26x0/driverlib/flash.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: flash.c -* Revised: 2017-04-26 18:34:53 +0200 (Wed, 26 Apr 2017) -* Revision: 48853 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for on chip Flash. * diff --git a/third_party/ti/devices/cc26x0/driverlib/flash.h b/third_party/ti/devices/cc26x0/driverlib/flash.h index 02b0feea7..4caf152c6 100644 --- a/third_party/ti/devices/cc26x0/driverlib/flash.h +++ b/third_party/ti/devices/cc26x0/driverlib/flash.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: flash.h -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the Flash driver. * @@ -461,12 +461,15 @@ FlashCheckFsmForReady(void) //***************************************************************************** // -//! \brief Registers an interrupt handler for the flash interrupt. +//! \brief Registers an interrupt handler for the flash interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! FLASH interrupts must be enabled via \ref FlashIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific FLASH interrupts must be enabled via \ref FlashIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the flash //! interrupt occurs. @@ -489,7 +492,7 @@ FlashIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters the interrupt handler for the flash interrupt. +//! \brief Unregisters the interrupt handler for the flash interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a FLASH interrupt occurs. This diff --git a/third_party/ti/devices/cc26x0/driverlib/i2c.h b/third_party/ti/devices/cc26x0/driverlib/i2c.h index 62fee0d45..4ef0930f8 100644 --- a/third_party/ti/devices/cc26x0/driverlib/i2c.h +++ b/third_party/ti/devices/cc26x0/driverlib/i2c.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: i2c.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the I2C. * @@ -886,11 +886,14 @@ I2CSlaveIntStatus(uint32_t ui32Base, bool bMasked) //***************************************************************************** // -//! \brief Registers an interrupt handler for the I2C module. +//! \brief Registers an interrupt handler for the I2C module in the dynamic interrupt table. //! -//! This sets the handler to be called when an I2C interrupt occurs. This will -//! enable the global interrupt in the interrupt controller; specific I2C -//! interrupts must be enabled via \ref I2CMasterIntEnable() and +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific I2C interrupts must be enabled via \ref I2CMasterIntEnable() and //! \ref I2CSlaveIntEnable(). If necessary, it is the interrupt handler's //! responsibility to clear the interrupt source via \ref I2CMasterIntClear() and //! \ref I2CSlaveIntClear(). @@ -909,7 +912,7 @@ extern void I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the I2C module. +//! \brief Unregisters an interrupt handler for the I2C module in the dynamic interrupt table. //! //! This function will clear the handler to be called when an I2C interrupt //! occurs. This will also mask off the interrupt in the interrupt controller diff --git a/third_party/ti/devices/cc26x0/driverlib/i2s.c b/third_party/ti/devices/cc26x0/driverlib/i2s.c index e30bbd3e1..b8b38a0b7 100644 --- a/third_party/ti/devices/cc26x0/driverlib/i2s.c +++ b/third_party/ti/devices/cc26x0/driverlib/i2s.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: i2s.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-05-08 12:18:04 +0200 (Mon, 08 May 2017) +* Revision: 48924 * * Description: Driver for the I2S. * @@ -139,10 +139,9 @@ I2SChannelConfigure(uint32_t ui32Base, uint32_t ui32Chan0Cfg, ui32OutChan = 0; // Configure input/output channels. - HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = ((ui32Chan0Cfg << I2S_AIFDIRCFG_AD0_S) - & I2S_AIFDIRCFG_AD0_M) | - ((ui32Chan1Cfg << I2S_AIFDIRCFG_AD1_S) - & I2S_AIFDIRCFG_AD1_M); + HWREG(I2S0_BASE + I2S_O_AIFDIRCFG) = ( + (( ui32Chan0Cfg << I2S_AIFDIRCFG_AD0_S) & I2S_AIFDIRCFG_AD0_M ) | + (( ui32Chan1Cfg << I2S_AIFDIRCFG_AD1_S) & I2S_AIFDIRCFG_AD1_M ) ); // Configure the valid channel mask. HWREG(I2S0_BASE + I2S_O_AIFWMASK0) = (ui32Chan0Cfg >> 8) & I2S_AIFWMASK0_MASK_M; diff --git a/third_party/ti/devices/cc26x0/driverlib/i2s.h b/third_party/ti/devices/cc26x0/driverlib/i2s.h index 255c2930d..0ef2441c6 100644 --- a/third_party/ti/devices/cc26x0/driverlib/i2s.h +++ b/third_party/ti/devices/cc26x0/driverlib/i2s.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: i2s.h -* Revised: 2017-04-20 16:29:17 +0200 (Thu, 20 Apr 2017) -* Revision: 48817 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the I2S. * @@ -498,14 +498,17 @@ extern void I2SPointerSet(uint32_t ui32Base, bool bInput, void * pNextPointer); //***************************************************************************** // -//! \brief Registers an interrupt handler for an I2S interrupt. +//! \brief Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! I2S interrupts must be enabled via \ref I2SIntEnable(). It is the interrupt +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific I2S interrupts must be enabled via \ref I2SIntEnable(). It is the interrupt //! handler's responsibility to clear the interrupt source. //! -//! \param ui32Base is the base address of the I2S port. +//! \param ui32Base is the base address of the I2S module. //! \param pfnHandler is a pointer to the function to be called when the //! I2S interrupt occurs. //! @@ -530,7 +533,7 @@ I2SIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a I2S interrupt. +//! \brief Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when an I2S interrupt occurs. This diff --git a/third_party/ti/devices/cc26x0/driverlib/interrupt.c b/third_party/ti/devices/cc26x0/driverlib/interrupt.c index dcb72ed9b..d0cd9bc59 100644 --- a/third_party/ti/devices/cc26x0/driverlib/interrupt.c +++ b/third_party/ti/devices/cc26x0/driverlib/interrupt.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: interrupt.c -* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017) -* Revision: 48248 +* Revised: 2017-05-19 11:31:39 +0200 (Fri, 19 May 2017) +* Revision: 49017 * * Description: Driver for the NVIC Interrupt Controller. * @@ -118,16 +118,17 @@ IntDefaultHandler(void) //***************************************************************************** // -// The processor vector table. -// -// This contains a list of the handlers for the various interrupt sources in -// the system. The layout of this list is defined by the hardware; assertion -// of an interrupt causes the processor to start executing directly at the -// address given in the corresponding location in this list. +//! \brief Global pointer to the (dynamic) interrupt vector table when placed in SRAM. +//! +//! Interrupt vector table is placed at "vtable_ram" defined in the linker file +//! provided by Texas Instruments. By default, this is at the beginning of SRAM. +//! +//! \note See \ti_code{interrupt.c} for compiler specific implementation! // //***************************************************************************** #if defined(DOXYGEN) -// Don't document in Doxygen because this is compiler dependent. +// Dummy void pointer used as placeholder to generate Doxygen documentation. +void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void); #elif defined(__IAR_SYSTEMS_ICC__) #pragma data_alignment=256 static __no_init void (*g_pfnRAMVectors[NUM_INTERRUPTS])(void) @ ".vtable_ram"; diff --git a/third_party/ti/devices/cc26x0/driverlib/interrupt.h b/third_party/ti/devices/cc26x0/driverlib/interrupt.h index 52e153184..a47a67c02 100644 --- a/third_party/ti/devices/cc26x0/driverlib/interrupt.h +++ b/third_party/ti/devices/cc26x0/driverlib/interrupt.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: interrupt.h -* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017) -* Revision: 48248 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the NVIC Interrupt Controller * @@ -122,45 +122,92 @@ extern "C" //***************************************************************************** // -//! \brief Registers a function to be called when an interrupt occurs. +//! \brief Registers a function as an interrupt handler in the dynamic vector table. //! -//! This function is used to specify the handler function to be called when the -//! given interrupt is asserted to the processor. When the interrupt occurs, -//! if it is enabled (via \ref IntEnable()), the handler function will be called in -//! interrupt context. Since the handler function can preempt other code, care -//! must be taken to protect memory or peripherals that are accessed by the -//! handler and other non-handler code. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! //! -//! \note The use of this function (directly or indirectly via a peripheral -//! driver interrupt register function) moves the interrupt vector table from -//! flash to SRAM. Therefore, care must be taken when linking the application -//! to ensure that the SRAM vector table is located at the beginning of SRAM; -//! otherwise NVIC will not look in the correct portion of memory for the -//! vector table (it requires the vector table be on a 1 kB memory alignment). -//! Normally, the SRAM vector table is so placed via the use of linker scripts. +//! This function writes a function pointer to the dynamic interrupt vector table +//! in SRAM to register the function as an interrupt handler (ISR). When the corresponding +//! interrupt occurs, and it has been enabled (see \ref IntEnable()), the function +//! pointer is fetched from the dynamic vector table, and the System CPU will +//! execute the interrupt handler. //! -//! \param ui32Interrupt specifies the interrupt in question. -//! \param pfnHandler is a pointer to the function to be called. +//! \note The first call to this function (directly or indirectly via a peripheral +//! driver interrupt register function) copies the interrupt vector table from +//! Flash to SRAM. NVIC uses the static vector table (in Flash) until this function +//! is called. +//! +//! \param ui32Interrupt specifies the index in the vector table to modify. +//! - System exceptions (vectors 0 to 15): +//! - INT_NMI_FAULT +//! - INT_HARD_FAULT +//! - INT_MEMMANAGE_FAULT +//! - INT_BUS_FAULT +//! - INT_USAGE_FAULT +//! - INT_SVCALL +//! - INT_DEBUG +//! - INT_PENDSV +//! - INT_SYSTICK +//! - Interrupts (vectors >15): +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_SPIS_COMB +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ +//! \param pfnHandler is a pointer to the function to register as interrupt handler. //! //! \return None. +//! +//! \sa \ref IntUnregister(), \ref IntEnable() // //***************************************************************************** extern void IntRegister(uint32_t ui32Interrupt, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters the function to be called when an interrupt occurs. +//! \brief Unregisters an interrupt handler in the dynamic vector table. //! -//! This function is used to indicate that no handler should be called when the -//! given interrupt is asserted to the processor. The interrupt source will be -//! automatically disabled (via \ref IntDisable()) if necessary. +//! This function removes an interrupt handler from the dynamic vector table and +//! replaces it with the default interrupt handler \ref IntDefaultHandler(). //! -//! \param ui32Interrupt specifies the interrupt in question. +//! \note Remember to disable the interrupt before removing its interrupt handler +//! from the vector table. +//! +//! \param ui32Interrupt specifies the index in the vector table to modify. +//! - See \ref IntRegister() for list of valid arguments. //! //! \return None. //! -//! \sa \ref IntRegister() for important information about registering interrupt -//! handlers. +//! \sa \ref IntRegister(), \ref IntDisable() // //***************************************************************************** extern void IntUnregister(uint32_t ui32Interrupt); @@ -170,15 +217,20 @@ extern void IntUnregister(uint32_t ui32Interrupt); //! \brief Sets the priority grouping of the interrupt controller. //! //! This function specifies the split between preemptable priority levels and -//! subpriority levels in the interrupt priority specification. The range of -//! the grouping values are dependent upon the hardware implementation; on -//! the CC26xx family, three bits are available for hardware interrupt -//! prioritization and therefore priority grouping values of three through -//! seven have the same effect. +//! subpriority levels in the interrupt priority specification. +//! +//! Three bits are available for hardware interrupt prioritization thus priority +//! grouping values of three through seven have the same effect. //! //! \param ui32Bits specifies the number of bits of preemptable priority. +//! - 0 : No pre-emption priority, eight bits of subpriority. +//! - 1 : One bit of pre-emption priority, seven bits of subpriority +//! - 2 : Two bits of pre-emption priority, six bits of subpriority +//! - 3-7 : Three bits of pre-emption priority, five bits of subpriority //! //! \return None +//! +//! \sa \ref IntPrioritySet() // //***************************************************************************** extern void IntPriorityGroupingSet(uint32_t ui32Bits); @@ -191,6 +243,10 @@ extern void IntPriorityGroupingSet(uint32_t ui32Bits); //! subpriority levels in the interrupt priority specification. //! //! \return Returns the number of bits of preemptable priority. +//! - 0 : No pre-emption priority, eight bits of subpriority. +//! - 1 : One bit of pre-emption priority, seven bits of subpriority +//! - 2 : Two bits of pre-emption priority, six bits of subpriority +//! - 3-7 : Three bits of pre-emption priority, five bits of subpriority // //***************************************************************************** extern uint32_t IntPriorityGroupingGet(void); @@ -199,21 +255,62 @@ extern uint32_t IntPriorityGroupingGet(void); // //! \brief Sets the priority of an interrupt. //! -//! This function is used to set the priority of an interrupt. When multiple -//! interrupts are asserted simultaneously, the ones with the highest priority -//! are processed before the lower priority interrupts. Smaller numbers -//! correspond to higher interrupt priorities; priority 0 is the highest +//! This function sets the priority of an interrupt, including system exceptions. +//! When multiple interrupts are asserted simultaneously, the ones with the highest +//! priority are processed before the lower priority interrupts. Smaller numbers +//! correspond to higher interrupt priorities thus priority 0 is the highest //! interrupt priority. //! -//! The hardware priority mechanism will only look at the upper N bits of the -//! priority level (where N is 3 for cc26xx), so any prioritization must be -//! performed in those bits. The remaining bits can be used to sub-prioritize -//! the interrupt sources, and may be used by the hardware priority mechanism -//! on a future part. This arrangement allows priorities to migrate to -//! different NVIC implementations without changing the gross prioritization -//! of the interrupts. +//! \warning This function does not support setting priority of interrupt vectors +//! one through three which are: +//! - 1: Reset handler +//! - 2: NMI handler +//! - 3: Hard fault handler //! -//! \param ui32Interrupt specifies the interrupt in question. +//! \param ui32Interrupt specifies the index in the vector table to change priority for. +//! - System exceptions: +//! - INT_MEMMANAGE_FAULT +//! - INT_BUS_FAULT +//! - INT_USAGE_FAULT +//! - INT_SVCALL +//! - INT_DEBUG +//! - INT_PENDSV +//! - INT_SYSTICK +//! - Interrupts: +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_SPIS_COMB +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ //! \param ui8Priority specifies the priority of the interrupt. //! - \ref INT_PRI_LEVEL0 : Highest priority. //! - \ref INT_PRI_LEVEL1 @@ -225,6 +322,8 @@ extern uint32_t IntPriorityGroupingGet(void); //! - \ref INT_PRI_LEVEL7 : Lowest priority. //! //! \return None +//! +//! \sa \ref IntPriorityGroupingSet() // //***************************************************************************** extern void IntPrioritySet(uint32_t ui32Interrupt, uint8_t ui8Priority); @@ -235,10 +334,16 @@ extern void IntPrioritySet(uint32_t ui32Interrupt, uint8_t ui8Priority); //! //! This function gets the priority of an interrupt. //! -//! \param ui32Interrupt specifies the interrupt in question. +//! \warning This function does not support getting priority of interrupt vectors +//! one through three which are: +//! - 1: Reset handler +//! - 2: NMI handler +//! - 3: Hard fault handler +//! +//! \param ui32Interrupt specifies the index in the vector table to read priority of. +//! - See \ref IntPrioritySet() for list of valid arguments. //! //! \return Returns the interrupt priority: -//! - (-1) : Invalid interrupt specified as parameter! //! - \ref INT_PRI_LEVEL0 : Highest priority. //! - \ref INT_PRI_LEVEL1 //! - \ref INT_PRI_LEVEL2 @@ -255,13 +360,53 @@ extern int32_t IntPriorityGet(uint32_t ui32Interrupt); // //! \brief Enables an interrupt. //! -//! The specified interrupt is enabled in the interrupt controller. Other -//! enables for the interrupt (such as at the peripheral level) are unaffected -//! by this function. +//! This function enables the specified interrupt in the interrupt controller. //! -//! \param ui32Interrupt specifies the interrupt to be enabled. +//! \param ui32Interrupt specifies the index in the vector table to enable. +//! - System exceptions: +//! - INT_MEMMANAGE_FAULT +//! - INT_BUS_FAULT +//! - INT_USAGE_FAULT +//! - INT_SYSTICK +//! - Interrupts: +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_SPIS_COMB +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ //! //! \return None +//! +//! \sa \ref IntDisable() // //***************************************************************************** extern void IntEnable(uint32_t ui32Interrupt); @@ -270,13 +415,14 @@ extern void IntEnable(uint32_t ui32Interrupt); // //! \brief Disables an interrupt. //! -//! The specified interrupt is disabled in the interrupt controller. Other -//! enables for the interrupt (such as at the peripheral level) are unaffected -//! by this function. +//! This function disables the specified interrupt in the interrupt controller. //! -//! \param ui32Interrupt specifies the interrupt to be disabled. +//! \param ui32Interrupt specifies the index in the vector table to disable. +//! - See \ref IntEnable() for list of valid arguments. //! //! \return None +//! +//! \sa \ref IntEnable() // //***************************************************************************** extern void IntDisable(uint32_t ui32Interrupt); @@ -285,34 +431,78 @@ extern void IntDisable(uint32_t ui32Interrupt); // //! \brief Pends an interrupt. //! -//! The specified interrupt is pended in the interrupt controller. This will -//! cause the interrupt controller to execute the corresponding interrupt +//! This function pends the specified interrupt in the interrupt controller. +//! This causes the interrupt controller to execute the corresponding interrupt //! handler at the next available time, based on the current interrupt state -//! priorities. For example, if called by a higher priority interrupt handler, -//! the specified interrupt handler will not be called until after the current -//! interrupt handler has completed execution. The interrupt must have been -//! enabled for it to be called. +//! priorities. //! -//! \param ui32Interrupt specifies the interrupt to be pended. +//! This interrupt controller automatically clears the pending interrupt once the +//! interrupt handler is executed. +//! +//! \param ui32Interrupt specifies the index in the vector table to pend. +//! - System exceptions: +//! - INT_NMI_FAULT +//! - INT_PENDSV +//! - INT_SYSTICK +//! - Interrupts: +//! - INT_AON_GPIO_EDGE +//! - INT_I2C_IRQ +//! - INT_RFC_CPE_1 +//! - INT_SPIS_COMB +//! - INT_AON_RTC_COMB +//! - INT_UART0_COMB +//! - INT_AUX_SWEV0 +//! - INT_SSI0_COMB +//! - INT_SSI1_COMB +//! - INT_RFC_CPE_0 +//! - INT_RFC_HW_COMB +//! - INT_RFC_CMD_ACK +//! - INT_I2S_IRQ +//! - INT_AUX_SWEV1 +//! - INT_WDT_IRQ +//! - INT_GPT0A +//! - INT_GPT0B +//! - INT_GPT1A +//! - INT_GPT1B +//! - INT_GPT2A +//! - INT_GPT2B +//! - INT_GPT3A +//! - INT_GPT3B +//! - INT_CRYPTO_RESULT_AVAIL_IRQ +//! - INT_DMA_DONE_COMB +//! - INT_DMA_ERR +//! - INT_FLASH +//! - INT_SWEV0 +//! - INT_AUX_COMB +//! - INT_AON_PROG0 +//! - INT_PROG0 (Programmable interrupt, see \ref EventRegister()) +//! - INT_AUX_COMPA +//! - INT_AUX_ADC_IRQ +//! - INT_TRNG_IRQ //! //! \return None +//! +//! \sa \ref IntEnable() // //***************************************************************************** extern void IntPendSet(uint32_t ui32Interrupt); //***************************************************************************** // -//! \brief Query whether an interrupt is pending. +//! \brief Checks if an interrupt is pending. //! -//! This function will check whether the specified interrupt is pending in the -//! interrupt controller. The interrupt must have been enabled for it to be -//! called, so an interrupt can very well be pending waiting to be enabled or -//! waiting for an interrupt of higher priority to be done executing. +//! This function checks the interrupt controller to see if an interrupt is pending. //! -//! \note This function does not support the lower 16 IRQ vectors which are -//! hardware defined for the System CPU. +//! The interrupt must be enabled in order for the corresponding interrupt handler +//! to be executed, so an interrupt can be pending waiting to be enabled or waiting +//! for an interrupt of higher priority to be done executing. //! -//! \param ui32Interrupt specifies the interrupt to be queried. +//! \note This function does not support reading pending status for system exceptions +//! (vector table indexes <16). +//! +//! \param ui32Interrupt specifies the index in the vector table to check pending +//! status for. +//! - See \ref IntPendSet() for list of valid arguments (except system exceptions). //! //! \return Returns: //! - \c true : Specified interrupt is pending. @@ -325,12 +515,16 @@ extern bool IntPendGet(uint32_t ui32Interrupt); // //! \brief Unpends an interrupt. //! -//! The specified interrupt is unpended in the interrupt controller. This will -//! cause any previously generated interrupts that have not been handled yet +//! This function unpends the specified interrupt in the interrupt controller. +//! This causes any previously generated interrupts that have not been handled yet //! (due to higher priority interrupts or the interrupt no having been enabled //! yet) to be discarded. //! -//! \param ui32Interrupt specifies the interrupt to be unpended. +//! \note It is not possible to unpend the NMI because it takes effect +//! immediately when being pended. +//! +//! \param ui32Interrupt specifies the index in the vector table to unpend. +//! - See \ref IntPendSet() for list of valid arguments (except NMI). //! //! \return None // @@ -339,11 +533,9 @@ extern void IntPendClear(uint32_t ui32Interrupt); //***************************************************************************** // -//! \brief Enables the processor interrupt. +//! \brief Enables the CPU interrupt. //! -//! Allows the processor to respond to interrupts. This does not affect the -//! set of interrupts enabled in the interrupt controller; it just gates the -//! single interrupt from the controller to the processor. +//! Allows the CPU to respond to interrupts. //! //! \return Returns: //! - \c true : Interrupts were disabled and are now enabled. @@ -353,17 +545,17 @@ extern void IntPendClear(uint32_t ui32Interrupt); __STATIC_INLINE bool IntMasterEnable(void) { - // Enable processor interrupts. + // Enable CPU interrupts. return(CPUcpsie()); } //***************************************************************************** // -//! \brief Disables the processor interrupt. +//! \brief Disables the CPU interrupts with configurable priority. //! -//! Prevents the processor from receiving interrupts. This does not affect the -//! set of interrupts enabled in the interrupt controller; it just gates the -//! single interrupt from the controller to the processor. +//! Prevents the CPU from receiving interrupts except NMI and hard fault. This +//! does not affect the set of interrupts enabled in the interrupt controller; +//! it just gates the interrupt from the interrupt controller to the CPU. //! //! \return Returns: //! - \c true : Interrupts were already disabled when the function was called. @@ -373,7 +565,7 @@ IntMasterEnable(void) __STATIC_INLINE bool IntMasterDisable(void) { - // Disable processor interrupts. + // Disable CPU interrupts. return(CPUcpsid()); } @@ -390,12 +582,17 @@ IntMasterDisable(void) //! Smaller numbers correspond to higher interrupt priorities. So for example //! a priority level mask of 4 will allow interrupts of priority level 0-3, //! and interrupts with a numerical priority of 4 and greater will be blocked. -//! -//! The hardware priority mechanism will only look at the upper N bits of the -//! priority level (where N is 3 for the CC26xx family), so any -//! prioritization must be performed in those bits. +//! The device supports priority levels 0 through 7. //! //! \param ui32PriorityMask is the priority level that will be masked. +//! - 0 : Disable priority masking. +//! - 1 : Allow priority 0 interrupts, mask interrupts with priority 1-7. +//! - 2 : Allow priority 0-1 interrupts, mask interrupts with priority 2-7. +//! - 3 : Allow priority 0-2 interrupts, mask interrupts with priority 3-7. +//! - 4 : Allow priority 0-3 interrupts, mask interrupts with priority 4-7. +//! - 5 : Allow priority 0-4 interrupts, mask interrupts with priority 5-7. +//! - 6 : Allow priority 0-5 interrupts, mask interrupts with priority 6-7. +//! - 7 : Allow priority 0-6 interrupts, mask interrupts with priority 7. //! //! \return None. // @@ -419,10 +616,6 @@ IntPriorityMaskSet(uint32_t ui32PriorityMask) //! a priority level mask of 4 will allow interrupts of priority level 0-3, //! and interrupts with a numerical priority of 4 and greater will be blocked. //! -//! The hardware priority mechanism will only look at the upper N bits of the -//! priority level (where N is 3 for the CC26xx family), so any -//! prioritization must be performed in those bits. -//! //! \return Returns the value of the interrupt priority level mask. // //***************************************************************************** diff --git a/third_party/ti/devices/cc26x0/driverlib/interrupt_doc.h b/third_party/ti/devices/cc26x0/driverlib/interrupt_doc.h index f2def8d8e..42a68f49c 100644 --- a/third_party/ti/devices/cc26x0/driverlib/interrupt_doc.h +++ b/third_party/ti/devices/cc26x0/driverlib/interrupt_doc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: interrupt_doc.h -* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016) -* Revision: 45971 +* Revised: 2017-05-23 15:04:30 +0200 (Tue, 23 May 2017) +* Revision: 49052 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -38,7 +38,7 @@ //! \section sec_interrupt Introduction //! //! The interrupt controller API provides a set of functions for dealing with the -//! nested vectored interrupt controller (NVIC). Functions are provided to enable +//! Nested Vectored Interrupt Controller (NVIC). Functions are provided to enable //! and disable interrupts, register interrupt handlers, and set the priority of //! interrupts. //! @@ -47,43 +47,35 @@ //! except one which is programmable. For more information about the MCU event fabric, see the //! [MCU event fabric API](\ref event_api). //! -//! The NVIC provides global interrupt masking, prioritization, and handler -//! dispatching. Devices within the \ti_device family support 34 -//! interrupt lines and 8 priority levels from 0 to 7 with 0 being the highest priority. -//! Individual interrupt sources can -//! be masked, and the processor interrupt can be globally masked as well (without -//! affecting the individual source masks). +//! \section sec_interrupt_api API //! -//! The NVIC is tightly coupled with the System CPU. When the -//! processor responds to an interrupt, the NVIC supplies the address of the -//! function to handle the interrupt directly to the processor. -//! -//! Each interrupt source can be individually enabled and disabled through: +//! Each interrupt can be individually enabled and disabled through: //! - \ref IntEnable() //! - \ref IntDisable() //! -//! The global processor interrupt can be enabled and disabled with the following functions: +//! The global CPU interrupt can be enabled and disabled with the following functions: //! - \ref IntMasterEnable() //! - \ref IntMasterDisable() //! -//! This does not affect the individual -//! interrupt enable states. Masking of the processor interrupt can be used as -//! a simple critical section (only an NMI can interrupt the processor while the -//! processor interrupt is disabled), although masking the processor interrupt can -//! have adverse effects on the interrupt response time. +//! This does not affect the individual interrupt enable states. Masking of the CPU +//! interrupt can be used as a simple critical section (only an NMI can interrupt the +//! CPU while the CPU interrupt is disabled), although masking the CPU +//! interrupt can increase the interrupt response time. //! //! It is possible to access the NVIC to see if any interrupts are pending and manually //! clear pending interrupts which have not yet been serviced or set a specific interrupt as //! pending to be handled based on its priority. Pending interrupts are cleared automatically -//! when the interrupt is accepted and becomes active (being executed). The functions to read, -//! clear, and set pending interrupts are: +//! when the interrupt is accepted and executed. However, the event source which caused the +//! interrupt might need to be cleared manually to avoid re-triggering the corresponding interrupt. +//! The functions to read, clear, and set pending interrupts are: //! - \ref IntPendGet() //! - \ref IntPendClear() //! - \ref IntPendSet() //! //! The interrupt prioritization in the NVIC allows handling of higher priority interrupts -//! before lower priority interrupts, as well as allowing preemption of -//! lower priority interrupt handlers by higher priority interrupts. +//! before lower priority interrupts, as well as allowing preemption of lower priority interrupt +//! handlers by higher priority interrupts. +//! The device supports eight priority levels from 0 to 7 with 0 being the highest priority. //! The priority of each interrupt source can be set and examined using: //! - \ref IntPrioritySet() //! - \ref IntPriorityGet() @@ -93,54 +85,78 @@ //! - \ref IntPriorityMaskSet() //! - \ref IntPriorityMaskGet() //! -//! Subprioritization is also possible; instead of having 3 bits of preemptable -//! prioritization (8 levels), the NVIC can be configured for 3 - M bits of +//! Subprioritization is also possible. Instead of having three bits of preemptable +//! prioritization (eight levels), the NVIC can be configured for 3 - M bits of //! preemptable prioritization and M bits of subpriority. In this scheme, two //! interrupts with the same preemptable prioritization but different subpriorities -//! do not cause a preemption; instead tail chaining is used to process +//! do not cause a preemption. Instead, tail chaining is used to process //! the two interrupts back-to-back. //! If two interrupts with the same priority (and subpriority if so configured) are //! asserted at the same time, the one with the lower interrupt number is -//! processed first. Subprioritization is handled by: +//! processed first. +//! Subprioritization is handled by: //! - \ref IntPriorityGroupingSet() //! - \ref IntPriorityGroupingGet() //! -//! Interrupt handlers can be configured in one of two ways; statically at compile -//! time or dynamically at run time. Static configuration of interrupt handlers is -//! accomplished by editing the interrupt handler table in the startup code of the application. -//! When statically configured, the interrupts must be explicitly -//! enabled in the NVIC through \ref IntEnable() before the processor can respond to the -//! interrupt (in addition to any interrupt enabling required within the peripheral). -//! Statically configuring the interrupt table provides the fastest -//! interrupt response time because the stacking operation (a write to SRAM) can be -//! performed in parallel with the interrupt handler table fetch (a read from -//! Flash), as well as the prefetch of the interrupt handler (assuming it is -//! also in Flash). +//! \section sec_interrupt_table Interrupt Vector Table //! -//! Alternatively, interrupts can be configured at runtime using (or the corresponding in each individual module API): -//! - \ref IntRegister() -//! - \ref IntUnregister() +//! The interrupt vector table can be configured in one of two ways: +//! - Statically (at compile time): Vector table is placed in Flash and each entry has a fixed +//! pointer to an interrupt handler (ISR). +//! - Dynamically (at runtime): Vector table is placed in SRAM and each entry can be changed +//! (registered or unregistered) at runtime. This allows a single interrupt to trigger different +//! interrupt handlers (ISRs) depending on which interrupt handler is registered at the time the +//! System CPU responds to the interrupt. //! -//! Registering an interrupt handler is a simple matter of inserting the handler address into the -//! table. By default, the table is filled with pointers to an internal handler -//! that loops forever; it is an error for an interrupt to occur when there is no -//! interrupt handler registered to process it. Therefore, interrupt sources -//! should not be enabled before a handler has been registered, and interrupt -//! sources should be disabled before a handler is unregistered. -//! When using \ref IntRegister(), the interrupt -//! must also be enabled as before; when using the function in each individual -//! function API, \ref IntEnable() is called by the driver and does not need to be called by -//! the application. -//! Run-time configuration of interrupts adds a small latency to the interrupt -//! response time because the stacking operation (a write to SRAM) and the -//! interrupt handler table fetch (a read from SRAM) must be performed +//! When configured, the interrupts must be explicitly enabled in the NVIC through \ref IntEnable() +//! before the CPU can respond to the interrupt (in addition to any interrupt enabling required +//! within the peripheral). +//! +//! \subsection sec_interrupt_table_static Static Vector Table +//! +//! Static registration of interrupt handlers is accomplished by editing the interrupt handler +//! table in the startup code of the application. Texas Instruments provides startup files for +//! each supported compiler ( \ti_code{startup_.c} ) and these startup files include +//! a default static interrupt vector table. +//! All entries, except ResetISR, are declared as \c extern with weak assignment to a default +//! interrupt handler. This allows the user to declare and define a function (in the user's code) +//! with the same name as an entry in the vector table. At compile time, the linker then replaces +//! the pointer to the default interrupt handler in the vector table with the pointer to the +//! interrupt handler defined by the user. +//! +//! Statically configuring the interrupt table provides the fastest interrupt response time +//! because the stacking operation (a write to SRAM on the data bus) is performed in parallel +//! with the interrupt handler table fetch (a read from Flash on the instruction bus), as well +//! as the prefetch of the interrupt handler (assuming it is also in Flash). +//! +//! \subsection sec_interrupt_table_dynamic Dynamic Vector Table +//! +//! Alternatively, interrupts can be registered in the vector table at runtime, thus dynamically. +//! The dynamic vector table is placed in SRAM and the code can then modify the pointers to +//! interrupt handlers throughout the application. +//! +//! DriverLib uses these two functions to modify the dynamic vector table: +//! - \ref IntRegister() : Write a pointer to an interrupt handler into the vector table. +//! - \ref IntUnregister() : Write pointer to default interrupt handler into the vector table. +//! +//! \note First call to \ref IntRegister() initializes the vector table in SRAM by copying the +//! static vector table from Flash and forcing the NVIC to use the dynamic vector table from +//! this point forward. If using the dynamic vector table it is highly recommended to +//! initialize it during the setup phase of the application. The NVIC uses the static vector +//! table in Flash until the application initializes the dynamic vector table in SRAM. +//! +//! Runtime configuration of interrupts adds a small latency to the interrupt response time +//! because the stacking operation (a write to SRAM on the data bus) and the interrupt handler +//! fetch from the vector table (a read from SRAM on the instruction bus) must be performed //! sequentially. //! -//! Run-time configuration of interrupt handlers requires that the interrupt -//! handler table is placed on a 1-kB boundary in SRAM (typically, this is +//! The dynamic vector table, \ref g_pfnRAMVectors, is placed in SRAM in the section called +//! \c vtable_ram which is a section defined in the linker file. By default the linker file +//! places this section at the start of the SRAM but this is configurable by the user. +//! +//! \warning Runtime configuration of interrupt handlers requires that the interrupt +//! handler table is placed on a 256-byte boundary in SRAM (typically, this is //! at the beginning of SRAM). Failure to do so results in an incorrect vector -//! address being fetched in response to an interrupt. The vector table is in a -//! section called \ti_code{vtable} and should be placed appropriately with a linker -//! script. +//! address being fetched in response to an interrupt. //! //! @} diff --git a/third_party/ti/devices/cc26x0/driverlib/ioc.c b/third_party/ti/devices/cc26x0/driverlib/ioc.c index 2ebf10e1f..1d449228a 100644 --- a/third_party/ti/devices/cc26x0/driverlib/ioc.c +++ b/third_party/ti/devices/cc26x0/driverlib/ioc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: ioc.c -* Revised: 2017-04-28 19:38:35 +0200 (Fri, 28 Apr 2017) -* Revision: 48864 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the IOC. * diff --git a/third_party/ti/devices/cc26x0/driverlib/ioc.h b/third_party/ti/devices/cc26x0/driverlib/ioc.h index c73fe54b1..78f7071ff 100644 --- a/third_party/ti/devices/cc26x0/driverlib/ioc.h +++ b/third_party/ti/devices/cc26x0/driverlib/ioc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: ioc.h -* Revised: 2017-05-04 16:35:28 +0200 (Thu, 04 May 2017) -* Revision: 48901 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the IO Controller. * @@ -687,11 +687,14 @@ extern void IOCIOPortIdSet(uint32_t ui32IOId, uint32_t ui32PortId); //***************************************************************************** // -//! \brief Register an interrupt handler for an IO edge interrupt. +//! \brief Register an interrupt handler for an IO edge interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! IO interrupts must be enabled via \ref IOCIntEnable(). It is the interrupt +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific IO interrupts must be enabled via \ref IOCIntEnable(). It is the interrupt //! handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the @@ -715,7 +718,7 @@ IOCIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a IO edge interrupt. +//! \brief Unregisters an interrupt handler for a IO edge interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when an IO edge interrupt occurs. diff --git a/third_party/ti/devices/cc26x0/driverlib/osc.c b/third_party/ti/devices/cc26x0/driverlib/osc.c index 504e80afc..a8f7a13b6 100644 --- a/third_party/ti/devices/cc26x0/driverlib/osc.c +++ b/third_party/ti/devices/cc26x0/driverlib/osc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: osc.c -* Revised: 2017-02-18 20:04:02 +0100 (Sat, 18 Feb 2017) -* Revision: 48484 +* Revised: 2017-07-19 09:27:07 +0200 (Wed, 19 Jul 2017) +* Revision: 49355 * * Description: Driver for setting up the system Oscillators * diff --git a/third_party/ti/devices/cc26x0/driverlib/osc.h b/third_party/ti/devices/cc26x0/driverlib/osc.h index 5490a3079..6a63f3b9b 100644 --- a/third_party/ti/devices/cc26x0/driverlib/osc.h +++ b/third_party/ti/devices/cc26x0/driverlib/osc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: osc.h -* Revised: 2017-02-18 20:04:02 +0100 (Sat, 18 Feb 2017) -* Revision: 48484 +* Revised: 2017-07-19 09:17:50 +0200 (Wed, 19 Jul 2017) +* Revision: 49354 * * Description: Defines and prototypes for the system oscillator control. * diff --git a/third_party/ti/devices/cc26x0/driverlib/prcm.c b/third_party/ti/devices/cc26x0/driverlib/prcm.c index 5b5e05c5e..5dba74406 100644 --- a/third_party/ti/devices/cc26x0/driverlib/prcm.c +++ b/third_party/ti/devices/cc26x0/driverlib/prcm.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: prcm.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-07-19 10:58:53 +0200 (Wed, 19 Jul 2017) +* Revision: 49363 * * Description: Driver for the PRCM. * diff --git a/third_party/ti/devices/cc26x0/driverlib/prcm.h b/third_party/ti/devices/cc26x0/driverlib/prcm.h index 352e16a62..b9285ad24 100644 --- a/third_party/ti/devices/cc26x0/driverlib/prcm.h +++ b/third_party/ti/devices/cc26x0/driverlib/prcm.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: prcm.h -* Revised: 2017-04-26 10:04:08 +0200 (Wed, 26 Apr 2017) -* Revision: 48836 +* Revised: 2017-07-28 15:52:43 +0200 (Fri, 28 Jul 2017) +* Revision: 49450 * * Description: Defines and prototypes for the PRCM * @@ -687,8 +687,7 @@ PRCMDomainDisable(uint32_t ui32Domains) //! The domains that can be turned on/off are: //! - \b PRCM_DOMAIN_RFCORE : RF Core //! - \b PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0 -//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, -//! DMA, UART1, I2C1 +//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1 //! - \b PRCM_DOMAIN_VIMS : SRAM, FLASH, ROM //! - \b PRCM_DOMAIN_SYSBUS //! - \b PRCM_DOMAIN_CPU @@ -711,8 +710,7 @@ extern void PRCMPowerDomainOn(uint32_t ui32Domains); //! The domains that can be turned on/off are: //! - \b PRCM_DOMAIN_RFCORE : RF Core //! - \b PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0 -//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, -//! DMA, UART1, I2C1 +//! - \b PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1 //! - \b PRCM_DOMAIN_VIMS : SRAM, FLASH, ROM //! - \b PRCM_DOMAIN_SYSBUS //! - \b PRCM_DOMAIN_CPU @@ -785,7 +783,7 @@ extern void PRCMPeripheralRunEnable(uint32_t ui32Peripheral); //***************************************************************************** // -//! Disables a peripheral in Run mode +//! \brief Disables a peripheral in Run mode //! //! Peripherals are disabled with this function. Once disabled, they will not //! operate or respond to register reads/writes. @@ -990,7 +988,7 @@ extern void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral); //! The parameter must be an OR'ed combination of one or several of: //! - \ref PRCM_DOMAIN_RFCORE : RF Core. //! - \ref PRCM_DOMAIN_SERIAL : SSI0, UART0, I2C0 -//! - \ref PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1, I2C1 +//! - \ref PRCM_DOMAIN_PERIPH : GPT0, GPT1, GPT2, GPT3, GPIO, SSI1, I2S, DMA, UART1 //! //! \return Returns status of the requested domains: //! - \ref PRCM_DOMAIN_POWER_ON : The specified domains are \b all powered up. diff --git a/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.c b/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.c index 3d12edd92..1a5235135 100644 --- a/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.c +++ b/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: pwr_ctrl.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Power Control driver. * diff --git a/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.h b/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.h index e65b42461..bb2624c13 100644 --- a/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.h +++ b/third_party/ti/devices/cc26x0/driverlib/pwr_ctrl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: pwr_ctrl.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the System Power Control. * diff --git a/third_party/ti/devices/cc26x0/driverlib/rf_ble_cmd.h b/third_party/ti/devices/cc26x0/driverlib/rf_ble_cmd.h index 2cbf6ba8b..169e3c01c 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rf_ble_cmd.h +++ b/third_party/ti/devices/cc26x0/driverlib/rf_ble_cmd.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_ble_cmd.h -* Revised: 2017-01-30 18:00:26 +0100 (Mon, 30 Jan 2017) -* Revision: 17599 +* Revised: 2017-07-05 16:17:29 +0200 (Wed, 05 Jul 2017) +* Revision: 17839 * -* Description: CC26x0/CC13x0 API for Bluetooth Low Energy commands +* Description: CC26x0 API for Bluetooth Low Energy commands * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x0/driverlib/rf_ble_mailbox.h b/third_party/ti/devices/cc26x0/driverlib/rf_ble_mailbox.h index 5f0777b34..f927d69a8 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rf_ble_mailbox.h +++ b/third_party/ti/devices/cc26x0/driverlib/rf_ble_mailbox.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_ble_mailbox.h -* Revised: $ $ -* Revision: $ $ +* Revised: 2017-08-28 10:10:48 +0200 (Mon, 28 Aug 2017) +* Revision: 17894 * * Description: Definitions for BLE interface * diff --git a/third_party/ti/devices/cc26x0/driverlib/rf_ieee_cmd.h b/third_party/ti/devices/cc26x0/driverlib/rf_ieee_cmd.h index 65dd90345..c62348250 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rf_ieee_cmd.h +++ b/third_party/ti/devices/cc26x0/driverlib/rf_ieee_cmd.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_ieee_cmd.h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: 2017-08-28 10:10:48 +0200 (Mon, 28 Aug 2017) +* Revision: 17894 * -* Description: CC26x0/CC13x0 API for IEEE 802.15.4 commands +* Description: CC26x0 API for IEEE 802.15.4 commands * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -513,8 +513,8 @@ struct __RFC_STRUCT rfc_CMD_IEEE_MOD_SRC_MATCH_s { uint8_t bEnable:1; //!< \brief 0: Disable entry
//!< 1: Enable entry uint8_t srcPend:1; //!< New value of the pending bit for the entry - uint8_t entryType:1; //!< \brief 0: Extended address
- //!< 1: Short address + uint8_t entryType:1; //!< \brief 0: Short address
+ //!< 1: Extended address } options; uint8_t entryNo; //!< Index of entry to enable or disable }; diff --git a/third_party/ti/devices/cc26x0/driverlib/rf_ieee_mailbox.h b/third_party/ti/devices/cc26x0/driverlib/rf_ieee_mailbox.h index 4f89ce32a..eedaa6060 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rf_ieee_mailbox.h +++ b/third_party/ti/devices/cc26x0/driverlib/rf_ieee_mailbox.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_ieee_mailbox.h -* Revised: $ $ -* Revision: $ $ +* Revised: 2017-08-28 10:10:48 +0200 (Mon, 28 Aug 2017) +* Revision: 17894 * * Description: Definitions for IEEE 802.15.4 interface * diff --git a/third_party/ti/devices/cc26x0/driverlib/rf_mailbox.h b/third_party/ti/devices/cc26x0/driverlib/rf_mailbox.h index 00a693944..e39c7c3bb 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rf_mailbox.h +++ b/third_party/ti/devices/cc26x0/driverlib/rf_mailbox.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_mailbox.h -* Revised: $ $ -* Revision: $ $ +* Revised: 2017-08-28 10:10:48 +0200 (Mon, 28 Aug 2017) +* Revision: 17894 * * Description: Definitions for interface between system and radio CPU * diff --git a/third_party/ti/devices/cc26x0/driverlib/rf_prop_mailbox.h b/third_party/ti/devices/cc26x0/driverlib/rf_prop_mailbox.h index 7a4f0cd1d..22a102202 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rf_prop_mailbox.h +++ b/third_party/ti/devices/cc26x0/driverlib/rf_prop_mailbox.h @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: rf_prop_mailbox.h -* Revised: $ $ -* Revision: $ $ +* Revised: 2017-08-28 10:10:48 +0200 (Mon, 28 Aug 2017) +* Revision: 17894 * -* Description: Definitions for probrietary mode radio interface +* Description: Definitions for proprietary mode radio interface * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x0/driverlib/rfc.c b/third_party/ti/devices/cc26x0/driverlib/rfc.c index 564048cee..4c49c02bb 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rfc.c +++ b/third_party/ti/devices/cc26x0/driverlib/rfc.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rfc.c -* Revised: 2017-05-05 10:41:25 +0200 (Fri, 05 May 2017) -* Revision: 48919 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the RF Core. * diff --git a/third_party/ti/devices/cc26x0/driverlib/rom.h b/third_party/ti/devices/cc26x0/driverlib/rom.h index e14661eb4..95526a8da 100644 --- a/third_party/ti/devices/cc26x0/driverlib/rom.h +++ b/third_party/ti/devices/cc26x0/driverlib/rom.h @@ -312,6 +312,10 @@ extern void SafeHapiAuxAdiSelect( FPTR_VOID_UINT8_T fPtr, uint8_t ut8Signal ); // FLASH FUNCTIONS +#define ROM_FlashPowerModeSet \ + ((void (*)(uint32_t ui32PowerMode, uint32_t ui32BankGracePeriod, uint32_t ui32PumpGracePeriod)) \ + ROM_API_FLASH_TABLE[0]) + #define ROM_FlashPowerModeGet \ ((uint32_t (*)(void)) \ ROM_API_FLASH_TABLE[1]) diff --git a/third_party/ti/devices/cc26x0/driverlib/setup.c b/third_party/ti/devices/cc26x0/driverlib/setup.c index 981e0b050..2ae2f0959 100644 --- a/third_party/ti/devices/cc26x0/driverlib/setup.c +++ b/third_party/ti/devices/cc26x0/driverlib/setup.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: setup.c -* Revised: 2017-05-04 22:07:49 +0200 (Thu, 04 May 2017) -* Revision: 48905 +* Revised: 2017-08-30 11:09:05 +0200 (Wed, 30 Aug 2017) +* Revision: 49664 * * Description: Setup file for CC13xx/CC26xx devices. * @@ -336,7 +336,6 @@ TrimAfterColdResetWakeupFromShutDown(uint32_t ui32Fcfg1Revision) NOROM_SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg ); #endif - // // Allow AUX to power down AUXWUCPowerCtrl( AUX_WUC_POWER_DOWN ); diff --git a/third_party/ti/devices/cc26x0/driverlib/setup_rom.c b/third_party/ti/devices/cc26x0/driverlib/setup_rom.c index 14afd2c36..250379731 100644 --- a/third_party/ti/devices/cc26x0/driverlib/setup_rom.c +++ b/third_party/ti/devices/cc26x0/driverlib/setup_rom.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: setup_rom.c -* Revised: 2017-05-04 22:39:45 +0200 (Thu, 04 May 2017) -* Revision: 48907 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Setup file for CC13xx/CC26xx devices. * diff --git a/third_party/ti/devices/cc26x0/driverlib/setup_rom.h b/third_party/ti/devices/cc26x0/driverlib/setup_rom.h index 2cea257b2..2f62dedac 100644 --- a/third_party/ti/devices/cc26x0/driverlib/setup_rom.h +++ b/third_party/ti/devices/cc26x0/driverlib/setup_rom.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: setup_rom.h -* Revised: 2017-04-04 12:19:11 +0200 (Tue, 04 Apr 2017) -* Revision: 48771 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Prototypes and defines for the setup API. * diff --git a/third_party/ti/devices/cc26x0/driverlib/ssi.h b/third_party/ti/devices/cc26x0/driverlib/ssi.h index ef38b30b1..21eacf8a6 100644 --- a/third_party/ti/devices/cc26x0/driverlib/ssi.h +++ b/third_party/ti/devices/cc26x0/driverlib/ssi.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: ssi.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and macros for the SSI. * @@ -412,11 +412,14 @@ SSIStatus(uint32_t ui32Base) //***************************************************************************** // -//! \brief Registers an interrupt handler for the synchronous serial port. +//! \brief Registers an interrupt handler for the Synchronous Serial Interface in the dynamic interrupt table. //! -//! This sets the handler to be called when an SSI interrupt -//! occurs. This will enable the global interrupt in the interrupt controller; -//! specific SSI interrupts must be enabled via \ref SSIIntEnable(). If necessary, +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific SSI interrupts must be enabled via \ref SSIIntEnable(). If necessary, //! it is the interrupt handler's responsibility to clear the interrupt source //! via \ref SSIIntClear(). //! @@ -434,7 +437,7 @@ extern void SSIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the synchronous serial port. +//! \brief Unregisters an interrupt handler for the Synchronous Serial Interface in the dynamic interrupt table. //! //! This function will clear the handler to be called when a SSI //! interrupt occurs. This will also mask off the interrupt in the interrupt diff --git a/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.c b/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.c index 19595035f..c2cc93629 100644 --- a/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.c +++ b/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: sys_ctrl.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-08-02 14:52:20 +0200 (Wed, 02 Aug 2017) +* Revision: 49471 * * Description: Driver for the System Control. * @@ -295,7 +295,7 @@ SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ) // //***************************************************************************** void -SysCtrlAdjustRechargeAfterPowerDown( void ) +SysCtrlAdjustRechargeAfterPowerDown( uint32_t vddrRechargeMargin ) { int32_t curTemp ; uint32_t longestRechargePeriod ; @@ -317,6 +317,17 @@ SysCtrlAdjustRechargeAfterPowerDown( void ) powerQualGlobals.pdTemp = curTemp; } + // Add some margin between the longest previous recharge period and the + // next initial recharge period. Since it is a fixed margin, it will have a + // higher impact as a fraction of the converged recharge period at higher temperatures + // where it is needed more due to higher leakage. + if (longestRechargePeriod > vddrRechargeMargin) { + longestRechargePeriod -= vddrRechargeMargin; + } + else { + longestRechargePeriod = 1; + } + //--- Spec. point 4 --- if ( longestRechargePeriod < powerQualGlobals.pdRechargePeriod ) { powerQualGlobals.pdRechargePeriod = longestRechargePeriod; diff --git a/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.h b/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.h index bceeb563f..1898e4229 100644 --- a/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.h +++ b/third_party/ti/devices/cc26x0/driverlib/sys_ctrl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: sys_ctrl.h -* Revised: 2017-01-31 10:31:33 +0100 (Tue, 31 Jan 2017) -* Revision: 48347 +* Revised: 2017-08-02 14:52:20 +0200 (Wed, 02 Aug 2017) +* Revision: 49471 * * Description: Defines and prototypes for the System Controller. * @@ -234,7 +234,7 @@ SysCtrlAonUpdate(void) extern void SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ); -//***************************************************************************** +///***************************************************************************** // //! \brief Adjust Recharge calculations to be used next. //! @@ -245,6 +245,9 @@ extern void SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ); //! optimal recharge controller settings next time (When //! \ref SysCtrlSetRechargeBeforePowerDown() is called next time). //! +//! \param vddrRechargeMargin margin in SCLK_LF periods to subtract from +//! previous longest recharge period experienced while in standby. +//! //! \note //! Special care must be taken to make sure that the AON registers read are //! updated after the wakeup. Writing to an AON register and then calling @@ -253,7 +256,7 @@ extern void SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ); //! \return None // //***************************************************************************** -extern void SysCtrlAdjustRechargeAfterPowerDown( void ); +extern void SysCtrlAdjustRechargeAfterPowerDown( uint32_t vddrRechargeMargin ); //***************************************************************************** @@ -281,7 +284,6 @@ extern void SysCtrl_DCDC_VoltageConditionalControl( void ); #define RSTSRC_PWR_ON (( AON_SYSCTL_RESETCTL_RESET_SRC_PWR_ON ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) #define RSTSRC_PIN_RESET (( AON_SYSCTL_RESETCTL_RESET_SRC_PIN_RESET ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) #define RSTSRC_VDDS_LOSS (( AON_SYSCTL_RESETCTL_RESET_SRC_VDDS_LOSS ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) -#define RSTSRC_VDD_LOSS (( AON_SYSCTL_RESETCTL_RESET_SRC_VDD_LOSS ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) #define RSTSRC_VDDR_LOSS (( AON_SYSCTL_RESETCTL_RESET_SRC_VDDR_LOSS ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) #define RSTSRC_CLK_LOSS (( AON_SYSCTL_RESETCTL_RESET_SRC_CLK_LOSS ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) #define RSTSRC_SYSRESET (( AON_SYSCTL_RESETCTL_RESET_SRC_SYSRESET ) >> ( AON_SYSCTL_RESETCTL_RESET_SRC_S )) diff --git a/third_party/ti/devices/cc26x0/driverlib/systick.h b/third_party/ti/devices/cc26x0/driverlib/systick.h index 8e7029c20..a70702c31 100644 --- a/third_party/ti/devices/cc26x0/driverlib/systick.h +++ b/third_party/ti/devices/cc26x0/driverlib/systick.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: systick.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Prototypes for the SysTick driver. * @@ -117,9 +117,12 @@ SysTickDisable(void) //***************************************************************************** // -//! \brief Registers an interrupt handler for the SysTick interrupt. +//! \brief Registers an interrupt handler for the SysTick interrupt in the dynamic interrupt table. //! -//! This sets the handler to be called when a SysTick interrupt occurs. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. //! //! \param pfnHandler is a pointer to the function to be called when the //! SysTick interrupt occurs. @@ -142,7 +145,7 @@ SysTickIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters the interrupt handler for the SysTick interrupt. +//! \brief Unregisters the interrupt handler for the SysTick interrupt in the dynamic interrupt table. //! //! This function will clear the handler to be called when a SysTick interrupt //! occurs. diff --git a/third_party/ti/devices/cc26x0/driverlib/timer.h b/third_party/ti/devices/cc26x0/driverlib/timer.h index bd43eeab1..d34e6ce32 100644 --- a/third_party/ti/devices/cc26x0/driverlib/timer.h +++ b/third_party/ti/devices/cc26x0/driverlib/timer.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: timer.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -792,13 +792,16 @@ TimerMatchGet(uint32_t ui32Base, uint32_t ui32Timer) //***************************************************************************** // -//! \brief Registers an interrupt handler for the timer interrupt. +//! \brief Registers an interrupt handler for the timer interrupt in the dynamic interrupt table. //! -//! This function registers the handler to be called when a timer interrupt -//! occurs. In addition, this function enables the global interrupt in the -//! interrupt controller; specific timer interrupts must be enabled via -//! \ref TimerIntEnable(). It is the interrupt handler's responsibility to clear -//! the interrupt source via \ref TimerIntClear(). +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific timer interrupts must be enabled via \ref TimerIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source via +//! \ref TimerIntClear(). //! //! \param ui32Base is the base address of the timer module. //! \param ui32Timer specifies the timer(s); must be one of: @@ -819,7 +822,7 @@ extern void TimerIntRegister(uint32_t ui32Base, uint32_t ui32Timer, //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the timer interrupt. +//! \brief Unregisters an interrupt handler for the timer interrupt in the dynamic interrupt table. //! //! This function unregisters the handler to be called when a timer interrupt //! occurs. This function also masks off the interrupt in the interrupt diff --git a/third_party/ti/devices/cc26x0/driverlib/trng.h b/third_party/ti/devices/cc26x0/driverlib/trng.h index 19c7c4e50..2a2f047cd 100644 --- a/third_party/ti/devices/cc26x0/driverlib/trng.h +++ b/third_party/ti/devices/cc26x0/driverlib/trng.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: trng.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the true random number gen. * @@ -359,15 +359,18 @@ TRNGIntClear(uint32_t ui32IntFlags) //***************************************************************************** // -//! \brief Registers an interrupt handler for a TRNG interrupt. +//! \brief Registers an interrupt handler for a TRNG interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via \ref TRNGIntEnable(). It is the interrupt +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific TRNG interrupts must be enabled via \ref TRNGIntEnable(). It is the interrupt //! handler's responsibility to clear the interrupt source. //! //! \param pfnHandler is a pointer to the function to be called when the -//! UART interrupt occurs. +//! TRNG interrupt occurs. //! //! \return None //! @@ -387,7 +390,7 @@ TRNGIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a TRNG interrupt. +//! \brief Unregisters an interrupt handler for a TRNG interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a Crypto interrupt occurs. This diff --git a/third_party/ti/devices/cc26x0/driverlib/uart.c b/third_party/ti/devices/cc26x0/driverlib/uart.c index 0d95d6c93..10e41c5f0 100644 --- a/third_party/ti/devices/cc26x0/driverlib/uart.c +++ b/third_party/ti/devices/cc26x0/driverlib/uart.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: uart.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the UART. * diff --git a/third_party/ti/devices/cc26x0/driverlib/uart.h b/third_party/ti/devices/cc26x0/driverlib/uart.h index 1ac547902..769374302 100644 --- a/third_party/ti/devices/cc26x0/driverlib/uart.h +++ b/third_party/ti/devices/cc26x0/driverlib/uart.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: uart.h -* Revised: 2016-11-21 13:43:38 +0100 (Mon, 21 Nov 2016) -* Revision: 47731 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Defines and prototypes for the UART. * @@ -673,14 +673,17 @@ UARTBreakCtl(uint32_t ui32Base, bool bBreakState) //***************************************************************************** // -//! \brief Registers an interrupt handler for a UART interrupt. +//! \brief Registers an interrupt handler for a UART interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function enables the global interrupt in the interrupt controller; specific -//! UART interrupts must be enabled via \ref UARTIntEnable(). It is the interrupt -//! handler's responsibility to clear the interrupt source. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! //! -//! \param ui32Base is the base address of the UART port. +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! Specific UART interrupts must be enabled via \ref UARTIntEnable(). It is the +//! interrupt handler's responsibility to clear the interrupt source. +//! +//! \param ui32Base is the base address of the UART module. //! \param pfnHandler is a pointer to the function to be called when the //! UART interrupt occurs. //! @@ -694,14 +697,14 @@ extern void UARTIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)); //***************************************************************************** // -//! \brief Unregisters an interrupt handler for a UART interrupt. +//! \brief Unregisters an interrupt handler for a UART interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. It //! clears the handler to be called when a UART interrupt occurs. This //! function also masks off the interrupt in the interrupt controller so that //! the interrupt handler no longer is called. //! -//! \param ui32Base is the base address of the UART port. +//! \param ui32Base is the base address of the UART module. //! //! \return None //! diff --git a/third_party/ti/devices/cc26x0/driverlib/udma.h b/third_party/ti/devices/cc26x0/driverlib/udma.h index 2bbbbfd72..510691b29 100644 --- a/third_party/ti/devices/cc26x0/driverlib/udma.h +++ b/third_party/ti/devices/cc26x0/driverlib/udma.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: udma.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the uDMA controller. * @@ -904,21 +904,23 @@ extern uint32_t uDMAChannelModeGet(uint32_t ui32Base, //***************************************************************************** // -//! \brief Registers an interrupt handler for the uDMA controller. +//! \brief Registers an interrupt handler for the uDMA controller in the dynamic interrupt table. //! -//! This sets and enables the handler to be called when the uDMA controller -//! generates an interrupt. +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. //! //! \note The interrupt handler for uDMA is for transfer completion when the -//! software channel is used, and for error interrupts. The -//! interrupts for each peripheral channel are handled through the individual -//! peripheral interrupt handlers. +//! software channel is used, and for error interrupts. The interrupts for each +//! peripheral channel are handled through the individual peripheral interrupt +//! handlers. //! -//! \param ui32Base is the base address of the uDMA port. -//! \param ui32IntChannel identifies which uDMA interrupt is to be registered. -//! - \b INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts +//! \param ui32Base is the base address of the uDMA module. +//! \param ui32IntChannel specifies which uDMA interrupt is to be registered. +//! - \c INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts //! from the uDMA software channel. -//! - \b INT_DMA_ERR : Register an interrupt handler to process uDMA error +//! - \c INT_DMA_ERR : Register an interrupt handler to process uDMA error //! interrupts. //! \param pfnHandler is a pointer to the function to be called when the //! interrupt is activated. @@ -947,16 +949,16 @@ uDMAIntRegister(uint32_t ui32Base, uint32_t ui32IntChannel, //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the uDMA controller. +//! \brief Unregisters an interrupt handler for the uDMA controller in the dynamic interrupt table. //! //! This function will disable and clear the handler to be called for the //! specified uDMA interrupt. //! -//! \param ui32Base is the base address of the uDMA port. -//! \param ui32IntChannel identifies which uDMA interrupt to unregister. -//! - \b INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts +//! \param ui32Base is the base address of the uDMA module. +//! \param ui32IntChannel specifies which uDMA interrupt to unregister. +//! - \c INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts //! from the uDMA software channel. -//! - \b INT_DMA_ERR : Register an interrupt handler to process uDMA error +//! - \c INT_DMA_ERR : Register an interrupt handler to process uDMA error //! interrupts. //! //! \return None diff --git a/third_party/ti/devices/cc26x0/driverlib/vims.c b/third_party/ti/devices/cc26x0/driverlib/vims.c index 7f24037fd..42cc2da73 100644 --- a/third_party/ti/devices/cc26x0/driverlib/vims.c +++ b/third_party/ti/devices/cc26x0/driverlib/vims.c @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: vims.c -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Description: Driver for the VIMS. * diff --git a/third_party/ti/devices/cc26x0/driverlib/watchdog.h b/third_party/ti/devices/cc26x0/driverlib/watchdog.h index d32657365..3d8de3684 100644 --- a/third_party/ti/devices/cc26x0/driverlib/watchdog.h +++ b/third_party/ti/devices/cc26x0/driverlib/watchdog.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: wdt.h -* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016) -* Revision: 47343 +* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017) +* Revision: 49048 * * Description: Defines and prototypes for the Watchdog Timer. * @@ -298,11 +298,14 @@ WatchdogValueGet(void) //***************************************************************************** // -//! \brief Registers an interrupt handler for the watchdog timer interrupt. +//! \brief Registers an interrupt handler for the watchdog timer interrupt in the dynamic interrupt table. //! -//! This function does the actual registering of the interrupt handler. This -//! function also enables the global interrupt in the interrupt controller; the -//! watchdog timer interrupt must be enabled via \ref WatchdogIntEnable(). It is the +//! \note Only use this function if you want to use the dynamic vector table (in SRAM)! +//! +//! This function registers a function as the interrupt handler for a specific +//! interrupt and enables the corresponding interrupt in the interrupt controller. +//! +//! The watchdog timer interrupt must be enabled via \ref WatchdogIntEnable(). It is the //! interrupt handler's responsibility to clear the interrupt source via //! \ref WatchdogIntClear(). //! @@ -331,7 +334,7 @@ WatchdogIntRegister(void (*pfnHandler)(void)) //***************************************************************************** // -//! \brief Unregisters an interrupt handler for the watchdog timer interrupt. +//! \brief Unregisters an interrupt handler for the watchdog timer interrupt in the dynamic interrupt table. //! //! This function does the actual unregistering of the interrupt handler. This //! function clears the handler to be called when a watchdog timer interrupt diff --git a/third_party/ti/devices/cc26x0/inc/hw_aux_aiodio.h b/third_party/ti/devices/cc26x0/inc/hw_aux_aiodio.h index bda1d0c0b..d102f6ff5 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_aux_aiodio.h +++ b/third_party/ti/devices/cc26x0/inc/hw_aux_aiodio.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_aiodio_h -* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017) -* Revision: 48345 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -43,7 +43,7 @@ // AUX_AIODIO component // //***************************************************************************** -// General Purpose Input/Output Data Out +// General Purpose Input Output Data Out #define AUX_AIODIO_O_GPIODOUT 0x00000000 // Input Output Mode @@ -61,7 +61,7 @@ // General Purpose Input Output Data Out Toggle #define AUX_AIODIO_O_GPIODOUTTGL 0x00000014 -// General Purpose Input Output Input Enable +// General Purpose Input Output Digital Input Enable #define AUX_AIODIO_O_GPIODIE 0x00000018 //***************************************************************************** @@ -71,8 +71,8 @@ //***************************************************************************** // Field: [7:0] IO7_0 // -// Output values for AUXIO0 through AUXIO7 (for AIODIO0) or AUXIO8 through -// AUXIO15 (for AIODIO1). +// Write 1 to bit index n in this bit vector to set AUXIO[8i+n]. +// Write 0 to bit index n in this bit vector to clear AUXIO[8i+n]. #define AUX_AIODIO_GPIODOUT_IO7_0_W 8 #define AUX_AIODIO_GPIODOUT_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODOUT_IO7_0_S 0 @@ -84,20 +84,36 @@ //***************************************************************************** // Field: [15:14] IO7 // -// Selects mode for AUXIO7 (for AIODIO0) or AUXIO15 (for AIODIO1). +// Select mode for AUXIO[8i+7]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 7 = 1 -// Analog input/output with -// GPIODIE bit 7 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 7 is 0: +// AUXIO[8i+7] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 7 is 1: +// AUXIO[8i+7] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 7 is 0: +// AUXIO[8i+7] is driven low. +// +// When GPIODOUT bit 7 is 1: +// AUXIO[8i+7] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 7 is 0: +// AUXIO[8i+7] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 7 is 1: +// AUXIO[8i+7] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 7 drives +// AUXIO[8i+7]. #define AUX_AIODIO_IOMODE_IO7_W 2 #define AUX_AIODIO_IOMODE_IO7_M 0x0000C000 #define AUX_AIODIO_IOMODE_IO7_S 14 @@ -108,20 +124,36 @@ // Field: [13:12] IO6 // -// Selects mode for AUXIO6 (for AIODIO0) or AUXIO14 (for AIODIO1). +// Select mode for AUXIO[8i+6]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 6 = 1 -// Analog input/output with -// GPIODIE bit 6 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 6 is 0: +// AUXIO[8i+6] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 6 is 1: +// AUXIO[8i+6] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 6 is 0: +// AUXIO[8i+6] is driven low. +// +// When GPIODOUT bit 6 is 1: +// AUXIO[8i+6] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 6 is 0: +// AUXIO[8i+6] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 6 is 1: +// AUXIO[8i+6] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 6 drives +// AUXIO[8i+6]. #define AUX_AIODIO_IOMODE_IO6_W 2 #define AUX_AIODIO_IOMODE_IO6_M 0x00003000 #define AUX_AIODIO_IOMODE_IO6_S 12 @@ -132,20 +164,36 @@ // Field: [11:10] IO5 // -// Selects mode for AUXIO5 (for AIODIO0) or AUXIO13 (for AIODIO1). +// Select mode for AUXIO[8i+5]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 5 = 1 -// Analog input/output with -// GPIODIE bit 5 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 5 is 0: +// AUXIO[8i+5] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 5 is 1: +// AUXIO[8i+5] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 5 is 0: +// AUXIO[8i+5] is driven low. +// +// When GPIODOUT bit 5 is 1: +// AUXIO[8i+5] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 5 is 0: +// AUXIO[8i+5] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 5 is 1: +// AUXIO[8i+5] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 5 drives +// AUXIO[8i+5]. #define AUX_AIODIO_IOMODE_IO5_W 2 #define AUX_AIODIO_IOMODE_IO5_M 0x00000C00 #define AUX_AIODIO_IOMODE_IO5_S 10 @@ -156,20 +204,36 @@ // Field: [9:8] IO4 // -// Selects mode for AUXIO4 (for AIODIO0) or AUXIO12 (for AIODIO1). +// Select mode for AUXIO[8i+4]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 4 = 1 -// Analog input/output with -// GPIODIE bit 4 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 4 is 0: +// AUXIO[8i+4] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 4 is 1: +// AUXIO[8i+4] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 4 is 0: +// AUXIO[8i+4] is driven low. +// +// When GPIODOUT bit 4 is 1: +// AUXIO[8i+4] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 4 is 0: +// AUXIO[8i+4] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 4 is 1: +// AUXIO[8i+4] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 4 drives +// AUXIO[8i+4]. #define AUX_AIODIO_IOMODE_IO4_W 2 #define AUX_AIODIO_IOMODE_IO4_M 0x00000300 #define AUX_AIODIO_IOMODE_IO4_S 8 @@ -180,20 +244,36 @@ // Field: [7:6] IO3 // -// Selects mode for AUXIO3 (for AIODIO0) or AUXIO11 (for AIODIO1). +// Select mode for AUXIO[8i+3]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 3 = 1 -// Analog input/output with -// GPIODIE bit 3 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 3 is 0: +// AUXIO[8i+3] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 3 is 1: +// AUXIO[8i+3] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 3 is 0: +// AUXIO[8i+3] is driven low. +// +// When GPIODOUT bit 3 is 1: +// AUXIO[8i+3] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 3 is 0: +// AUXIO[8i+3] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 3 is 1: +// AUXIO[8i+3] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 3 drives +// AUXIO[8i+3]. #define AUX_AIODIO_IOMODE_IO3_W 2 #define AUX_AIODIO_IOMODE_IO3_M 0x000000C0 #define AUX_AIODIO_IOMODE_IO3_S 6 @@ -204,20 +284,36 @@ // Field: [5:4] IO2 // -// Selects mode for AUXIO2 (for AIODIO0) or AUXIO10 (for AIODIO1). +// Select mode for AUXIO[8i+2]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 2 = 1 -// Analog input/output with -// GPIODIE bit 2 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 2 is 0: +// AUXIO[8i+2] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 2 is 1: +// AUXIO[8i+2] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 2 is 0: +// AUXIO[8i+2] is driven low. +// +// When GPIODOUT bit 2 is 1: +// AUXIO[8i+2] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 2 is 0: +// AUXIO[8i+2] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 2 is 1: +// AUXIO[8i+2] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 2 drives +// AUXIO[8i+2]. #define AUX_AIODIO_IOMODE_IO2_W 2 #define AUX_AIODIO_IOMODE_IO2_M 0x00000030 #define AUX_AIODIO_IOMODE_IO2_S 4 @@ -228,20 +324,36 @@ // Field: [3:2] IO1 // -// Selects mode for AUXIO1 (for AIODIO0) or AUXIO9 (for AIODIO1). +// Select mode for AUXIO[8i+1]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 1 = 1 -// Analog input/output with -// GPIODIE bit 1 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 1 is 0: +// AUXIO[8i+1] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 1 is 1: +// AUXIO[8i+1] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 1 is 0: +// AUXIO[8i+1] is driven low. +// +// When GPIODOUT bit 1 is 1: +// AUXIO[8i+1] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 1 is 0: +// AUXIO[8i+1] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 1 is 1: +// AUXIO[8i+1] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 1 drives +// AUXIO[8i+1]. #define AUX_AIODIO_IOMODE_IO1_W 2 #define AUX_AIODIO_IOMODE_IO1_M 0x0000000C #define AUX_AIODIO_IOMODE_IO1_S 2 @@ -252,20 +364,36 @@ // Field: [1:0] IO0 // -// Selects mode for AUXIO0 (for AIODIO0) or AUXIO8 (for AIODIO1). +// Select mode for AUXIO[8i+0]. // ENUMs: -// OPEN_SOURCE Open-source: The pin is driven high when the -// corresponding GPIODOUT bit is 1, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// OPEN_DRAIN Open-drain: The pin is driven low when the -// corresponding GPIODOUT bit is 0, and otherwise -// tri-stated or pulled depending on the -// corresponding IOC configuration. -// IN Digital input with GPIODIE bit 0 = 1 -// Analog input/output with -// GPIODIE bit 0 = 0 -// OUT Output +// OPEN_SOURCE Open-Source Mode: +// +// When GPIODOUT bit 0 is 0: +// AUXIO[8i+0] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// +// When GPIODOUT bit 0 is 1: +// AUXIO[8i+0] is driven high. +// OPEN_DRAIN Open-Drain Mode: +// +// When GPIODOUT bit 0 is 0: +// AUXIO[8i+0] is driven low. +// +// When GPIODOUT bit 0 is 1: +// AUXIO[8i+0] is tri-stated or pulled. This +// depends on IOC:IOCFGn.PULL_CTL. +// IN Input Mode: +// +// When GPIODIE bit 0 is 0: +// AUXIO[8i+0] is enabled for analog signal +// transfer. +// +// When GPIODIE bit 0 is 1: +// AUXIO[8i+0] is enabled for digital input. +// OUT Output Mode: +// +// GPIODOUT bit 0 drives +// AUXIO[8i+0]. #define AUX_AIODIO_IOMODE_IO0_W 2 #define AUX_AIODIO_IOMODE_IO0_M 0x00000003 #define AUX_AIODIO_IOMODE_IO0_S 0 @@ -281,8 +409,8 @@ //***************************************************************************** // Field: [7:0] IO7_0 // -// Input values for AUXIO0 through AUXIO7 (for AIODIO0) or AUXIO8 through -// AUXIO15 (for AIODIO1). +// Bit n in this bit vector contains the value for AUXIO[8i+n] when GPIODIE bit +// n is set. Otherwise, bit n value is old. #define AUX_AIODIO_GPIODIN_IO7_0_W 8 #define AUX_AIODIO_GPIODIN_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODIN_IO7_0_S 0 @@ -294,10 +422,9 @@ //***************************************************************************** // Field: [7:0] IO7_0 // -// Writing 1(s) to one or more bit positions sets the corresponding bit(s) in -// GPIODOUT. +// Write 1 to bit index n in this bit vector to set GPIODOUT bit n. // -// Read value is 0x00. +// Read value is 0. #define AUX_AIODIO_GPIODOUTSET_IO7_0_W 8 #define AUX_AIODIO_GPIODOUTSET_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODOUTSET_IO7_0_S 0 @@ -309,10 +436,9 @@ //***************************************************************************** // Field: [7:0] IO7_0 // -// Writing 1(s) to one or more bit positions clears the corresponding bit(s) in -// GPIODOUT. +// Write 1 to bit index n in this bit vector to clear GPIODOUT bit n. // -// Read value is 0x00. +// Read value is 0. #define AUX_AIODIO_GPIODOUTCLR_IO7_0_W 8 #define AUX_AIODIO_GPIODOUTCLR_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODOUTCLR_IO7_0_S 0 @@ -324,10 +450,9 @@ //***************************************************************************** // Field: [7:0] IO7_0 // -// Writing 1(s) to one or more bit positions toggles the corresponding bit(s) -// in GPIODOUT. +// Write 1 to bit index n in this bit vector to toggle GPIODOUT bit n. // -// Read value is 0x00. +// Read value is 0. #define AUX_AIODIO_GPIODOUTTGL_IO7_0_W 8 #define AUX_AIODIO_GPIODOUTTGL_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODOUTTGL_IO7_0_S 0 @@ -339,12 +464,15 @@ //***************************************************************************** // Field: [7:0] IO7_0 // -// Enables (1) or disables (0) digital input buffers for each AUX I/O pin. +// Write 1 to bit index n in this bit vector to enable digital input buffer for +// AUXIO[8i+n]. +// Write 0 to bit index n in this bit vector to disable digital input buffer +// for AUXIO[8i+n]. // -// Input buffers must be enabled to allow reading pin values through GPIODIN. -// -// Input buffers must be disabled for analog input or floating pins to avoid -// current leakage. +// You must enable the digital input buffer for AUXIO[8i+n] to read the pin +// value in GPIODIN. +// You must disable the digital input buffer for analog input or pins that +// float to avoid current leakage. #define AUX_AIODIO_GPIODIE_IO7_0_W 8 #define AUX_AIODIO_GPIODIE_IO7_0_M 0x000000FF #define AUX_AIODIO_GPIODIE_IO7_0_S 0 diff --git a/third_party/ti/devices/cc26x0/inc/hw_aux_anaif.h b/third_party/ti/devices/cc26x0/inc/hw_aux_anaif.h index 1d0b342e1..5a75caca6 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_aux_anaif.h +++ b/third_party/ti/devices/cc26x0/inc/hw_aux_anaif.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_anaif_h -* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017) -* Revision: 48345 +* Revised: 2017-05-30 11:42:02 +0200 (Tue, 30 May 2017) +* Revision: 49074 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -65,10 +65,10 @@ //***************************************************************************** // Field: [13] START_POL // -// Selected active edge for start event / Selected polarity for start event +// Select active polarity for START_SRC event. // ENUMs: -// FALL Start on falling edge of event -// RISE Start on rising edge of event +// FALL Set ADC trigger on falling edge of event source. +// RISE Set ADC trigger on rising edge of event source. #define AUX_ANAIF_ADCCTL_START_POL 0x00002000 #define AUX_ANAIF_ADCCTL_START_POL_BITN 13 #define AUX_ANAIF_ADCCTL_START_POL_M 0x00002000 @@ -78,43 +78,43 @@ // Field: [12:8] START_SRC // -// Selected source for ADC conversion start event. The start source selected by -// this field is OR'ed with any trigger coming from writes to ADCTRIG.START. If -// it is desired to only trigger ADC conversions by writes to ADCTRIG.START one -// should select NO_EVENT here +// Select ADC trigger event source from the asynchronous AUX event bus. +// +// Set START_SRC to NO_EVENT if you want to trigger the ADC manually through +// ADCTRIG.START. // ENUMs: -// ADC_IRQ Selects ADC_IRQ as start signal -// MCU_EV Selects MCU_EV as start signal -// ACLK_REF Selects ACLK_REF as start signal -// AUXIO15 Selects AUXIO15 as start signal -// AUXIO14 Selects AUXIO14 as start signal -// AUXIO13 Selects AUXIO13 as start signal -// AUXIO12 Selects AUXIO12 as start signal -// AUXIO11 Selects AUXIO11 as start signal -// AUXIO10 Selects AUXIO10 as start signal -// AUXIO9 Selects AUXIO9 as start signal -// AUXIO8 Selects AUXIO8 as start signal -// AUXIO7 Selects AUXIO7 as start signal -// AUXIO6 Selects AUXIO6 as start signal -// AUXIO5 Selects AUXIO5 as start signal -// AUXIO4 Selects AUXIO4 as start signal -// AUXIO3 Selects AUXIO3 as start signal -// AUXIO2 Selects AUXIO2 as start signal -// AUXIO1 Selects AUXIO1 as start signal -// AUXIO0 Selects AUXIO0 as start signal -// AON_PROG_WU Selects AON_PROG_WU as start signal -// AON_SW Selects AON_SW as start signal -// NO_EVENT1 No event selected -// NO_EVENT0 No event selected -// RESERVED1 Reserved do not use -// RESERVED0 Reserved do not use -// SMPH_AUTOTAKE_DONE Selects SMPH_AUTOTAKE_DONE as start signal -// TIMER1_EV Selects TIMER1_EV as start signal -// TIMER0_EV Selects TIMER0_EV as start signal -// TDC_DONE Selects TDC_DONE as start signal -// AUX_COMPB Selects AUX_COMPB as start signal -// AUX_COMPA Selects AUX_COMPA as start signal -// RTC_CH2_EV Selects RTC_CH2_EV as start signal +// ADC_IRQ AUX_EVCTL:EVSTAT1.ADC_IRQ +// MCU_EV AUX_EVCTL:EVSTAT1.MCU_EV +// ACLK_REF AUX_EVCTL:EVSTAT1.ACLK_REF +// AUXIO15 AUX_EVCTL:EVSTAT1.AUXIO15 +// AUXIO14 AUX_EVCTL:EVSTAT1.AUXIO14 +// AUXIO13 AUX_EVCTL:EVSTAT1.AUXIO13 +// AUXIO12 AUX_EVCTL:EVSTAT1.AUXIO12 +// AUXIO11 AUX_EVCTL:EVSTAT1.AUXIO11 +// AUXIO10 AUX_EVCTL:EVSTAT1.AUXIO10 +// AUXIO9 AUX_EVCTL:EVSTAT1.AUXIO9 +// AUXIO8 AUX_EVCTL:EVSTAT1.AUXIO8 +// AUXIO7 AUX_EVCTL:EVSTAT1.AUXIO7 +// AUXIO6 AUX_EVCTL:EVSTAT1.AUXIO6 +// AUXIO5 AUX_EVCTL:EVSTAT1.AUXIO5 +// AUXIO4 AUX_EVCTL:EVSTAT1.AUXIO4 +// AUXIO3 AUX_EVCTL:EVSTAT1.AUXIO3 +// AUXIO2 AUX_EVCTL:EVSTAT0.AUXIO2 +// AUXIO1 AUX_EVCTL:EVSTAT0.AUXIO1 +// AUXIO0 AUX_EVCTL:EVSTAT0.AUXIO0 +// AON_PROG_WU AUX_EVCTL:EVSTAT0.AON_PROG_WU +// AON_SW AUX_EVCTL:EVSTAT0.AON_SW +// NO_EVENT1 No event. +// NO_EVENT0 No event. +// RESERVED1 Reserved - Do not use. +// RESERVED0 Reserved - Do not use. +// SMPH_AUTOTAKE_DONE AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV AUX_EVCTL:EVSTAT0.TIMER1_EV +// TIMER0_EV AUX_EVCTL:EVSTAT0.TIMER0_EV +// TDC_DONE AUX_EVCTL:EVSTAT0.TDC_DONE +// AUX_COMPB AUX_EVCTL:EVSTAT0.AUX_COMPB +// AUX_COMPA AUX_EVCTL:EVSTAT0.AUX_COMPA +// RTC_CH2_EV AUX_EVCTL:EVSTAT0.AON_RTC_CH2 #define AUX_ANAIF_ADCCTL_START_SRC_W 5 #define AUX_ANAIF_ADCCTL_START_SRC_M 0x00001F00 #define AUX_ANAIF_ADCCTL_START_SRC_S 8 @@ -153,14 +153,20 @@ // Field: [1:0] CMD // -// ADC interface control command +// ADC interface command. +// +// Non-enumerated values are not supported. The written value is returned when +// read. // ENUMs: -// FLUSH ADC FIFO flush. Note that CMD needs to be set to -// 'EN' again for FIFO to be functional after a -// flush. A flush takes two clock periods on the -// AUX clock to finish. -// EN ADC interface enabled -// DIS ADC interface disabled +// FLUSH Flush ADC FIFO. +// +// You must set CMD to EN or +// DIS after flush. +// +// System CPU must wait two +// clock cycles before it sets CMD to EN or DIS. +// EN Enable ADC interface. +// DIS Disable ADC interface. #define AUX_ANAIF_ADCCTL_CMD_W 2 #define AUX_ANAIF_ADCCTL_CMD_M 0x00000003 #define AUX_ANAIF_ADCCTL_CMD_S 0 @@ -178,7 +184,10 @@ // FIFO overflow flag. // // 0: FIFO has not overflowed. -// 1: FIFO has overflowed, this flag is sticky until FIFO is flushed. +// 1: FIFO has overflowed, this flag is sticky until you flush the FIFO. +// +// When the flag is set, the ADC FIFO write pointer is static. It is not +// possible to add more samples to the ADC FIFO. Flush FIFO to clear the flag. #define AUX_ANAIF_ADCFIFOSTAT_OVERFLOW 0x00000010 #define AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_BITN 4 #define AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_M 0x00000010 @@ -188,8 +197,11 @@ // // FIFO underflow flag. // -// 0: FIFO has not underflowed -// 1: FIFO has underflowed, this flag is sticky until the FIFO is flushed +// 0: FIFO has not underflowed. +// 1: FIFO has underflowed, this flag is sticky until you flush the FIFO. +// +// When the flag is set, the ADC FIFO read pointer is static. Read returns the +// previous sample that was read. Flush FIFO to clear the flag. #define AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW 0x00000008 #define AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_BITN 3 #define AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_M 0x00000008 @@ -199,8 +211,11 @@ // // FIFO full flag. // -// 0: FIFO is not full, i.e. there is less than 4 samples in the FIFO. -// 1: FIFO is full, i.e. there are 4 samples in the FIFO +// 0: FIFO is not full, there is less than 4 samples in the FIFO. +// 1: FIFO is full, there are 4 samples in the FIFO. +// +// When the flag is set, it is not possible to add more samples to the ADC +// FIFO. An attempt to add samples sets the OVERFLOW flag. #define AUX_ANAIF_ADCFIFOSTAT_FULL 0x00000004 #define AUX_ANAIF_ADCFIFOSTAT_FULL_BITN 2 #define AUX_ANAIF_ADCFIFOSTAT_FULL_M 0x00000004 @@ -210,9 +225,9 @@ // // FIFO almost full flag. // -// 0: There is less than 3 samples in the FIFO, or the FIFO is full in which -// case the FULL flag is asserted -// 1: There are 3 samples in the FIFO, i.e. there is room for one more sample +// 0: There are less than 3 samples in the FIFO, or the FIFO is full. The FULL +// flag is also asserted in the latter case. +// 1: There are 3 samples in the FIFO, there is room for one more sample. #define AUX_ANAIF_ADCFIFOSTAT_ALMOST_FULL 0x00000002 #define AUX_ANAIF_ADCFIFOSTAT_ALMOST_FULL_BITN 1 #define AUX_ANAIF_ADCFIFOSTAT_ALMOST_FULL_M 0x00000002 @@ -222,8 +237,11 @@ // // FIFO empty flag. // -// 0: FIFO contains one or more samples -// 1: FIFO is empty +// 0: FIFO contains one or more samples. +// 1: FIFO is empty. +// +// When the flag is set, read returns the previous sample that was read and +// sets the UNDERFLOW flag. #define AUX_ANAIF_ADCFIFOSTAT_EMPTY 0x00000001 #define AUX_ANAIF_ADCFIFOSTAT_EMPTY_BITN 0 #define AUX_ANAIF_ADCFIFOSTAT_EMPTY_M 0x00000001 @@ -236,8 +254,14 @@ //***************************************************************************** // Field: [11:0] DATA // -// FIFO is popped when read. Data is pushed into FIFO when written. Writing is -// intended for debugging/code development purposes +// FIFO data. +// +// Read: +// Get oldest ADC sample from FIFO. +// +// Write: +// Write dummy sample to FIFO. This is useful for code development when you do +// not have real ADC samples. #define AUX_ANAIF_ADCFIFO_DATA_W 12 #define AUX_ANAIF_ADCFIFO_DATA_M 0x00000FFF #define AUX_ANAIF_ADCFIFO_DATA_S 0 @@ -249,9 +273,13 @@ //***************************************************************************** // Field: [0] START // -// Writing to this register will trigger an ADC conversion given that -// ADCCTL.START_SRC is set to NO_EVENT0 or NO_EVENT1. If other setting is used -// in ADCCTL.START_SRC behavior can be unpredictable +// Manual ADC trigger. +// +// 0: No effect. +// 1: Single ADC trigger. +// +// To manually trigger the ADC, you must set ADCCTL.START_SRC to NO_EVENT to +// avoid conflict with event-driven ADC trigger. #define AUX_ANAIF_ADCTRIG_START 0x00000001 #define AUX_ANAIF_ADCTRIG_START_BITN 0 #define AUX_ANAIF_ADCTRIG_START_M 0x00000001 @@ -264,10 +292,10 @@ //***************************************************************************** // Field: [0] RESET_N // -// Current source control +// ISRC reset control. // -// 0: Current source is clamped -// 1: Current source is active/charging +// 0: ISRC drives 0 uA. +// 1: ISRC drives current ADI_4_AUX:ISRC.TRIM to COMPA_IN. #define AUX_ANAIF_ISRCCTL_RESET_N 0x00000001 #define AUX_ANAIF_ISRCCTL_RESET_N_BITN 0 #define AUX_ANAIF_ISRCCTL_RESET_N_M 0x00000001 diff --git a/third_party/ti/devices/cc26x0/inc/hw_aux_evctl.h b/third_party/ti/devices/cc26x0/inc/hw_aux_evctl.h index b72c5de69..49bb69c0f 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_aux_evctl.h +++ b/third_party/ti/devices/cc26x0/inc/hw_aux_evctl.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_evctl_h -* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017) -* Revision: 48345 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -52,10 +52,10 @@ // Sensor Controller Engine Wait Event Selection #define AUX_EVCTL_O_SCEWEVSEL 0x00000008 -// Events To AON Domain Flags +// Events To AON Flags #define AUX_EVCTL_O_EVTOAONFLAGS 0x0000000C -// Events To AON Domain Polarity +// Events To AON Polarity #define AUX_EVCTL_O_EVTOAONPOL 0x00000010 // Direct Memory Access Control @@ -70,22 +70,22 @@ // Event Status 1 #define AUX_EVCTL_O_EVSTAT1 0x00000020 -// Event To MCU Domain Polarity +// Event To MCU Polarity #define AUX_EVCTL_O_EVTOMCUPOL 0x00000024 -// Events to MCU Domain Flags +// Events to MCU Flags #define AUX_EVCTL_O_EVTOMCUFLAGS 0x00000028 -// Combined Event To MCU Domain Mask +// Combined Event To MCU Mask #define AUX_EVCTL_O_COMBEVTOMCUMASK 0x0000002C // Vector Flags #define AUX_EVCTL_O_VECFLAGS 0x00000034 -// Events To MCU Domain Flags Clear +// Events To MCU Flags Clear #define AUX_EVCTL_O_EVTOMCUFLAGSCLR 0x00000038 -// Events To AON Domain Clear +// Events To AON Clear #define AUX_EVCTL_O_EVTOAONFLAGSCLR 0x0000003C // Vector Flags Clear @@ -98,13 +98,15 @@ //***************************************************************************** // Field: [14] VEC1_POL // -// Selects vector 1 trigger event polarity. +// Vector 1 trigger event polarity. // -// To manually trigger vector 1 execution, set VEC1_EV to a known static value, -// and toggle VEC1_POL twice. +// To manually trigger vector 1 execution: +// - AUX_SCE must sleep. +// - Set VEC1_EV to a known static value. +// - Toggle VEC1_POL twice. // ENUMs: -// FALL Falling edge triggers execution. -// RISE Rising edge triggers execution. +// FALL Falling edge triggers vector 1 execution. +// RISE Rising edge triggers vector 1 execution. #define AUX_EVCTL_VECCFG0_VEC1_POL 0x00004000 #define AUX_EVCTL_VECCFG0_VEC1_POL_BITN 14 #define AUX_EVCTL_VECCFG0_VEC1_POL_M 0x00004000 @@ -114,17 +116,15 @@ // Field: [13] VEC1_EN // -// Enables (1) or disables (0) triggering of vector 1 execution. +// Vector 1 trigger enable. // -// When enabled, the edge selected by VEC1_POL on the event selected by VEC1_EV -// will set VECFLAGS.VEC1, which in turn triggers vector 1 execution. +// When enabled, VEC1_EV event with VEC1_POL polarity triggers a jump to vector +// # 1 when AUX_SCE sleeps. // -// Note: Lower vectors (0) have priority. +// Lower vectors (0) have priority. // ENUMs: -// EN An event selected by VEC1_EV with polarity from -// VEC1_POL triggers a jump to vector # 1 when -// AUX_SCE is in sleep -// DIS Event detection is disabled +// EN Enable vector 1 trigger. +// DIS Disable vector 1 trigger. #define AUX_EVCTL_VECCFG0_VEC1_EN 0x00002000 #define AUX_EVCTL_VECCFG0_VEC1_EN_BITN 13 #define AUX_EVCTL_VECCFG0_VEC1_EN_M 0x00002000 @@ -134,40 +134,40 @@ // Field: [12:8] VEC1_EV // -// Selects vector 1 trigger source event. +// Select vector 1 trigger source event. // ENUMs: -// ADC_IRQ ADC_IRQ event -// MCU_EV MCU_EV event -// ACLK_REF ACLK_REF event -// AUXIO15 AUXIO15 input data -// AUXIO14 AUXIO14 input data -// AUXIO13 AUXIO13 input data -// AUXIO12 AUXIO12 input data -// AUXIO11 AUXIO11 input data -// AUXIO10 AUXIO10 input data -// AUXIO9 AUXIO9 input data -// AUXIO8 AUXIO8 input data -// AUXIO7 AUXIO7 input data -// AUXIO6 AUXIO6 input data -// AUXIO5 AUXIO5 input data -// AUXIO4 AUXIO4 input data -// AUXIO3 AUXIO3 input data -// AUXIO2 AUXIO2 input data -// AUXIO1 AUXIO1 input data -// AUXIO0 AUXIO0 input data -// AON_PROG_WU AON_PROG_WU event -// AON_SW AON_SW event -// OBSMUX1 OBSMUX1 event -// OBSMUX0 OBSMUX0 event -// ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event -// ADC_DONE ADC_DONE event -// SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event -// TIMER1_EV TIMER1_EV event -// TIMER0_EV TIMER0_EV event -// TDC_DONE TDC_DONE event -// AUX_COMPB AUX_COMPB event -// AUX_COMPA AUX_COMPA event -// AON_RTC_CH2 AON_RTC_CH2 event +// ADC_IRQ EVSTAT1.ADC_IRQ +// MCU_EV EVSTAT1.MCU_EV +// ACLK_REF EVSTAT1.ACLK_REF +// AUXIO15 EVSTAT1.AUXIO15 +// AUXIO14 EVSTAT1.AUXIO14 +// AUXIO13 EVSTAT1.AUXIO13 +// AUXIO12 EVSTAT1.AUXIO12 +// AUXIO11 EVSTAT1.AUXIO11 +// AUXIO10 EVSTAT1.AUXIO10 +// AUXIO9 EVSTAT1.AUXIO9 +// AUXIO8 EVSTAT1.AUXIO8 +// AUXIO7 EVSTAT1.AUXIO7 +// AUXIO6 EVSTAT1.AUXIO6 +// AUXIO5 EVSTAT1.AUXIO5 +// AUXIO4 EVSTAT1.AUXIO4 +// AUXIO3 EVSTAT1.AUXIO3 +// AUXIO2 EVSTAT0.AUXIO2 +// AUXIO1 EVSTAT0.AUXIO1 +// AUXIO0 EVSTAT0.AUXIO0 +// AON_PROG_WU EVSTAT0.AON_PROG_WU +// AON_SW EVSTAT0.AON_SW +// OBSMUX1 EVSTAT0.OBSMUX1 +// OBSMUX0 EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV EVSTAT0.TIMER1_EV +// TIMER0_EV EVSTAT0.TIMER0_EV +// TDC_DONE EVSTAT0.TDC_DONE +// AUX_COMPB EVSTAT0.AUX_COMPB +// AUX_COMPA EVSTAT0.AUX_COMPA +// AON_RTC_CH2 EVSTAT0.AON_RTC_CH2 #define AUX_EVCTL_VECCFG0_VEC1_EV_W 5 #define AUX_EVCTL_VECCFG0_VEC1_EV_M 0x00001F00 #define AUX_EVCTL_VECCFG0_VEC1_EV_S 8 @@ -206,13 +206,15 @@ // Field: [6] VEC0_POL // -// Selects vector 0 trigger event polarity. +// Vector 0 trigger event polarity. // -// To manually trigger vector 0 execution, set VEC0_EV to a known static value, -// and toggle VEC0_POL twice. +// To manually trigger vector 0 execution: +// - AUX_SCE must sleep. +// - Set VEC0_EV to a known static value. +// - Toggle VEC0_POL twice. // ENUMs: -// FALL Falling edge triggers execution. -// RISE Rising edge triggers execution. +// FALL Falling edge triggers vector 0 execution. +// RISE Rising edge triggers vector 0 execution. #define AUX_EVCTL_VECCFG0_VEC0_POL 0x00000040 #define AUX_EVCTL_VECCFG0_VEC0_POL_BITN 6 #define AUX_EVCTL_VECCFG0_VEC0_POL_M 0x00000040 @@ -222,15 +224,13 @@ // Field: [5] VEC0_EN // -// Enables (1) or disables (0) triggering of vector 0 execution. +// Vector 0 trigger enable. // -// When enabled, the edge selected by VEC0_POL on the event selected by VEC0_EV -// will set VECFLAGS.VEC0, which in turn triggers vector 0 execution. +// When enabled, VEC0_EV event with VEC0_POL polarity triggers a jump to vector +// # 0 when AUX_SCE sleeps. // ENUMs: -// EN An event selected by VEC0_EV with polarity from -// VEC0_POL triggers a jump to vector #0 when -// AUX_SCE is in sleep -// DIS Event detection is disabled +// EN Enable vector 0 trigger. +// DIS Disable vector 0 trigger. #define AUX_EVCTL_VECCFG0_VEC0_EN 0x00000020 #define AUX_EVCTL_VECCFG0_VEC0_EN_BITN 5 #define AUX_EVCTL_VECCFG0_VEC0_EN_M 0x00000020 @@ -240,40 +240,40 @@ // Field: [4:0] VEC0_EV // -// Selects vector 0 trigger source event. +// Select vector 0 trigger source event. // ENUMs: -// ADC_IRQ ADC_IRQ event -// MCU_EV MCU_EV event -// ACLK_REF ACLK_REF event -// AUXIO15 AUXIO15 input data -// AUXIO14 AUXIO14 input data -// AUXIO13 AUXIO13 input data -// AUXIO12 AUXIO12 input data -// AUXIO11 AUXIO11 input data -// AUXIO10 AUXIO10 input data -// AUXIO9 AUXIO9 input data -// AUXIO8 AUXIO8 input data -// AUXIO7 AUXIO7 input data -// AUXIO6 AUXIO6 input data -// AUXIO5 AUXIO5 input data -// AUXIO4 AUXIO4 input data -// AUXIO3 AUXIO3 input data -// AUXIO2 AUXIO2 input data -// AUXIO1 AUXIO1 input data -// AUXIO0 AUXIO0 input data -// AON_PROG_WU AON_PROG_WU event -// AON_SW AON_SW event -// OBSMUX1 OBSMUX1 event -// OBSMUX0 OBSMUX0 event -// ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event -// ADC_DONE ADC_DONE event -// SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event -// TIMER1_EV TIMER1_EV event -// TIMER0_EV TIMER0_EV event -// TDC_DONE TDC_DONE event -// AUX_COMPB AUX_COMPB event -// AUX_COMPA AUX_COMPA event -// AON_RTC_CH2 AON_RTC_CH2 event +// ADC_IRQ EVSTAT1.ADC_IRQ +// MCU_EV EVSTAT1.MCU_EV +// ACLK_REF EVSTAT1.ACLK_REF +// AUXIO15 EVSTAT1.AUXIO15 +// AUXIO14 EVSTAT1.AUXIO14 +// AUXIO13 EVSTAT1.AUXIO13 +// AUXIO12 EVSTAT1.AUXIO12 +// AUXIO11 EVSTAT1.AUXIO11 +// AUXIO10 EVSTAT1.AUXIO10 +// AUXIO9 EVSTAT1.AUXIO9 +// AUXIO8 EVSTAT1.AUXIO8 +// AUXIO7 EVSTAT1.AUXIO7 +// AUXIO6 EVSTAT1.AUXIO6 +// AUXIO5 EVSTAT1.AUXIO5 +// AUXIO4 EVSTAT1.AUXIO4 +// AUXIO3 EVSTAT1.AUXIO3 +// AUXIO2 EVSTAT0.AUXIO2 +// AUXIO1 EVSTAT0.AUXIO1 +// AUXIO0 EVSTAT0.AUXIO0 +// AON_PROG_WU EVSTAT0.AON_PROG_WU +// AON_SW EVSTAT0.AON_SW +// OBSMUX1 EVSTAT0.OBSMUX1 +// OBSMUX0 EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV EVSTAT0.TIMER1_EV +// TIMER0_EV EVSTAT0.TIMER0_EV +// TDC_DONE EVSTAT0.TDC_DONE +// AUX_COMPB EVSTAT0.AUX_COMPB +// AUX_COMPA EVSTAT0.AUX_COMPA +// AON_RTC_CH2 EVSTAT0.AON_RTC_CH2 #define AUX_EVCTL_VECCFG0_VEC0_EV_W 5 #define AUX_EVCTL_VECCFG0_VEC0_EV_M 0x0000001F #define AUX_EVCTL_VECCFG0_VEC0_EV_S 0 @@ -317,13 +317,15 @@ //***************************************************************************** // Field: [14] VEC3_POL // -// Selects vector 3 trigger event polarity. +// Vector 3 trigger event polarity. // -// To manually trigger vector 3 execution, set VEC3_EV to a known static value, -// and toggle VEC3_POL twice. +// To manually trigger vector 3 execution: +// - AUX_SCE must sleep. +// - Set VEC3_EV to a known static value. +// - Toggle VEC3_POL twice. // ENUMs: -// FALL Falling edge triggers execution. -// RISE Rising edge triggers execution. +// FALL Falling edge triggers vector 3 execution. +// RISE Rising edge triggers vector 3 execution. #define AUX_EVCTL_VECCFG1_VEC3_POL 0x00004000 #define AUX_EVCTL_VECCFG1_VEC3_POL_BITN 14 #define AUX_EVCTL_VECCFG1_VEC3_POL_M 0x00004000 @@ -333,17 +335,15 @@ // Field: [13] VEC3_EN // -// Enables (1) or disables (0) triggering of vector 3 execution. +// Vector 3 trigger enable. // -// When enabled, the edge selected by VEC3_POL on the event selected by VEC3_EV -// will set VECFLAGS.VEC3, which in turn triggers vector 3 execution. +// When enabled, VEC3_EV event with VEC3_POL polarity triggers a jump to vector +// # 3 when AUX_SCE sleeps. // -// Note: Lower vectors (0, 1 and 2) have priority. +// Lower vectors (0, 1, and 2) have priority. // ENUMs: -// EN An event selected by VEC3_EV with polarity from -// VEC3_POL triggers a jump to vector # 3 when -// AUX_SCE is in sleep -// DIS Event detection is disabled +// EN Enable vector 3 trigger. +// DIS Disable vector 3 trigger. #define AUX_EVCTL_VECCFG1_VEC3_EN 0x00002000 #define AUX_EVCTL_VECCFG1_VEC3_EN_BITN 13 #define AUX_EVCTL_VECCFG1_VEC3_EN_M 0x00002000 @@ -353,40 +353,40 @@ // Field: [12:8] VEC3_EV // -// Selects vector 3 trigger source event. +// Select vector 3 trigger source event. // ENUMs: -// ADC_IRQ ADC_IRQ event -// MCU_EV MCU_EV event -// ACLK_REF ACLK_REF event -// AUXIO15 AUXIO15 input data -// AUXIO14 AUXIO14 input data -// AUXIO13 AUXIO13 input data -// AUXIO12 AUXIO12 input data -// AUXIO11 AUXIO11 input data -// AUXIO10 AUXIO10 input data -// AUXIO9 AUXIO9 input data -// AUXIO8 AUXIO8 input data -// AUXIO7 AUXIO7 input data -// AUXIO6 AUXIO6 input data -// AUXIO5 AUXIO5 input data -// AUXIO4 AUXIO4 input data -// AUXIO3 AUXIO3 input data -// AUXIO2 AUXIO2 input data -// AUXIO1 AUXIO1 input data -// AUXIO0 AUXIO0 input data -// AON_PROG_WU AON_PROG_WU event -// AON_SW AON_SW event -// OBSMUX1 OBSMUX1 event -// OBSMUX0 OBSMUX0 event -// ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event -// ADC_DONE ADC_DONE event -// SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event -// TIMER1_EV TIMER1_EV event -// TIMER0_EV TIMER0_EV event -// TDC_DONE TDC_DONE event -// AUX_COMPB AUX_COMPB event -// AUX_COMPA AUX_COMPA event -// AON_RTC_CH2 AON_RTC_CH2 event +// ADC_IRQ EVSTAT1.ADC_IRQ +// MCU_EV EVSTAT1.MCU_EV +// ACLK_REF EVSTAT1.ACLK_REF +// AUXIO15 EVSTAT1.AUXIO15 +// AUXIO14 EVSTAT1.AUXIO14 +// AUXIO13 EVSTAT1.AUXIO13 +// AUXIO12 EVSTAT1.AUXIO12 +// AUXIO11 EVSTAT1.AUXIO11 +// AUXIO10 EVSTAT1.AUXIO10 +// AUXIO9 EVSTAT1.AUXIO9 +// AUXIO8 EVSTAT1.AUXIO8 +// AUXIO7 EVSTAT1.AUXIO7 +// AUXIO6 EVSTAT1.AUXIO6 +// AUXIO5 EVSTAT1.AUXIO5 +// AUXIO4 EVSTAT1.AUXIO4 +// AUXIO3 EVSTAT1.AUXIO3 +// AUXIO2 EVSTAT0.AUXIO2 +// AUXIO1 EVSTAT0.AUXIO1 +// AUXIO0 EVSTAT0.AUXIO0 +// AON_PROG_WU EVSTAT0.AON_PROG_WU +// AON_SW EVSTAT0.AON_SW +// OBSMUX1 EVSTAT0.OBSMUX1 +// OBSMUX0 EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV EVSTAT0.TIMER1_EV +// TIMER0_EV EVSTAT0.TIMER0_EV +// TDC_DONE EVSTAT0.TDC_DONE +// AUX_COMPB EVSTAT0.AUX_COMPB +// AUX_COMPA EVSTAT0.AUX_COMPA +// AON_RTC_CH2 EVSTAT0.AON_RTC_CH2 #define AUX_EVCTL_VECCFG1_VEC3_EV_W 5 #define AUX_EVCTL_VECCFG1_VEC3_EV_M 0x00001F00 #define AUX_EVCTL_VECCFG1_VEC3_EV_S 8 @@ -425,13 +425,15 @@ // Field: [6] VEC2_POL // -// Selects vector 2 trigger event polarity. +// Vector 2 trigger event polarity. // -// To manually trigger vector 2 execution, set VEC2_EV to a known static value, -// and toggle VEC2_POL twice. +// To manually trigger vector 2 execution: +// - AUX_SCE must sleep. +// - Set VEC2_EV to a known static value. +// - Toggle VEC2_POL twice. // ENUMs: -// FALL Falling edge triggers execution. -// RISE Rising edge triggers execution. +// FALL Falling edge triggers vector 2 execution. +// RISE Rising edge triggers vector 2 execution. #define AUX_EVCTL_VECCFG1_VEC2_POL 0x00000040 #define AUX_EVCTL_VECCFG1_VEC2_POL_BITN 6 #define AUX_EVCTL_VECCFG1_VEC2_POL_M 0x00000040 @@ -441,17 +443,15 @@ // Field: [5] VEC2_EN // -// Enables (1) or disables (0) triggering of vector 2 execution. +// Vector 2 trigger enable. // -// When enabled, the edge selected by VEC2_POL on the event selected by VEC2_EV -// will set VECFLAGS.VEC2, which in turn triggers vector 2 execution. +// When enabled, VEC2_EV event with VEC2_POL polarity triggers a jump to vector +// # 2 when AUX_SCE sleeps. // -// Note: Lower vectors (0 and 1) have priority. +// Lower vectors (0 and 1) have priority. // ENUMs: -// EN An event selected by VEC2_EV with polarity from -// VEC2_POL triggers a jump to vector # 2 when -// AUX_SCE is in sleep -// DIS Event detection is disabled +// EN Enable vector 2 trigger. +// DIS Disable vector 2 trigger. #define AUX_EVCTL_VECCFG1_VEC2_EN 0x00000020 #define AUX_EVCTL_VECCFG1_VEC2_EN_BITN 5 #define AUX_EVCTL_VECCFG1_VEC2_EN_M 0x00000020 @@ -461,40 +461,40 @@ // Field: [4:0] VEC2_EV // -// Selects vector 2 trigger source event. +// Select vector 2 trigger source event. // ENUMs: -// ADC_IRQ ADC_IRQ event -// MCU_EV MCU_EV event -// ACLK_REF ACLK_REF event -// AUXIO15 AUXIO15 input data -// AUXIO14 AUXIO14 input data -// AUXIO13 AUXIO13 input data -// AUXIO12 AUXIO12 input data -// AUXIO11 AUXIO11 input data -// AUXIO10 AUXIO10 input data -// AUXIO9 AUXIO9 input data -// AUXIO8 AUXIO8 input data -// AUXIO7 AUXIO7 input data -// AUXIO6 AUXIO6 input data -// AUXIO5 AUXIO5 input data -// AUXIO4 AUXIO4 input data -// AUXIO3 AUXIO3 input data -// AUXIO2 AUXIO2 input data -// AUXIO1 AUXIO1 input data -// AUXIO0 AUXIO0 input data -// AON_PROG_WU AON_PROG_WU event -// AON_SW AON_SW event -// OBSMUX1 OBSMUX1 event -// OBSMUX0 OBSMUX0 event -// ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event -// ADC_DONE ADC_DONE event -// SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event -// TIMER1_EV TIMER1_EV event -// TIMER0_EV TIMER0_EV event -// TDC_DONE TDC_DONE event -// AUX_COMPB AUX_COMPB event -// AUX_COMPA AUX_COMPA event -// AON_RTC_CH2 AON_RTC_CH2 event +// ADC_IRQ EVSTAT1.ADC_IRQ +// MCU_EV EVSTAT1.MCU_EV +// ACLK_REF EVSTAT1.ACLK_REF +// AUXIO15 EVSTAT1.AUXIO15 +// AUXIO14 EVSTAT1.AUXIO14 +// AUXIO13 EVSTAT1.AUXIO13 +// AUXIO12 EVSTAT1.AUXIO12 +// AUXIO11 EVSTAT1.AUXIO11 +// AUXIO10 EVSTAT1.AUXIO10 +// AUXIO9 EVSTAT1.AUXIO9 +// AUXIO8 EVSTAT1.AUXIO8 +// AUXIO7 EVSTAT1.AUXIO7 +// AUXIO6 EVSTAT1.AUXIO6 +// AUXIO5 EVSTAT1.AUXIO5 +// AUXIO4 EVSTAT1.AUXIO4 +// AUXIO3 EVSTAT1.AUXIO3 +// AUXIO2 EVSTAT0.AUXIO2 +// AUXIO1 EVSTAT0.AUXIO1 +// AUXIO0 EVSTAT0.AUXIO0 +// AON_PROG_WU EVSTAT0.AON_PROG_WU +// AON_SW EVSTAT0.AON_SW +// OBSMUX1 EVSTAT0.OBSMUX1 +// OBSMUX0 EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV EVSTAT0.TIMER1_EV +// TIMER0_EV EVSTAT0.TIMER0_EV +// TDC_DONE EVSTAT0.TDC_DONE +// AUX_COMPB EVSTAT0.AUX_COMPB +// AUX_COMPA EVSTAT0.AUX_COMPA +// AON_RTC_CH2 EVSTAT0.AON_RTC_CH2 #define AUX_EVCTL_VECCFG1_VEC2_EV_W 5 #define AUX_EVCTL_VECCFG1_VEC2_EV_M 0x0000001F #define AUX_EVCTL_VECCFG1_VEC2_EV_S 0 @@ -538,40 +538,40 @@ //***************************************************************************** // Field: [4:0] WEV7_EV // -// Selects the event source to be mapped to AUX_SCE:WUSTAT.EV_SIGNALS bit 7. +// Select event source to connect to AUX_SCE:WUSTAT.EV_SIGNALS bit 7. // ENUMs: -// ADC_IRQ ADC_IRQ event -// MCU_EV MCU_EV event -// ACLK_REF ACLK_REF event -// AUXIO15 AUXIO15 input data -// AUXIO14 AUXIO14 input data -// AUXIO13 AUXIO13 input data -// AUXIO12 AUXIO12 input data -// AUXIO11 AUXIO11 input data -// AUXIO10 AUXIO10 input data -// AUXIO9 AUXIO9 input data -// AUXIO8 AUXIO8 input data -// AUXIO7 AUXIO7 input data -// AUXIO6 AUXIO6 input data -// AUXIO5 AUXIO5 input data -// AUXIO4 AUXIO4 input data -// AUXIO3 AUXIO3 input data -// AUXIO2 AUXIO2 input data -// AUXIO1 AUXIO1 input data -// AUXIO0 AUXIO0 input data -// AON_PROG_WU AON_PROG_WU event -// AON_SW AON_SW event -// OBSMUX1 OBSMUX1 event -// OBSMUX0 OBSMUX0 event -// ADC_FIFO_ALMOST_FULL ADC_FIFO_ALMOST_FULL event -// ADC_DONE ADC_DONE event -// SMPH_AUTOTAKE_DONE SMPH_AUTOTAKE_DONE event -// TIMER1_EV TIMER1_EV event -// TIMER0_EV TIMER0_EV event -// TDC_DONE TDC_DONE event -// AUX_COMPB AUX_COMPB event -// AUX_COMPA AUX_COMPA event -// AON_RTC_CH2 AON_RTC_CH2 event +// ADC_IRQ EVSTAT1.ADC_IRQ +// MCU_EV EVSTAT1.MCU_EV +// ACLK_REF EVSTAT1.ACLK_REF +// AUXIO15 EVSTAT1.AUXIO15 +// AUXIO14 EVSTAT1.AUXIO14 +// AUXIO13 EVSTAT1.AUXIO13 +// AUXIO12 EVSTAT1.AUXIO12 +// AUXIO11 EVSTAT1.AUXIO11 +// AUXIO10 EVSTAT1.AUXIO10 +// AUXIO9 EVSTAT1.AUXIO9 +// AUXIO8 EVSTAT1.AUXIO8 +// AUXIO7 EVSTAT1.AUXIO7 +// AUXIO6 EVSTAT1.AUXIO6 +// AUXIO5 EVSTAT1.AUXIO5 +// AUXIO4 EVSTAT1.AUXIO4 +// AUXIO3 EVSTAT1.AUXIO3 +// AUXIO2 EVSTAT0.AUXIO2 +// AUXIO1 EVSTAT0.AUXIO1 +// AUXIO0 EVSTAT0.AUXIO0 +// AON_PROG_WU EVSTAT0.AON_PROG_WU +// AON_SW EVSTAT0.AON_SW +// OBSMUX1 EVSTAT0.OBSMUX1 +// OBSMUX0 EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV EVSTAT0.TIMER1_EV +// TIMER0_EV EVSTAT0.TIMER0_EV +// TDC_DONE EVSTAT0.TDC_DONE +// AUX_COMPB EVSTAT0.AUX_COMPB +// AUX_COMPA EVSTAT0.AUX_COMPA +// AON_RTC_CH2 EVSTAT0.AON_RTC_CH2 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_W 5 #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_M 0x0000001F #define AUX_EVCTL_SCEWEVSEL_WEV7_EV_S 0 @@ -615,7 +615,8 @@ //***************************************************************************** // Field: [8] TIMER1_EV // -// TIMER1_EV event flag. +// This event flag is set when level selected by EVTOAONPOL.TIMER1_EV occurs on +// EVSTAT0.TIMER1_EV. #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV 0x00000100 #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV_BITN 8 #define AUX_EVCTL_EVTOAONFLAGS_TIMER1_EV_M 0x00000100 @@ -623,7 +624,8 @@ // Field: [7] TIMER0_EV // -// TIMER0_EV event flag. +// This event flag is set when level selected by EVTOAONPOL.TIMER0_EV occurs on +// EVSTAT0.TIMER0_EV. #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV 0x00000080 #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV_BITN 7 #define AUX_EVCTL_EVTOAONFLAGS_TIMER0_EV_M 0x00000080 @@ -631,7 +633,8 @@ // Field: [6] TDC_DONE // -// TDC_DONE event flag. +// This event flag is set when level selected by EVTOAONPOL.TDC_DONE occurs on +// EVSTAT0.TDC_DONE. #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE 0x00000040 #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE_BITN 6 #define AUX_EVCTL_EVTOAONFLAGS_TDC_DONE_M 0x00000040 @@ -639,7 +642,8 @@ // Field: [5] ADC_DONE // -// ADC_DONE event flag. +// This event flag is set when level selected by EVTOAONPOL.ADC_DONE occurs on +// EVSTAT0.ADC_DONE. #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE 0x00000020 #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE_BITN 5 #define AUX_EVCTL_EVTOAONFLAGS_ADC_DONE_M 0x00000020 @@ -647,7 +651,8 @@ // Field: [4] AUX_COMPB // -// AUX_COMPB event flag. +// This event flag is set when edge selected by EVTOAONPOL.AUX_COMPB occurs on +// EVSTAT0.AUX_COMPB. #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB 0x00000010 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_BITN 4 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_M 0x00000010 @@ -655,7 +660,8 @@ // Field: [3] AUX_COMPA // -// AUX_COMPA event flag. +// This event flag is set when edge selected by EVTOAONPOL.AUX_COMPA occurs on +// EVSTAT0.AUX_COMPA. #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA 0x00000008 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_BITN 3 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_M 0x00000008 @@ -663,7 +669,7 @@ // Field: [2] SWEV2 // -// SWEV2 event flag. +// This event flag is set when software writes a 1 to SWEVSET.SWEV2. #define AUX_EVCTL_EVTOAONFLAGS_SWEV2 0x00000004 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_BITN 2 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_M 0x00000004 @@ -671,7 +677,7 @@ // Field: [1] SWEV1 // -// SWEV1 event flag. +// This event flag is set when software writes a 1 to SWEVSET.SWEV1. #define AUX_EVCTL_EVTOAONFLAGS_SWEV1 0x00000002 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_BITN 1 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_M 0x00000002 @@ -679,7 +685,7 @@ // Field: [0] SWEV0 // -// SWEV0 event flag. +// This event flag is set when software writes a 1 to SWEVSET.SWEV0. #define AUX_EVCTL_EVTOAONFLAGS_SWEV0 0x00000001 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_BITN 0 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_M 0x00000001 @@ -692,7 +698,7 @@ //***************************************************************************** // Field: [8] TIMER1_EV // -// Selects the event source level that sets EVTOAONFLAGS.TIMER1_EV. +// Select the level of EVSTAT0.TIMER1_EV that sets EVTOAONFLAGS.TIMER1_EV. // ENUMs: // LOW Low level // HIGH High level @@ -705,7 +711,7 @@ // Field: [7] TIMER0_EV // -// Selects the event source level that sets EVTOAONFLAGS.TIMER0_EV. +// Select the level of EVSTAT0.TIMER0_EV that sets EVTOAONFLAGS.TIMER0_EV. // ENUMs: // LOW Low level // HIGH High level @@ -718,7 +724,7 @@ // Field: [6] TDC_DONE // -// Selects the event source level that sets EVTOAONFLAGS.TDC_DONE. +// Select level of EVSTAT0.TDC_DONE that sets EVTOAONFLAGS.TDC_DONE. // ENUMs: // LOW Low level // HIGH High level @@ -731,7 +737,7 @@ // Field: [5] ADC_DONE // -// Selects the event source level that sets EVTOAONFLAGS.ADC_DONE. +// Select the level of EVSTAT0.ADC_DONE that sets EVTOAONFLAGS.ADC_DONE. // ENUMs: // LOW Low level // HIGH High level @@ -744,10 +750,10 @@ // Field: [4] AUX_COMPB // -// Selects the event source level that sets EVTOAONFLAGS.AUX_COMPB. +// Select the edge of EVSTAT0.AUX_COMPB that sets EVTOAONFLAGS.AUX_COMPB. // ENUMs: -// LOW Low level -// HIGH High level +// LOW Falling edge +// HIGH Rising edge #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB 0x00000010 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_BITN 4 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_M 0x00000010 @@ -757,10 +763,10 @@ // Field: [3] AUX_COMPA // -// Selects the event source level that sets EVTOAONFLAGS.AUX_COMPA. +// Select the edge of EVSTAT0.AUX_COMPA that sets EVTOAONFLAGS.AUX_COMPA. // ENUMs: -// LOW Low level -// HIGH High level +// LOW Falling edge +// HIGH Rising edge #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA 0x00000008 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_BITN 3 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_M 0x00000008 @@ -775,12 +781,12 @@ //***************************************************************************** // Field: [2] REQ_MODE // -// DMA Request mode +// UDMA0 Request mode // ENUMs: -// SINGLE Single requests are generated on DMA channel 7 -// when the condition configured in SEL is met -// BURST Burst requests are generated on DMA channel 7 when -// the condition configured in SEL is met +// SINGLE Single requests are generated on UDMA0 channel 7 +// when the condition configured in SEL is met. +// BURST Burst requests are generated on UDMA0 channel 7 +// when the condition configured in SEL is met. #define AUX_EVCTL_DMACTL_REQ_MODE 0x00000004 #define AUX_EVCTL_DMACTL_REQ_MODE_BITN 2 #define AUX_EVCTL_DMACTL_REQ_MODE_M 0x00000004 @@ -790,8 +796,10 @@ // Field: [1] EN // -// 0: DMA interface is disabled -// 1: DMA interface is enabled +// uDMA ADC interface enable. +// +// 0: Disable UDMA0 interface to ADC. +// 1: Enable UDMA0 interface to ADC. #define AUX_EVCTL_DMACTL_EN 0x00000002 #define AUX_EVCTL_DMACTL_EN_BITN 1 #define AUX_EVCTL_DMACTL_EN_M 0x00000002 @@ -799,12 +807,13 @@ // Field: [0] SEL // -// Selection of FIFO watermark level required to trigger an ADC_DMA transfer +// Select FIFO watermark level required to trigger a UDMA0 transfer of ADC FIFO +// data. // ENUMs: -// FIFO_ALMOST_FULL ADC_DMA event will be generated when the ADC FIFO -// is almost full (3/4 full) -// FIFO_NOT_EMPTY ADC_DMA event will be generated when there are -// valid samples in the ADC FIFO +// FIFO_ALMOST_FULL UDMA0 trigger event will be generated when the ADC +// FIFO is almost full (3/4 full). +// FIFO_NOT_EMPTY UDMA0 trigger event will be generated when there +// are samples in the ADC FIFO. #define AUX_EVCTL_DMACTL_SEL 0x00000001 #define AUX_EVCTL_DMACTL_SEL_BITN 0 #define AUX_EVCTL_DMACTL_SEL_M 0x00000001 @@ -819,10 +828,10 @@ //***************************************************************************** // Field: [2] SWEV2 // -// Writing 1 sets software event 2. +// Software event flag 2. // -// For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV2 and -// cleared using EVTOAONFLAGSCLR.SWEV2. +// 0: No effect. +// 1: Set software event flag 2. #define AUX_EVCTL_SWEVSET_SWEV2 0x00000004 #define AUX_EVCTL_SWEVSET_SWEV2_BITN 2 #define AUX_EVCTL_SWEVSET_SWEV2_M 0x00000004 @@ -830,10 +839,10 @@ // Field: [1] SWEV1 // -// Writing 1 sets software event 1. +// Software event flag 1. // -// For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV1 and -// cleared using EVTOAONFLAGSCLR.SWEV1. +// 0: No effect. +// 1: Set software event flag 1. #define AUX_EVCTL_SWEVSET_SWEV1 0x00000002 #define AUX_EVCTL_SWEVSET_SWEV1_BITN 1 #define AUX_EVCTL_SWEVSET_SWEV1_M 0x00000002 @@ -841,10 +850,10 @@ // Field: [0] SWEV0 // -// Writing 1 sets software event 0. +// Software event flag 0. // -// For the MCU domain, the event flag can be read from EVTOAONFLAGS.SWEV0 and -// cleared using EVTOAONFLAGSCLR.SWEV0. +// 0: No effect. +// 1: Set software event flag 0. #define AUX_EVCTL_SWEVSET_SWEV0 0x00000001 #define AUX_EVCTL_SWEVSET_SWEV0_BITN 0 #define AUX_EVCTL_SWEVSET_SWEV0_M 0x00000001 @@ -857,7 +866,7 @@ //***************************************************************************** // Field: [15] AUXIO2 // -// Current value of AUXIO2 input data line +// AUXIO2 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 2. #define AUX_EVCTL_EVSTAT0_AUXIO2 0x00008000 #define AUX_EVCTL_EVSTAT0_AUXIO2_BITN 15 #define AUX_EVCTL_EVSTAT0_AUXIO2_M 0x00008000 @@ -865,7 +874,7 @@ // Field: [14] AUXIO1 // -// Current value of AUXIO1 input data line +// AUXIO1 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 1. #define AUX_EVCTL_EVSTAT0_AUXIO1 0x00004000 #define AUX_EVCTL_EVSTAT0_AUXIO1_BITN 14 #define AUX_EVCTL_EVSTAT0_AUXIO1_M 0x00004000 @@ -873,7 +882,7 @@ // Field: [13] AUXIO0 // -// Current value of AUXIO0 input data line +// AUXIO0 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 0. #define AUX_EVCTL_EVSTAT0_AUXIO0 0x00002000 #define AUX_EVCTL_EVSTAT0_AUXIO0_BITN 13 #define AUX_EVCTL_EVSTAT0_AUXIO0_M 0x00002000 @@ -881,7 +890,8 @@ // Field: [12] AON_PROG_WU // -// Current value of OBSMUX3 event line +// AON_EVENT:AUXWUSEL.WU2_EV OR AON_EVENT:AUXWUSEL.WU1_EV OR +// AON_EVENT:AUXWUSEL.WU0_EV #define AUX_EVCTL_EVSTAT0_AON_PROG_WU 0x00001000 #define AUX_EVCTL_EVSTAT0_AON_PROG_WU_BITN 12 #define AUX_EVCTL_EVSTAT0_AON_PROG_WU_M 0x00001000 @@ -889,7 +899,7 @@ // Field: [11] AON_SW // -// Current value of OBSMUX2 event line +// AON_WUC:AUXCTL.SWEV #define AUX_EVCTL_EVSTAT0_AON_SW 0x00000800 #define AUX_EVCTL_EVSTAT0_AON_SW_BITN 11 #define AUX_EVCTL_EVSTAT0_AON_SW_M 0x00000800 @@ -897,7 +907,8 @@ // Field: [10] OBSMUX1 // -// Current value of OBSMUX1 event line +// Observation input 1 from IOC. +// This event is configured by IOC:OBSAUXOUTPUT.SEL1. #define AUX_EVCTL_EVSTAT0_OBSMUX1 0x00000400 #define AUX_EVCTL_EVSTAT0_OBSMUX1_BITN 10 #define AUX_EVCTL_EVSTAT0_OBSMUX1_M 0x00000400 @@ -905,7 +916,9 @@ // Field: [9] OBSMUX0 // -// Current value of OBSMUX0 event line +// Observation input 0 from IOC. +// This event is configured by IOC:OBSAUXOUTPUT.SEL0 and can be overridden by +// IOC:OBSAUXOUTPUT.SEL_MISC. #define AUX_EVCTL_EVSTAT0_OBSMUX0 0x00000200 #define AUX_EVCTL_EVSTAT0_OBSMUX0_BITN 9 #define AUX_EVCTL_EVSTAT0_OBSMUX0_M 0x00000200 @@ -913,7 +926,7 @@ // Field: [8] ADC_FIFO_ALMOST_FULL // -// Current value of ADC_FIFO_ALMOST_FULL event line +// AUX_ANAIF:ADCFIFOSTAT.ALMOST_FULL #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL 0x00000100 #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL_BITN 8 #define AUX_EVCTL_EVSTAT0_ADC_FIFO_ALMOST_FULL_M 0x00000100 @@ -921,7 +934,7 @@ // Field: [7] ADC_DONE // -// Current value of ADC_DONE event line +// AUX_ANAIF ADC conversion done event. #define AUX_EVCTL_EVSTAT0_ADC_DONE 0x00000080 #define AUX_EVCTL_EVSTAT0_ADC_DONE_BITN 7 #define AUX_EVCTL_EVSTAT0_ADC_DONE_M 0x00000080 @@ -929,7 +942,7 @@ // Field: [6] SMPH_AUTOTAKE_DONE // -// Current value of SMPH_AUTOTAKE_DONE event line +// See AUX_SMPH:AUTOTAKE.SMPH_ID for description. #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE 0x00000040 #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE_BITN 6 #define AUX_EVCTL_EVSTAT0_SMPH_AUTOTAKE_DONE_M 0x00000040 @@ -937,7 +950,7 @@ // Field: [5] TIMER1_EV // -// Current value of TIMER1_EV event line +// AUX_TIMER1_EV event, see AUX_TIMER:T1TARGET for description. #define AUX_EVCTL_EVSTAT0_TIMER1_EV 0x00000020 #define AUX_EVCTL_EVSTAT0_TIMER1_EV_BITN 5 #define AUX_EVCTL_EVSTAT0_TIMER1_EV_M 0x00000020 @@ -945,7 +958,7 @@ // Field: [4] TIMER0_EV // -// Current value of TIMER0_EV event line +// AUX_TIMER0_EV event, see AUX_TIMER:T0TARGET for description. #define AUX_EVCTL_EVSTAT0_TIMER0_EV 0x00000010 #define AUX_EVCTL_EVSTAT0_TIMER0_EV_BITN 4 #define AUX_EVCTL_EVSTAT0_TIMER0_EV_M 0x00000010 @@ -953,7 +966,7 @@ // Field: [3] TDC_DONE // -// Current value of TDC_DONE event line +// AUX_TDC:STAT.DONE #define AUX_EVCTL_EVSTAT0_TDC_DONE 0x00000008 #define AUX_EVCTL_EVSTAT0_TDC_DONE_BITN 3 #define AUX_EVCTL_EVSTAT0_TDC_DONE_M 0x00000008 @@ -961,7 +974,7 @@ // Field: [2] AUX_COMPB // -// Current value of AUX_COMPB event line +// Comparator B output #define AUX_EVCTL_EVSTAT0_AUX_COMPB 0x00000004 #define AUX_EVCTL_EVSTAT0_AUX_COMPB_BITN 2 #define AUX_EVCTL_EVSTAT0_AUX_COMPB_M 0x00000004 @@ -969,7 +982,7 @@ // Field: [1] AUX_COMPA // -// Current value of AUX_COMPA event line +// Comparator A output #define AUX_EVCTL_EVSTAT0_AUX_COMPA 0x00000002 #define AUX_EVCTL_EVSTAT0_AUX_COMPA_BITN 1 #define AUX_EVCTL_EVSTAT0_AUX_COMPA_M 0x00000002 @@ -977,7 +990,7 @@ // Field: [0] AON_RTC_CH2 // -// Current value of AON_RTC_CH2 event line +// AON_RTC:EVFLAGS.CH2 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2 0x00000001 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2_BITN 0 #define AUX_EVCTL_EVSTAT0_AON_RTC_CH2_M 0x00000001 @@ -990,7 +1003,17 @@ //***************************************************************************** // Field: [15] ADC_IRQ // -// Current value of ADC_IRQ event line +// The logical function for this event is configurable. +// +// When DMACTL.EN = 1 : +// Event = UDMA0 Channel 7 done event OR +// AUX_ANAIF:ADCFIFOSTAT.OVERFLOW OR AUX_ANAIF:ADCFIFOSTAT.UNDERFLOW +// +// When DMACTL.EN = 0 : +// Event = (NOT AUX_ANAIF:ADCFIFOSTAT.EMPTY) OR +// AUX_ANAIF:ADCFIFOSTAT.OVERFLOW OR AUX_ANAIF:ADCFIFOSTAT.UNDERFLOW +// +// Bit 7 in UDMA0:DONEMASK must be 0. #define AUX_EVCTL_EVSTAT1_ADC_IRQ 0x00008000 #define AUX_EVCTL_EVSTAT1_ADC_IRQ_BITN 15 #define AUX_EVCTL_EVSTAT1_ADC_IRQ_M 0x00008000 @@ -998,7 +1021,7 @@ // Field: [14] MCU_EV // -// Current value of MCU_EV event line +// Event from EVENT configured by EVENT:AUXSEL0. #define AUX_EVCTL_EVSTAT1_MCU_EV 0x00004000 #define AUX_EVCTL_EVSTAT1_MCU_EV_BITN 14 #define AUX_EVCTL_EVSTAT1_MCU_EV_M 0x00004000 @@ -1006,7 +1029,9 @@ // Field: [13] ACLK_REF // -// Current value of ACLK_REF event line +// TDC reference clock. +// It is configured by DDI_0_OSC:CTL0.ACLK_REF_SRC_SEL and enabled by +// AUX_WUC:REFCLKCTL.REQ. #define AUX_EVCTL_EVSTAT1_ACLK_REF 0x00002000 #define AUX_EVCTL_EVSTAT1_ACLK_REF_BITN 13 #define AUX_EVCTL_EVSTAT1_ACLK_REF_M 0x00002000 @@ -1014,7 +1039,7 @@ // Field: [12] AUXIO15 // -// Current value of AUXIO15 input data line +// AUXIO15 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 7. #define AUX_EVCTL_EVSTAT1_AUXIO15 0x00001000 #define AUX_EVCTL_EVSTAT1_AUXIO15_BITN 12 #define AUX_EVCTL_EVSTAT1_AUXIO15_M 0x00001000 @@ -1022,7 +1047,7 @@ // Field: [11] AUXIO14 // -// Current value of AUXIO14 input data line +// AUXIO14 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 6. #define AUX_EVCTL_EVSTAT1_AUXIO14 0x00000800 #define AUX_EVCTL_EVSTAT1_AUXIO14_BITN 11 #define AUX_EVCTL_EVSTAT1_AUXIO14_M 0x00000800 @@ -1030,7 +1055,7 @@ // Field: [10] AUXIO13 // -// Current value of AUXIO13 input data line +// AUXIO13 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 5. #define AUX_EVCTL_EVSTAT1_AUXIO13 0x00000400 #define AUX_EVCTL_EVSTAT1_AUXIO13_BITN 10 #define AUX_EVCTL_EVSTAT1_AUXIO13_M 0x00000400 @@ -1038,7 +1063,7 @@ // Field: [9] AUXIO12 // -// Current value of AUXIO12 input data line +// AUXIO12 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 4. #define AUX_EVCTL_EVSTAT1_AUXIO12 0x00000200 #define AUX_EVCTL_EVSTAT1_AUXIO12_BITN 9 #define AUX_EVCTL_EVSTAT1_AUXIO12_M 0x00000200 @@ -1046,7 +1071,7 @@ // Field: [8] AUXIO11 // -// Current value of AUXIO11 input data line +// AUXIO11 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 3. #define AUX_EVCTL_EVSTAT1_AUXIO11 0x00000100 #define AUX_EVCTL_EVSTAT1_AUXIO11_BITN 8 #define AUX_EVCTL_EVSTAT1_AUXIO11_M 0x00000100 @@ -1054,7 +1079,7 @@ // Field: [7] AUXIO10 // -// Current value of AUXIO10 input data line +// AUXIO10 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 2. #define AUX_EVCTL_EVSTAT1_AUXIO10 0x00000080 #define AUX_EVCTL_EVSTAT1_AUXIO10_BITN 7 #define AUX_EVCTL_EVSTAT1_AUXIO10_M 0x00000080 @@ -1062,7 +1087,7 @@ // Field: [6] AUXIO9 // -// Current value of AUXIO9 input data line +// AUXIO9 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 1. #define AUX_EVCTL_EVSTAT1_AUXIO9 0x00000040 #define AUX_EVCTL_EVSTAT1_AUXIO9_BITN 6 #define AUX_EVCTL_EVSTAT1_AUXIO9_M 0x00000040 @@ -1070,7 +1095,7 @@ // Field: [5] AUXIO8 // -// Current value of AUXIO8 input data line +// AUXIO8 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 0. #define AUX_EVCTL_EVSTAT1_AUXIO8 0x00000020 #define AUX_EVCTL_EVSTAT1_AUXIO8_BITN 5 #define AUX_EVCTL_EVSTAT1_AUXIO8_M 0x00000020 @@ -1078,7 +1103,7 @@ // Field: [4] AUXIO7 // -// Current value of AUXIO7 input data line +// AUXIO7 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 7. #define AUX_EVCTL_EVSTAT1_AUXIO7 0x00000010 #define AUX_EVCTL_EVSTAT1_AUXIO7_BITN 4 #define AUX_EVCTL_EVSTAT1_AUXIO7_M 0x00000010 @@ -1086,7 +1111,7 @@ // Field: [3] AUXIO6 // -// Current value of AUXIO6 input data line +// AUXIO6 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 6. #define AUX_EVCTL_EVSTAT1_AUXIO6 0x00000008 #define AUX_EVCTL_EVSTAT1_AUXIO6_BITN 3 #define AUX_EVCTL_EVSTAT1_AUXIO6_M 0x00000008 @@ -1094,7 +1119,7 @@ // Field: [2] AUXIO5 // -// Current value of AUXIO5 input data line +// AUXIO5 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 5. #define AUX_EVCTL_EVSTAT1_AUXIO5 0x00000004 #define AUX_EVCTL_EVSTAT1_AUXIO5_BITN 2 #define AUX_EVCTL_EVSTAT1_AUXIO5_M 0x00000004 @@ -1102,7 +1127,7 @@ // Field: [1] AUXIO4 // -// Current value of AUXIO4 input data line +// AUXIO4 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 4. #define AUX_EVCTL_EVSTAT1_AUXIO4 0x00000002 #define AUX_EVCTL_EVSTAT1_AUXIO4_BITN 1 #define AUX_EVCTL_EVSTAT1_AUXIO4_M 0x00000002 @@ -1110,7 +1135,7 @@ // Field: [0] AUXIO3 // -// Current value of AUXIO3 input data line +// AUXIO3 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 3. #define AUX_EVCTL_EVSTAT1_AUXIO3 0x00000001 #define AUX_EVCTL_EVSTAT1_AUXIO3_BITN 0 #define AUX_EVCTL_EVSTAT1_AUXIO3_M 0x00000001 @@ -1123,7 +1148,7 @@ //***************************************************************************** // Field: [10] ADC_IRQ // -// Selects the event source level that sets EVTOMCUFLAGS.ADC_IRQ. +// Select the event source level that sets EVTOMCUFLAGS.ADC_IRQ. // ENUMs: // LOW Low level // HIGH High level @@ -1136,7 +1161,7 @@ // Field: [9] OBSMUX0 // -// Selects the event source level that sets EVTOMCUFLAGS.OBSMUX0. +// Select the event source level that sets EVTOMCUFLAGS.OBSMUX0. // ENUMs: // LOW Low level // HIGH High level @@ -1149,7 +1174,7 @@ // Field: [8] ADC_FIFO_ALMOST_FULL // -// Selects the event source level that sets EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. +// Select the event source level that sets EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. // ENUMs: // LOW Low level // HIGH High level @@ -1162,7 +1187,7 @@ // Field: [7] ADC_DONE // -// Selects the event source level that sets EVTOMCUFLAGS.ADC_DONE. +// Select the event source level that sets EVTOMCUFLAGS.ADC_DONE. // ENUMs: // LOW Low level // HIGH High level @@ -1175,7 +1200,7 @@ // Field: [6] SMPH_AUTOTAKE_DONE // -// Selects the event source level that sets EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. +// Select the event source level that sets EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. // ENUMs: // LOW Low level // HIGH High level @@ -1188,7 +1213,7 @@ // Field: [5] TIMER1_EV // -// Selects the event source level that sets EVTOMCUFLAGS.TIMER1_EV. +// Select the event source level that sets EVTOMCUFLAGS.TIMER1_EV. // ENUMs: // LOW Low level // HIGH High level @@ -1201,7 +1226,7 @@ // Field: [4] TIMER0_EV // -// Selects the event source level that sets EVTOMCUFLAGS.TIMER0_EV. +// Select the event source level that sets EVTOMCUFLAGS.TIMER0_EV. // ENUMs: // LOW Low level // HIGH High level @@ -1214,7 +1239,7 @@ // Field: [3] TDC_DONE // -// Selects the event source level that sets EVTOMCUFLAGS.TDC_DONE. +// Select the event source level that sets EVTOMCUFLAGS.TDC_DONE. // ENUMs: // LOW Low level // HIGH High level @@ -1227,7 +1252,7 @@ // Field: [2] AUX_COMPB // -// Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPB. +// Select the event source level that sets EVTOMCUFLAGS.AUX_COMPB. // ENUMs: // LOW Low level // HIGH High level @@ -1240,7 +1265,7 @@ // Field: [1] AUX_COMPA // -// Selects the event source level that sets EVTOMCUFLAGS.AUX_COMPA. +// Select the event source level that sets EVTOMCUFLAGS.AUX_COMPA. // ENUMs: // LOW Low level // HIGH High level @@ -1253,7 +1278,7 @@ // Field: [0] AON_WU_EV // -// Selects the event source level that sets EVTOMCUFLAGS.AON_WU_EV +// Select the event source level that sets EVTOMCUFLAGS.AON_WU_EV. // ENUMs: // LOW Low level // HIGH High level @@ -1271,7 +1296,8 @@ //***************************************************************************** // Field: [10] ADC_IRQ // -// ADC_IRQ event flag. +// This event flag is set when level selected by EVTOMCUPOL.ADC_IRQ occurs on +// EVSTAT0.ADC_IRQ. #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ 0x00000400 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ_BITN 10 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_IRQ_M 0x00000400 @@ -1279,7 +1305,8 @@ // Field: [9] OBSMUX0 // -// OBSMUX0 event flag. +// This event flag is set when level selected by EVTOMCUPOL.MCU_OBSMUX0 occurs +// on EVSTAT0.MCU_OBSMUX0. #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0 0x00000200 #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0_BITN 9 #define AUX_EVCTL_EVTOMCUFLAGS_OBSMUX0_M 0x00000200 @@ -1287,7 +1314,8 @@ // Field: [8] ADC_FIFO_ALMOST_FULL // -// ADC_FIFO_ALMOST_FULL event flag. +// This event flag is set when level selected by +// EVTOMCUPOL.ADC_FIFO_ALMOST_FULL occurs on EVSTAT0.ADC_FIFO_ALMOST_FULL. #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL 0x00000100 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL_BITN 8 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_FIFO_ALMOST_FULL_M 0x00000100 @@ -1295,7 +1323,8 @@ // Field: [7] ADC_DONE // -// ADC_DONE event flag. +// This event flag is set when level selected by EVTOMCUPOL.ADC_DONE occurs on +// EVSTAT0.ADC_DONE. #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE 0x00000080 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE_BITN 7 #define AUX_EVCTL_EVTOMCUFLAGS_ADC_DONE_M 0x00000080 @@ -1303,7 +1332,8 @@ // Field: [6] SMPH_AUTOTAKE_DONE // -// SMPH_AUTOTAKE_DONE event flag. +// This event flag is set when level selected by EVTOMCUPOL.SMPH_AUTOTAKE_DONE +// occurs on EVSTAT0.SMPH_AUTOTAKE_DONE. #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE 0x00000040 #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE_BITN 6 #define AUX_EVCTL_EVTOMCUFLAGS_SMPH_AUTOTAKE_DONE_M 0x00000040 @@ -1311,7 +1341,8 @@ // Field: [5] TIMER1_EV // -// TIMER1_EV event flag. +// This event flag is set when level selected by EVTOMCUPOL.TIMER1_EV occurs on +// EVSTAT0.TIMER1_EV. #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV 0x00000020 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV_BITN 5 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER1_EV_M 0x00000020 @@ -1319,7 +1350,8 @@ // Field: [4] TIMER0_EV // -// TIMER0_EV event flag. +// This event flag is set when level selected by EVTOMCUPOL.TIMER0_EV occurs on +// EVSTAT0.TIMER0_EV. #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV 0x00000010 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV_BITN 4 #define AUX_EVCTL_EVTOMCUFLAGS_TIMER0_EV_M 0x00000010 @@ -1327,7 +1359,8 @@ // Field: [3] TDC_DONE // -// TDC_DONE event flag. +// This event flag is set when level selected by EVTOMCUPOL.TDC_DONE occurs on +// EVSTAT0.TDC_DONE. #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE 0x00000008 #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE_BITN 3 #define AUX_EVCTL_EVTOMCUFLAGS_TDC_DONE_M 0x00000008 @@ -1335,7 +1368,8 @@ // Field: [2] AUX_COMPB // -// AUX_COMPB event flag. +// This event flag is set when edge selected by EVTOMCUPOL.AUX_COMPB occurs on +// EVSTAT0.AUX_COMPB. #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB 0x00000004 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_BITN 2 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_M 0x00000004 @@ -1343,7 +1377,8 @@ // Field: [1] AUX_COMPA // -// AUX_COMPA event flag. +// This event flag is set when edge selected by EVTOMCUPOL.AUX_COMPA occurs on +// EVSTAT0.AUX_COMPA. #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA 0x00000002 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_BITN 1 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_M 0x00000002 @@ -1351,10 +1386,9 @@ // Field: [0] AON_WU_EV // -// AON_WU_EV event flag. -// -// This is an OR of the AON_RTC_CH2, AON_PROG_WU and AON_SW events. These event -// sources must be cleared before clearing AON_WU_EV. +// This event flag is set when level selected by EVTOMCUPOL.AON_WU_EV occurs on +// the reduction-OR of the AUX_EVCTL:EVSTAT0.RTC_CH2_EV, +// AUX_EVCTL:EVSTAT0.AON_SW, and AUX_EVCTL:EVSTAT0.AON_PROG_WU events. #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV 0x00000001 #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV_BITN 0 #define AUX_EVCTL_EVTOMCUFLAGS_AON_WU_EV_M 0x00000001 @@ -1367,8 +1401,10 @@ //***************************************************************************** // Field: [10] ADC_IRQ // -// Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_IRQ contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.ADC_IRQ contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ 0x00000400 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ_BITN 10 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_IRQ_M 0x00000400 @@ -1376,8 +1412,10 @@ // Field: [9] OBSMUX0 // -// Includes (1) or excludes (0) EVTOMCUFLAGS.OBSMUX0 contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.MCU_OBSMUX0 contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0 0x00000200 #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0_BITN 9 #define AUX_EVCTL_COMBEVTOMCUMASK_OBSMUX0_M 0x00000200 @@ -1385,8 +1423,10 @@ // Field: [8] ADC_FIFO_ALMOST_FULL // -// Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL contribution -// to the AUX_COMB event. +// EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL 0x00000100 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL_BITN 8 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_FIFO_ALMOST_FULL_M 0x00000100 @@ -1394,8 +1434,10 @@ // Field: [7] ADC_DONE // -// Includes (1) or excludes (0) EVTOMCUFLAGS.ADC_DONE contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.ADC_DONE contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE 0x00000080 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE_BITN 7 #define AUX_EVCTL_COMBEVTOMCUMASK_ADC_DONE_M 0x00000080 @@ -1403,8 +1445,10 @@ // Field: [6] SMPH_AUTOTAKE_DONE // -// Includes (1) or excludes (0) EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE contribution to -// the AUX_COMB event. +// EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE 0x00000040 #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE_BITN 6 #define AUX_EVCTL_COMBEVTOMCUMASK_SMPH_AUTOTAKE_DONE_M 0x00000040 @@ -1412,8 +1456,10 @@ // Field: [5] TIMER1_EV // -// Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER1_EV contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.TIMER1_EV contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV 0x00000020 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV_BITN 5 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER1_EV_M 0x00000020 @@ -1421,8 +1467,10 @@ // Field: [4] TIMER0_EV // -// Includes (1) or excludes (0) EVTOMCUFLAGS.TIMER0_EV contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.TIMER0_EV contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV 0x00000010 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV_BITN 4 #define AUX_EVCTL_COMBEVTOMCUMASK_TIMER0_EV_M 0x00000010 @@ -1430,8 +1478,10 @@ // Field: [3] TDC_DONE // -// Includes (1) or excludes (0) EVTOMCUFLAGS.TDC_DONE contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.TDC_DONE contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE 0x00000008 #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE_BITN 3 #define AUX_EVCTL_COMBEVTOMCUMASK_TDC_DONE_M 0x00000008 @@ -1439,8 +1489,10 @@ // Field: [2] AUX_COMPB // -// Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPB contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.AUX_COMPB contribution to the AUX_COMB event. +// +// 0: Exclude +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB 0x00000004 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_BITN 2 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_M 0x00000004 @@ -1448,8 +1500,10 @@ // Field: [1] AUX_COMPA // -// Includes (1) or excludes (0) EVTOMCUFLAGS.AUX_COMPA contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.AUX_COMPA contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA 0x00000002 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_BITN 1 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_M 0x00000002 @@ -1457,8 +1511,10 @@ // Field: [0] AON_WU_EV // -// Includes (1) or excludes (0) EVTOMCUFLAGS.AON_WU_EV contribution to the -// AUX_COMB event. +// EVTOMCUFLAGS.AON_WU_EV contribution to the AUX_COMB event. +// +// 0: Exclude. +// 1: Include. #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV 0x00000001 #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV_BITN 0 #define AUX_EVCTL_COMBEVTOMCUMASK_AON_WU_EV_M 0x00000001 @@ -1471,6 +1527,8 @@ //***************************************************************************** // Field: [3] VEC3 // +// Vector flag 3. +// // The vector flag is set if the edge selected VECCFG1.VEC3_POL occurs on the // event selected in VECCFG1.VEC3_EV. // @@ -1483,6 +1541,8 @@ // Field: [2] VEC2 // +// Vector flag 2. +// // The vector flag is set if the edge selected VECCFG1.VEC2_POL occurs on the // event selected in VECCFG1.VEC2_EV. // @@ -1495,6 +1555,8 @@ // Field: [1] VEC1 // +// Vector flag 1. +// // The vector flag is set if the edge selected VECCFG0.VEC1_POL occurs on the // event selected in VECCFG0.VEC1_EV. // @@ -1507,6 +1569,8 @@ // Field: [0] VEC0 // +// Vector flag 0. +// // The vector flag is set if the edge selected VECCFG0.VEC0_POL occurs on the // event selected in VECCFG0.VEC0_EV. // @@ -1524,7 +1588,7 @@ //***************************************************************************** // Field: [10] ADC_IRQ // -// Writing 1 clears EVTOMCUFLAGS.ADC_IRQ. +// Write 1 to clear EVTOMCUFLAGS.ADC_IRQ. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_IRQ 0x00000400 @@ -1534,7 +1598,7 @@ // Field: [9] OBSMUX0 // -// Writing 1 clears EVTOMCUFLAGS.OBSMUX0. +// Write 1 to clear EVTOMCUFLAGS.MCU_OBSMUX0. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_OBSMUX0 0x00000200 @@ -1544,7 +1608,7 @@ // Field: [8] ADC_FIFO_ALMOST_FULL // -// Writing 1 clears EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. +// Write 1 to clear EVTOMCUFLAGS.ADC_FIFO_ALMOST_FULL. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_FIFO_ALMOST_FULL 0x00000100 @@ -1554,7 +1618,7 @@ // Field: [7] ADC_DONE // -// Writing 1 clears EVTOMCUFLAGS.ADC_DONE. +// Write 1 to clear EVTOMCUFLAGS.ADC_DONE. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_ADC_DONE 0x00000080 @@ -1564,7 +1628,7 @@ // Field: [6] SMPH_AUTOTAKE_DONE // -// Writing 1 clears [EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. +// Write 1 to clear EVTOMCUFLAGS.SMPH_AUTOTAKE_DONE. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_SMPH_AUTOTAKE_DONE 0x00000040 @@ -1574,7 +1638,7 @@ // Field: [5] TIMER1_EV // -// Writing 1 clears EVTOMCUFLAGS.TIMER1_EV. +// Write 1 to clear EVTOMCUFLAGS.TIMER1_EV. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER1_EV 0x00000020 @@ -1584,7 +1648,7 @@ // Field: [4] TIMER0_EV // -// Writing 1 clears EVTOMCUFLAGS.TIMER0_EV. +// Write 1 to clear EVTOMCUFLAGS.TIMER0_EV. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_TIMER0_EV 0x00000010 @@ -1594,7 +1658,7 @@ // Field: [3] TDC_DONE // -// Writing 1 clears EVTOMCUFLAGS.TDC_DONE. +// Write 1 to clear EVTOMCUFLAGS.TDC_DONE. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_TDC_DONE 0x00000008 @@ -1604,7 +1668,7 @@ // Field: [2] AUX_COMPB // -// Writing 1 clears EVTOMCUFLAGS.AUX_COMPB. +// Write 1 to clear EVTOMCUFLAGS.AUX_COMPB. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB 0x00000004 @@ -1614,7 +1678,7 @@ // Field: [1] AUX_COMPA // -// Writing 1 clears EVTOMCUFLAGS.AUX_COMPA. +// Write 1 to clear EVTOMCUFLAGS.AUX_COMPA. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA 0x00000002 @@ -1624,7 +1688,7 @@ // Field: [0] AON_WU_EV // -// Writing 1 clears EVTOMCUFLAGS.AON_WU_EV. +// Write 1 to clear EVTOMCUFLAGS.AON_WU_EV. // // Read value is 0. #define AUX_EVCTL_EVTOMCUFLAGSCLR_AON_WU_EV 0x00000001 @@ -1639,7 +1703,7 @@ //***************************************************************************** // Field: [8] TIMER1_EV // -// Writing 1 clears EVTOAONFLAGS.TIMER1_EV. +// Write 1 to clear EVTOAONFLAGS.TIMER1_EV. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER1_EV 0x00000100 @@ -1649,7 +1713,7 @@ // Field: [7] TIMER0_EV // -// Writing 1 clears EVTOAONFLAGS.TIMER0_EV. +// Write 1 to clear EVTOAONFLAGS.TIMER0_EV. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_TIMER0_EV 0x00000080 @@ -1659,7 +1723,7 @@ // Field: [6] TDC_DONE // -// Writing 1 clears EVTOAONFLAGS.TDC_DONE. +// Write 1 to clear EVTOAONFLAGS.TDC_DONE. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_TDC_DONE 0x00000040 @@ -1669,7 +1733,7 @@ // Field: [5] ADC_DONE // -// Writing 1 clears EVTOAONFLAGS.ADC_DONE. +// Write 1 to clear EVTOAONFLAGS.ADC_DONE. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_ADC_DONE 0x00000020 @@ -1679,7 +1743,7 @@ // Field: [4] AUX_COMPB // -// Writing 1 clears EVTOAONFLAGS.AUX_COMPB. +// Write 1 to clear EVTOAONFLAGS.AUX_COMPB. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB 0x00000010 @@ -1689,7 +1753,7 @@ // Field: [3] AUX_COMPA // -// Writing 1 clears EVTOAONFLAGS.AUX_COMPA. +// Write 1 to clear EVTOAONFLAGS.AUX_COMPA. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA 0x00000008 @@ -1699,7 +1763,7 @@ // Field: [2] SWEV2 // -// Writing 1 clears EVTOAONFLAGS.SWEV2. +// Write 1 to clear EVTOAONFLAGS.SWEV2. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2 0x00000004 @@ -1709,7 +1773,7 @@ // Field: [1] SWEV1 // -// Writing 1 clears EVTOAONFLAGS.SWEV1. +// Write 1 to clear EVTOAONFLAGS.SWEV1. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1 0x00000002 @@ -1719,7 +1783,7 @@ // Field: [0] SWEV0 // -// Writing 1 clears EVTOAONFLAGS.SWEV0. +// Write 1 to clear EVTOAONFLAGS.SWEV0. // // Read value is 0. #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0 0x00000001 @@ -1734,7 +1798,10 @@ //***************************************************************************** // Field: [3] VEC3 // -// Writing 1 clears VECFLAGS.VEC3. +// Clear vector flag 3. +// +// 0: No effect. +// 1: Clear VECFLAGS.VEC3. // // Read value is 0. #define AUX_EVCTL_VECFLAGSCLR_VEC3 0x00000008 @@ -1744,7 +1811,10 @@ // Field: [2] VEC2 // -// Writing 1 clears VECFLAGS.VEC2. +// Clear vector flag 2. +// +// 0: No effect. +// 1: Clear VECFLAGS.VEC2. // // Read value is 0. #define AUX_EVCTL_VECFLAGSCLR_VEC2 0x00000004 @@ -1754,7 +1824,10 @@ // Field: [1] VEC1 // -// Writing 1 clears VECFLAGS.VEC1. +// Clear vector flag 1. +// +// 0: No effect. +// 1: Clear VECFLAGS.VEC1. // // Read value is 0. #define AUX_EVCTL_VECFLAGSCLR_VEC1 0x00000002 @@ -1764,7 +1837,10 @@ // Field: [0] VEC0 // -// Writing 1 clears VECFLAGS.VEC0. +// Clear vector flag 0. +// +// 0: No effect. +// 1: Clear VECFLAGS.VEC0. // // Read value is 0. #define AUX_EVCTL_VECFLAGSCLR_VEC0 0x00000001 diff --git a/third_party/ti/devices/cc26x0/inc/hw_aux_smph.h b/third_party/ti/devices/cc26x0/inc/hw_aux_smph.h index 8d3287031..a8ea2d0e5 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_aux_smph.h +++ b/third_party/ti/devices/cc26x0/inc/hw_aux_smph.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_smph_h -* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017) -* Revision: 48345 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -67,7 +67,7 @@ // Semaphore 7 #define AUX_SMPH_O_SMPH7 0x0000001C -// Sticky Request For Single Semaphore +// Auto Take #define AUX_SMPH_O_AUTOTAKE 0x00000020 //***************************************************************************** @@ -77,13 +77,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH0_STAT 0x00000001 #define AUX_SMPH_SMPH0_STAT_BITN 0 #define AUX_SMPH_SMPH0_STAT_M 0x00000001 @@ -96,13 +100,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH1_STAT 0x00000001 #define AUX_SMPH_SMPH1_STAT_BITN 0 #define AUX_SMPH_SMPH1_STAT_M 0x00000001 @@ -115,13 +123,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH2_STAT 0x00000001 #define AUX_SMPH_SMPH2_STAT_BITN 0 #define AUX_SMPH_SMPH2_STAT_M 0x00000001 @@ -134,13 +146,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH3_STAT 0x00000001 #define AUX_SMPH_SMPH3_STAT_BITN 0 #define AUX_SMPH_SMPH3_STAT_M 0x00000001 @@ -153,13 +169,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH4_STAT 0x00000001 #define AUX_SMPH_SMPH4_STAT_BITN 0 #define AUX_SMPH_SMPH4_STAT_M 0x00000001 @@ -172,13 +192,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH5_STAT 0x00000001 #define AUX_SMPH_SMPH5_STAT_BITN 0 #define AUX_SMPH_SMPH5_STAT_M 0x00000001 @@ -191,13 +215,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH6_STAT 0x00000001 #define AUX_SMPH_SMPH6_STAT_BITN 0 #define AUX_SMPH_SMPH6_STAT_M 0x00000001 @@ -210,13 +238,17 @@ //***************************************************************************** // Field: [0] STAT // -// Status when reading: +// Request or release of semaphore. // -// 0: Semaphore was already taken -// 1: Semaphore was available and hence taken by this read access +// Request by read: // -// Reading the register causes it to change value to 0. Releasing the semaphore -// is done by writing 1 +// 0: Semaphore not available. +// 1: Semaphore granted. +// +// Release by write: +// +// 0: Do not use. +// 1: Release semaphore. #define AUX_SMPH_SMPH7_STAT 0x00000001 #define AUX_SMPH_SMPH7_STAT_BITN 0 #define AUX_SMPH_SMPH7_STAT_M 0x00000001 @@ -229,15 +261,19 @@ //***************************************************************************** // Field: [2:0] SMPH_ID // -// Requesting a certain semaphore is done by writing the corresponding -// semaphore ID, 0x0-0x7, to SMPH_ID. The request is sticky and once the -// semaphore becomes available it will be taken. At the same time, -// SMPH_AUTOTAKE_DONE event is asserted. This event is deasserted when SW -// releases the semaphore or a new ID is written to SMPH_ID. +// Write the semaphore ID,0x0-0x7, to SMPH_ID to request this semaphore until +// it is granted. // -// Note: SW must wait until SMPH_AUTOTAKE_DONE event is triggered before -// writing a new ID to SMPH_ID . Failing to do so might lead to permanently -// lost semaphores as the owners may be unknown +// When semaphore SMPH_ID is granted, event +// AUX_EVCTL:EVSTAT0.AUX_SMPH_AUTOTAKE_DONE becomes 1. +// +// The event becomes 0 when software releases the semaphore or writes a new +// value to SMPH_ID. +// +// To avoid corrupted semaphores: +// - Usage of this functionality must be restricted to one CPU core. +// - Software must wait until AUX_EVCTL:EVSTAT0.AUX_SMPH_AUTOTAKE_DONE is 1 +// before it writes a new value to SMPH_ID. #define AUX_SMPH_AUTOTAKE_SMPH_ID_W 3 #define AUX_SMPH_AUTOTAKE_SMPH_ID_M 0x00000007 #define AUX_SMPH_AUTOTAKE_SMPH_ID_S 0 diff --git a/third_party/ti/devices/cc26x0/inc/hw_aux_tdc.h b/third_party/ti/devices/cc26x0/inc/hw_aux_tdc.h index 51cb37095..69d68cb09 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_aux_tdc.h +++ b/third_party/ti/devices/cc26x0/inc/hw_aux_tdc.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_tdc_h -* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017) -* Revision: 48345 +* Revised: 2017-05-16 19:35:21 +0200 (Tue, 16 May 2017) +* Revision: 49005 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -80,31 +80,33 @@ //***************************************************************************** // Field: [1:0] CMD // -// TDC command strobes +// TDC commands. // ENUMs: -// ABORT This command forces the TDC back to IDLE state -// RUN This command makes the TDC FSM start and stop -// counting asynchronously. TDC measurement may -// start immediately if start is high and hence it -// may not give precise edge to edge measurements. -// Only recommended when start pulse is guaranteed -// to arrive at least 7 clock periods after the -// command -// RUN_SYNC_START This command makes the TDC FSM start counting -// synchronously to the first rising edge that -// follows a required falling edge of the start -// event. This guarantees an edge triggered start -// and is recommended for frequency measurements. -// A falling edge of the start event may be missed -// if the command is issued close to it in time, -// but the TDC will catch later falling edges and -// guarantee that a measurement starts -// synchronously to the rising edge of the start -// event -// CLR_RESULT This command clears STAT.SAT, STAT.DONE and -// results. Note: This is not needed as +// ABORT Force TDC state machine back to IDLE state. +// +// Never write this command +// while AUX_TDC:STAT.STATE equals CLR_CNT or +// WAIT_CLR_CNT_DONE. +// RUN Asynchronous counter start. +// +// The counter starts to +// count when the start event is high. To achieve +// precise edge-to-edge measurements you must +// ensure that the start event is low for at least +// 420 ns after you write this command. +// RUN_SYNC_START Synchronous counter start. +// +// The counter looks for the +// opposite edge of the selected start event +// before it starts to count when the selected +// edge occurs. This guarantees an edge-triggered +// start and is recommended for frequency +// measurements. +// CLR_RESULT Clear STAT.SAT, STAT.DONE, and RESULT.VALUE. +// +// This is not needed as // prerequisite for a measurement. Reliable clear -// is only guaranteed from IDLE state +// is only guaranteed from IDLE state. #define AUX_TDC_CTL_CMD_W 2 #define AUX_TDC_CTL_CMD_M 0x00000003 #define AUX_TDC_CTL_CMD_S 0 @@ -120,13 +122,13 @@ //***************************************************************************** // Field: [7] SAT // -// Saturation flag for TDC measurement +// TDC measurement saturation flag. // -// 0: Conversion has not saturated -// 1: Conversion stopped due to saturation +// 0: Conversion has not saturated. +// 1: Conversion stopped due to saturation. // -// This field is cleared when starting new measurement or setting CTL.CMD to -// CLR_RESULT +// This field is cleared when a new measurement is started or when CLR_RESULT +// is written to CTL.CMD. #define AUX_TDC_STAT_SAT 0x00000080 #define AUX_TDC_STAT_SAT_BITN 7 #define AUX_TDC_STAT_SAT_M 0x00000080 @@ -134,13 +136,13 @@ // Field: [6] DONE // -// Measurement complete flag +// TDC measurement complete flag. // -// 0: Measurement not yet complete -// 1: Measurement complete +// 0: TDC measurement has not yet completed. +// 1: TDC measurement has completed. // -// This field is cleared when starting new measurement or setting CTL.CMD to -// CLR_RESULT +// This field clears when a new TDC measurement starts or when you write +// CLR_RESULT to CTL.CMD. #define AUX_TDC_STAT_DONE 0x00000040 #define AUX_TDC_STAT_DONE_BITN 6 #define AUX_TDC_STAT_DONE_M 0x00000040 @@ -148,19 +150,48 @@ // Field: [5:0] STATE // -// TDC internal state machine status +// TDC state machine status. // ENUMs: -// FORCE_STOP Current state is TDC_FORCESTOP -// START_FALL Current state is TDC_WAIT_STARTFALL -// WAIT_CLR_CNT_DONE Current state is TDC_STATE_WAIT_CLRCNT_DONE -// POR Current state is TDC_STATE_POR -// GET_RESULT Current state is TDC_STATE_GETRESULTS -// WAIT_STOP_CNTDWN Current state is TDC_STATE_WAIT_STOPCNTDOWN -// WAIT_STOP Current state is TDC_STATE_WAIT_STOP -// CLR_CNT Current state is TDC_STATE_CLRCNT -// IDLE Current state is TDC_STATE_IDLE -// WAIT_START_STOP_CNT_EN Current state is TDC_STATE_WAIT_STARTSTOPCNTEN -// WAIT_START Current state is TDC_STATE_WAIT_START +// FORCE_STOP Current state is TDC_FORCESTOP. +// You wrote ABORT to +// CTL.CMD to abort the TDC measurement. +// START_FALL Current state is TDC_WAIT_STARTFALL. +// The fast-counter circuit +// waits for a falling edge on the start event. +// WAIT_CLR_CNT_DONE Current state is TDC_STATE_WAIT_CLRCNT_DONE. +// The state machine waits +// for fast-counter circuit to finish reset. +// POR Current state is TDC_STATE_POR. +// This is the reset state. +// GET_RESULT Current state is TDC_STATE_GETRESULTS. +// The state machine copies +// the counter value from the fast-counter +// circuit. +// WAIT_STOP_CNTDWN Current state is TDC_STATE_WAIT_STOPCNTDOWN. +// The fast-counter circuit +// looks for the stop condition. It will ignore a +// number of stop events configured in +// TRIGCNTLOAD.CNT. +// WAIT_STOP Current state is TDC_STATE_WAIT_STOP. +// The state machine waits +// for the fast-counter circuit to stop. +// CLR_CNT Current state is TDC_STATE_CLRCNT. The +// fast-counter circuit is reset. +// IDLE Current state is TDC_STATE_IDLE. +// This is the default state +// after reset and abortion. State will change +// when you write CTL.CMD to either RUN_SYNC_START +// or RUN. +// WAIT_START_STOP_CNT_EN Current state is TDC_STATE_WAIT_STARTSTOPCNTEN. +// The fast-counter circuit +// looks for the start condition. The state +// machine waits for the fast-counter to +// increment. +// WAIT_START Current state is TDC_STATE_WAIT_START. +// The fast-counter circuit +// looks for the start condition. The state +// machine waits for the fast-counter to +// increment. #define AUX_TDC_STAT_STATE_W 6 #define AUX_TDC_STAT_STATE_M 0x0000003F #define AUX_TDC_STAT_STATE_S 0 @@ -183,14 +214,16 @@ //***************************************************************************** // Field: [24:0] VALUE // -// Result of the TDC conversion. The result is in clock edges of the clock -// selected in DDI_0_OSC:CTL0.ACLK_TDC_SRC_SEL. Both rising and falling edges -// are counted. +// TDC conversion result. // -// When saturating the result is slightly higher than the saturation limit, -// since it takes a non-zero time to stop the measurement. The highest -// saturation limit is 24 bits (see SATCFG.LIMIT) so maximum value of VALUE is -// hence slightly above 2^24. +// The result of the TDC conversion is given in number of clock edges of the +// clock source selected in DDI_0_OSC:CTL0.ACLK_TDC_SRC_SEL. Both rising and +// falling edges are counted. +// +// If TDC counter saturates, VALUE is slightly higher than SATCFG.LIMIT, as it +// takes a non-zero time to stop the measurement. Hence, the maximum value of +// this field becomes slightly higher than 2^24 if you configure SATCFG.LIMIT +// to R24. #define AUX_TDC_RESULT_VALUE_W 25 #define AUX_TDC_RESULT_VALUE_M 0x01FFFFFF #define AUX_TDC_RESULT_VALUE_S 0 @@ -202,47 +235,38 @@ //***************************************************************************** // Field: [3:0] LIMIT // -// Select when the TDC times out. Values not enumerated are not supported +// Saturation limit. +// +// The flag STAT.SAT is set when the TDC counter saturates. +// +// Values not enumerated are not supported // ENUMs: -// R24 Result bit 24 : TDC saturates and stops when -// RESULT.VALUE[24] is set. The flag STAT.SAT is -// set when the timer saturates. -// R23 Result bit 23 : TDC saturates and stops when -// RESULT.VALUE[23] is set. The flag STAT.SAT is -// set when the timer saturates. -// R22 Result bit 22 : TDC saturates and stops when -// RESULT.VALUE[22] is set. The flag STAT.SAT is -// set when the timer saturates. -// R21 Result bit 21 : TDC saturates and stops when -// RESULT.VALUE[21] is set. The flag STAT.SAT is -// set when the timer saturates. -// R20 Result bit 20 : TDC saturates and stops when -// RESULT.VALUE[20] is set. The flag STAT.SAT is -// set when the timer saturates. -// R19 Result bit 19 : TDC saturates and stops when -// RESULT.VALUE[19] is set. The flag STAT.SAT is -// set when the timer saturates. -// R18 Result bit 18 : TDC saturates and stops when -// RESULT.VALUE[18] is set. The flag STAT.SAT is -// set when the timer saturates. -// R17 Result bit 17 : TDC saturates and stops when -// RESULT.VALUE[17] is set. The flag STAT.SAT is -// set when the timer saturates. -// R16 Result bit 16 : TDC saturates and stops when -// RESULT.VALUE[16] is set. The flag STAT.SAT is -// set when the timer saturates. -// R15 Result bit 15 : TDC saturates and stops when -// RESULT.VALUE[15] is set. The flag STAT.SAT is -// set when the timer saturates. -// R14 Result bit 14 : TDC saturates and stops when -// RESULT.VALUE[14] is set. The flag STAT.SAT is -// set when the timer saturates. -// R13 Result bit 13 : TDC saturates and stops when -// RESULT.VALUE[13] is set. The flag STAT.SAT is -// set when the timer saturates. -// R12 Result bit 12 : TDC saturates and stops when -// RESULT.VALUE[12] is set. The flag STAT.SAT is -// set when the timer saturates. +// R24 Result bit 24: TDC conversion saturates and stops +// when RESULT.VALUE[24] is set. +// R23 Result bit 23: TDC conversion saturates and stops +// when RESULT.VALUE[23] is set. +// R22 Result bit 22: TDC conversion saturates and stops +// when RESULT.VALUE[22] is set. +// R21 Result bit 21: TDC conversion saturates and stops +// when RESULT.VALUE[21] is set. +// R20 Result bit 20: TDC conversion saturates and stops +// when RESULT.VALUE[20] is set. +// R19 Result bit 19: TDC conversion saturates and stops +// when RESULT.VALUE[19] is set. +// R18 Result bit 18: TDC conversion saturates and stops +// when RESULT.VALUE[18] is set. +// R17 Result bit 17: TDC conversion saturates and stops +// when RESULT.VALUE[17] is set. +// R16 Result bit 16: TDC conversion saturates and stops +// when RESULT.VALUE[16] is set. +// R15 Result bit 15: TDC conversion saturates and stops +// when RESULT.VALUE[15] is set. +// R14 Result bit 14: TDC conversion saturates and stops +// when RESULT.VALUE[14] is set. +// R13 Result bit 13: TDC conversion saturates and stops +// when RESULT.VALUE[13] is set. +// R12 Result bit 12: TDC conversion saturates and stops +// when RESULT.VALUE[12] is set. #define AUX_TDC_SATCFG_LIMIT_W 4 #define AUX_TDC_SATCFG_LIMIT_M 0x0000000F #define AUX_TDC_SATCFG_LIMIT_S 0 @@ -267,11 +291,12 @@ //***************************************************************************** // Field: [13] STOP_POL // -// Polarity of stop signal. Note! Must not be changed if STAT.STATE is not -// IDLE +// Polarity of stop source. +// +// Change only while STAT.STATE is IDLE. // ENUMs: -// LOW TDC stops when low level is detected -// HIGH TDC stops when high level is detected +// LOW TDC conversion stops when low level is detected. +// HIGH TDC conversion stops when high level is detected. #define AUX_TDC_TRIGSRC_STOP_POL 0x00002000 #define AUX_TDC_TRIGSRC_STOP_POL_BITN 13 #define AUX_TDC_TRIGSRC_STOP_POL_M 0x00002000 @@ -281,41 +306,43 @@ // Field: [12:8] STOP_SRC // -// Selects the asynchronous stop signal Note! Must not be changed if -// STAT.STATE is not IDLE +// Select stop source from the asynchronous AUX event bus. +// +// Change only while STAT.STATE is IDLE. // ENUMs: -// TDC_PRE Selects TDC_PRE -// MCU_EV Selects MCU_EV -// ACLK_REF Selects ACLK_REF -// AUXIO15 Selects AUXIO15 -// AUXIO14 Selects AUXIO14 -// AUXIO13 Selects AUXIO13 -// AUXIO12 Selects AUXIO12 -// AUXIO11 Selects AUXIO11 -// AUXIO10 Selects AUXIO10 -// AUXIO9 Selects AUXIO9 -// AUXIO8 Selects AUXIO8 -// AUXIO7 Selects AUXIO7 -// AUXIO6 Selects AUXIO6 -// AUXIO5 Selects AUXIO5 -// AUXIO4 Selects AUXIO4 -// AUXIO3 Selects AUXIO3 -// AUXIO2 Selects AUXIO2 -// AUXIO1 Selects AUXIO1 -// AUXIO0 Selects AUXIO0 -// AON_PROG_WU Selects AON_PROG_WU -// AON_SW Selects AON_SW -// OBSMUX1 Selects OBSMUX1 -// OBSMUX0 Selects OBSMUX0 -// ADC_FIFO_ALMOST_FULL Selects ADC_FIFO_ALMOST_FULL -// ADC_DONE Selects ADC_DONE -// SMPH_AUTOTAKE_DONE Selects SMPH_AUTOTAKE_DONE -// TIMER1_EV Selects TIMER1_EV -// TIMER0_EV Selects TIMER0_EV -// ISRC_RESET Selects ISRC_RESET -// AUX_COMPB Selects AUX_COMPB -// AUX_COMPA Selects AUX_COMPA -// AON_RTC_CH2 Selects AON_RTC_CH2 +// TDC_PRE Select TDC Prescaler event which is generated by +// configuration of PRECTL. +// MCU_EV AUX_EVCTL:EVSTAT1.MCU_EV +// ACLK_REF AUX_EVCTL:EVSTAT1.ACLK_REF +// AUXIO15 AUX_EVCTL:EVSTAT1.AUXIO15 +// AUXIO14 AUX_EVCTL:EVSTAT1.AUXIO14 +// AUXIO13 AUX_EVCTL:EVSTAT1.AUXIO13 +// AUXIO12 AUX_EVCTL:EVSTAT1.AUXIO12 +// AUXIO11 AUX_EVCTL:EVSTAT1.AUXIO11 +// AUXIO10 AUX_EVCTL:EVSTAT1.AUXIO10 +// AUXIO9 AUX_EVCTL:EVSTAT1.AUXIO9 +// AUXIO8 AUX_EVCTL:EVSTAT1.AUXIO8 +// AUXIO7 AUX_EVCTL:EVSTAT1.AUXIO7 +// AUXIO6 AUX_EVCTL:EVSTAT1.AUXIO6 +// AUXIO5 AUX_EVCTL:EVSTAT1.AUXIO5 +// AUXIO4 AUX_EVCTL:EVSTAT1.AUXIO4 +// AUXIO3 AUX_EVCTL:EVSTAT1.AUXIO3 +// AUXIO2 AUX_EVCTL:EVSTAT0.AUXIO2 +// AUXIO1 AUX_EVCTL:EVSTAT0.AUXIO1 +// AUXIO0 AUX_EVCTL:EVSTAT0.AUXIO0 +// AON_PROG_WU AUX_EVCTL:EVSTAT0.AON_PROG_WU +// AON_SW AUX_EVCTL:EVSTAT0.AON_SW +// OBSMUX1 AUX_EVCTL:EVSTAT0.OBSMUX1 +// OBSMUX0 AUX_EVCTL:EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE AUX_EVCTL:EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV AUX_EVCTL:EVSTAT0.TIMER1_EV +// TIMER0_EV AUX_EVCTL:EVSTAT0.TIMER0_EV +// ISRC_RESET AUX_ANAIF:ISRCCTL.RESET_N +// AUX_COMPB AUX_EVCTL:EVSTAT0.AUX_COMPB +// AUX_COMPA AUX_EVCTL:EVSTAT0.AUX_COMPA +// AON_RTC_CH2 AUX_EVCTL:EVSTAT0.AON_RTC_CH2 #define AUX_TDC_TRIGSRC_STOP_SRC_W 5 #define AUX_TDC_TRIGSRC_STOP_SRC_M 0x00001F00 #define AUX_TDC_TRIGSRC_STOP_SRC_S 8 @@ -354,11 +381,12 @@ // Field: [5] START_POL // -// Polarity of start signal. Note! Must not be changed if STAT.STATE is not -// IDLE +// Polarity of start source. +// +// Change only while STAT.STATE is IDLE. // ENUMs: -// LOW TDC starts when low level is detected -// HIGH TDC starts when high level is detected +// LOW TDC conversion starts when low level is detected. +// HIGH TDC conversion starts when high level is detected. #define AUX_TDC_TRIGSRC_START_POL 0x00000020 #define AUX_TDC_TRIGSRC_START_POL_BITN 5 #define AUX_TDC_TRIGSRC_START_POL_M 0x00000020 @@ -368,41 +396,43 @@ // Field: [4:0] START_SRC // -// Selects the asynchronous start signal Note! Must not be changed if -// STAT.STATE is not IDLE +// Select start source from the asynchronous AUX event bus. +// +// Change only while STAT.STATE is IDLE. // ENUMs: -// TDC_PRE Selects TDC_PRE -// MCU_EV Selects MCU_EV -// ACLK_REF Selects ACLK_REF -// AUXIO15 Selects AUXIO15 -// AUXIO14 Selects AUXIO14 -// AUXIO13 Selects AUXIO13 -// AUXIO12 Selects AUXIO12 -// AUXIO11 Selects AUXIO11 -// AUXIO10 Selects AUXIO10 -// AUXIO9 Selects AUXIO9 -// AUXIO8 Selects AUXIO8 -// AUXIO7 Selects AUXIO7 -// AUXIO6 Selects AUXIO6 -// AUXIO5 Selects AUXIO5 -// AUXIO4 Selects AUXIO4 -// AUXIO3 Selects AUXIO3 -// AUXIO2 Selects AUXIO2 -// AUXIO1 Selects AUXIO1 -// AUXIO0 Selects AUXIO0 -// AON_PROG_WU Selects AON_PROG_WU -// AON_SW Selects AON_SW -// OBSMUX1 Selects OBSMUX1 -// OBSMUX0 Selects OBSMUX0 -// ADC_FIFO_ALMOST_FULL Selects ADC_FIFO_ALMOST_FULL -// ADC_DONE Selects ADC_DONE -// SMPH_AUTOTAKE_DONE Selects SMPH_AUTOTAKE_DONE -// TIMER1_EV Selects TIMER1_EV -// TIMER0_EV Selects TIMER0_EV -// ISRC_RESET Selects ISRC_RESET -// AUX_COMPB Selects AUX_COMPB -// AUX_COMPA Selects AUX_COMPA -// AON_RTC_CH2 Selects AON_RTC_CH2 +// TDC_PRE Select TDC Prescaler event which is generated by +// configuration of PRECTL. +// MCU_EV AUX_EVCTL:EVSTAT1.MCU_EV +// ACLK_REF AUX_EVCTL:EVSTAT1.ACLK_REF +// AUXIO15 AUX_EVCTL:EVSTAT1.AUXIO15 +// AUXIO14 AUX_EVCTL:EVSTAT1.AUXIO14 +// AUXIO13 AUX_EVCTL:EVSTAT1.AUXIO13 +// AUXIO12 AUX_EVCTL:EVSTAT1.AUXIO12 +// AUXIO11 AUX_EVCTL:EVSTAT1.AUXIO11 +// AUXIO10 AUX_EVCTL:EVSTAT1.AUXIO10 +// AUXIO9 AUX_EVCTL:EVSTAT1.AUXIO9 +// AUXIO8 AUX_EVCTL:EVSTAT1.AUXIO8 +// AUXIO7 AUX_EVCTL:EVSTAT1.AUXIO7 +// AUXIO6 AUX_EVCTL:EVSTAT1.AUXIO6 +// AUXIO5 AUX_EVCTL:EVSTAT1.AUXIO5 +// AUXIO4 AUX_EVCTL:EVSTAT1.AUXIO4 +// AUXIO3 AUX_EVCTL:EVSTAT1.AUXIO3 +// AUXIO2 AUX_EVCTL:EVSTAT0.AUXIO2 +// AUXIO1 AUX_EVCTL:EVSTAT0.AUXIO1 +// AUXIO0 AUX_EVCTL:EVSTAT0.AUXIO0 +// AON_PROG_WU AUX_EVCTL:EVSTAT0.AON_PROG_WU +// AON_SW AUX_EVCTL:EVSTAT0.AON_SW +// OBSMUX1 AUX_EVCTL:EVSTAT0.OBSMUX1 +// OBSMUX0 AUX_EVCTL:EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE AUX_EVCTL:EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV AUX_EVCTL:EVSTAT0.TIMER1_EV +// TIMER0_EV AUX_EVCTL:EVSTAT0.TIMER0_EV +// ISRC_RESET AUX_ANAIF:ISRCCTL.RESET_N +// AUX_COMPB AUX_EVCTL:EVSTAT0.AUX_COMPB +// AUX_COMPA AUX_EVCTL:EVSTAT0.AUX_COMPA +// AON_RTC_CH2 AUX_EVCTL:EVSTAT0.AON_RTC_CH2 #define AUX_TDC_TRIGSRC_START_SRC_W 5 #define AUX_TDC_TRIGSRC_START_SRC_M 0x0000001F #define AUX_TDC_TRIGSRC_START_SRC_S 0 @@ -446,14 +476,17 @@ //***************************************************************************** // Field: [15:0] CNT // -// Remaining number of stop events that will be ignored. Writing to this -// register updates the value. The CNT will be loaded with the value of -// TRIGCNTLOAD.CNT at the start of every measurement. +// Number of stop events to ignore when AUX_TDC:TRIGCNTCFG.EN is 1. // -// When the stop counter is enabled the first CNT-1 stop events is ignored -// after which the TDC will stop measurement on event number CNT +// Read CNT to get the remaining number of stop events to ignore during a TDC +// measurement. // -// Note! Must not be changed if STAT.STATE is not IDLE +// Write CNT to update the remaining number of stop events to ignore during a +// TDC measurement. The TDC measurement ignores updates of CNT if there are no +// more stop events left to ignore. +// +// When AUX_TDC:TRIGCNTCFG.EN is 1, TRIGCNTLOAD.CNT is loaded into CNT at the +// start of the measurement. #define AUX_TDC_TRIGCNT_CNT_W 16 #define AUX_TDC_TRIGCNT_CNT_M 0x0000FFFF #define AUX_TDC_TRIGCNT_CNT_S 0 @@ -465,14 +498,26 @@ //***************************************************************************** // Field: [15:0] CNT // -// Selects the number of stop events that will be ignored by the TDC. This can -// be used to measure multiple periods of a clock signal. The value written to -// this field is loaded into the stop counter at the start of each measurement. +// Number of stop events to ignore when AUX_TDC:TRIGCNTCFG.EN is 1. // -// Note! Both values 0 and 1 will make the TDC stop on the first event after -// the start event +// To measure frequency of an event source: +// - Set start event equal to stop event. +// - Set CNT to number of periods to measure. Both 0 and 1 values measures a +// single event source period. // -// Note! Must not be changed if STAT.STATE is not IDLE +// To measure pulse width of an event source: +// - Set start event source equal to stop event source. +// - Select different polarity for start and stop event. +// - Set CNT to 0. +// +// To measure time from the start event to the Nth stop event when N > 1: +// - Select different start and stop event source. +// - Set CNT to (N-1). +// +// See the Technical Reference Manual for event timing requirements. +// +// When AUX_TDC:TRIGCNTCFG.EN is 1, CNT is loaded into TRIGCNT.CNT at the start +// of the measurement. #define AUX_TDC_TRIGCNTLOAD_CNT_W 16 #define AUX_TDC_TRIGCNTLOAD_CNT_M 0x0000FFFF #define AUX_TDC_TRIGCNTLOAD_CNT_S 0 @@ -484,10 +529,12 @@ //***************************************************************************** // Field: [0] EN // -// Stop counter enable +// Enable stop-counter. // -// 0: Stop counter is disabled -// 1: Stop counter is enabled +// 0: Disable stop-counter. +// 1: Enable stop-counter. +// +// Change only while STAT.STATE is IDLE. #define AUX_TDC_TRIGCNTCFG_EN 0x00000001 #define AUX_TDC_TRIGCNTCFG_EN_BITN 0 #define AUX_TDC_TRIGCNTCFG_EN_M 0x00000001 @@ -500,10 +547,12 @@ //***************************************************************************** // Field: [7] RESET_N // -// Prescaler reset control +// Prescaler reset. // -// 0: Prescaler is held in reset -// 1: Prescaler is not held in reset +// 0: Reset prescaler. +// 1: Release reset of prescaler. +// +// AUX_TDC_PRE event becomes 0 when you reset the prescaler. #define AUX_TDC_PRECTL_RESET_N 0x00000080 #define AUX_TDC_PRECTL_RESET_N_BITN 7 #define AUX_TDC_PRECTL_RESET_N_M 0x00000080 @@ -511,17 +560,22 @@ // Field: [6] RATIO // -// Prescaler ratio. This controls how often an event is generated on the -// TDC_PRE line. After the prescaler is reset the event output TDC_PRE is 0. +// Prescaler ratio. +// +// This controls how often the AUX_TDC_PRE event is generated by the prescaler. // ENUMs: -// DIV64 Prescaler divides by 64. A rising edge on the -// output is generated for every 64 rising edges -// of the input (the output toggles on every 32th -// rising edge of the input). . -// DIV16 Prescaler divides by 16. A rising edge on the -// output is generated for every 16 rising edges -// of the input (the output toggles on every 8th -// rising edge of the input). +// DIV64 Prescaler divides input by 64. +// +// AUX_TDC_PRE event has a +// rising edge for every 64 rising edges of the +// input. AUX_TDC_PRE event toggles on every 32nd +// rising edge of the input. +// DIV16 Prescaler divides input by 16. +// +// AUX_TDC_PRE event has a +// rising edge for every 16 rising edges of the +// input. AUX_TDC_PRE event toggles on every 8th +// rising edge of the input. #define AUX_TDC_PRECTL_RATIO 0x00000040 #define AUX_TDC_PRECTL_RATIO_BITN 6 #define AUX_TDC_PRECTL_RATIO_M 0x00000040 @@ -531,41 +585,45 @@ // Field: [4:0] SRC // -// Selects event for prescaler to use as input -// Note! Only change when prescaler is in reset +// Prescaler event source. +// +// Select an event from the asynchronous AUX event bus to connect to the +// prescaler input. +// +// Configure only while RESET_N is 0. // ENUMs: -// ADC_IRQ -// MCU_EV -// ACLK_REF -// AUXIO15 -// AUXIO14 -// AUXIO13 -// AUXIO12 -// AUXIO11 -// AUXIO10 -// AUXIO9 -// AUXIO8 -// AUXIO7 -// AUXIO6 -// AUXIO5 -// AUXIO4 -// AUXIO3 -// AUXIO2 -// AUXIO1 -// AUXIO0 -// AON_PROG_WU -// AON_SW -// OBSMUX1 -// OBSMUX0 -// ADC_FIFO_ALMOST_FULL -// ADC_DONE -// SMPH_AUTOTAKE_DONE -// TIMER1_EV -// TIMER0_EV -// ISRC_RESET -// AUX_COMPB -// AUX_COMPA -// AON_RTC_CH2 +// ADC_IRQ AUX_EVCTL:EVSTAT1.ADC_IRQ +// MCU_EV AUX_EVCTL:EVSTAT1.MCU_EV +// ACLK_REF AUX_EVCTL:EVSTAT1.ACLK_REF +// AUXIO15 AUX_EVCTL:EVSTAT1.AUXIO15 +// AUXIO14 AUX_EVCTL:EVSTAT1.AUXIO14 +// AUXIO13 AUX_EVCTL:EVSTAT1.AUXIO13 +// AUXIO12 AUX_EVCTL:EVSTAT1.AUXIO12 +// AUXIO11 AUX_EVCTL:EVSTAT1.AUXIO11 +// AUXIO10 AUX_EVCTL:EVSTAT1.AUXIO10 +// AUXIO9 AUX_EVCTL:EVSTAT1.AUXIO9 +// AUXIO8 AUX_EVCTL:EVSTAT1.AUXIO8 +// AUXIO7 AUX_EVCTL:EVSTAT1.AUXIO7 +// AUXIO6 AUX_EVCTL:EVSTAT1.AUXIO6 +// AUXIO5 AUX_EVCTL:EVSTAT1.AUXIO5 +// AUXIO4 AUX_EVCTL:EVSTAT1.AUXIO4 +// AUXIO3 AUX_EVCTL:EVSTAT1.AUXIO3 +// AUXIO2 AUX_EVCTL:EVSTAT0.AUXIO2 +// AUXIO1 AUX_EVCTL:EVSTAT0.AUXIO1 +// AUXIO0 AUX_EVCTL:EVSTAT0.AUXIO0 +// AON_PROG_WU AUX_EVCTL:EVSTAT0.AON_PROG_WU +// AON_SW AUX_EVCTL:EVSTAT0.AON_SW +// OBSMUX1 AUX_EVCTL:EVSTAT0.OBSMUX1 +// OBSMUX0 AUX_EVCTL:EVSTAT0.OBSMUX0 +// ADC_FIFO_ALMOST_FULL AUX_EVCTL:EVSTAT0.ADC_FIFO_ALMOST_FULL +// ADC_DONE AUX_EVCTL:EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV AUX_EVCTL:EVSTAT0.TIMER1_EV +// TIMER0_EV AUX_EVCTL:EVSTAT0.TIMER0_EV +// ISRC_RESET AUX_ANAIF:ISRCCTL.RESET_N +// AUX_COMPB AUX_EVCTL:EVSTAT0.AUX_COMPB +// AUX_COMPA AUX_EVCTL:EVSTAT0.AUX_COMPA +// AON_RTC_CH2 AUX_EVCTL:EVSTAT0.AON_RTC_CH2 #define AUX_TDC_PRECTL_SRC_W 5 #define AUX_TDC_PRECTL_SRC_M 0x0000001F #define AUX_TDC_PRECTL_SRC_S 0 @@ -609,10 +667,25 @@ //***************************************************************************** // Field: [15:0] CNT // -// Writing to this register will latch the contents of the 16 bit prescaler -// counter (The value written is don't care). +// Prescaler counter value. // -// Reading will return the latched value. +// Write a value to CNT to capture the value of the 16-bit prescaler counter +// into CNT. Read CNT to get the captured value. +// +// The read value gets 1 LSB uncertainty if the event source level rises when +// you release the reset. +// +// You must capture the prescaler counter value when the event source level is +// stable, either high or low: +// - Disable AUX I/O input buffer to clamp AUXIO event low. +// - Disable COMPA to clamp AUX_COMPA event low. +// The read value can in general get 1 LSB uncertainty when you gate the event +// source asynchronously. +// +// Please note the following: +// - The prescaler counter is reset to 2 by PRECTL.RESET_N. +// - The captured value is 2 when the number of rising edges on prescaler input +// is less than 3. Otherwise, captured value equals number of event pulses - 1. #define AUX_TDC_PRECNT_CNT_W 16 #define AUX_TDC_PRECNT_CNT_M 0x0000FFFF #define AUX_TDC_PRECNT_CNT_S 0 diff --git a/third_party/ti/devices/cc26x0/inc/hw_aux_timer.h b/third_party/ti/devices/cc26x0/inc/hw_aux_timer.h index b69f8f049..ad58a779e 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_aux_timer.h +++ b/third_party/ti/devices/cc26x0/inc/hw_aux_timer.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_aux_timer_h -* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017) -* Revision: 48345 +* Revised: 2017-05-22 18:50:33 +0200 (Mon, 22 May 2017) +* Revision: 49040 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. @@ -68,10 +68,10 @@ //***************************************************************************** // Field: [13] TICK_SRC_POL // -// Source count polarity for timer 0 +// Tick source polarity for Timer 0. // ENUMs: -// FALL Count on falling edges of TICK_SRC -// RISE Count on rising edges of TICK_SRC +// FALL Count on falling edges of TICK_SRC. +// RISE Count on rising edges of TICK_SRC. #define AUX_TIMER_T0CFG_TICK_SRC_POL 0x00002000 #define AUX_TIMER_T0CFG_TICK_SRC_POL_BITN 13 #define AUX_TIMER_T0CFG_TICK_SRC_POL_M 0x00002000 @@ -81,39 +81,40 @@ // Field: [12:8] TICK_SRC // -// Selected tick source for timer 0 +// Select Timer 0 tick source from the synchronous event bus. // ENUMs: -// ADC_IRQ Selects ADC_IRQ -// MCU_EVENT Selects MCU_EV -// ACLK_REF Selects ACLK_REF -// AUXIO15 Selects AUXIO15 -// AUXIO14 Selects AUXIO14 -// AUXIO13 Selects AUXIO13 -// AUXIO12 Selects AUXIO12 -// AUXIO11 Selects AUXIO11 -// AUXIO10 Selects AUXIO10 -// AUXIO9 Selects AUXIO9 -// AUXIO8 Selects AUXIO8 -// AUXIO7 Selects AUXIO7 -// AUXIO6 Selects AUXIO6 -// AUXIO5 Selects AUXIO5 -// AUXIO4 Selects AUXIO4 -// AUXIO3 Selects AUXIO3 -// AUXIO2 Selects AUXIO2 -// AUXIO1 Selects AUXIO1 -// AUXIO0 Selects AUXIO0 -// AON_PROG_WU Selects AON_PROG_WU -// AON_SW Selects AON_SW -// OBSMUX1 Selects OBSMUX1 -// OBSMUX0 Selects OBSMUX0 -// RTC_4KHZ Selects RTC_4KHZ -// ADC_DONE Selects ADC_DONE -// SMPH_AUTOTAKE_DONE Selects SMPH_AUTOTAKE_DONE -// TIMER1_EV Selects TIMER1_EV -// TDC_DONE Selects TDC_DONE -// AUX_COMPB Selects AUX_COMPB -// AUX_COMPA Selects AUX_COMPA -// RTC_CH2_EV Selects RTC_CH2_EV +// ADC_IRQ AUX_EVCTL:EVSTAT1.ADC_IRQ +// MCU_EVENT AUX_EVCTL:EVSTAT1.MCU_EV +// ACLK_REF AUX_EVCTL:EVSTAT1.ACLK_REF +// AUXIO15 AUX_EVCTL:EVSTAT1.AUXIO15 +// AUXIO14 AUX_EVCTL:EVSTAT1.AUXIO14 +// AUXIO13 AUX_EVCTL:EVSTAT1.AUXIO13 +// AUXIO12 AUX_EVCTL:EVSTAT1.AUXIO12 +// AUXIO11 AUX_EVCTL:EVSTAT1.AUXIO11 +// AUXIO10 AUX_EVCTL:EVSTAT1.AUXIO10 +// AUXIO9 AUX_EVCTL:EVSTAT1.AUXIO9 +// AUXIO8 AUX_EVCTL:EVSTAT1.AUXIO8 +// AUXIO7 AUX_EVCTL:EVSTAT1.AUXIO7 +// AUXIO6 AUX_EVCTL:EVSTAT1.AUXIO6 +// AUXIO5 AUX_EVCTL:EVSTAT1.AUXIO5 +// AUXIO4 AUX_EVCTL:EVSTAT1.AUXIO4 +// AUXIO3 AUX_EVCTL:EVSTAT1.AUXIO3 +// AUXIO2 AUX_EVCTL:EVSTAT0.AUXIO2 +// AUXIO1 AUX_EVCTL:EVSTAT0.AUXIO1 +// AUXIO0 AUX_EVCTL:EVSTAT0.AUXIO0 +// AON_PROG_WU AUX_EVCTL:EVSTAT0.AON_PROG_WU +// AON_SW AUX_EVCTL:EVSTAT0.AON_SW +// OBSMUX1 AUX_EVCTL:EVSTAT0.OBSMUX1 +// OBSMUX0 AUX_EVCTL:EVSTAT0.OBSMUX0 +// RTC_4KHZ AON_RTC:SUBSEC.VALUE bit 19. +// AON_RTC:CTL.RTC_4KHZ_EN enables this event. +// ADC_DONE AUX_EVCTL:EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER1_EV AUX_EVCTL:EVSTAT0.TIMER1_EV +// TDC_DONE AUX_EVCTL:EVSTAT0.TDC_DONE +// AUX_COMPB AUX_EVCTL:EVSTAT0.AUX_COMPB +// AUX_COMPA AUX_EVCTL:EVSTAT0.AUX_COMPA +// RTC_CH2_EV AUX_EVCTL:EVSTAT0.AON_RTC_CH2 #define AUX_TIMER_T0CFG_TICK_SRC_W 5 #define AUX_TIMER_T0CFG_TICK_SRC_M 0x00001F00 #define AUX_TIMER_T0CFG_TICK_SRC_S 8 @@ -151,20 +152,25 @@ // Field: [7:4] PRE // -// Prescaler division ratio is 2^PRE +// Prescaler division ratio is 2^PRE: +// +// 0x0: Divide by 1. +// 0x1: Divide by 2. +// 0x2: Divide by 4. +// ... +// 0xF: Divide by 32,768. #define AUX_TIMER_T0CFG_PRE_W 4 #define AUX_TIMER_T0CFG_PRE_M 0x000000F0 #define AUX_TIMER_T0CFG_PRE_S 4 // Field: [1] MODE // -// Timer 0 mode +// Timer 0 mode. +// +// Configure source for Timer 0 prescaler. // ENUMs: -// TICK Timer 0 counter increments only on edges of the -// event set by TICK_SRC. The events are divided -// by the PRE setting. -// CLK Timer 0 increments on every 2^PRE edges of AUX -// clock +// TICK Use event set by TICK_SRC as source for prescaler. +// CLK Use AUX clock as source for prescaler. #define AUX_TIMER_T0CFG_MODE 0x00000002 #define AUX_TIMER_T0CFG_MODE_BITN 1 #define AUX_TIMER_T0CFG_MODE_M 0x00000002 @@ -174,11 +180,19 @@ // Field: [0] RELOAD // -// Timer 0 reload setting +// Timer 0 reload mode. // ENUMs: -// CONT Timer is automatically restarted when target is -// reached -// MAN Timer has to be restarted manually +// CONT Continuous mode. +// +// Timer 0 restarts when the +// counter value becomes equal to or greater than +// ( T0TARGET.VALUE - 1). +// MAN Manual mode. +// +// Timer 0 stops and +// T0CTL.EN becomes 0 when the counter value +// becomes equal to or greater than +// T0TARGET.VALUE. #define AUX_TIMER_T0CFG_RELOAD 0x00000001 #define AUX_TIMER_T0CFG_RELOAD_BITN 0 #define AUX_TIMER_T0CFG_RELOAD_M 0x00000001 @@ -193,10 +207,10 @@ //***************************************************************************** // Field: [13] TICK_SRC_POL // -// Source count polarity for timer 1 +// Tick source polarity for Timer 1. // ENUMs: -// FALL Count on falling edges of TICK_SRC -// RISE Count on rising edges of TICK_SRC +// FALL Count on falling edges of TICK_SRC. +// RISE Count on rising edges of TICK_SRC. #define AUX_TIMER_T1CFG_TICK_SRC_POL 0x00002000 #define AUX_TIMER_T1CFG_TICK_SRC_POL_BITN 13 #define AUX_TIMER_T1CFG_TICK_SRC_POL_M 0x00002000 @@ -206,39 +220,40 @@ // Field: [12:8] TICK_SRC // -// Selected tick source for timer 1 +// Select Timer 1 tick source from the synchronous event bus. // ENUMs: -// ADC_IRQ Selects ADC_IRQ -// MCU_EVENT Selects MCU_EV -// ACLK_REF Selects ACLK_REF -// AUXIO15 Selects AUXIO15 -// AUXIO14 Selects AUXIO14 -// AUXIO13 Selects AUXIO13 -// AUXIO12 Selects AUXIO12 -// AUXIO11 Selects AUXIO11 -// AUXIO10 Selects AUXIO10 -// AUXIO9 Selects AUXIO9 -// AUXIO8 Selects AUXIO8 -// AUXIO7 Selects AUXIO7 -// AUXIO6 Selects AUXIO6 -// AUXIO5 Selects AUXIO5 -// AUXIO4 Selects AUXIO4 -// AUXIO3 Selects AUXIO3 -// AUXIO2 Selects AUXIO2 -// AUXIO1 Selects AUXIO1 -// AUXIO0 Selects AUXIO0 -// AON_PROG_WU Selects AON_PROG_WU -// AON_SW Selects AON_SW -// OBSMUX1 Selects OBSMUX1 -// OBSMUX0 Selects OBSMUX0 -// RTC_4KHZ Selects RTC_4KHZ -// ADC_DONE Selects ADC_DONE -// SMPH_AUTOTAKE_DONE Selects SMPH_AUTOTAKE_DONE -// TIMER0_EV Selects TIMER0_EV -// TDC_DONE Selects TDC_DONE -// AUX_COMPB Selects AUX_COMPB -// AUX_COMPA Selects AUX_COMPA -// RTC_CH2_EV Selects RTC_CH2_EV +// ADC_IRQ AUX_EVCTL:EVSTAT1.ADC_IRQ +// MCU_EVENT AUX_EVCTL:EVSTAT1.MCU_EV +// ACLK_REF AUX_EVCTL:EVSTAT1.ACLK_REF +// AUXIO15 AUX_EVCTL:EVSTAT1.AUXIO15 +// AUXIO14 AUX_EVCTL:EVSTAT1.AUXIO14 +// AUXIO13 AUX_EVCTL:EVSTAT1.AUXIO13 +// AUXIO12 AUX_EVCTL:EVSTAT1.AUXIO12 +// AUXIO11 AUX_EVCTL:EVSTAT1.AUXIO11 +// AUXIO10 AUX_EVCTL:EVSTAT1.AUXIO10 +// AUXIO9 AUX_EVCTL:EVSTAT1.AUXIO9 +// AUXIO8 AUX_EVCTL:EVSTAT1.AUXIO8 +// AUXIO7 AUX_EVCTL:EVSTAT1.AUXIO7 +// AUXIO6 AUX_EVCTL:EVSTAT1.AUXIO6 +// AUXIO5 AUX_EVCTL:EVSTAT1.AUXIO5 +// AUXIO4 AUX_EVCTL:EVSTAT1.AUXIO4 +// AUXIO3 AUX_EVCTL:EVSTAT1.AUXIO3 +// AUXIO2 AUX_EVCTL:EVSTAT0.AUXIO2 +// AUXIO1 AUX_EVCTL:EVSTAT0.AUXIO1 +// AUXIO0 AUX_EVCTL:EVSTAT0.AUXIO0 +// AON_PROG_WU AUX_EVCTL:EVSTAT0.AON_PROG_WU +// AON_SW AUX_EVCTL:EVSTAT0.AON_SW +// OBSMUX1 AUX_EVCTL:EVSTAT0.OBSMUX1 +// OBSMUX0 AUX_EVCTL:EVSTAT0.OBSMUX0 +// RTC_4KHZ AON_RTC:SUBSEC.VALUE bit 19. +// AON_RTC:CTL.RTC_4KHZ_EN enables this event. +// ADC_DONE AUX_EVCTL:EVSTAT0.ADC_DONE +// SMPH_AUTOTAKE_DONE AUX_EVCTL:EVSTAT0.SMPH_AUTOTAKE_DONE +// TIMER0_EV AUX_EVCTL:EVSTAT0.TIMER0_EV +// TDC_DONE AUX_EVCTL:EVSTAT0.TDC_DONE +// AUX_COMPB AUX_EVCTL:EVSTAT0.AUX_COMPB +// AUX_COMPA AUX_EVCTL:EVSTAT0.AUX_COMPA +// RTC_CH2_EV AUX_EVCTL:EVSTAT0.AON_RTC_CH2 #define AUX_TIMER_T1CFG_TICK_SRC_W 5 #define AUX_TIMER_T1CFG_TICK_SRC_M 0x00001F00 #define AUX_TIMER_T1CFG_TICK_SRC_S 8 @@ -276,20 +291,25 @@ // Field: [7:4] PRE // -// Prescaler division ratio is 2^PRE +// Prescaler division ratio is 2^PRE: +// +// 0x0: Divide by 1. +// 0x1: Divide by 2. +// 0x2: Divide by 4. +// ... +// 0xF: Divide by 32,768. #define AUX_TIMER_T1CFG_PRE_W 4 #define AUX_TIMER_T1CFG_PRE_M 0x000000F0 #define AUX_TIMER_T1CFG_PRE_S 4 // Field: [1] MODE // -// Timer 1 mode +// Timer 1 mode. +// +// Configure source for Timer 1 prescaler. // ENUMs: -// TICK Timer 1 counter increments only on edges of the -// event set by TICK_SRC. The events are divided -// by the PRE setting. -// CLK Timer 1 increments on every 2^PRE edges of AUX -// clock +// TICK Use event set by TICK_SRC as source for prescaler. +// CLK Use AUX clock as source for prescaler. #define AUX_TIMER_T1CFG_MODE 0x00000002 #define AUX_TIMER_T1CFG_MODE_BITN 1 #define AUX_TIMER_T1CFG_MODE_M 0x00000002 @@ -299,11 +319,19 @@ // Field: [0] RELOAD // -// Timer 1 reload setting +// Timer 1 reload mode. // ENUMs: -// CONT Timer is automatically restarted when target is -// reached -// MAN Timer has to be restarted manually +// CONT Continuous mode. +// +// Timer 1 restarts when the +// counter value becomes equal to or greater than +// ( T1TARGET.VALUE - 1). +// MAN Manual mode. +// +// Timer 1 stops and +// T1CTL.EN becomes 0 when the counter value +// becomes equal to or greater than +// T1TARGET.VALUE. #define AUX_TIMER_T1CFG_RELOAD 0x00000001 #define AUX_TIMER_T1CFG_RELOAD_BITN 0 #define AUX_TIMER_T1CFG_RELOAD_M 0x00000001 @@ -318,12 +346,12 @@ //***************************************************************************** // Field: [0] EN // -// Timer 0 run enable control. The counter restarts when enabling the timer. If -// T0CFG.RELOAD = 0, the timer is automatically disabled when reaching -// T0TARGET.VALUE +// Timer 0 enable. // -// 0: Disable timer 0 -// 1: Enable timer 0 +// 0: Disable Timer 0. +// 1: Enable Timer 0. +// +// The counter restarts from 0 when you enable Timer 0. #define AUX_TIMER_T0CTL_EN 0x00000001 #define AUX_TIMER_T0CTL_EN_BITN 0 #define AUX_TIMER_T0CTL_EN_M 0x00000001 @@ -336,13 +364,29 @@ //***************************************************************************** // Field: [15:0] VALUE // -// Timer 0 counts from 0 to VALUE. Then gives an event and restarts if -// configured to do to so in the T0CFG.RELOAD setting. If VALUE is changed -// while timer 0 is running so that the count becomes higher than VALUE timer 0 -// will also restart if configured to do so. +// Timer 0 target value. // -// If T0CFG.MODE=0,no prescaler is used, and VALUE equals 1, the TIMER0_EV -// event line will be always set +// Manual Reload Mode: +// - Timer 0 increments until the counter value becomes equal to or greater +// than VALUE. +// - AUX_TIMER0_EV pulses high for 1 AUX clock period when the counter value is +// equal to or greater than VALUE. +// +// Note: When VALUE is 0, Timer 0 counts to 1. AUX_TIMER0_EV pulses high for 1 +// AUX clock period. +// +// Continuous Reload Mode: +// - Timer 0 increments until the counter value becomes equal to or greater +// than ( VALUE - 1), then restarts from 0. +// - AUX_TIMER0_EV pulses high for 1 AUX clock period when the counter value is +// 0, except for when you enable the timer. +// +// Note: When VALUE is less than 2, Timer 0 counter value remains 0. +// AUX_TIMER0_EV goes high and remains high 1 AUX clock period after you enable +// the timer. +// +// +// It is allowed to update the VALUE while the timer runs. #define AUX_TIMER_T0TARGET_VALUE_W 16 #define AUX_TIMER_T0TARGET_VALUE_M 0x0000FFFF #define AUX_TIMER_T0TARGET_VALUE_S 0 @@ -354,13 +398,29 @@ //***************************************************************************** // Field: [7:0] VALUE // -// Timer 1 counts from 0 to VALUE. Then gives an event and restarts if -// configured to do to so in the T1CFG.RELOAD setting. If VALUE is changed -// while timer 1 is running so that the count becomes higher than VALUE timer 1 -// will also restart if configured to do so. +// Timer 1 target value. // -// If T1CFG.MODE=0,no prescaler is used, and VALUE equals 1, the TIMER1_EV -// event line will be always set +// Manual Reload Mode: +// - Timer 1 increments until the counter value becomes equal to or greater +// than VALUE. +// - AUX_TIMER1_EV pulses high for 1 AUX clock period when the counter value is +// equal to or greater than VALUE. +// +// Note: When VALUE is 0, Timer 1 counts to 1. AUX_TIMER1_EV pulses high for 1 +// AUX clock period. +// +// Continuous Reload Mode: +// - Timer 1 increments until the counter value becomes equal to or greater +// than ( VALUE - 1), then restarts from 0. +// - AUX_TIMER1_EV pulses high for 1 AUX clock period when the counter value is +// 0, except for when you enable the timer. +// +// Note: When VALUE is less than 2, Timer 1 counter value remains 0. +// AUX_TIMER1_EV goes high and remains high 1 AUX clock period after you enable +// the timer. +// +// +// It is allowed to update the VALUE while the timer runs. #define AUX_TIMER_T1TARGET_VALUE_W 8 #define AUX_TIMER_T1TARGET_VALUE_M 0x000000FF #define AUX_TIMER_T1TARGET_VALUE_S 0 @@ -372,12 +432,12 @@ //***************************************************************************** // Field: [0] EN // -// Timer 1 run enable control. The counter restarts when enabling the timer. If -// T1CFG.RELOAD = 0, the timer is automatically disabled when reaching -// T1TARGET.VALUE +// Timer 1 enable. // -// 0: Disable timer 1 -// 1: Enable timer 1 +// 0: Disable Timer 1. +// 1: Enable Timer 1. +// +// The counter restarts from 0 when you enable Timer 1. #define AUX_TIMER_T1CTL_EN 0x00000001 #define AUX_TIMER_T1CTL_EN_BITN 0 #define AUX_TIMER_T1CTL_EN_M 0x00000001 diff --git a/third_party/ti/devices/cc26x0/inc/hw_chip_def.h b/third_party/ti/devices/cc26x0/inc/hw_chip_def.h index 03a65df2a..42255c69c 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_chip_def.h +++ b/third_party/ti/devices/cc26x0/inc/hw_chip_def.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_chip_def.h -* Revised: 2016-11-17 16:01:57 +0100 (Thu, 17 Nov 2016) -* Revision: 47704 +* Revised: 2017-06-26 09:33:33 +0200 (Mon, 26 Jun 2017) +* Revision: 49227 * * Description: Defines for device properties. * @@ -152,6 +152,45 @@ extern "C" #define CC_CHIP_ID 0x13500420 #elif defined(CC1350F128_R20) || defined(CC1350F128) #define CC_CHIP_ID 0x13500020 +/* CC2640R2F */ +#elif defined(CC2640R2FRGZ_R25) || defined(CC2640R2FRGZ) + #define CC_CHIP_ID 0x26401710 +#elif defined(CC2640R2FRHB_R25) || defined(CC2640R2FRHB) + #define CC_CHIP_ID 0x26401510 +#elif defined(CC2640R2FRSM_R25) || defined(CC2640R2FRSM) + #define CC_CHIP_ID 0x26401410 +#elif defined(CC2640R2F_R25) || defined(CC2640R2F) + #define CC_CHIP_ID 0x26401010 +/* CC2652R1F */ +#elif defined(CC2652R1FRGZ_R10) || defined(CC2652R1FRGZ) + #define CC_CHIP_ID 0x26523710 +#elif defined(CC2652R1F_R10) || defined(CC2652R1F) + #define CC_CHIP_ID 0x26523010 +/* CC2644R1F */ +#elif defined(CC2644R1FRGZ_R10) || defined(CC2644R1FRGZ) + #define CC_CHIP_ID 0x26443710 +#elif defined(CC2644R1F_R10) || defined(CC2644R1F) + #define CC_CHIP_ID 0x26443010 +/* CC2642R1F */ +#elif defined(CC2642R1FRGZ_R10) || defined(CC2642R1FRGZ) + #define CC_CHIP_ID 0x26423710 +#elif defined(CC2642R1F_R10) || defined(CC2642R1F) + #define CC_CHIP_ID 0x26423010 +/* CC1354R1F */ +#elif defined(CC1354R1FRGZ_R10) || defined(CC1354R1FRGZ) + #define CC_CHIP_ID 0x13543710 +#elif defined(CC1354R1F_R10) || defined(CC1354R1F) + #define CC_CHIP_ID 0x13543010 +/* CC1352R1F */ +#elif defined(CC1352R1FRGZ_R10) || defined(CC1352R1FRGZ) + #define CC_CHIP_ID 0x13523710 +#elif defined(CC1352R1F_R10) || defined(CC1352R1F) + #define CC_CHIP_ID 0x13523010 +/* CC1312R1F */ +#elif defined(CC1312R1FRGZ_R10) || defined(CC1312R1FRGZ) + #define CC_CHIP_ID 0x13123710 +#elif defined(CC1312R1F_R10) || defined(CC1312R1F) + #define CC_CHIP_ID 0x13123010 #endif #define CC_GET_CHIP_FAMILY 0x26 @@ -172,7 +211,7 @@ extern "C" #error "Specified chip family does not match DriverLib release" #endif #if (CC_GET_CHIP_OPTION != ((CC_CHIP_ID & 0x0000F000) >> 12)) - #error "Specified chip option (OTP) does not match DriverLib release" + #error "Specified chip option does not match DriverLib release" #endif #if (CC_GET_CHIP_HWREV != ((CC_CHIP_ID & 0x000000FF) >> 0)) #error "Specified chip hardware revision does not match DriverLib release" diff --git a/third_party/ti/devices/cc26x0/inc/hw_ddi.h b/third_party/ti/devices/cc26x0/inc/hw_ddi.h index 86846cb4f..42aafb1ba 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_ddi.h +++ b/third_party/ti/devices/cc26x0/inc/hw_ddi.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_ddi.h -* Revised: 2016-07-07 19:12:02 +0200 (Thu, 07 Jul 2016) -* Revision: 46848 +* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017) +* Revision: 49096 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x0/inc/hw_device.h b/third_party/ti/devices/cc26x0/inc/hw_device.h index 7cf76eace..2a6e42512 100644 --- a/third_party/ti/devices/cc26x0/inc/hw_device.h +++ b/third_party/ti/devices/cc26x0/inc/hw_device.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: hw_device.h -* Revised: 2016-09-13 14:21:40 +0200 (Tue, 13 Sep 2016) -* Revision: 47152 +* Revised: 2017-06-21 10:06:25 +0200 (Wed, 21 Jun 2017) +* Revision: 49177 * * Copyright (c) 2015 - 2017, Texas Instruments Incorporated * All rights reserved. diff --git a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.cmd b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.cmd index 02ee8939b..66dd063e6 100644 --- a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.cmd +++ b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.cmd @@ -2,7 +2,7 @@ //! @file cc26x0f128.cmd //! @brief CC26x0F128 rev2 linker file for Code Composer Studio. //! -//! Revised $Date: 2017-03-28 15:32:09 +0200 (ti, 28 mar 2017) $ +//! Revised $Date: 2017-03-28 15:32:09 +0200 (Tue, 28 Mar 2017) $ //! Revision $Revision: 17730 $ // // This file is auto-generated. diff --git a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.icf b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.icf index b8dea828a..6e2652646 100644 --- a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.icf +++ b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.icf @@ -2,7 +2,7 @@ //! @file cc26x0f128.icf //! @brief CC26x0F128 rev2 linker file for IAR EWARM. //! -//! Revised $Date: 2017-02-03 19:14:38 +0100 (fr, 03 feb 2017) $ +//! Revised $Date: 2017-02-03 19:14:38 +0100 (Fri, 03 Feb 2017) $ //! Revision $Revision: 17632 $ // // This file is auto-generated. diff --git a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.lds b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.lds index 70cd07856..22dc9b3e1 100644 --- a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.lds +++ b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.lds @@ -2,7 +2,7 @@ @file cc26x0f128.lds @brief CC26x0F128 linker configuration file for GNU compiler. - Revised $Date: 2017-02-03 19:14:38 +0100 (fr, 03 feb 2017) $ + Revised $Date: 2017-02-03 19:14:38 +0100 (Fri, 03 Feb 2017) $ Revision $Revision: 17632 $ This file is auto-generated. diff --git a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.sct b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.sct index 3e1dca18f..07edc0eaa 100644 --- a/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.sct +++ b/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.sct @@ -2,7 +2,7 @@ ; * @file cc26x0f128.sct ; * @brief CC26x0F128 rev2 scatter loading file for ARM linker. ; * -; * Revised $Date: 2017-02-03 19:14:38 +0100 (fr, 03 feb 2017) $ +; * Revised $Date: 2017-02-03 19:14:38 +0100 (Fri, 03 Feb 2017) $ ; * Revision $Revision: 17632 $ ; * ; * This file is auto-generated. diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble.h index 0cbd1de5e..efe23e946 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble.h @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: rf_patch_cpe_ble.h -* Revised: $Date: 2016-12-07 13:37:33 +0100 (on, 07 des 2016) $ +* Revised: $Date: 2016-12-07 13:37:33 +0100 (Wed, 07 Dec 2016) $ * Revision: $Revision: 17556 $ * * Description: RF Core patch file for CC26x0 diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble_priv_1_2.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble_priv_1_2.h index 8b6c10a14..ccba0aba7 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble_priv_1_2.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ble_priv_1_2.h @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: rf_patch_cpe_ble_priv_1_2.h -* Revised: $Date: 2016-12-07 13:37:33 +0100 (on, 07 des 2016) $ +* Revised: $Date: 2016-12-07 13:37:33 +0100 (Wed, 07 Dec 2016) $ * Revision: $Revision: 17556 $ * * Description: RF Core patch file for CC26x0 Bluetooth Low Energy with privacy 1.2 support diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_genfsk.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_genfsk.h index 296e9a3ff..a0efda4cc 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_genfsk.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_genfsk.h @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: rf_patch_cpe_genfsk.h -* Revised: $Date: 2017-01-30 18:00:26 +0100 (ma, 30 jan 2017) $ +* Revised: $Date: 2017-01-30 18:00:26 +0100 (Mon, 30 Jan 2017) $ * Revision: $Revision: 17599 $ * * Description: RF core patch for CC26x0 Generic FSK diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ieee.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ieee.h index f3089f061..0a818d850 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ieee.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_cpe_ieee.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_patch_cpe_ieee.h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: $Date: 2017-08-24 11:43:33 +0200 (Thu, 24 Aug 2017) $ +* Revision: $Revision: 17889 $ * * Description: RF Core patch file for CC26xx IEEE 802.15.4 PHY * diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_genfsk.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_genfsk.h index 7135a3856..472c3b630 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_genfsk.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_genfsk.h @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: rf_patch_mce_genfsk.h -* Revised: $Date: 2017-05-04 12:39:32 +0200 (to, 04 mai 2017) $ +* Revised: $Date: 2017-05-04 12:39:32 +0200 (Thu, 04 May 2017) $ * Revision: $Revision: 17776 $ * * Description: RF core patch for CC26x0 Generic FSK diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_ieee_s.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_ieee_s.h index dda8ed1d8..34731f159 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_ieee_s.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_mce_ieee_s.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_patch_mce_ieee_s.h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: $Date: 2017-08-24 11:43:33 +0200 (Thu, 24 Aug 2017) $ +* Revision: $Revision: 17889 $ * * Description: RF core patch for CC26x0 IEEE 802.15.4 Single Ended Output * diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ble.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ble.h index d4401d0aa..78be2d049 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ble.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ble.h @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: rf_patch_rfe_ble.h -* Revised: $Date: 2017-05-04 12:39:32 +0200 (to, 04 mai 2017) $ +* Revised: $Date: 2017-05-04 12:39:32 +0200 (Thu, 04 May 2017) $ * Revision: $Revision: 17776 $ * * Description: RF core patch for CC26x0 BLE diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_genfsk.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_genfsk.h index d1f92cfa2..7b3c6b4dc 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_genfsk.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_genfsk.h @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: rf_patch_rfe_genfsk.h -* Revised: $Date: 2017-05-04 12:39:32 +0200 (to, 04 mai 2017) $ +* Revised: $Date: 2017-05-04 12:39:32 +0200 (Thu, 04 May 2017) $ * Revision: $Revision: 17776 $ * * Description: RF core patch for CC26x0 Generic FSK diff --git a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ieee_s.h b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ieee_s.h index fdc365e4c..7a012bc60 100644 --- a/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ieee_s.h +++ b/third_party/ti/devices/cc26x0/rf_patches/rf_patch_rfe_ieee_s.h @@ -1,7 +1,7 @@ /****************************************************************************** * Filename: rf_patch_rfe_ieee_s.h -* Revised: $Date$ -* Revision: $Revision$ +* Revised: $Date: 2017-08-24 11:43:33 +0200 (Thu, 24 Aug 2017) $ +* Revision: $Revision: 17889 $ * * Description: RF core patch for CC26x0 IEEE 802.15.4 Single Ended Output * diff --git a/third_party/ti/devices/cc26x0/startup_files/ccfg.c b/third_party/ti/devices/cc26x0/startup_files/ccfg.c index a1da59c38..ec6a6eae4 100644 --- a/third_party/ti/devices/cc26x0/startup_files/ccfg.c +++ b/third_party/ti/devices/cc26x0/startup_files/ccfg.c @@ -1,9 +1,9 @@ /****************************************************************************** * Filename: ccfg.c -* Revised: $Date: 2017-02-09 13:34:22 +0100 (to, 09 feb 2017) $ -* Revision: $Revision: 17663 $ +* Revised: $Date: 2017-07-31 14:52:44 +0200 (Mon, 31 Jul 2017) $ +* Revision: $Revision: 17856 $ * -* Description: Customer Configuration for CC26xx device family (HW rev 2). +* Description: Customer Configuration for CC26x0 device family (HW rev 2). * * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ * @@ -56,12 +56,12 @@ // DriverLib documentation (doc_overview.html -> CPU Domain Memory Map -> CCFG). // // PLEASE NOTE: -// It is not recommended to do modifications inside this file. +// It is not recommended to do modifications inside the ccfg.c file. // This file is part of the CoreSDK release and future releases may have // important modifications and new fields added without notice. -// The recommended method to do customer modifications to the CCFG settings -// is to have your own .c file that defines specific -// CCFG values to override and then includes the ccfg.c file. +// The recommended method to modify the CCFG settings is to have your +// own .c file that defines the specific CCFG values to be +// overridden and finally including ccfg.c from the .c file. // // Example: // #define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader @@ -292,7 +292,7 @@ //##################################### #ifndef SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID #define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID 0x00000000 // Flash image is valid -// #define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID // Flash image is invalid, call bootloader +// #define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID // Flash image is invalid. ROM boot loader is called. #endif //##################################### @@ -367,61 +367,61 @@ // //***************************************************************************** #define DEFAULT_CCFG_EXT_LF_CLK ( \ - ( ((uint32_t)( SET_CCFG_EXT_LF_CLK_DIO << CCFG_EXT_LF_CLK_DIO_S )) | ~CCFG_EXT_LF_CLK_DIO_M ) & \ - ( ((uint32_t)( SET_CCFG_EXT_LF_CLK_RTC_INCREMENT << CCFG_EXT_LF_CLK_RTC_INCREMENT_S )) | ~CCFG_EXT_LF_CLK_RTC_INCREMENT_M ) ) + ((((uint32_t)( SET_CCFG_EXT_LF_CLK_DIO )) << CCFG_EXT_LF_CLK_DIO_S ) | ~CCFG_EXT_LF_CLK_DIO_M ) & \ + ((((uint32_t)( SET_CCFG_EXT_LF_CLK_RTC_INCREMENT )) << CCFG_EXT_LF_CLK_RTC_INCREMENT_S ) | ~CCFG_EXT_LF_CLK_RTC_INCREMENT_M ) ) #define DEFAULT_CCFG_MODE_CONF_1 ( \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN << CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S )) | ~CCFG_MODE_CONF_1_ALT_DCDC_VMIN_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN << CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_S )) | ~CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK << CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S )) | ~CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_INIT << CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_S )) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET << CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_S )) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_1_XOSC_MAX_START << CCFG_MODE_CONF_1_XOSC_MAX_START_S )) | ~CCFG_MODE_CONF_1_XOSC_MAX_START_M ) ) + ((((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_VMIN )) << CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S ) | ~CCFG_MODE_CONF_1_ALT_DCDC_VMIN_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN )) << CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_S ) | ~CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_ALT_DCDC_IPEAK )) << CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S ) | ~CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_INIT )) << CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_S ) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET )) << CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_S ) | ~CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_1_XOSC_MAX_START )) << CCFG_MODE_CONF_1_XOSC_MAX_START_S ) | ~CCFG_MODE_CONF_1_XOSC_MAX_START_M ) ) #define DEFAULT_CCFG_SIZE_AND_DIS_FLAGS ( \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG << CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS << CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO << CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM << CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING << CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_M ) & \ - ( ((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR << CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_S )) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_M ) ) + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG )) << CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS )) << CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_M ) & \ + ((((uint32_t)( SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR )) << CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_S ) | ~CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_M ) ) #define DEFAULT_CCFG_MODE_CONF ( \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S )) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_DCDC_RECHARGE << CCFG_MODE_CONF_DCDC_RECHARGE_S )) | ~CCFG_MODE_CONF_DCDC_RECHARGE_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_DCDC_ACTIVE << CCFG_MODE_CONF_DCDC_ACTIVE_S )) | ~CCFG_MODE_CONF_DCDC_ACTIVE_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_EXT_LOAD << CCFG_MODE_CONF_VDDR_EXT_LOAD_S )) | ~CCFG_MODE_CONF_VDDR_EXT_LOAD_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL << CCFG_MODE_CONF_VDDS_BOD_LEVEL_S )) | ~CCFG_MODE_CONF_VDDS_BOD_LEVEL_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_SCLK_LF_OPTION << CCFG_MODE_CONF_SCLK_LF_OPTION_S )) | ~CCFG_MODE_CONF_SCLK_LF_OPTION_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_S )) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_RTC_COMP << CCFG_MODE_CONF_RTC_COMP_S )) | ~CCFG_MODE_CONF_RTC_COMP_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_XOSC_FREQ << CCFG_MODE_CONF_XOSC_FREQ_S )) | ~CCFG_MODE_CONF_XOSC_FREQ_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAP_MOD << CCFG_MODE_CONF_XOSC_CAP_MOD_S )) | ~CCFG_MODE_CONF_XOSC_CAP_MOD_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_HF_COMP << CCFG_MODE_CONF_HF_COMP_S )) | ~CCFG_MODE_CONF_HF_COMP_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S )) | ~CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M ) & \ - ( ((uint32_t)( SET_CCFG_MODE_CONF_VDDR_CAP << CCFG_MODE_CONF_VDDR_CAP_S )) | ~CCFG_MODE_CONF_VDDR_CAP_M ) ) + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA )) << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S ) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_DCDC_RECHARGE )) << CCFG_MODE_CONF_DCDC_RECHARGE_S ) | ~CCFG_MODE_CONF_DCDC_RECHARGE_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_DCDC_ACTIVE )) << CCFG_MODE_CONF_DCDC_ACTIVE_S ) | ~CCFG_MODE_CONF_DCDC_ACTIVE_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_EXT_LOAD )) << CCFG_MODE_CONF_VDDR_EXT_LOAD_S ) | ~CCFG_MODE_CONF_VDDR_EXT_LOAD_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDS_BOD_LEVEL )) << CCFG_MODE_CONF_VDDS_BOD_LEVEL_S ) | ~CCFG_MODE_CONF_VDDS_BOD_LEVEL_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_SCLK_LF_OPTION )) << CCFG_MODE_CONF_SCLK_LF_OPTION_S ) | ~CCFG_MODE_CONF_SCLK_LF_OPTION_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC )) << CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_S ) | ~CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_RTC_COMP )) << CCFG_MODE_CONF_RTC_COMP_S ) | ~CCFG_MODE_CONF_RTC_COMP_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_XOSC_FREQ )) << CCFG_MODE_CONF_XOSC_FREQ_S ) | ~CCFG_MODE_CONF_XOSC_FREQ_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAP_MOD )) << CCFG_MODE_CONF_XOSC_CAP_MOD_S ) | ~CCFG_MODE_CONF_XOSC_CAP_MOD_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_HF_COMP )) << CCFG_MODE_CONF_HF_COMP_S ) | ~CCFG_MODE_CONF_HF_COMP_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA )) << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S ) | ~CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M ) & \ + ((((uint32_t)( SET_CCFG_MODE_CONF_VDDR_CAP )) << CCFG_MODE_CONF_VDDR_CAP_S ) | ~CCFG_MODE_CONF_VDDR_CAP_M ) ) #define DEFAULT_CCFG_VOLT_LOAD_0 ( \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP45 << CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP25 << CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP5 << CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TM15 << CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_S )) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_M ) ) + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP45 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP45_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP25 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP25_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TP5 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TP5_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_0_VDDR_EXT_TM15 )) << CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_S ) | ~CCFG_VOLT_LOAD_0_VDDR_EXT_TM15_M ) ) #define DEFAULT_CCFG_VOLT_LOAD_1 ( \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP125 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP105 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP85 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_M ) & \ - ( ((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP65 << CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_S )) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_M ) ) + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP125 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP125_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP105 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP105_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP85 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP85_M ) & \ + ((((uint32_t)( SET_CCFG_VOLT_LOAD_1_VDDR_EXT_TP65 )) << CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_S ) | ~CCFG_VOLT_LOAD_1_VDDR_EXT_TP65_M ) ) #define DEFAULT_CCFG_RTC_OFFSET ( \ - ( ((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P0 << CCFG_RTC_OFFSET_RTC_COMP_P0_S )) | ~CCFG_RTC_OFFSET_RTC_COMP_P0_M ) & \ - ( ((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P1 << CCFG_RTC_OFFSET_RTC_COMP_P1_S )) | ~CCFG_RTC_OFFSET_RTC_COMP_P1_M ) & \ - ( ((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P2 << CCFG_RTC_OFFSET_RTC_COMP_P2_S )) | ~CCFG_RTC_OFFSET_RTC_COMP_P2_M ) ) + ((((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P0 )) << CCFG_RTC_OFFSET_RTC_COMP_P0_S ) | ~CCFG_RTC_OFFSET_RTC_COMP_P0_M ) & \ + ((((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P1 )) << CCFG_RTC_OFFSET_RTC_COMP_P1_S ) | ~CCFG_RTC_OFFSET_RTC_COMP_P1_M ) & \ + ((((uint32_t)( SET_CCFG_RTC_OFFSET_RTC_COMP_P2 )) << CCFG_RTC_OFFSET_RTC_COMP_P2_S ) | ~CCFG_RTC_OFFSET_RTC_COMP_P2_M ) ) #define DEFAULT_CCFG_FREQ_OFFSET ( \ - ( ((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P0 << CCFG_FREQ_OFFSET_HF_COMP_P0_S )) | ~CCFG_FREQ_OFFSET_HF_COMP_P0_M ) & \ - ( ((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P1 << CCFG_FREQ_OFFSET_HF_COMP_P1_S )) | ~CCFG_FREQ_OFFSET_HF_COMP_P1_M ) & \ - ( ((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P2 << CCFG_FREQ_OFFSET_HF_COMP_P2_S )) | ~CCFG_FREQ_OFFSET_HF_COMP_P2_M ) ) + ((((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P0 )) << CCFG_FREQ_OFFSET_HF_COMP_P0_S ) | ~CCFG_FREQ_OFFSET_HF_COMP_P0_M ) & \ + ((((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P1 )) << CCFG_FREQ_OFFSET_HF_COMP_P1_S ) | ~CCFG_FREQ_OFFSET_HF_COMP_P1_M ) & \ + ((((uint32_t)( SET_CCFG_FREQ_OFFSET_HF_COMP_P2 )) << CCFG_FREQ_OFFSET_HF_COMP_P2_S ) | ~CCFG_FREQ_OFFSET_HF_COMP_P2_M ) ) #define DEFAULT_CCFG_IEEE_MAC_0 SET_CCFG_IEEE_MAC_0 #define DEFAULT_CCFG_IEEE_MAC_1 SET_CCFG_IEEE_MAC_1 @@ -429,30 +429,29 @@ #define DEFAULT_CCFG_IEEE_BLE_1 SET_CCFG_IEEE_BLE_1 #define DEFAULT_CCFG_BL_CONFIG ( \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE << CCFG_BL_CONFIG_BOOTLOADER_ENABLE_S )) | ~CCFG_BL_CONFIG_BOOTLOADER_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BL_LEVEL << CCFG_BL_CONFIG_BL_LEVEL_S )) | ~CCFG_BL_CONFIG_BL_LEVEL_M ) & \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BL_PIN_NUMBER << CCFG_BL_CONFIG_BL_PIN_NUMBER_S )) | ~CCFG_BL_CONFIG_BL_PIN_NUMBER_M ) & \ - ( ((uint32_t)( SET_CCFG_BL_CONFIG_BL_ENABLE << CCFG_BL_CONFIG_BL_ENABLE_S )) | ~CCFG_BL_CONFIG_BL_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE )) << CCFG_BL_CONFIG_BOOTLOADER_ENABLE_S ) | ~CCFG_BL_CONFIG_BOOTLOADER_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_BL_CONFIG_BL_LEVEL )) << CCFG_BL_CONFIG_BL_LEVEL_S ) | ~CCFG_BL_CONFIG_BL_LEVEL_M ) & \ + ((((uint32_t)( SET_CCFG_BL_CONFIG_BL_PIN_NUMBER )) << CCFG_BL_CONFIG_BL_PIN_NUMBER_S ) | ~CCFG_BL_CONFIG_BL_PIN_NUMBER_M ) & \ + ((((uint32_t)( SET_CCFG_BL_CONFIG_BL_ENABLE )) << CCFG_BL_CONFIG_BL_ENABLE_S ) | ~CCFG_BL_CONFIG_BL_ENABLE_M ) ) #define DEFAULT_CCFG_ERASE_CONF ( \ - ( ((uint32_t)( SET_CCFG_ERASE_CONF_CHIP_ERASE_DIS_N << CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_S )) | ~CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_M ) & \ - ( ((uint32_t)( SET_CCFG_ERASE_CONF_BANK_ERASE_DIS_N << CCFG_ERASE_CONF_BANK_ERASE_DIS_N_S )) | ~CCFG_ERASE_CONF_BANK_ERASE_DIS_N_M ) ) + ((((uint32_t)( SET_CCFG_ERASE_CONF_CHIP_ERASE_DIS_N )) << CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_S ) | ~CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_M ) & \ + ((((uint32_t)( SET_CCFG_ERASE_CONF_BANK_ERASE_DIS_N )) << CCFG_ERASE_CONF_BANK_ERASE_DIS_N_S ) | ~CCFG_ERASE_CONF_BANK_ERASE_DIS_N_M ) ) #define DEFAULT_CCFG_CCFG_TI_OPTIONS ( \ - ( ((uint32_t)( SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE << CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_S )) | ~CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE )) << CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_S ) | ~CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_M ) ) #define DEFAULT_CCFG_CCFG_TAP_DAP_0 ( \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE << CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE << CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE << CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE )) << CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_0_PRCM_TAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_M ) ) #define DEFAULT_CCFG_CCFG_TAP_DAP_1 ( \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE << CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE << CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_M ) & \ - ( ((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE << CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE_S )) | ~CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE_M ) ) + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_1_PBIST2_TAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_1_PBIST1_TAP_ENABLE_M ) & \ + ((((uint32_t)( SET_CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE )) << CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE_S ) | ~CCFG_CCFG_TAP_DAP_1_WUC_TAP_ENABLE_M ) ) -#define DEFAULT_CCFG_IMAGE_VALID_CONF ( \ - ( ((uint32_t)( SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID << CCFG_IMAGE_VALID_CONF_IMAGE_VALID_S )) | ~CCFG_IMAGE_VALID_CONF_IMAGE_VALID_M ) ) +#define DEFAULT_CCFG_IMAGE_VALID_CONF SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID #define DEFAULT_CCFG_CCFG_PROT_31_0 SET_CCFG_CCFG_PROT_31_0 #define DEFAULT_CCFG_CCFG_PROT_63_32 SET_CCFG_CCFG_PROT_63_32 diff --git a/third_party/ti/devices/cc26x0/startup_files/startup_ccs.c b/third_party/ti/devices/cc26x0/startup_files/startup_ccs.c index 5444937bd..4811e6cdf 100644 --- a/third_party/ti/devices/cc26x0/startup_files/startup_ccs.c +++ b/third_party/ti/devices/cc26x0/startup_files/startup_ccs.c @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: startup_ccs.c -* Revised: $Date: 2017-02-03 19:16:24 +0100 (fr, 03 feb 2017) $ +* Revised: $Date: 2017-02-03 19:16:24 +0100 (Fri, 03 Feb 2017) $ * Revision: $Revision: 17634 $ * * Description: Startup code for CC26x0 rev2 device family for use with CCS. diff --git a/third_party/ti/devices/cc26x0/startup_files/startup_gcc.c b/third_party/ti/devices/cc26x0/startup_files/startup_gcc.c index cdd029193..fb200e4bf 100644 --- a/third_party/ti/devices/cc26x0/startup_files/startup_gcc.c +++ b/third_party/ti/devices/cc26x0/startup_files/startup_gcc.c @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: startup_gcc.c -* Revised: $Date: 2017-05-03 09:38:30 +0200 (on, 03 mai 2017) $ +* Revised: $Date: 2017-05-03 09:38:30 +0200 (Wed, 03 May 2017) $ * Revision: $Revision: 17770 $ * * Description: Startup code for CC26x0 rev2 device family for use with GCC. diff --git a/third_party/ti/devices/cc26x0/startup_files/startup_iar.c b/third_party/ti/devices/cc26x0/startup_files/startup_iar.c index d9644f671..2813cb730 100644 --- a/third_party/ti/devices/cc26x0/startup_files/startup_iar.c +++ b/third_party/ti/devices/cc26x0/startup_files/startup_iar.c @@ -1,6 +1,6 @@ /****************************************************************************** * Filename: startup_iar.c -* Revised: $Date: 2017-02-03 19:16:24 +0100 (fr, 03 feb 2017) $ +* Revised: $Date: 2017-02-03 19:16:24 +0100 (Fri, 03 Feb 2017) $ * Revision: $Revision: 17634 $ * * Description: Startup code for CC26x0 rev2 device family for use with IAR. diff --git a/third_party/ti/devices/cc26x0/startup_files/startup_keil.s b/third_party/ti/devices/cc26x0/startup_files/startup_keil.s index 1d5615c65..04765e21c 100644 --- a/third_party/ti/devices/cc26x0/startup_files/startup_keil.s +++ b/third_party/ti/devices/cc26x0/startup_files/startup_keil.s @@ -1,6 +1,6 @@ ; /****************************************************************************** ; * Filename: startup_keil.c -; * Revised: $Date: 2016-09-21 10:57:23 +0200 (on, 21 sep 2016) $ +; * Revised: $Date: 2016-09-21 10:57:23 +0200 (Wed, 21 Sep 2016) $ ; * Revision: $Revision: 17335 $ ; * ; * Description: Startup code for CC26xx device family for use with KEIL. diff --git a/third_party/ti/devices/cc26x2/driverlib/interrupt_doc.h b/third_party/ti/devices/cc26x2/driverlib/interrupt_doc.h deleted file mode 100644 index f2def8d8e..000000000 --- a/third_party/ti/devices/cc26x2/driverlib/interrupt_doc.h +++ /dev/null @@ -1,146 +0,0 @@ -/****************************************************************************** -* Filename: interrupt_doc.h -* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016) -* Revision: 45971 -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ -//! \addtogroup interrupt_api -//! @{ -//! \section sec_interrupt Introduction -//! -//! The interrupt controller API provides a set of functions for dealing with the -//! nested vectored interrupt controller (NVIC). Functions are provided to enable -//! and disable interrupts, register interrupt handlers, and set the priority of -//! interrupts. -//! -//! The event sources that trigger the interrupt lines in the NVIC are controlled by -//! the MCU event fabric. All event sources are statically connected to the NVIC interrupt lines -//! except one which is programmable. For more information about the MCU event fabric, see the -//! [MCU event fabric API](\ref event_api). -//! -//! The NVIC provides global interrupt masking, prioritization, and handler -//! dispatching. Devices within the \ti_device family support 34 -//! interrupt lines and 8 priority levels from 0 to 7 with 0 being the highest priority. -//! Individual interrupt sources can -//! be masked, and the processor interrupt can be globally masked as well (without -//! affecting the individual source masks). -//! -//! The NVIC is tightly coupled with the System CPU. When the -//! processor responds to an interrupt, the NVIC supplies the address of the -//! function to handle the interrupt directly to the processor. -//! -//! Each interrupt source can be individually enabled and disabled through: -//! - \ref IntEnable() -//! - \ref IntDisable() -//! -//! The global processor interrupt can be enabled and disabled with the following functions: -//! - \ref IntMasterEnable() -//! - \ref IntMasterDisable() -//! -//! This does not affect the individual -//! interrupt enable states. Masking of the processor interrupt can be used as -//! a simple critical section (only an NMI can interrupt the processor while the -//! processor interrupt is disabled), although masking the processor interrupt can -//! have adverse effects on the interrupt response time. -//! -//! It is possible to access the NVIC to see if any interrupts are pending and manually -//! clear pending interrupts which have not yet been serviced or set a specific interrupt as -//! pending to be handled based on its priority. Pending interrupts are cleared automatically -//! when the interrupt is accepted and becomes active (being executed). The functions to read, -//! clear, and set pending interrupts are: -//! - \ref IntPendGet() -//! - \ref IntPendClear() -//! - \ref IntPendSet() -//! -//! The interrupt prioritization in the NVIC allows handling of higher priority interrupts -//! before lower priority interrupts, as well as allowing preemption of -//! lower priority interrupt handlers by higher priority interrupts. -//! The priority of each interrupt source can be set and examined using: -//! - \ref IntPrioritySet() -//! - \ref IntPriorityGet() -//! -//! Interrupts can be masked based on their priority such that interrupts with the same or lower -//! priority than the mask are effectively disabled. This can be configured with: -//! - \ref IntPriorityMaskSet() -//! - \ref IntPriorityMaskGet() -//! -//! Subprioritization is also possible; instead of having 3 bits of preemptable -//! prioritization (8 levels), the NVIC can be configured for 3 - M bits of -//! preemptable prioritization and M bits of subpriority. In this scheme, two -//! interrupts with the same preemptable prioritization but different subpriorities -//! do not cause a preemption; instead tail chaining is used to process -//! the two interrupts back-to-back. -//! If two interrupts with the same priority (and subpriority if so configured) are -//! asserted at the same time, the one with the lower interrupt number is -//! processed first. Subprioritization is handled by: -//! - \ref IntPriorityGroupingSet() -//! - \ref IntPriorityGroupingGet() -//! -//! Interrupt handlers can be configured in one of two ways; statically at compile -//! time or dynamically at run time. Static configuration of interrupt handlers is -//! accomplished by editing the interrupt handler table in the startup code of the application. -//! When statically configured, the interrupts must be explicitly -//! enabled in the NVIC through \ref IntEnable() before the processor can respond to the -//! interrupt (in addition to any interrupt enabling required within the peripheral). -//! Statically configuring the interrupt table provides the fastest -//! interrupt response time because the stacking operation (a write to SRAM) can be -//! performed in parallel with the interrupt handler table fetch (a read from -//! Flash), as well as the prefetch of the interrupt handler (assuming it is -//! also in Flash). -//! -//! Alternatively, interrupts can be configured at runtime using (or the corresponding in each individual module API): -//! - \ref IntRegister() -//! - \ref IntUnregister() -//! -//! Registering an interrupt handler is a simple matter of inserting the handler address into the -//! table. By default, the table is filled with pointers to an internal handler -//! that loops forever; it is an error for an interrupt to occur when there is no -//! interrupt handler registered to process it. Therefore, interrupt sources -//! should not be enabled before a handler has been registered, and interrupt -//! sources should be disabled before a handler is unregistered. -//! When using \ref IntRegister(), the interrupt -//! must also be enabled as before; when using the function in each individual -//! function API, \ref IntEnable() is called by the driver and does not need to be called by -//! the application. -//! Run-time configuration of interrupts adds a small latency to the interrupt -//! response time because the stacking operation (a write to SRAM) and the -//! interrupt handler table fetch (a read from SRAM) must be performed -//! sequentially. -//! -//! Run-time configuration of interrupt handlers requires that the interrupt -//! handler table is placed on a 1-kB boundary in SRAM (typically, this is -//! at the beginning of SRAM). Failure to do so results in an incorrect vector -//! address being fetched in response to an interrupt. The vector table is in a -//! section called \ti_code{vtable} and should be placed appropriately with a linker -//! script. -//! -//! @} diff --git a/third_party/ti/devices/cc26x2/driverlib/pka.c b/third_party/ti/devices/cc26x2/driverlib/pka.c deleted file mode 100644 index 744112b9b..000000000 --- a/third_party/ti/devices/cc26x2/driverlib/pka.c +++ /dev/null @@ -1,722 +0,0 @@ -/****************************************************************************** -* Filename: pka.c -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 -* -* Description: Driver for the PKA module -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ - -#include "pka.h" - -//***************************************************************************** -// -// Handle support for DriverLib in ROM: -// This section will undo prototype renaming made in the header file -// -//***************************************************************************** -#if !defined(DOXYGEN) - #undef PKAGetOpsStatus - #define PKAGetOpsStatus NOROM_PKAGetOpsStatus - #undef PKABigNumModStart - #define PKABigNumModStart NOROM_PKABigNumModStart - #undef PKABigNumModGetResult - #define PKABigNumModGetResult NOROM_PKABigNumModGetResult - #undef PKABigNumCmpStart - #define PKABigNumCmpStart NOROM_PKABigNumCmpStart - #undef PKABigNumCmpGetResult - #define PKABigNumCmpGetResult NOROM_PKABigNumCmpGetResult - #undef PKABigNumInvModStart - #define PKABigNumInvModStart NOROM_PKABigNumInvModStart - #undef PKABigNumInvModGetResult - #define PKABigNumInvModGetResult NOROM_PKABigNumInvModGetResult - #undef PKABigNumMultiplyStart - #define PKABigNumMultiplyStart NOROM_PKABigNumMultiplyStart - #undef PKABigNumMultGetResult - #define PKABigNumMultGetResult NOROM_PKABigNumMultGetResult - #undef PKABigNumAddStart - #define PKABigNumAddStart NOROM_PKABigNumAddStart - #undef PKABigNumAddGetResult - #define PKABigNumAddGetResult NOROM_PKABigNumAddGetResult - #undef PKAEccMultiplyStart - #define PKAEccMultiplyStart NOROM_PKAEccMultiplyStart - #undef PKAEccMultiplyGetResult - #define PKAEccMultiplyGetResult NOROM_PKAEccMultiplyGetResult - #undef PKAEccAddStart - #define PKAEccAddStart NOROM_PKAEccAddStart - #undef PKAEccAddGetResult - #define PKAEccAddGetResult NOROM_PKAEccAddGetResult -#endif - - -//***************************************************************************** -// -// Define for the maximum curve size supported by the PKA module in 32 bit -// word. -// \note PKA hardware module can support up to 384 bit curve size due to the -// 2K of PKA RAM. -// -//***************************************************************************** -#define PKA_MAX_CURVE_SIZE_32_BIT_WORD 12 - -//***************************************************************************** -// -// Define for the maximum length of the big number supported by the PKA module -// in 32 bit word. -// -//***************************************************************************** -#define PKA_MAX_LEN_IN_32_BIT_WORD PKA_MAX_CURVE_SIZE_32_BIT_WORD - -//***************************************************************************** -// -// Used in PKAWritePkaParam() and PKAWritePkaParamExtraOffset() to specify that -// the base address of the parameter should not be written to a NPTR register. -// -//***************************************************************************** -#define PKA_NO_POINTER_REG 0xFF - -//***************************************************************************** -// -// Length in bytes of NISTP256 parameters. -// -//***************************************************************************** -#define NISTP256_PARAM_SIZE_BYTES 32 - -//***************************************************************************** -// -// Union for NISTP256 parameters that forces 32-bit alignment on the byte array. -// -//***************************************************************************** -typedef union { - uint8_t byte[NISTP256_PARAM_SIZE_BYTES]; - uint32_t word[NISTP256_PARAM_SIZE_BYTES / sizeof(uint32_t)]; -} NISTP256Param; - -//***************************************************************************** -// -// NIST P256 constants in little endian format. byte[0] is the least -// significant byte and byte[NISTP256_PARAM_SIZE_BYTES - 1] is the most -// significant. -// -//***************************************************************************** -const NISTP256Param NISTP256_gx = {.byte = {0x96, 0xc2, 0x98, 0xd8, 0x45, 0x39, 0xa1, 0xf4, - 0xa0, 0x33, 0xeb, 0x2d, 0x81, 0x7d, 0x03, 0x77, - 0xf2, 0x40, 0xa4, 0x63, 0xe5, 0xe6, 0xbc, 0xf8, - 0x47, 0x42, 0x2c, 0xe1, 0xf2, 0xd1, 0x17, 0x6b}}; - -const NISTP256Param NISTP256_gy = {.byte = {0xf5, 0x51, 0xbf, 0x37, 0x68, 0x40, 0xb6, 0xcb, - 0xce, 0x5e, 0x31, 0x6b, 0x57, 0x33, 0xce, 0x2b, - 0x16, 0x9e, 0x0f, 0x7c, 0x4a, 0xeb, 0xe7, 0x8e, - 0x9b, 0x7f, 0x1a, 0xfe, 0xe2, 0x42, 0xe3, 0x4f}}; - -const NISTP256Param NISTP256_p = {.byte = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff}}; - -const NISTP256Param NISTP256_a = {.byte = {0xfc, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff}}; - -const NISTP256Param NISTP256_b = {.byte = {0x4b, 0x60, 0xd2, 0x27, 0x3e, 0x3c, 0xce, 0x3b, - 0xf6, 0xb0, 0x53, 0xcc, 0xb0, 0x06, 0x1d, 0x65, - 0xbc, 0x86, 0x98, 0x76, 0x55, 0xbd, 0xeb, 0xb3, - 0xe7, 0x93, 0x3a, 0xaa, 0xd8, 0x35, 0xc6, 0x5a}}; - -const NISTP256Param NISTP256_n = {.byte = {0x51, 0x25, 0x63, 0xfc, 0xc2, 0xca, 0xb9, 0xf3, - 0x84, 0x9e, 0x17, 0xa7, 0xad, 0xfa, 0xe6, 0xbc, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff}}; - -//***************************************************************************** -// -// Struct tying the NIST P256 constant together to define the curve in -// short Weierstrass form. -// -//***************************************************************************** -const ECC_Curve NIST_P256 = { - .lengthInWords = NISTP256_PARAM_SIZE_BYTES / sizeof(uint32_t), - .p = NISTP256_p.word, - .n = NISTP256_n.word, - .a = NISTP256_a.word, - .b = NISTP256_b.word, - .g.x = (uint32_t *)NISTP256_gx.word, - .g.y = (uint32_t *)NISTP256_gy.word -}; - -//***************************************************************************** -// -// Write a PKA parameter to the PKA module, set required registers, and add an offset. -// -//***************************************************************************** -static uint32_t PKAWritePkaParam(const uint32_t *param, uint32_t paramLengthInWords, uint32_t paramOffset, uint32_t ptrRegOffset) -{ - uint32_t i; - // Update the A, B, C, or D pointer with the offset address of the PKA RAM location - // where the number will be stored. - switch (ptrRegOffset) { - case PKA_O_APTR: - HWREG(PKA_BASE + PKA_O_APTR) = paramOffset >> 2; - HWREG(PKA_BASE + PKA_O_ALENGTH) = paramLengthInWords; - break; - case PKA_O_BPTR: - HWREG(PKA_BASE + PKA_O_BPTR) = paramOffset >> 2; - HWREG(PKA_BASE + PKA_O_BLENGTH) = paramLengthInWords; - break; - case PKA_O_CPTR: - HWREG(PKA_BASE + PKA_O_CPTR) = paramOffset >> 2; - break; - case PKA_O_DPTR: - HWREG(PKA_BASE + PKA_O_DPTR) = paramOffset >> 2; - break; - } - - // Load the number in PKA RAM - for (i = 0; i < paramLengthInWords; i++) { - HWREG(PKA_RAM_BASE + paramOffset + sizeof(uint32_t) * i) = param[i]; - } - - // Ensure 8-byte alignment of next parameter. - return paramOffset + sizeof(uint32_t) * (paramLengthInWords + (paramLengthInWords % 2)); -} - -//***************************************************************************** -// -// Write a PKA parameter to the PKA module but return a larger offset. -// -//***************************************************************************** -static inline uint32_t PKAWritePkaParamExtraOffset(const uint32_t *param, uint32_t paramLengthInWords, uint32_t paramOffset, uint32_t ptrRegOffset) -{ - // Ensure 16-byte alignment. - return (sizeof(uint32_t) * 2) + PKAWritePkaParam(param, paramLengthInWords, paramOffset, ptrRegOffset); -} - -//***************************************************************************** -// -// Clear the entire PKA RAM by zeroing it out. -// -//***************************************************************************** -static void PKAClearPkaRam(void) -{ - // Loop through the entire PKA RAM and zero it out word for word. - uint32_t i = 0; - for (i = 0; i < PKA_RAM_TOT_BYTE_SIZE; i += 4) { - HWREG(PKA_RAM_BASE + i) = 0; - } -} - -//***************************************************************************** -// -// Writes the result of a large number arithmetic operation to a provided buffer. -// -//***************************************************************************** -static uint32_t PKAGetBigNumResult(uint32_t *resultBuf, uint32_t *resultLengthInWords, uint32_t resultPKAMemAddr) -{ - uint32_t regMSWVal; - uint32_t len; - int i; - - // Check the arguments. - ASSERT(resultBuf); - ASSERT((resultPKAMemAddr > PKA_RAM_BASE) && - (resultPKAMemAddr < (PKA_RAM_BASE + PKA_RAM_TOT_BYTE_SIZE))); - - // Verify that the operation is complete. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - // Get the MSW register value. - regMSWVal = HWREG(PKA_BASE + PKA_O_MSW); - - // Check to make sure that the result vector is not all zeros. - if (regMSWVal & PKA_MSW_RESULT_IS_ZERO) { - PKAClearPkaRam(); - return PKA_STATUS_RESULT_0; - } - - // Get the length of the result - len = ((regMSWVal & PKA_MSW_MSW_ADDRESS_M) + 1) - ((resultPKAMemAddr - PKA_RAM_BASE) >> 2); - - // Check if the provided buffer length is adequate to store the result data. - if (*resultLengthInWords < len) { - PKAClearPkaRam(); - return PKA_STATUS_BUF_UNDERFLOW; - } - - // Copy the result into the resultBuf. - for (i = 0; i < len; i++) { - resultBuf[i]= HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); - } - - // Copy the resultant length. - *resultLengthInWords = len; - - // The PKA RAM is cleared such that we do not accidentally leak keying material. - // It would have been faster only to copy the result into the result buffer - // but the security implications would be unacceptable. - PKAClearPkaRam(); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Writes the resultant curve point of an ECC operation to the provided buffer. -// -//***************************************************************************** -static uint32_t PKAGetECCResult(ECC_CurvePoint *curvePoint, uint32_t resultPKAMemAddr, const ECC_Curve *curve) -{ - uint32_t i; - - // Check for the arguments. - ASSERT(curvePoint); - ASSERT(curvePoint->x); - ASSERT(curvePoint->y); - ASSERT((resultPKAMemAddr > PKA_RAM_BASE) && - (resultPKAMemAddr < (PKA_RAM_BASE + PKA_RAM_TOT_BYTE_SIZE))); - - // Verify that the operation is completed. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - if (!HWREG(PKA_BASE + PKA_O_SHIFT)) { - - // Check to make sure that the result vector is not all zeros. - if (HWREG(PKA_BASE + PKA_O_MSW) & PKA_MSW_RESULT_IS_ZERO) { - PKAClearPkaRam(); - return PKA_STATUS_RESULT_0; - } - - // Copy the x co-ordinate value of the result from vector D into - // the curvePoint. - for (i = 0; i < curve->lengthInWords; i++) { - curvePoint->x[i] = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); - } - - resultPKAMemAddr += sizeof(uint32_t) * (i + 2 + curve->lengthInWords % 2); - - // Copy the y co-ordinate value of the result from vector D into - // the curvePoint. - for (i = 0; i < curve->lengthInWords; i++) { - curvePoint->y[i] = HWREG(resultPKAMemAddr + sizeof(uint32_t) * i); - } - - // The PKA RAM is cleared such that we do not accidentally leak keying material. - // It would have been faster only to copy the result into the result buffer - // but the security implications would be unacceptable. - PKAClearPkaRam(); - - return PKA_STATUS_SUCCESS; - } - else { - PKAClearPkaRam(); - return PKA_STATUS_FAILURE; - } -} - -//***************************************************************************** -// -// Provides the PKA operation status. -// -//***************************************************************************** -uint32_t PKAGetOpsStatus(void) -{ - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN_M) { - return PKA_STATUS_OPERATION_BUSY; - } - else { - return PKA_STATUS_OPERATION_RDY; - } -} - -//***************************************************************************** -// -// Start the big number modulus operation. -// -//***************************************************************************** -uint32_t PKABigNumModStart(uint32_t *bigNum, uint32_t bigNumLengthInWords, uint32_t *modulus, uint32_t modulusLengthInWords, uint32_t *resultPKAMemAddr) -{ - uint32_t offset = 0; - - // Check the arguments. - ASSERT(bigNum); - ASSERT(modulus); - ASSERT(resultPKAMemAddr); - - // Make sure no operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParam(bigNum, bigNumLengthInWords, offset, PKA_O_APTR); - - offset = PKAWritePkaParamExtraOffset(modulus, modulusLengthInWords, offset, PKA_O_BPTR); - - // Copy the result vector address location. - *resultPKAMemAddr = PKA_RAM_BASE + offset; - - // Load C pointer with the result location in PKA RAM - HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; - - // Start the PKCP modulo operation by setting the PKA Function register. - HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_MODULO); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the result of the big number modulus operation. -// -//***************************************************************************** -uint32_t PKABigNumModGetResult(uint32_t *resultBuf, uint32_t lengthInWords, uint32_t resultPKAMemAddr) -{ - return PKAGetBigNumResult(resultBuf, &lengthInWords, resultPKAMemAddr); -} - -//***************************************************************************** -// -// Start the comparison of two big numbers. -// -//***************************************************************************** -uint32_t PKABigNumCmpStart(uint32_t *bigNum1, uint32_t *bigNum2, uint32_t lengthInWords) -{ - uint32_t offset = 0; - - // Check the arguments. - ASSERT(bigNum1); - ASSERT(bigNum2); - - // Make sure no operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParam(bigNum1, lengthInWords, offset, PKA_O_APTR); - - offset = PKAWritePkaParam(bigNum2, lengthInWords, offset, PKA_O_BPTR); - - // Set the PKA Function register for the Compare operation - // and start the operation. - HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_COMPARE); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the result of the comparison operation of two big numbers. -// -//***************************************************************************** -uint32_t PKABigNumCmpGetResult(void) -{ - uint32_t status; - - // verify that the operation is complete. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - // Check the COMPARE register. - switch(HWREG(PKA_BASE + PKA_O_COMPARE)) { - case PKA_COMPARE_A_EQUALS_B: - status = PKA_STATUS_SUCCESS; - break; - - case PKA_COMPARE_A_GREATER_THAN_B: - status = PKA_STATUS_A_GR_B; - break; - - case PKA_COMPARE_A_LESS_THAN_B: - status = PKA_STATUS_A_LT_B; - break; - - default: - status = PKA_STATUS_FAILURE; - break; - } - - return status; -} - -//***************************************************************************** -// -// Start the big number inverse modulo operation. -// -//***************************************************************************** -uint32_t PKABigNumInvModStart(uint32_t *bigNum, uint32_t bigNumLengthInWords, uint32_t *modulus, uint32_t modulusLengthInWords, uint32_t *resultPKAMemAddr) -{ - uint32_t offset = 0; - - // Check the arguments. - ASSERT(bigNum); - ASSERT(modulus); - ASSERT(resultPKAMemAddr); - - // Make sure no operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParam(bigNum, bigNumLengthInWords, offset, PKA_O_APTR); - - offset = PKAWritePkaParam(modulus, modulusLengthInWords, offset, PKA_O_BPTR); - - // Copy the result vector address location. - *resultPKAMemAddr = PKA_RAM_BASE + offset; - - // Load D pointer with the result location in PKA RAM. - HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; - - // set the PKA function to InvMod operation and the start the operation. - HWREG(PKA_BASE + PKA_O_FUNCTION) = 0x0000F000; - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the result of the big number inverse modulo operation. -// -//***************************************************************************** -uint32_t PKABigNumInvModGetResult(uint32_t *resultBuf, uint32_t lengthInWords, uint32_t resultPKAMemAddr) -{ - return PKAGetBigNumResult(resultBuf, &lengthInWords, resultPKAMemAddr); -} - -//***************************************************************************** -// -// Start the big number multiplication. -// -//***************************************************************************** -uint32_t PKABigNumMultiplyStart(uint32_t *multiplicand, uint32_t multiplicandLengthInWords, uint32_t *multiplier, uint32_t multiplierLengthInWords, uint32_t *resultPKAMemAddr) -{ - uint32_t offset = 0; - - // Check for the arguments. - ASSERT(multiplicand); - ASSERT(multiplier); - ASSERT(resultPKAMemAddr); - - // Make sure no operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParam(multiplicand, multiplicandLengthInWords, offset, PKA_O_APTR); - - offset = PKAWritePkaParam(multiplier, multiplierLengthInWords, offset, PKA_O_BPTR); - - - // Copy the result vector address location. - *resultPKAMemAddr = PKA_RAM_BASE + offset; - - // Load C pointer with the result location in PKA RAM. - HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; - - // Set the PKA function to the multiplication and start it. - HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_MULTIPLY); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the results of the big number multiplication. -// -//***************************************************************************** -uint32_t PKABigNumMultGetResult(uint32_t *resultBuf, uint32_t *resultLengthInWords, uint32_t resultPKAMemAddr) -{ - return PKAGetBigNumResult(resultBuf, resultLengthInWords, resultPKAMemAddr); -} - -//***************************************************************************** -// -// Start the addition of two big number. -// -//***************************************************************************** -uint32_t PKABigNumAddStart(uint32_t *bigNum1, uint32_t bigNum1LengthInWords, uint32_t *bigNum2, uint32_t bigNum2LengthInWords, uint32_t *resultPKAMemAddr) -{ - uint32_t offset = 0; - - // Check for arguments. - ASSERT(bigNum1); - ASSERT(bigNum2); - ASSERT(resultPKAMemAddr); - - - // Make sure no operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParam(bigNum1, bigNum1LengthInWords, offset, PKA_O_APTR); - - offset = PKAWritePkaParam(bigNum2, bigNum2LengthInWords, offset, PKA_O_BPTR); - - // Copy the result vector address location. - *resultPKAMemAddr = PKA_RAM_BASE + offset; - - // Load C pointer with the result location in PKA RAM. - HWREG(PKA_BASE + PKA_O_CPTR) = offset >> 2; - - // Set the function for the add operation and start the operation. - HWREG(PKA_BASE + PKA_O_FUNCTION) = (PKA_FUNCTION_RUN | PKA_FUNCTION_ADD); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the result of the addition operation on two big number. -// -//***************************************************************************** -uint32_t PKABigNumAddGetResult(uint32_t *resultBuf, uint32_t *resultLengthInWords, uint32_t resultPKAMemAddr) -{ - return PKAGetBigNumResult(resultBuf, resultLengthInWords, resultPKAMemAddr); -} - -//***************************************************************************** -// -// Start ECC Multiplication. -// -//***************************************************************************** -uint32_t PKAEccMultiplyStart(const uint32_t *scalar, const ECC_CurvePoint *curvePoint, const ECC_Curve* curve, uint32_t *resultPKAMemAddr) -{ - uint32_t offset = 0; - - // Check for the arguments. - ASSERT(scalar); - ASSERT(curvePoint); - ASSERT(curvePoint->x); - ASSERT(curvePoint->y); - ASSERT(curve); - ASSERT(curve->lengthInWords <= PKA_MAX_CURVE_SIZE_32_BIT_WORD); - ASSERT(resultPKAMemAddr); - - // Make sure no PKA operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParam(scalar, curve->lengthInWords, offset, PKA_O_APTR); - - offset = PKAWritePkaParamExtraOffset(curve->p, curve->lengthInWords, offset, PKA_O_BPTR); - offset = PKAWritePkaParamExtraOffset(curve->a, curve->lengthInWords, offset, PKA_NO_POINTER_REG); - offset = PKAWritePkaParamExtraOffset(curve->b, curve->lengthInWords, offset, PKA_NO_POINTER_REG); - - offset = PKAWritePkaParamExtraOffset(curvePoint->x, curve->lengthInWords, offset, PKA_O_CPTR); - offset = PKAWritePkaParamExtraOffset(curvePoint->y, curve->lengthInWords, offset, PKA_NO_POINTER_REG); - - // Update the result location. - *resultPKAMemAddr = PKA_RAM_BASE + offset; - - // Load D pointer with the result location in PKA RAM. - HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; - - // Set the PKA function to ECC-MULT and start the operation. - HWREG(PKA_BASE + PKA_O_FUNCTION) = PKA_FUNCTION_RUN_M | (0x05 << PKA_FUNCTION_SEQUENCER_OPERATIONS_S); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the result of ECC Multiplication -// -//***************************************************************************** -uint32_t PKAEccMultiplyGetResult(ECC_CurvePoint *curvePoint, uint32_t resultPKAMemAddr, const ECC_Curve *curve) -{ - return PKAGetECCResult(curvePoint, resultPKAMemAddr, curve); -} - -//***************************************************************************** -// -// Start the ECC Addition. -// -//***************************************************************************** -uint32_t PKAEccAddStart(const ECC_CurvePoint *curvePoint1, const ECC_CurvePoint *curvePoint2, const ECC_Curve *curve, uint32_t *resultPKAMemAddr) -{ - uint32_t offset = 0; - - // Check for the arguments. - ASSERT(curvePoint1); - ASSERT(curvePoint1->x); - ASSERT(curvePoint1->y); - ASSERT(curvePoint2); - ASSERT(curvePoint2->x); - ASSERT(curvePoint2->y); - ASSERT(curve); - ASSERT(resultPKAMemAddr); - - // Make sure no operation is in progress. - if (HWREG(PKA_BASE + PKA_O_FUNCTION) & PKA_FUNCTION_RUN) { - return PKA_STATUS_OPERATION_BUSY; - } - - offset = PKAWritePkaParamExtraOffset(curvePoint1->x, curve->lengthInWords, offset, PKA_O_APTR); - offset = PKAWritePkaParamExtraOffset(curvePoint1->y, curve->lengthInWords, offset, PKA_NO_POINTER_REG); - - - offset = PKAWritePkaParamExtraOffset(curve->p, curve->lengthInWords, offset, PKA_O_BPTR); - offset = PKAWritePkaParamExtraOffset(curve->a, curve->lengthInWords, offset, PKA_NO_POINTER_REG); - - offset = PKAWritePkaParamExtraOffset(curvePoint2->x, curve->lengthInWords, offset, PKA_O_CPTR); - offset = PKAWritePkaParamExtraOffset(curvePoint2->y, curve->lengthInWords, offset, PKA_NO_POINTER_REG); - - // Copy the result vector location. - *resultPKAMemAddr = PKA_RAM_BASE + offset; - - // Load D pointer with the result location in PKA RAM. - HWREG(PKA_BASE + PKA_O_DPTR) = offset >> 2; - - // Load length registers. - HWREG(PKA_BASE + PKA_O_BLENGTH) = curve->lengthInWords; - - // Set the PKA Function to ECC-ADD and start the operation. - HWREG(PKA_BASE + PKA_O_FUNCTION ) = PKA_FUNCTION_RUN_M | (0x03 << PKA_FUNCTION_SEQUENCER_OPERATIONS_S); - - return PKA_STATUS_SUCCESS; -} - -//***************************************************************************** -// -// Get the result of the ECC Addition -// -//***************************************************************************** -uint32_t PKAEccAddGetResult(ECC_CurvePoint *curvePoint, uint32_t resultPKAMemAddr, const ECC_Curve *curve) -{ - return PKAGetECCResult(curvePoint, resultPKAMemAddr, curve); -} diff --git a/third_party/ti/devices/cc26x2/driverlib/pka.h b/third_party/ti/devices/cc26x2/driverlib/pka.h deleted file mode 100644 index fd5e3bcda..000000000 --- a/third_party/ti/devices/cc26x2/driverlib/pka.h +++ /dev/null @@ -1,655 +0,0 @@ -/****************************************************************************** -* Filename: pka.h -* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017) -* Revision: 48729 -* -* Description: PKA header file. -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ - -//***************************************************************************** -// -//! \addtogroup peripheral_group -//! @{ -//! \addtogroup pka_api -//! @{ -// -//***************************************************************************** - -#ifndef __PKA_H__ -#define __PKA_H__ - -//***************************************************************************** -// -// If building with a C++ compiler, make all of the definitions in this header -// have a C binding. -// -//***************************************************************************** -#ifdef __cplusplus -extern "C" -{ -#endif - -#include "../inc/hw_types.h" -#include "../inc/hw_memmap.h" -#include "../inc/hw_ints.h" -#include "../inc/hw_pka.h" -#include "../inc/hw_pka_ram.h" -#include "interrupt.h" -#include "sys_ctrl.h" -#include "debug.h" - -//***************************************************************************** -// -// Support for DriverLib in ROM: -// This section renames all functions that are not "static inline", so that -// calling these functions will default to implementation in flash. At the end -// of this file a second renaming will change the defaults to implementation in -// ROM for available functions. -// -// To force use of the implementation in flash, e.g. for debugging: -// - Globally: Define DRIVERLIB_NOROM at project level -// - Per function: Use prefix "NOROM_" when calling the function -// -//***************************************************************************** -#if !defined(DOXYGEN) - #define PKAGetOpsStatus NOROM_PKAGetOpsStatus - #define PKABigNumModStart NOROM_PKABigNumModStart - #define PKABigNumModGetResult NOROM_PKABigNumModGetResult - #define PKABigNumCmpStart NOROM_PKABigNumCmpStart - #define PKABigNumCmpGetResult NOROM_PKABigNumCmpGetResult - #define PKABigNumInvModStart NOROM_PKABigNumInvModStart - #define PKABigNumInvModGetResult NOROM_PKABigNumInvModGetResult - #define PKABigNumMultiplyStart NOROM_PKABigNumMultiplyStart - #define PKABigNumMultGetResult NOROM_PKABigNumMultGetResult - #define PKABigNumAddStart NOROM_PKABigNumAddStart - #define PKABigNumAddGetResult NOROM_PKABigNumAddGetResult - #define PKAEccMultiplyStart NOROM_PKAEccMultiplyStart - #define PKAEccMultiplyGetResult NOROM_PKAEccMultiplyGetResult - #define PKAEccAddStart NOROM_PKAEccAddStart - #define PKAEccAddGetResult NOROM_PKAEccAddGetResult -#endif - -//***************************************************************************** -// -// Function return values -// -//***************************************************************************** -#define PKA_STATUS_SUCCESS 0 //!< Success -#define PKA_STATUS_FAILURE 1 //!< Failure -#define PKA_STATUS_INVALID_PARAM 2 //!< Invalid parameter -#define PKA_STATUS_BUF_UNDERFLOW 3 //!< Buffer underflow -#define PKA_STATUS_RESULT_0 4 //!< Result is all zeros -#define PKA_STATUS_A_GR_B 5 //!< Big number compare return status if the first big number is greater than the second. -#define PKA_STATUS_A_LT_B 6 //!< Big number compare return status if the first big number is less than the second. -#define PKA_STATUS_OPERATION_BUSY 7 //!< PKA operation is in progress. -#define PKA_STATUS_OPERATION_RDY 8 //!< No PKA operation is in progress. - -//***************************************************************************** -// -//! \brief A structure which contains the pointers to the values of x and y -//! coordinates of the Elliptical Curve point. -// -//***************************************************************************** -typedef struct ECC_CurvePoint { - uint32_t *x; //!< Pointer to value of the x coordinate of the EC point. - uint32_t *y; //!< Pointer to value of the y coordinate of the EC point. -} -ECC_CurvePoint; - -//***************************************************************************** -// -//! \brief A structure which contains the necessary elements of the -//! Elliptical Curve Cryptography's (ECC) prime curve. -//! -//! The equation used to define the curve is expressed in the short Weierstrass -//! form y^3 = x^2 + a*x + b -// -//***************************************************************************** -typedef struct ECC_Curve { - const uint32_t lengthInWords; //!< Size of the curve in 32-bit word. - const uint32_t *p; //!< The prime that defines the field of the curve. - const uint32_t *n; //!< Order of the curve. - const uint32_t *a; //!< Coefficient a of the equation. - const uint32_t *b; //!< Coefficient b of the equation. - const ECC_CurvePoint g; //!< Generator point of the curve. -} -ECC_Curve; - - -//***************************************************************************** -// -//! \brief A structure representing the NIST P-256 eliptic curve. -//! -//! The curve structure links constants formatted for use with PKA driverlib. -// -//***************************************************************************** -extern const ECC_Curve NIST_P256; - -//***************************************************************************** -// -// Prototypes for the APIs. -// -//***************************************************************************** - -//***************************************************************************** -// -//! \brief Gets the PKA operation status. -//! -//! This function gets information on whether any PKA operation is in -//! progress or not. This function allows to check the PKA operation status -//! before starting any new PKA operation. -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA operation is in progress. -//! - \ref PKA_STATUS_OPERATION_RDY if the PKA operation is not in progress. -// -//***************************************************************************** -extern uint32_t PKAGetOpsStatus(void); - -//***************************************************************************** -// -//! \brief Starts a big number modulus operation. -//! -//! This function starts the modulo operation on the big number \c bigNum -//! using the divisor \c modulus. The PKA RAM location where the result -//! will be available is stored in \c resultPKAMemAddr. -//! -//! \param [in] bigNum is the pointer to the big number on which modulo operation -//! needs to be carried out. -//! -//! \param [in] bigNumLengthInWords is the size of the big number \c bigNum in 32-bit words. -//! -//! \param [in] modulus is the pointer to the divisor. -//! -//! \param [in] modulusLengthInWords is the size of the divisor \c modulus in 32-bit words. -//! -//! \param [out] resultPKAMemAddr is the pointer to the result vector location -//! which will be set by this function. -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY, if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKABigNumModGetResult() -// -//***************************************************************************** -extern uint32_t PKABigNumModStart(uint32_t* bigNum, uint32_t bigNumLengthInWords, uint32_t* modulus, uint32_t modulusLengthInWords, uint32_t* resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Gets the result of the big number modulus operation. -//! -//! This function gets the result of the big number modulus operation which was -//! previously started using the function PKABigNumModStart(). -//! -//! \param [out] resultBuf is the pointer to buffer where the result needs to -//! be stored. -//! -//! \param [in] lengthInWords is the size of the provided buffer in 32-bit words. -//! -//! \param [in] resultPKAMemAddr is the address of the result location which -//! was provided by the start function PKABigNumModStart(). -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! the operation. -//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. -//! - \ref PKA_STATUS_BUF_UNDERFLOW if the \c lengthInWords is less than the length -//! of the result. -//! -//! \sa PKABigNumModStart() -// -//***************************************************************************** -extern uint32_t PKABigNumModGetResult(uint32_t* resultBuf, uint32_t lengthInWords, uint32_t resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Starts the comparison of two big numbers. -//! -//! This function starts the comparison of two big numbers pointed by -//! \c bigNum1 and \c bigNum2. -//! -//! \note \c bigNum1 and \c bigNum2 must have same size. -//! -//! \param [in] bigNum1 is the pointer to the first big number. -//! -//! \param [in] bigNum2 is the pointer to the second big number. -//! -//! \param [in] lengthInWords is the size of the big numbers in 32-bit words. -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKABigNumCmpGetResult() -// -//***************************************************************************** -extern uint32_t PKABigNumCmpStart(uint32_t* bigNum1, uint32_t* bigNum2, uint32_t lengthInWords); - -//***************************************************************************** -// -//! \brief Gets the result of the comparison operation of two big numbers. -//! -//! This function provides the results of the comparison of two big numbers -//! which was started using the PKABigNumCmpStart(). -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_OPERATION_BUSY if the operation is in progress. -//! - \ref PKA_STATUS_SUCCESS if the two big numbers are equal. -//! - \ref PKA_STATUS_A_GR_B if the first number is greater than the second. -//! - \ref PKA_STATUS_A_LT_B if the first number is less than the second. -//! -//! \sa PKABigNumCmpStart() -// -//***************************************************************************** -extern uint32_t PKABigNumCmpGetResult(void); - -//***************************************************************************** -// -//! \brief Starts a big number inverse modulo operation. -//! -//! This function starts the the inverse modulo operation on \c bigNum -//! using the divisor \c modulus. -//! -//! \param [in] bigNum is the pointer to the buffer containing the big number -//! (dividend). -//! -//! \param [in] bigNumLengthInWords is the size of the \c bigNum in 32-bit words. -//! -//! \param [in] modulus is the pointer to the buffer containing the divisor. -//! -//! \param [in] modulusLengthInWords is the size of the divisor in 32-bit words. -//! -//! \param [out] resultPKAMemAddr is the pointer to the result vector location -//! which will be set by this function. -//! -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKABigNumInvModGetResult() -// -//***************************************************************************** -extern uint32_t PKABigNumInvModStart(uint32_t* bigNum, uint32_t bigNumLengthInWords, uint32_t* modulus, uint32_t modulusLengthInWords, uint32_t* resultPKAMemAddr); - - -//***************************************************************************** -// -//! \brief Gets the result of the big number inverse modulo operation. -//! -//! This function gets the result of the big number inverse modulo operation -//! previously started using the function PKABigNumInvModStart(). -//! -//! \param [out] resultBuf is the pointer to buffer where the result needs to be -//! stored. -//! -//! \param [in] lengthInWords is the size of the provided buffer in 32-bit words. -//! -//! \param [in] resultPKAMemAddr is the address of the result location which -//! was provided by the start function PKABigNumInvModStart(). -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if the operation is successful. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing -//! the operation. -//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. -//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less -//! than the result. -//! -//! \sa PKABigNumInvModStart() -// -//***************************************************************************** -extern uint32_t PKABigNumInvModGetResult(uint32_t* resultBuf, uint32_t lengthInWords, uint32_t resultPKAMemAddr); - - -//***************************************************************************** -// -//! \brief Starts the multiplication of two big numbers. -//! -//! \param [in] multiplicand is the pointer to the buffer containing the big -//! number multiplicand. -//! -//! \param [in] multiplicandLengthInWords is the size of the multiplicand in 32-bit words. -//! -//! \param [in] multiplier is the pointer to the buffer containing the big -//! number multiplier. -//! -//! \param [in] multiplierLengthInWords is the size of the multiplier in 32-bit words. -//! -//! \param [out] resultPKAMemAddr is the pointer to the result vector location -//! which will be set by this function. -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKABigNumMultGetResult() -// -//***************************************************************************** -extern uint32_t PKABigNumMultiplyStart(uint32_t* multiplicand, uint32_t multiplicandLengthInWords, uint32_t* multiplier, uint32_t multiplierLengthInWords, uint32_t* resultPKAMemAddr); - - -//***************************************************************************** -// -//! \brief Gets the result of the big number multiplication. -//! -//! This function gets the result of the multiplication of two big numbers -//! operation previously started using the function PKABigNumMultiplyStart(). -//! -//! \param [out] resultBuf is the pointer to buffer where the result needs to be -//! stored. -//! -//! \param [in, out] resultLengthInWords is the address of the variable containing the length of the -//! buffer in 32-bit words. After the operation, the actual length of the resultant is stored -//! at this address. -//! -//! \param [in] resultPKAMemAddr is the address of the result location which -//! was provided by the start function PKABigNumMultiplyStart(). -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if the operation is successful. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing -//! the operation. -//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. -//! - \ref PKA_STATUS_FAILURE if the operation is not successful. -//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less -//! then the length of the result. -//! -//! \sa PKABigNumMultiplyStart() -// -//***************************************************************************** -extern uint32_t PKABigNumMultGetResult(uint32_t* resultBuf, uint32_t* resultLengthInWords, uint32_t resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Starts the addition of two big numbers. -//! -//! \param [in] bigNum1 is the pointer to the buffer containing the first -//! big number. -//! -//! \param [in] bigNum1LengthInWords is the size of the first big number in 32-bit words. -//! -//! \param [in] bigNum2 is the pointer to the buffer containing the second -//! big number. -//! -//! \param [in] bigNum2LengthInWords is the size of the second big number in 32-bit words. -//! -//! \param [out] resultPKAMemAddr is the pointer to the result vector location -//! which will be set by this function. -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKABigNumAddGetResult() -// -//***************************************************************************** -extern uint32_t PKABigNumAddStart(uint32_t* bigNum1, uint32_t bigNum1LengthInWords, uint32_t* bigNum2, uint32_t bigNum2LengthInWords, uint32_t* resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Gets the result of the addition operation on two big numbers. -//! -//! \param [out] resultBuf is the pointer to buffer where the result -//! needs to be stored. -//! -//! \param [in, out] resultLengthInWords is the address of the variable containing -//! the length of the buffer. After the operation the actual length of the -//! resultant is stored at this address. -//! -//! \param [in] resultPKAMemAddr is the address of the result location which -//! was provided by the start function PKABigNumAddStart(). -//! -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if the operation is successful. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing -//! the operation. -//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. -//! - \ref PKA_STATUS_FAILURE if the operation is not successful. -//! - \ref PKA_STATUS_BUF_UNDERFLOW if the length of the provided buffer is less -//! then the length of the result. -//! -//! \sa PKABigNumAddStart() -// -//***************************************************************************** -extern uint32_t PKABigNumAddGetResult(uint32_t* resultBuf, uint32_t* resultLengthInWords, uint32_t resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Starts ECC multiplication. -//! -//! \param [in] scalar is pointer to the buffer containing the scalar -//! value to be multiplied. -//! -//! \param [in] curvePoint is the pointer to the structure containing the -//! elliptic curve point to be multiplied. The point must be on -//! the given curve. -//! -//! \param [in] curve is the pointer to the structure containing the curve -//! info. -//! -//! \param [out] resultPKAMemAddr is the pointer to the result vector location -//! which will be set by this function. -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKAEccMultiplyGetResult() -// -//***************************************************************************** -extern uint32_t PKAEccMultiplyStart(const uint32_t* scalar, const ECC_CurvePoint* curvePoint, const ECC_Curve* curve, uint32_t* resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Gets the result of ECC multiplication -//! -//! This function gets the result of ECC point multiplication operation on the -//! EC point and the scalar value, previously started using the function -//! PKAEccMultiplyStart(). -//! -//! \param [out] curvePoint is the pointer to the structure where the resultant EC -//! point will be stored. The application is responsible for allocating the -//! memory for the EC point structure and the x and y coordinate as well. -//! -//! \param [in] resultPKAMemAddr is the address of the result location which -//! was provided by the start function PKAEccMultiplyStart(). -//! -//! \param [in] curve is a pointer to a structure that defines the elliptic -//! curve in use. -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if the operation is successful. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing -//! the operation. -//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. -//! - \ref PKA_STATUS_FAILURE if the operation is not successful. -//! -//! \sa PKAEccMultiplyStart() -// -//***************************************************************************** -extern uint32_t PKAEccMultiplyGetResult(ECC_CurvePoint* curvePoint, uint32_t resultPKAMemAddr, const ECC_Curve *curve); - -//***************************************************************************** -// -//! \brief Starts the ECC addition. -//! -//! \param [in] curvePoint1 is the pointer to the structure containing the first -//! ECC point. -//! -//! \param [in] curvePoint2 is the pointer to the structure containing the -//! second ECC point. -//! -//! \param [in] curve is the pointer to the structure containing the curve -//! info. -//! -//! \param [out] resultPKAMemAddr is the pointer to the result vector location -//! which will be set by this function. -//! -//!\return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if successful in starting the operation. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy doing -//! some other operation. -//! -//! \sa PKAEccAddGetResult() -// -//***************************************************************************** -extern uint32_t PKAEccAddStart(const ECC_CurvePoint* curvePoint1, const ECC_CurvePoint* curvePoint2, const ECC_Curve* curve, uint32_t* resultPKAMemAddr); - -//***************************************************************************** -// -//! \brief Gets the result of the ECC addition -//! -//! This function gets the result of ECC point addition operation on the -//! on the two given EC points, previously started using the function -//! PKAEccAddStart(). -//! -//! \param [out] curvePoint is the pointer to the structure where the resultant -//! point will be stored. The application is responsible for allocating memory -//! for the EC point structure including the memory for x and y -//! coordinate values. -//! -//! \param [in] resultPKAMemAddr is the address of the result location which -//! was provided by the function PKAEccAddStart(). -//! -//! \param [in] curve is a pointer to a structure that defines the elliptic -//! curve in use. -//! -//! \return Returns a status code. -//! - \ref PKA_STATUS_SUCCESS if the operation is successful. -//! - \ref PKA_STATUS_OPERATION_BUSY if the PKA module is busy performing the operation. -//! - \ref PKA_STATUS_RESULT_0 if the result is all zeros. -//! - \ref PKA_STATUS_FAILURE if the operation is not successful. -//! -//! \sa PKAEccAddStart() -// -//***************************************************************************** -extern uint32_t PKAEccAddGetResult(ECC_CurvePoint* curvePoint, uint32_t resultPKAMemAddr, const ECC_Curve *curve); - -//***************************************************************************** -// -// Support for DriverLib in ROM: -// Redirect to implementation in ROM when available. -// -//***************************************************************************** -#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN) - #include "../driverlib/rom.h" - #ifdef ROM_PKAGetOpsStatus - #undef PKAGetOpsStatus - #define PKAGetOpsStatus ROM_PKAGetOpsStatus - #endif - #ifdef ROM_PKABigNumModStart - #undef PKABigNumModStart - #define PKABigNumModStart ROM_PKABigNumModStart - #endif - #ifdef ROM_PKABigNumModGetResult - #undef PKABigNumModGetResult - #define PKABigNumModGetResult ROM_PKABigNumModGetResult - #endif - #ifdef ROM_PKABigNumCmpStart - #undef PKABigNumCmpStart - #define PKABigNumCmpStart ROM_PKABigNumCmpStart - #endif - #ifdef ROM_PKABigNumCmpGetResult - #undef PKABigNumCmpGetResult - #define PKABigNumCmpGetResult ROM_PKABigNumCmpGetResult - #endif - #ifdef ROM_PKABigNumInvModStart - #undef PKABigNumInvModStart - #define PKABigNumInvModStart ROM_PKABigNumInvModStart - #endif - #ifdef ROM_PKABigNumInvModGetResult - #undef PKABigNumInvModGetResult - #define PKABigNumInvModGetResult ROM_PKABigNumInvModGetResult - #endif - #ifdef ROM_PKABigNumMultiplyStart - #undef PKABigNumMultiplyStart - #define PKABigNumMultiplyStart ROM_PKABigNumMultiplyStart - #endif - #ifdef ROM_PKABigNumMultGetResult - #undef PKABigNumMultGetResult - #define PKABigNumMultGetResult ROM_PKABigNumMultGetResult - #endif - #ifdef ROM_PKABigNumAddStart - #undef PKABigNumAddStart - #define PKABigNumAddStart ROM_PKABigNumAddStart - #endif - #ifdef ROM_PKABigNumAddGetResult - #undef PKABigNumAddGetResult - #define PKABigNumAddGetResult ROM_PKABigNumAddGetResult - #endif - #ifdef ROM_PKAEccMultiplyStart - #undef PKAEccMultiplyStart - #define PKAEccMultiplyStart ROM_PKAEccMultiplyStart - #endif - #ifdef ROM_PKAEccMultiplyGetResult - #undef PKAEccMultiplyGetResult - #define PKAEccMultiplyGetResult ROM_PKAEccMultiplyGetResult - #endif - #ifdef ROM_PKAEccAddStart - #undef PKAEccAddStart - #define PKAEccAddStart ROM_PKAEccAddStart - #endif - #ifdef ROM_PKAEccAddGetResult - #undef PKAEccAddGetResult - #define PKAEccAddGetResult ROM_PKAEccAddGetResult - #endif -#endif - -//***************************************************************************** -// -// Mark the end of the C bindings section for C++ compilers. -// -//***************************************************************************** -#ifdef __cplusplus -} -#endif - -#endif // __PKA_H__ - -//***************************************************************************** -// -//! Close the Doxygen group. -//! @} -//! @} -// -//***************************************************************************** diff --git a/third_party/ti/devices/cc26x2/driverlib/rf_prop_mailbox.h b/third_party/ti/devices/cc26x2/driverlib/rf_prop_mailbox.h deleted file mode 100644 index e7774d643..000000000 --- a/third_party/ti/devices/cc26x2/driverlib/rf_prop_mailbox.h +++ /dev/null @@ -1,98 +0,0 @@ -//------------------------------------------------------------------------------ -// TI Confidential - NDA Restrictions -// -// Copyright (c) 2013 Texas Instruments, Inc. -// -// This is an unpublished work created in the year stated above. -// Texas Instruments owns all rights in and to this work and -// intends to maintain and protect it as an unpublished copyright. -// In the event of either inadvertent or deliberate publication, -// the above stated date shall be treated as the year of first -// publication. In the event of such publication, Texas Instruments -// intends to enforce its rights in the work under the copyright -// laws as a published work. -// -//------------------------------------------------------------------------------ -/// -/// \file rf_prop_mailbox.h -/// \brief Definitions for probrietary mode radio interface -/// -/// \author Low Power RF Wireless Business Unit -/// Helge Coward (h.coward@ti.com) -/// -/// \date Thu Jan 31 11:49:17 CET 2013 -/// -//----------------------------------------------------------------------------- - -#ifndef _PROP_MAILBOX_H -#define _PROP_MAILBOX_H - -#include "rf_mailbox.h" - -/// \name CPE interrupt definitions for proprietary mode -/// Interrupt masks for the CPE interrupt in RDBELL. These are new names for interrupts in mailbox.h, -/// used for compartibility with previous versions with separate interrupt numbers. -///@{ -#define IRQN_PROP_RX_DATA_WRITTEN IRQN_RX_DATA_WRITTEN -#define IRQN_PROP_N_RX_DATA_WRITTEN IRQN_RX_N_DATA_WRITTEN -#define IRQN_PROP_TX_ENTRY_DONE IRQN_TX_ENTRY_DONE - -#define IRQN_PROP_RX_OK IRQN_RX_OK -#define IRQN_PROP_RX_NOK IRQN_RX_NOK -#define IRQN_PROP_RX_IGNORED IRQN_RX_IGNORED -#define IRQN_PROP_RX_ABORTED IRQN_RX_ABORTED -#define IRQN_PROP_RX_BUF_FULL IRQN_RX_BUF_FULL -#define IRQN_PROP_RX_ENTRY_DONE IRQN_RX_ENTRY_DONE - -#define IRQ_PROP_RX_DATA_WRITTEN (1U << IRQN_PROP_RX_DATA_WRITTEN) -#define IRQ_PROP_N_RX_DATA_WRITTEN (1U << IRQN_PROP_N_RX_DATA_WRITTEN) -#define IRQ_PROP_TX_ENTRY_DONE (1U << IRQN_PROP_TX_ENTRY_DONE) - -#define IRQ_PROP_RX_OK (1U << IRQN_PROP_RX_OK) -#define IRQ_PROP_RX_NOK (1U << IRQN_PROP_RX_NOK) -#define IRQ_PROP_RX_IGNORED (1U << IRQN_PROP_RX_IGNORED) -#define IRQ_PROP_RX_ABORTED (1U << IRQN_PROP_RX_ABORTED) -#define IRQ_PROP_RX_BUF_FULL (1U << IRQN_PROP_RX_BUF_FULL) -#define IRQ_PROP_RX_ENTRY_DONE (1U << IRQN_PROP_RX_ENTRY_DONE) -///@} - - - -/// \name Radio operation status -/// Radio operation status format: -/// Bits 15:12: Protocol -/// 0011: Proprietary -/// Bits 11:10: Type -/// 00: Not finished -/// 01: Done successfully -/// 10: Done with error -/// Bits 9:0: Identifier - -/// \name Operation finished normally -///@{ -#define PROP_DONE_OK 0x3400 ///< Operation ended normally -#define PROP_DONE_RXTIMEOUT 0x3401 ///< Operation stopped after end trigger while waiting for sync -#define PROP_DONE_BREAK 0x3402 ///< Rx stopped due to timeout in the middle of a packet -#define PROP_DONE_ENDED 0x3403 ///< Operation stopped after end trigger during reception -#define PROP_DONE_STOPPED 0x3404 ///< Operation stopped after stop command -#define PROP_DONE_ABORT 0x3405 ///< Operation aborted by abort command -#define PROP_DONE_RXERR 0x3406 ///< Operation ended after receiving packet with CRC error -#define PROP_DONE_IDLE 0x3407 ///< Carrier sense operation ended because of idle channel -#define PROP_DONE_BUSY 0x3408 ///< Carrier sense operation ended because of busy channel -#define PROP_DONE_IDLETIMEOUT 0x3409 ///< Carrier sense operation ended because of timeout with csConf.timeoutRes = 1 -#define PROP_DONE_BUSYTIMEOUT 0x340A ///< Carrier sense operation ended because of timeout with csConf.timeoutRes = 0 - -///@} -/// \name Operation finished with error -///@{ -#define PROP_ERROR_PAR 0x3800 ///< Illegal parameter -#define PROP_ERROR_RXBUF 0x3801 ///< No available Rx buffer at the start of a packet -#define PROP_ERROR_RXFULL 0x3802 ///< Out of Rx buffer during reception in a partial read buffer -#define PROP_ERROR_NO_SETUP 0x3803 ///< Radio was not set up in proprietary mode -#define PROP_ERROR_NO_FS 0x3804 ///< Synth was not programmed when running Rx or Tx -#define PROP_ERROR_RXOVF 0x3805 ///< Rx overflow observed during operation -#define PROP_ERROR_TXUNF 0x3806 ///< Tx underflow observed during operation -///@} -///@} - -#endif diff --git a/third_party/ti/devices/cc26x2/driverlib/sys_ctrl.c b/third_party/ti/devices/cc26x2/driverlib/sys_ctrl.c deleted file mode 100644 index b9ba35a05..000000000 --- a/third_party/ti/devices/cc26x2/driverlib/sys_ctrl.c +++ /dev/null @@ -1,173 +0,0 @@ -/****************************************************************************** -* Filename: sys_ctrl.c -* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017) -* Revision: 48852 -* -* Description: Driver for the System Control. -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ - -// Hardware headers -#include "../inc/hw_types.h" -#include "../inc/hw_ccfg.h" -// Driverlib headers -#include "aon_batmon.h" -#include "sys_ctrl.h" -#include "setup_rom.h" - - -//***************************************************************************** -// -// Handle support for DriverLib in ROM: -// This section will undo prototype renaming made in the header file -// -//***************************************************************************** -#if !defined(DOXYGEN) - #undef SysCtrlSetRechargeBeforePowerDown - #define SysCtrlSetRechargeBeforePowerDown NOROM_SysCtrlSetRechargeBeforePowerDown - #undef SysCtrlAdjustRechargeAfterPowerDown - #define SysCtrlAdjustRechargeAfterPowerDown NOROM_SysCtrlAdjustRechargeAfterPowerDown - #undef SysCtrl_DCDC_VoltageConditionalControl - #define SysCtrl_DCDC_VoltageConditionalControl NOROM_SysCtrl_DCDC_VoltageConditionalControl - #undef SysCtrlResetSourceGet - #define SysCtrlResetSourceGet NOROM_SysCtrlResetSourceGet -#endif - -//***************************************************************************** -// -// Recharge calculator defines and globals -// -//***************************************************************************** - -#define PD_STATE_CACHE_RET 1 -#define PD_STATE_RFMEM_RET 2 -#define PD_STATE_XOSC_LPM 4 -#define PD_STATE_EXT_REG_MODE 8 - - -//***************************************************************************** -// -// SysCtrlSetRechargeBeforePowerDown( xoscPowerMode ) -// -//***************************************************************************** -void -SysCtrlSetRechargeBeforePowerDown( uint32_t xoscPowerMode ) -{ - // Nothing to be done but keeping this function for platform compatibility. -} - - -//***************************************************************************** -// -// SysCtrlAdjustRechargeAfterPowerDown() -// -//***************************************************************************** -void -SysCtrlAdjustRechargeAfterPowerDown( void ) -{ - // Nothing to be done but keeping this function for platform compatibility. -} - - -//***************************************************************************** -// -// SysCtrl_DCDC_VoltageConditionalControl() -// -//***************************************************************************** -void -SysCtrl_DCDC_VoltageConditionalControl( void ) -{ - uint32_t batThreshold ; // Fractional format with 8 fractional bits. - uint32_t aonBatmonBat ; // Fractional format with 8 fractional bits. - uint32_t ccfg_ModeConfReg ; // Holds a copy of the CCFG_O_MODE_CONF register. - uint32_t aonPmctlPwrctl ; // Reflect whats read/written to the AON_PMCTL_O_PWRCTL register. - - // We could potentially call this function before any battery voltage measurement - // is made/available. In that case we must make sure that we do not turn off the DCDC. - // This can be done by doing nothing as long as the battery voltage is 0 (Since the - // reset value of the battery voltage register is 0). - aonBatmonBat = HWREG( AON_BATMON_BASE + AON_BATMON_O_BAT ); - if ( aonBatmonBat != 0 ) { - // Check if Voltage Conditional Control is enabled - // It is enabled if all the following are true: - // - DCDC in use (either in active or recharge mode), (in use if one of the corresponding CCFG bits are zero). - // - Alternative DCDC settings are enabled ( DIS_ALT_DCDC_SETTING == 0 ) - // - Not in external regulator mode ( EXT_REG_MODE == 0 ) - ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF ); - - if (((( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_RECHARGE_M ) == 0 ) || - (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_ACTIVE_M ) == 0 ) ) && - (( HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) & AON_PMCTL_PWRCTL_EXT_REG_MODE ) == 0 ) && - (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING ) == 0 ) ) - { - aonPmctlPwrctl = HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ); - batThreshold = (((( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) & - CCFG_MODE_CONF_1_ALT_DCDC_VMIN_M ) >> - CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S ) + 28 ) << 4 ); - - if ( aonPmctlPwrctl & ( AON_PMCTL_PWRCTL_DCDC_EN_M | AON_PMCTL_PWRCTL_DCDC_ACTIVE_M )) { - // DCDC is ON, check if it should be switched off - if ( aonBatmonBat < batThreshold ) { - aonPmctlPwrctl &= ~( AON_PMCTL_PWRCTL_DCDC_EN_M | AON_PMCTL_PWRCTL_DCDC_ACTIVE_M ); - - HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) = aonPmctlPwrctl; - } - } else { - // DCDC is OFF, check if it should be switched on - if ( aonBatmonBat > batThreshold ) { - if (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_RECHARGE_M ) == 0 ) aonPmctlPwrctl |= AON_PMCTL_PWRCTL_DCDC_EN_M ; - if (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_ACTIVE_M ) == 0 ) aonPmctlPwrctl |= AON_PMCTL_PWRCTL_DCDC_ACTIVE_M ; - - HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) = aonPmctlPwrctl; - } - } - } - } -} - - -//***************************************************************************** -// -// SysCtrlResetSourceGet() -// -//***************************************************************************** -uint32_t -SysCtrlResetSourceGet( void ) -{ - if ( HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ) & AON_PMCTL_RESETCTL_WU_FROM_SD_M ) { - return ( RSTSRC_WAKEUP_FROM_SHUTDOWN ); - } else { - return (( HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ) & - AON_PMCTL_RESETCTL_RESET_SRC_M ) >> - AON_PMCTL_RESETCTL_RESET_SRC_S ) ; - } -} diff --git a/third_party/ti/devices/cc26x2/driverlib/watchdog_doc.h b/third_party/ti/devices/cc26x2/driverlib/watchdog_doc.h deleted file mode 100644 index 799bf7c71..000000000 --- a/third_party/ti/devices/cc26x2/driverlib/watchdog_doc.h +++ /dev/null @@ -1,98 +0,0 @@ -/****************************************************************************** -* Filename: watchdog_doc.h -* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016) -* Revision: 45971 -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ -//! \addtogroup wdt_api -//! @{ -//! \section sec_wdt Introduction -//! -//! The watchdog timer (WDT) is used to regain control when the system has failed due to unexpected -//! software behavior. The WDT can generate a non-maskable interrupt (NMI), a regular interrupt, or a -//! reset if the software fails to reload the watchdog before it times out. -//! -//! WDT has the following features: -//! - 32-bit down counter with a programmable load register. -//! - Programmable interrupt generation logic with interrupt masking and optional NMI function. -//! - Optional reset generation. -//! - Register protection from runaway software (lock). -//! - User-enabled stalling when the system CPU asserts the CPU Halt flag during debug. -//! -//! After the first time-out event, the 32-bit counter is re-loaded with the value of the Load register, -//! and the timer resumes counting down from that value. -//! If the timer counts down to its zero state again before the first time-out interrupt is cleared, -//! and the reset signal has been enabled, the WDT asserts its reset signal to the system. If the interrupt -//! is cleared before the 32-bit counter reaches its second time-out, the 32-bit counter is loaded with the -//! value in the Load register, and counting resumes from that value. -//! -//! If Load register is written with a new value while the WDT counter is counting, then the counter is -//! loaded with the new value and continues counting. -//! Writing to the Load register does not clear an active interrupt. An interrupt must be explicitly cleared -//! by clearing the interrupt. -//! -//! The WDT counter runs at system HF clock divided by 32; however, when in powerdown it runs at -//! LF clock (32 kHz) - if the LF clock to the MCU domain has been enabled. -//! -//! \section sec_wdt_api API -//! -//! The API functions can be grouped like this: -//! -//! Watchdog configuration: -//! - \ref WatchdogIntTypeSet() -//! - \ref WatchdogResetEnable() -//! - \ref WatchdogResetDisable() -//! - \ref WatchdogReloadSet() -//! - \ref WatchdogEnable() -//! -//! Status: -//! - \ref WatchdogRunning() -//! - \ref WatchdogValueGet() -//! - \ref WatchdogReloadGet() -//! - \ref WatchdogIntStatus() -//! -//! Interrupt configuration: -//! - \ref WatchdogIntEnable() -//! - \ref WatchdogIntClear() -//! - \ref WatchdogIntRegister() -//! - \ref WatchdogIntUnregister() -//! -//! Register protection: -//! - \ref WatchdogLock() -//! - \ref WatchdogLockState() -//! - \ref WatchdogUnlock() -//! -//! Stall configuration for debugging: -//! - \ref WatchdogStallDisable() -//! - \ref WatchdogStallEnable() -//! -//! @} diff --git a/third_party/ti/devices/cc26x2/inc/hw_device.h b/third_party/ti/devices/cc26x2/inc/hw_device.h deleted file mode 100644 index 7cf76eace..000000000 --- a/third_party/ti/devices/cc26x2/inc/hw_device.h +++ /dev/null @@ -1,168 +0,0 @@ -/****************************************************************************** -* Filename: hw_device.h -* Revised: 2016-09-13 14:21:40 +0200 (Tue, 13 Sep 2016) -* Revision: 47152 -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ - -#ifndef __HW_DEVICE_H__ -#define __HW_DEVICE_H__ - -#include "../inc/hw_chip_def.h" - -#ifdef CC_GET_CHIP_PACKAGE - -#if ( CC_GET_CHIP_PACKAGE == 0x7 ) -//***************************************************************************** -// -// The following are defines for edge detection on wake up events for the -// CC26xx 7x7 packaged device. -// -//***************************************************************************** -#define AON_EVENT_DIO0 18 -#define AON_EVENT_DIO1 17 -#define AON_EVENT_DIO2 16 -#define AON_EVENT_DIO3 15 -#define AON_EVENT_DIO4 14 -#define AON_EVENT_DIO5 13 -#define AON_EVENT_DIO6 12 -#define AON_EVENT_DIO7 11 -#define AON_EVENT_DIO8 10 -#define AON_EVENT_DIO9 9 -#define AON_EVENT_DIO10 8 -#define AON_EVENT_DIO11 7 -#define AON_EVENT_DIO12 6 -#define AON_EVENT_DIO13 5 -#define AON_EVENT_DIO14 4 -#define AON_EVENT_DIO15 3 -#define AON_EVENT_DIO16 2 -#define AON_EVENT_DIO17 1 -#define AON_EVENT_DIO18 31 -#define AON_EVENT_DIO19 30 -#define AON_EVENT_DIO20 29 -#define AON_EVENT_DIO21 28 -#define AON_EVENT_DIO22 27 -#define AON_EVENT_DIO23 26 -#define AON_EVENT_DIO24 25 -#define AON_EVENT_DIO25 24 -#define AON_EVENT_DIO26 23 -#define AON_EVENT_DIO27 22 -#define AON_EVENT_DIO28 21 -#define AON_EVENT_DIO29 20 -#define AON_EVENT_DIO30 19 -#define AON_EVENT_DIO31 0x3F -#endif // ( CC_GET_CHIP_PACKAGE == 0x7 ) - -#if ( CC_GET_CHIP_PACKAGE == 0x5 ) -//***************************************************************************** -// -// The following are defines for edge detection on wake up events for the -// CC26xx 5x5 packaged device. -// -//***************************************************************************** -#define AON_EVENT_DIO0 15 -#define AON_EVENT_DIO1 14 -#define AON_EVENT_DIO2 13 -#define AON_EVENT_DIO3 12 -#define AON_EVENT_DIO4 11 -#define AON_EVENT_DIO5 2 -#define AON_EVENT_DIO6 1 -#define AON_EVENT_DIO7 26 -#define AON_EVENT_DIO8 25 -#define AON_EVENT_DIO9 23 -#define AON_EVENT_DIO10 24 -#define AON_EVENT_DIO11 22 -#define AON_EVENT_DIO12 21 -#define AON_EVENT_DIO13 20 -#define AON_EVENT_DIO14 19 -#define AON_EVENT_DIO15 0x3F -#define AON_EVENT_DIO16 0x3F -#define AON_EVENT_DIO17 0x3F -#define AON_EVENT_DIO18 0x3F -#define AON_EVENT_DIO19 0x3F -#define AON_EVENT_DIO20 0x3F -#define AON_EVENT_DIO21 0x3F -#define AON_EVENT_DIO22 0x3F -#define AON_EVENT_DIO23 0x3F -#define AON_EVENT_DIO24 0x3F -#define AON_EVENT_DIO25 0x3F -#define AON_EVENT_DIO26 0x3F -#define AON_EVENT_DIO27 0x3F -#define AON_EVENT_DIO28 0x3F -#define AON_EVENT_DIO29 0x3F -#define AON_EVENT_DIO30 0x3F -#define AON_EVENT_DIO31 0x3F -#endif // ( CC_GET_CHIP_PACKAGE == 0x5 ) - -#if ( CC_GET_CHIP_PACKAGE == 0x4 ) -//***************************************************************************** -// -// The following are defines for edge detection on wake up events for the -// CC26xx 4x4 packaged device. -// -//***************************************************************************** -#define AON_EVENT_DIO0 13 -#define AON_EVENT_DIO1 12 -#define AON_EVENT_DIO2 11 -#define AON_EVENT_DIO3 2 -#define AON_EVENT_DIO4 1 -#define AON_EVENT_DIO5 26 -#define AON_EVENT_DIO6 25 -#define AON_EVENT_DIO7 24 -#define AON_EVENT_DIO8 23 -#define AON_EVENT_DIO9 22 -#define AON_EVENT_DIO10 0x3F -#define AON_EVENT_DIO11 0x3F -#define AON_EVENT_DIO12 0x3F -#define AON_EVENT_DIO13 0x3F -#define AON_EVENT_DIO14 0x3F -#define AON_EVENT_DIO15 0x3F -#define AON_EVENT_DIO16 0x3F -#define AON_EVENT_DIO17 0x3F -#define AON_EVENT_DIO18 0x3F -#define AON_EVENT_DIO19 0x3F -#define AON_EVENT_DIO20 0x3F -#define AON_EVENT_DIO21 0x3F -#define AON_EVENT_DIO22 0x3F -#define AON_EVENT_DIO23 0x3F -#define AON_EVENT_DIO24 0x3F -#define AON_EVENT_DIO25 0x3F -#define AON_EVENT_DIO26 0x3F -#define AON_EVENT_DIO27 0x3F -#define AON_EVENT_DIO28 0x3F -#define AON_EVENT_DIO29 0x3F -#define AON_EVENT_DIO30 0x3F -#define AON_EVENT_DIO31 0x3F -#endif // ( CC_GET_CHIP_PACKAGE == 0x4 ) - -#endif // defined( CC_GET_CHIP_PACKAGE ) -#endif // __HW_DEVICE_H__ diff --git a/third_party/ti/devices/cc26x2/inc/hw_rfc_rat.h b/third_party/ti/devices/cc26x2/inc/hw_rfc_rat.h deleted file mode 100644 index 935fc887a..000000000 --- a/third_party/ti/devices/cc26x2/inc/hw_rfc_rat.h +++ /dev/null @@ -1,62 +0,0 @@ -/****************************************************************************** -* Filename: hw_rfc_rat_h -* Revised: 2017-01-10 11:54:43 +0100 (Tue, 10 Jan 2017) -* Revision: 48190 -* -* Copyright (c) 2015 - 2017, Texas Instruments Incorporated -* All rights reserved. -* -* Redistribution and use in source and binary forms, with or without -* modification, are permitted provided that the following conditions are met: -* -* 1) Redistributions of source code must retain the above copyright notice, -* this list of conditions and the following disclaimer. -* -* 2) Redistributions in binary form must reproduce the above copyright notice, -* this list of conditions and the following disclaimer in the documentation -* and/or other materials provided with the distribution. -* -* 3) Neither the name of the ORGANIZATION nor the names of its contributors may -* be used to endorse or promote products derived from this software without -* specific prior written permission. -* -* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -* POSSIBILITY OF SUCH DAMAGE. -* -******************************************************************************/ - -#ifndef __HW_RFC_RAT_H__ -#define __HW_RFC_RAT_H__ - -//***************************************************************************** -// -// This section defines the register offsets of -// RFC_RAT component -// -//***************************************************************************** -// Radio Timer Counter Value -#define RFC_RAT_O_RATCNT 0x00000004 - -//***************************************************************************** -// -// Register: RFC_RAT_O_RATCNT -// -//***************************************************************************** -// Field: [31:0] CNT -// -// Counter value. This is not writable while radio timer counter is enabled. -#define RFC_RAT_RATCNT_CNT_W 32 -#define RFC_RAT_RATCNT_CNT_M 0xFFFFFFFF -#define RFC_RAT_RATCNT_CNT_S 0 - - -#endif // __RFC_RAT__ diff --git a/third_party/ti/release_notes_driverlib_cc13xx_cc26xx.html b/third_party/ti/release_notes_driverlib_cc13xx_cc26xx.html index 3a25b8e63..e984d58fd 100644 --- a/third_party/ti/release_notes_driverlib_cc13xx_cc26xx.html +++ b/third_party/ti/release_notes_driverlib_cc13xx_cc26xx.html @@ -69,6 +69,7 @@ [RF_PATCH] RF Patches [RF_SETTING] RF Settings [HW_INC] Hardware interface description + [DRV_API] Driverlib Application interface [DRV_SRC] Driverlib source code [DRV_DOC] Driverlib documentation [DRV_LIB] Prebuilt libraries @@ -77,6 +78,195 @@ +
+

driverlib_cc13xx_cc26xx_3_02_01_17905

+
+ Release date: August 31, 2017
+ +

New features

+
    +
  • CC13x2_CC26x2 +
      +
    • [RF_PATCH] CPE PROP: Added new CPE PROP patch, to prepare for future PHYs using "PROP" API commands. (This patch code is currently identical to the existing CPE GenFSK and CPE SimpleLink Long Range patches).
      • +
    • [RF_PATCH] CPE BLE: Added new CPE BLE patch, to be used for Bluetooth 4.2 using "BLE" API commands. This patch does not include Bluetooth 5 related fixes, and may therefore be smaller in patch code size. This is to supplement the existing CPE BT5 patch for Bluetooth 5, for use cases where only Bluetooth 4.2 functionality is desired.
      • +
    • [RF_PATCH] CPE MULTI: Added new CPE multi-protocol patch, to be used for multi-PHY use case. This patch contains bug fixes related to all available API command sets (i.e. "BLE", "BLE5", "IEEE", "PROP", "HS") and should be used in a multi-protocol use case instead of switching between multiple CPE patches.
      • +
    • +
+ +

Improvements

+
    +
  • None
    • +
+ +

Bug fixes

+
    +
  • CC13x2_CC26x2 +
      +
    • [DRV_SRC] Crypto: Function SHA2ExecuteHash(): Fixed bug that that yielded incorrect digests for messages whose length is a multiple of the hash block size.
      • +
    • [RF_PATCH] MCE IEEE 802.15.4: Added new MCE patch for IEEE 802.15.14-2006 at 2.4 GHz. This contains fix for Rx correlation search failure.
      • +
    • +
+ +

Known issues

+
    +
  • CC26x0
    • +
      +
    • [RF_PATCH] General: CMD_SCH_IMM could cause loss of commands.
      • +
    +
  • CC26x0R2 +
      +
    • [RF_API] General: GPO control not functional. (The PA_EN status signal does not go low).
      • +
    • +
    +
  • For an updated list of known issues (including issues found after the release), see CC13xx_CC26xx_driverlib on the Texas Instruments wiki.
    • +
+
+
+
+

driverlib_cc13xx_cc26xx_3_02_00_17858

+
+ Release date: August 2, 2017
+ +

New features

+
    +
  • Changes that apply to all devices +
      +
    • [DRV_SRC] sys_ctrl: Added configurable initial VDDR recharge period margin to permit setting a more conservative initial recharge period.
      • +
    • [DRV_API] sys_ctrl: Added a new parameter to function SysCtrlAdjustRechargeAfterPowerDown().
      • +
    • +
  • CC13x0 +
      +
    • [RF_PATCH]: GHS Added new CPE/MCE patch set for general high-speed GenFSK ("ghs" patch). CPE patch is identical to GenFSK.
      • +
    • [RF_PATCH]: BREPEAT Added new CPE/MCE patch set for using bit-repeat mode ("brepeat" patch), for symbol rate. CPE patch is identical to GenFSK.
      • +
    • [RF_API] Headers: In CPE commands CMD_PROP_RADIO_SETUP and CMD_PROP_RADIO_DIV_SETUP, the struct bit fields symbolRate.bPdifDecim and symbolRate.pdifDecim have been joined into one field, symbolRate.decimMode, with unchanged functionality. This change is to have same API for CC13x0 as exists for CC13x2 and CC26x2 devices. This field is needed used when using "brepeat" radio patch.
      • +
    • +
  • CC13x2_CC26x2 +
      +
    • Initial revision of driverlib for new devices CC13x2 and CC26x2.
      • +
    • +
+ +

Improvements

+
    +
  • Changes that apply to all devices +
      +
    • [DRV_API] sys_ctrl: Removed definition "RSTSRC_VDD_LOSS" since this value will never be returned when calling SysCtrlResetSourceGet().
      • +
    • [DRV_SRC] CCFG: Removed gcc compiler warning (change of sign) when compiling ccfg.c.
      • +
    • [DRV_SRC] CPU: Removed gcc compiler warning for function CPUbasepriSet().
      • +
    • +
  • CC26x0R2 +
      +
    • [RF_PATCH] CPE BLE: Updated CPE patch for Bluetooth 4.2 to fix known issue related to CMD_SCH_IMM. This also includes a fix for a rare problem where CPE may hang when running BLE master command.
      • +
    • [RF_PATCH] CPE BT5: Updated CPE patch for Bluetooth 5 to fix known issue related to CMD_SCH_IMM. This also includes a fix for a rare problem where CPE may hang when running BLE master command.
      • +
    • +
+ +

Bug fixes

+
    +
  • CC26x0R2 +
      +
    • [RF_PATCH] CPE BT5: CPE BT5 patch for Bluetooth 5: Corrected an error when ignoring identity address for resolvable private addresses in legacy advertiser.
      • +
    • +
+ +

Known issues

+
    +
  • CC26x0
    • +
      +
    • [RF_PATCH] General: CMD_SCH_IMM could cause loss of commands.
      • +
    +
  • CC26x0R2 +
      +
    • [RF_API] General: GPO control not functional. (The PA_EN status signal does not go low).
      • +
    • +
    +
  • For an updated list of known issues (including issues found after the release), see CC13xx_CC26xx_driverlib on the Texas Instruments wiki.
    • +
+
+
+
+

driverlib_cc13xx_cc26xx_3_01_03_17842

+
+ Release date: July 20, 2017
+ +

New features

+
    +
  • None
    • +
+ +

Improvements

+
    +
  • None
    • +
+ +

Bug fixes

+
    +
  • None
    • +
+ +

Known issues

+
    +
  • CC26x0
    • +
  • CC26x0R2 +
      +
    • [RF_API] General: GPO control not functional.
      • +
    • [RF_PATCH] General: CMD_SCH_IMM could cause loss of commands.
      • +
    • +
    +
  • For an updated list of known issues (including issues found after the release), see CC13xx_CC26xx_driverlib on the Texas Instruments wiki.
    • +
+
+
+
+

driverlib_cc13xx_cc26xx_3_01_02_17805

+
+ Release date: June 1, 2017
+ +

New features

+
    +
  • CC13x0 +
      +
    • [RF_PATCH] General: Added GenFSK Antenna diversity CPE patch.
      • +
    • [RF_PATCH] General: Added high speed GenFSK patches.
      • +
    • +
+ +

Improvements

+
    +
  • Changes that apply to all devices +
      +
    • [DRV_DOC] General: General improvement of the documentation.
      • +
    • [HW_INC] General: Updated/improved hardware register descriptions (inc/hw_*.h and doc/../*.html files).
      • +
    • +
  • CC13x0 +
      +
    • [RF_API] Headers: Added bPdifDecim and pdifDecim to symbolRate structure.
      • +
    • +
  • CC26x0R2 +
      +
    • [RF_API] Headers: Removed unnecessary RF_MODE_MULTIPLE define.
      • +
    • [RF_API] Headers: Added bPdifDecim and pdifDecim to symbolRate structure.
      • +
    • +
+ +

Bug fixes

+
    +
  • None
    • +
+ +

Known issues

+
    +
  • CC26x0
    • +
  • CC26x0R2 +
      +
    • [RF_API] General: GPO control not functional.
      • +
    • [RF_PATCH] General: CMD_SCH_IMM could cause loss of commands.
      • +
    • +
    +
  • For an updated list of known issues (including issues found after the release), see CC13xx_CC26xx_driverlib on the Texas Instruments wiki.
    • +
+
+

driverlib_cc13xx_cc26xx_3_01_01_17779

diff --git a/third_party/ti/ti-openthread_0.9.0_manifest.html b/third_party/ti/ti-openthread_1.01.0_manifest.html similarity index 61% rename from third_party/ti/ti-openthread_0.9.0_manifest.html rename to third_party/ti/ti-openthread_1.01.0_manifest.html index 966ade914..29c8329e1 100644 --- a/third_party/ti/ti-openthread_0.9.0_manifest.html +++ b/third_party/ti/ti-openthread_1.01.0_manifest.html @@ -31,14 +31,14 @@ ti-openthread Manifest

-05-11-2017 +06-05-2018

-Manifest ID - SRAS00003906 +Manifest ID - SRAS00005101

@@ -194,7 +194,7 @@ Publicly Available - cc2538 platform layer + CI build scripts 0.01.00 @@ -206,156 +206,11 @@ Publicly Available Source - No + Yes Location - [as installed]/examples/platforms/cc2538 - - - - Obtained from - - github.com/openthread/openthread - - - - - - - OpenThread test driver - - - 2016-01-11.22 - - - GPL-2.0 - - - Source - - - No - - Location - - [as installed]/third_party/openthread-test-driver - - - - Obtained from - - github.com/openthread/openthread - - - - - - - Nordic Semiconductor third party - - - 12.2.0 - - - BSD-3-Clause - - - Source and Binary - - - No - - Location - - [as installed]/third_party/NordicSemiconductor - - - - Obtained from - - github.com/openthread/openthread - - - - - - - Nest autotools - - - Unknown - - - Apache-2.0 - - - Source and Binary - - - No - - Location - - [as installed]/third_party/nlbuild-autotools - - - - Obtained from - - github.com/openthread/openthread - - - - - - - Mbed TLS - - - 2.3.1 - - - Apache-2.0 - - - Source - - - No - - Location - - [as installed]/third_party/mbedtls - - - - Obtained from - - github.com/openthread/openthread - - - - - - - Dialog third party - - - Unknown - - - BSD-3-Clause - - - Source and Binary - - - No - - Location - - [as installed]/third_party/dialog + [as_installed]/.appveyor[as_installed]/.appveyor.yml[as_installed]/.codecov.yml[as_installed]/.travis @@ -384,7 +239,7 @@ Publicly Available Location - [as installed]/tools + [as_installed]/tools @@ -397,10 +252,10 @@ Publicly Available - OpenThread documentation + synopsys third party - 0.01.00 + Unknown BSD-3-Clause @@ -413,7 +268,210 @@ Publicly Available Location - [as installed]/doc + [as_installed]/third_party/synopsys + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Qorvo third party + + + 0.8.0.0 + + + Qorvo Proprietary + + + Binary + + + No + + Location + + [as_installed]/third_party/Qorvo + + + + Obtained from + + github.com/openthread/openthread + + + + + + + OpenThread test driver + + + 2016-01-11.22 + + + GPL-2.0 + + + Source + + + No + + Location + + [as_installed]/third_party/openthread-test-driver + + + + Obtained from + + github.com/openthread/openthread + + + + + + + NXP third party + + + 2.0 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/third_party/nxp + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Nordic Semiconductor third party + + + 12.2.0 + + + BSD-3-Clause + + + Source and Binary + + + No + + Location + + [as_installed]/third_party/NordicSemiconductor + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Nest autotools + + + Unknown + + + Apache-2.0 + + + Source and Binary + + + No + + Location + + [as_installed]/third_party/nlbuild-autotools + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Mbed TLS + + + 2.3.1 + + + Apache-2.0 + + + Source + + + No + + Location + + [as_installed]/third_party/mbedtls + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Dialog third party + + + Unknown + + + BSD-3-Clause + + + Source and Binary + + + No + + Location + + [as_installed]/third_party/dialog @@ -442,152 +500,7 @@ Publicly Available Location - [as installed]/test - - - - Obtained from - - github.com/openthread/openthread - - - - - - - Windows Build - - - 0.01.00 - - - BSD-3-Clause - - - Source and Binary - - - No - - Location - - [as installed]/etc/visual-studio - - - - Obtained from - - github.com/openthread/openthread - - - - - - - Windows Automatic builds - - - 0.01.00 - - - BSD-3-Clause - - - Source - - - No - - Location - - [as installed]/.appveyor.yml[as installed]/.appveyor - - - - Obtained from - - github.com/openthread/openthread - - - - - - - OpenThread automatic builds - - - 0.01.00 - - - BSD-3-Clause - - - Source - - - Yes - - Location - - [as installed]/.travis.yml[as installed]/.travis/ [as installed]/.codecov.yml - - - - Obtained from - - github.com/openthread/openthread - - - - - - - OpenThread configuration - - - 0.01.00 - - - BSD-3-Clause - - - Source - - - Yes - - Location - - [as installed/configure.ac - - - - Obtained from - - github.com/openthread/openthread - - - - - - - OpenThread includes - - - 0.01.00 - - - BSD-3-Clause - - - Source - - - No - - Location - - [as installed]/include + [as_installed]/tests @@ -616,7 +529,65 @@ Publicly Available Location - [as installed]/src/ + [as_installed]/src/ + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Environment and Build Scripts + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/script/[as_installed]/bootstrap[as_installed]/configure.ac[as_installed]/Makefile.am + + + + Obtained from + + github.com/openthread/openthread + + + + + + + OpenThread includes + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/include @@ -645,7 +616,7 @@ Publicly Available Location - [as installed]/examples/drivers + [as_installed]/examples/drivers @@ -674,7 +645,65 @@ Publicly Available Location - [as installed]/examples/apps + [as_installed]/examples/apps + + + + Obtained from + + github.com/openthread/openthread + + + + + + + samr21 Makefile + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/Makefile-samr21 + + + + Obtained from + + github.com/openthread/openthread + + + + + + + samr21 platform layer + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/platforms/samr21 @@ -703,7 +732,7 @@ Publicly Available Location - [as installed]/examples/Makefile-posix + [as_installed]/examples/Makefile-posix @@ -732,7 +761,7 @@ Publicly Available Location - [as installed]/examples/platforms/posix + [as_installed]/examples/platforms/posix @@ -761,7 +790,7 @@ Publicly Available Location - [as installed]/examples/Makefile- nrf52840 + [as_installed]/examples/Makefile- nrf52840 @@ -790,7 +819,181 @@ Publicly Available Location - [as installed]/examples/platforms/ nrf52840 + [as_installed]/examples/platforms/ nrf52840 + + + + Obtained from + + github.com/openthread/openthread + + + + + + + kw41z Makefile + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/Makefile-kw41z + + + + Obtained from + + github.com/openthread/openthread + + + + + + + kw41z platform layer + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/platforms/kw41z + + + + Obtained from + + github.com/openthread/openthread + + + + + + + gp712 Makefile + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/Makefile-gp712 + + + + Obtained from + + github.com/openthread/openthread + + + + + + + gp712 platform layer + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/platforms/gp712 + + + + Obtained from + + github.com/openthread/openthread + + + + + + + emsk Makefile + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/Makefile-emsk + + + + Obtained from + + github.com/openthread/openthread + + + + + + + emsk platform layer + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/platforms/emsk @@ -819,7 +1022,7 @@ Publicly Available Location - [as installed]/examples/Makefile-erf32 + [as_installed]/examples/Makefile-erf32 @@ -848,7 +1051,7 @@ Publicly Available Location - [as installed]/examples/platforms/erf32 + [as_installed]/examples/platforms/erf32 @@ -877,7 +1080,7 @@ Publicly Available Location - [as installed]/examples/Makefile- da15000 + [as_installed]/examples/Makefile- da15000 @@ -906,7 +1109,7 @@ Publicly Available Location - [as installed]/examples/platforms/da15000 + [as_installed]/examples/platforms/da15000 @@ -935,7 +1138,181 @@ Publicly Available Location - [as installed]/examples/Makefile-cc2538 + [as_installed]/examples/Makefile-cc2538 + + + + Obtained from + + github.com/openthread/openthread + + + + + + + cc2538 platform layer + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/examples/platforms/cc2538 + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Windows Build + + + 0.01.00 + + + BSD-3-Clause + + + Source and Binary + + + No + + Location + + [as_installed]/etc/visual-studio + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Vagrant Environment + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/etc/vagrant + + + + Obtained from + + github.com/openthread/openthread + + + + + + + OpenThread documentation + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/doc[as_installed]/.default-version[as_installed]/AUTHORS[as_installed]/CODE_OF_CONDUCT.md[as_installed]/CONTRIBUTING.md[as_installed]/LICENSE[as_installed]/NOTICE[as_installed]/README.md[as_installed]/STYLE_GUIDE.md + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Travis CI build scripts + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/.travis + + + + Obtained from + + github.com/openthread/openthread + + + + + + + Github templates + + + 0.01.00 + + + BSD-3-Clause + + + Source + + + No + + Location + + [as_installed]/.github @@ -976,6 +1353,64 @@ Publicly Available + + + + cc1352 platform layer + + + 0.01.0 + + + BSD-3-Clause + + + Source + + + N/A + + Location + + [as_installed]/examples/platforms/cc1352 + + + + Obtained from + + Texas Instruments Incorporated + + + + + + + cc1352 platform Makefile + + + 0.01.0 + + + BSD-3-Clause + + + Source + + + N/A + + Location + + [as_installed]/examples/Makefile-cc1352 + + + + Obtained from + + Texas Instruments Incorporated + + + @@ -995,7 +1430,7 @@ Publicly Available Location - [as installed]/examples/platforms/cc2650 + [as_installed]/examples/platforms/cc2650 @@ -1024,7 +1459,7 @@ Publicly Available Location - [as installed]/examples/Makefile-cc2650 + [as_installed]/examples/Makefile-cc2650 @@ -1053,7 +1488,7 @@ Publicly Available Location - [as installed]/examples/platforms/cc2652 + [as_installed]/examples/platforms/cc2652 @@ -1082,36 +1517,7 @@ Publicly Available Location - [as installed]/examples/Makefile-cc2650 - - - - Obtained from - - Texas Instruments Incorporated - - - - - - - platform projectspecs - - - 0.01.0 - - - BSD-3-Clause - - - Source - - - N/A - - Location - - [as installed]/etc/ti + [as_installed]/examples/Makefile-cc2652 @@ -1400,7 +1806,7 @@ Publicly Available









Licenses

-

ti-openthread Licenses




OpenThread Authors BSD-3-Clause
------------

Copyright (c) 2016, The OpenThread Authors.
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.


Dialog Source code BSD-3-Clause License
------------

/**
****************************************************************************************
* Copyright (c) 2016, Dialog Semiconductor
* All rights reserved.
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the names of its contributors
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
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*/


Mbed TLS Apache-2.0 License
------------

Apache License
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http://www.apache.org/licenses/

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of your accepting any such warranty or additional liability.

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APPENDIX: How to apply the Apache License to your work.

To apply the Apache License to your work, attach the following
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Nest Autotools Apache-2.0 License
----------

Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/

TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION

1. Definitions.

"License" shall mean the terms and conditions for use, reproduction,
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Nordic Semiconductor Source BSD-3-Clause License
------------

/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
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* modification, are permitted provided that the following conditions are met:
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
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Openthread test driver GPL-2.0 License
------------
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991

Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
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For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.

We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.

Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.

Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.

The precise terms and conditions for copying, distribution and
modification follow.

GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION

0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".

Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.

1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.

You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.

2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:

a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.

b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.

c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)

These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.

Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.

In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.

3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:

a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,

b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,

c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)

The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.

If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.

4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.

5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.

6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.

7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.

If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.

It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.

This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.

8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.

9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.

Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.

10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.

NO WARRANTY

11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.

12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.

END OF TERMS AND CONDITIONS

How to Apply These Terms to Your New Programs

If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.

To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.

<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.

Also add information on how to contact you by electronic and paper mail.

If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:

Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.

The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.

You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:

Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.

<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice

This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.



Driverlib_CC13xx_CC26xx License




BSD-3-Clause license:
Copyright (c) 2016, Texas Instruments Incorporated
All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

1) Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

2) Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

3) Neither the name of the ORGANIZATION nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


MIT license for jquery:

Copyright 2011, John Resig
Copyright 2011, The Dojo Foundation
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
MIT license for poly1305-donna:
Copyright (c) 2016 Andrew Moon (floodberry @ github)
Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.



+

ti-openthread Licenses




BSD-3-Clause
------------

Copyright (c) 2016, The OpenThread Authors.
All rights reserved.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.


Apache-2.0 License
------------

Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/

TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION

1. Definitions.

"License" shall mean the terms and conditions for use, reproduction,
and distribution as defined by Sections 1 through 9 of this document.

"Licensor" shall mean the copyright owner or entity authorized by
the copyright owner that is granting the License.

"Legal Entity" shall mean the union of the acting entity and all
other entities that control, are controlled by, or are under common
control with that entity. For the purposes of this definition,
"control" means (i) the power, direct or indirect, to cause the
direction or management of such entity, whether by contract or
otherwise, or (ii) ownership of fifty percent (50%) or more of the
outstanding shares, or (iii) beneficial ownership of such entity.

"You" (or "Your") shall mean an individual or Legal Entity
exercising permissions granted by this License.

"Source" form shall mean the preferred form for making modifications,
including but not limited to software source code, documentation
source, and configuration files.

"Object" form shall mean any form resulting from mechanical
transformation or translation of a Source form, including but
not limited to compiled object code, generated documentation,
and conversions to other media types.

"Work" shall mean the work of authorship, whether in Source or
Object form, made available under the License, as indicated by a
copyright notice that is included in or attached to the work
(an example is provided in the Appendix below).

"Derivative Works" shall mean any work, whether in Source or Object
form, that is based on (or derived from) the Work and for which the
editorial revisions, annotations, elaborations, or other modifications
represent, as a whole, an original work of authorship. For the purposes
of this License, Derivative Works shall not include works that remain
separable from, or merely link (or bind by name) to the interfaces of,
the Work and Derivative Works thereof.

"Contribution" shall mean any work of authorship, including
the original version of the Work and any modifications or additions
to that Work or Derivative Works thereof, that is intentionally
submitted to Licensor for inclusion in the Work by the copyright owner
or by an individual or Legal Entity authorized to submit on behalf of
the copyright owner. For the purposes of this definition, "submitted"
means any form of electronic, verbal, or written communication sent
to the Licensor or its representatives, including but not limited to
communication on electronic mailing lists, source code control systems,
and issue tracking systems that are managed by, or on behalf of, the
Licensor for the purpose of discussing and improving the Work, but
excluding communication that is conspicuously marked or otherwise
designated in writing by the copyright owner as "Not a Contribution."

"Contributor" shall mean Licensor and any individual or Legal Entity
on behalf of whom a Contribution has been received by Licensor and
subsequently incorporated within the Work.

2. Grant of Copyright License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
copyright license to reproduce, prepare Derivative Works of,
publicly display, publicly perform, sublicense, and distribute the
Work and such Derivative Works in Source or Object form.

3. Grant of Patent License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
(except as stated in this section) patent license to make, have made,
use, offer to sell, sell, import, and otherwise transfer the Work,
where such license applies only to those patent claims licensable
by such Contributor that are necessarily infringed by their
Contribution(s) alone or by combination of their Contribution(s)
with the Work to which such Contribution(s) was submitted. If You
institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the Work
or a Contribution incorporated within the Work constitutes direct
or contributory patent infringement, then any patent licenses
granted to You under this License for that Work shall terminate
as of the date such litigation is filed.

4. Redistribution. You may reproduce and distribute copies of the
Work or Derivative Works thereof in any medium, with or without
modifications, and in Source or Object form, provided that You
meet the following conditions:

(a) You must give any other recipients of the Work or
Derivative Works a copy of this License; and

(b) You must cause any modified files to carry prominent notices
stating that You changed the files; and

(c) You must retain, in the Source form of any Derivative Works
that You distribute, all copyright, patent, trademark, and
attribution notices from the Source form of the Work,
excluding those notices that do not pertain to any part of
the Derivative Works; and

(d) If the Work includes a "NOTICE" text file as part of its
distribution, then any Derivative Works that You distribute must
include a readable copy of the attribution notices contained
within such NOTICE file, excluding those notices that do not
pertain to any part of the Derivative Works, in at least one
of the following places: within a NOTICE text file distributed
as part of the Derivative Works; within the Source form or
documentation, if provided along with the Derivative Works; or,
within a display generated by the Derivative Works, if and
wherever such third-party notices normally appear. The contents
of the NOTICE file are for informational purposes only and
do not modify the License. You may add Your own attribution
notices within Derivative Works that You distribute, alongside
or as an addendum to the NOTICE text from the Work, provided
that such additional attribution notices cannot be construed
as modifying the License.

You may add Your own copyright statement to Your modifications and
may provide additional or different license terms and conditions
for use, reproduction, or distribution of Your modifications, or
for any such Derivative Works as a whole, provided Your use,
reproduction, and distribution of the Work otherwise complies with
the conditions stated in this License.

5. Submission of Contributions. Unless You explicitly state otherwise,
any Contribution intentionally submitted for inclusion in the Work
by You to the Licensor shall be under the terms and conditions of
this License, without any additional terms or conditions.
Notwithstanding the above, nothing herein shall supersede or modify
the terms of any separate license agreement you may have executed
with Licensor regarding such Contributions.

6. Trademarks. This License does not grant permission to use the trade
names, trademarks, service marks, or product names of the Licensor,
except as required for reasonable and customary use in describing the
origin of the Work and reproducing the content of the NOTICE file.

7. Disclaimer of Warranty. Unless required by applicable law or
agreed to in writing, Licensor provides the Work (and each
Contributor provides its Contributions) on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied, including, without limitation, any warranties or conditions
of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
PARTICULAR PURPOSE. You are solely responsible for determining the
appropriateness of using or redistributing the Work and assume any
risks associated with Your exercise of permissions under this License.

8. Limitation of Liability. In no event and under no legal theory,
whether in tort (including negligence), contract, or otherwise,
unless required by applicable law (such as deliberate and grossly
negligent acts) or agreed to in writing, shall any Contributor be
liable to You for damages, including any direct, indirect, special,
incidental, or consequential damages of any character arising as a
result of this License or out of the use or inability to use the
Work (including but not limited to damages for loss of goodwill,
work stoppage, computer failure or malfunction, or any and all
other commercial damages or losses), even if such Contributor
has been advised of the possibility of such damages.

9. Accepting Warranty or Additional Liability. While redistributing
the Work or Derivative Works thereof, You may choose to offer,
and charge a fee for, acceptance of support, warranty, indemnity,
or other liability obligations and/or rights consistent with this
License. However, in accepting such obligations, You may act only
on Your own behalf and on Your sole responsibility, not on behalf
of any other Contributor, and only if You agree to indemnify,
defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason
of your accepting any such warranty or additional liability.

END OF TERMS AND CONDITIONS

APPENDIX: How to apply the Apache License to your work.

To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "[]"
replaced with your own identifying information. (Don't include
the brackets!) The text should be enclosed in the appropriate
comment syntax for the file format. We also recommend that a
file or class name and description of purpose be included on the
same "printed page" as the copyright notice for easier
identification within third-party archives.

Copyright [yyyy] [name of copyright owner]

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.


GPL-2.0 License
------------
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991

Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.

Preamble

The licenses for most software are designed to take away your
freedom to share and change it. By contrast, the GNU General Public
License is intended to guarantee your freedom to share and change free
software--to make sure the software is free for all its users. This
General Public License applies to most of the Free Software
Foundation's software and to any other program whose authors commit to
using it. (Some other Free Software Foundation software is covered by
the GNU Lesser General Public License instead.) You can apply it to
your programs, too.

When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
this service if you wish), that you receive source code or can get it
if you want it, that you can change the software or use pieces of it
in new free programs; and that you know you can do these things.

To protect your rights, we need to make restrictions that forbid
anyone to deny you these rights or to ask you to surrender the rights.
These restrictions translate to certain responsibilities for you if you
distribute copies of the software, or if you modify it.

For example, if you distribute copies of such a program, whether
gratis or for a fee, you must give the recipients all the rights that
you have. You must make sure that they, too, receive or can get the
source code. And you must show them these terms so they know their
rights.

We protect your rights with two steps: (1) copyright the software, and
(2) offer you this license which gives you legal permission to copy,
distribute and/or modify the software.

Also, for each author's protection and ours, we want to make certain
that everyone understands that there is no warranty for this free
software. If the software is modified by someone else and passed on, we
want its recipients to know that what they have is not the original, so
that any problems introduced by others will not reflect on the original
authors' reputations.

Finally, any free program is threatened constantly by software
patents. We wish to avoid the danger that redistributors of a free
program will individually obtain patent licenses, in effect making the
program proprietary. To prevent this, we have made it clear that any
patent must be licensed for everyone's free use or not licensed at all.

The precise terms and conditions for copying, distribution and
modification follow.

GNU GENERAL PUBLIC LICENSE
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION

0. This License applies to any program or other work which contains
a notice placed by the copyright holder saying it may be distributed
under the terms of this General Public License. The "Program", below,
refers to any such program or work, and a "work based on the Program"
means either the Program or any derivative work under copyright law:
that is to say, a work containing the Program or a portion of it,
either verbatim or with modifications and/or translated into another
language. (Hereinafter, translation is included without limitation in
the term "modification".) Each licensee is addressed as "you".

Activities other than copying, distribution and modification are not
covered by this License; they are outside its scope. The act of
running the Program is not restricted, and the output from the Program
is covered only if its contents constitute a work based on the
Program (independent of having been made by running the Program).
Whether that is true depends on what the Program does.

1. You may copy and distribute verbatim copies of the Program's
source code as you receive it, in any medium, provided that you
conspicuously and appropriately publish on each copy an appropriate
copyright notice and disclaimer of warranty; keep intact all the
notices that refer to this License and to the absence of any warranty;
and give any other recipients of the Program a copy of this License
along with the Program.

You may charge a fee for the physical act of transferring a copy, and
you may at your option offer warranty protection in exchange for a fee.

2. You may modify your copy or copies of the Program or any portion
of it, thus forming a work based on the Program, and copy and
distribute such modifications or work under the terms of Section 1
above, provided that you also meet all of these conditions:

a) You must cause the modified files to carry prominent notices
stating that you changed the files and the date of any change.

b) You must cause any work that you distribute or publish, that in
whole or in part contains or is derived from the Program or any
part thereof, to be licensed as a whole at no charge to all third
parties under the terms of this License.

c) If the modified program normally reads commands interactively
when run, you must cause it, when started running for such
interactive use in the most ordinary way, to print or display an
announcement including an appropriate copyright notice and a
notice that there is no warranty (or else, saying that you provide
a warranty) and that users may redistribute the program under
these conditions, and telling the user how to view a copy of this
License. (Exception: if the Program itself is interactive but
does not normally print such an announcement, your work based on
the Program is not required to print an announcement.)

These requirements apply to the modified work as a whole. If
identifiable sections of that work are not derived from the Program,
and can be reasonably considered independent and separate works in
themselves, then this License, and its terms, do not apply to those
sections when you distribute them as separate works. But when you
distribute the same sections as part of a whole which is a work based
on the Program, the distribution of the whole must be on the terms of
this License, whose permissions for other licensees extend to the
entire whole, and thus to each and every part regardless of who wrote it.

Thus, it is not the intent of this section to claim rights or contest
your rights to work written entirely by you; rather, the intent is to
exercise the right to control the distribution of derivative or
collective works based on the Program.

In addition, mere aggregation of another work not based on the Program
with the Program (or with a work based on the Program) on a volume of
a storage or distribution medium does not bring the other work under
the scope of this License.

3. You may copy and distribute the Program (or a work based on it,
under Section 2) in object code or executable form under the terms of
Sections 1 and 2 above provided that you also do one of the following:

a) Accompany it with the complete corresponding machine-readable
source code, which must be distributed under the terms of Sections
1 and 2 above on a medium customarily used for software interchange; or,

b) Accompany it with a written offer, valid for at least three
years, to give any third party, for a charge no more than your
cost of physically performing source distribution, a complete
machine-readable copy of the corresponding source code, to be
distributed under the terms of Sections 1 and 2 above on a medium
customarily used for software interchange; or,

c) Accompany it with the information you received as to the offer
to distribute corresponding source code. (This alternative is
allowed only for noncommercial distribution and only if you
received the program in object code or executable form with such
an offer, in accord with Subsection b above.)

The source code for a work means the preferred form of the work for
making modifications to it. For an executable work, complete source
code means all the source code for all modules it contains, plus any
associated interface definition files, plus the scripts used to
control compilation and installation of the executable. However, as a
special exception, the source code distributed need not include
anything that is normally distributed (in either source or binary
form) with the major components (compiler, kernel, and so on) of the
operating system on which the executable runs, unless that component
itself accompanies the executable.

If distribution of executable or object code is made by offering
access to copy from a designated place, then offering equivalent
access to copy the source code from the same place counts as
distribution of the source code, even though third parties are not
compelled to copy the source along with the object code.

4. You may not copy, modify, sublicense, or distribute the Program
except as expressly provided under this License. Any attempt
otherwise to copy, modify, sublicense or distribute the Program is
void, and will automatically terminate your rights under this License.
However, parties who have received copies, or rights, from you under
this License will not have their licenses terminated so long as such
parties remain in full compliance.

5. You are not required to accept this License, since you have not
signed it. However, nothing else grants you permission to modify or
distribute the Program or its derivative works. These actions are
prohibited by law if you do not accept this License. Therefore, by
modifying or distributing the Program (or any work based on the
Program), you indicate your acceptance of this License to do so, and
all its terms and conditions for copying, distributing or modifying
the Program or works based on it.

6. Each time you redistribute the Program (or any work based on the
Program), the recipient automatically receives a license from the
original licensor to copy, distribute or modify the Program subject to
these terms and conditions. You may not impose any further
restrictions on the recipients' exercise of the rights granted herein.
You are not responsible for enforcing compliance by third parties to
this License.

7. If, as a consequence of a court judgment or allegation of patent
infringement or for any other reason (not limited to patent issues),
conditions are imposed on you (whether by court order, agreement or
otherwise) that contradict the conditions of this License, they do not
excuse you from the conditions of this License. If you cannot
distribute so as to satisfy simultaneously your obligations under this
License and any other pertinent obligations, then as a consequence you
may not distribute the Program at all. For example, if a patent
license would not permit royalty-free redistribution of the Program by
all those who receive copies directly or indirectly through you, then
the only way you could satisfy both it and this License would be to
refrain entirely from distribution of the Program.

If any portion of this section is held invalid or unenforceable under
any particular circumstance, the balance of the section is intended to
apply and the section as a whole is intended to apply in other
circumstances.

It is not the purpose of this section to induce you to infringe any
patents or other property right claims or to contest validity of any
such claims; this section has the sole purpose of protecting the
integrity of the free software distribution system, which is
implemented by public license practices. Many people have made
generous contributions to the wide range of software distributed
through that system in reliance on consistent application of that
system; it is up to the author/donor to decide if he or she is willing
to distribute software through any other system and a licensee cannot
impose that choice.

This section is intended to make thoroughly clear what is believed to
be a consequence of the rest of this License.

8. If the distribution and/or use of the Program is restricted in
certain countries either by patents or by copyrighted interfaces, the
original copyright holder who places the Program under this License
may add an explicit geographical distribution limitation excluding
those countries, so that distribution is permitted only in or among
countries not thus excluded. In such case, this License incorporates
the limitation as if written in the body of this License.

9. The Free Software Foundation may publish revised and/or new versions
of the General Public License from time to time. Such new versions will
be similar in spirit to the present version, but may differ in detail to
address new problems or concerns.

Each version is given a distinguishing version number. If the Program
specifies a version number of this License which applies to it and "any
later version", you have the option of following the terms and conditions
either of that version or of any later version published by the Free
Software Foundation. If the Program does not specify a version number of
this License, you may choose any version ever published by the Free Software
Foundation.

10. If you wish to incorporate parts of the Program into other free
programs whose distribution conditions are different, write to the author
to ask for permission. For software which is copyrighted by the Free
Software Foundation, write to the Free Software Foundation; we sometimes
make exceptions for this. Our decision will be guided by the two goals
of preserving the free status of all derivatives of our free software and
of promoting the sharing and reuse of software generally.

NO WARRANTY

11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
REPAIR OR CORRECTION.

12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.

END OF TERMS AND CONDITIONS

How to Apply These Terms to Your New Programs

If you develop a new program, and you want it to be of the greatest
possible use to the public, the best way to achieve this is to make it
free software which everyone can redistribute and change under these terms.

To do so, attach the following notices to the program. It is safest
to attach them to the start of each source file to most effectively
convey the exclusion of warranty; and each file should have at least
the "copyright" line and a pointer to where the full notice is found.

<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.

Also add information on how to contact you by electronic and paper mail.

If the program is interactive, make it output a short notice like this
when it starts in an interactive mode:

Gnomovision version 69, Copyright (C) year name of author
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.

The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, the commands you use may
be called something other than `show w' and `show c'; they could even be
mouse-clicks or menu items--whatever suits your program.

You should also get your employer (if you work as a programmer) or your
school, if any, to sign a "copyright disclaimer" for the program, if
necessary. Here is a sample; alter the names:

Yoyodyne, Inc., hereby disclaims all copyright interest in the program
`Gnomovision' (which makes passes at compilers) written by James Hacker.

<signature of Ty Coon>, 1 April 1989
Ty Coon, President of Vice

This General Public License does not permit incorporating your program into
proprietary programs. If your program is a subroutine library, you may
consider it more useful to permit linking proprietary applications with the
library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License.


Qorvo Proprietary
------------

Copyright (c) 2012-2016, GreenPeak Technologies
Copyright (c) 2017, Qorvo Inc

This software is owned by Qorvo Inc
and protected under applicable copyright laws.
It is delivered under the terms of the license
and is intended and supplied for use solely and
exclusively with products manufactured by
Qorvo Inc.

THIS SOFTWARE IS PROVIDED IN AN "AS IS"
CONDITION. NO WARRANTIES, WHETHER EXPRESS,
IMPLIED OR STATUTORY, INCLUDING, BUT NOT
LIMITED TO, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
QORVO INC. SHALL NOT, IN ANY
CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
INCIDENTAL OR CONSEQUENTIAL DAMAGES,
FOR ANY REASON WHATSOEVER.


Driverlib_CC13xx_CC26xx License




BSD-3-Clause license:
Copyright (c) 2016, Texas Instruments Incorporated
All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

1) Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

2) Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

3) Neither the name of the ORGANIZATION nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


MIT license for jquery:

Copyright 2011, John Resig
Copyright 2011, The Dojo Foundation
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
MIT license for poly1305-donna:
Copyright (c) 2016 Andrew Moon (floodberry @ github)
Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.