diff --git a/examples/platforms/cc1352/radio.c b/examples/platforms/cc1352/radio.c
index ccd645a88..32ebe051a 100644
--- a/examples/platforms/cc1352/radio.c
+++ b/examples/platforms/cc1352/radio.c
@@ -57,10 +57,14 @@
 #include <inc/hw_fcfg1.h>
 #include <inc/hw_memmap.h>
 #include <inc/hw_prcm.h>
+#include <rf_patches/rf_patch_cpe_ieee_802_15_4.h>
+#include <rf_patches/rf_patch_mce_ieee_802_15_4.h>
+#include <rf_patches/rf_patch_rfe_ieee_802_15_4.h>
 
 enum
 {
     CC1352_RECEIVE_SENSITIVITY = -100, // dBm
+    CC1352_RF_CMD0             = 0x0607,
 };
 
 /* phy state as defined by openthread */
@@ -867,8 +871,10 @@ static uint_fast8_t rfCorePowerOn(void)
     }
 
     /* Let CPE boot */
-    HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) =
-        (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M | RFC_PWR_PWMCLKEN_CPERAM_M);
+    RFCClockEnable();
+
+    /* Enable ram clocks for patches */
+    RFCDoorbellSendTo(CMDR_DIR_CMD_2BYTE(CC1352_RF_CMD0, RFC_PWR_PWMCLKEN_MDMRAM | RFC_PWR_PWMCLKEN_RFERAM));
 
     /* Send ping (to verify RFCore is ready and alive) */
     return rfCoreExecutePingCmd();
@@ -907,6 +913,19 @@ static void rfCorePowerOff(void)
     }
 }
 
+/**
+ * Applies CPE, RFE, and MCE patches to the radio.
+ */
+static void rfCoreApplyPatch(void)
+{
+    rf_patch_cpe_ieee_802_15_4();
+    rf_patch_mce_ieee_802_15_4();
+    rf_patch_rfe_ieee_802_15_4();
+
+    /* disable ram bus clocks */
+    RFCDoorbellSendTo(CMDR_DIR_CMD_2BYTE(CC1352_RF_CMD0, 0));
+}
+
 /**
  * Sends the setup command string to the radio core.
  *
@@ -963,6 +982,8 @@ static uint_fast16_t rfCoreSendEnableCmd(void)
 
     interruptsWereDisabled = IntMasterDisable();
 
+    rfCoreApplyPatch();
+
     doorbellRet = (RFCDoorbellSendTo((uint32_t)&sStartRatCmd) & 0xFF);
     otEXPECT_ACTION(CMDSTA_Done == doorbellRet, ret = doorbellRet);
 
diff --git a/examples/platforms/cc2652/radio.c b/examples/platforms/cc2652/radio.c
index b1fd5c08b..268074fee 100644
--- a/examples/platforms/cc2652/radio.c
+++ b/examples/platforms/cc2652/radio.c
@@ -55,10 +55,15 @@
 #include <inc/hw_fcfg1.h>
 #include <inc/hw_memmap.h>
 #include <inc/hw_prcm.h>
+#include <inc/hw_rfc_pwr.h>
+#include <rf_patches/rf_patch_cpe_ieee_802_15_4.h>
+#include <rf_patches/rf_patch_mce_ieee_802_15_4.h>
+#include <rf_patches/rf_patch_rfe_ieee_802_15_4.h>
 
 enum
 {
     CC2652_RECEIVE_SENSITIVITY = -100, // dBm
+    CC2652_RF_CMD0             = 0x0607,
 };
 
 /* phy state as defined by openthread */
@@ -865,8 +870,10 @@ static uint_fast8_t rfCorePowerOn(void)
     }
 
     /* Let CPE boot */
-    HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) =
-        (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M | RFC_PWR_PWMCLKEN_CPERAM_M);
+    RFCClockEnable();
+
+    /* Enable ram clocks for patches */
+    RFCDoorbellSendTo(CMDR_DIR_CMD_2BYTE(CC2652_RF_CMD0, RFC_PWR_PWMCLKEN_MDMRAM | RFC_PWR_PWMCLKEN_RFERAM));
 
     /* Send ping (to verify RFCore is ready and alive) */
     return rfCoreExecutePingCmd();
@@ -905,6 +912,19 @@ static void rfCorePowerOff(void)
     }
 }
 
+/**
+ * Applies CPE, RFE, and MCE patches to the radio.
+ */
+static void rfCoreApplyPatch(void)
+{
+    rf_patch_cpe_ieee_802_15_4();
+    rf_patch_mce_ieee_802_15_4();
+    rf_patch_rfe_ieee_802_15_4();
+
+    /* disable ram bus clocks */
+    RFCDoorbellSendTo(CMDR_DIR_CMD_2BYTE(CC2652_RF_CMD0, 0));
+}
+
 /**
  * Sends the setup command string to the radio core.
  *
@@ -961,6 +981,8 @@ static uint_fast16_t rfCoreSendEnableCmd(void)
 
     interruptsWereDisabled = IntMasterDisable();
 
+    rfCoreApplyPatch();
+
     doorbellRet = (RFCDoorbellSendTo((uint32_t)&sStartRatCmd) & 0xFF);
     otEXPECT_ACTION(CMDSTA_Done == doorbellRet, ret = doorbellRet);