From ef940b06594b370176b724733dbd7ad09617a693 Mon Sep 17 00:00:00 2001 From: Tomas Cerskus Date: Tue, 12 Jun 2018 19:41:40 +0100 Subject: [PATCH] [efr32] add BRD4304A (MGM12P) support and board-specific hal-config.h (#2763) * add BRD4304A (MGM12P Module) board support * make hal-config.h board-specific Copied existing hal-config.h for BRD4161A and BRD4166A. For BRD4304A used hal-config from Silabs Thread 2.6.2.0 ncp-uart-hw project without WDOG, VUART, VCOM, UARTNCP and BSP_SERIAL_APP_PORT settings. * enable FEM for the platforms that require it --- examples/Makefile-efr32 | 9 +- examples/platforms/efr32/Makefile.am | 2 + .../efr32/{ => brd4161a}/hal-config.h | 0 .../platforms/efr32/brd4166a/hal-config.h | 387 ++++++++++++++++++ .../platforms/efr32/brd4304a/hal-config.h | 352 ++++++++++++++++ examples/platforms/efr32/platform.c | 11 + 6 files changed, 760 insertions(+), 1 deletion(-) rename examples/platforms/efr32/{ => brd4161a}/hal-config.h (100%) create mode 100644 examples/platforms/efr32/brd4166a/hal-config.h create mode 100644 examples/platforms/efr32/brd4304a/hal-config.h diff --git a/examples/Makefile-efr32 b/examples/Makefile-efr32 index edd4cdfac..9a6d7a76b 100644 --- a/examples/Makefile-efr32 +++ b/examples/Makefile-efr32 @@ -57,16 +57,21 @@ AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST) # # Differentiate between boards +# - BRD4304A / SLWSTK6000B / MGM12P Module # - BRD4161A / SLWSTK6000B / Wireless Starter Kit # - BRD4166A / SLTB004A / Thunderboard Sense 2 # +ifeq ($(BOARD),BRD4304A) +MCU = EFR32MG12P432F1024GM48 +else ifeq ($(BOARD),BRD4161A) MCU = EFR32MG12P432F1024GL125 else ifeq ($(BOARD),BRD4166A) MCU = EFR32MG12P332F1024GL125 else -$(error Please provide a value for BOARD variable e.g BOARD=BRD4161A (currently supported BRD4161A or BRD4166A) ) +$(error Please provide a value for BOARD variable e.g BOARD=BRD4161A (currently supported BRD4304A, BRD4161A or BRD4166A) ) +endif endif endif @@ -85,6 +90,7 @@ EFR32_MBEDTLS_CPPFLAGS += -I$(AbsTopSourceDir)/third_party/mbedtls/repo/include/ CONFIG_FILE = OPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-efr32-config.h\"' CONFIG_FILE_PATH = $(AbsTopSourceDir)/examples/platforms/efr32/ +HAL_CONF_DIR = $(CONFIG_FILE_PATH)/$(shell echo $(BOARD) | tr A-Z a-z) COMMONCFLAGS := \ -fdata-sections \ @@ -93,6 +99,7 @@ COMMONCFLAGS := \ -g \ -D$(CONFIG_FILE) \ -I$(CONFIG_FILE_PATH) \ + -I$(HAL_CONF_DIR) \ -D$(MCU) \ $(NULL) diff --git a/examples/platforms/efr32/Makefile.am b/examples/platforms/efr32/Makefile.am index 43c566645..64228a21d 100644 --- a/examples/platforms/efr32/Makefile.am +++ b/examples/platforms/efr32/Makefile.am @@ -67,6 +67,7 @@ libopenthread_efr32_a_CPPFLAGS = -I$(EFR32MG_SDK_SRCDIR)/platform/emdrv/rtcdrv/inc \ -I$(EFR32MG_SDK_SRCDIR)/platform/emlib/inc \ -I$(EFR32MG_SDK_SRCDIR)/platform/halconfig/inc/hal-config \ + -I$(EFR32MG_SDK_SRCDIR)/util/plugin/plugin-common/fem-control \ -Wno-unused-parameter \ $(NULL) @@ -111,6 +112,7 @@ nodist_libopenthread_efr32_a_SOURCES @top_builddir@/third_party/silabs/gecko_sdk_suite/v2.2/platform/emlib/src/em_usart.c \ @top_builddir@/third_party/silabs/gecko_sdk_suite/v2.2/platform/radio/rail_lib/hal/efr32/hal_efr.c \ @top_builddir@/third_party/silabs/gecko_sdk_suite/v2.2/platform/radio/rail_lib/hal/hal_common.c \ + @top_builddir@/third_party/silabs/gecko_sdk_suite/v2.2/util/plugin/plugin-common/fem-control/fem-control.c \ $(NULL) noinst_HEADERS = \ diff --git a/examples/platforms/efr32/hal-config.h b/examples/platforms/efr32/brd4161a/hal-config.h similarity index 100% rename from examples/platforms/efr32/hal-config.h rename to examples/platforms/efr32/brd4161a/hal-config.h diff --git a/examples/platforms/efr32/brd4166a/hal-config.h b/examples/platforms/efr32/brd4166a/hal-config.h new file mode 100644 index 000000000..3eb99a2b3 --- /dev/null +++ b/examples/platforms/efr32/brd4166a/hal-config.h @@ -0,0 +1,387 @@ +#ifndef HAL_CONFIG_H +#define HAL_CONFIG_H + +#include "em_device.h" +#include "hal-config-types.h" + +// This file is auto-generated by Hardware Configurator in Simplicity Studio. +// Any content between $[ and ]$ will be replaced whenever the file is regenerated. +// Content outside these regions will be preserved. + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[ADC0] +// [ADC0]$ + +// $[ANTDIV] +// [ANTDIV]$ + +// $[BATTERYMON] +// [BATTERYMON]$ + +// $[BTL_BUTTON] +// [BTL_BUTTON]$ + +// $[BULBPWM] +// [BULBPWM]$ + +// $[BULBPWM_COLOR] +// [BULBPWM_COLOR]$ + +// $[BUTTON] +// [BUTTON]$ + +// $[CMU] +#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO) +#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO) +#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO) +#define BSP_CLK_LFXO_PRESENT (1) +#define BSP_CLK_HFXO_PRESENT (1) +#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT +#define BSP_CLK_LFXO_CTUNE (0) +#define BSP_CLK_LFXO_FREQ (32768) +#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO) +#define BSP_CLK_HFXO_FREQ (38400000) +#define BSP_CLK_HFXO_CTUNE (338) +#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT +#define BSP_CLK_HFXO_CTUNE_TOKEN (0) +#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE) +// [CMU]$ + +// $[COEX] +// [COEX]$ + +// $[CS5463] +// [CS5463]$ + +// $[CSEN0] +// [CSEN0]$ + +// $[DCDC] +#define BSP_DCDC_PRESENT (1) + +#define HAL_DCDC_BYPASS (0) +#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT +// [DCDC]$ + +// $[EMU] +// [EMU]$ + +// $[EXTFLASH] +// [EXTFLASH]$ + +// $[EZRADIOPRO] +// [EZRADIOPRO]$ + +// $[GPIO] +#define PORTIO_GPIO_SWCLKTCK_PIN (0) +#define PORTIO_GPIO_SWCLKTCK_PORT (gpioPortF) +#define PORTIO_GPIO_DBGROUTE_LOC (0) + +#define PORTIO_GPIO_SWDIOTMS_PIN (1) +#define PORTIO_GPIO_SWDIOTMS_PORT (gpioPortF) + +#define PORTIO_GPIO_SWV_PIN (2) +#define PORTIO_GPIO_SWV_PORT (gpioPortF) +#define PORTIO_GPIO_SWV_LOC (0) + +#define PORTIO_GPIO_TCLK_PIN (8) +#define PORTIO_GPIO_TCLK_PORT (gpioPortF) +#define PORTIO_GPIO_TCLK_LOC (0) + +#define PORTIO_GPIO_TD0_PIN (9) +#define PORTIO_GPIO_TD0_PORT (gpioPortF) +#define PORTIO_GPIO_TD0_LOC (0) + +#define PORTIO_GPIO_TD1_PIN (10) +#define PORTIO_GPIO_TD1_PORT (gpioPortF) +#define PORTIO_GPIO_TD1_LOC (0) + +#define PORTIO_GPIO_TD2_PIN (11) +#define PORTIO_GPIO_TD2_PORT (gpioPortF) +#define PORTIO_GPIO_TD2_LOC (0) + +#define PORTIO_GPIO_TD3_PIN (12) +#define PORTIO_GPIO_TD3_PORT (gpioPortF) +#define PORTIO_GPIO_TD3_LOC (0) + +// [GPIO]$ + +// $[I2C0] +#define PORTIO_I2C0_SCL_PIN (10) +#define PORTIO_I2C0_SCL_PORT (gpioPortC) +#define PORTIO_I2C0_SCL_LOC (14) + +#define PORTIO_I2C0_SDA_PIN (11) +#define PORTIO_I2C0_SDA_PORT (gpioPortC) +#define PORTIO_I2C0_SDA_LOC (16) + +// [I2C0]$ + +// $[I2C1] +// [I2C1]$ + +// $[I2CSENSOR] +// [I2CSENSOR]$ + +// $[IDAC0] +// [IDAC0]$ + +// $[IOEXP] +// [IOEXP]$ + +// $[LED] +#define BSP_LED_PRESENT (1) + +#define BSP_LED0_PIN (4) +#define BSP_LED0_PORT (gpioPortF) + +#define BSP_LED1_PIN (5) +#define BSP_LED1_PORT (gpioPortF) + +#define HAL_LED_ENABLE { 0, 1 } +#define HAL_LED_COUNT (2) +#define BSP_LED_COUNT (2) +#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } } +// [LED]$ + +// $[LESENSE] +// [LESENSE]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[LEUART0] +// [LEUART0]$ + +// $[LFXO] +// [LFXO]$ + +// $[LNA] +// [LNA]$ + +// $[PA] +#define HAL_PA_ENABLE (1) + +#define HAL_PA_RAMP (10) +#define HAL_PA_2P4_LOWPOWER (0) +#define HAL_PA_POWER (252) +#define HAL_PA_VOLTAGE (3300) +#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h" +// [PA]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[PCNT1] +// [PCNT1]$ + +// $[PCNT2] +// [PCNT2]$ + +// $[PORTIO] +// [PORTIO]$ + +// $[PRS] +#define PORTIO_PRS_CH4_PIN (13) +#define PORTIO_PRS_CH4_PORT (gpioPortD) +#define PORTIO_PRS_CH4_LOC (4) + +// [PRS]$ + +// $[PTI] +#define PORTIO_PTI_DFRAME_PIN (13) +#define PORTIO_PTI_DFRAME_PORT (gpioPortB) +#define PORTIO_PTI_DFRAME_LOC (6) + +#define PORTIO_PTI_DOUT_PIN (12) +#define PORTIO_PTI_DOUT_PORT (gpioPortB) +#define PORTIO_PTI_DOUT_LOC (6) + +#define HAL_PTI_ENABLE (1) + +#define BSP_PTI_DFRAME_PIN (13) +#define BSP_PTI_DFRAME_PORT (gpioPortB) +#define BSP_PTI_DFRAME_LOC (6) + +#define BSP_PTI_DOUT_PIN (12) +#define BSP_PTI_DOUT_PORT (gpioPortB) +#define BSP_PTI_DOUT_LOC (6) + +#define HAL_PTI_MODE (HAL_PTI_MODE_UART) +#define HAL_PTI_BAUD_RATE (1600000) +// [PTI]$ + +// $[PYD1698] +// [PYD1698]$ + +// $[SERIAL] +#define HAL_SERIAL_USART0_ENABLE (0) +#define HAL_SERIAL_LEUART0_ENABLE (0) +#define HAL_SERIAL_USART1_ENABLE (0) +#define HAL_SERIAL_USART2_ENABLE (0) +#define HAL_SERIAL_USART3_ENABLE (0) +#define HAL_SERIAL_RXWAKE_ENABLE (0) +#define BSP_SERIAL_APP_CTS_PIN (2) +#define BSP_SERIAL_APP_CTS_PORT (gpioPortA) +#define BSP_SERIAL_APP_CTS_LOC (30) + +#define BSP_SERIAL_APP_RX_PIN (1) +#define BSP_SERIAL_APP_RX_PORT (gpioPortA) +#define BSP_SERIAL_APP_RX_LOC (0) + +#define BSP_SERIAL_APP_TX_PIN (0) +#define BSP_SERIAL_APP_TX_PORT (gpioPortA) +#define BSP_SERIAL_APP_TX_LOC (0) + +#define BSP_SERIAL_APP_RTS_PIN (3) +#define BSP_SERIAL_APP_RTS_PORT (gpioPortA) +#define BSP_SERIAL_APP_RTS_LOC (30) + +#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128) +#define HAL_SERIAL_APP_BAUD_RATE (115200) +#define HAL_SERIAL_APP_RXSTOP (16) +#define HAL_SERIAL_APP_RXSTART (16) +#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128) +#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE) +// [SERIAL]$ + +// $[SPIDISPLAY] +// [SPIDISPLAY]$ + +// $[SPINCP] +// [SPINCP]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[UARTNCP] +// [UARTNCP]$ + +// $[USART0] +#define PORTIO_USART0_CTS_PIN (2) +#define PORTIO_USART0_CTS_PORT (gpioPortA) +#define PORTIO_USART0_CTS_LOC (30) + +#define PORTIO_USART0_RTS_PIN (3) +#define PORTIO_USART0_RTS_PORT (gpioPortA) +#define PORTIO_USART0_RTS_LOC (30) + +#define PORTIO_USART0_RX_PIN (1) +#define PORTIO_USART0_RX_PORT (gpioPortA) +#define PORTIO_USART0_RX_LOC (0) + +#define PORTIO_USART0_TX_PIN (0) +#define PORTIO_USART0_TX_PORT (gpioPortA) +#define PORTIO_USART0_TX_LOC (0) + +#define HAL_USART0_ENABLE (1) + +#define BSP_USART0_CTS_PIN (2) +#define BSP_USART0_CTS_PORT (gpioPortA) +#define BSP_USART0_CTS_LOC (30) + +#define BSP_USART0_RX_PIN (1) +#define BSP_USART0_RX_PORT (gpioPortA) +#define BSP_USART0_RX_LOC (0) + +#define BSP_USART0_TX_PIN (0) +#define BSP_USART0_TX_PORT (gpioPortA) +#define BSP_USART0_TX_LOC (0) + +#define BSP_USART0_RTS_PIN (3) +#define BSP_USART0_RTS_PORT (gpioPortA) +#define BSP_USART0_RTS_LOC (30) + +#define HAL_USART0_RX_QUEUE_SIZE (128) +#define HAL_USART0_BAUD_RATE (115200) +#define HAL_USART0_RXSTOP (16) +#define HAL_USART0_RXSTART (16) +#define HAL_USART0_TX_QUEUE_SIZE (128) +#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE) +// [USART0]$ + +// $[USART1] +#define PORTIO_USART1_CLK_PIN (8) +#define PORTIO_USART1_CLK_PORT (gpioPortC) +#define PORTIO_USART1_CLK_LOC (11) + +#define PORTIO_USART1_CS_PIN (9) +#define PORTIO_USART1_CS_PORT (gpioPortC) +#define PORTIO_USART1_CS_LOC (11) + +#define PORTIO_USART1_RX_PIN (7) +#define PORTIO_USART1_RX_PORT (gpioPortC) +#define PORTIO_USART1_RX_LOC (11) + +#define PORTIO_USART1_TX_PIN (6) +#define PORTIO_USART1_TX_PORT (gpioPortC) +#define PORTIO_USART1_TX_LOC (11) + +// [USART1]$ + +// $[USART2] +#define PORTIO_USART2_CLK_PIN (8) +#define PORTIO_USART2_CLK_PORT (gpioPortA) +#define PORTIO_USART2_CLK_LOC (1) + +#define PORTIO_USART2_CS_PIN (9) +#define PORTIO_USART2_CS_PORT (gpioPortA) +#define PORTIO_USART2_CS_LOC (1) + +#define PORTIO_USART2_RX_PIN (7) +#define PORTIO_USART2_RX_PORT (gpioPortA) +#define PORTIO_USART2_RX_LOC (1) + +#define PORTIO_USART2_TX_PIN (6) +#define PORTIO_USART2_TX_PORT (gpioPortA) +#define PORTIO_USART2_TX_LOC (1) + +// [USART2]$ + +// $[USART3] +#define PORTIO_USART3_CTS_PIN (8) +#define PORTIO_USART3_CTS_PORT (gpioPortD) +#define PORTIO_USART3_CTS_LOC (28) + +#define PORTIO_USART3_RTS_PIN (9) +#define PORTIO_USART3_RTS_PORT (gpioPortD) +#define PORTIO_USART3_RTS_LOC (28) + +#define PORTIO_USART3_RX_PIN (7) +#define PORTIO_USART3_RX_PORT (gpioPortB) +#define PORTIO_USART3_RX_LOC (10) + +#define PORTIO_USART3_TX_PIN (6) +#define PORTIO_USART3_TX_PORT (gpioPortB) +#define PORTIO_USART3_TX_LOC (10) + +// [USART3]$ + +// $[VCOM] +// [VCOM]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VUART] +// [VUART]$ + +// $[WDOG] +// [WDOG]$ + +// $[WTIMER0] +// [WTIMER0]$ + +// $[WTIMER1] +// [WTIMER1]$ + +#endif /* HAL_CONFIG_H */ + diff --git a/examples/platforms/efr32/brd4304a/hal-config.h b/examples/platforms/efr32/brd4304a/hal-config.h new file mode 100644 index 000000000..9265cce58 --- /dev/null +++ b/examples/platforms/efr32/brd4304a/hal-config.h @@ -0,0 +1,352 @@ +#ifndef HAL_CONFIG_H +#define HAL_CONFIG_H + +#include "em_device.h" +#include "hal-config-types.h" + +// This file is auto-generated by Hardware Configurator in Simplicity Studio. +// Any content between $[ and ]$ will be replaced whenever the file is regenerated. +// Content outside these regions will be preserved. + +// $[ACMP0] +// [ACMP0]$ + +// $[ACMP1] +// [ACMP1]$ + +// $[ADC0] +// [ADC0]$ + +// $[ANTDIV] +// [ANTDIV]$ + +// $[BATTERYMON] +// [BATTERYMON]$ + +// $[BTL_BUTTON] +// [BTL_BUTTON]$ + +// $[BULBPWM] +// [BULBPWM]$ + +// $[BULBPWM_COLOR] +// [BULBPWM_COLOR]$ + +// $[BUTTON] +// [BUTTON]$ + +// $[CMU] +#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO) +#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO) +#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO) +#define BSP_CLK_LFXO_PRESENT (1) +#define BSP_CLK_HFXO_PRESENT (1) +#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT +#define BSP_CLK_LFXO_CTUNE (0U) +#define BSP_CLK_LFXO_FREQ (32768U) +#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO) +#define BSP_CLK_HFXO_FREQ (38400000UL) +#define BSP_CLK_HFXO_CTUNE (285) +#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT +#define BSP_CLK_HFXO_CTUNE_TOKEN (1) +#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE) +// [CMU]$ + +// $[COEX] +// [COEX]$ + +// $[CS5463] +// [CS5463]$ + +// $[CSEN] +// [CSEN]$ + +// $[DCDC] +#define BSP_DCDC_PRESENT (1) + +#define HAL_DCDC_BYPASS (0) +#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT +// [DCDC]$ + +// $[EMU] +// [EMU]$ + +// $[EXTFLASH] +// [EXTFLASH]$ + +// $[EZRADIOPRO] +// [EZRADIOPRO]$ + +// $[FEM] +#define HAL_FEM_ENABLE (1) + +#define BSP_FEM_RX_PIN (10U) +#define BSP_FEM_RX_PORT (gpioPortD) +#define BSP_FEM_RX_LOC (0U) + +#define BSP_FEM_SLEEP_PIN (11U) +#define BSP_FEM_SLEEP_PORT (gpioPortD) +#define BSP_FEM_SLEEP_LOC (13U) + +#define HAL_FEM_RX_ACTIVE (1) +#define BSP_FEM_RX_CHANNEL (5) +#define HAL_FEM_TX_ACTIVE (0) +#define HAL_FEM_BYPASS_ENABLE (0) +#define BSP_FEM_SLEEP_CHANNEL (6) +#define HAL_FEM_TX_HIGH_POWER (0) +// [FEM]$ + +// $[GPIO] +#define PORTIO_GPIO_SWV_PIN (2U) +#define PORTIO_GPIO_SWV_PORT (gpioPortF) +#define PORTIO_GPIO_SWV_LOC (0U) + +// [GPIO]$ + +// $[I2C0] +#define PORTIO_I2C0_SCL_PIN (11U) +#define PORTIO_I2C0_SCL_PORT (gpioPortC) +#define PORTIO_I2C0_SCL_LOC (15U) + +#define PORTIO_I2C0_SDA_PIN (10U) +#define PORTIO_I2C0_SDA_PORT (gpioPortC) +#define PORTIO_I2C0_SDA_LOC (15U) + +// [I2C0]$ + +// $[I2C1] +// [I2C1]$ + +// $[I2CSENSOR] +// [I2CSENSOR]$ + +// $[IDAC0] +// [IDAC0]$ + +// $[IOEXP] +// [IOEXP]$ + +// $[LED] +#define BSP_LED_PRESENT (1) + +#define BSP_LED0_PIN (6U) +#define BSP_LED0_PORT (gpioPortF) + +#define BSP_LED1_PIN (7U) +#define BSP_LED1_PORT (gpioPortF) + +#define HAL_LED_ENABLE { 0, 1 } +#define HAL_LED_COUNT (2U) +#define BSP_LED_COUNT (2U) +#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } } +// [LED]$ + +// $[LESENSE] +// [LESENSE]$ + +// $[LETIMER0] +// [LETIMER0]$ + +// $[LEUART0] +// [LEUART0]$ + +// $[LFXO] +// [LFXO]$ + +// $[PA] +#define HAL_PA_ENABLE (1) + +#define HAL_PA_RAMP (10UL) +#define HAL_PA_2P4_LOWPOWER (0) +#define HAL_PA_POWER (252U) +#define BSP_PA_VOLTAGE (3300U) +#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h" +// [PA]$ + +// $[PCNT0] +// [PCNT0]$ + +// $[PCNT1] +// [PCNT1]$ + +// $[PCNT2] +// [PCNT2]$ + +// $[PORTIO] +// [PORTIO]$ + +// $[PRS] +#define PORTIO_PRS_CH4_PIN (13U) +#define PORTIO_PRS_CH4_PORT (gpioPortD) +#define PORTIO_PRS_CH4_LOC (4U) + +#define PORTIO_PRS_CH5_PIN (10U) +#define PORTIO_PRS_CH5_PORT (gpioPortD) +#define PORTIO_PRS_CH5_LOC (0U) + +#define PORTIO_PRS_CH6_PIN (11U) +#define PORTIO_PRS_CH6_PORT (gpioPortD) +#define PORTIO_PRS_CH6_LOC (13U) + +// [PRS]$ + +// $[PTI] +#define PORTIO_PTI_DFRAME_PIN (13U) +#define PORTIO_PTI_DFRAME_PORT (gpioPortB) +#define PORTIO_PTI_DFRAME_LOC (6U) + +#define PORTIO_PTI_DOUT_PIN (11U) +#define PORTIO_PTI_DOUT_PORT (gpioPortB) +#define PORTIO_PTI_DOUT_LOC (5U) + +#define HAL_PTI_ENABLE (1) + +#define BSP_PTI_DFRAME_PIN (13U) +#define BSP_PTI_DFRAME_PORT (gpioPortB) +#define BSP_PTI_DFRAME_LOC (6U) + +#define BSP_PTI_DOUT_PIN (11U) +#define BSP_PTI_DOUT_PORT (gpioPortB) +#define BSP_PTI_DOUT_LOC (5U) + +#define HAL_PTI_MODE (HAL_PTI_MODE_UART) +#define HAL_PTI_BAUD_RATE (1600000UL) +// [PTI]$ + +// $[PYD1698] +// [PYD1698]$ + +// $[SERIAL] +#define HAL_SERIAL_USART0_ENABLE (0) +#define HAL_SERIAL_LEUART0_ENABLE (0) +#define HAL_SERIAL_USART1_ENABLE (0) +#define HAL_SERIAL_USART2_ENABLE (0) +#define HAL_SERIAL_USART3_ENABLE (0) +#define HAL_SERIAL_RXWAKE_ENABLE (0) +#define BSP_SERIAL_APP_CTS_PIN (2U) +#define BSP_SERIAL_APP_CTS_PORT (gpioPortA) +#define BSP_SERIAL_APP_CTS_LOC (30U) + +#define BSP_SERIAL_APP_RX_PIN (1U) +#define BSP_SERIAL_APP_RX_PORT (gpioPortA) +#define BSP_SERIAL_APP_RX_LOC (0U) + +#define BSP_SERIAL_APP_TX_PIN (0U) +#define BSP_SERIAL_APP_TX_PORT (gpioPortA) +#define BSP_SERIAL_APP_TX_LOC (0U) + +#define BSP_SERIAL_APP_RTS_PIN (3U) +#define BSP_SERIAL_APP_RTS_PORT (gpioPortA) +#define BSP_SERIAL_APP_RTS_LOC (30U) + +#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL) +#define HAL_SERIAL_APP_BAUD_RATE (115200UL) +#define HAL_SERIAL_APP_RXSTOP (16UL) +#define HAL_SERIAL_APP_RXSTART (16UL) +#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL) +#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART) +// [SERIAL]$ + +// $[SPIDISPLAY] +// [SPIDISPLAY]$ + +// $[SPINCP] +// [SPINCP]$ + +// $[TIMER0] +// [TIMER0]$ + +// $[TIMER1] +// [TIMER1]$ + +// $[UARTNCP] +// [UARTNCP]$ + +// $[USART0] +#define PORTIO_USART0_CTS_PIN (2U) +#define PORTIO_USART0_CTS_PORT (gpioPortA) +#define PORTIO_USART0_CTS_LOC (30U) + +#define PORTIO_USART0_RTS_PIN (3U) +#define PORTIO_USART0_RTS_PORT (gpioPortA) +#define PORTIO_USART0_RTS_LOC (30U) + +#define PORTIO_USART0_RX_PIN (1U) +#define PORTIO_USART0_RX_PORT (gpioPortA) +#define PORTIO_USART0_RX_LOC (0U) + +#define PORTIO_USART0_TX_PIN (0U) +#define PORTIO_USART0_TX_PORT (gpioPortA) +#define PORTIO_USART0_TX_LOC (0U) + +#define HAL_USART0_ENABLE (1) + +#define BSP_USART0_CTS_PIN (2U) +#define BSP_USART0_CTS_PORT (gpioPortA) +#define BSP_USART0_CTS_LOC (30U) + +#define BSP_USART0_RX_PIN (1U) +#define BSP_USART0_RX_PORT (gpioPortA) +#define BSP_USART0_RX_LOC (0U) + +#define BSP_USART0_TX_PIN (0U) +#define BSP_USART0_TX_PORT (gpioPortA) +#define BSP_USART0_TX_LOC (0U) + +#define BSP_USART0_RTS_PIN (3U) +#define BSP_USART0_RTS_PORT (gpioPortA) +#define BSP_USART0_RTS_LOC (30U) + +#define HAL_USART0_RX_QUEUE_SIZE (128UL) +#define HAL_USART0_BAUD_RATE (115200UL) +#define HAL_USART0_RXSTOP (16UL) +#define HAL_USART0_RXSTART (16UL) +#define HAL_USART0_TX_QUEUE_SIZE (128UL) +#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART) +// [USART0]$ + +// $[USART1] +#define PORTIO_USART1_CLK_PIN (8U) +#define PORTIO_USART1_CLK_PORT (gpioPortC) +#define PORTIO_USART1_CLK_LOC (11U) + +#define PORTIO_USART1_CS_PIN (9U) +#define PORTIO_USART1_CS_PORT (gpioPortC) +#define PORTIO_USART1_CS_LOC (11U) + +#define PORTIO_USART1_RX_PIN (7U) +#define PORTIO_USART1_RX_PORT (gpioPortC) +#define PORTIO_USART1_RX_LOC (11U) + +#define PORTIO_USART1_TX_PIN (6U) +#define PORTIO_USART1_TX_PORT (gpioPortC) +#define PORTIO_USART1_TX_LOC (11U) + +// [USART1]$ + +// $[USART2] +// [USART2]$ + +// $[USART3] +// [USART3]$ + +// $[VCOM] +// [VCOM]$ + +// $[VDAC0] +// [VDAC0]$ + +// $[VUART] +// [VUART]$ + +// $[WDOG] +// [WDOG]$ + +// $[WTIMER0] +// [WTIMER0]$ + +// $[WTIMER1] +// [WTIMER1]$ + +#endif /* HAL_CONFIG_H */ + diff --git a/examples/platforms/efr32/platform.c b/examples/platforms/efr32/platform.c index 34ab559d6..11db9a9b8 100644 --- a/examples/platforms/efr32/platform.c +++ b/examples/platforms/efr32/platform.c @@ -45,6 +45,12 @@ #include "openthread-core-efr32-config.h" #include "platform-efr32.h" +#include "hal-config.h" + +#if (HAL_FEM_ENABLE) +#include "fem-control.h" +#endif + void halInitChipSpecific(void); otInstance *sInstance; @@ -60,6 +66,11 @@ void PlatformInit(int argc, char *argv[]) BSP_Init(BSP_INIT_BCC); +#if (HAL_FEM_ENABLE) + initFem(); + wakeupFem(); +#endif + efr32RadioInit(); efr32AlarmInit(); efr32MiscInit();