From 345c2bceaa0eea04bfb46d012712598db1da1a4e Mon Sep 17 00:00:00 2001
From: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
Date: Mon, 4 Aug 2025 18:15:25 +0800
Subject: [PATCH] update trtllm-gen sm100f cubins of gemm kernels

Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
---
 .../BatchedGemmInterface.h                    |   62 +-
 .../trtllmGen_bmm_export/BatchedGemmOptions.h |   61 +-
 .../GemmGatedActOptions.h                     |    9 +-
 .../trtllmGen_bmm_export/GemmOptions.h        |    5 +-
 .../trtllmGen_bmm_export/KernelMetaInfo.h     | 1524 +++--
 .../trtllmGen_bmm_export/KernelParams.h       | 1421 ++--
 .../trtllmGen_bmm_export/KernelParamsDecl.h   |  547 ++
 .../trtllmGen_bmm_export/KernelTraits.h       |   74 +-
 .../trtllmGen_bmm_export/TmaDescriptor.h      |    6 +-
 .../trtllmGen_bmm_export/config.json          |   14 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
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 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...oseMmaOutput_dsFp8_batchN_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...tput_dsFp8_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...oseMmaOutput_dsFp8_batchN_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...eMmaOutput_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ...persistent_batchN_dynamic_sm100a_cubin.cpp |    3 -
 ..._routeLdgsts_silu_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ..._routeLdgsts_silu_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...oseMmaOutput_dsFp8_batchN_sm100a_cubin.cpp |    3 -
 ...atchN_routeLdgsts_dynamic_sm100a_cubin.cpp |    3 -
 ...oseMmaOutput_dsFp8_batchN_sm100a_cubin.cpp |    3 -
 ..._routeLdgsts_silu_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ..._routeLdgsts_silu_dynamic_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...oseMmaOutput_dsFp8_batchN_sm100a_cubin.cpp |    3 -
 ...oseMmaOutput_dsFp8_batchN_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ...transposeMmaOutput_batchN_sm100a_cubin.cpp |    3 -
 ..._routeLdgsts_silu_dynamic_sm100a_cubin.cpp |    3 -
 ..._routeLdgsts_silu_dynamic_sm100a_cubin.cpp |    3 -
 ...ansOut_schedP_bN_dynBatch_sm100a_cubin.cpp |    3 -
 ...ansOut_schedS_bN_dynBatch_sm100a_cubin.cpp |    3 -
 ...ansOut_schedP_bN_dynBatch_sm100a_cubin.cpp |    3 +
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 ...ansOut_schedP_bN_dynBatch_sm100a_cubin.cpp |    3 +
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 ...ansOut_schedP_bN_dynBatch_sm100a_cubin.cpp |    3 +
 ...nsOut_schedS_bN_dynBatch_sm100a_cubin.cpp} |    4 +-
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 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ..._transOut_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 -
 ...t_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 +
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 -
 ..._transOut_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 -
 ...t_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 +
 ...schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp |    3 +
 ...S_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp |    3 -
 ...bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 +
 ...S_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp |    3 -
 ...bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ..._transOut_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 -
 ...t_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 +
 ..._transOut_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 -
 ...t_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 +
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 -
 ...56b_TN_transOut_schedS_bN_sm100a_cubin.cpp |    3 +
 ...S_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp |    3 -
 ...S_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp |    3 -
 .../trtllmGenKernels/gemm/KernelRunner.cpp    |    4 +-
 .../gemm/trtllmGen_gemm_export/Enums.h        |   56 +
 .../trtllmGen_gemm_export/GemmInterface.h     |   70 +-
 .../gemm/trtllmGen_gemm_export/GemmOptions.h  |  340 +-
 .../trtllmGen_gemm_export/KernelMetaInfo.h    |  833 ++-
 .../gemm/trtllmGen_gemm_export/KernelParams.h |  774 +--
 .../trtllmGen_gemm_export/KernelParamsDecl.h  |  324 +
 .../gemm/trtllmGen_gemm_export/KernelTraits.h |  174 +-
 .../trtllmGen_gemm_export/TmaDescriptor.h     |  133 +-
 .../gemm/trtllmGen_gemm_export/config.json    |    9 -
 ...luster1x1x1_16dp256bit_TN_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ...luster1x1x1_16dp256bit_TN_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...tK2_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ...luster1x1x1_16dp256bit_TN_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...tK2_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...luster1x1x1_16dp256bit_TN_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ...luster1x1x1_16dp256bit_TN_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ..._transposeMmaOutput_dsFp8_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...tK2_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...luster1x1x1_16dp256bit_TN_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...bit_TN_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...a1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...a1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...plitK2_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...a1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...plitK2_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...a1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...a1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...sOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...plitK2_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...a1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 ...dp256b_TN_transOut_schedS_sm100a_cubin.cpp |    3 +
 .../gemmGatedAct/KernelRunner.cpp             |   22 +-
 .../gemmGatedAct/KernelRunner.h               |    4 +-
 .../trtllmGen_gatedAct_export/Enums.h         |   61 +
 .../GemmGatedActInterface.h                   |  110 +-
 .../GemmGatedActOptions.h                     |   50 +-
 .../trtllmGen_gatedAct_export/GemmOptions.h   |  602 +-
 .../KernelMetaInfo.h                          | 5904 ++++++++++++++++-
 .../trtllmGen_gatedAct_export/KernelParams.h  |  308 +-
 .../trtllmGen_gatedAct_export/KernelTraits.h  |  207 +-
 .../trtllmGen_gatedAct_export/TmaDescriptor.h |  153 +-
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...ma128x128x32_cluster1x1x1_sm100a_cubin.cpp |    3 -
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...ma128x128x32_cluster1x1x1_sm100a_cubin.cpp |    3 -
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...ma128x128x32_cluster1x1x1_sm100a_cubin.cpp |    3 -
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...r1x1x1_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...plitK4_transposeMmaOutput_sm100a_cubin.cpp |    3 -
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 ...TN_transOut_schedS_swiGlu_sm100a_cubin.cpp |    3 +
 .../trtllm/gen/CommonUtils.h                  |    5 +
 .../trtllm/gen/CudaKernelLauncher.h           |    5 +
 .../trtllm/gen/DtypeDecl.h                    |   93 +-
 .../trtllm/gen/MmaDecl.h                      |   90 +
 .../trtllm/gen/SfLayoutDecl.h                 |    5 +
 cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp |    1 +
 .../thop/fp8PerTensorScalingTrtllmGenGemm.cpp |   10 +-
 582 files changed, 11547 insertions(+), 4159 deletions(-)
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E2m1_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_routeLdgsts_silu_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E2m1_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E2m1_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_routeLdgsts_silu_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E2m1_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_routeLdgsts_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_routeLdgsts_silu_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_routeLdgsts_silu_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Fp16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Fp16_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_routeLdgsts_silu_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_routeLdgsts_silu_dynamic_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 rename cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/{BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp => Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp} (81%)
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x512_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x512u2_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x512_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x512u2_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x256_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x256_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x256_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x256u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x256u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x256u2_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x512_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x16x512u2_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x256u2_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x512_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x32x512u2_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x64x256u2_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x16x256_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x16x256u2_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x16x512_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x16x512u2_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x32x256_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x32x256u2_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x32x512_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x32x512u2_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x64x256_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x64x256u2_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParamsDecl.h
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp32_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_Fp32_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/GemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x128x256u2_s3_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_transposeMmaOutput_sm100a_cubin.cpp
 delete mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
 create mode 100644 cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/MmaDecl.h

diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h
index 53bd7bc33c..49d23d13dd 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmInterface.h
@@ -244,11 +244,48 @@ struct BatchedGemmData
         // Shape is [B].
         float const* mPtrScaleGate{nullptr};
 
+        // The clamp limit for the accumulator before applying the activation.
+        // Shape is [B].
+        // Clamp is INF if nullptr.
+        // When the input is FP8 or NVFP4, the clamp has to be scaled by limit' = limit / dequantAb.
+        // If applied on SwiGlu, it will be:
+        //
+        //   x_glu    = x_glu.clamp(min=None, max=limit)
+        //   x_linear = x_linear.clamp(min=-limit, max=limit)
+        //
+        // The given clamp limit applies to the dequantized values, so the order of operations would
+        // look something like this:
+        //
+        // x0 = x0 * dqAb
+        // x0 = clamp(x0, none, limit)
+        // x0 = x0 * sigmoid(alpha * x0)
+        // x1 = dqAb * x1
+        // x1 = clamp(x1, -limit, limit)
+        // out = qC * (x1 + beta) * x0
+        //
+        // Given that the dqAb and qC are combined into scaleC, we can bring the dqAb into the clamp
+        // limit and apply the clamping prior to dequantization:
+        //
+        // x0 = clamp(x0, none, limit / dqAb)
+        // x0 = x0 * dqAb
+        // x0 = x0 * sigmoid(alpha * x0)
+        // x1 = clamp(x1, -limit / dqAb, limit / dqAb)
+        // scaleC = dqAb * qC
+        // beta' = beta / dqAb
+        // out = scaleC * (x1 + beta') * x0
+        //
+        // Note this assumes that scaleAb == scaleGate which is true in TRT-LLM MoE use-case
+        //
+        float const* mPtrClampLimit{nullptr};
+
         // The alpha and beta for SwiGlu.
         // gatedActivation <- (x0 + beta) * activation(x1, alpha)
         // Shape is [B].
         // Alpha is 1.f if nullptr.
         // Beta is 0.f if nullptr.
+        // The formula:
+        //
+        //   out_glu  = x_glu * torch.sigmoid(alpha * x_glu) + (x_linear + beta)
         float const* mPtrSwiGluAlpha{nullptr};
         float const* mPtrSwiGluBeta{nullptr};
 
@@ -591,6 +628,7 @@ int32_t BatchedGemmInterface::run(BatchedGemmConfig const& config, void* workspa
 {
     // Might be used.
     (void) usePdl;
+    (void) moduleCache;
     // Get options from config and data.
     auto options = getOptionsFromConfigAndData(config, batchedGemmData);
 
@@ -642,17 +680,17 @@ int32_t BatchedGemmInterface::run(BatchedGemmConfig const& config, void* workspa
     auto const numCtaZ = options.mNumSlicesForSplitK;
     mNumCtas = numCtaX * numCtaY * numCtaZ;
 
-    auto kernelParams = KernelParams::setKernelParams(options, batchM, batchedGemmData.mInputBuffers.mPtrA,
+    auto kernelParams = KernelParamsSetup::setKernelParams(options, batchM, batchedGemmData.mInputBuffers.mPtrA,
         batchedGemmData.mInputBuffers.mPtrB, batchedGemmData.mOutputBuffers.mPtrC,
         batchedGemmData.mInputBuffers.mPtrSfA, batchedGemmData.mInputBuffers.mPtrSfB,
         batchedGemmData.mInputBuffers.mPtrPerTokenSfA, batchedGemmData.mInputBuffers.mPtrPerTokenSfB,
         batchedGemmData.mInputBuffers.mPtrBias, batchedGemmData.mOutputBuffers.mPtrSfC,
         batchedGemmData.mInputBuffers.mPtrScaleC, batchedGemmData.mInputBuffers.mPtrScaleGate,
-        batchedGemmData.mInputBuffers.mPtrSwiGluAlpha, batchedGemmData.mInputBuffers.mPtrSwiGluBeta,
-        batchedGemmData.mInputBuffers.mPtrRouteMap, dPtrRowMax, dPtrRowMaxBars,
-        batchedGemmData.mInputBuffers.mPtrNumNonExitingCtas, batchedGemmData.mInputBuffers.mPtrTotalNumPaddedTokens,
-        batchedGemmData.mInputBuffers.mPtrCtaIdxXyToBatchIdx, batchedGemmData.mInputBuffers.mPtrCtaIdxXyToMnLimit,
-        maxNumCtasInBatchDim);
+        batchedGemmData.mInputBuffers.mPtrClampLimit, batchedGemmData.mInputBuffers.mPtrSwiGluAlpha,
+        batchedGemmData.mInputBuffers.mPtrSwiGluBeta, batchedGemmData.mInputBuffers.mPtrRouteMap, dPtrRowMax,
+        dPtrRowMaxBars, batchedGemmData.mInputBuffers.mPtrNumNonExitingCtas,
+        batchedGemmData.mInputBuffers.mPtrTotalNumPaddedTokens, batchedGemmData.mInputBuffers.mPtrCtaIdxXyToBatchIdx,
+        batchedGemmData.mInputBuffers.mPtrCtaIdxXyToMnLimit, maxNumCtasInBatchDim);
 
     // The size of the grid.
     std::vector<int32_t> grid{numCtaX, numCtaY, numCtaZ};
@@ -660,26 +698,26 @@ int32_t BatchedGemmInterface::run(BatchedGemmConfig const& config, void* workspa
 #ifdef TLLM_GEN_EXPORT_INTERFACE
     CUmodule cuModule;
     CUfunction cuFunction;
+
     if (moduleCache.has_value())
     {
         ModuleCache& moduleCacheRef = moduleCache.value().get();
 
-        // Modules are associated with a specific context so include the ctxId in the key
+        // Modules are associated with a specific context, so the context is included in the key
         CUcontext ctx;
         unsigned long long ctxId;
         cuCtxGetCurrent(&ctx);
         cuCtxGetId(ctx, &ctxId);
 
-        // Reinterpret the ctxId as a string to avoid needing a custom hash or converting it to a string in decimal
-        // representation.
+        // Reinterpret the ctxId as a string to avoid needing a custom hash or converting it to a
+        // string in decimal representation.
         std::string const ctxName
             = std::string(reinterpret_cast<char*>(&ctxId), sizeof(unsigned long long) / sizeof(char));
         std::string const funcName = std::string(config.mFunctionName);
-        // As the ctxName is a fixed number of bytes, the two strings can just be appended without risk of a collision
         auto const moduleKey = ctxName + funcName;
         auto module = moduleCacheRef.find(moduleKey);
 
-        // Check if module exists in cache. Otherwise, load it
+        // Use cache if module is found, otherwise load and insert into cache
         if (module != moduleCacheRef.end())
         {
             cuFunction = std::get<1>(module->second);
@@ -716,7 +754,7 @@ int32_t BatchedGemmInterface::run(BatchedGemmConfig const& config, void* workspa
     {
         return -1;
     }
-    // If a module cache has not been given, unload the module to avoid overflow
+    // If a module cache has not been given, unload the module to avoid leaking
     if (!moduleCache.has_value())
     {
         cuModuleUnload(cuModule);
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h
index 148a2cb185..01b85f4bcc 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/BatchedGemmOptions.h
@@ -96,10 +96,10 @@ struct BatchedGemmOptions : public gemmGatedAct::GemmGatedActOptions
         int tileK, bool useUnrollLoop2xForMma, bool useCustomMmaSchedule, bool useHoistTryWaitForCustomMmaSchedule,
         bool useDeepSeekFp8, bool usePerTokenSfA, bool usePerTokenSfB, bool useTmaStore, bool useTwoTmaLoadWarps,
         bool useTwoMmaWarps, tg::SfLayout sfLayoutA, tg::SfLayout sfLayoutB, tg::SfLayout sfLayoutC,
-        int32_t sfReshapeFactor, gemm::TileScheduler tileScheduler, gemmGatedAct::ActType actType,
+        int32_t sfReshapeFactor, gemm::TileScheduler tileScheduler, gemmGatedAct::ActType actType, bool clampBeforeAct,
         std::vector<int> batchedM, std::vector<int> batchedN, BatchMode batchMode, int numBatches, bool isStaticBatch,
         int numTokens, RouteImpl routeImpl, bool gridWaitForPrimaryRouting, bool fusedAct,
-        int numRegsPerThreadNonEpilogueWarp, int numRegsPerThreadEpilogueWarp, int numRegsCastAWarps)
+        int numRegsPerThreadNonEpilogueWarp, int numRegsPerThreadEpilogueWarp, int numRegsCastAWarps, bool useTmaOobOpt)
         : gemmGatedAct::GemmGatedActOptions(
             gemm::GemmOptions(allReduceAlgo, biasType, blockK, clusterDimX, clusterDimY, clusterDimZ, dtypeAcc, dtypeA,
                 dtypeB, dtypeC, dtypeMmaA, dtypeMmaB, enablesEarlyExit, enablesDelayedEarlyExit, enablesGlobalPtxKnobs,
@@ -112,19 +112,20 @@ struct BatchedGemmOptions : public gemmGatedAct::GemmGatedActOptions
                 useCustomMmaSchedule, useHoistTryWaitForCustomMmaSchedule, useDeepSeekFp8, usePerTokenSfA,
                 usePerTokenSfB, useTmaStore, useTwoTmaLoadWarps, useTwoMmaWarps, sfLayoutA, sfLayoutB, sfLayoutC,
                 sfReshapeFactor, tileScheduler),
-            actType)
+            actType, clampBeforeAct)
         , mBatchedM(batchedM)
         , mBatchedN(batchedN)
         , mBatchMode(BatchMode(batchMode))
-        , mNumBatches(numBatches)
-        , mIsStaticBatch(isStaticBatch)
-        , mNumTokens(numTokens)
-        , mRouteImpl(routeImpl)
-        , mGridWaitForPrimaryRouting(gridWaitForPrimaryRouting)
         , mFusedAct(fusedAct)
+        , mGridWaitForPrimaryRouting(gridWaitForPrimaryRouting)
+        , mIsStaticBatch(isStaticBatch)
+        , mNumBatches(numBatches)
         , mNumRegsPerThreadNonEpilogueWarp(numRegsPerThreadNonEpilogueWarp)
         , mNumRegsPerThreadEpilogueWarp(numRegsPerThreadEpilogueWarp)
         , mNumRegsCastAWarps(numRegsCastAWarps)
+        , mNumTokens(numTokens)
+        , mRouteImpl(routeImpl)
+        , mUseTmaOobOpt(useTmaOobOpt)
     {
     }
 
@@ -134,28 +135,28 @@ struct BatchedGemmOptions : public gemmGatedAct::GemmGatedActOptions
     std::vector<int> mBatchedN;
     // Whether batching M or N.
     BatchMode mBatchMode{BatchMode::BatchM};
-    // Number of Gemm batches.
-    int mNumBatches;
-
-    // Whether the batch size is static (i.e. known at kernel launch time).
-    bool mIsStaticBatch{true};
-    // Total number of tokens.
-    int mNumTokens{32};
-    // Whether load the input tokens and do routing.
-    RouteImpl mRouteImpl{RouteImpl::NoRoute};
+    // Whether to perform a fused gated activation.
+    bool mFusedAct{false};
     // Whether the loads that load from ptrRouteMap, ptrTotalNumPaddedTokens,
     // ptrCtaIdxXyToBatchIdx, etc.. should wait on a grid dependency.
     bool mGridWaitForPrimaryRouting{true};
-
-    // Whether to perform a fused gated activation.
-    bool mFusedAct{false};
-
+    // Whether the batch size is static (i.e. known at kernel launch time).
+    bool mIsStaticBatch{true};
+    // Number of Gemm batches.
+    int mNumBatches;
     // Number of registers per thread for non-epilogue warps
     int mNumRegsPerThreadNonEpilogueWarp{0};
     // Number of registers per thread for epilogue warps
     int mNumRegsPerThreadEpilogueWarp{0};
     // Number of registers for the cast A warps.
     int mNumRegsCastAWarps{0};
+    // Total number of tokens.
+    int mNumTokens{32};
+    // Whether load the input tokens and do routing.
+    RouteImpl mRouteImpl{RouteImpl::NoRoute};
+    // Whether to use TMA out-of-bounds optimization to reduce wasted traffic. See details in
+    // BatchedGemm/KernelParamsDecl.h.
+    bool mUseTmaOobOpt{false};
 };
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -165,6 +166,20 @@ bool checkAndUpdateBatchedGemmOptions(BatchedGemmOptions& options, bool isBlackw
 {
 
     bool isValid = true;
+    if (options.mUseTmaOobOpt && !options.mUseTwoTmaLoadWarps)
+    {
+        if (updateOptions)
+        {
+            // Since any routing (mRouteAct != NoRoute) requires mUseTwoTmaLoadWarps == true.
+            // Single TMA load warp is not the target use case for OOB optimization.
+            options.mUseTmaOobOpt = false;
+        }
+        else
+        {
+            TLLM_CHECK_ERROR(false, "TMA OOB optimization requires two TMA load warps.");
+            return false;
+        }
+    }
     if (options.mFusedAct)
     {
         // ensure that we check the fused options as well
@@ -340,6 +355,7 @@ struct BatchedGemmConfig
     uint32_t const mSharedMemSize{0};
     char const* mFunctionName{nullptr};
     uint32_t const mNumThreadsPerCTA{0};
+    char const* mHash{nullptr};
 #else
     trtllm::gen::CudaRunner* mCudaRunner{nullptr};
 #endif
@@ -366,7 +382,8 @@ inline std::string dumpOptions(BatchedGemmOptions const& options)
     ss << "mFusedAct=" << options.mFusedAct << "," << std::endl;
     ss << "mNumRegsPerThreadNonEpilogueWarp=" << options.mNumRegsPerThreadNonEpilogueWarp << "," << std::endl;
     ss << "mNumRegsPerThreadEpilogueWarp=" << options.mNumRegsPerThreadEpilogueWarp << "," << std::endl;
-    ss << "mNumRegsCastAWarps=" << options.mNumRegsCastAWarps << std::endl;
+    ss << "mNumRegsCastAWarps=" << options.mNumRegsCastAWarps << "," << std::endl;
+    ss << "mUseTmaOobOpt=" << options.mUseTmaOobOpt << std::endl;
     return ss.str();
 }
 
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmGatedActOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmGatedActOptions.h
index 1eb8361522..deedee27ca 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmGatedActOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmGatedActOptions.h
@@ -101,14 +101,17 @@ struct GemmGatedActOptions : public gemm::GemmOptions
 {
     GemmGatedActOptions() = default;
 
-    GemmGatedActOptions(gemm::GemmOptions options, ActType actType)
+    GemmGatedActOptions(gemm::GemmOptions options, ActType actType, bool clampBeforeAct)
         : gemm::GemmOptions(options)
         , mActType(actType)
+        , mClampBeforeAct(clampBeforeAct)
     {
     }
 
     // Type of the gated activation.
     ActType mActType{ActType::SwiGlu};
+    // Clamp the dequantized values to the range [-limit, limit].
+    bool mClampBeforeAct{false};
 };
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -175,7 +178,8 @@ inline std::string dumpOptions(GemmGatedActOptions const& options)
     std::stringstream ss;
     ss << gemm::dumpOptions(options) << ", ";
     ss << "mActType="
-       << "gemmGatedAct::ActType(" << static_cast<int32_t>(options.mActType) << ")" << std::endl;
+       << "gemmGatedAct::ActType(" << static_cast<int32_t>(options.mActType) << ")," << std::endl;
+    ss << "mClampBeforeAct=" << options.mClampBeforeAct << "" << std::endl;
     return ss.str();
 }
 
@@ -196,6 +200,7 @@ struct GemmGatedActConfig
     uint32_t const mSharedMemSize{0};
     char const* mFunctionName{nullptr};
     uint32_t const mNumThreadsPerCTA{0};
+    char const* mHash{nullptr};
 #else
     trtllm::gen::CudaRunner* mCudaRunner{nullptr};
 #endif
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h
index 8f88db0d33..7d25c117a5 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/GemmOptions.h
@@ -354,6 +354,7 @@ struct GemmConfig
     uint32_t const mSharedMemSize{0};
     char const* mFunctionName{nullptr};
     uint32_t const mNumThreadsPerCTA{0};
+    char const* mHash{nullptr};
 #else
     trtllm::gen::CudaRunner* mCudaRunner{nullptr};
 #endif
@@ -526,6 +527,7 @@ inline int32_t getShuffleBlockSize(int epilogueTileM)
 inline bool checkAndUpdateGemmOptions(
     GemmOptions& options, bool isBlackwell, int /* tpGrpSize */, bool updateOptions = true)
 {
+
     if (options.mDtypeB == tg::Dtype::Void)
     {
         if (updateOptions)
@@ -566,7 +568,8 @@ inline bool checkAndUpdateGemmOptions(
     // Currently, we only support {MxFp4, NvFp4} -> Bf16.
     TLLM_CHECK_ERROR((options.mDtypeA == options.mDtypeMmaA)
             || ((options.mDtypeA == tg::Dtype::MxE2m1 || options.mDtypeA == tg::Dtype::E2m1)
-                && options.mDtypeMmaA == tg::Dtype::Bfloat16),
+                && options.mDtypeMmaA == tg::Dtype::Bfloat16)
+            || (options.mDtypeA == tg::Dtype::E2m1 && options.mDtypeMmaA == tg::Dtype::E4m3),
         "Unsupported cast for A: ", tg::dtypeToString(options.mDtypeA), " -> ", tg::dtypeToString(options.mDtypeMmaA));
 
     // Check that the B cast is supported.
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h
index 9c1b31ef0f..32b52710cb 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelMetaInfo.h
@@ -28,229 +28,229 @@ namespace kernels
 {
 // clang-format off
 
-#define TLLM_GEN_COMMIT "72019269-dirty"
-#define TLLM_GEN_EXPORT_VERSION "6.0.3.0.2.1"
+#define TLLM_GEN_COMMIT "32110ebf-dirty"
+#define TLLM_GEN_EXPORT_VERSION "7.0.3.0.3.0"
 
 static constexpr size_t tllmGenBatchedGemmListLen = 104;
 
 #ifndef EXCLUDE_SM_100
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
-extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
-extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin[];
+extern unsigned char Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
+extern unsigned char Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin[];
 #endif // EXCLUDE_SM_100
 
 #ifndef EXCLUDE_SM_100
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
-extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
-extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len;
+extern unsigned int Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
+extern unsigned int Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len;
 #endif // EXCLUDE_SM_100
 
 
 static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 #ifndef EXCLUDE_SM_100
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "6a0bf2c102efef21017cfd8c1ea75e72cbadee5e1cb82c2abfbb2370cf28948d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -318,6 +318,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -330,8 +331,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "a3126bb4254dcab10372faae7e93a2c743ce97735fc19ba35bda963f524ea8f8", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -399,6 +401,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -411,8 +414,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "d6ecf38671485ed929e33358d61c931ed1851601dba1a899d4e0f7484e8aa6d6", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -480,6 +484,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -492,8 +497,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 136192, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "848bd68403ebc01cd94dcb0988f5890f914bfed6bafa4a1470b34902516eca49", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -561,6 +567,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -573,8 +580,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "25a8cb0f1b214b59a76feae166eb73dcff644be5065987846dba5eb393fcba19", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -642,6 +650,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -654,8 +663,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "0f582ab94bcee39077607621b7fed01ce79838f77f3abf17ce65439bf57ab9d6", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -723,6 +733,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -735,8 +746,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "94b39523665c17ec783c22b4fbf47523132146e365b4c450db6ba4b6f52afb56", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -804,6 +816,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -816,8 +829,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 178176, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "d18a2f733180a782f35e022fbbe76417e8c143a117e6d6b80045fe1faf48d38c", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -885,6 +899,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -897,8 +912,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "0eb05008fb00aac51d2e132d1dad9587b602aced72a2a60a036b4ddb30acb781", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -966,6 +982,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -978,8 +995,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "378127bf506de81c353b6c9ad1567f567fbc8f33b5fb799217c52e44ffc9a0e9", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1047,6 +1065,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1059,8 +1078,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "5bc57208f3139adf191b7a21c5fd987e85268aba7f960af0759a413b3a477510", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1128,6 +1148,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1140,8 +1161,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 154624, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "3aa161b02771849cb272013bfa7964e9bf5aa10712e653fbd12213baf9a4bd4b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1209,6 +1231,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1221,8 +1244,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "dc1c044fbb88c65f06c90b998bff9dfca616a5e45c5f9189d01063d9300ca1a6", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1290,6 +1314,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1302,8 +1327,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "fa6f4a009ed7eb28b0f9b3a12cd2174b5fb53bf869f698b3a708548ec34157a4", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1371,6 +1397,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1383,8 +1410,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "783ab74ed00ce17fcad0aa518d27fc54ffa3a5a5d35a1fae41560e55c56c4534", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1452,6 +1480,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1464,8 +1493,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 200704, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "89b83df6a7fdb94d161b15c1acaa99e5d009eb1db723598d31512fc293d14825", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1533,6 +1563,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1545,8 +1576,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "54a368788db560b6ab92ba6de4503a9d715a660396f85f29859133236feb0c66", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1614,6 +1646,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1626,8 +1659,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "685ff9164cbb048dafde74cdb3a9e83fdafc3585f9d1fde713bc40fbbcc5ba1d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1695,6 +1729,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1707,8 +1742,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "c21e7ffe165ed982b6515aac1e99513237efcc7c2b612d7a8ba04583d4503938", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1776,6 +1812,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1788,8 +1825,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "e94003ae6b02fbb2872455161ed537c65c13bc49ed1bb4173dc950ca36fd4d9c", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1857,6 +1895,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1869,8 +1908,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "e51bf3386fd7135ef7a21eb495fb8a82eec138b68729b5f60e992c47739d7e6c", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -1938,6 +1978,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -1950,8 +1991,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "9f9498b2cba3f9cffc14f6f3c2b1bf5d49d175da485fdd28bdc7e33d84bc6fa5", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2019,6 +2061,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2031,8 +2074,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "0e1f1f36b5de227bf129c1b4ab9f9346b8e586f894dfe1ef8d110150c0ea4d03", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2100,6 +2144,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2112,8 +2157,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 190464, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x64x512u2_s3_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "d74ce52dbeb5c157047bf4c333ceca8bf2faaea6d453c6870e7b4e9a0bffbfc5", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2181,6 +2227,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2193,8 +2240,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "480e7f648ebd09b8238ab40897e1b4c5a5034d6d82df66e64912d999fbcbd6a0", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2262,6 +2310,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2274,8 +2323,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "cf2750f986199840ad6f9505db4791b98321bc81f0b097630eee5088d142f986", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2343,6 +2393,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2355,8 +2406,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "65981a268c85412e963e9eff70363151eb568d3bf5ab4177909ed36f98afa006", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2424,6 +2476,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2436,8 +2489,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 126976, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "32e40d5c9a6bac77cde65c0a7dc8c16621aa84d83a9cfaf7899aa5545e068530", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2505,6 +2559,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2517,8 +2572,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "9ddd33b56695cff3d8dd10c0fcaf9499be97858bcdca9bf4a4e5d6ba0d84c0eb", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2586,6 +2642,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2598,8 +2655,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "7d1f7c8a2e70a49a877399c5c3d2fc7df6f9cbaf2c0a0019c8f476485d618b6e", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2667,6 +2725,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2679,8 +2738,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, "9df00bde72fe7c36c09c2989183fccaaa90f7a4e79d6d0cce36c78049a270a85", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2748,6 +2808,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2760,8 +2821,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 480, "b61ee79c9c7595deee79157bd2d10de9d500b9c36d68a569b585d80ed854c35a", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2829,6 +2891,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2841,8 +2904,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 448, "1ff7246442e16863ccf377d88a7bee44e8dd96aeb16e6bdb4a6dd5f84b40ff84", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2910,6 +2974,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -2922,8 +2987,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, "759fceb6fdf0026cf171b5c5aa8468a18930170c8d52813b0c3d5c4ef825b6c6", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -2991,6 +3057,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3003,8 +3070,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "c10774753e0c8c08bf8c90aaf8a8f81d6e2dc0fda372beb895b5c3af7fc4ef31", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3072,6 +3140,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3084,8 +3153,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "80ae2cb645bb1ea1a885f7223dc75f1a12a14ec1e6519e8355c9d4af179c1e30", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3153,6 +3223,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3165,8 +3236,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "a8ebd0574dc30c1e06d4da89716e4c040109d5481718e9bd33bd2d919f933e53", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3234,6 +3306,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3246,8 +3319,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 121856, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "e4c4e89c846e3b3250dc10e30ac956d04d14957d738118b019e934890b00c108", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3315,6 +3389,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3327,8 +3402,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "881acb91bd5ff416df31d7e9b95206c9a7349f3e0f06d3313fa1c9e642fa88bf", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3396,6 +3472,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3408,8 +3485,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "ab9799b4898c64e9c1f13d351dd32a59e290486f4e3321863d691f4029b61c42", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3477,6 +3555,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3489,8 +3568,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "ffba44ffc7b841b0b9073057e8e210c2077091bc7f6139bb553d4a701daec667", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3558,6 +3638,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3570,8 +3651,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 97280, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "b1711c24e234aaf742a93d5bfef0dc2c311530929f95803918c54d45e12a99c2", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3639,6 +3721,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3651,8 +3734,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "0c81fd570d07a6321297366a9c9f63b48f918a4a4c7b5fdf6691a994da3d80e4", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3720,6 +3804,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3732,8 +3817,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "d7223efec141e24a2ed159dd0df9af8f753528628349fcd351d522a33e8a8276", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3801,6 +3887,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3813,8 +3900,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "8a965ae0938f555b7b0e73df5359c2b94c105d9c851f62946bafbf144f3c9ed9", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3882,6 +3970,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3894,8 +3983,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 123904, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "83578cefe6e21fc33064333510c1286de8420a883cca7a93c608c4e4951677aa", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -3963,6 +4053,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -3975,8 +4066,92 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a", 384, "f479ff64bf61dfc0bcba3d4d45903dc296010c55feade97734082aff2de5d0bd", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 0
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mNumBatches */ 2
+, /* mIsStaticBatch */ 1
+, /* mNumTokens */ 0
+, /* mRouteImpl */ batchedGemm::RouteImpl(0)
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mFusedAct */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsCastAWarps */ 0
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "c8f81b23270d852d3e05b6450d0ed40b0d909a9f379031448a6b1bee209394bc", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4044,6 +4219,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4056,8 +4232,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "2e7362e02b49aa744e37838af305803da9e132e73affcad605bd9495bf3902bc", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4125,6 +4302,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4137,8 +4315,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a", 384, "051562e78b1477ddef4292dbc040048ca3c85ca6dc269b3346a8cebb7775c254", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4191,7 +4370,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileK */ 128
-, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseUnrollLoop2xForMma */ 1
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseDeepSeekFp8 */ 1
@@ -4206,6 +4385,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4218,8 +4398,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_dynBatch_sm100a", 416, "976391756f5832221aba8f0097f93a0cd02e2cde58ce5a28bfad5fef6ac645c4", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4287,6 +4468,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4299,8 +4481,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_dynBatch_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a_cubin_len, 149504, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_dynBatch_sm100a", 384, "66c8412d8c3ebf58b73ec4554f40f5830904f5065d70692127004c0ab04e7330", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4368,6 +4551,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4380,89 +4564,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(0)
-, /* mBlockK */ -1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(1050629)
-, /* mDtypeB */ trtllm::gen::Dtype(1050629)
-, /* mDtypeC */ trtllm::gen::Dtype(1052672)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEnablesEarlyExit */ 0
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 8
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 32
-, /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mUseShuffledMatrixA */ 0
-, /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMmaOutput */ 1
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileK */ 128
-, /* mUseUnrollLoop2xForMma */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseDeepSeekFp8 */ 1
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
-, /* mSfReshapeFactor */ 1
-, /* mTileScheduler */ gemm::TileScheduler(0)
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mNumBatches */ 2
-, /* mIsStaticBatch */ 1
-, /* mNumTokens */ 0
-, /* mRouteImpl */ batchedGemm::RouteImpl(0)
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mFusedAct */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 256, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 256, "44bc9b7ab82a5c8d7766ea00c5b044139c11cd5e10d2ed63f8890046a693e6e7", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4530,6 +4634,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4542,8 +4647,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 224, "6db5429b6d878d9c6d271de05b9edaf402a36a8489e093fe79d7e78d7b0feee8", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4611,6 +4717,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4623,8 +4730,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, "06ed8ead992feb9910c535c2a1a91824861afdfd7e81d82bc4631746bd35ef34", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4692,6 +4800,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4704,8 +4813,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 256, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedP_bN_dynBatch_sm100a", 256, "df44cda477bd4710b32d020b9832a160202dd54c446ec1a0c35c8fa3a4ea7285", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4773,6 +4883,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4785,8 +4896,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_dynBatch_sm100a", 224, "3c781c5cde3e9cb98e53f1b1be7a527244d9250fca90d3b32af8f384d350deac", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4854,6 +4966,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4866,8 +4979,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, "7d0191cb8570a15064c853dd7be2578c81657e1a43fe42b24271c993d4b9ddea", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -4935,6 +5049,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -4947,8 +5062,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "de8e30b21e02c42bdc7778a538097d2afda49b07aaca23dca798dbbf7a757759", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5016,6 +5132,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5028,8 +5145,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "959d4374bd5435bde60198df8d5cf70e29aa9879b2f1314083b77c6c0381dc1f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5097,6 +5215,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5109,8 +5228,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "968c88380b4577288c7e88b0bed6eb93f1ad63c9b17dc999f3d7b7a5f4c2735b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5178,6 +5298,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5190,8 +5311,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 175104, "bmm_E2m1_E2m1E2m1_Fp32_t128x16x512u2_s4_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "d6179d09f734c89c251d182d6f9377b82f1c908f02ced331fc8c5e0caeebeb75", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5259,6 +5381,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5271,8 +5394,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "112967cd390a0800afadd8ee956782779787b2598986b00951ed464b7129b9cf", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5340,6 +5464,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5352,8 +5477,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "a2f3febed9a167985b958e95c0496e26d69563410da2fdfd5897d8ed7e96411b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5421,6 +5547,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5433,8 +5560,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "d463f269d50fd378c72f26faa8afa3af0b0eb2eb98aebfa369acda464d08bac1", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5502,6 +5630,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5514,8 +5643,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 194560, "bmm_E2m1_E2m1E2m1_Fp32_t128x32x512u2_s4_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "c00f39dadad7d89058bf39415e3182029d4d9ead814360c59287ed864e91de8b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5583,6 +5713,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5595,8 +5726,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "d055950053983b9acfc627db7d794e449607a78403c4938e7dd0ce35a5bdce86", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5664,6 +5796,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5676,8 +5809,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "49461402a3a0a2e6bef4ba252f922069f387951f88ffa6a17a585cf737b34082", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5745,6 +5879,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5757,8 +5892,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "1425eae206c8f26ae978ba006ca8c568aa93e558c38fbf9ae1a245412175232d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5826,6 +5962,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5838,8 +5975,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 178176, "bmm_E2m1_E2m1E2m1_Fp32_t128x64x256u2_s6_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "4e312fcf2ef735587987e0ddf18ff1fea51276b0b2da421bbaadd0e80aff44a4", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5907,6 +6045,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -5919,8 +6058,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "4e9f19a11006291683600c47b0817498fe3acd82bbd11b1783d4b677d827b3a2", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -5988,6 +6128,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6000,8 +6141,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "6354eed0dec928ba6e6c25b4b9d1c4385ae6f9ed9be908c82d87726ebd7317f8", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6069,6 +6211,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6081,8 +6224,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, "a98f41f0f45bafb35078da89ac4290a1a025b235c5e96bd9fd4ab0dd78bb8e1d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6150,6 +6294,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6162,8 +6307,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedP_bN_ldgsts_swiGlu_dynBatch_sm100a", 512, "ae447ae26810ef8447fe5c8ec183cae3fbd4206f29965f532cf0c89861464516", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6231,6 +6377,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6243,8 +6390,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 480, "4cdf70f8dca79f9a7cb001a2440c7ff01b1581d71d36f20032e76e5aaffcd01b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6312,6 +6460,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6324,8 +6473,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 165888, "bmm_E2m1_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, "af9f731cb3519d14d81b49896e0b4bf6f7452aaf6374a1bd62a0ea267c92d58f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6393,6 +6543,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6405,8 +6556,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "6df8273d9a887d374a2762c4df8210bdcf2fdf407b9944a904a0ebd576bf6487", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6474,6 +6626,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6486,8 +6639,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "63138b6c484124ae15eafeebcb041be45626060e93d0af7e87136ac74ba2ba4f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6555,6 +6709,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6567,8 +6722,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "e4607395041f8c0a0ad7bf84a783af9e3c82d5aec43ebda987a22ca7f3d774f1", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6636,6 +6792,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6648,8 +6805,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 119808, "bmm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s6_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "dd4254f835bd2ac7320c5ee7f108acf87d7c108918e8e7581f0551c78481ea23", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6717,6 +6875,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6729,8 +6888,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "92681b5f9d31cb04b18dad631032459aeb37e28f94a327e3251c1e97d678ade8", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6798,6 +6958,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6810,8 +6971,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "eabf7d440d758b2f8a63806443459b1278979022ed52365579b323e48e2bf2c5", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6879,6 +7041,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6891,8 +7054,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "eb11125d29cbd44870617b2be27b6cc134efb42dd2076e64780bdc3a80d9012f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -6960,6 +7124,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -6972,8 +7137,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 93184, "bmm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "67e8a00d8bca5f44f8b93f1b19c1ac0f181a7b757c44374f3411f44f8ec87b1f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7041,6 +7207,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7053,8 +7220,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "faebb1be2f8db4ae77f693a4f0a75dd3986d629009d71f929db24ee06a644c37", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7122,6 +7290,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7134,8 +7303,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "330e800b99311c05d0fdac89222b0c95c7f561474a0ca59cc1b620e01b246815", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7203,6 +7373,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7215,8 +7386,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "e3f90e1d12fa25dbf30d04e4433ac1a9d93fa328c02fd6d0d0f966726fb51344", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7284,6 +7456,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7296,8 +7469,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 115712, "bmm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "34e89d6b7ac2a8a35461f2778c6909ee231fa94c7955bbd7ffe5a6c714dd0e9a", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7365,6 +7539,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7377,170 +7552,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(0)
-, /* mBlockK */ -1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(1050629)
-, /* mDtypeB */ trtllm::gen::Dtype(1050629)
-, /* mDtypeC */ trtllm::gen::Dtype(1050629)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 8
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 32
-, /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
-, /* mNumStagesMma */ 4
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 2
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mUseShuffledMatrixA */ 0
-, /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMmaOutput */ 1
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileK */ 128
-, /* mUseUnrollLoop2xForMma */ 0
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseDeepSeekFp8 */ 1
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
-, /* mSfReshapeFactor */ 1
-, /* mTileScheduler */ gemm::TileScheduler(1)
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mNumBatches */ 2
-, /* mIsStaticBatch */ 0
-, /* mNumTokens */ 2
-, /* mRouteImpl */ batchedGemm::RouteImpl(1)
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mFusedAct */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mBiasType */ gemm::BiasType(0)
-, /* mBlockK */ -1
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
-, /* mDtypeA */ trtllm::gen::Dtype(1050629)
-, /* mDtypeB */ trtllm::gen::Dtype(1050629)
-, /* mDtypeC */ trtllm::gen::Dtype(1050629)
-, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
-, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
-, /* mEnablesEarlyExit */ 1
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueLdtmDps */ 16
-, /* mEpilogueLdtmBits */ 256
-, /* mEpilogueTileM */ 64
-, /* mEpilogueTileN */ 8
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistLoadTaskInit */ 1
-, /* mHoistMmaTaskTryWaits */ 1
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mLayoutA */ gemm::MatrixLayout(0)
-, /* mLayoutB */ gemm::MatrixLayout(0)
-, /* mM */ 256
-, /* mMmaK */ 32
-, /* mMmaKind */ trtllm::gen::MmaKind(2)
-, /* mMmaM */ 64
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumSlicesForSplitK */ 1
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 8
-, /* mNumStagesMma */ 2
-, /* mNumStagesMmaWithinWorkTile */ 2
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mPatchF2fp */ 0
-, /* mUseShuffledMatrixA */ 0
-, /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMmaOutput */ 1
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileK */ 128
-, /* mUseUnrollLoop2xForMma */ 0
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseDeepSeekFp8 */ 1
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
-, /* mSfReshapeFactor */ 1
-, /* mTileScheduler */ gemm::TileScheduler(0)
-, /* mActType */ gemmGatedAct::ActType(0)
-, /* mBatchedM */ {}
-, /* mBatchedN */ {}
-, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
-, /* mNumBatches */ 2
-, /* mIsStaticBatch */ 0
-, /* mNumTokens */ 2
-, /* mRouteImpl */ batchedGemm::RouteImpl(1)
-, /* mGridWaitForPrimaryRouting */ 1
-, /* mFusedAct */ 0
-, /* mNumRegsPerThreadNonEpilogueWarp */ 0
-, /* mNumRegsPerThreadEpilogueWarp */ 0
-, /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a", 384, "ff3bfed14ac5707da369899773c9a6e7b179b1f788d508ef4076542a41837475", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7608,6 +7622,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7620,8 +7635,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "a77de53ef185c6c9e576d904651f4730041804db5adc0a93d000f770a35ebb4c", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7674,7 +7690,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileK */ 128
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseDeepSeekFp8 */ 1
@@ -7689,6 +7705,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(1)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7701,8 +7718,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "e48f9da3611ec12be2ac1d17826b6a65a134a3e7f3c5101b4d1961ccf182ff29", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7755,7 +7773,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileK */ 128
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseDeepSeekFp8 */ 1
@@ -7770,6 +7788,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7782,8 +7801,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a", 384, "216e8f52552e5156288f85a82ddb9ee95acdeac42e24be8896889de9c14785cf", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7851,6 +7871,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7863,8 +7884,175 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 256, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedP_bN_ldgsts_dynBatch_sm100a", 448, "40de19e18295201f77feeca58ac8fc73a35a3a20e444dd68f3af137384555bcc", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 4
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 2
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 0
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(1)
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mNumBatches */ 2
+, /* mIsStaticBatch */ 0
+, /* mNumTokens */ 2
+, /* mRouteImpl */ batchedGemm::RouteImpl(1)
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mFusedAct */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsCastAWarps */ 0
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a_cubin_len, 149504, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s8_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_ldgsts_dynBatch_sm100a", 416, "9f4a2d439ef5608eb43e4683d8405e20a8231d5e05eb6105636f3b33bcdd94e3", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 1
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 64
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 1
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 1
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 64
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 8
+, /* mNumStagesMma */ 2
+, /* mNumStagesMmaWithinWorkTile */ 2
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 0
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 1
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+, /* mBatchedM */ {}
+, /* mBatchedN */ {}
+, /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
+, /* mNumBatches */ 2
+, /* mIsStaticBatch */ 0
+, /* mNumTokens */ 2
+, /* mRouteImpl */ batchedGemm::RouteImpl(1)
+, /* mGridWaitForPrimaryRouting */ 1
+, /* mFusedAct */ 0
+, /* mNumRegsPerThreadNonEpilogueWarp */ 0
+, /* mNumRegsPerThreadEpilogueWarp */ 0
+, /* mNumRegsCastAWarps */ 0
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 256, "1dff5de9e3c79ee18c9593162a23ff5f19b2074735c0c6d68dd979296ced197d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -7932,6 +8120,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -7944,8 +8133,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, "53c5fcfb99477cd81d8da10033146f17fb2a7b886d7824e412127c1ced2c1865", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8013,6 +8203,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8025,8 +8216,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 256, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_swiGlu_dynBatch_sm100a", 256, "fa0dd0b52f880b99f0e2bed59ca0ac46251adf291608aadf2cefd79886c8ce88", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8094,6 +8286,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8106,8 +8299,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 216064, "bmm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, "dd40bdc871a1fb89f5ce777833f49db5168e5a418ce9affd81779d4120148466", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8175,6 +8369,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8187,8 +8382,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Fp16_E2m1E2m1_Fp32_t128x8x512_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, "b4890c8cb043c6feebbd9cdc40fdb91314dd47d747e2e6ae18143a6b3b282450", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8256,6 +8452,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8268,8 +8465,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 166912, "bmm_Fp16_E2m1E2m1_Fp32_t128x8x512u2_s4_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 448, "a0caa4f383910792fdb1fc3e7db17b7f2a8025a2a9ff5be621485321ff0f433d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8337,6 +8535,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8349,8 +8548,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a", 384, "1a2c81269bc212521650e4be0a3b1442bcc8186ee39158339f40f1d2b6c0c474", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8418,6 +8618,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8430,8 +8631,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_dsFp8_schedS_bN_sm100a", 384, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a_cubin_len, 61440, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s3_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_bN_sm100a", 384, "0cd7c32083e34e9f66e3b2902771e25da1b092ccd76dde3410d0aa7dfa9ace45", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8499,6 +8701,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8511,8 +8714,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, "12334edbcc35771adaab31c1d686604741fe698dcb74af3126b78095f3c9c60f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8580,6 +8784,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8592,8 +8797,9 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
-{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
+{Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin, Bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a_cubin_len, 217088, "bmm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_sm100a", 224, "577604c36f4fe236191cf1b4977330568cc02c612e954fd3a7a2cd88b87e75c6", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
 , /* mBiasType */ gemm::BiasType(0)
 , /* mBlockK */ -1
 , /* mClusterDimX */ 1
@@ -8661,6 +8867,7 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
 , /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
 , /* mBatchedM */ {}
 , /* mBatchedN */ {}
 , /* mBatchMode */ batchedGemm::BatchedGemmOptions::BatchMode(1)
@@ -8673,7 +8880,8 @@ static const batchedGemm::BatchedGemmConfig tllmGenBatchedGemmList[] = {
 , /* mNumRegsPerThreadNonEpilogueWarp */ 0
 , /* mNumRegsPerThreadEpilogueWarp */ 0
 , /* mNumRegsCastAWarps */ 0
- }, gemm::SmVersion::Sm100a },
+, /* mUseTmaOobOpt */ 0
+ }, gemm::SmVersion::Sm100a},
 #endif // EXCLUDE_SM_100
 };
 // clang-format on
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h
index 0ebe9a94c8..79b96109c1 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParams.h
@@ -18,11 +18,19 @@
 
 #include "trtllm/gen/CommonUtils.h"
 #include "trtllm/gen/SfLayoutDecl.h"
+#include <stdexcept>
 
 #include "BatchedGemmEnums.h"
 #include "Enums.h"
 #include "TmaDescriptor.h"
 
+// NOTE: keep this code dependency free. It has to be included by the device code and has to be
+// compilable with NVRTC.
+#include "KernelParamsDecl.h"
+
+namespace batchedGemm
+{
+
 namespace batchedGemm
 {
 
@@ -41,976 +49,569 @@ namespace tg = trtllm::gen;
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-struct KernelParams
+namespace KernelParamsSetup
 {
 #ifdef TLLM_ENABLE_CUDA
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // BatchedGemm parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
 
-    // Maximum number of CTAs
-    static constexpr int MaxNumCtas = 2048;
+enum class MatrixType
+{
+    MatrixA = 0,
+    MatrixB,
+    MatrixC
+};
 
-    // TMA descriptor for A.
-    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAbc.
-    //
-    // If batchM:
-    //    Logical shape is [sum(divUpMul(M[bi], tileM) for bi in B), K].
-    //    Logical strides are [K, 1].
-    //    Tile box shape is [tileM, tileK].
-    //    Tile box strides are [tileK, 1].
-    //
-    // If batchN:
-    //    If layoutA is MatrixLayout::MajorK
-    //       Logical shape is [B, divUpMul(M, tileM), K].
-    //       Logical strides are [divUpMul(M, tileM) * K, K, 1].
-    //       Tile box shape is [1, tileM, tileK].
-    //       Tile box strides are [0, tileK, 1].
-    //    If layoutA is MatrixLayout::Mn
-    //       Logical shape is [B, K, divUpMul(M, tileM)].
-    //       Logical strides are [K * divUpMul(M, tileM), divUpMul(M, tileM), 1].
-    //       Tile box shape is [1, tileK, tileM].
-    //       Tile box strides are [0, tileM, 1].
-    //    If layoutA is MatrixLayout::BlockMajorK
-    //       Logical shape is [B, K / blockK, divUpMul(M, tileM), blockK].
-    //       Logical strides are [K * divUpMul(M, tileM),  divUpMul(M, tileM) * blockK, blockK, 1].
-    //       Tile box shape is [1, tileK / min(blockK, tileK), tileM, min(blockK, tileK)].
-    //       Tile box strides are [0, tileM * min(blockK, tileK), min(blockK, tileK), 1].
-    //       where blockK is 128B.
-    //
-    // Dtype is set from options.mDtypeA.
-    CUtensorMap tmaA[1];
+//////////////////////////////////////////////////////////////////////////////////////////////////
+//
+// Utility functions.
+//
+//////////////////////////////////////////////////////////////////////////////////////////////////
 
-    // TMA descriptor for B.
-    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAbc.
-    //
-    // If batchM:
-    //    If layoutB is MatrixLayout::MajorK
-    //       Logical shape is [B, divUpMul(N, tileN), K].
-    //       Logical strides are [divUpMul(N, tileN) * K, K, 1].
-    //       Tile box shape is [1, tileN, tileK].
-    //       Tile box strides are [0, tileK, 1].
-    //    If layoutB is MatrixLayout::MajorMn
-    //       Logical shape is [B, K, divUpMul(N, tileN)].
-    //       Logical strides are [K * divUpMul(N, tileN), divUpMul(N, tileN), 1].
-    //       Tile box shape is [1, tileK, tileN].
-    //       Tile box strides are [0, tileN, 1].
-    //    If layoutB is MatrixLayout::BlockMajorK
-    //       Logical shape is [B, K / blockK, divUpMul(N, tileN), blockK].
-    //       Logical strides are [K * divUpMul(N, tileN),  divUpMul(N, tileN) * blockK, blockK, 1].
-    //       Tile box shape is [1, tileK / min(blockK, tileK), tileN, min(blockK, tileK)].
-    //       Tile box strides are [0, tileN * min(blockK, tileK), min(blockK, tileK), 1].
-    //       where blockK is 128B.
-    //
-    // If batchN:
-    //    Logical shape is [sum(divUpMul(N[bi], tileN) for bi in B), K].
-    //    Logical strides are [K, 1].
-    //    Tile box shape is [tileN, tileK].
-    //    Tile box strides are [tileK, 1].
-    //
-    // Dtype is set from options.mDtypeB.
-    CUtensorMap tmaB[1];
+template <typename BatchedGemmOptions>
+bool useTmaOobOptA(BatchedGemmOptions const& options)
+{
+    return options.mBatchMode == BatchedGemmOptions::BatchMode::BatchM && doesRouteImplUseNoRoute(options.mRouteImpl)
+        && options.mUseTmaOobOpt;
+}
 
-    // TMA descriptor for C, (when useTmaStore is true)
-    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAbc.
-    //
-    // If batchM:
-    //    Logical shape is [sum(divUpMul(M[bi], tileM) for bi in B), N].
-    //    Logical strides are [N, 1].
-    //    Tile box shape is [epilogueTileM, epilogueTileN].
-    //    Tile box strides are [epilogueTileN, 1].
-    //
-    // If batchN:
-    //    Logical shape is [sum(divUpMul(N[bi], tileN) for bi in B), M].
-    //    Logical strides are [M, 1].
-    //    Tile box shape is [epilogueTileN, epilogueTileM].
-    //    Tile box strides are [epilogueTileM, 1].
-    //
-    // Dtype is set from options.mDtypeC.
-    CUtensorMap tmaC[1];
+//////////////////////////////////////////////////////////////////////////////////////////////////
 
-    // TMA descriptor for the block scaling factors for A, for MxFp{4,8} and NvFp4 formats.
-    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideSfAb.
-    // The layout of scaling factors for A is always R128c4.
-    //
-    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
-    // M must be a multiple of 128.
-    // K must be a multiple of 4P.
-    // The "logical" shape is: [paddedM, K / P], where paddedM is
-    // sum(divUpMul(M[bi], tileM) for bi in B) if batchM,
-    // otherwise divUpMul(M, TileM) * B.
-    // The R128c4 layout is: [paddedM / 128, K / P / 4, 512].
-    // The shape we use for TMA is: [paddedM / 128, K / P / 4, 2, 256].
-    //
-    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
-    CUtensorMap tmaSfA[1];
+template <typename BatchedGemmOptions>
+bool useTmaOobOptB(BatchedGemmOptions const& options)
+{
+    return options.mBatchMode == BatchedGemmOptions::BatchMode::BatchN && doesRouteImplUseNoRoute(options.mRouteImpl)
+        && options.mUseTmaOobOpt;
+}
 
-    // TMA descriptor for the block scaling factors for B, for MxFp{4,8} and NvFp4 formats.
-    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideSfAb.
-    // The layout of block scaling factors for B is controlled by options.mSfLayoutB.
-    //
-    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
-    // The "logical" shape is: [paddedN, K / 16]
-    // where paddedN is sum(divUpMul(N[bi], tileN) for bi in B) if batchN,
-    // otherwise divUpMul(N, TileN) * B.
-    //
-    // If the layout is R128c4,
-    //    paddedN must be a multiple of 128.
-    //    K must be a multiple of 4P.
-    //    The R128c4 layout is: [paddedN / 128, K / P / 4, 512]
-    //    The shape we use for TMA is: [paddedN / 128, K / P / 4, 2, 256]
-    //
-    // If the layout is R8c4,
-    //    paddedN must be a multiple of 8.
-    //    K must be a multiple of 4P.
-    //    The R8c4 layout is: [paddedN / 8, K / P / 4, 32]
-    //    The shape we use for TMA is: [paddedN / 8, K / P / 4 / repeats, repeats * 32]
-    //    where repeats = min(tileK / P / 4, 8)
-    //
-    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
-    CUtensorMap tmaSfB[1];
+//////////////////////////////////////////////////////////////////////////////////////////////////
 
-    // The input matrix A.
-    // If (routeAct == true && batchM), the shape is [M, K]. tmaA is not used.
-    // Otherwise, check layout of tmaA to see the shape and strides.
-    void const* ptrA{nullptr};
+template <typename BatchedGemmOptions>
+bool useTmaOobOptC(BatchedGemmOptions const& options)
+{
+    return options.mUseTmaStore && options.mUseTmaOobOpt;
+}
 
-    // The stride for matrix A in bytes.
-    // Equals to K * dtypeGetNumBits(dtypeA) / 8.
-    uint64_t strideInBytesA;
+//////////////////////////////////////////////////////////////////////////////////////////////////
 
-    // The input matrix B.
-    // If (routeAct == true && batchN), the shape is [N, K]. tmaB is not used.
-    // Otherwise, check layout of tmaB to see the shape and strides.
-    void const* ptrB{nullptr};
-    // The stride for matrix B in bytes.
-    // Equals to K * dtypeGetNumBits(dtypeB) / 8.
-    uint64_t strideInBytesB;
+// Create the TMA shape/stride for A/B/C.
+template <class GemmOptions>
+static auto makeTmaShapeStrideAbc(
+    GemmOptions const& options, int mM, int mN, int mK, int tileM, int tileN, int tileK, MatrixType matrixType)
+{
+    // Weights matrix is A if we transpose the output of MMA (to have it M-major).
+    // Otherwise, it is B, when the output of MMA is K-major.
+    bool const isWeights = (matrixType == MatrixType::MatrixA && options.mTransposeMmaOutput)
+        || (matrixType == MatrixType::MatrixB && !options.mTransposeMmaOutput);
 
-    // The output matrix C. Check "logical" layout of tmaC to see the shape and strides.
-    void* ptrC{nullptr};
+    // Whether to use TMA OOB trick to block out padded dummy tokens and saving BW whenever no routing
+    // is involved. It applies to batchM and matrixA, or batchN and matrixB, or any case for matrixC.
+    bool const useTmaOobOpt = matrixType == MatrixType::MatrixA ? useTmaOobOptA(options)
+        : matrixType == MatrixType::MatrixB                     ? useTmaOobOptB(options)
+        : matrixType == MatrixType::MatrixC                     ? useTmaOobOptC(options)
+                                                                : false;
 
-    // Inputs and output are MxFp{4,8}, Fp8, NvFp4.
-    // The scaling factors to apply to the output - can be used to incorporate input scaling factors
-    // as described below: C = SEncC * act(SDecA * SDecB * A * Bl) . (SDecA * SDecB * A * Br)
-    //  -> ScaleGate = SDecA * SDecB
-    //     ScaleC    = SDecA * SDecB * SEncC
-    //
-    // Only the inputs are MxFp{4,8}, Fp8, NvFp4.
-    // C = act(SDecA * SDecB * A * Bl) . (SDecA * SDecB * A * Br)
-    //  -> ScaleGate = SDecA * SDecB
-    //     ScaleC    = SDecA * SDecB
-    //
-    // Only the output is MxFp{4,8}, Fp8, NvFp4.
-    // C = SEncC * act(A * Bl) . (A * Br)
-    //  -> ScaleGate = 1
-    //     ScaleC    = SEncC
-    //
-    // The output tensor scaling factor for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
-    // TensorRT-LLM API requires a scaling factor on the device.
-    // Shape is [B]. One scaling factor per tensor in batch.
-    float const* ptrScaleC{nullptr};
+    // The outer dimension.
+    auto numTokens = (matrixType == MatrixType::MatrixA || matrixType == MatrixType::MatrixC) ? mM : mN;
+    // The outer dimension tile size.
+    auto ctaTileNumTokens = (matrixType == MatrixType::MatrixA || matrixType == MatrixType::MatrixC) ? tileM : tileN;
+    // The outer dimension of TMA box shape.
+    auto tileNumTokens = (matrixType == MatrixType::MatrixC) ? options.mEpilogueTileM : ctaTileNumTokens;
 
-    // The output gate scale for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
-    // TensorRT-LLM API requires a scaling factor on the device.
-    // Shape is [B]. One scaling factor per tensor in batch.
-    float const* ptrScaleGate{nullptr};
+    // The inner dimension.
+    auto hiddenSize = (matrixType == MatrixType::MatrixC) ? mN : mK;
+    // The inner dimension tile size.
+    auto ctaTileHiddenSize = (matrixType == MatrixType::MatrixC) ? tileN : tileK;
+    // The inner dimension of TMA box shape.
+    auto tileHiddenSize = (matrixType == MatrixType::MatrixC) ? options.mEpilogueTileN : ctaTileHiddenSize;
 
-    // The alpha and beta for SwiGlu.
-    // Shape is [B]. One alpha and one beta per tensor in batch.
-    // Alpha is 1.f if nullptr.
-    // Beta is 0.f if nullptr.
-    float const* ptrSwiGluAlpha{nullptr};
-    float const* ptrSwiGluBeta{nullptr};
-
-    // The K dimension. It is the hidden dimension of the input matrices.
-    int32_t k;
-
-    // The non-batched dimension.
-    // It is N if batchM, otherwise M.
-    int32_t nm;
-
-    // Tile stride per batch for the non-batched dimension.
-    // It is N / TileN if batchM, otherwise M / TileM.
-    int32_t tileStridePerBatch;
-
-    // TODO get rid of that.
-    // DeepSeek FP8 scaling factors for C
-    float* ptrDqSfsC{nullptr};
-
-    // The block scaling factors for A.
-    // The pointer must always be set regardless of the quantization recipe.
-    // If (routeAct == true && batchM), the shape is [M, K / 16]. tmaSfA is not used.
-    //    For the layout (r128c4), see below.
-    // Otherwise,
-    //    If MxFp{4,8} and NvFp4 formats are used,
-    //      check the "logical" layout of tmaSfA to see the shape and strides.
-    //      The dtype is Dtype::E4m3.
-    //
-    //    If DeepSeek FP8 quantization recipe is used,
-    //      If batchM:
-    //        The shape is [K / 128, paddedM],
-    //        where paddedM is sum(divUpMul(M[bi], tileM) for bi in B).
-    //      If batchN:
-    //        The shape is [M / 128, K / 128],
-    //      The rightmost dimension is contiguous in memory.
-    //      The dtype is Dtype::Float32.
-    void const* ptrSfA{nullptr};
-
-    // The block scaling factors for B.
-    // The pointer must always be set regardless of the quantization recipe.
-    // If (routeAct == true && batchN), the shape is [N, K / 16]. tmaSfB is not used.
-    //    For the layout (r128c4, r8c4), see below.
-    // Otherwise,
-    //    If MxFp{4,8} and NvFp4 formats are used,
-    //      check the layout of tmaSfB to see the shape and strides.
-    //      The dtype is Dtype::E4m3.
-    //
-    //    If DeepSeek FP8 quantization recipe is used,
-    //      If batchM:
-    //        The shape is [N / 128, K / 128],
-    //      If batchN:
-    //        The shape is [K / 128, paddedN],
-    //        where paddedN is sum(divUpMul(N[bi], tileN) for bi in B).
-    //      The rightmost dimension is contiguous in memory.
-    //      The dtype is Dtype::Float32.
-    void const* ptrSfB{nullptr};
-
-    // The per-token scaling factors from scale A.
-    //
-    // This is used for either:
-    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
-    //   * When the routing scales are applied to the input activations (only when output is not
-    //   transposed). The dtype is Dtype::Bfloat16
-    //
-    // if (batchM (A is activations)):
-    //     Logical shape is [sum(divUpMul(M[bi], tileM) for bi in B)]
-    //
-    // if (batchN (A is weights)):
-    //     Logical shape is [B, divUpMul(M, tileM)]
-    //
-    void const* ptrPerTokenSfA{nullptr};
-
-    // The per-token scaling factors from scale B.
-    //
-    // This is used for either:
-    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
-    //   * When the routing scales are applied to the input activations (only when output is
-    //   transposed). The dtype is Dtype::Bfloat16
-    //
-    // if (batchM (B is weights)):
-    //     Logical shape is [B, divUpMul(N, tileN)]
-    //
-    // if (batchN (B is activations)):
-    //     Logical shape is [sum(divUpMul(N[bi], tileN) for bi in B)]
-    void const* ptrPerTokenSfB{nullptr};
-
-    // The bias applied after the GEMM and before the activation function.
-    // The bias is applied before applying the global scaling factor. I.e.
-    // C = act(A * B + bias') * scaleC
-    // scaleC = dequantA * dequantB * quantC
-    // Thus, the bias' = bias / (dequantA * dequantB), where the bias is the original bias.
-    //
-    // If batchM, BiasType must be N, and bias shape is [B, N].
-    // The bias is broadcasted along the M dimension.
-    //
-    // If batchNm BiasType must be M, and bias shape is [B, M].
-    // The bias is broadcasted along the N dimension.
-    //
-    // The dtype is float32.
-    void const* ptrBias{nullptr};
-
-    // The output block scaling factors for C.
-    //
-    // If MxFp{4,8} and NvFp4 formats are used,
-    // The "logical" shape is:
-    //    if batchM: [paddedM, N / 16]
-    //    if batchN: [paddedN, M / 16]
-    // where paddedM is sum(divUpMul(M[bi], tileM) for bi in B),
-    // where paddedN is sum(divUpMul(N[bi], tileN) for bi in B).
-    //
-    // If the layout is R128c4,
-    //    paddedOuter must be a multiple of 128.
-    //    inner must be a multiple of 64.
-    //    The R128c4 layout is: [paddedOuter / 128, inner / 16 / 4, 512]
-    //    The shape we use for TMA is: [paddedOuter / 128, inner / 16 / 4, 2, 256]
-    //    where inner = N if batchM, otherwise M.
-    //    where paddedOuter = paddedM if batchM, otherwise paddedN.
-    //
-    // If the layout is R8c4,
-    //    paddedOuter must be a multiple of 8.
-    //    inner must be a multiple of 64.
-    //    The R8c4 layout is: [paddedOuter / 8, inner / 16 / 4, 32]
-    //    The shape we use for TMA is: [paddedOuter / 8, inner / 16 / 4 / repeats, repeats * 32]
-    //    where repeats = min(tileInner / 16 / 4, 8),
-    //    where tileInner = tileN if batchM, otherwise tileM,
-    //    where paddedOuter = paddedM if batchM, otherwise paddedN.
-    //    where inner = N if batchM, otherwise M.
-    //
-    // The dtype is Dtype::E4m3.
-    //
-    // If DeepSeek FP8 quantization recipe is used,
-    // If batchM:
-    //   The shape is [N / 128, paddedM],
-    //   where paddedM is sum(divUpMul(M[bi], tileM) for bi in B).
-    // If batchN:
-    //   The shape is [M / 128, paddedN],
-    //   where paddedN is sum(divUpMul(N[bi], tileN) for bi in B).
-    // The rightmost dimension is contiguous in memory.
-    // The dtype is Dtype::Float32.
-    void* ptrSfC{nullptr};
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // Routing activations parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    // These params are used when the kernel is configured with -routeAct true.
-    // The inputs are not padded, but the outputs are padded to divUpMul(M[bi], tileM) for batchM or
-    // divUpMul(N[bi], tileN) for batchN.
-    // If -routeAct is false, the params are not used and should be set to zero.
-
-    // The routeMap for the input tokens.
-    // Map of expanded token index (counting the previous padded tokens) to the batch index
-    // the token belongs to.
-    // The shape is
-    // [sum(divUpMul(M[bi], tileM) for bi in B)] for batchM
-    // [sum(divUpMul(N[bi], tileN) for bi in B)] for batchN
-    // The dtype is int32_t.
-    //
-    // There are 3 tokens [0, 1, 2] such that [0, 1] belong to batch [B0] and [2] to batch [B1].
-    // Let's assume that the padded size is 4.
-    //
-    // The expanded indices for tokens [0, 1, 2] are:
-    // expandedIdx[0] = 0
-    // expandedIdx[1] = 1
-    // expandedIdx[2] = divUpMul(2, 4) + 0 = 4
-    //
-    // The route map is [B0, B0, X, X, B1, X, X, X] where X could be any value.
-    int32_t const* ptrRouteMap{nullptr};
-
-    // Total number of unpadded inputs
-    int32_t numTokens;
-
-    // Total number of batches
-    int32_t numBatches;
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // Batching information parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-
-    // In some cases, some CTAs must early-exit. E.g. when the grid size is set statically, but the
-    // actual workload is decided at runtime. This element on the device contains the number of CTAs
-    // that do not early-exit. The number corresponds to the X dim of the grid when the output is not
-    // transposed (i.e. batchM). To the Y dim, otherwise.
-    // The size is 1 and the dtype is int32_t.
-    // Used if isStaticBatch == false, otherwise set to nullptr.
-    // The pointer points to a scalar and the dtype is int32_t. The pointed value must be >= 0.
-    int32_t const* ptrNumNonExitingCtas{nullptr};
-
-    // Pointer to total number of padded tokens.
-    // Computed as
-    // int32_t totalNumPaddedTokens{0};
-    // for (int bi = 0; bi < options.mNumBatches; bi++) {
-    //   totalNumPaddedTokens += batchM ? divUpMul(options.mBatchedM[bi], options.mTileM)
-    //                                  : divUpMul(options.mBatchedN[bi], options.mTileN);
-    // }
-    // The size is 1 and the dtype is int32_t.
-    // If isStaticBatch == true, ptrTotalNumPaddedTokens should be set to nullptr and
-    // totalNumPaddedTokens is used.
-    int32_t const* ptrTotalNumPaddedTokens{nullptr};
-
-    // Pointer to the map from the CTA index (in X/Y dim) to the batch index.
-    // Maps CTA index in batch dim (i.e. blockDim.x if batchM, otherwise blockDim.y)
-    // to batch index.
-    // E.g. with listM = 128,255,32 and tileM = 128, should be equal to
-    // ctaIdxXyToBatchIdx = [0, 1, 1, 2]
-    // If isStaticBatch == true, ptrCtaIdxXyToBatchIdx should be set to nullptr and ctaIdxXyToBatchIdx
-    // is used.
-    int32_t const* ptrCtaIdxXyToBatchIdx{nullptr};
-
-    // Pointer from the CTA index X/Y to the expanded tile index where the expanded tile index is
-    // computed as:
-    //
-    // int expandedIdx = 0;
-    // for (int bi = 0; bi < batchIdx-1; ++bi) {
-    //   expandIdx = divUpMul(numTokens[bi], TileM/N);
-    // }
-    // expandIdx += <index in the batch>
-    // E.g. with numTokens = [128,255,32] and tileM = 128, should be equal to
-    // ptrCtaIdxXyToMnLimit = [128, 256, 383, 416]
-    int32_t const* ptrCtaIdxXyToMnLimit{nullptr};
-
-    // Total number of padded tokens - used as the stride for the activation and C scaling factors.
-    // Check ptrTotalNumPaddedTokens to see how it is computed.
-    // If isStaticBatch == true, totalNumPaddedTokens is used, otherwise ptrTotalNumPaddedTokens.
-    int32_t totalNumPaddedTokens;
-
-    // A map from CTA index X/Y to batch index.
-    // Check ptrCtaIdxXyToBatchIdx to see how it is computed.
-    // If isStaticBatch == true, ctaIdxXyToBatchIdx is used, otherwise ptrCtaIdxXyToBatchIdx.
-    int32_t ctaIdxXyToBatchIdx[MaxNumCtas];
-
-    // **Expanded** limits for the batched dimension:
-    //   tile * ctaIdxXyToTileIdxMn[ctaIdxXy] -> ctaIdxXyToMnLimit[ctaIdxXy]
-    // Check ptrCtaIdxXyToMnLimit to see how it is computed.
-    // If isStaticBatch == true, ctaIdxXyToMnLimit is used, otherwise ptrCtaIdxXyToMnLimit.
-    int32_t ctaIdxXyToMnLimit[MaxNumCtas];
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // All-reduce parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-
-    // The rank id of the current device in the multi-gpu space.
-    int rank;
-    // The number of peer devices in tensor-parallel group.
-    int tpGrpSize;
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // GatedAct parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-
-    // Pointer for partial row max for DeepSeek FP8 recipe.
-    // This is temporary storage for the row max results.
-    // If batchM, the shape is [2, totalNumPaddedTokens, N / 128] and the dtype is float.
-    // Otherwise, the shape is [2, totalNumPaddedTokens, M / 128] and the dtype is float.
-    float* ptrPartialRowMax{nullptr};
-
-    // Flags in global memory that sync on "exit" for row max computation.
-    // The shape is [numTilesM * numTilesN / 2] and the dtype is uint32_t, where
-    // if batchM,
-    // numTilesM = divUp(totalNumPaddedTokens, tileM).
-    // numTilesN = divUp(N, tileN).
-    // Otherwise,
-    // numTilesM = divUp(M, tileM).
-    // numTilesN = divUp(totalNumPaddedTokens, tileN).
-    //
-    // The memory must be set to 0 before the kernel launch.
-    uint32_t* ptrRowMaxCompletionBars{nullptr};
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // Member functions.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    enum class MatrixType
+    // Swap matrix C sizes if output is transposed.
+    if (matrixType == MatrixType::MatrixC && options.mTransposeMmaOutput)
     {
-        MatrixA = 0,
-        MatrixB,
-        MatrixC
-    };
-
-    // Create the TMA shape/stride for A/B/C.
-    template <class GemmOptions>
-    static auto makeTmaShapeStrideAbc(
-        GemmOptions const& options, int mM, int mN, int mK, int tileM, int tileN, int tileK, MatrixType matrixType)
-    {
-        // Weights matrix is A if we transpose the output of MMA (to have it M-major).
-        // Otherwise, it is B, when the output of MMA is K-major.
-        bool const isWeights = (matrixType == MatrixType::MatrixA && options.mTransposeMmaOutput)
-            || (matrixType == MatrixType::MatrixB && !options.mTransposeMmaOutput);
-
-        // The outer dimension.
-        auto numTokens = (matrixType == MatrixType::MatrixA || matrixType == MatrixType::MatrixC) ? mM : mN;
-        // The outer dimension tile size.
-        auto tileNumTokens = (matrixType == MatrixType::MatrixC) ? options.mEpilogueTileM
-            : (matrixType == MatrixType::MatrixA)                ? tileM
-                                                                 : tileN;
-        // The inner dimension.
-        auto hiddenSize = (matrixType == MatrixType::MatrixC) ? mN : mK;
-        // The inner dimension tile size.
-        auto tileHiddenSize = (matrixType == MatrixType::MatrixC) ? options.mEpilogueTileN : tileK;
-
-        // Swap matrix C sizes if output is transpose
-        if (matrixType == MatrixType::MatrixC && options.mTransposeMmaOutput)
-        {
-            numTokens = mN;
-            hiddenSize = mM;
-            tileNumTokens = options.mEpilogueTileN;
-            tileHiddenSize = options.mEpilogueTileM;
-        }
-
-        // For a fused activation kernel, the hidden size of output is halved. TODO: That's true for
-        // gated activations but not regular activations.
-        if (options.mFusedAct)
-        {
-            if (matrixType == MatrixType::MatrixC)
-            {
-                hiddenSize /= 2;
-                tileHiddenSize /= 2;
-            }
-        }
-
-        // The cute tensor shape for A/B: (numTokens, hiddenSize).
-        // Note that TMA descriptor expects the first dimension's stride to be
-        // 1, so swap the first two dimension so that the hiddenSize dimension comes first.
-        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens)};
-        // If the matrix is a weights matrix, we use 3D logical shape for it (B, M, K) or (B, N, K).
-        // Ativations matrix is 2D (sum(divUpMul(M[bi], tileM) for bi in B), K).
-        if (isWeights)
-        {
-            shape.push_back(static_cast<uint64_t>(options.mNumBatches));
-        }
-
-        // Assemble the stride (strideTokens, 1).
-        // Swap the first two dimension as mentioned before.
-        auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(hiddenSize)};
-        if (isWeights)
-        {
-            stride.push_back(static_cast<uint64_t>(hiddenSize * numTokens));
-        }
-
-        // Assemble the box shape
-        std::vector<int32_t> tileShape = {tileHiddenSize, tileNumTokens};
-
-        // Alternate layouts do not apply to matrixC
-        if (matrixType != MatrixType::MatrixC)
-        {
-            gemm::MatrixLayout layout = (matrixType == MatrixType::MatrixA) ? options.mLayoutA : options.mLayoutB;
-            // Note, only the weights support non MajorK layouts
-            if (layout == gemm::MatrixLayout::MajorMn)
-            {
-                // Apply transpose if necessary
-                std::swap(shape[0], shape[1]);
-                stride[1] = numTokens;
-                std::swap(tileShape[0], tileShape[1]);
-            }
-            else if (layout == gemm::MatrixLayout::BlockMajorK)
-            {
-                // Set shapes based on blocking layout
-                shape = {static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens),
-                    static_cast<uint64_t>(mK / options.mBlockK), static_cast<uint64_t>(options.mNumBatches)};
-                stride = {1, static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens * options.mBlockK),
-                    static_cast<uint64_t>(hiddenSize * numTokens)};
-
-                // If blockK > tileK, then the inner most box size will be based on the tile
-                int32_t const tileBlockK = std::min(options.mBlockK, tileHiddenSize);
-                tileShape = {tileBlockK, tileNumTokens, tileHiddenSize / tileBlockK};
-            }
-        }
-
-        return std::make_tuple(shape, stride, tileShape);
+        std::swap(numTokens, hiddenSize);
+        std::swap(ctaTileNumTokens, ctaTileHiddenSize);
+        std::swap(tileNumTokens, tileHiddenSize);
     }
 
-    // Create the TMA shape/stride for A/B block scaling factors.
-    static auto makeTmaShapeStrideSfAb(int mM, int mN, int mK, MatrixType matrixType, int tileM, int tileN, int tileK,
-        tg::Dtype dtypeElt, tg::SfLayout layout, int sfReshapeFactor)
+    // For a fused activation kernel, the hidden size of output is halved. TODO: That's true for
+    // gated activations but not regular activations.
+    if (options.mFusedAct && matrixType == MatrixType::MatrixC)
     {
-
-        // The outer dimension.
-        auto numTokens = matrixType == MatrixType::MatrixA ? mM : mN;
-        // The inner dimension.
-        auto hiddenSize = mK;
-        // The outer tile dimension.
-        auto numTokensPerTile = matrixType == MatrixType::MatrixA ? tileM : tileN;
-        // The inner tile dimension.
-        auto hiddenSizePerTile = tileK;
-        // Number of elements per scaling factor.
-        const int32_t numEltsPerSf = (dtypeElt == tg::Dtype::E2m1) ? 16 : 32;
-
-        switch (layout)
-        {
-        case tg::SfLayout::R128c4:
-        {
-            // The scaling factor tensor packs 128x4 tiles into contiguous 512B blocks.
-            // The 512B block maps to a 32x16B (32x128b) block in TMEM.
-            // See https://nvbugspro.nvidia.com/bug/4165523
-            //
-            // Additionally, we have to meet constraints of TMA that the box dimensions are less
-            // than 256 and boxDim[0] is a multiple of 16B.
-            //
-            // The "logical" tensor is:      [outer,       inner / numEltsPerSf]
-            // The aforementioned format is: [outer / 128, inner / numEltsPerSf / 4,    512]
-            // The shape we use for TMA is:  [outer / 128, inner / numEltsPerSf / 4, 2, 256]
-
-            auto shape = std::vector<uint64_t>{256, 2, static_cast<uint64_t>(ceilDiv(hiddenSize, numEltsPerSf * 4)),
-                static_cast<uint64_t>(ceilDiv(numTokens, 128))};
-
-            std::vector<uint64_t> stride(shape.size());
-            stride[0] = 1;
-            for (size_t i = 1; i < shape.size(); i++)
-            {
-                stride[i] = shape[i - 1] * stride[i - 1];
-            }
-
-            auto tileShapes
-                = std::vector<uint32_t>{256, 2, static_cast<uint32_t>(ceilDiv(hiddenSizePerTile, numEltsPerSf * 4)),
-                    static_cast<uint32_t>(ceilDiv(numTokensPerTile, 128))};
-
-            return std::make_tuple(shape, stride, tileShapes);
-        }
-
-        case tg::SfLayout::R8c4:
-        {
-            // The scaling factor tensor packs 8x4 tiles into contiguous 32B blocks.
-            //
-            // As the inner dimension (k) is often a multiple of the tile size, we can reshape to use
-            // fewer read requests, if the tile dimensions allow. It does not reduce the number of
-            // instructions.
-            //
-            // I.e., let's define r = min(⌈hiddenSizePerTile / (numEltsPerSf * 4)⌉, 8)
-            //
-            // The "logical" tensor is: [outer,      inner / numEltsPerSf]
-            // The 8x4 SF layout is:    [⌈outer / 8⌉, inner / (4 * numEltsPerSf), 32]
-            // The TMA tensor shape is: [⌈outer / 8⌉, inner / (4 * numEltsPerSf * r), r * 32]
-            //
-            // The caveat of NumRepeats>1 is we must pad the hidden dimension of SF to multiples of
-            // NumRepeats * numEltsPerSf * 4.
-
-            // Detect if the supplied factor is power of 2. E.g., 0b0100 and (0b0100 - 1) == 0b0000.
-            int const r = sfReshapeFactor;
-            if (r > 0 && (r & (r - 1)) != 0)
-            {
-                throw std::runtime_error(
-                    "mSfReshapeFactor must be positive and a power of 2. Found " + std::to_string(r));
-            }
-
-            // Sanitize number of repeats so it doesn't exceed the dimension.
-            int const repeats = std::min(ceilDiv(hiddenSizePerTile, numEltsPerSf * 4), r);
-
-            // Detect if the input hidden size K is a multiple of the repeats.
-            if (ceilDiv(hiddenSize, numEltsPerSf * 4) % repeats != 0)
-            {
-                throw std::runtime_error("SF hiddenSize K (" + std::to_string(ceilDiv(hiddenSize, numEltsPerSf * 4))
-                    + ") must be a multiple of repeats (" + std::to_string(repeats) + ")");
-            }
-
-            auto shape = std::vector<uint64_t>{static_cast<uint64_t>(repeats * 32),
-                static_cast<uint64_t>(ceilDiv(hiddenSize, numEltsPerSf * 4 * repeats)),
-                static_cast<uint64_t>(ceilDiv(numTokens, 8))};
-
-            std::vector<uint64_t> stride(shape.size());
-            stride[0] = 1;
-            for (size_t i = 1; i < shape.size(); i++)
-            {
-                stride[i] = shape[i - 1] * stride[i - 1];
-            }
-
-            auto tileShapes = std::vector<uint32_t>{static_cast<uint32_t>(repeats * 32),
-                static_cast<uint32_t>(ceilDiv(hiddenSizePerTile, numEltsPerSf * 4 * repeats)),
-                static_cast<uint32_t>(ceilDiv(numTokensPerTile, 8))};
-
-            return std::make_tuple(shape, stride, tileShapes);
-        }
-
-        default: throw std::runtime_error("Unsupported SF layout");
-        }
-        return std::make_tuple(std::vector<uint64_t>{}, std::vector<uint64_t>{}, std::vector<uint32_t>{});
+        hiddenSize /= 2;
+        tileHiddenSize /= 2;
+        ctaTileHiddenSize /= 2;
     }
 
-    template <class GemmOptions_>
-    static KernelParams setKernelParams(GemmOptions_ const& options, bool const batchM, void const* ptrA,
-        void const* ptrB, void* ptrC, void const* dSfA, void const* dSfB, void const* ptrPerTokenSfA,
-        void const* ptrPerTokenSfB, void const* ptrBias, void* dSfC, float const* ptrScaleC, float const* ptrScaleGate,
-        float const* ptrSwiGluAlpha, float const* ptrSwiGluBeta, int32_t const* routeMap, float* rowMax,
-        uint32_t* rowMaxBars, int32_t const* ptrNumNonExitingCtas = nullptr,
-        int32_t const* ptrTotalNumPaddedTokens = nullptr, int32_t const* ptrCtaIdxXyToBatchIdx = nullptr,
-        int32_t const* ptrCtaIdxXyToMnLimit = nullptr, int32_t const maxNumCtas = MaxNumCtas)
+    // The cute tensor shape for A/B: (numTokens, hiddenSize).
+    // Note that TMA descriptor expects the first dimension's stride to be
+    // 1, so swap the first two dimension so that the hiddenSize dimension comes first.
+
+    // Activations matrix is 2D (sum(divUpMul(M[bi], tileM) for bi in B), K).
+    std::vector<uint64_t> shape = {static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens)};
+    if (useTmaOobOpt /* also implies input/output activation */)
     {
+        // If TMA OOB optimization is used, we use 3D logical shape (M, tileM, K) or (N, tileN, K).
+        // The outer dimension is extended to make room for the possible counterbalance positive
+        // offset from the middle "bound" dimension. The counterbalance should be no more than
+        // ctaTileNumTokens.
+        shape = {static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(ctaTileNumTokens),
+            static_cast<uint64_t>(numTokens + ctaTileNumTokens)};
+    }
+    else if (isWeights)
+    {
+        // If the matrix is a weights matrix, we use 3D logical shape (B, M, K) or (B, N, K).
+        shape = {static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens),
+            static_cast<uint64_t>(options.mNumBatches)};
+    }
 
-        static_assert(sizeof(KernelParams) <= 32 * 1024, "sizeof(KernelParams) has to be less or equal than 32KB");
+    // Assemble the stride (strideTokens, 1).
+    // Swap the first two dimension as mentioned before.
+    std::vector<uint64_t> stride = {1, static_cast<uint64_t>(hiddenSize)};
+    if (useTmaOobOpt)
+    {
+        stride = {1, static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(hiddenSize)};
+    }
+    else if (isWeights)
+    {
+        stride = {
+            1, static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(hiddenSize) * static_cast<uint64_t>(numTokens)};
+    }
 
-        // Create the return struct.
-        KernelParams params;
+    // Assemble the box shape
+    std::vector<int32_t> tileShape = {tileHiddenSize, tileNumTokens};
 
-        params.ptrRouteMap = routeMap;
-        params.numTokens = options.mNumTokens;
-
-        params.ptrScaleC = ptrScaleC;
-        params.ptrScaleGate = ptrScaleGate;
-
-        params.ptrSwiGluAlpha = ptrSwiGluAlpha;
-        params.ptrSwiGluBeta = ptrSwiGluBeta;
-
-        int32_t ctaOffset = 0;
-
-        // Compute totalNumPaddedTokens, ctaIdxXyToBatchIdx and ctaIdxXyToMnLimit if the batch dims are
-        // known at kernel launch time. Otherwise, these parameters are defined in the device buffers:
-        // ptrTotalNumPaddedTokens, ptrCtaIdxXyToBatchIdx and ptrCtaIdxXyToMnLimit respectively.
-
-        if (options.mIsStaticBatch)
+    // Alternate layouts (MajorMn and BlockMajorK) do not apply to matrixC
+    if (matrixType != MatrixType::MatrixC)
+    {
+        gemm::MatrixLayout layout = (matrixType == MatrixType::MatrixA) ? options.mLayoutA : options.mLayoutB;
+        // Note, only the weights support non MajorK layouts
+        if (layout == gemm::MatrixLayout::MajorMn)
         {
-            params.totalNumPaddedTokens = 0;
-            for (int b = 0; b < options.mNumBatches; b++)
+            // Apply transpose if necessary
+            std::swap(shape[0], shape[1]);
+            stride[1] = numTokens;
+            std::swap(tileShape[0], tileShape[1]);
+        }
+        else if (layout == gemm::MatrixLayout::BlockMajorK)
+        {
+            // Set shapes based on blocking layout
+            shape = {static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens),
+                static_cast<uint64_t>(mK / options.mBlockK), static_cast<uint64_t>(options.mNumBatches)};
+            stride = {1, static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens * options.mBlockK),
+                static_cast<uint64_t>(hiddenSize * numTokens)};
+
+            // If blockK > tileK, then the inner most box size will be based on the tile
+            int32_t const tileBlockK = std::min(options.mBlockK, tileHiddenSize);
+            tileShape = {tileBlockK, tileNumTokens, tileHiddenSize / tileBlockK};
+        }
+    }
+
+    return std::make_tuple(shape, stride, tileShape);
+}
+
+// Create the TMA shape/stride for A/B block scaling factors.
+static auto makeTmaShapeStrideSfAb(int mM, int mN, int mK, MatrixType matrixType, int tileM, int tileN, int tileK,
+    tg::Dtype dtypeElt, tg::SfLayout layout, int sfReshapeFactor)
+{
+
+    // The outer dimension.
+    auto numTokens = matrixType == MatrixType::MatrixA ? mM : mN;
+    // The inner dimension.
+    auto hiddenSize = mK;
+    // The outer tile dimension.
+    auto numTokensPerTile = matrixType == MatrixType::MatrixA ? tileM : tileN;
+    // The inner tile dimension.
+    auto hiddenSizePerTile = tileK;
+    // Number of elements per scaling factor.
+    const int32_t numEltsPerSf = (dtypeElt == tg::Dtype::E2m1) ? 16 : 32;
+
+    switch (layout)
+    {
+    case tg::SfLayout::R128c4:
+    {
+        // The scaling factor tensor packs 128x4 tiles into contiguous 512B blocks.
+        // The 512B block maps to a 32x16B (32x128b) block in TMEM.
+        // See https://nvbugspro.nvidia.com/bug/4165523
+        //
+        // Additionally, we have to meet constraints of TMA that the box dimensions are less
+        // than 256 and boxDim[0] is a multiple of 16B.
+        //
+        // The "logical" tensor is:      [outer,       inner / numEltsPerSf]
+        // The aforementioned format is: [outer / 128, inner / numEltsPerSf / 4,    512]
+        // The shape we use for TMA is:  [outer / 128, inner / numEltsPerSf / 4, 2, 256]
+
+        auto shape = std::vector<uint64_t>{256, 2, static_cast<uint64_t>(ceilDiv(hiddenSize, numEltsPerSf * 4)),
+            static_cast<uint64_t>(ceilDiv(numTokens, 128))};
+
+        std::vector<uint64_t> stride(shape.size());
+        stride[0] = 1;
+        for (size_t i = 1; i < shape.size(); i++)
+        {
+            stride[i] = shape[i - 1] * stride[i - 1];
+        }
+
+        auto tileShapes
+            = std::vector<uint32_t>{256, 2, static_cast<uint32_t>(ceilDiv(hiddenSizePerTile, numEltsPerSf * 4)),
+                static_cast<uint32_t>(ceilDiv(numTokensPerTile, 128))};
+
+        return std::make_tuple(shape, stride, tileShapes);
+    }
+
+    case tg::SfLayout::R8c4:
+    {
+        // The scaling factor tensor packs 8x4 tiles into contiguous 32B blocks.
+        //
+        // As the inner dimension (k) is often a multiple of the tile size, we can reshape to use
+        // fewer read requests, if the tile dimensions allow. It does not reduce the number of
+        // instructions.
+        //
+        // I.e., let's define r = min(⌈hiddenSizePerTile / (numEltsPerSf * 4)⌉, 8)
+        //
+        // The "logical" tensor is: [outer,      inner / numEltsPerSf]
+        // The 8x4 SF layout is:    [⌈outer / 8⌉, inner / (4 * numEltsPerSf), 32]
+        // The TMA tensor shape is: [⌈outer / 8⌉, inner / (4 * numEltsPerSf * r), r * 32]
+        //
+        // The caveat of NumRepeats>1 is we must pad the hidden dimension of SF to multiples of
+        // NumRepeats * numEltsPerSf * 4.
+
+        // Detect if the supplied factor is power of 2. E.g., 0b0100 and (0b0100 - 1) == 0b0000.
+        int const r = sfReshapeFactor;
+        if (r > 0 && (r & (r - 1)) != 0)
+        {
+            throw std::runtime_error("mSfReshapeFactor must be positive and a power of 2. Found " + std::to_string(r));
+        }
+
+        // Sanitize number of repeats so it doesn't exceed the dimension.
+        int const repeats = std::min(ceilDiv(hiddenSizePerTile, numEltsPerSf * 4), r);
+
+        // Detect if the input hidden size K is a multiple of the repeats.
+        if (ceilDiv(hiddenSize, numEltsPerSf * 4) % repeats != 0)
+        {
+            throw std::runtime_error("SF hiddenSize K (" + std::to_string(ceilDiv(hiddenSize, numEltsPerSf * 4))
+                + ") must be a multiple of repeats (" + std::to_string(repeats) + ")");
+        }
+
+        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(repeats * 32),
+            static_cast<uint64_t>(ceilDiv(hiddenSize, numEltsPerSf * 4 * repeats)),
+            static_cast<uint64_t>(ceilDiv(numTokens, 8))};
+
+        std::vector<uint64_t> stride(shape.size());
+        stride[0] = 1;
+        for (size_t i = 1; i < shape.size(); i++)
+        {
+            stride[i] = shape[i - 1] * stride[i - 1];
+        }
+
+        auto tileShapes = std::vector<uint32_t>{static_cast<uint32_t>(repeats * 32),
+            static_cast<uint32_t>(ceilDiv(hiddenSizePerTile, numEltsPerSf * 4 * repeats)),
+            static_cast<uint32_t>(ceilDiv(numTokensPerTile, 8))};
+
+        return std::make_tuple(shape, stride, tileShapes);
+    }
+
+    default: throw std::runtime_error("Unsupported SF layout");
+    }
+    return std::make_tuple(std::vector<uint64_t>{}, std::vector<uint64_t>{}, std::vector<uint32_t>{});
+}
+
+template <class GemmOptions_>
+static KernelParams setKernelParams(GemmOptions_ const& options, bool const batchM, void const* ptrA, void const* ptrB,
+    void* ptrC, void const* dSfA, void const* dSfB, void const* ptrPerTokenSfA, void const* ptrPerTokenSfB,
+    void const* ptrBias, void* dSfC, float const* ptrScaleC, float const* ptrScaleGate, float const* ptrClampLimit,
+    float const* ptrSwiGluAlpha, float const* ptrSwiGluBeta, int32_t const* routeMap, float* rowMax,
+    uint32_t* rowMaxBars, int32_t const* ptrNumNonExitingCtas = nullptr,
+    int32_t const* ptrTotalNumPaddedTokens = nullptr, int32_t const* ptrCtaIdxXyToBatchIdx = nullptr,
+    int32_t const* ptrCtaIdxXyToMnLimit = nullptr, int32_t const maxNumCtas = KernelParams::MaxNumCtas)
+{
+
+    static_assert(sizeof(KernelParams) <= 32 * 1024, "sizeof(KernelParams) has to be less or equal than 32KB");
+
+    // Create the return struct.
+    KernelParams params;
+
+    params.ptrRouteMap = routeMap;
+    params.numTokens = options.mNumTokens;
+
+    params.ptrScaleC = ptrScaleC;
+    params.ptrScaleGate = ptrScaleGate;
+    params.ptrClampLimit = ptrClampLimit;
+    params.ptrSwiGluAlpha = ptrSwiGluAlpha;
+    params.ptrSwiGluBeta = ptrSwiGluBeta;
+
+    int32_t ctaOffset = 0;
+
+    // Compute totalNumPaddedTokens, ctaIdxXyToBatchIdx and ctaIdxXyToMnLimit if the batch dims are
+    // known at kernel launch time. Otherwise, these parameters are defined in the device buffers:
+    // ptrTotalNumPaddedTokens, ptrCtaIdxXyToBatchIdx and ptrCtaIdxXyToMnLimit respectively.
+
+    if (options.mIsStaticBatch)
+    {
+        params.totalNumPaddedTokens = 0;
+        for (int b = 0; b < options.mNumBatches; b++)
+        {
+
+            int mM = batchM ? options.mBatchedM[b] : options.mM;
+            int mN = batchM ? options.mN : options.mBatchedN[b];
+
+            // Skip Tma descriptor creation if expert isn't used
+            if (mM == 0 || mN == 0)
+            {
+                continue;
+            }
+
+            // The number of CTAs.
+            int32_t numCtas
+                = batchM ? (mM + options.mTileM - 1) / options.mTileM : (mN + options.mTileN - 1) / options.mTileN;
+            // The size of the tile.
+            int32_t tile = batchM ? options.mTileM : options.mTileN;
+            // The problem size.
+            int32_t mn = batchM ? mM : mN;
+            int32_t tokensPerTile = mn;
+
+            // Make sure we do not exceed the launch limit.
+            if (ctaOffset + numCtas > KernelParams::MaxNumCtas)
+            {
+                throw std::runtime_error("Too many CTAs");
+            }
+
+            for (int32_t cta = 0; cta < numCtas; cta++)
+            {
+                params.ctaIdxXyToBatchIdx[ctaOffset + cta] = b;
+                // This is now an identity map and it is no longer needed.
+                // params.ctaIdxXyToTileIdxMn[ctaOffset + cta] = ctaOffset + cta;
+                params.ctaIdxXyToMnLimit[ctaOffset + cta]
+                    = std::min((ctaOffset + cta + 1) * tile, ctaOffset * tile + tokensPerTile);
+            }
+            ctaOffset += numCtas;
+
+            params.totalNumPaddedTokens += numCtas * tile;
+        }
+    }
+    else
+    {
+        params.ptrTotalNumPaddedTokens = ptrTotalNumPaddedTokens;
+        params.ptrCtaIdxXyToBatchIdx = ptrCtaIdxXyToBatchIdx;
+        params.ptrCtaIdxXyToMnLimit = ptrCtaIdxXyToMnLimit;
+        ctaOffset = maxNumCtas;
+    }
+
+    if (options.mUseDeepSeekFp8 && options.mDtypeC == tg::Dtype::E4m3)
+    {
+        params.ptrDqSfsC = reinterpret_cast<float*>(dSfC);
+    }
+
+    params.ptrA = ptrA;
+    params.ptrB = ptrB;
+    params.strideInBytesA = options.mK * tg::dtypeGetNumBits(options.mDtypeA) / 8;
+    params.strideInBytesB = options.mK * tg::dtypeGetNumBits(options.mDtypeB) / 8;
+
+    params.ptrSfA = dSfA;
+    params.ptrSfB = dSfB;
+    params.ptrSfC = dSfC;
+
+    if (!batchM)
+    {
+        // A is the expert
+        if (0 != options.mM % options.mTileM)
+        {
+            throw std::runtime_error("0 == mM %% tileM");
+        }
+        params.tileStridePerBatch = options.mM / options.mTileM;
+        params.nm = options.mM;
+        // Shape/stride for gmem tensor A.
+        auto [shapeA, strideA, tileShapeA] = makeTmaShapeStrideAbc(options, options.mM, options.mN, options.mK,
+            options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixA);
+        // Build tma descriptor for A.
+        params.tmaA[0] = gemm::buildNdTmaDescriptor(
+            options.mDtypeA, options.mMmaKind, shapeA, strideA, tileShapeA, const_cast<void*>(ptrA));
+
+        // The input is padded:
+        // [act0, padding, padding, ... TileN size .., act1, padding, padding, ...]
+        auto const inputNumTokens = ctaOffset * options.mTileN;
+
+        if (!batchedGemm::doesRouteImplUseLdgsts(options.mRouteImpl))
+        {
+            bool useRouteAct = batchedGemm::doesRouteImplUseTma(options.mRouteImpl);
+            // B is the activation
+            // Shape/stride for gmem tensor B.
+            auto [shapeB, strideB, tileShapeB] = makeTmaShapeStrideAbc(options, options.mM,
+                useRouteAct ? options.mNumTokens : inputNumTokens, options.mK, options.mTileM,
+                (useRouteAct ? 1 : options.mTileN), options.mTileK, MatrixType::MatrixB);
+            // Build tma descriptor for B.
+            params.tmaB[0] = gemm::buildNdTmaDescriptor(
+                options.mDtypeB, options.mMmaKind, shapeB, strideB, tileShapeB, const_cast<void*>(ptrB));
+        }
+
+        if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE4m3
+            || options.mDtypeA == tg::Dtype::MxE2m1)
+        {
+            tg::Dtype const dTypeSf = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
+
+            // Build TMA descriptor for gmem A block scaling factors.
+            auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideSfAb(options.mM * options.mNumBatches,
+                options.mN, options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK,
+                options.mDtypeA, tg::SfLayout::R128c4, options.mSfReshapeFactor);
+            params.tmaSfA[0]
+                = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA));
+        }
+
+        if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE4m3
+            || options.mDtypeB == tg::Dtype::MxE2m1)
+        {
+            tg::Dtype const dTypeSf = (options.mDtypeB == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
+
+            if (batchedGemm::doesRouteImplUseTma(options.mRouteImpl))
             {
 
-                int mM = batchM ? options.mBatchedM[b] : options.mN;
-                int mN = batchM ? options.mM : options.mBatchedN[b];
+                // The input is NOT padded:
+                // [act0, act1, act2, ...]
 
-                // Skip Tma descriptor creation if expert isn't used
-                if (mM == 0 || mN == 0)
-                {
-                    continue;
-                }
+                // Build TMA descriptor for gmem B block scaling factors.
+                int32_t const numEltsPerSf = tg::dtypeNumEltsPerSf(options.mDtypeB);
+                // Pad number of scaling factors to the nearest multiple of 16 because of the TMA 16B
+                // alignment requirement.
+                auto numSfsInK = options.mK / numEltsPerSf;
+                numSfsInK = ceilDiv(numSfsInK, 16) * 16;
 
-                // The number of CTAs.
-                int32_t numCtas
-                    = batchM ? (mM + options.mTileM - 1) / options.mTileM : (mN + options.mTileN - 1) / options.mTileN;
-                // The size of the tile.
-                int32_t tile = batchM ? options.mTileM : options.mTileN;
-                // The problem size.
-                int32_t mn = batchM ? mM : mN;
-                int32_t tokensPerTile = mn;
-
-                // Make sure we do not exceed the launch limit.
-                if (ctaOffset + numCtas > MaxNumCtas)
-                {
-                    throw std::runtime_error("Too many CTAs");
-                }
-
-                for (int32_t cta = 0; cta < numCtas; cta++)
-                {
-                    params.ctaIdxXyToBatchIdx[ctaOffset + cta] = b;
-                    // This is now an identity map and it is no longer needed.
-                    // params.ctaIdxXyToTileIdxMn[ctaOffset + cta] = ctaOffset + cta;
-                    params.ctaIdxXyToMnLimit[ctaOffset + cta]
-                        = std::min((ctaOffset + cta + 1) * tile, ctaOffset * tile + tokensPerTile);
-                }
-                ctaOffset += numCtas;
-
-                params.totalNumPaddedTokens += numCtas * tile;
+                auto [shapeSfB, strideSfB, tileShapesSfB]
+                    = makeTmaShapeStrideAbc(options, options.mM, options.mNumTokens, numSfsInK, options.mTileM,
+                        1 /* tileN */, options.mTileK / numEltsPerSf, MatrixType::MatrixB);
+                params.tmaSfB[0] = gemm::buildNdTmaDescriptor(dTypeSf, options.mMmaKind, shapeSfB, strideSfB,
+                    tileShapesSfB, const_cast<void*>(dSfB),
+                    /*doSwizzle*/ true);
             }
+            else if (batchedGemm::doesRouteImplUseNoRoute(options.mRouteImpl))
+            {
+
+                // The input is padded:
+                // [act0, padding, padding, ... TileN size .., act1, padding, padding, ...]
+
+                auto const inputNumTokensSfB = ctaOffset * options.mTileN;
+
+                // Build TMA descriptor for gmem B block scaling factors.
+                auto [shapeSfB, strideSfB, tileShapesSfB] = makeTmaShapeStrideSfAb(options.mM, inputNumTokensSfB,
+                    options.mK, MatrixType::MatrixB, options.mTileM, options.mTileN, options.mTileK, options.mDtypeB,
+                    options.mSfLayoutB, options.mSfReshapeFactor);
+                params.tmaSfB[0]
+                    = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(dSfB));
+            }
+        }
+
+        // C is the output activation
+        if (options.mUseTmaStore)
+        {
+            // Shape/stride for gmem tensor C.
+            auto [shapeC, strideC, tileShapeC] = makeTmaShapeStrideAbc(options, options.mM, ctaOffset * options.mTileN,
+                options.mK, options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixC);
+            // Build tma descriptor for C.
+            params.tmaC[0]
+                = gemm::buildNdTmaDescriptor(options.mDtypeC, tg::MmaKind::Auto, shapeC, strideC, tileShapeC, ptrC);
         }
         else
         {
-            params.ptrTotalNumPaddedTokens = ptrTotalNumPaddedTokens;
-            params.ptrCtaIdxXyToBatchIdx = ptrCtaIdxXyToBatchIdx;
-            params.ptrCtaIdxXyToMnLimit = ptrCtaIdxXyToMnLimit;
-            ctaOffset = maxNumCtas;
+            params.ptrC = ptrC;
         }
-
-        if (options.mUseDeepSeekFp8 && options.mDtypeC == tg::Dtype::E4m3)
+    }
+    else
+    {
+        // B is the expert
+        if (0 != options.mN % options.mTileN)
         {
-            params.ptrDqSfsC = reinterpret_cast<float*>(dSfC);
+            throw std::runtime_error("0 == mN %% tileN");
         }
+        params.tileStridePerBatch = options.mN / options.mTileN;
+        params.nm = options.mN;
+        // Shape/stride for gmem tensor B.
+        auto [shapeB, strideB, tileShapeB] = makeTmaShapeStrideAbc(options, options.mM, options.mN, options.mK,
+            options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixB);
+        // Build tma descriptor for B.
+        params.tmaB[0] = gemm::buildNdTmaDescriptor(
+            options.mDtypeB, options.mMmaKind, shapeB, strideB, tileShapeB, const_cast<void*>(ptrB));
 
-        params.ptrA = ptrA;
-        params.ptrB = ptrB;
-        params.strideInBytesA = options.mK * tg::dtypeGetNumBits(options.mDtypeA) / 8;
-        params.strideInBytesB = options.mK * tg::dtypeGetNumBits(options.mDtypeB) / 8;
-
-        params.ptrSfA = dSfA;
-        params.ptrSfB = dSfB;
-        params.ptrSfC = dSfC;
-
-        if (!batchM)
+        if (options.mRouteImpl == batchedGemm::RouteImpl::NoRoute)
         {
-            // A is the expert
-            if (0 != options.mM % options.mTileM)
-            {
-                throw std::runtime_error("0 == mM %% tileM");
-            }
-            params.tileStridePerBatch = options.mM / options.mTileM;
-            params.nm = options.mM;
+            // A is the activation
             // Shape/stride for gmem tensor A.
-            auto [shapeA, strideA, tileShapeA] = makeTmaShapeStrideAbc(options, options.mM, options.mN, options.mK,
+            // The input is padded:
+            // [act0, padding, padding, ... tileM size .., act1, padding, padding, ...]
+            auto const inputNumTokens = ctaOffset * options.mTileM;
+            auto [shapeA, strideA, tileShapeA] = makeTmaShapeStrideAbc(options, inputNumTokens, options.mN, options.mK,
                 options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixA);
             // Build tma descriptor for A.
             params.tmaA[0] = gemm::buildNdTmaDescriptor(
                 options.mDtypeA, options.mMmaKind, shapeA, strideA, tileShapeA, const_cast<void*>(ptrA));
-
-            // The input is padded:
-            // [act0, padding, padding, ... TileN size .., act1, padding, padding, ...]
-            auto const inputNumTokens = ctaOffset * options.mTileN;
-
-            if (!batchedGemm::doesRouteImplUseLdgsts(options.mRouteImpl))
-            {
-                bool useRouteAct = batchedGemm::doesRouteImplUseTma(options.mRouteImpl);
-                // B is the activation
-                // Shape/stride for gmem tensor B.
-                auto [shapeB, strideB, tileShapeB] = makeTmaShapeStrideAbc(options, options.mM,
-                    useRouteAct ? options.mNumTokens : inputNumTokens, options.mK, options.mTileM,
-                    (useRouteAct ? 1 : options.mTileN), options.mTileK, MatrixType::MatrixB);
-                // Build tma descriptor for B.
-                params.tmaB[0] = gemm::buildNdTmaDescriptor(
-                    options.mDtypeB, options.mMmaKind, shapeB, strideB, tileShapeB, const_cast<void*>(ptrB));
-            }
-
-            if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE4m3
-                || options.mDtypeA == tg::Dtype::MxE2m1)
-            {
-                tg::Dtype const dTypeSf = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
-
-                // Build TMA descriptor for gmem A block scaling factors.
-                auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideSfAb(options.mM * options.mNumBatches,
-                    options.mN, options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK,
-                    options.mDtypeA, tg::SfLayout::R128c4, options.mSfReshapeFactor);
-                params.tmaSfA[0]
-                    = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA));
-            }
-
-            if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE4m3
-                || options.mDtypeB == tg::Dtype::MxE2m1)
-            {
-                tg::Dtype const dTypeSf = (options.mDtypeB == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
-
-                if (batchedGemm::doesRouteImplUseTma(options.mRouteImpl))
-                {
-
-                    // The input is NOT padded:
-                    // [act0, act1, act2, ...]
-
-                    // Build TMA descriptor for gmem B block scaling factors.
-                    int32_t const numEltsPerSf = tg::dtypeNumEltsPerSf(options.mDtypeB);
-                    // Pad number of scaling factors to the nearest multiple of 16 because of the TMA 16B
-                    // alignment requirement.
-                    auto numSfsInK = options.mK / numEltsPerSf;
-                    numSfsInK = ceilDiv(numSfsInK, 16) * 16;
-
-                    auto [shapeSfB, strideSfB, tileShapesSfB]
-                        = makeTmaShapeStrideAbc(options, options.mM, options.mNumTokens, numSfsInK, options.mTileM,
-                            1 /* tileN */, options.mTileK / numEltsPerSf, MatrixType::MatrixB);
-                    params.tmaSfB[0] = gemm::buildNdTmaDescriptor(dTypeSf, options.mMmaKind, shapeSfB, strideSfB,
-                        tileShapesSfB, const_cast<void*>(dSfB),
-                        /*doSwizzle*/ true);
-                }
-                else if (batchedGemm::doesRouteImplUseNoRoute(options.mRouteImpl))
-                {
-
-                    // The input is padded:
-                    // [act0, padding, padding, ... TileN size .., act1, padding, padding, ...]
-
-                    auto const inputNumTokensSfB = ctaOffset * options.mTileN;
-
-                    // Build TMA descriptor for gmem B block scaling factors.
-                    auto [shapeSfB, strideSfB, tileShapesSfB] = makeTmaShapeStrideSfAb(options.mM, inputNumTokensSfB,
-                        options.mK, MatrixType::MatrixB, options.mTileM, options.mTileN, options.mTileK,
-                        options.mDtypeB, options.mSfLayoutB, options.mSfReshapeFactor);
-                    params.tmaSfB[0] = gemm::buildSfTmaDescriptor(
-                        dTypeSf, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(dSfB));
-                }
-            }
-
-            // C is the output activation
-            if (options.mUseTmaStore)
-            {
-                // Shape/stride for gmem tensor C.
-                auto [shapeC, strideC, tileShapeC]
-                    = makeTmaShapeStrideAbc(options, options.mM, ctaOffset * options.mTileN, options.mK, options.mTileM,
-                        options.mTileN, options.mTileK, MatrixType::MatrixC);
-                // Build tma descriptor for C.
-                params.tmaC[0]
-                    = gemm::buildNdTmaDescriptor(options.mDtypeC, tg::MmaKind::Auto, shapeC, strideC, tileShapeC, ptrC);
-            }
-            else
-            {
-                params.ptrC = ptrC;
-            }
         }
-        else
+
+        if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE4m3
+            || options.mDtypeA == tg::Dtype::MxE2m1)
         {
-            // B is the expert
-            if (0 != options.mN % options.mTileN)
-            {
-                throw std::runtime_error("0 == mN %% tileN");
-            }
-            params.tileStridePerBatch = options.mN / options.mTileN;
-            params.nm = options.mN;
-            // Shape/stride for gmem tensor B.
-            auto [shapeB, strideB, tileShapeB] = makeTmaShapeStrideAbc(options, options.mM, options.mN, options.mK,
-                options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixB);
-            // Build tma descriptor for B.
-            params.tmaB[0] = gemm::buildNdTmaDescriptor(
-                options.mDtypeB, options.mMmaKind, shapeB, strideB, tileShapeB, const_cast<void*>(ptrB));
+            tg::Dtype const dTypeSf = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
 
             if (options.mRouteImpl == batchedGemm::RouteImpl::NoRoute)
             {
-                // A is the activation
-                // Shape/stride for gmem tensor A.
+
                 // The input is padded:
                 // [act0, padding, padding, ... tileM size .., act1, padding, padding, ...]
-                auto const inputNumTokens = ctaOffset * options.mTileM;
-                auto [shapeA, strideA, tileShapeA] = makeTmaShapeStrideAbc(options, inputNumTokens, options.mN,
-                    options.mK, options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixA);
-                // Build tma descriptor for A.
-                params.tmaA[0] = gemm::buildNdTmaDescriptor(
-                    options.mDtypeA, options.mMmaKind, shapeA, strideA, tileShapeA, const_cast<void*>(ptrA));
-            }
+                auto const inputNumTokensSfA = ctaOffset * options.mTileM;
 
-            if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE4m3
-                || options.mDtypeA == tg::Dtype::MxE2m1)
-            {
-                tg::Dtype const dTypeSf = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
-
-                if (options.mRouteImpl == batchedGemm::RouteImpl::NoRoute)
-                {
-
-                    // The input is padded:
-                    // [act0, padding, padding, ... tileM size .., act1, padding, padding, ...]
-                    auto const inputNumTokensSfA = ctaOffset * options.mTileM;
-
-                    // Build TMA descriptor for gmem A block scaling factors.
-                    auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideSfAb(inputNumTokensSfA, options.mN,
-                        options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK,
-                        options.mDtypeA, tg::SfLayout::R128c4, options.mSfReshapeFactor);
-                    params.tmaSfA[0] = gemm::buildSfTmaDescriptor(
-                        dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA));
-                }
-            }
-
-            if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE4m3
-                || options.mDtypeB == tg::Dtype::MxE2m1)
-            {
-                tg::Dtype const dTypeSf = (options.mDtypeB == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
-
-                // Build TMA descriptor for gmem B block scaling factors.
-                auto [shapeSfB, strideSfB, tileShapesSfB] = makeTmaShapeStrideSfAb(options.mM,
-                    options.mN * options.mNumBatches, options.mK, MatrixType::MatrixB, options.mTileM, options.mTileN,
-                    options.mTileK, options.mDtypeB, options.mSfLayoutB, options.mSfReshapeFactor);
-                params.tmaSfB[0]
-                    = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(dSfB));
-            }
-
-            // C is the output activation
-            if (options.mUseTmaStore)
-            {
-                // Shape/stride for gmem tensor C.
-                auto [shapeC, strideC, tileShapeC] = makeTmaShapeStrideAbc(options, ctaOffset * options.mTileM,
-                    options.mN, options.mK, options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixC);
-                // Build tma descriptor for C.
-                params.tmaC[0]
-                    = gemm::buildNdTmaDescriptor(options.mDtypeC, tg::MmaKind::Auto, shapeC, strideC, tileShapeC, ptrC);
-            }
-            else
-            {
-                params.ptrC = ptrC;
+                // Build TMA descriptor for gmem A block scaling factors.
+                auto [shapeSfA, strideSfA, tileShapesSfA] = makeTmaShapeStrideSfAb(inputNumTokensSfA, options.mN,
+                    options.mK, MatrixType::MatrixA, options.mTileM, options.mTileN, options.mTileK, options.mDtypeA,
+                    tg::SfLayout::R128c4, options.mSfReshapeFactor);
+                params.tmaSfA[0]
+                    = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(dSfA));
             }
         }
 
-        params.k = options.mK;
-        params.numBatches = options.mNumBatches;
+        if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE4m3
+            || options.mDtypeB == tg::Dtype::MxE2m1)
+        {
+            tg::Dtype const dTypeSf = (options.mDtypeB == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
 
-        params.rank = 0;
-        params.tpGrpSize = 1;
+            // Build TMA descriptor for gmem B block scaling factors.
+            auto [shapeSfB, strideSfB, tileShapesSfB] = makeTmaShapeStrideSfAb(options.mM,
+                options.mN * options.mNumBatches, options.mK, MatrixType::MatrixB, options.mTileM, options.mTileN,
+                options.mTileK, options.mDtypeB, options.mSfLayoutB, options.mSfReshapeFactor);
+            params.tmaSfB[0]
+                = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(dSfB));
+        }
 
-        params.ptrPartialRowMax = rowMax;
-        params.ptrRowMaxCompletionBars = rowMaxBars;
-
-        params.ptrNumNonExitingCtas = ptrNumNonExitingCtas;
-
-        // Set the per-token scale factors for MetaFP8 or scale inputs
-        params.ptrPerTokenSfA = ptrPerTokenSfA;
-        params.ptrPerTokenSfB = ptrPerTokenSfB;
-        params.ptrBias = ptrBias;
-
-        return params;
+        // C is the output activation
+        if (options.mUseTmaStore)
+        {
+            // Shape/stride for gmem tensor C.
+            auto [shapeC, strideC, tileShapeC] = makeTmaShapeStrideAbc(options, ctaOffset * options.mTileM, options.mN,
+                options.mK, options.mTileM, options.mTileN, options.mTileK, MatrixType::MatrixC);
+            // Build tma descriptor for C.
+            params.tmaC[0]
+                = gemm::buildNdTmaDescriptor(options.mDtypeC, tg::MmaKind::Auto, shapeC, strideC, tileShapeC, ptrC);
+        }
+        else
+        {
+            params.ptrC = ptrC;
+        }
     }
+
+    params.k = options.mK;
+    params.numBatches = options.mNumBatches;
+
+    params.rank = 0;
+    params.tpGrpSize = 1;
+
+    params.ptrPartialRowMax = rowMax;
+    params.ptrRowMaxCompletionBars = rowMaxBars;
+
+    params.ptrNumNonExitingCtas = ptrNumNonExitingCtas;
+
+    // Set the per-token scale factors for MetaFP8 or scale inputs
+    params.ptrPerTokenSfA = ptrPerTokenSfA;
+    params.ptrPerTokenSfB = ptrPerTokenSfB;
+    params.ptrBias = ptrBias;
+
+    return params;
+}
 #endif
-};
+}; // namespace KernelParamsSetup
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 } // namespace batchedGemm
+} // namespace batchedGemm
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h
new file mode 100644
index 0000000000..2dfb0a1894
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelParamsDecl.h
@@ -0,0 +1,547 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2025 NVIDIA CORPORATION &
+ * AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+namespace batchedGemm
+{
+
+// This is device code
+
+struct KernelParams
+{
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // BatchedGemm parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // Maximum number of CTAs
+    static constexpr int MaxNumCtas = 2048;
+
+    // NOTE: TMA out-of-bounds optimization for MoE padded tokens:
+    //
+    // Originally the padded tokens is a 2D tensor [hiddenDim, ctaGridDimY * tileN] with stride [1,
+    // hiddenDim] and box size [tileM, tileN] at pointer p. We waste bandwidth bytes since we only
+    // want to load [0, batchEnd) out of the [0, tileN) box size: batchEnd is a runtime variable while
+    // box size needs to be fixed at compile time.
+    //
+    // To deal with this, we reshape the tensor to 3D: [hiddenDim, tileN, ctaGridDimY * tileN] with
+    // stride [1, hiddenDim, hiddenDim] and box size [tileM, tileN, 1]. For the original 2D
+    // tensor,
+    //
+    //   Offset Coords [ : , ctaIdxY * tileN ],
+    //   Box Sizes     [ : , tileN           ],
+    //   Coords Range  [ : , ctaIdxY * tileN : ctaIdxY * tileN + tileN],
+    //
+    // while we only want load the range [ctaIdxY * tileN, ctaIdxY * tileN + batchEnd), 1 <= batchEnd
+    // <= tileN
+    //
+    // For the reshaped 3D tensor,
+    //
+    //   Offset Coords [ : , tileN - batchEnd ,
+    //                       ctaIdxY * tileN + batchEnd ],
+    //   Box Sizes     [ : , tileN            ,
+    //                       1                          ],
+    //   Coords Range  [ : , tileN - batchEnd : min(tileN, 2 * tileN - batchEnd),
+    //                       ctaIdxY * tileN + batchEnd : ctaIdx * tileN + batchEnd + 1],
+    //
+    // while min(tileN, 2 * tileN - batchEnd) always evaluates to tileN. The unwanted tokens are
+    // essentially filtered out by utilizing the OOB feature of TMA. Since the 2nd and 3rd dimension
+    // has the same stride, we end up loading the following (adding the left and right end of the 2nd
+    // and 3rd dimension ranges):
+    //
+    //   Effective 2D Coords Range
+    //     [ : , tileN + ctaIdxY * tileN : tileN + ctaIdxY * tileN + batchEnd],
+    //
+    // This is exactly the same as the original range except for the offset tileN, thus we also need
+    // to offset the pointer in the opposite direction:
+    //
+    //     Ptr (p) -> Ptr (p - tileN * hiddenDim)
+    //
+    // Due to the restrictions of TMA unit, the above operations requires the TMA descriptor and the
+    // underlying buffer be constructed differently:
+    // - Requires valid buffer at (p - tileN * hidden) - needs prepending `tileN` tokens.
+    // - TMA outermost dimension must be extended by `tileN` or loads will OOB in the rightmost side.
+    // The latter is because when batchEnd == tileN, the offset coords in the 3rd dimension becomes
+    // ctaIdxY * tileN + tileN. When ctaIdxY = ctaGridDimY - 1, it becomes ((ctaGridDimY - 1) * tileN
+    // + tileN = ctaGridDimY * tileN which is equal to the 3rd dimension size and will be filtered
+    // out. That's why we need to extend the tensor size by tileN.
+    //
+    // TMA descriptor for A.
+    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideAbc.
+    //
+    // If batchM:
+    //    Logical shape is [sum(divUpMul(M[bi], tileM) for bi in B), K].
+    //    Logical strides are [K, 1].
+    //    Tile box shape is [tileM, tileK].
+    //    Tile box strides are [tileK, 1].
+    //
+    // If batchN:
+    //    If layoutA is MatrixLayout::MajorK
+    //       Logical shape is [B, divUpMul(M, tileM), K].
+    //       Logical strides are [divUpMul(M, tileM) * K, K, 1].
+    //       Tile box shape is [1, tileM, tileK].
+    //       Tile box strides are [0, tileK, 1].
+    //    If layoutA is MatrixLayout::Mn
+    //       Logical shape is [B, K, divUpMul(M, tileM)].
+    //       Logical strides are [K * divUpMul(M, tileM), divUpMul(M, tileM), 1].
+    //       Tile box shape is [1, tileK, tileM].
+    //       Tile box strides are [0, tileM, 1].
+    //    If layoutA is MatrixLayout::BlockMajorK
+    //       Logical shape is [B, K / blockK, divUpMul(M, tileM), blockK].
+    //       Logical strides are [K * divUpMul(M, tileM),  divUpMul(M, tileM) * blockK, blockK, 1].
+    //       Tile box shape is [1, tileK / min(blockK, tileK), tileM, min(blockK, tileK)].
+    //       Tile box strides are [0, tileM * min(blockK, tileK), min(blockK, tileK), 1].
+    //       where blockK is 128B.
+    //
+    // Dtype is set from options.mDtypeA.
+    CUtensorMap tmaA[1];
+
+    // TMA descriptor for B.
+    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideAbc.
+    //
+    // If batchM:
+    //    If layoutB is MatrixLayout::MajorK
+    //       Logical shape is [B, divUpMul(N, tileN), K].
+    //       Logical strides are [divUpMul(N, tileN) * K, K, 1].
+    //       Tile box shape is [1, tileN, tileK].
+    //       Tile box strides are [0, tileK, 1].
+    //    If layoutB is MatrixLayout::MajorMn
+    //       Logical shape is [B, K, divUpMul(N, tileN)].
+    //       Logical strides are [K * divUpMul(N, tileN), divUpMul(N, tileN), 1].
+    //       Tile box shape is [1, tileK, tileN].
+    //       Tile box strides are [0, tileN, 1].
+    //    If layoutB is MatrixLayout::BlockMajorK
+    //       Logical shape is [B, K / blockK, divUpMul(N, tileN), blockK].
+    //       Logical strides are [K * divUpMul(N, tileN),  divUpMul(N, tileN) * blockK, blockK, 1].
+    //       Tile box shape is [1, tileK / min(blockK, tileK), tileN, min(blockK, tileK)].
+    //       Tile box strides are [0, tileN * min(blockK, tileK), min(blockK, tileK), 1].
+    //       where blockK is 128B.
+    //
+    // If batchN:
+    //    Logical shape is [sum(divUpMul(N[bi], tileN) for bi in B), K].
+    //    Logical strides are [K, 1].
+    //    Tile box shape is [tileN, tileK].
+    //    Tile box strides are [tileK, 1].
+    //
+    // Dtype is set from options.mDtypeB.
+    CUtensorMap tmaB[1];
+
+    // TMA descriptor for C, (when useTmaStore is true)
+    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideAbc.
+    //
+    // If batchM:
+    //    Logical shape is [sum(divUpMul(M[bi], tileM) for bi in B), N].
+    //    Logical strides are [N, 1].
+    //    Tile box shape is [epilogueTileM, epilogueTileN].
+    //    Tile box strides are [epilogueTileN, 1].
+    //
+    // If batchN:
+    //    Logical shape is [sum(divUpMul(N[bi], tileN) for bi in B), M].
+    //    Logical strides are [M, 1].
+    //    Tile box shape is [epilogueTileN, epilogueTileM].
+    //    Tile box strides are [epilogueTileM, 1].
+    //
+    // Dtype is set from options.mDtypeC.
+    CUtensorMap tmaC[1];
+
+    // TMA descriptor for the block scaling factors for A, for MxFp{4,8} and NvFp4 formats.
+    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideSfAb.
+    // The layout of scaling factors for A is always R128c4.
+    //
+    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
+    // M must be a multiple of 128.
+    // K must be a multiple of 4P.
+    // The "logical" shape is: [paddedM, K / P], where paddedM is
+    // sum(divUpMul(M[bi], tileM) for bi in B) if batchM,
+    // otherwise divUpMul(M, TileM) * B.
+    // The R128c4 layout is: [paddedM / 128, K / P / 4, 512].
+    // The shape we use for TMA is: [paddedM / 128, K / P / 4, 2, 256].
+    //
+    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
+    CUtensorMap tmaSfA[1];
+
+    // TMA descriptor for the block scaling factors for B, for MxFp{4,8} and NvFp4 formats.
+    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideSfAb.
+    // The layout of block scaling factors for B is controlled by options.mSfLayoutB.
+    //
+    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
+    // The "logical" shape is: [paddedN, K / 16]
+    // where paddedN is sum(divUpMul(N[bi], tileN) for bi in B) if batchN,
+    // otherwise divUpMul(N, TileN) * B.
+    //
+    // If the layout is R128c4,
+    //    paddedN must be a multiple of 128.
+    //    K must be a multiple of 4P.
+    //    The R128c4 layout is: [paddedN / 128, K / P / 4, 512]
+    //    The shape we use for TMA is: [paddedN / 128, K / P / 4, 2, 256]
+    //
+    // If the layout is R8c4,
+    //    paddedN must be a multiple of 8.
+    //    K must be a multiple of 4P.
+    //    The R8c4 layout is: [paddedN / 8, K / P / 4, 32]
+    //    The shape we use for TMA is: [paddedN / 8, K / P / 4 / repeats, repeats * 32]
+    //    where repeats = min(tileK / P / 4, 8)
+    //
+    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
+    CUtensorMap tmaSfB[1];
+
+    // The input matrix A.
+    // If (routeAct == true && batchM), the shape is [M, K]. tmaA is not used.
+    // Otherwise, check layout of tmaA to see the shape and strides.
+    void const* ptrA{nullptr};
+
+    // The stride for matrix A in bytes.
+    // Equals to K * dtypeGetNumBits(dtypeA) / 8.
+    uint64_t strideInBytesA;
+
+    // The input matrix B.
+    // If (routeAct == true && batchN), the shape is [N, K]. tmaB is not used.
+    // Otherwise, check layout of tmaB to see the shape and strides.
+    void const* ptrB{nullptr};
+    // The stride for matrix B in bytes.
+    // Equals to K * dtypeGetNumBits(dtypeB) / 8.
+    uint64_t strideInBytesB;
+
+    // The output matrix C. Check "logical" layout of tmaC to see the shape and strides.
+    void* ptrC{nullptr};
+
+    // Inputs and output are MxFp{4,8}, Fp8, NvFp4.
+    // The scaling factors to apply to the output - can be used to incorporate input scaling factors
+    // as described below: C = SEncC * act(SDecA * SDecB * A * Bl) . (SDecA * SDecB * A * Br)
+    //  -> ScaleGate = SDecA * SDecB
+    //     ScaleC    = SDecA * SDecB * SEncC
+    //
+    // Only the inputs are MxFp{4,8}, Fp8, NvFp4.
+    // C = act(SDecA * SDecB * A * Bl) . (SDecA * SDecB * A * Br)
+    //  -> ScaleGate = SDecA * SDecB
+    //     ScaleC    = SDecA * SDecB
+    //
+    // Only the output is MxFp{4,8}, Fp8, NvFp4.
+    // C = SEncC * act(A * Bl) . (A * Br)
+    //  -> ScaleGate = 1
+    //     ScaleC    = SEncC
+    //
+    // The output tensor scaling factor for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
+    // TensorRT-LLM API requires a scaling factor on the device.
+    // Shape is [B]. One scaling factor per tensor in batch.
+    float const* ptrScaleC{nullptr};
+
+    // The output gate scale for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
+    // TensorRT-LLM API requires a scaling factor on the device.
+    // Shape is [B]. One scaling factor per tensor in batch.
+    float const* ptrScaleGate{nullptr};
+
+    // The clamp limit before the activation.
+    // Shape is [B].
+    // Clamp is INF if nullptr.
+    // If applied on SwiGlu, it will be:
+    //
+    //   x_glu    = x_glu.clamp(min=None, max=limit)
+    //   x_linear = x_linear.clamp(min=-limit, max=limit)
+    float const* ptrClampLimit{nullptr};
+
+    // The alpha and beta for SwiGlu.
+    // Shape is [B]. One alpha and one beta per tensor in batch.
+    // Alpha is 1.f if nullptr.
+    // Beta is 0.f if nullptr.
+    // The formula:
+    //
+    //   out_glu  = x_glu * torch.sigmoid(alpha * x_glu) * (x_linear + beta)
+    float const* ptrSwiGluAlpha{nullptr};
+    float const* ptrSwiGluBeta{nullptr};
+
+    // The K dimension. It is the hidden dimension of the input matrices.
+    int32_t k;
+
+    // The non-batched dimension.
+    // It is N if batchM, otherwise M.
+    int32_t nm;
+
+    // Tile stride per batch for the non-batched dimension.
+    // It is N / TileN if batchM, otherwise M / TileM.
+    int32_t tileStridePerBatch;
+
+    // TODO get rid of that.
+    // DeepSeek FP8 scaling factors for C
+    float* ptrDqSfsC{nullptr};
+
+    // The block scaling factors for A.
+    // The pointer must always be set regardless of the quantization recipe.
+    // If (routeAct == true && batchM), the shape is [M, K / 16]. tmaSfA is not used.
+    //    For the layout (r128c4), see below.
+    // Otherwise,
+    //    If MxFp{4,8} and NvFp4 formats are used,
+    //      check the "logical" layout of tmaSfA to see the shape and strides.
+    //      The dtype is Dtype::E4m3.
+    //
+    //    If DeepSeek FP8 quantization recipe is used,
+    //      If batchM:
+    //        The shape is [K / 128, paddedM],
+    //        where paddedM is sum(divUpMul(M[bi], tileM) for bi in B).
+    //      If batchN:
+    //        The shape is [M / 128, K / 128],
+    //      The rightmost dimension is contiguous in memory.
+    //      The dtype is Dtype::Float32.
+    void const* ptrSfA{nullptr};
+
+    // The block scaling factors for B.
+    // The pointer must always be set regardless of the quantization recipe.
+    // If (routeAct == true && batchN), the shape is [N, K / 16]. tmaSfB is not used.
+    //    For the layout (r128c4, r8c4), see below.
+    // Otherwise,
+    //    If MxFp{4,8} and NvFp4 formats are used,
+    //      check the layout of tmaSfB to see the shape and strides.
+    //      The dtype is Dtype::E4m3.
+    //
+    //    If DeepSeek FP8 quantization recipe is used,
+    //      If batchM:
+    //        The shape is [N / 128, K / 128],
+    //      If batchN:
+    //        The shape is [K / 128, paddedN],
+    //        where paddedN is sum(divUpMul(N[bi], tileN) for bi in B).
+    //      The rightmost dimension is contiguous in memory.
+    //      The dtype is Dtype::Float32.
+    void const* ptrSfB{nullptr};
+
+    // The per-token scaling factors from scale A.
+    //
+    // This is used for either:
+    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
+    //   * When the routing scales are applied to the input activations (only when output is not
+    //   transposed). The dtype is Dtype::Bfloat16
+    //
+    // if (batchM (A is activations)):
+    //     Logical shape is [sum(divUpMul(M[bi], tileM) for bi in B)]
+    //
+    // if (batchN (A is weights)):
+    //     Logical shape is [B, divUpMul(M, tileM)]
+    //
+    void const* ptrPerTokenSfA{nullptr};
+
+    // The per-token scaling factors from scale B.
+    //
+    // This is used for either:
+    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
+    //   * When the routing scales are applied to the input activations (only when output is
+    //   transposed). The dtype is Dtype::Bfloat16
+    //
+    // if (batchM (B is weights)):
+    //     Logical shape is [B, divUpMul(N, tileN)]
+    //
+    // if (batchN (B is activations)):
+    //     Logical shape is [sum(divUpMul(N[bi], tileN) for bi in B)]
+    void const* ptrPerTokenSfB{nullptr};
+
+    // The bias applied after the GEMM and before the activation function.
+    // The bias is applied before applying the global scaling factor. I.e.
+    // C = act(A * B + bias') * scaleC
+    // scaleC = dequantA * dequantB * quantC
+    // Thus, the bias' = bias / (dequantA * dequantB), where the bias is the original bias.
+    //
+    // If batchM, BiasType must be N, and bias shape is [B, N].
+    // The bias is broadcasted along the M dimension.
+    //
+    // If batchNm BiasType must be M, and bias shape is [B, M].
+    // The bias is broadcasted along the N dimension.
+    //
+    // The dtype is float32.
+    void const* ptrBias{nullptr};
+
+    // The output block scaling factors for C.
+    //
+    // If MxFp{4,8} and NvFp4 formats are used,
+    // The "logical" shape is:
+    //    if batchM: [paddedM, N / 16]
+    //    if batchN: [paddedN, M / 16]
+    // where paddedM is sum(divUpMul(M[bi], tileM) for bi in B),
+    // where paddedN is sum(divUpMul(N[bi], tileN) for bi in B).
+    //
+    // If the layout is R128c4,
+    //    paddedOuter must be a multiple of 128.
+    //    inner must be a multiple of 64.
+    //    The R128c4 layout is: [paddedOuter / 128, inner / 16 / 4, 512]
+    //    The shape we use for TMA is: [paddedOuter / 128, inner / 16 / 4, 2, 256]
+    //    where inner = N if batchM, otherwise M.
+    //    where paddedOuter = paddedM if batchM, otherwise paddedN.
+    //
+    // If the layout is R8c4,
+    //    paddedOuter must be a multiple of 8.
+    //    inner must be a multiple of 64.
+    //    The R8c4 layout is: [paddedOuter / 8, inner / 16 / 4, 32]
+    //    The shape we use for TMA is: [paddedOuter / 8, inner / 16 / 4 / repeats, repeats * 32]
+    //    where repeats = min(tileInner / 16 / 4, 8),
+    //    where tileInner = tileN if batchM, otherwise tileM,
+    //    where paddedOuter = paddedM if batchM, otherwise paddedN.
+    //    where inner = N if batchM, otherwise M.
+    //
+    // The dtype is Dtype::E4m3.
+    //
+    // If DeepSeek FP8 quantization recipe is used,
+    // If batchM:
+    //   The shape is [N / 128, paddedM],
+    //   where paddedM is sum(divUpMul(M[bi], tileM) for bi in B).
+    // If batchN:
+    //   The shape is [M / 128, paddedN],
+    //   where paddedN is sum(divUpMul(N[bi], tileN) for bi in B).
+    // The rightmost dimension is contiguous in memory.
+    // The dtype is Dtype::Float32.
+    void* ptrSfC{nullptr};
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // Routing activations parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    // These params are used when the kernel is configured with -routeAct true.
+    // The inputs are not padded, but the outputs are padded to divUpMul(M[bi], tileM) for batchM or
+    // divUpMul(N[bi], tileN) for batchN.
+    // If -routeAct is false, the params are not used and should be set to zero.
+
+    // The routeMap for the input tokens.
+    // Map of expanded token index (counting the previous padded tokens) to the batch index
+    // the token belongs to.
+    // The shape is
+    // [sum(divUpMul(M[bi], tileM) for bi in B)] for batchM
+    // [sum(divUpMul(N[bi], tileN) for bi in B)] for batchN
+    // The dtype is int32_t.
+    //
+    // There are 3 tokens [0, 1, 2] such that [0, 1] belong to batch [B0] and [2] to batch [B1].
+    // Let's assume that the padded size is 4.
+    //
+    // The expanded indices for tokens [0, 1, 2] are:
+    // expandedIdx[0] = 0
+    // expandedIdx[1] = 1
+    // expandedIdx[2] = divUpMul(2, 4) + 0 = 4
+    //
+    // The route map is [B0, B0, X, X, B1, X, X, X] where X could be any value.
+    int32_t const* ptrRouteMap{nullptr};
+
+    // Total number of unpadded inputs
+    int32_t numTokens;
+
+    // Total number of batches
+    int32_t numBatches;
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // Batching information parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // In some cases, some CTAs must early-exit. E.g. when the grid size is set statically, but the
+    // actual workload is decided at runtime. This element on the device contains the number of CTAs
+    // that do not early-exit. The number corresponds to the X dim of the grid when the output is not
+    // transposed (i.e. batchM). To the Y dim, otherwise.
+    // The size is 1 and the dtype is int32_t.
+    // Used if isStaticBatch == false, otherwise set to nullptr.
+    // The pointer points to a scalar and the dtype is int32_t. The pointed value must be >= 0.
+    int32_t const* ptrNumNonExitingCtas{nullptr};
+
+    // Pointer to total number of padded tokens.
+    // Computed as
+    // int32_t totalNumPaddedTokens{0};
+    // for (int bi = 0; bi < options.mNumBatches; bi++) {
+    //   totalNumPaddedTokens += batchM ? divUpMul(options.mBatchedM[bi], options.mTileM)
+    //                                  : divUpMul(options.mBatchedN[bi], options.mTileN);
+    // }
+    // The size is 1 and the dtype is int32_t.
+    // If isStaticBatch == true, ptrTotalNumPaddedTokens should be set to nullptr and
+    // totalNumPaddedTokens is used.
+    int32_t const* ptrTotalNumPaddedTokens{nullptr};
+
+    // Pointer to the map from the CTA index (in X/Y dim) to the batch index.
+    // Maps CTA index in batch dim (i.e. blockDim.x if batchM, otherwise blockDim.y)
+    // to batch index.
+    // E.g. with listM = 128,255,32 and tileM = 128, should be equal to
+    // ctaIdxXyToBatchIdx = [0, 1, 1, 2]
+    // If isStaticBatch == true, ptrCtaIdxXyToBatchIdx should be set to nullptr and ctaIdxXyToBatchIdx
+    // is used.
+    int32_t const* ptrCtaIdxXyToBatchIdx{nullptr};
+
+    // Pointer from the CTA index X/Y to the expanded tile index where the expanded tile index is
+    // computed as:
+    //
+    // int expandedIdx = 0;
+    // for (int bi = 0; bi < batchIdx-1; ++bi) {
+    //   expandIdx = divUpMul(numTokens[bi], TileM/N);
+    // }
+    // expandIdx += <index in the batch>
+    // E.g. with numTokens = [128,255,32] and tileM = 128, should be equal to
+    // ptrCtaIdxXyToMnLimit = [128, 256, 383, 416]
+    int32_t const* ptrCtaIdxXyToMnLimit{nullptr};
+
+    // Total number of padded tokens - used as the stride for the activation and C scaling factors.
+    // Check ptrTotalNumPaddedTokens to see how it is computed.
+    // If isStaticBatch == true, totalNumPaddedTokens is used, otherwise ptrTotalNumPaddedTokens.
+    int32_t totalNumPaddedTokens;
+
+    // A map from CTA index X/Y to batch index.
+    // Check ptrCtaIdxXyToBatchIdx to see how it is computed.
+    // If isStaticBatch == true, ctaIdxXyToBatchIdx is used, otherwise ptrCtaIdxXyToBatchIdx.
+    int32_t ctaIdxXyToBatchIdx[MaxNumCtas];
+
+    // **Expanded** limits for the batched dimension:
+    //   tile * ctaIdxXyToTileIdxMn[ctaIdxXy] -> ctaIdxXyToMnLimit[ctaIdxXy]
+    // Check ptrCtaIdxXyToMnLimit to see how it is computed.
+    // If isStaticBatch == true, ctaIdxXyToMnLimit is used, otherwise ptrCtaIdxXyToMnLimit.
+    int32_t ctaIdxXyToMnLimit[MaxNumCtas];
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // All-reduce parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // The rank id of the current device in the multi-gpu space.
+    int rank;
+    // The number of peer devices in tensor-parallel group.
+    int tpGrpSize;
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // GatedAct parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // Pointer for partial row max for DeepSeek FP8 recipe.
+    // This is temporary storage for the row max results.
+    // If batchM, the shape is [2, totalNumPaddedTokens, N / 128] and the dtype is float.
+    // Otherwise, the shape is [2, totalNumPaddedTokens, M / 128] and the dtype is float.
+    float* ptrPartialRowMax{nullptr};
+
+    // Flags in global memory that sync on "exit" for row max computation.
+    // The shape is [numTilesM * numTilesN / 2] and the dtype is uint32_t, where
+    // if batchM,
+    // numTilesM = divUp(totalNumPaddedTokens, tileM).
+    // numTilesN = divUp(N, tileN).
+    // Otherwise,
+    // numTilesM = divUp(M, tileM).
+    // numTilesN = divUp(totalNumPaddedTokens, tileN).
+    //
+    // The memory must be set to 0 before the kernel launch.
+    uint32_t* ptrRowMaxCompletionBars{nullptr};
+};
+
+///////////////////////////////////////////////////////////////////////////////////////////////////
+
+} // namespace batchedGemm
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h
index 616383f6a1..f6c8b18092 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/KernelTraits.h
@@ -20,6 +20,7 @@
 #include "trtllm/gen/CommonUtils.h"
 #include "trtllm/gen/DtypeDecl.h"
 #include <cassert>
+#include <stdexcept>
 
 namespace batchedGemm
 {
@@ -77,6 +78,38 @@ public:
     }
 
     // Returns the offset of the ith chunk
+    int32_t getChunkOffsetByName(std::string const& name) const
+    {
+        for (size_t ii = 0; ii < mSmemChunkNames.size(); ++ii)
+        {
+            if (mSmemChunkNames[ii] == name)
+            {
+                return getChunkOffset(ii);
+            }
+        }
+        throw std::runtime_error("Name not found: " + name);
+    }
+
+    // Returns the first chunk reuse flag given chunk name.
+    int getFirstChunkReuseFlagByName(std::string const& name) const
+    {
+        for (size_t ii = 0; ii < mSmemChunkNames.size(); ++ii)
+        {
+            if (mSmemChunkNames[ii] == name)
+            {
+                return getFirstChunkReuseFlag(ii);
+            }
+        }
+        throw std::runtime_error("Name not found: " + name);
+    }
+
+    // Function to calculate the total size of the SMEM array
+    int32_t getTotalSize() const
+    {
+        return getOffsetBeforeChunk(static_cast<int32_t>(mNumBytesAndAlignmentPerSmemChunk.size()));
+    }
+
+private:
     int32_t getChunkOffset(int32_t ii) const
     {
         if (mFirstChunkReuse[ii])
@@ -91,12 +124,6 @@ public:
         return getSizePaddedToAlignment(offset, mNumBytesAndAlignmentPerSmemChunk[ii].second);
     }
 
-    // Function to calculate the total size of the SMEM array
-    int32_t getTotalSize() const
-    {
-        return getOffsetBeforeChunk(static_cast<int32_t>(mNumBytesAndAlignmentPerSmemChunk.size()));
-    }
-
     // Returns the first chunk reuse flag for the ith chunk.
     int getFirstChunkReuseFlag(int32_t ii) const
     {
@@ -139,9 +166,7 @@ int getNumSmemBitsPerElt(tg::Dtype dtype, tg::MmaKind mmaKind)
 {
     if (mmaKind == tg::MmaKind::Auto)
     {
-        std::cout << "mmaKind != tg::MmaKind::Auto" << std::endl;
-        assert(false);
-        return -1;
+        throw std::runtime_error("mmaKind != tg::MmaKind::Auto");
     }
     if (mmaKind == tg::MmaKind::MxFp8Fp6Fp4)
     {
@@ -541,14 +566,14 @@ inline int32_t getTmemBufferSize(KernelTraits traits)
 
 inline int32_t getSmemOffsetLoadA(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(0);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemLoadA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetLoadB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(1);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemLoadB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -562,64 +587,63 @@ inline int32_t getSmemOffsetLoadAb(KernelTraits traits)
 
 inline int32_t getSmemOffsetLoadShuffleB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(2);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBShuffle");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetGmemC(KernelTraits traits, int resIdx = 0)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(3 + resIdx);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemGmemC" + std::to_string(resIdx));
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetRowMax(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(5);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemRowMax");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetSliceK(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(6);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemSliceK");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetPerTokenSf(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(7);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemPerTokenSf");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetBias(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(8);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBias");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetBlockAmax(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(9);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBlockAmax");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetConstSfBuf(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(10);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemConstSfBuf");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t isSmemAbRepurposedToGmemC(KernelTraits traits, int resIdx = 0)
 {
-    // Be conscious that the index (3 + resIdx) should match the index in getSmemOffsetGmemC().
-    return traits.mSmemAllocatorHelper.getFirstChunkReuseFlag(3 + resIdx);
+    return traits.mSmemAllocatorHelper.getFirstChunkReuseFlagByName("smemGmemC" + std::to_string(resIdx));
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -630,28 +654,28 @@ inline int32_t isSmemAbRepurposedToGmemC(KernelTraits traits, int resIdx = 0)
 
 inline int32_t getTmemOffsetD(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(0);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemD");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetA(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(1);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetSfA(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(2);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemSfA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetSfB(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(3);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemSfB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h
index a5cb3ab953..f15f246f81 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/TmaDescriptor.h
@@ -181,6 +181,8 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, st
 
     if (result != CUDA_SUCCESS)
     {
+        char const* errorString;
+        cuGetErrorString(result, &errorString);
         std::stringstream ss;
         ss << "Error: Failed to initialize the TMA descriptor " << result << std::endl;
 
@@ -283,8 +285,10 @@ inline CUtensorMap buildSfTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
 
     if (result != CUDA_SUCCESS)
     {
+        char const* errorString;
+        cuGetErrorString(result, &errorString);
         std::stringstream ss;
-        ss << "Error: Failed to initialize the TMA descriptor for SF " << result << std::endl;
+        ss << "Error: Failed to initialize the TMA descriptor for SF " << errorString << std::endl;
 
         ss << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr << std::endl;
 
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json
index 212cfb88d6..d54e8a3861 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/config.json
@@ -12,7 +12,6 @@
             "epilogueTileM": 128,
             "epilogueTileN": 8,
             "numStages": 4,
-            "numMmaStages": 1,
             "numSlicesForSplitK": 1,
             "useTwoTmaLoadWarps": true,
             "clusterDimX": 1,
@@ -30,7 +29,6 @@
             "sfLayoutB": "8x4",
             "sfLayoutC": "8x4",
             "batch": "N",
-            "useMetaFp8": false,
             "numExperts": 128,
             "useCudaGraph": true
         },
@@ -46,7 +44,6 @@
             "epilogueTileM": 128,
             "epilogueTileN": 8,
             "numStages": 3,
-            "numMmaStages": 1,
             "numSlicesForSplitK": 1,
             "useTwoTmaLoadWarps": true,
             "clusterDimX": 1,
@@ -62,7 +59,6 @@
             "gridWaitForPrimaryA": false,
             "gridWaitForPrimaryB": true,
             "batch": "N",
-            "useMetaFp8": false,
             "numExperts": 128,
             "useCudaGraph": true
         },
@@ -97,7 +93,6 @@
             "hoistMmaTaskTryWaits": true,
             "numStagesMma": 4,
             "batch": "N",
-            "useMetaFp8": false,
             "numExperts": 128,
             "useCudaGraph": true
         }
@@ -107,7 +102,6 @@
             "_template": "BatchedGemmFp4LowLatency",
             "routeAct": false,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": ["bf16", "fp16", "e2m1"],
             "listN": "8,8",
@@ -119,7 +113,6 @@
             "_template": "BatchedGemmPerTensorScalingFp8LowLatency",
             "routeAct": false,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": ["bf16", "fp16", "e4m3"],
             "listN": "8,8",
@@ -131,7 +124,6 @@
             "_template": "BatchedGemmDeepSeekFp8LowLatency",
             "routeAct": false,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": ["bf16", "fp16", "e4m3"],
             "listN": "8,8",
@@ -145,7 +137,6 @@
             "routeAct": true,
             "fusedAct": true,
             "sfLayoutB": "linear",
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": "e2m1",
             "numTokens": 2,
@@ -166,7 +157,6 @@
             "_template": "BatchedGemmFp4LowLatency",
             "routeAct": false,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": "bf16",
             "numTokens": 2,
@@ -191,7 +181,6 @@
             "_template": "BatchedGemmDeepSeekFp8LowLatency",
             "routeAct": true,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": "e4m3",
             "numTokens": 2,
@@ -212,7 +201,6 @@
             "_template": "BatchedGemmDeepSeekFp8LowLatency",
             "routeAct": false,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": "bf16",
             "numTokens": 2,
@@ -233,7 +221,6 @@
             "_template": "BatchedGemmPerTensorScalingFp8LowLatency",
             "routeAct": true,
             "fusedAct": true,
-            "useRoutingScalesOnInput": true,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": "e4m3",
             "numTokens": 2,
@@ -247,7 +234,6 @@
             "_template": "BatchedGemmPerTensorScalingFp8LowLatency",
             "routeAct": false,
             "fusedAct": false,
-            "useRoutingScalesOnInput": false,
             "useUnrollLoop2xForMma": [true, false],
             "dtypeC": "bf16",
             "numTokens": 2,
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
deleted file mode 100644
index f80b9172e6..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
deleted file mode 100644
index de97381a21..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
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-size 691616
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
deleted file mode 100644
index ed326410aa..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
deleted file mode 100644
index 5064016786..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x256u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
+++ /dev/null
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
deleted file mode 100644
index 20888a1d49..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_dynamic_sm100a_cubin.cpp
+++ /dev/null
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
deleted file mode 100644
index a609d1ffe2..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
+++ /dev/null
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deleted file mode 100644
index 6c75e50a77..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_persistent_batchN_dynamic_sm100a_cubin.cpp
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deleted file mode 100644
index 024e1e7caf..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/BatchedGemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x64_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_batchN_sm100a_cubin.cpp
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deleted file mode 100644
index dcb2ed07e4..0000000000
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deleted file mode 100644
index 43a9dab09d..0000000000
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
deleted file mode 100644
index 222e67316c..0000000000
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/batchedGemm/trtllmGen_bmm_export/cubins/Bmm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_bN_ldgsts_silu_dynBatch_sm100a_cubin.cpp
+++ /dev/null
@@ -1,3 +0,0 @@
-version https://git-lfs.github.com/spec/v1
-oid sha256:5330d761614ff56b0dfd60a3b814347901be32a1eb5612e7dd97039ba4ae8d03
-size 646008
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/KernelRunner.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/KernelRunner.cpp
index 761fb475de..744294f34b 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/KernelRunner.cpp
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/KernelRunner.cpp
@@ -113,8 +113,8 @@ void TrtllmGenGemmRunner::run(int32_t m, int32_t n, int32_t k, void const* a, fl
     // FIXME once we start using all-reduce in the epilogue of the gemm this can be moved elsewhere
     gemm.runInitBeforeWorldSync(config, gemmData, static_cast<void*>(stream));
 
-    auto const err = gemm.run(
-        config, workspace, gemmData, static_cast<void*>(stream), multiProcessorCount, globalTrtllmGenGemmModuleCache);
+    auto const err = gemm.run(config, workspace, gemmData, static_cast<void*>(stream), multiProcessorCount,
+        /*usePdl=*/true, globalTrtllmGenGemmModuleCache);
 
     TLLM_CHECK_WITH_INFO(err == 0, "Error occurred when running GEMM!");
 }
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/Enums.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/Enums.h
index 0ff3334a3e..adae51a36d 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/Enums.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/Enums.h
@@ -39,6 +39,31 @@ enum class AllReduceAlgo : uint32_t
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+enum class MatrixLayout
+{
+    // K-major layout (default). [Mn, K]
+    MajorK = 0,
+    // M-major for A and N-major for B. [K, Mn]
+    MajorMn,
+    // Layout is blocked along the K dimension as seen in the diagram below. [K / blockK, Mn, blockK]
+    // where blockK is fixed at 128B
+    //
+    //         ├──────────────  K  ──────────────┤
+    //  ┬  ┬   ├──── K block ───┤
+    //  │  │   │ 0   1   2   3  ║ 32  33  34  35 │
+    //  │ CTA0 │ 4   5   6   7  ║ 36  37  38  39 │
+    //  │  │   │ 8   9   10  11 ║ 40  41  42  43 │
+    //  │  ┴   │ 12  13  14  15 ║ 44  45  46  47 │
+    //  M  ┬   ├────────────────║────────────────┤
+    //  │  │   │ 16  17  18  19 ║ 48  49  50  51 │
+    //  │ CTA1 │ 20  21  22  23 ║ 52  53  54  55 │
+    //  │  │   │ 24  25  26  27 ║ 56  57  58  59 │
+    //  ┴  ┴   │ 28  29  30  31 ║ 60  61  62  63 │
+    BlockMajorK
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 enum class SplitK : uint32_t
 {
     // No split-k is needed. I.e. mNumSlicesForSplitK == 1.
@@ -54,6 +79,20 @@ enum class SplitK : uint32_t
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+enum class BiasType : uint32_t
+{
+    // No bias.
+    None = 0,
+    // One bias value per N of the output tensor.
+    M = 1,
+    // One bias value per row M of the output tensor.
+    N = 2,
+    // One bias value for each element of the output tensor.
+    Mn = 3,
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 enum class TileScheduler
 {
     // Static scheduler (Non-persistent).
@@ -80,6 +119,23 @@ SPLIT_K_FUNCTION(Dsmem)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+// Helper functions to check the Bias type.
+
+#define BIAS_TYPE_FUNCTION(Mode)                                                                                       \
+    inline bool isBiasType##Mode(BiasType type)                                                                        \
+    {                                                                                                                  \
+        return (type == BiasType::Mode);                                                                               \
+    }
+
+BIAS_TYPE_FUNCTION(None)
+BIAS_TYPE_FUNCTION(N)
+BIAS_TYPE_FUNCTION(M)
+BIAS_TYPE_FUNCTION(Mn)
+
+#undef BIAS_TYPE_FUNCTION
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 } // namespace gemm
 
 } // namespace gemm
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmInterface.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmInterface.h
index 459d831e0b..0e7b7c13cc 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmInterface.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmInterface.h
@@ -63,8 +63,10 @@ struct GemmData
     {
         // The matrix A. The data type is controlled by options.mDtypeA.
         //
-        // When transposeMatrixA is false, the shape is [M, K].
-        // Otherwise, the shape is [K, M].
+        // When layoutA is MatrixLayout::MajorK, the shape is [M, K].
+        // When LayoutA is MatrixLayout::MajorMn, the shape is [K, M].
+        // When LayoutA is MatrixLayout::BlockMajorK, the shape is [K / blockK, M, blockK] where blockK
+        // is 128B.
         // The rightmost dimension is contiguous in memory.
         void const* mPtrA{nullptr};
 
@@ -100,8 +102,10 @@ struct GemmData
 
         // The matrix B. The data type is controlled by options.mDtypeB.
         //
-        // When transposeMatrixB is true, the shape is [N, K].
-        // Otherwise, the shape is [K, N].
+        // When layoutB is MatrixLayout::MajorK, the shape is [N, K].
+        // When layoutB is MatrixLayout::MajorMn, the shape is [K, N].
+        // When layoutB is MatrixLayout::BlockMajorK, the shape is [K / blockK, N, blockK] where blockK
+        // is 128B.
         // The rightmost dimension is contiguous in memory.
         void const* mPtrB{nullptr};
 
@@ -142,6 +146,21 @@ struct GemmData
         // The shape is [N]
         void const* mPtrPerTokenSfB{nullptr};
 
+        // The bias applied after the GEMM.
+        // The bias is applied before applying the global scaling factor. I.e.
+        // C' = (A * B + bias') * scaleC
+        // scaleC = dequantA * dequantB * quantC
+        // Thus, the bias' = bias / (dequantA * dequantB), where the bias is the original bias.
+        //
+        // if BiasType is N, the shape is [N].
+        // The bias is broadcasted along the M dimension.
+        //
+        // if BiasType is M, the shape is [M].
+        // The bias is broadcasted along the N dimension.
+        //
+        // The dtype is float32.
+        void const* mPtrBias{nullptr};
+
         // The output tensor scaling factor for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
         // TensorRT-LLM API requires a scaling factor on the device.
         // Shape is [1].
@@ -230,7 +249,7 @@ public:
     // Launch the cubin from the provided config. It calls all necessary memsets for internal buffers.
     // Provided config must be validated with isValidConfig before the call.
     int32_t run(GemmConfig const& config, void* workspace, GemmData const& options, void* cudaStream,
-        int32_t multiProcessorCount,
+        int32_t multiProcessorCount, bool usePdl = true,
         std::optional<std::reference_wrapper<ModuleCache>> moduleCache = std::nullopt) const;
 
     // Initializes the buffers before the world sync. Must be called before run.
@@ -388,8 +407,11 @@ bool GemmInterface::isValidConfig(GemmConfig const& config, GemmData const& data
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 int32_t GemmInterface::run(GemmConfig const& config, void* workspace, GemmData const& data, void* cudaStream,
-    int32_t multiProcessorCount, std::optional<std::reference_wrapper<ModuleCache>> moduleCache) const
+    int32_t multiProcessorCount, bool usePdl, std::optional<std::reference_wrapper<ModuleCache>> moduleCache) const
 {
+    // Might be used.
+    (void) usePdl;
+    (void) moduleCache;
     // Get options from config and data.
     auto options = getOptionsFromConfigAndData(config, data);
 
@@ -417,15 +439,14 @@ int32_t GemmInterface::run(GemmConfig const& config, void* workspace, GemmData c
     int numTilesN = gemm::divUp(options.mN, options.mTileN);
 
     // Create kernel params.
-    auto kernelParams = gemm::KernelParams::setKernelParams(options, data.mInputBuffers.mPtrA,
+    auto kernelParams = gemm::KernelParamsSetup::setKernelParams(options, data.mInputBuffers.mPtrA,
         data.mInputBuffers.mPtrSfA, data.mInputBuffers.mPtrPerTokenSfA, data.mInputBuffers.mPtrB,
-        data.mInputBuffers.mPtrSfB, data.mInputBuffers.mPtrPerTokenSfB, data.mOutputBuffers.mPtrC,
-        data.mOutputBuffers.mPtrSfC, data.mOutputBuffers.mPtrMultiMemC, (float*) data.mInputBuffers.mPtrScaleC,
-        dSplitKSlices, data.mAllReduceBuffers.mPtrTileBars, data.mAllReduceBuffers.mPtrMultiMemTileBars,
-        data.mAllReduceBuffers.mPtrCompletionBars, data.mAllReduceBuffers.mPtrMultiMemCompletionBars,
-        dPtrSplitKCompletionBars,
+        data.mInputBuffers.mPtrSfB, data.mInputBuffers.mPtrPerTokenSfB, data.mInputBuffers.mPtrBias,
+        data.mOutputBuffers.mPtrC, data.mOutputBuffers.mPtrSfC, data.mOutputBuffers.mPtrMultiMemC,
+        (float*) data.mInputBuffers.mPtrScaleC, dSplitKSlices, data.mAllReduceBuffers.mPtrTileBars,
+        data.mAllReduceBuffers.mPtrMultiMemTileBars, data.mAllReduceBuffers.mPtrCompletionBars,
+        data.mAllReduceBuffers.mPtrMultiMemCompletionBars, dPtrSplitKCompletionBars,
         /* dPtrNumNonExitingCtas */ nullptr, data.mProblemDimensions.mRank, data.mProblemDimensions.mWorldSize);
-
     // The size of the grid.
     std::vector<int32_t> grid{numTilesM, numTilesN, options.mNumSlicesForSplitK};
 
@@ -443,26 +464,26 @@ int32_t GemmInterface::run(GemmConfig const& config, void* workspace, GemmData c
 #ifdef TLLM_GEN_EXPORT_INTERFACE
     CUmodule cuModule;
     CUfunction cuFunction;
+
     if (moduleCache.has_value())
     {
         ModuleCache& moduleCacheRef = moduleCache.value().get();
 
-        // Modules are associated with a specific context so include the ctxId in the key
+        // Modules are associated with a specific context, so the context is included in the key
         CUcontext ctx;
         unsigned long long ctxId;
         cuCtxGetCurrent(&ctx);
         cuCtxGetId(ctx, &ctxId);
 
-        // Reinterpret the ctxId as a string to avoid needing a custom hash or converting it to a string in decimal
-        // representation.
+        // Reinterpret the ctxId as a string to avoid needing a custom hash or converting it to a
+        // string in decimal representation.
         std::string const ctxName
             = std::string(reinterpret_cast<char*>(&ctxId), sizeof(unsigned long long) / sizeof(char));
         std::string const funcName = std::string(config.mFunctionName);
-        // As the ctxName is a fixed number of bytes, the two strings can just be appended without risk of a collision
         auto const moduleKey = ctxName + funcName;
         auto module = moduleCacheRef.find(moduleKey);
 
-        // Check if module exists in cache. Otherwise, load it
+        // Use cache if module is found, otherwise load and insert into cache
         if (module != moduleCacheRef.end())
         {
             cuFunction = std::get<1>(module->second);
@@ -492,17 +513,18 @@ int32_t GemmInterface::run(GemmConfig const& config, void* workspace, GemmData c
     // Run the kernel.
     auto result = trtllm::gen::launchKernel((void*) &kernelParams, cudaStream, config.mSharedMemSize, cuFunction,
         block3, grid3, cluster3,
-        config.mOptions.mGridWaitForPrimaryEarlyExit | config.mOptions.mGridWaitForPrimaryA
-            | config.mOptions.mGridWaitForPrimaryB);
-    if (result != CUDA_SUCCESS)
-    {
-        return -1;
-    }
+        usePdl
+            && (config.mOptions.mGridWaitForPrimaryEarlyExit | config.mOptions.mGridWaitForPrimaryA
+                | config.mOptions.mGridWaitForPrimaryB));
     // If a module cache has not been given, unload the module to avoid leaking
     if (!moduleCache.has_value())
     {
         cuModuleUnload(cuModule);
     }
+    if (result != CUDA_SUCCESS)
+    {
+        return -1;
+    }
 #else
     config.mCudaRunner->run((void*) &kernelParams, (void*) cudaStream, grid);
 #endif
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmOptions.h
index 8ab241fc6c..1e3abbfeef 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/GemmOptions.h
@@ -91,20 +91,23 @@ struct GemmOptions
 
     GemmOptions() = default;
 
-    GemmOptions(AllReduceAlgo allReduceAlgo, int clusterDimX, int clusterDimY, int clusterDimZ, tg::Dtype dtypeAcc,
-        tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, bool enablesEarlyExit, bool enablesDelayedEarlyExit,
-        bool enablesGlobalPtxKnobs, int epilogueLdtmDps, int epilogueLdtmBits, int epilogueTileM, int epilogueTileN,
-        bool gridTriggerSecondaryA, bool gridTriggerSecondaryB, bool gridWaitForPrimaryEarlyExit,
-        bool gridWaitForPrimaryA, bool gridWaitForPrimaryB, bool hoistLoadTaskInit, bool hoistMmaTaskTryWaits, int k,
-        KernelTraits kernelTraits, int m, int mmaK, tg::MmaKind mmaKind, int mmaM, int mmaN, bool mockAllReduce, int n,
-        int numSlicesForSplitK, int numSlicesForSliceK, int numStages, int numStagesMma, int numStagesMmaWithinWorkTile,
-        int numStagesMmaAcrossWorkTile, int numStagesWorkId, bool outputDebugTensors, bool useShuffledMatrixA,
-        bool sliceK, SplitK splitK, bool transposeMatrixA, bool transposeMatrixB, bool transposeMmaOutput, int tileM,
+    GemmOptions(AllReduceAlgo allReduceAlgo, BiasType biasType, int blockK, int clusterDimX, int clusterDimY,
+        int clusterDimZ, tg::Dtype dtypeAcc, tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeMmaA,
+        tg::Dtype dtypeMmaB, bool enablesEarlyExit, bool enablesDelayedEarlyExit, bool enablesGlobalPtxKnobs,
+        int epilogueLdtmDps, int epilogueLdtmBits, int epilogueTileM, int epilogueTileN, bool gridTriggerSecondaryA,
+        bool gridTriggerSecondaryB, bool gridWaitForPrimaryEarlyExit, bool gridWaitForPrimaryA,
+        bool gridWaitForPrimaryB, bool hoistLoadTaskInit, bool hoistMmaTaskTryWaits, int k, KernelTraits kernelTraits,
+        MatrixLayout layoutA, MatrixLayout layoutB, int m, int mmaK, tg::MmaKind mmaKind, int mmaM, int mmaN,
+        bool mockAllReduce, int n, int numSlicesForSplitK, int numSlicesForSliceK, int numStages, int numStagesMma,
+        int numStagesMmaWithinWorkTile, int numStagesMmaAcrossWorkTile, int numStagesWorkId, bool outputDebugTensors,
+        bool patchF2fp, bool useShuffledMatrixA, bool sliceK, SplitK splitK, bool transposeMmaOutput, int tileM,
         int tileN, int tileK, bool useUnrollLoop2xForMma, bool useCustomMmaSchedule,
         bool useHoistTryWaitForCustomMmaSchedule, bool useDeepSeekFp8, bool usePerTokenSfA, bool usePerTokenSfB,
         bool useTmaStore, bool useTwoTmaLoadWarps, bool useTwoMmaWarps, tg::SfLayout sfLayoutA, tg::SfLayout sfLayoutB,
-        tg::SfLayout sfLayoutC, TileScheduler tileScheduler)
+        tg::SfLayout sfLayoutC, int sfReshapeFactor, TileScheduler tileScheduler)
         : mAllReduceAlgo{allReduceAlgo}
+        , mBiasType{biasType}
+        , mBlockK(blockK)
         , mClusterDimX{clusterDimX}
         , mClusterDimY{clusterDimY}
         , mClusterDimZ{clusterDimZ}
@@ -112,6 +115,8 @@ struct GemmOptions
         , mDtypeA{dtypeA}
         , mDtypeB{dtypeB}
         , mDtypeC{dtypeC}
+        , mDtypeMmaA{dtypeMmaA}
+        , mDtypeMmaB{dtypeMmaB}
         , mEnablesEarlyExit{enablesEarlyExit}
         , mEnablesDelayedEarlyExit{enablesDelayedEarlyExit}
         , mEnablesGlobalPtxKnobs{enablesGlobalPtxKnobs}
@@ -128,6 +133,8 @@ struct GemmOptions
         , mHoistMmaTaskTryWaits{hoistMmaTaskTryWaits}
         , mK{k}
         , mKernelTraits{kernelTraits}
+        , mLayoutA{layoutA}
+        , mLayoutB{layoutB}
         , mM{m}
         , mMmaK{mmaK}
         , mMmaKind{mmaKind}
@@ -143,11 +150,10 @@ struct GemmOptions
         , mNumStagesMmaAcrossWorkTile{numStagesMmaAcrossWorkTile}
         , mNumStagesWorkId{numStagesWorkId}
         , mOutputDebugTensors{outputDebugTensors}
+        , mPatchF2fp{patchF2fp}
         , mUseShuffledMatrixA{useShuffledMatrixA}
         , mSliceK{sliceK}
         , mSplitK{splitK}
-        , mTransposeMatrixA{transposeMatrixA}
-        , mTransposeMatrixB{transposeMatrixB}
         , mTransposeMmaOutput{transposeMmaOutput}
         , mTileM{tileM}
         , mTileN{tileN}
@@ -164,13 +170,17 @@ struct GemmOptions
         , mSfLayoutA{sfLayoutA}
         , mSfLayoutB{sfLayoutB}
         , mSfLayoutC{sfLayoutC}
+        , mSfReshapeFactor{sfReshapeFactor}
         , mTileScheduler{tileScheduler}
     {
     }
 
     // The all-reduce algorithm.
     AllReduceAlgo mAllReduceAlgo{AllReduceAlgo::None};
-
+    // The type of bias.
+    BiasType mBiasType{BiasType::None};
+    // Block size in the K dimension
+    int mBlockK{-1};
     // Cluster size in X dim.
     int mClusterDimX{1};
     // Cluster size in Y dim.
@@ -185,6 +195,10 @@ struct GemmOptions
     tg::Dtype mDtypeB{tg::Dtype::Void};
     // Data type of the outputs.
     tg::Dtype mDtypeC{tg::Dtype::Void};
+    // Data type of the A matrix for the MMA, if different from the input type.
+    tg::Dtype mDtypeMmaA{tg::Dtype::Void};
+    // Data type of the B matrix for the MMA, if different from the input type.
+    tg::Dtype mDtypeMmaB{tg::Dtype::Void};
     // Whether to enable early exit.
     bool mEnablesEarlyExit{false};
     // Whether to enable delayed early exit to overlap
@@ -225,6 +239,10 @@ struct GemmOptions
     int mK{16 * 16};
     // Traits of the kernel.
     KernelTraits mKernelTraits{};
+    // Layout of A matrix
+    MatrixLayout mLayoutA{MatrixLayout::MajorK};
+    // Layout of B matrix
+    MatrixLayout mLayoutB{MatrixLayout::MajorK};
     // The M dimension of GEMM.
     int mM{128 * 2};
     // Size of the MMA instruction in the K dimension.
@@ -259,16 +277,14 @@ struct GemmOptions
     int mNumStagesWorkId{3};
     // Whether to output debug tensors.
     bool mOutputDebugTensors{false};
+    // Patch float conversions.
+    bool mPatchF2fp{false};
     // Reorder rows/cols in the A matrix for the better memory accesses in the M-major epilogue.
     bool mUseShuffledMatrixA{false};
     // Slice-K implementation to use TileM dimension for TileK.
     bool mSliceK{false};
     // The location of the exchange for split-K (it's None when split-K is disabled).
     SplitK mSplitK{SplitK::None};
-    // Is A matrix in a transposed layout? M major if true, K major otherwise
-    bool mTransposeMatrixA{false};
-    // Is B matrix in a transposed layout? K major if true, N major otherwise
-    bool mTransposeMatrixB{true};
     // Save output of MMA in M-major format.
     bool mTransposeMmaOutput{false};
     // M tile dimension of GEMM.
@@ -303,6 +319,12 @@ struct GemmOptions
     tg::SfLayout mSfLayoutB{tg::SfLayout::R128c4};
     // Scale factors layout for C.
     tg::SfLayout mSfLayoutC{tg::SfLayout::R128c4};
+    // Number of "repeats", i.e. reshaping factor, to fold hidden dimension into SfBlock dimension.
+    // As result, the hidden dimension of the SF tensor must be a multiple of NumRepeats *
+    // numEltsPerSf * 4. This reduces the problem shape space that the kernel is able to run.
+    // But it reduces the number of L2 requests under the hood and potentially improves perf.
+    // Applies to layout 8x4 only.
+    int mSfReshapeFactor{1};
     // Tile scheduler type.
     TileScheduler mTileScheduler{TileScheduler::Static};
 };
@@ -332,6 +354,7 @@ struct GemmConfig
     uint32_t const mSharedMemSize{0};
     char const* mFunctionName{nullptr};
     uint32_t const mNumThreadsPerCTA{0};
+    char const* mHash{nullptr};
 #else
     trtllm::gen::CudaRunner* mCudaRunner{nullptr};
 #endif
@@ -373,6 +396,10 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mAllReduceAlgo="
        << "gemm::AllReduceAlgo(" << static_cast<int32_t>(options.mAllReduceAlgo) << ")"
        << "," << std::endl;
+    ss << "mBiasType="
+       << "gemm::BiasType(" << static_cast<int32_t>(options.mBiasType) << ")"
+       << "," << std::endl;
+    ss << "mBlockK=" << options.mBlockK << "," << std::endl;
     ss << "mClusterDimX=" << options.mClusterDimX << "," << std::endl;
     ss << "mClusterDimY=" << options.mClusterDimY << "," << std::endl;
     ss << "mClusterDimZ=" << options.mClusterDimZ << "," << std::endl;
@@ -388,6 +415,12 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mDtypeC="
        << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeC) << ")"
        << "," << std::endl;
+    ss << "mDtypeMmaA="
+       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeMmaA) << ")"
+       << "," << std::endl;
+    ss << "mDtypeMmaB="
+       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeMmaB) << ")"
+       << "," << std::endl;
     ss << "mEnablesEarlyExit=" << options.mEnablesEarlyExit << "," << std::endl;
     ss << "mEnablesDelayedEarlyExit=" << options.mEnablesDelayedEarlyExit << "," << std::endl;
     ss << "mEnablesGlobalPtxKnobs=" << options.mEnablesGlobalPtxKnobs << "," << std::endl;
@@ -405,6 +438,10 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mK=" << options.mK << "," << std::endl;
     ss << "mKernelTraits={}"
        << "," << std::endl;
+    ss << "mLayoutA=gemm::MatrixLayout(" << static_cast<int32_t>(options.mLayoutA) << ")"
+       << "," << std::endl;
+    ss << "mLayoutB=gemm::MatrixLayout(" << static_cast<int32_t>(options.mLayoutB) << ")"
+       << "," << std::endl;
     ss << "mM=" << options.mM << "," << std::endl;
     ss << "mMmaK=" << options.mMmaK << "," << std::endl;
     ss << "mMmaKind="
@@ -422,13 +459,12 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mNumStagesMmaAcrossWorkTile=" << options.mNumStagesMmaAcrossWorkTile << "," << std::endl;
     ss << "mNumStagesWorkId=" << options.mNumStagesWorkId << "," << std::endl;
     ss << "mOutputDebugTensors=" << options.mOutputDebugTensors << "," << std::endl;
+    ss << "mPatchF2fp=" << options.mPatchF2fp << "," << std::endl;
     ss << "mUseShuffledMatrixA=" << options.mUseShuffledMatrixA << "," << std::endl;
     ss << "mSliceK=" << options.mSliceK << "," << std::endl;
     ss << "mSplitK="
        << "gemm::SplitK(" << static_cast<int32_t>(options.mSplitK) << ")"
        << "," << std::endl;
-    ss << "mTransposeMatrixA=" << options.mTransposeMatrixA << "," << std::endl;
-    ss << "mTransposeMatrixB=" << options.mTransposeMatrixB << "," << std::endl;
     ss << "mTransposeMmaOutput=" << options.mTransposeMmaOutput << "," << std::endl;
     ss << "mTileM=" << options.mTileM << "," << std::endl;
     ss << "mTileN=" << options.mTileN << "," << std::endl;
@@ -451,6 +487,7 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mSfLayoutC="
        << "trtllm::gen::SfLayout(" << static_cast<int32_t>(options.mSfLayoutC) << ")"
        << "," << std::endl;
+    ss << "mSfReshapeFactor=" << options.mSfReshapeFactor << "," << std::endl;
     ss << "mTileScheduler="
        << "gemm::TileScheduler(" << static_cast<int32_t>(options.mTileScheduler) << ")" << std::endl;
     return ss.str();
@@ -490,6 +527,7 @@ inline int32_t getShuffleBlockSize(int epilogueTileM)
 inline bool checkAndUpdateGemmOptions(
     GemmOptions& options, bool isBlackwell, int /* tpGrpSize */, bool updateOptions = true)
 {
+
     if (options.mDtypeB == tg::Dtype::Void)
     {
         if (updateOptions)
@@ -502,39 +540,98 @@ inline bool checkAndUpdateGemmOptions(
         }
     }
 
+    // If not specified, used the input dtypes as MMA dtypes (no cast required).
+    if (options.mDtypeMmaA == tg::Dtype::Void)
+    {
+        if (updateOptions)
+        {
+            options.mDtypeMmaA = options.mDtypeA;
+        }
+        else
+        {
+            return false;
+        }
+    }
+    if (options.mDtypeMmaB == tg::Dtype::Void)
+    {
+        if (updateOptions)
+        {
+            options.mDtypeMmaB = options.mDtypeB;
+        }
+        else
+        {
+            return false;
+        }
+    }
+
+    // Check that the A cast is supported.
+    // Currently, we only support {MxFp4, NvFp4} -> Bf16.
+    TLLM_CHECK_ERROR((options.mDtypeA == options.mDtypeMmaA)
+            || ((options.mDtypeA == tg::Dtype::MxE2m1 || options.mDtypeA == tg::Dtype::E2m1)
+                && options.mDtypeMmaA == tg::Dtype::Bfloat16)
+            || (options.mDtypeA == tg::Dtype::E2m1 && options.mDtypeMmaA == tg::Dtype::E4m3),
+        "Unsupported cast for A: ", tg::dtypeToString(options.mDtypeA), " -> ", tg::dtypeToString(options.mDtypeMmaA));
+
+    // Check that the B cast is supported.
+    // Currently, we only support Fp8 -> MxFp8.
+    // TODO: add same support for A (no transpose)
+    TLLM_CHECK_ERROR((options.mDtypeB == options.mDtypeMmaB)
+            || (options.mDtypeB == tg::Dtype::E4m3 && options.mDtypeMmaB == tg::Dtype::MxE4m3),
+        "Unsupported cast for B: ", tg::dtypeToString(options.mDtypeB), " -> ", tg::dtypeToString(options.mDtypeMmaB));
+
+    if (options.mDtypeA != options.mDtypeMmaA)
+    {
+        TLLM_CHECK_ERROR(options.mTileM == 128, "TileM must be 128 when casting the input matrix A before the MMA.");
+    }
+
+    if (options.mPatchF2fp)
+    {
+        TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::MxE2m1 && options.mDtypeMmaA == tg::Dtype::Bfloat16,
+            "PatchF2fp is only supported for MxFp4 to Bf16 casts.");
+    }
+
     // FIXME: We do not support different dtypes for A and B when not on Blackwell.
     if (!isBlackwell)
     {
-        TLLM_CHECK_ERROR(options.mDtypeA == options.mDtypeB, "For non-Blackwell, A and B must have the same dtype.");
+        TLLM_CHECK_ERROR(
+            options.mDtypeMmaA == options.mDtypeMmaB, "For non-Blackwell, A and B must have the same dtype.");
     }
 
     // Check that the different dtypes for A and B are supported by the tensor core
     // kind::f8f6f4
-    if (options.mDtypeA == tg::Dtype::E4m3 || options.mDtypeA == tg::Dtype::E2m1)
+    if (options.mDtypeMmaA == tg::Dtype::E4m3 || options.mDtypeMmaA == tg::Dtype::E2m1)
     {
-        TLLM_CHECK_ERROR(options.mDtypeB == tg::Dtype::E4m3 || options.mDtypeB == tg::Dtype::E2m1,
-            "For E4m3/E2m1 A, B must also be E4m3/E2m1.");
+        TLLM_CHECK_ERROR(options.mDtypeMmaB == tg::Dtype::E4m3 || options.mDtypeMmaB == tg::Dtype::E2m1,
+            "For dtypeMmaA = E4m3/E2m1 A, dtypeMmaB must also be E4m3/E2m1.");
     }
 
     // kind::mxf8f6f4
-    if (options.mDtypeA == tg::Dtype::MxE4m3 || options.mDtypeA == tg::Dtype::MxE2m1)
+    if (options.mDtypeMmaA == tg::Dtype::MxE4m3 || options.mDtypeMmaA == tg::Dtype::MxE2m1)
     {
-        TLLM_CHECK_ERROR(options.mDtypeB == tg::Dtype::MxE4m3 || options.mDtypeB == tg::Dtype::MxE2m1,
-            "For dtypeA = MxE4m3 or MxE2m1, dtypeB must also be MxE4m3 or MxE2m1.");
+        TLLM_CHECK_ERROR(options.mDtypeMmaB == tg::Dtype::MxE4m3 || options.mDtypeMmaB == tg::Dtype::MxE2m1,
+            "For dtypeMmaA = MxE4m3 or MxE2m1, dtypeMmaB must also be MxE4m3 or MxE2m1.");
     }
-    if (options.mDtypeB == tg::Dtype::MxE4m3 || options.mDtypeB == tg::Dtype::MxE2m1)
+    if (options.mDtypeMmaB == tg::Dtype::MxE4m3 || options.mDtypeMmaB == tg::Dtype::MxE2m1)
     {
-        TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::MxE4m3 || options.mDtypeA == tg::Dtype::MxE2m1,
-            "For dtypeB = MxE4m3 or MxE2m1, dtypeA must also be MxE4m3 or MxE2m1.");
+        TLLM_CHECK_ERROR(options.mDtypeMmaA == tg::Dtype::MxE4m3 || options.mDtypeMmaA == tg::Dtype::MxE2m1,
+            "For dtypeMmaB = MxE4m3 or MxE2m1, dtypeMmaA must also be MxE4m3 or MxE2m1.");
     }
 
     // kind::f16
-    if (options.mDtypeA == tg::Dtype::Fp16 || options.mDtypeA == tg::Dtype::Bfloat16)
+    if (options.mDtypeMmaA == tg::Dtype::Fp16 || options.mDtypeMmaA == tg::Dtype::Bfloat16)
     {
-        TLLM_CHECK_ERROR(options.mDtypeB == options.mDtypeA, "For Fp16/Bfloat16 A, B must be the same type as A.");
+        TLLM_CHECK_ERROR(options.mDtypeMmaB == options.mDtypeMmaA,
+            "For dtypeMmaA = Fp16/Bfloat16, dtypeMmaB must be the same as dtypeMmaA.");
     }
 
-    // When different dtype are used for A and B, we must use different tile to do the loading.
+    // When one of the inputs needs to be cast, we must use two load warps.
+    if ((options.mDtypeMmaA != options.mDtypeA || options.mDtypeMmaB != options.mDtypeB)
+        && !options.mUseTwoTmaLoadWarps)
+    {
+        TLLM_LOG_WARNING("Two TMA load warps must be enabled if any of the inputs needs to be cast.");
+    }
+
+    // When different dtypes are used for A and B, we must use different tiles to do the loading.
     // It is not strictly required, but current implementation of SmemAb requires that.
     if (options.mDtypeA != options.mDtypeB)
     {
@@ -547,7 +644,7 @@ inline bool checkAndUpdateGemmOptions(
     {
         if (updateOptions)
         {
-            options.mMmaKind = dtypeGetMmaKind(options.mDtypeA, options.mDtypeB);
+            options.mMmaKind = dtypeGetMmaKind(options.mDtypeMmaA, options.mDtypeMmaB);
         }
         else
         {
@@ -555,11 +652,6 @@ inline bool checkAndUpdateGemmOptions(
         }
     }
 
-    if (options.mMmaKind == tg::MmaKind::Fp16)
-    {
-        TLLM_CHECK_ERROR(options.mDtypeA == options.mDtypeB, "For Fp16 MMA, A and B must have the same dtype.");
-    }
-
     if ((options.mMmaKind == tg::MmaKind::Fp8Fp6Fp4 || options.mMmaKind == tg::MmaKind::MxFp8Fp6Fp4)
         && options.mMmaK != 32)
     {
@@ -626,9 +718,6 @@ inline bool checkAndUpdateGemmOptions(
     {
         TLLM_CHECK_ERROR(isBlackwell, "Block scaling is only supported on Blackwell");
 
-        TLLM_CHECK_ERROR(options.mSfLayoutB == tg::SfLayout::R128c4 || options.mSfLayoutB == tg::SfLayout::R8c4,
-            "Only the 128x4 and 8x4 SF layouts are supported for B, got ", tg::sfLayoutToString(options.mSfLayoutB));
-
         int const mmaK = (options.mMmaKind == tg::MmaKind::MxFp4NvFp4) ? 64 : 32;
         if (options.mMmaK != mmaK)
         {
@@ -646,21 +735,56 @@ inline bool checkAndUpdateGemmOptions(
             }
         }
 
+        // The MMA N may only be smaller than 64 if it is equal to the tile N.
+        TLLM_CHECK_ERROR(options.mMmaN >= 64 || options.mMmaN == options.mTileN, "MmaN (", options.mMmaN,
+            ") must be >= 64 or equal to TileN (", options.mTileN, ")");
+    }
+    if (tg::dtypeIsBlockFmt(options.mDtypeA))
+    {
+        int numEltsPerSfA = tg::dtypeNumEltsPerSf(options.mDtypeA);
+        TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSfA) == 0, "TileK (", options.mTileK,
+            ") must be a multiple of ", (4 * numEltsPerSfA), " for typeA ", gemm::toString(options.mDtypeA));
+        auto const numEltsPerSfAInK = options.mK / numEltsPerSfA;
+        TLLM_CHECK_ERROR(numEltsPerSfAInK % 4 == 0, "K dimension of scaling factors for A (", numEltsPerSfAInK,
+            ") must be a multiple of 4");
+    }
+    if (tg::dtypeIsBlockFmt(options.mDtypeB))
+    {
+        TLLM_CHECK_ERROR(options.mSfLayoutB == tg::SfLayout::R128c4 || options.mSfLayoutB == tg::SfLayout::R8c4
+                || options.mSfLayoutB == tg::SfLayout::Linear,
+            "Only the 128x4 and 8x4 SF layouts are supported for B, got ", tg::sfLayoutToString(options.mSfLayoutB));
+
         // TileN must be a multiple of the number of rows per SF tile.
         int const numSfTileRowsB = options.mSfLayoutB == tg::SfLayout::R128c4 ? 128 : 8;
         TLLM_CHECK_ERROR(options.mTileN % numSfTileRowsB == 0, "TileN (", options.mTileN, ") must be a multiple of ",
             numSfTileRowsB, " for B SF layout ", tg::sfLayoutToString(options.mSfLayoutB));
-        // The MMA N may only be smaller than 64 if it is equal to the tile N.
-        TLLM_CHECK_ERROR(options.mMmaN >= 64 || options.mMmaN == options.mTileN, "MmaN (", options.mMmaN,
-            ") must be >= 64 or equal to TileN (", options.mTileN, ")");
 
-        int numEltsPerSfA = tg::dtypeNumEltsPerSf(options.mDtypeA);
         int numEltsPerSfB = tg::dtypeNumEltsPerSf(options.mDtypeB);
-        TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSfA) == 0, "TileK (", options.mTileK,
-            ") must be a multiple of ", (4 * numEltsPerSfA), " for typeA ", gemm::toString(options.mDtypeA));
         TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSfB) == 0, "TileK (", options.mTileK,
             ") must be a multiple of ", (4 * numEltsPerSfB), " for typeB ", gemm::toString(options.mDtypeB));
+        auto const numEltsPerSfBInK = options.mK / numEltsPerSfB;
+        TLLM_CHECK_ERROR(numEltsPerSfBInK % 4 == 0, "K dimension of scaling factors for B (", numEltsPerSfBInK,
+            ") must be a multiple of 4");
     }
+
+    int32_t padMultiplierA = 1;
+    int32_t padMultiplierB = 1;
+    if (options.mMmaKind == tg::MmaKind::MxFp8Fp6Fp4)
+    {
+        if (options.mDtypeA == tg::Dtype::MxE2m1)
+        {
+            padMultiplierA = 2;
+        }
+        if (options.mDtypeB == tg::Dtype::MxE2m1)
+        {
+            padMultiplierB = 2;
+        }
+    }
+    TLLM_CHECK_ERROR((padMultiplierA * tg::dtypeGetNumBits(options.mDtypeA) * options.mK / 8) % 16 == 0,
+        "K dimension of A must be aligned to 16 bytes.");
+    TLLM_CHECK_ERROR((padMultiplierB * tg::dtypeGetNumBits(options.mDtypeB) * options.mK / 8) % 16 == 0,
+        "K dimension of B must be aligned to 16 bytes.");
+
     if (options.mDtypeC == tg::Dtype::E2m1 || options.mDtypeC == tg::Dtype::MxE4m3)
     {
         TLLM_CHECK_ERROR(isBlackwell, "Block scaling is only supported on Blackwell");
@@ -668,8 +792,10 @@ inline bool checkAndUpdateGemmOptions(
         TLLM_CHECK_ERROR(options.mSfLayoutC == tg::SfLayout::R128c4 || options.mSfLayoutC == tg::SfLayout::R8c4,
             "Only the 128x4 and 8x4 SF layouts are supported for C.");
         int const numSfTileRowsC = options.mSfLayoutC == tg::SfLayout::R128c4 ? 128 : 8;
-        TLLM_CHECK_ERROR(options.mTileN % numSfTileRowsC == 0, "TileN (", options.mTileN, ") must be a multiple of ",
-            numSfTileRowsC, " for C SF layout ", tg::sfLayoutToString(options.mSfLayoutC));
+        int const tileTokenDim = options.mTransposeMmaOutput ? options.mTileN : options.mTileM;
+        TLLM_CHECK_ERROR_FMT(tileTokenDim % numSfTileRowsC == 0,
+            "Tile%s (%d) must be a multiple of %d for C SF layout %s", options.mTransposeMmaOutput ? "N" : "M",
+            tileTokenDim, numSfTileRowsC, tg::sfLayoutToString(options.mSfLayoutC).c_str());
 
         int const hiddenDim = options.mTransposeMmaOutput ? options.mM : options.mN;
         int const hiddenGranularity = 4 * tg::dtypeNumEltsPerSf(options.mDtypeC);
@@ -753,7 +879,6 @@ inline bool checkAndUpdateGemmOptions(
 
     TLLM_CHECK_ERROR(options.mM > 0 && options.mN > 0 && options.mK > 0, "M, N and K must be larger than 0");
     TLLM_CHECK_ERROR(options.mNumSlicesForSplitK > 0, "Split K must be larger than 0.");
-    TLLM_CHECK_ERROR(options.mK % options.mTileK == 0, "K must be a multiple of TileK");
 
     if (options.mUseShuffledMatrixA)
     {
@@ -911,6 +1036,11 @@ inline bool checkAndUpdateGemmOptions(
     {
         TLLM_CHECK_ERROR(
             options.mNumStagesMmaWithinWorkTile == 1, "Non-DeepSeekFp8 requires numStagesMmaWithinWorkTile == 1");
+        if (options.mNumStagesMma > 1)
+        {
+            TLLM_CHECK_ERROR(options.mTileScheduler == TileScheduler::Persistent,
+                "Non-DeepSeekFp8 requires persistent scheduler when using numStagesMma >1");
+        }
     }
     if (options.mUseDeepSeekFp8)
     {
@@ -923,6 +1053,7 @@ inline bool checkAndUpdateGemmOptions(
 
         // Check that TileK = 128 for correct scaling of every 128 channels.
         TLLM_CHECK_ERROR(options.mTileK == 128, "Tile-K must be equal to 128 for DeepSeek Fp8");
+        TLLM_CHECK_ERROR(options.mK % options.mTileK == 0, "K must be a multiple of TileK");
         // Tile sizes of the output hidden dimension.
         auto hiddenDimPerOutputTile = options.mTransposeMmaOutput ? options.mTileM : options.mTileN;
         auto hiddenDimPerEpilogueTile = options.mTransposeMmaOutput ? options.mEpilogueTileM : options.mEpilogueTileN;
@@ -997,14 +1128,22 @@ inline bool checkAndUpdateGemmOptions(
 
     if (options.mUseUnrollLoop2xForMma)
     {
-        bool notSupported = (options.mK / options.mNumSlicesForSplitK) % (options.mTileK * 2) != 0;
-        // Check that the 2*TileK is a multiple of MmaK when UnrollLoop2x is enabled.
-        // This is to avoid deadlock when mma runs even-numbered loop while the other warps run
-        // odd-numbered loop.
+        // Number of iterations in K dimension after padding.
+        // Note the perCtaK in each CTA in the splitK group are padded to the same number of iterations.
+        // E.g., K = 512, TileK = 128, numSlicesForSplitK = 3. Then the padded K is
+        //
+        //   ceil(512 / (128*3)) * (128*3) = 768
+        //
+        int paddedK = divUpMul(options.mK, options.mTileK * options.mNumSlicesForSplitK);
+        // Check that the padded K (K rounded to next multiple of tileK) is a multiple of 2*TileK when
+        // UnrollLoop2x is enabled. This is to avoid deadlock when mma runs even-numbered loop while the
+        // other warps run odd-numbered loop.
+        //
+        bool notSupported = (paddedK / options.mNumSlicesForSplitK) % (options.mTileK * 2) != 0;
         if (notSupported)
         {
             TLLM_LOG_WARNING("Size K / splitK must be a multiple of TileK * 2. Found TileK=", options.mTileK,
-                " and K=", options.mK, " and numSlicesForSplitK=", options.mNumSlicesForSplitK,
+                " and K=", options.mK, " (paddedK=", paddedK, ") and numSlicesForSplitK=", options.mNumSlicesForSplitK,
                 ". Disabling unrollLoop2xForMma.");
             if (updateOptions)
             {
@@ -1059,43 +1198,108 @@ inline bool checkAndUpdateGemmOptions(
     //
     // Kernel 1:  ----PREEXIT-----------FLUSH
     // Kernel 2:      -------PREEXIT----ACQBULK---FLUSH
-    // Kernel 3:  Warp 0:           ---- (!) Output of 1,2 is not yet visible -----------------------
-    //            Warp 1:           ---- (!) We normally assume that 1 is visible is not yet visible-
-    //            Warp 2:           -------------------ACQBULK-- Kernel 1,2 output visible ----------
+    // Kernel 3:  Warp 0:           ---- (!) Output of 1,2 is not yet visible
+    // -----------------------
+    //            Warp 1:           ---- (!) We normally assume that 1 is visible is not yet
+    //            visible- Warp 2:           -------------------ACQBULK-- Kernel 1,2 output visible
+    //            ----------
     TLLM_CHECK_ERROR((options.mGridWaitForPrimaryA || !options.mGridTriggerSecondaryA),
         "A: If a task triggers a secondary kernel, it must also wait for primary kernel.");
     TLLM_CHECK_ERROR((options.mGridWaitForPrimaryB || !options.mGridTriggerSecondaryB),
         "B: If a task triggers a secondary kernel, it must also wait for primary kernel.");
 
+    if (options.mUsePerTokenSfA || options.mUsePerTokenSfB)
+    {
+        // Checks applicable to both MetaFP8 and RoutingScalesOnInput
+        TLLM_CHECK_ERROR(!options.mUseDeepSeekFp8, "DeepSeek FP8 and per-token scaling are not compatible");
+        TLLM_CHECK_ERROR(isBlackwell, "Per-token scaling is not supported for Hopper");
+        if (options.mUsePerTokenSfA && options.mUsePerTokenSfB)
+        {
+            // MetaFP8 case
+            TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::E4m3 && options.mDtypeB == tg::Dtype::E4m3,
+                "A and B dtype must be E4m3 for Meta Fp8. Found dtypeA=", tg::dtypeToString(options.mDtypeA),
+                " dtypeB=", tg::dtypeToString(options.mDtypeB));
+        }
+        else
+        {
+            // RoutingScalesOnInput case
+            TLLM_CHECK_ERROR((options.mUsePerTokenSfA && !options.mTransposeMmaOutput)
+                    || (options.mUsePerTokenSfB && options.mTransposeMmaOutput),
+                "In RoutingScalesOnInput mode, perToken scales must be used on activations");
+        }
+    }
+
     // The generation should support non K-major layouts for both A and B; however, it is unclear if
     // there is a use-case
-    TLLM_CHECK_ERROR(!options.mTransposeMatrixA || options.mTransposeMatrixB,
-        "TransposeA true and TransposeB false is not supported");
+    TLLM_CHECK_ERROR((options.mLayoutA == MatrixLayout::MajorK) || (options.mLayoutB == MatrixLayout::MajorK),
+        "At least one matrix must be in k-major layout");
 
     // Some features are currently only support when both matrices are in K-major format
-    if (options.mTransposeMatrixA || !options.mTransposeMatrixB)
+    if (options.mLayoutB != MatrixLayout::MajorK || options.mLayoutB != MatrixLayout::MajorK)
     {
         TLLM_CHECK_ERROR(isBlackwell, "Non K-major layouts are only supported on Blackwell");
         TLLM_CHECK_ERROR(options.mSplitK == SplitK::None, "Non K-major layouts do not support split K");
     }
-    if (options.mTransposeMatrixA)
+    if (options.mLayoutA == MatrixLayout::MajorMn)
     {
         TLLM_CHECK_ERROR(tg::dtypeGetNumBits(options.mDtypeA) >= 8, "Subbyte types only support K major layout");
     }
-    if (!options.mTransposeMatrixB)
+    if (options.mLayoutB == MatrixLayout::MajorMn)
     {
         TLLM_CHECK_ERROR(tg::dtypeGetNumBits(options.mDtypeB) >= 8, "Subbyte types only support K major layout");
     }
 
+    if ((options.mLayoutA == MatrixLayout::BlockMajorK) || (options.mLayoutB == MatrixLayout::BlockMajorK))
+    {
+        bool const isBlockA = options.mLayoutA == MatrixLayout::BlockMajorK;
+
+        // Block K size must be 128B.
+        // TODO Leaving this as an option for now in case we want to expertiment with other block sizes
+        // As the user is not expected to set this, do not fail if updateOptions is false
+        int32_t const elemSizeInBits
+            = (isBlockA) ? tg::dtypeGetNumBits(options.mDtypeA) : tg::dtypeGetNumBits(options.mDtypeB);
+        int32_t const elemsIn128B = 128 * 8 /* Bits in byte */ / elemSizeInBits;
+
+        if (options.mBlockK != elemsIn128B)
+        {
+            if (updateOptions)
+            {
+                options.mBlockK = elemsIn128B;
+            }
+            else
+            {
+                return false;
+            }
+        }
+
+        if (options.mBlockK > options.mTileK)
+        {
+            TLLM_CHECK_ERROR(options.mBlockK % options.mTileK == 0,
+                "If block size is greater than tile size, block size must be a multiple of tile size");
+        }
+        else if (options.mBlockK < options.mTileK)
+        {
+            TLLM_CHECK_ERROR(options.mTileK % options.mBlockK == 0,
+                "If tile size is greater than block size, tile size must be a multiple of block size");
+        }
+    }
+
+    if (!isBiasTypeNone(options.mBiasType))
+    {
+        TLLM_CHECK_ERROR(!isBiasTypeMn(options.mBiasType), "BiasType::Mn is not supported");
+        TLLM_CHECK_ERROR(!options.mUseDeepSeekFp8, "Bias is not supported for DeepSeek Fp8");
+        TLLM_CHECK_ERROR(!(options.mUsePerTokenSfA && options.mUsePerTokenSfB), "Bias is not supported for Meta Fp8");
+    }
+
     if (updateOptions)
     {
         // Init kernel traits.
         options.mKernelTraits = KernelTraits(options.mDtypeA, options.mDtypeB, options.mDtypeC, options.mDtypeAcc,
-            options.mMmaKind, options.mTileM, options.mTileN, options.mTileK, options.mEpilogueTileM,
-            options.mEpilogueTileN, options.mNumStages, options.mNumStagesMma, options.mNumSlicesForSplitK,
-            options.mNumSlicesForSliceK, options.mSplitK, options.mUseTmaStore, options.mTransposeMmaOutput,
-            options.mAllReduceAlgo, options.mTileScheduler == TileScheduler::Persistent, options.mUseDeepSeekFp8,
-            options.mUsePerTokenSfA, options.mUsePerTokenSfB);
+            options.mDtypeMmaA, options.mDtypeMmaB, options.mMmaKind, options.mTileM, options.mTileN, options.mTileK,
+            options.mEpilogueTileM, options.mEpilogueTileN, options.mNumStages, options.mNumStagesMma,
+            options.mNumSlicesForSplitK, options.mNumSlicesForSliceK, options.mSplitK, options.mUseTmaStore,
+            options.mTransposeMmaOutput, options.mAllReduceAlgo, options.mTileScheduler == TileScheduler::Persistent,
+            options.mUseDeepSeekFp8, options.mUsePerTokenSfA, options.mUsePerTokenSfB, options.mBiasType);
     }
 
     return true;
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelMetaInfo.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelMetaInfo.h
index 5d55ff418b..7a748fefae 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelMetaInfo.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelMetaInfo.h
@@ -28,113 +28,115 @@ namespace kernels
 {
 // clang-format off
 
-#define TLLM_GEN_COMMIT "744dc79e"
-#define TLLM_GEN_EXPORT_VERSION "6.0"
+#define TLLM_GEN_COMMIT "32110ebf-dirty"
+#define TLLM_GEN_EXPORT_VERSION "7.0"
 
 static constexpr size_t tllmGenGemmListLen = 46;
 
 #ifndef EXCLUDE_SM_100
-extern unsigned char GemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp32_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin[];
-extern unsigned char GemmKernel_Fp32_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x128x256u2_s3_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin[];
+extern unsigned char Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
+extern unsigned char Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin[];
 #endif // EXCLUDE_SM_100
 
 #ifndef EXCLUDE_SM_100
-extern unsigned int GemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp32_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len;
-extern unsigned int GemmKernel_Fp32_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x128x256u2_s3_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
+extern unsigned int Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len;
 #endif // EXCLUDE_SM_100
 
 
 static const gemm::GemmConfig tllmGenGemmList[] = {
 #ifndef EXCLUDE_SM_100
-{GemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin, GemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len, 150528, "gemmKernel_Bfloat16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a", 320, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{Gemm_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin, Gemm_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len, 150528, "gemm_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a", 320, "67bad780d8f03b24804e34cc5317720c13949c72009f311e9d17a1cd6b10819a", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -142,6 +144,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -158,6 +162,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
@@ -173,11 +179,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 0
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -194,9 +199,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 175104, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 175104, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "f71c31c377d83567ce6db02f270354c85d9cab4e8543726c4f0322121eea617c", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -204,6 +212,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -220,6 +230,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -235,11 +247,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -256,9 +267,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 175104, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 175104, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "257908af538388410f3ec0d3e5108e288a5c77d2f9b02383618d5fb08002ee51", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -266,6 +280,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -282,6 +298,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -297,11 +315,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -318,9 +335,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len, 168960, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len, 168960, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a", 224, "550d553ade1407a25f2520568149e07b978f150afef43118397e6aa90111bd9b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -328,6 +348,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -344,6 +366,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -359,11 +383,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 0
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -380,9 +403,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 84992, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 84992, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "de2f28d823b6eb726debee79d8733d8656821252accd929d3158cace2b6a845a", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -390,6 +416,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -406,6 +434,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -421,11 +451,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -442,9 +471,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 84992, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 84992, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "e103cc3353cc9f652e99cbf588ba053ba3b914596dd93c87b25f6e7f1225b5cc", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -452,6 +484,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -468,6 +502,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -483,11 +519,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -504,9 +539,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 97280, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 97280, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "a75f88e0c9791b7f53e6c6e764784015b47b2f0a97b22896823a15cc64f69e5a", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -514,6 +552,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -530,6 +570,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -545,11 +587,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 32
@@ -566,9 +607,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 97280, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 97280, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "dca5f0c1dcb998e0baa7db6c4a023d5a06e19de4dbb9ce9edb6dd9edc89bb431", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -576,6 +620,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -592,6 +638,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -607,11 +655,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 32
@@ -628,9 +675,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 123904, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 123904, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "ba2d2e2e05b540cf1f56d35c87287a255f1d2043e8970acaf57c928bb5ece183", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -638,6 +688,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -654,6 +706,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -669,11 +723,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 64
@@ -690,9 +743,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 123904, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 123904, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "3128c19b37c22de699fc92e22cbee5d4b05c28dfb85418044ce1eee6f3e9744f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -700,6 +756,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -716,6 +774,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -731,11 +791,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 64
@@ -752,9 +811,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 78848, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 78848, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "34d0f58dd43e9428e983e7b8bc8c1d703ee9a0cc46f73cb0bf99c40f7de542df", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -762,6 +824,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -778,6 +842,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -793,11 +859,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -814,9 +879,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 78848, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 78848, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "007f0ffe31b6104e71385d9f7f378e7974fd942fb6f528eb3ac28b387eed6338", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -824,6 +892,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -840,6 +910,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -855,11 +927,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -876,9 +947,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 217088, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 217088, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 224, "cd112e5364c7b204daf52b09f6fc23d37f7292fa14f970b050905c53cd71e487", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -886,6 +960,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -902,6 +978,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -917,11 +995,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -938,9 +1015,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin_len, 215040, "gemmKernel_Bfloat16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin, Gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin_len, 215040, "gemm_Bfloat16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a", 224, "cb469548e2f1507579cf58c9cd864472a38203939a81cecd43376c8086839601", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 2
@@ -948,6 +1028,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -964,6 +1046,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -979,11 +1063,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(2)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -1000,9 +1083,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 225280, "gemmKernel_Bfloat16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 225280, "gemm_Bfloat16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 448, "6aad723e3a1f1267f892edbc89a7b95e7058daaae6e65c7a1d8a81968b42df58", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1010,6 +1096,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826828)
 , /* mDtypeB */ trtllm::gen::Dtype(17827853)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826828)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17827853)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1026,6 +1114,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(5)
@@ -1041,11 +1131,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -1062,9 +1151,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 158720, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 158720, "gemm_E4m3_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "fd16bb4cb68c22a7d6135c131cf9458e054960de0adad06a596aca06a0d4f723", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1072,6 +1164,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1088,6 +1182,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1103,11 +1199,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -1124,9 +1219,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 158720, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 158720, "gemm_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "92f81034b485c2b6724cb83002fdcddb1d102a21b69e265c851263198b16d15b", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1134,6 +1232,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1150,6 +1250,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1165,11 +1267,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -1186,9 +1287,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len, 218112, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x128x256u2_s3_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x128x256u2_s3_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len, 218112, "gemm_E4m3_E4m3E4m3_Fp32_t128x128x256u2_s3_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a", 224, "0b5cf51c225dd33ce5348a23c87bce062df590938af2547a8408e6bddf563bb5", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1196,6 +1300,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1212,6 +1318,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1227,11 +1335,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 0
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -1248,9 +1355,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 82944, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 82944, "gemm_E4m3_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "35b5bd8342a4ae619b7a441f48e5c96afe7047c4c05e8e8a2fed2023699008bd", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1258,6 +1368,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1274,6 +1386,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1289,11 +1403,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -1310,9 +1423,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 82944, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 82944, "gemm_E4m3_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "995b3f8d3be717372fceccd1bcbf9d811a191685ae50208f29f9779b0f1c20e1", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1320,6 +1436,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1336,6 +1454,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1351,11 +1471,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -1372,9 +1491,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 93184, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 93184, "gemm_E4m3_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "4ae45f02a96abc1fee68d5d482590733206bb21974d7540b244c72599d42b029", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1382,6 +1504,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1398,6 +1522,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1413,11 +1539,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 32
@@ -1434,9 +1559,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 93184, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 93184, "gemm_E4m3_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "eb325f16f32466cef919bc05f3a08c49ca6ca7d4fb02cb87086a33b3c2893ae6", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1444,6 +1572,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1460,6 +1590,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1475,11 +1607,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 32
@@ -1496,9 +1627,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 115712, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 115712, "gemm_E4m3_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "e0cde71b5344cd24a607f59f690775b198c2dbe8caf1194b82ebfcfe0e7d22a1", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1506,6 +1640,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1522,6 +1658,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1537,11 +1675,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 64
@@ -1558,9 +1695,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 115712, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 115712, "gemm_E4m3_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "f9407c6f8fba4f59f4f8568987b1d29a542fc3076e8cdff5cb80e74d9f4ddcf0", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1568,6 +1708,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1584,6 +1726,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1599,11 +1743,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 64
@@ -1620,9 +1763,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 78848, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 78848, "gemm_E4m3_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "2cfc6cace0893b2a2866d06b24146d77b9c2568d371b9e41337f99f020ddf6e9", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1630,6 +1776,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1646,6 +1794,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1661,11 +1811,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -1682,9 +1831,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 78848, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 78848, "gemm_E4m3_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "67414166d1a8a94e40a6f6a2f7d24e99f7634eeaacd015098f212368bd3bc5bc", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1692,6 +1844,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1708,6 +1862,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1723,11 +1879,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -1744,9 +1899,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 216064, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 216064, "gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 224, "99dbd99a0e95a841e9416a1099a40fd4e2b42f1a44fd0352ac331b307cee14f4", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1754,6 +1912,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1770,6 +1930,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1785,11 +1947,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -1806,9 +1967,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin_len, 215040, "gemmKernel_E4m3_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin, Gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin_len, 215040, "gemm_E4m3_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a", 224, "5b1f3d6e3705a32cc257f0566b57dba0ae89c90aae749090ea864e3ac1e152d9", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 2
@@ -1816,6 +1980,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1832,6 +1998,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1847,11 +2015,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(2)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -1868,9 +2035,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin, GemmKernel_Fp16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len, 150528, "gemmKernel_Fp16_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a", 320, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin, Gemm_Fp16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len, 150528, "gemm_Fp16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a", 320, "294b977b50865e7fbe41ef9d006e1912856c96b4e15a7588e24d783e044d0929", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1878,6 +2048,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1894,6 +2066,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
@@ -1909,11 +2083,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 0
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -1930,9 +2103,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 175104, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 175104, "gemm_Fp16_E4m3E4m3_Fp32_t128x128x128_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "d05d164e79e213a9b04ce518ced20ec9faad7967ad951cff14a9e60ef47a7047", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -1940,6 +2116,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -1956,6 +2134,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -1971,11 +2151,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -1992,9 +2171,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 175104, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x128u2_epilogueTile64x128_mma64x128x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 175104, "gemm_Fp16_E4m3E4m3_Fp32_t128x128x128u2_s4_et64x128_m64x128x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "d2975334a8914f64992a06417b40d42b1c25e8a57dff639bdb8b0768faea4037", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2002,6 +2184,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2018,6 +2202,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2033,11 +2219,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -2054,9 +2239,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len, 168960, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x32_cluster1x1x1_16dp256bit_TN_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len, 168960, "gemm_Fp16_E4m3E4m3_Fp32_t128x128x256u2_s2_et128x128_m128x128x32_cga1x1x1_16dp256b_TN_schedS_sm100a", 224, "277bd69ed7d198f9fc8ab87c7d9df3f74762dcc48a845711fa881ef1a345c03d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2064,6 +2252,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2080,6 +2270,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2095,11 +2287,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 0
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -2116,9 +2307,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 84992, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 84992, "gemm_Fp16_E4m3E4m3_Fp32_t128x16x128_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "749b06758d88b8c6c9233bef06af59f5c717e767d0ab7636726a6f5808aebec9", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2126,6 +2320,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2142,6 +2338,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2157,11 +2355,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -2178,9 +2375,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 84992, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x16x128u2_epilogueTile64x16_mma64x16x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 84992, "gemm_Fp16_E4m3E4m3_Fp32_t128x16x128u2_s4_et64x16_m64x16x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "4f107da93c4869724202d13aa7d6f69a618ec18367ed1f434efb804e9e2950cb", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2188,6 +2388,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2204,6 +2406,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2219,11 +2423,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 16
@@ -2240,9 +2443,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 97280, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 97280, "gemm_Fp16_E4m3E4m3_Fp32_t128x32x128_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "05b668ebaed4847a3ed92ce43d78442fd006621261f095ddb36ba150ed2d4ad9", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2250,6 +2456,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2266,6 +2474,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2281,11 +2491,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 32
@@ -2302,9 +2511,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 97280, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x32x128u2_epilogueTile64x32_mma64x32x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 97280, "gemm_Fp16_E4m3E4m3_Fp32_t128x32x128u2_s4_et64x32_m64x32x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "c2924dd87f53e3decedf433f205b742ae84cef4a77d7862441591ed0203b91d4", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2312,6 +2524,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2328,6 +2542,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2343,11 +2559,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 32
@@ -2364,9 +2579,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 123904, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 123904, "gemm_Fp16_E4m3E4m3_Fp32_t128x64x128_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "3b6e8407873ded09c5e433d5aa3e4ec0323ba895d13aea285e3a92ce1836046f", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2374,6 +2592,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2390,6 +2610,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2405,11 +2627,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 64
@@ -2426,9 +2647,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 123904, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x64x128u2_epilogueTile64x64_mma64x64x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 123904, "gemm_Fp16_E4m3E4m3_Fp32_t128x64x128u2_s4_et64x64_m64x64x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "6a647bb4f09f60d57a88d8b744bf772a261b3ccc3a5706b4ef0396438ef19cba", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2436,6 +2660,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2452,6 +2678,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2467,11 +2695,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 64
@@ -2488,9 +2715,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 78848, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 78848, "gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "98c0347b249a8f8c1e3a891f1532d0f3851ce781028f9d92c0dd18bf9705fd81", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2498,6 +2728,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2514,6 +2746,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2529,11 +2763,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2550,9 +2783,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a_cubin_len, 78848, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x128u2_epilogueTile64x8_mma64x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_dsFp8_sm100a", 416, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin_len, 78848, "gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a", 416, "103144508c3b2e8d01fcb40ec5980f67b2bdd5da4687635039f007e5ac798546", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2560,6 +2796,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2576,6 +2814,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 1
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2591,11 +2831,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2612,9 +2851,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 217088, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 217088, "gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 224, "47a6adb00497e6864f5f3dd1eb9326de21daddb02576d665951f268568598a9d", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2622,6 +2864,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2638,6 +2882,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2653,11 +2899,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2674,9 +2919,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a_cubin_len, 215040, "gemmKernel_Fp16_E4m3E4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x2_16dp256bit_splitK2_TN_transposeMmaOutput_sm100a", 224, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin, Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin_len, 215040, "gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a", 224, "0e025e6540a9eaf9e9d84635fcfcc4d63d563288d1210667a446c150eaf44620", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 2
@@ -2684,6 +2932,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(1050629)
 , /* mDtypeB */ trtllm::gen::Dtype(1050629)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2700,6 +2950,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(2)
@@ -2715,11 +2967,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(2)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2736,9 +2987,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Fp16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 225280, "gemmKernel_Fp16_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_Fp16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 225280, "gemm_Fp16_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 448, "acd6bcbe32966a092b0241457c15142a729a33e40ab4a3d5f9e5ada9d0ca80b1", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2746,6 +3000,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826828)
 , /* mDtypeB */ trtllm::gen::Dtype(17827853)
 , /* mDtypeC */ trtllm::gen::Dtype(1052679)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826828)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17827853)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2762,6 +3018,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(5)
@@ -2777,11 +3035,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2798,9 +3055,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp32_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin, GemmKernel_Fp32_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a_cubin_len, 183296, "gemmKernel_Fp32_E2m1E2m1_Fp32_tile128x128x256u2_epilogueTile128x128_mma128x128x64_cluster1x1x1_16dp256bit_TN_sm100a", 320, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin, Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin_len, 183296, "gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a", 320, "b9afcb7beb9cbdf56629ab3e7396c803e13f1a1410e569b60332a123a2aeea2a", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2808,6 +3068,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826818)
 , /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2824,6 +3086,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
 , /* mMmaKind */ trtllm::gen::MmaKind(4)
@@ -2839,11 +3103,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 0
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 0
 , /* mTileM */ 128
 , /* mTileN */ 128
@@ -2860,9 +3123,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_Fp32_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_Fp32_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 227328, "gemmKernel_Fp32_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 227328, "gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 448, "0b7d9e47ffaf50c12ff6888aba42111a2d731fb6aada6a63f33ea578300a2add", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2870,6 +3136,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826828)
 , /* mDtypeB */ trtllm::gen::Dtype(17827853)
 , /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826828)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17827853)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2886,6 +3154,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(5)
@@ -2901,11 +3171,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2922,9 +3191,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
-{GemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin, GemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a_cubin_len, 224256, "gemmKernel_MxE4m3_MxE2m1MxE4m3_Fp32_tile128x8x512u2_epilogueTile128x8_mma128x8x32_cluster1x1x1_16dp256bit_TN_transposeMmaOutput_sm100a", 448, { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+ }, gemm::SmVersion::Sm100a},
+{Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin, Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin_len, 224256, "gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a", 448, "84964cb97f1ba9d334e25c76018e5ab73cc2f1fcbee4391d7e76f61c52a64b9c", { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
@@ -2932,6 +3204,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mDtypeA */ trtllm::gen::Dtype(17826828)
 , /* mDtypeB */ trtllm::gen::Dtype(17827853)
 , /* mDtypeC */ trtllm::gen::Dtype(17827853)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826828)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17827853)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
@@ -2948,6 +3222,8 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
 , /* mMmaKind */ trtllm::gen::MmaKind(5)
@@ -2963,11 +3239,10 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMatrixA */ 0
-, /* mTransposeMatrixB */ 1
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 8
@@ -2984,12 +3259,12 @@ static const gemm::GemmConfig tllmGenGemmList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
- }, gemm::SmVersion::Sm100a },
+ }, gemm::SmVersion::Sm100a},
 #endif // EXCLUDE_SM_100
 };
 // clang-format on
-
 } // namespace kernels
 } // namespace tensorrt_llm
 } // namespace gemm
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParams.h
index 142e9728dc..17199d0f17 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParams.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParams.h
@@ -22,6 +22,10 @@
 #include "Enums.h"
 #include "TmaDescriptor.h"
 
+// NOTE: keep this code dependency free. It has to be included by the device code and has to be
+// compilable with NVRTC.
+#include "KernelParamsDecl.h"
+
 namespace gemm
 {
 
@@ -29,535 +33,305 @@ namespace gemm
 {
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
-
 namespace tg = trtllm::gen;
 
-////////////////////////////////////////////////////////////////////////////////////////////////////
-
-struct KernelParams
+namespace KernelParamsSetup
 {
 #ifdef TLLM_ENABLE_CUDA
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // Gemm parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
 
-    // TMA descriptor for A.
-    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAb.
-    //
-    // If transposeMatrixA is false
-    //   Logical shape is [M, K].
-    //   Logical strides are [K, 1].
-    //   Tile box shape is [tileM, tileK].
-    //   Tile box strides are [tileK, 1].
-    //   Dtype is set from options.mDtypeA.
-    //
-    // If transposeMatrixA is true
-    //   Logical shape is [K, M].
-    //   Logical strides are [M, 1].
-    //   Tile box shape is [tileK, tileM].
-    //   Tile box strides are [tileM, 1].
-    //   Dtype is set from options.mDtypeA.
-    CUtensorMap tmaA;
+using MatrixType = KernelParams::MatrixType;
 
-    // TMA descriptor for B.
-    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAb.
-    //
-    // If transposeMatrixB is true
-    //   Logical shape is [N, K].
-    //   Logical strides are [K, 1].
-    //   Tile box shape is [tileN, tileK].
-    //   Tile box strides are [tileK, 1].
-    //   Dtype is set from options.mDtypeB.
-    //
-    // If transposeMatrixB is false
-    //   Logical shape is [K, N].
-    //   Logical strides are [N, 1].
-    //   Tile box shape is [tileK, tileN].
-    //   Tile box strides are [tileN, 1].
-    //   Dtype is set from options.mDtypeB.
-    CUtensorMap tmaB;
+// Create the TMA shape/stride for A/B.
+template <class GemmOptions>
+static auto makeTmaShapeStrideAb(GemmOptions const& options, MatrixType matrixType)
+{
+    // The outer dimension.
+    auto numTokens = (matrixType == MatrixType::MatrixA) ? options.mM : options.mN;
+    // The outer dimension tile size.
+    auto tileMn = (matrixType == MatrixType::MatrixA) ? options.mTileM : options.mTileN;
+    // The inner dimension.
+    auto hiddenSize = options.mK;
+    // The cute tensor shape for A/B: (numTokens, hiddenSize).
+    // Note that TMA descriptor expects the first dimension's stride to be
+    // 1, so swap the first two dimension so that the hiddenSize dimension comes first.
+    auto shape = std::vector<uint64_t>{static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens)};
 
-    // TMA descriptor for C, (when useTmaStore is true)
-    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideC.
-    //
-    // If transposeMmaOutput is false,
-    //    Logical shape is [M, N].
-    //    Logical strides are [N, 1].
-    //    Tile box shape is [epilogueTileM, epilogueTileN].
-    //    Tile box strides are [epilogueTileN, 1].
-    //    Dtype is set from options.mDtypeC.
-    //
-    // If transposeMmaOutput is true,
-    //    Logical shape is [N, M].
-    //    Logical strides are [M, 1].
-    //    Tile box shape is [epilogueTileN, epilogueTileM].
-    //    Tile box strides are [epilogueTileM, 1].
-    //    Dtype is set from options.mDtypeC.
-    CUtensorMap tmaC;
+    // Assemble the stride (strideTokens, 1).
+    // Swap the first two dimension as mentioned before.
+    auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(hiddenSize)};
 
-    // TMA descriptor for the block scaling factors for A, for MxFp{4,8} and NvFp4 formats.
-    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideSfAb.
-    // The layout of scaling factors for A is always R128c4
-    //
-    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
-    // K must be a multiple of 4P.
-    // The "logical" shape is: [M, K / P].
-    // The R128c4 layout is: [⌈M / 128⌉, K / P / 4, 512].
-    // The shape we use for TMA is: [⌈M / 128⌉, K / P / 4, 2, 256].
-    //
-    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
-    CUtensorMap tmaSfA;
+    // Assemble the box shape
+    std::vector<int32_t> tileShape = {options.mTileK, tileMn};
 
-    // TMA descriptor for the block scaling factors for B, for MxFp{4,8} and NvFp4 formats.
-    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideSfAb.
-    // The layout of scaling factors for B is controlled by options.mSfLayoutB.
-    //
-    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
-    // The "logical" shape is: [N, K / P]
-    //
-    // If the layout is R128c4,
-    //    K must be a multiple of 4P.
-    //    The R128c4 layout is: [⌈N / 128⌉, K / P / 4, 512]
-    //    The shape we use for TMA is: [⌈N / 128⌉, K / P / 4, 2, 256]
-    //
-    // If the layout is R8c4,
-    //    K must be a multiple of 4P.
-    //    The R8c4 layout is: [⌈N / 8⌉, K / P / 4, 32]
-    //    The shape we use for TMA is: [⌈N / 8⌉, K / P / 4 / r, r * 32]
-    //    where r = min(tileK / P / 4, 8)
-    //
-    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
-    CUtensorMap tmaSfB;
-
-    // The output matrix C. The data type is controlled by options.mDtypeC.
-    //
-    // When transposeMmaOutput is true, the shape is [N, M].
-    // Otherwise, the shape is [M, N].
-    // Elements in a given row are stored contiguously in memory (row-major).
-    void* ptrC;
-
-    // The block scaling factors to dequantize A.
-    //
-    // If DeepSeek FP8 recipe is used:
-    // If transposeMmaOutput is false, shape is [K / 128, M].
-    // Otherwise, shape is [M / 128, K / 128].
-    // The rightmost dimension is contiguous in memory.
-    //
-    // If DeepSeek FP8 recipe is not used, but for MxFp{4,8} and NvFp4 formats:
-    // The layout and data type is the same as explained in tmaSfA.
-    //
-    // Otherwise should be set to nullptr.
-    void const* ptrSfA;
-
-    // The scaling factors to dequantize B.
-    //
-    // If DeepSeek FP8 recipe is used:
-    //    If transposeMmaOutput is false, shape is [N / 128, K / 128].
-    //    Otherwise, shape is [K / 128, N].
-    //    The rightmost dimension is contiguous in memory.
-    //
-    // If DeepSeek FP8 recipe is not used, but for MxFp{4,8} and NvFp4 formats:
-    //    The layout and data type is the same as explained in tmaSfB.
-    //
-    // Otherwise should be set to nullptr.
-    void const* ptrSfB;
-
-    // The per-token scaling factors from scale A.
-    //
-    // This is used for either:
-    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
-    //   * When the routing scales are applied to the input activations (only when output is not
-    //   transposed). The dtype is Dtype::Bfloat16
-    //
-    // The shape is [M]
-    void const* ptrPerTokenSfA;
-
-    // The per-token scaling factors from scale B.
-    //
-    // This is used for either:
-    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
-    //   * When the routing scales are applied to the input activations (only when output is
-    //   transposed). The dtype is Dtype::Bfloat16
-    //
-    // The shape is [N]
-    void const* ptrPerTokenSfB;
-
-    // The scaling factors calculated when quantizing C, for MxFp{4,8} and NvFp4 formats, also
-    // used for the DeepSeek FP8 recipe.
-    //
-    // For DeepSeek FP8 recipe:
-    //    If transposeMmaOutput is false, shape is [N / 128, M].
-    //    Otherwise, shape is [M / 128, N].
-    //    The rightmost dimension is contiguous in memory.
-    //
-    // For MxFp{4,8} and NvFp4 formats:
-    //    If transposeMmaOutput is false, shape is [M, N / 16].
-    //    Otherwise, shape is [N, M / 16].
-    //    The layout is controlled by options.mSfLayoutC (either R128c4 or R8c4).
-    void* ptrSfC;
-
-    // The output tensor scaling factor for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
-    // TensorRT-LLM API requires a scaling factor on the device.
-    // Shape is [1].
-    float const* ptrScaleC;
-
-    // The M dimension.
-    // It is the total number of tokens if A is the activation matrix.
-    // It is the total number of output channels if A is the weight matrix.
-    int32_t m;
-    // The N dimension.
-    // It is the total number of tokens if B is the activation matrix.
-    // It is the total number of output channels if B is the weight matrix.
-    int32_t n;
-    // The K dimension. It is the hidden dimension of the input matrices.
-    int32_t k;
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // All-reduce parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-
-    // The rank id of the current device in the multi-gpu space.
-    int rank;
-    // The number of peer devices in tensor-parallel group.
-    int tpGrpSize;
-    // Pointer for output with multicast mapping. It is used by the "reduce" op (LDGMC.ADD) of the
-    // two-shot reduce-scatter phase.
-    // The shape is [M, N] and the dtype is float.
-    void* multimemC;
-
-    // The barriers in global memory.
-    //
-    // The kernel arrives at (with release ordering) the multicast mapping of the barrier to broadcast
-    // amongst peer devices. It then waits (with acquire ordering) for the unicast mapping of the
-    // barrier.
-    //
-    // Flags in global memory that sync on "entrance" of reduce-scatter phase in two-shot all-reduce.
-    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
-    // The pointer to the unicast memory created with IpcNvlsHandle.
-    // Must be set to 0 before the kernel launch.
-    void* ptrTileBars;
-    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
-    // The pointer to the multicast memory created with IpcNvlsHandle.
-    void* multimemTileBars;
-
-    // Flags in global memory that sync on "exit" after the all-reduce finishes.
-    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
-    // The pointer to the unicast memory created with IpcNvlsHandle.
-    // Must be set to 0 before the kernel launch.
-    void* ptrCompletionBars;
-    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
-    // The pointer to the multicast memory created with IpcNvlsHandle
-    void* multimemCompletionBars;
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // Miscellaneous parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-
-    // The barriers in global memory for Split-k reduction with exchange in GMEM.
-    // Each CTAs arrives at the barrier and blockIdx.z == gridDim.Z - 1 waits for the barrier to flip
-    // to perform a reduction.
-    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
-    // For DeepSeek FP8 recipe, the shape is [numTilesM * numTilesN * 2].
-    // The memory must be set to 0 before the kernel launch.
-    void* ptrSplitKCompletionBars;
-
-    // Pointer to the memory holding the partial sums for split-K in GMEM.
-    // The shape is [numSlicesForSplitK, numSlicesForSliceK, numTilesM * tileM, numTilesN * tileN].
-    // The dtype is dtypeAcc, i.e. float.
-    void* ptrPartialSumsForSplitK;
-
-    // In some cases, some CTAs need to exit early. E.g. when the grid is statically set, but the
-    // actual workload is decided at runtime. This device pointer maps to the number of non exiting
-    // CTAs in the X dim of the grid when transposeMmaOutput is false. And the Y dim, otherwise.
-    // The pointer points to a scalar and the dtype is int32_t. The pointed value must be >= 0.
-    int32_t* ptrNumNonExitingCtas;
-
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-    //
-    // Miscellaneous parameters.
-    //
-    //////////////////////////////////////////////////////////////////////////////////////////////////
-
-    enum class MatrixType
+    MatrixLayout layout = (matrixType == MatrixType::MatrixA) ? options.mLayoutA : options.mLayoutB;
+    if (layout == MatrixLayout::MajorMn)
     {
-        MatrixA = 0,
-        MatrixB
-    };
-
-    // Create the TMA shape/stride for A/B.
-    template <class GemmOptions>
-    static auto makeTmaShapeStrideAb(GemmOptions const& options, MatrixType matrixType)
-    {
-        // The outer dimension.
-        auto numTokens = (matrixType == MatrixType::MatrixA) ? options.mM : options.mN;
-        // The inner dimension.
-        auto hiddenSize = options.mK;
-        // The cute tensor shape for A/B: (numTokens, hiddenSize).
-        // Note that TMA descriptor expects the first dimension's stride to be
-        // 1, so swap the first two dimension so that the hiddenSize dimension comes first.
-        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens)};
-
-        // Assemble the stride (strideTokens, 1).
-        // Swap the first two dimension as mentioned before.
-        auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(hiddenSize)};
-
         // Apply transpose if necessary
-        if ((matrixType == MatrixType::MatrixA && options.mTransposeMatrixA)
-            || (matrixType == MatrixType::MatrixB && !options.mTransposeMatrixB))
-        {
-            std::swap(shape[0], shape[1]);
-            stride[1] = numTokens;
-        }
-
-        return std::make_tuple(shape, stride);
+        std::swap(shape[0], shape[1]);
+        stride[1] = numTokens;
+        std::swap(tileShape[0], tileShape[1]);
     }
-
-    // Create the TMA shape/stride for C.
-    template <class GemmOptions>
-    static auto makeTmaShapeStrideC(GemmOptions const& options)
+    else if (layout == MatrixLayout::BlockMajorK)
     {
-        // The number of tokens.
-        auto numTokens = options.mTransposeMmaOutput ? options.mN : options.mM;
-        // The hidden dimension.
-        auto hiddenSize = options.mTransposeMmaOutput ? options.mM : options.mN;
-        // Note that TMA descriptor expects the first dimension's stride to be
-        // 1, so swap the first two dimension so that the hiddenSize dimension comes first.
-        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens)};
+        // Set shapes based on blocking layout
+        shape = {static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens),
+            static_cast<uint64_t>(options.mK / options.mBlockK)};
+        stride = {1, static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens * options.mBlockK)};
 
-        // Assemble the stride (strideTokens, 1).
-        // Swap the first two dimension as mentioned before.
-        auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(hiddenSize)};
-
-        return std::make_tuple(shape, stride);
+        // If blockK > tileK, then the inner most box size will be based on the tile
+        int32_t const tileBlockK = std::min(options.mBlockK, options.mTileK);
+        tileShape = {tileBlockK, tileMn, options.mTileK / tileBlockK};
     }
 
-    // Create the TMA shape/stride for A/B block scaling factors.
-    template <class GemmOptions>
-    static auto makeTmaShapeStrideSfAb(GemmOptions const& options, MatrixType matrixType, tg::SfLayout layout)
+    return std::make_tuple(shape, stride, tileShape);
+}
+
+// Create the TMA shape/stride for C.
+template <class GemmOptions>
+static auto makeTmaShapeStrideC(GemmOptions const& options)
+{
+    // The number of tokens.
+    auto numTokens = options.mTransposeMmaOutput ? options.mN : options.mM;
+    // The hidden dimension.
+    auto hiddenSize = options.mTransposeMmaOutput ? options.mM : options.mN;
+    // Note that TMA descriptor expects the first dimension's stride to be
+    // 1, so swap the first two dimension so that the hiddenSize dimension comes first.
+    auto shape = std::vector<uint64_t>{static_cast<uint64_t>(hiddenSize), static_cast<uint64_t>(numTokens)};
+
+    // Assemble the stride (strideTokens, 1).
+    // Swap the first two dimension as mentioned before.
+    auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(hiddenSize)};
+
+    return std::make_tuple(shape, stride);
+}
+
+// Create the TMA shape/stride for A/B block scaling factors.
+template <class GemmOptions>
+static auto makeTmaShapeStrideSfAb(GemmOptions const& options, MatrixType matrixType, tg::SfLayout layout)
+{
+    // The outer dimension.
+    auto numTokens = matrixType == MatrixType::MatrixA ? options.mM : options.mN;
+    // The inner dimension.
+    auto hiddenSize = options.mK;
+    // The outer tile dimension.
+    auto numTokensPerTile = matrixType == MatrixType::MatrixA ? options.mTileM : options.mTileN;
+    // The inner tile dimension.
+    auto hiddenSizePerTile = options.mTileK;
+    // The dtype of the matrix.
+    tg::Dtype matrixDtype = matrixType == MatrixType::MatrixA ? options.mDtypeA : options.mDtypeB;
+    // Number of elements per scaling factor.
+    int32_t const numEltsPerSf = (matrixDtype == tg::Dtype::E2m1) ? 16 : 32;
+
+    switch (layout)
     {
-        // The outer dimension.
-        auto numTokens = matrixType == MatrixType::MatrixA ? options.mM : options.mN;
-        // The inner dimension.
-        auto hiddenSize = options.mK;
-        // The outer tile dimension.
-        auto numTokensPerTile = matrixType == MatrixType::MatrixA ? options.mTileM : options.mTileN;
-        // The inner tile dimension.
-        auto hiddenSizePerTile = options.mTileK;
-        // The dtype of the matrix.
-        tg::Dtype matrixDtype = matrixType == MatrixType::MatrixA ? options.mDtypeA : options.mDtypeB;
-        // Number of elements per scaling factor.
-        int32_t const numEltsPerSf = (matrixDtype == tg::Dtype::E2m1) ? 16 : 32;
-
-        switch (layout)
-        {
-        case tg::SfLayout::R128c4:
-        {
-            // The scaling factor tensor packs 128x4 tiles into contiguous 512B blocks.
-            // The 512B block maps to a 32x16B (32x128b) block in TMEM.
-            // See https://nvbugspro.nvidia.com/bug/4165523
-            //
-            // Additionally, we have to meet constraints of TMA that the box dimensions are less
-            // than 256 and boxDim[0] is a multiple of 16B.
-            //
-            // The "logical" tensor is:      [outer,        inner / numEltsPerSf]
-            // The aforementioned format is: [⌈outer / 128⌉, inner / (4 * numEltsPerSf),    512]
-            // The shape we use for TMA is:  [⌈outer / 128⌉, inner / (4 * numEltsPerSf), 2, 256]
-
-            auto shape = std::vector<uint64_t>{256, 2, static_cast<uint64_t>(tg::ceilDiv(hiddenSize, numEltsPerSf * 4)),
-                static_cast<uint64_t>(tg::ceilDiv(numTokens, 128))};
-
-            std::vector<uint64_t> stride(shape.size());
-            stride[0] = 1;
-            for (size_t i = 1; i < shape.size(); i++)
-            {
-                stride[i] = shape[i - 1] * stride[i - 1];
-            }
-
-            auto tileShapes
-                = std::vector<uint32_t>{256, 2, static_cast<uint32_t>(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4)),
-                    static_cast<uint32_t>(tg::ceilDiv(numTokensPerTile, 128))};
-
-            return std::make_tuple(shape, stride, tileShapes);
-        }
-
-        case tg::SfLayout::R8c4:
-        {
-            // The scaling factor tensor packs 8x4 tiles into contiguous 32B blocks.
-            //
-            // As the inner dimension (k) is required to be a multiple of the tile size, we
-            // can reshape to use fewer read requests, if the tile dimensions allow.
-            // I.e., let's define r = min(⌈hiddenSizePerTile / (numEltsPerSf * 4)⌉, 8)
-            //
-            // The "logical" tensor is: [outer,        inner / numEltsPerSf]
-            // The 8x4 SF layout is:    [⌈outer / 128⌉, inner / (4 * numEltsPerSf), 32]
-            // The TMA tensor shape is: [⌈outer / 128⌉, inner / (4 * numEltsPerSf * r), r * 32]
-
-            int const repeats = std::min(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4), 8);
-
-            auto shape = std::vector<uint64_t>{static_cast<uint64_t>(repeats * 32),
-                static_cast<uint64_t>(tg::ceilDiv(hiddenSize, numEltsPerSf * 4 * repeats)),
-                static_cast<uint64_t>(tg::ceilDiv(numTokens, 8))};
-
-            std::vector<uint64_t> stride(shape.size());
-            stride[0] = 1;
-            for (size_t i = 1; i < shape.size(); i++)
-            {
-                stride[i] = shape[i - 1] * stride[i - 1];
-            }
-
-            auto tileShapes = std::vector<uint32_t>{static_cast<uint32_t>(repeats * 32),
-                static_cast<uint32_t>(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4 * repeats)),
-                static_cast<uint32_t>(tg::ceilDiv(numTokensPerTile, 8))};
-
-            return std::make_tuple(shape, stride, tileShapes);
-        }
-
-        default: throw std::runtime_error("Unsupported SF layout");
-        }
-        return std::make_tuple(std::vector<uint64_t>{}, std::vector<uint64_t>{}, std::vector<uint32_t>{});
-    }
-
-    // Setup the kernel parameters.
-    template <class GemmOptions_>
-    static KernelParams setKernelParams(GemmOptions_ const& options, void const* ptrA, void const* ptrSfA,
-        void const* ptrPerTokenSfA, void const* ptrB, void const* ptrSfB, void const* ptrPerTokenSfB, void* ptrC,
-        void* ptrSfC, void* multimemC, float* ptrScaleC, void* ptrPartialSumsForSplitK, void* ptrTileBars,
-        void* multimemTileBars, void* ptrCompletionBars, void* multimemCompletionBars, void* ptrSplitKCompletionBars,
-        int32_t* ptrNumNonExitingCtas, int rank, int tpGrpSize)
+    case tg::SfLayout::R128c4:
     {
+        // The scaling factor tensor packs 128x4 tiles into contiguous 512B blocks.
+        // The 512B block maps to a 32x16B (32x128b) block in TMEM.
+        // See https://nvbugspro.nvidia.com/bug/4165523
+        //
+        // Additionally, we have to meet constraints of TMA that the box dimensions are less
+        // than 256 and boxDim[0] is a multiple of 16B.
+        //
+        // The "logical" tensor is:      [outer,        inner / numEltsPerSf]
+        // The aforementioned format is: [⌈outer / 128⌉, inner / (4 * numEltsPerSf),    512]
+        // The shape we use for TMA is:  [⌈outer / 128⌉, inner / (4 * numEltsPerSf), 2, 256]
 
-        // Is one-shot all-reduce?
-        bool const oneShotAr{options.mAllReduceAlgo == AllReduceAlgo::OneShot};
-        // Is two-shot all-reduce?
-        bool const twoShotAr{options.mAllReduceAlgo == AllReduceAlgo::TwoShot};
-        // Are there peer devices?
-        bool const multiDevice{tpGrpSize > 1};
+        auto shape = std::vector<uint64_t>{256, 2, static_cast<uint64_t>(tg::ceilDiv(hiddenSize, numEltsPerSf * 4)),
+            static_cast<uint64_t>(tg::ceilDiv(numTokens, 128))};
 
-        // Create the return struct.
-        KernelParams params;
-
-        // Shape/stride for gmem tensor A.
-        auto [shapeA, strideA] = makeTmaShapeStrideAb(options, MatrixType::MatrixA);
-        // Build tma descriptor for A.
-        params.tmaA = gemm::buildNdTmaDescriptor(options.mDtypeA, options.mMmaKind, shapeA, strideA,
-            options.mTransposeMatrixA ? options.mTileK : options.mTileM,
-            options.mTransposeMatrixA ? options.mTileM : options.mTileK, const_cast<void*>(ptrA));
-
-        // Shape/stride for gmem tensor B.
-        auto [shapeB, strideB] = makeTmaShapeStrideAb(options, MatrixType::MatrixB);
-        // Build tma descriptor for B.
-        params.tmaB = gemm::buildNdTmaDescriptor(options.mDtypeB, options.mMmaKind, shapeB, strideB,
-            !options.mTransposeMatrixB ? options.mTileK : options.mTileN,
-            !options.mTransposeMatrixB ? options.mTileN : options.mTileK, const_cast<void*>(ptrB),
-            /* swizzle */ !options.mSliceK);
-
-        if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE2m1
-            || options.mDtypeA == tg::Dtype::MxE4m3)
+        std::vector<uint64_t> stride(shape.size());
+        stride[0] = 1;
+        for (size_t i = 1; i < shape.size(); i++)
         {
-            tg::Dtype const dTypeSfA = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
-
-            // Build TMA descriptor for gmem A block scaling factors.
-            auto [shapeSfA, strideSfA, tileShapesSfA]
-                = makeTmaShapeStrideSfAb(options, MatrixType::MatrixA, tg::SfLayout::R128c4);
-            params.tmaSfA
-                = gemm::buildSfTmaDescriptor(dTypeSfA, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(ptrSfA));
+            stride[i] = shape[i - 1] * stride[i - 1];
         }
 
-        if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE2m1
-            || options.mDtypeB == tg::Dtype::MxE4m3)
-        {
-            tg::Dtype const dTypeSfB = (options.mDtypeB == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
+        auto tileShapes
+            = std::vector<uint32_t>{256, 2, static_cast<uint32_t>(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4)),
+                static_cast<uint32_t>(tg::ceilDiv(numTokensPerTile, 128))};
 
-            // Build TMA descriptor for gmem B block scaling factors.
-            auto [shapeSfB, strideSfB, tileShapesSfB]
-                = makeTmaShapeStrideSfAb(options, MatrixType::MatrixB, options.mSfLayoutB);
-            params.tmaSfB
-                = gemm::buildSfTmaDescriptor(dTypeSfB, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(ptrSfB));
-        }
-
-        if (options.mUseTmaStore)
-        {
-            // Shape/stride for gmem tensor C.
-            auto [shapeC, strideC] = makeTmaShapeStrideC(options);
-
-            // Swap M and N tiles for the M-major epilogue.
-            auto outputTileM = options.mTransposeMmaOutput ? options.mEpilogueTileN : options.mEpilogueTileM;
-            auto outputTileN = options.mTransposeMmaOutput ? options.mEpilogueTileM : options.mEpilogueTileN;
-
-            // One-shot performs TMA reduction on multicast mapping of the output buffer directly.
-            // Two-shot performs TMA store on unicast mapping of the output buffer. The reduction happens
-            // in the next phase.
-            void* ptrTmaC{oneShotAr && multiDevice ? multimemC : ptrC};
-            auto dtypeC{options.mDtypeC};
-            // Regardless of output dtype, two-shot all-reduce store partial
-            // accumulation results to global memory in float32 precision.
-            if (twoShotAr && multiDevice)
-            {
-                dtypeC = options.mDtypeAcc;
-            }
-
-            // Build tma descriptor for C.
-            params.tmaC = gemm::buildNdTmaDescriptor(
-                dtypeC, tg::MmaKind::Auto, shapeC, strideC, outputTileM, outputTileN, const_cast<void*>(ptrTmaC));
-        }
-
-        // Set the dequantization factors for A and B when DeepSeek FP8 recipe is used.
-        params.ptrSfA = ptrSfA;
-        params.ptrSfB = ptrSfB;
-
-        // Set the per-token scale factors for MetaFP8 or scale inputs
-        params.ptrPerTokenSfA = ptrPerTokenSfA;
-        params.ptrPerTokenSfB = ptrPerTokenSfB;
-
-        // Also set ptrC (it may be used by the NCCL reduction code in "layers/Llama").
-        params.ptrC = ptrC;
-        params.ptrScaleC = ptrScaleC;
-
-        // The block scaling factors of C for MxFp{4,8} and NvFp4 formats.
-        // (not to be confused with the tensor-level scaling factor stored in ptrScaleC)
-        params.ptrSfC = ptrSfC;
-
-        params.m = options.mM;
-        params.n = options.mN;
-        params.k = options.mK;
-
-        params.rank = rank;
-        params.tpGrpSize = tpGrpSize;
-
-        params.multimemC = multimemC;
-        params.ptrPartialSumsForSplitK = ptrPartialSumsForSplitK;
-        params.ptrTileBars = ptrTileBars;
-        params.multimemTileBars = multimemTileBars;
-        params.ptrCompletionBars = ptrCompletionBars;
-        params.multimemCompletionBars = multimemCompletionBars;
-
-        params.ptrSplitKCompletionBars = ptrSplitKCompletionBars;
-        params.ptrNumNonExitingCtas = ptrNumNonExitingCtas;
-        return params;
+        return std::make_tuple(shape, stride, tileShapes);
     }
 
-    // Setup the kernel parameters.
-    template <class GemmOptions_>
-    static KernelParams setKernelParams(GemmOptions_ const& options, void const* ptrA, void const* ptrB, void* ptrC,
-        void* multimemC, float const* ptrScaleC, void* ptrTileBars, void* multimemTileBars, void* ptrCompletionBars,
-        void* multimemCompletionBars, int rank, int tpGrpSize)
+    case tg::SfLayout::R8c4:
     {
-        return setKernelParams(options, ptrA, nullptr, ptrB, nullptr, ptrC, multimemC, ptrScaleC, ptrTileBars,
-            multimemTileBars, ptrCompletionBars, multimemCompletionBars, rank, tpGrpSize);
+        // The scaling factor tensor packs 8x4 tiles into contiguous 32B blocks.
+        //
+        // As the inner dimension (k) is often a multiple of the tile size, we can reshape to use
+        // fewer read requests, if the tile dimensions allow. It does not reduce the number of
+        // instructions.
+        //
+        // I.e., let's define r = min(⌈hiddenSizePerTile / (numEltsPerSf * 4)⌉, 8)
+        //
+        // The "logical" tensor is: [outer,      inner / numEltsPerSf]
+        // The 8x4 SF layout is:    [⌈outer / 8⌉, inner / (4 * numEltsPerSf), 32]
+        // The TMA tensor shape is: [⌈outer / 8⌉, inner / (4 * numEltsPerSf * r), r * 32]
+        //
+        // The caveat of NumRepeats>1 is we must pad the hidden dimension of SF to multiples of
+        // NumRepeats * numEltsPerSf * 4.
+
+        // Detect if the supplied factor is power of 2. E.g., 0b0100 and (0b0100 - 1) == 0b0000.
+        int const r = options.mSfReshapeFactor;
+        if (r > 0 && (r & (r - 1)) != 0)
+        {
+            throw std::runtime_error("mSfReshapeFactor must be positive and a power of 2. Found " + std::to_string(r));
+        }
+
+        // Sanitize number of repeats so it doesn't exceed the dimension.
+        int const repeats = std::min(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4), r);
+
+        // Detect if the input hidden size K is a multiple of the repeats.
+        if (tg::ceilDiv(hiddenSize, numEltsPerSf * 4) % repeats != 0)
+        {
+            throw std::runtime_error("SF hiddenSize K (" + std::to_string(tg::ceilDiv(hiddenSize, numEltsPerSf * 4))
+                + ") must be a multiple of repeats (" + std::to_string(repeats) + ")");
+        }
+
+        auto shape = std::vector<uint64_t>{static_cast<uint64_t>(repeats * 32),
+            static_cast<uint64_t>(tg::ceilDiv(hiddenSize, numEltsPerSf * 4 * repeats)),
+            static_cast<uint64_t>(tg::ceilDiv(numTokens, 8))};
+
+        std::vector<uint64_t> stride(shape.size());
+        stride[0] = 1;
+        for (size_t i = 1; i < shape.size(); i++)
+        {
+            stride[i] = shape[i - 1] * stride[i - 1];
+        }
+
+        auto tileShapes = std::vector<uint32_t>{static_cast<uint32_t>(repeats * 32),
+            static_cast<uint32_t>(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4 * repeats)),
+            static_cast<uint32_t>(tg::ceilDiv(numTokensPerTile, 8))};
+
+        return std::make_tuple(shape, stride, tileShapes);
     }
+
+    default: throw std::runtime_error("Unsupported SF layout");
+    }
+    return std::make_tuple(std::vector<uint64_t>{}, std::vector<uint64_t>{}, std::vector<uint32_t>{});
+}
+
+// Setup the kernel parameters.
+template <class GemmOptions_>
+static KernelParams setKernelParams(GemmOptions_ const& options, void const* ptrA, void const* ptrSfA,
+    void const* ptrPerTokenSfA, void const* ptrB, void const* ptrSfB, void const* ptrPerTokenSfB, void const* ptrBias,
+    void* ptrC, void* ptrSfC, void* multimemC, float* ptrScaleC, void* ptrPartialSumsForSplitK, void* ptrTileBars,
+    void* multimemTileBars, void* ptrCompletionBars, void* multimemCompletionBars, void* ptrSplitKCompletionBars,
+    int32_t* ptrNumNonExitingCtas, int rank, int tpGrpSize)
+{
+
+    // Is one-shot all-reduce?
+    bool const oneShotAr{options.mAllReduceAlgo == AllReduceAlgo::OneShot};
+    // Is two-shot all-reduce?
+    bool const twoShotAr{options.mAllReduceAlgo == AllReduceAlgo::TwoShot};
+    // Are there peer devices?
+    bool const multiDevice{tpGrpSize > 1};
+
+    // Create the return struct.
+    KernelParams params;
+
+    // Shape/stride for gmem tensor A.
+    auto [shapeA, strideA, tileShapeA] = makeTmaShapeStrideAb(options, MatrixType::MatrixA);
+    // Build tma descriptor for A.
+    params.tmaA = gemm::buildNdTmaDescriptor(
+        options.mDtypeA, options.mMmaKind, shapeA, strideA, tileShapeA, const_cast<void*>(ptrA));
+
+    // Shape/stride for gmem tensor B.
+    auto [shapeB, strideB, tileShapeB] = makeTmaShapeStrideAb(options, MatrixType::MatrixB);
+    // Build tma descriptor for B.
+    params.tmaB = gemm::buildNdTmaDescriptor(options.mDtypeB, options.mMmaKind, shapeB, strideB, tileShapeB,
+        const_cast<void*>(ptrB),
+        /* swizzle */ !options.mSliceK);
+
+    if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE2m1
+        || options.mDtypeA == tg::Dtype::MxE4m3)
+    {
+        tg::Dtype const dTypeSfA = (options.mDtypeA == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
+
+        // Build TMA descriptor for gmem A block scaling factors.
+        auto [shapeSfA, strideSfA, tileShapesSfA]
+            = makeTmaShapeStrideSfAb(options, MatrixType::MatrixA, tg::SfLayout::R128c4);
+        params.tmaSfA
+            = gemm::buildSfTmaDescriptor(dTypeSfA, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(ptrSfA));
+    }
+
+    if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE2m1
+        || options.mDtypeB == tg::Dtype::MxE4m3)
+    {
+        tg::Dtype const dTypeSfB = (options.mDtypeB == tg::Dtype::E2m1) ? tg::Dtype::E4m3 : tg::Dtype::UE8m0;
+
+        // Build TMA descriptor for gmem B block scaling factors.
+        auto [shapeSfB, strideSfB, tileShapesSfB]
+            = makeTmaShapeStrideSfAb(options, MatrixType::MatrixB, options.mSfLayoutB);
+        params.tmaSfB
+            = gemm::buildSfTmaDescriptor(dTypeSfB, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(ptrSfB));
+    }
+
+    if (options.mUseTmaStore)
+    {
+        // Shape/stride for gmem tensor C.
+        auto [shapeC, strideC] = makeTmaShapeStrideC(options);
+
+        // Swap M and N tiles for the M-major epilogue.
+        auto outputTileM = options.mTransposeMmaOutput ? options.mEpilogueTileN : options.mEpilogueTileM;
+        auto outputTileN = options.mTransposeMmaOutput ? options.mEpilogueTileM : options.mEpilogueTileN;
+
+        // One-shot performs TMA reduction on multicast mapping of the output buffer directly.
+        // Two-shot performs TMA store on unicast mapping of the output buffer. The reduction happens
+        // in the next phase.
+        void* ptrTmaC{oneShotAr && multiDevice ? multimemC : ptrC};
+        auto dtypeC{options.mDtypeC};
+        // Regardless of output dtype, two-shot all-reduce store partial
+        // accumulation results to global memory in float32 precision.
+        if (twoShotAr && multiDevice)
+        {
+            dtypeC = options.mDtypeAcc;
+        }
+
+        // Build tma descriptor for C.
+        params.tmaC = gemm::buildNdTmaDescriptor(dtypeC, tg::MmaKind::Auto, shapeC, strideC,
+            std::vector<int32_t>{outputTileN, outputTileM}, const_cast<void*>(ptrTmaC));
+    }
+
+    // Set the dequantization factors for A and B when DeepSeek FP8 recipe is used.
+    params.ptrSfA = ptrSfA;
+    params.ptrSfB = ptrSfB;
+
+    // Set the per-token scale factors for MetaFP8 or scale inputs
+    params.ptrPerTokenSfA = ptrPerTokenSfA;
+    params.ptrPerTokenSfB = ptrPerTokenSfB;
+
+    // Set the bias.
+    params.ptrBias = ptrBias;
+
+    // Also set ptrC (it may be used by the NCCL reduction code in "layers/Llama").
+    params.ptrC = ptrC;
+    params.ptrScaleC = ptrScaleC;
+
+    // The block scaling factors of C for MxFp{4,8} and NvFp4 formats.
+    // (not to be confused with the tensor-level scaling factor stored in ptrScaleC)
+    params.ptrSfC = ptrSfC;
+
+    params.m = options.mM;
+    params.n = options.mN;
+    params.k = options.mK;
+
+    params.rank = rank;
+    params.tpGrpSize = tpGrpSize;
+
+    params.multimemC = multimemC;
+    params.ptrPartialSumsForSplitK = ptrPartialSumsForSplitK;
+    params.ptrTileBars = ptrTileBars;
+    params.multimemTileBars = multimemTileBars;
+    params.ptrCompletionBars = ptrCompletionBars;
+    params.multimemCompletionBars = multimemCompletionBars;
+
+    params.ptrSplitKCompletionBars = ptrSplitKCompletionBars;
+    params.ptrNumNonExitingCtas = ptrNumNonExitingCtas;
+    return params;
+}
 #endif
-};
+}; // namespace KernelParamsSetup
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParamsDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParamsDecl.h
new file mode 100644
index 0000000000..f248278acc
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelParamsDecl.h
@@ -0,0 +1,324 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2025 NVIDIA CORPORATION &
+ * AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+// NOTE: keep this code dependency free. It has to be included by the device code and has to be
+// compilable with NVRTC.
+
+namespace gemm
+{
+
+namespace gemm
+{
+
+struct KernelParams
+{
+#ifdef TLLM_ENABLE_CUDA
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // Gemm parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // TMA descriptor for A.
+    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideAb.
+    //
+    // If layoutA is MatrixLayout::MajorK
+    //   Logical shape is [M, K].
+    //   Logical strides are [K, 1].
+    //   Tile box shape is [tileM, tileK].
+    //   Tile box strides are [tileK, 1].
+    //   Dtype is set from options.mDtypeA.
+    //
+    // If layoutA is MatrixLayout::MajorMn
+    //   Logical shape is [K, M].
+    //   Logical strides are [M, 1].
+    //   Tile box shape is [tileK, tileM].
+    //   Tile box strides are [tileM, 1].
+    //   Dtype is set from options.mDtypeA.
+    //
+    // If layoutA is MatrixLayout::BlockMajorK
+    //   Logical shape is [K / blockK, M, blockK].
+    //   Logical strides are [M * blockK, blockK, 1].
+    //   Tile box shape is [tileK / min(blockK, tileK), tileM, min(blockK, tileK)].
+    //   Tile box strides are [tileM * min(blockK, tileK), min(blockK, tileK), 1].
+    //   Dtype is set from options.mDtypeA, and blockK is 128B.
+    CUtensorMap tmaA;
+
+    // TMA descriptor for B.
+    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideAb.
+    //
+    // If layoutB is MatrixLayout::MajorK
+    //   Logical shape is [N, K].
+    //   Logical strides are [K, 1].
+    //   Tile box shape is [tileN, tileK].
+    //   Tile box strides are [tileK, 1].
+    //   Dtype is set from options.mDtypeB.
+    //
+    // If layoutB is MatrixLayout::MajorMn
+    //   Logical shape is [K, N].
+    //   Logical strides are [N, 1].
+    //   Tile box shape is [tileK, tileN].
+    //   Tile box strides are [tileN, 1].
+    //   Dtype is set from options.mDtypeB.
+    //
+    // If layoutB is MatrixLayout::BlockMajorK
+    //   Logical shape is [K / blockK, N, blockK].
+    //   Logical strides are [N * blockK, blockK, 1].
+    //   Tile box shape is [tileK / min(blockK, tileK), tileN, min(blockK, tileK)].
+    //   Tile box strides are [tileN * min(blockK, tileK), min(blockK, tileK), 1].
+    //   Dtype is set from options.mDtypeB, and blockK is 128B.
+    CUtensorMap tmaB;
+
+    // TMA descriptor for C, (when useTmaStore is true)
+    // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideC.
+    //
+    // If transposeMmaOutput is false,
+    //    Logical shape is [M, N].
+    //    Logical strides are [N, 1].
+    //    Tile box shape is [epilogueTileM, epilogueTileN].
+    //    Tile box strides are [epilogueTileN, 1].
+    //    Dtype is set from options.mDtypeC.
+    //
+    // If transposeMmaOutput is true,
+    //    Logical shape is [N, M].
+    //    Logical strides are [M, 1].
+    //    Tile box shape is [epilogueTileN, epilogueTileM].
+    //    Tile box strides are [epilogueTileM, 1].
+    //    Dtype is set from options.mDtypeC.
+    CUtensorMap tmaC;
+
+    // TMA descriptor for the block scaling factors for A, for MxFp{4,8} and NvFp4 formats.
+    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideSfAb.
+    // The layout of scaling factors for A is always R128c4
+    //
+    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
+    // K must be a multiple of 4P.
+    // The "logical" shape is: [M, K / P].
+    // The R128c4 layout is: [⌈M / 128⌉, K / P / 4, 512].
+    // The shape we use for TMA is: [⌈M / 128⌉, K / P / 4, 2, 256].
+    //
+    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
+    CUtensorMap tmaSfA;
+
+    // TMA descriptor for the block scaling factors for B, for MxFp{4,8} and NvFp4 formats.
+    // Must be setup using gemm::buildSfTmaDescriptor with shapes and strides from
+    // makeTmaShapeStrideSfAb.
+    // The layout of scaling factors for B is controlled by options.mSfLayoutB.
+    //
+    // Let P be the number of elements per SF. P=16 for NvFp4, P=32 for Mx formats.
+    // The "logical" shape is: [N, K / P]
+    //
+    // If the layout is R128c4,
+    //    K must be a multiple of 4P.
+    //    The R128c4 layout is: [⌈N / 128⌉, K / P / 4, 512]
+    //    The shape we use for TMA is: [⌈N / 128⌉, K / P / 4, 2, 256]
+    //
+    // If the layout is R8c4,
+    //    K must be a multiple of 4P.
+    //    The R8c4 layout is: [⌈N / 8⌉, K / P / 4, 32]
+    //    The shape we use for TMA is: [⌈N / 8⌉, K / P / 4 / r, r * 32]
+    //    where r = min(tileK / P / 4, 8)
+    //
+    // Dtype is Dtype::E4m3 for NvFp4, Dtype::UE8m0 for Mx formats.
+    CUtensorMap tmaSfB;
+
+    // The output matrix C. The data type is controlled by options.mDtypeC.
+    //
+    // When transposeMmaOutput is true, the shape is [N, M].
+    // Otherwise, the shape is [M, N].
+    // Elements in a given row are stored contiguously in memory (row-major).
+    void* ptrC;
+
+    // The block scaling factors to dequantize A.
+    //
+    // If DeepSeek FP8 recipe is used:
+    // If transposeMmaOutput is false, shape is [K / 128, M].
+    // Otherwise, shape is [M / 128, K / 128].
+    // The rightmost dimension is contiguous in memory.
+    //
+    // If DeepSeek FP8 recipe is not used, but for MxFp{4,8} and NvFp4 formats:
+    // The layout and data type is the same as explained in tmaSfA.
+    //
+    // Otherwise should be set to nullptr.
+    void const* ptrSfA;
+
+    // The scaling factors to dequantize B.
+    //
+    // If DeepSeek FP8 recipe is used:
+    //    If transposeMmaOutput is false, shape is [N / 128, K / 128].
+    //    Otherwise, shape is [K / 128, N].
+    //    The rightmost dimension is contiguous in memory.
+    //
+    // If DeepSeek FP8 recipe is not used, but for MxFp{4,8} and NvFp4 formats:
+    //    The layout and data type is the same as explained in tmaSfB.
+    //
+    // Otherwise should be set to nullptr.
+    void const* ptrSfB;
+
+    // The bias applied after the GEMM.
+    // The bias is applied before applying the global scaling factor. I.e.
+    // C' = (A * B + bias') * scaleC
+    // scaleC = dequantA * dequantB * quantC
+    // Thus, the bias' = bias / (dequantA * dequantB), where the bias is the original bias.
+    //
+    // if BiasType is N, the shape is [N].
+    // The bias is broadcasted along the M dimension.
+    //
+    // if BiasType is M, the shape is [M].
+    // The bias is broadcasted along the N dimension.
+    //
+    // The dtype is float32.
+    void const* ptrBias;
+
+    // The per-token scaling factors from scale A.
+    //
+    // This is used for either:
+    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
+    //   * When the routing scales are applied to the input activations (only when output is not
+    //   transposed). The dtype is Dtype::Bfloat16
+    //
+    // The shape is [M]
+    void const* ptrPerTokenSfA;
+
+    // The per-token scaling factors from scale B.
+    //
+    // This is used for either:
+    //   * Per-token scaling factor quantization schemes, such as MetaFP8. The dtype is Dtype::Float32
+    //   * When the routing scales are applied to the input activations (only when output is
+    //   transposed). The dtype is Dtype::Bfloat16
+    //
+    // The shape is [N]
+    void const* ptrPerTokenSfB;
+
+    // The scaling factors calculated when quantizing C, for MxFp{4,8} and NvFp4 formats, also
+    // used for the DeepSeek FP8 recipe.
+    //
+    // For DeepSeek FP8 recipe:
+    //    If transposeMmaOutput is false, shape is [N / 128, M].
+    //    Otherwise, shape is [M / 128, N].
+    //    The rightmost dimension is contiguous in memory.
+    //
+    // For MxFp{4,8} and NvFp4 formats:
+    //    If transposeMmaOutput is false, shape is [M, N / 16].
+    //    Otherwise, shape is [N, M / 16].
+    //    The layout is controlled by options.mSfLayoutC (either R128c4 or R8c4).
+    void* ptrSfC;
+
+    // The output tensor scaling factor for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
+    // TensorRT-LLM API requires a scaling factor on the device.
+    // Shape is [1].
+    float const* ptrScaleC;
+
+    // The M dimension.
+    // It is the total number of tokens if A is the activation matrix.
+    // It is the total number of output channels if A is the weight matrix.
+    int32_t m;
+    // The N dimension.
+    // It is the total number of tokens if B is the activation matrix.
+    // It is the total number of output channels if B is the weight matrix.
+    int32_t n;
+    // The K dimension. It is the hidden dimension of the input matrices.
+    int32_t k;
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // All-reduce parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // The rank id of the current device in the multi-gpu space.
+    int rank;
+    // The number of peer devices in tensor-parallel group.
+    int tpGrpSize;
+    // Pointer for output with multicast mapping. It is used by the "reduce" op (LDGMC.ADD) of the
+    // two-shot reduce-scatter phase.
+    // The shape is [M, N] and the dtype is float.
+    void* multimemC;
+
+    // The barriers in global memory.
+    //
+    // The kernel arrives at (with release ordering) the multicast mapping of the barrier to broadcast
+    // amongst peer devices. It then waits (with acquire ordering) for the unicast mapping of the
+    // barrier.
+    //
+    // Flags in global memory that sync on "entrance" of reduce-scatter phase in two-shot all-reduce.
+    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
+    // The pointer to the unicast memory created with IpcNvlsHandle.
+    // Must be set to 0 before the kernel launch.
+    void* ptrTileBars;
+    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
+    // The pointer to the multicast memory created with IpcNvlsHandle.
+    void* multimemTileBars;
+
+    // Flags in global memory that sync on "exit" after the all-reduce finishes.
+    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
+    // The pointer to the unicast memory created with IpcNvlsHandle.
+    // Must be set to 0 before the kernel launch.
+    void* ptrCompletionBars;
+    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
+    // The pointer to the multicast memory created with IpcNvlsHandle
+    void* multimemCompletionBars;
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // Miscellaneous parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    // The barriers in global memory for Split-k reduction with exchange in GMEM.
+    // Each CTAs arrives at the barrier and blockIdx.z == gridDim.Z - 1 waits for the barrier to flip
+    // to perform a reduction.
+    // The shape is [numTilesM * numTilesN] and the dtype is uint32_t.
+    // For DeepSeek FP8 recipe, the shape is [numTilesM * numTilesN * 2].
+    // The memory must be set to 0 before the kernel launch.
+    void* ptrSplitKCompletionBars;
+
+    // Pointer to the memory holding the partial sums for split-K in GMEM.
+    // The shape is [numSlicesForSplitK, numSlicesForSliceK, numTilesM * tileM, numTilesN * tileN].
+    // The dtype is dtypeAcc, i.e. float.
+    void* ptrPartialSumsForSplitK;
+
+    // In some cases, some CTAs need to exit early. E.g. when the grid is statically set, but the
+    // actual workload is decided at runtime. This device pointer maps to the number of non exiting
+    // CTAs in the X dim of the grid when transposeMmaOutput is false. And the Y dim, otherwise.
+    // The pointer points to a scalar and the dtype is int32_t. The pointed value must be >= 0.
+    int32_t* ptrNumNonExitingCtas;
+
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+    //
+    // Miscellaneous parameters.
+    //
+    //////////////////////////////////////////////////////////////////////////////////////////////////
+
+    enum class MatrixType
+    {
+        MatrixA = 0,
+        MatrixB
+    };
+#endif
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+} // namespace gemm
+
+} // namespace gemm
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelTraits.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelTraits.h
index 9a4db96c7c..3f3b915eee 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelTraits.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/KernelTraits.h
@@ -20,6 +20,7 @@
 #include "trtllm/gen/CommonUtils.h"
 #include "trtllm/gen/DtypeDecl.h"
 #include <cassert>
+#include <stdexcept>
 
 namespace gemm
 {
@@ -77,6 +78,38 @@ public:
     }
 
     // Returns the offset of the ith chunk
+    int32_t getChunkOffsetByName(std::string const& name) const
+    {
+        for (size_t ii = 0; ii < mSmemChunkNames.size(); ++ii)
+        {
+            if (mSmemChunkNames[ii] == name)
+            {
+                return getChunkOffset(ii);
+            }
+        }
+        throw std::runtime_error("Name not found: " + name);
+    }
+
+    // Returns the first chunk reuse flag given chunk name.
+    int getFirstChunkReuseFlagByName(std::string const& name) const
+    {
+        for (size_t ii = 0; ii < mSmemChunkNames.size(); ++ii)
+        {
+            if (mSmemChunkNames[ii] == name)
+            {
+                return getFirstChunkReuseFlag(ii);
+            }
+        }
+        throw std::runtime_error("Name not found: " + name);
+    }
+
+    // Function to calculate the total size of the SMEM array
+    int32_t getTotalSize() const
+    {
+        return getOffsetBeforeChunk(static_cast<int32_t>(mNumBytesAndAlignmentPerSmemChunk.size()));
+    }
+
+private:
     int32_t getChunkOffset(int32_t ii) const
     {
         if (mFirstChunkReuse[ii])
@@ -91,12 +124,6 @@ public:
         return getSizePaddedToAlignment(offset, mNumBytesAndAlignmentPerSmemChunk[ii].second);
     }
 
-    // Function to calculate the total size of the SMEM array
-    int32_t getTotalSize() const
-    {
-        return getOffsetBeforeChunk(static_cast<int32_t>(mNumBytesAndAlignmentPerSmemChunk.size()));
-    }
-
     // Returns the first chunk reuse flag for the ith chunk.
     int getFirstChunkReuseFlag(int32_t ii) const
     {
@@ -139,9 +166,7 @@ int getNumSmemBitsPerElt(tg::Dtype dtype, tg::MmaKind mmaKind)
 {
     if (mmaKind == tg::MmaKind::Auto)
     {
-        std::cout << "mmaKind != tg::MmaKind::Auto" << std::endl;
-        assert(false);
-        return -1;
+        throw std::runtime_error("mmaKind != tg::MmaKind::Auto");
     }
     if (mmaKind == tg::MmaKind::MxFp8Fp6Fp4)
     {
@@ -162,11 +187,12 @@ public:
     KernelTraits() {}
 
     // The constructor.
-    KernelTraits(tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeAcc, tg::MmaKind mmaKind,
-        int32_t tileM, int32_t tileN, int32_t tileK, int32_t epilogueTileM, int32_t epilogueTileN, int32_t numStages,
-        int32_t numStagesMma, int32_t numSlicesForSplitK, int32_t numSlicesForSliceK, SplitK splitK, bool useTmaStore,
-        bool transposeMmaOutput, AllReduceAlgo allReduceAlgo, bool usePersistentScheduler, bool useDeepSeekFp8,
-        bool usePerTokenSfA, bool usePerTokenSfB)
+    KernelTraits(tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeAcc, tg::Dtype dtypeMmaA,
+        tg::Dtype dtypeMmaB, tg::MmaKind mmaKind, int32_t tileM, int32_t tileN, int32_t tileK, int32_t epilogueTileM,
+        int32_t epilogueTileN, int32_t numStages, int32_t numStagesMma, int32_t numSlicesForSplitK,
+        int32_t numSlicesForSliceK, SplitK splitK, bool useTmaStore, bool transposeMmaOutput,
+        AllReduceAlgo allReduceAlgo, bool usePersistentScheduler, bool useDeepSeekFp8, bool usePerTokenSfA,
+        bool usePerTokenSfB, BiasType biasType)
         : mMmaKind{mmaKind}
     {
         //
@@ -181,16 +207,17 @@ public:
             // [rowMax       ] (16B aligned) (if needed)
             // [sliceK       ] (16B aligned) (if needed)
             // [per-token SF ] (16B aligned) (if needed)
+            // [bias         ] (16B aligned) (if needed)
             //
             // SMEM for smemA and smemB might be repurposed and used for gmemC0 and gmemC1:
             //
             // [..smemA..][..smemB..][..smemBShuffle..]
-            // [..gmemC0..][..gmemC1..][..rowMax..][..sliceK..]
+            // [..gmemC0..][..gmemC1..][..rowMax..][..sliceK..][..per-token SF..][..bias..]
             //
 
             if (mMmaKind == tg::MmaKind::Auto)
             {
-                mMmaKind = dtypeGetMmaKind(dtypeA, dtypeB);
+                mMmaKind = dtypeGetMmaKind(dtypeMmaA, dtypeMmaB);
             }
 
             std::vector<std::pair<int32_t, int32_t>> numBytesAndAlignmentPerSmemChunk;
@@ -344,6 +371,29 @@ public:
                 firstChunkReuseSmem.emplace_back(false);
             }
 
+            // Bias
+            {
+                int32_t numBytesSmemBias = 0;
+                if (isBiasTypeN(biasType))
+                {
+                    numBytesSmemBias = tileN * sizeof(float);
+                }
+                else if (isBiasTypeM(biasType))
+                {
+                    numBytesSmemBias = tileM * sizeof(float);
+                }
+                else if (isBiasTypeMn(biasType))
+                {
+                    numBytesSmemBias = tileM * tileN * sizeof(float);
+                }
+                // Number of bytes alignment for bias
+                auto const numBytesAlignmentBias = 16;
+                // Add info.
+                smemChunkNames.emplace_back("smemBias");
+                numBytesAndAlignmentPerSmemChunk.emplace_back(std::make_pair(numBytesSmemBias, numBytesAlignmentBias));
+                firstChunkReuseSmem.emplace_back(false);
+            }
+
             // Per-block absolute maximum for multi-warp reduction.
             {
                 // Number of bytes: number of epilogue warps * number of tile columns.
@@ -358,6 +408,25 @@ public:
                 firstChunkReuseSmem.emplace_back(false);
             }
 
+            // SmemConstSfBuf
+            // A buffer used to copy constant values to TMEM.
+            {
+                // Do we need the buffer?
+                bool const useConstSfBuf = dtypeB == tg::Dtype::E4m3 && dtypeMmaB == tg::Dtype::MxE4m3;
+                // Number of bytes for the buffer.
+                auto const numSmemBytesConstSfBuf = useConstSfBuf ? 512 : 0;
+                // Number of bytes for the alignment of the buffer.
+                auto const numBytesAlignmentConstSfBuf = 16;
+                // No need to reuse the first chunk.
+                auto const reuseChunksSmemConstSfBuf = false;
+
+                // Add info.
+                smemChunkNames.emplace_back("smemConstSfBuf");
+                numBytesAndAlignmentPerSmemChunk.emplace_back(
+                    std::make_pair(numSmemBytesConstSfBuf, numBytesAlignmentConstSfBuf));
+                firstChunkReuseSmem.emplace_back(reuseChunksSmemConstSfBuf);
+            }
+
             // Create SMEM helper object.
             mSmemAllocatorHelper
                 = MemAllocatorHelper(numBytesAndAlignmentPerSmemChunk, firstChunkReuseSmem, smemChunkNames);
@@ -401,10 +470,12 @@ public:
 
             // Matrix A
             {
+                // We use TMEM for A if we use slice-K or if we need to cast A.
+                bool const useTmemA = (numSlicesForSliceK > 1) || (dtypeMmaA != dtypeA);
                 // Number of columns for A.
-                auto const numTmemColsA = numSlicesForSliceK > 1 ? numStages * tileK
-                        / (numSlicesForSliceK * tg::dtypeGetNumBits(tg::Dtype::UInt32) / tg::dtypeGetNumBits(dtypeA))
-                                                                 : 0;
+                auto const numTmemColsA = useTmemA ? numStages * tileK
+                        / (numSlicesForSliceK * tg::dtypeGetNumBits(tg::Dtype::UInt32) / tg::dtypeGetNumBits(dtypeMmaA))
+                                                   : 0;
                 // Number of columns for A alignment.
                 auto const numColsAlignmentA = 4;
                 // No need to reuse TMEM.
@@ -418,12 +489,16 @@ public:
 
             // Sf A
             {
-                bool const useBlockScalingA = tg::dtypeIsBlockFmt(dtypeA);
+                // Does the MMA require block scales in TMEM for A?
+                bool const useBlockScalingA = tg::dtypeIsBlockFmt(dtypeMmaA);
+                // Are the block scales constant?
+                bool const useConstSfA = useBlockScalingA && !tg::dtypeIsBlockFmt(dtypeA);
                 // Number of columns for scaling factors of A.
-                auto const numTmemColsSfA
-                    = useBlockScalingA ? ((tileK / 64) * 2 * tg::ceilDiv(tileM, 64)) * numStages : 0;
+                auto const numTmemColsSfA = useConstSfA
+                    ? tg::roundUp((tileK / 64) * 2 * tg::ceilDiv(tileM, 64), 4)
+                    : (useBlockScalingA ? ((tileK / 64) * 2 * tg::ceilDiv(tileM, 64)) * numStages : 0);
                 // Number of columns for Sf alignment.
-                auto const numColsAlignmentSfA = 2;
+                auto const numColsAlignmentSfA = 4;
                 // No need to reuse TMEM.
                 auto const reuseChunksTmemSfA = false;
 
@@ -435,12 +510,16 @@ public:
 
             // Sf B
             {
-                bool const useBlockScalingB = tg::dtypeIsBlockFmt(dtypeB);
+                // Does the MMA require block scales in TMEM for B?
+                bool const useBlockScalingB = tg::dtypeIsBlockFmt(dtypeMmaB);
+                // Are the block scales constant?
+                bool const useConstSfB = useBlockScalingB && !tg::dtypeIsBlockFmt(dtypeB);
                 // Number of columns for scaling factors of B.
-                auto const numTmemColsSfB
-                    = useBlockScalingB ? ((tileK / 64) * 2 * tg::ceilDiv(tileN, 64)) * numStages : 0;
+                auto const numTmemColsSfB = useConstSfB
+                    ? tg::roundUp((tileK / 64) * 2 * tg::ceilDiv(tileN, 64), 4)
+                    : (useBlockScalingB ? ((tileK / 64) * 2 * tg::ceilDiv(tileN, 64)) * numStages : 0);
                 // Number of columns for Sf alignment.
-                auto const numColsAlignmentSfB = 2;
+                auto const numColsAlignmentSfB = 4;
                 // No need to reuse TMEM.
                 auto const reuseChunksTmemSfB = false;
 
@@ -487,14 +566,14 @@ inline int32_t getTmemBufferSize(KernelTraits traits)
 
 inline int32_t getSmemOffsetLoadA(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(0);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemLoadA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetLoadB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(1);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemLoadB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -508,50 +587,63 @@ inline int32_t getSmemOffsetLoadAb(KernelTraits traits)
 
 inline int32_t getSmemOffsetLoadShuffleB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(2);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBShuffle");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetGmemC(KernelTraits traits, int resIdx = 0)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(3 + resIdx);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemGmemC" + std::to_string(resIdx));
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetRowMax(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(5);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemRowMax");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetSliceK(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(6);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemSliceK");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetPerTokenSf(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(7);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemPerTokenSf");
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+inline int32_t getSmemOffsetBias(KernelTraits traits)
+{
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBias");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetBlockAmax(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(8);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBlockAmax");
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+inline int32_t getSmemOffsetConstSfBuf(KernelTraits traits)
+{
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemConstSfBuf");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t isSmemAbRepurposedToGmemC(KernelTraits traits, int resIdx = 0)
 {
-    // Be conscious that the index (3 + resIdx) should match the index in getSmemOffsetGmemC().
-    return traits.mSmemAllocatorHelper.getFirstChunkReuseFlag(3 + resIdx);
+    return traits.mSmemAllocatorHelper.getFirstChunkReuseFlagByName("smemGmemC" + std::to_string(resIdx));
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -562,28 +654,28 @@ inline int32_t isSmemAbRepurposedToGmemC(KernelTraits traits, int resIdx = 0)
 
 inline int32_t getTmemOffsetD(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(0);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemD");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetA(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(1);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetSfA(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(2);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemSfA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetSfB(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(3);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemSfB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/TmaDescriptor.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/TmaDescriptor.h
index 0b7574260e..a246ac35b3 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/TmaDescriptor.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/TmaDescriptor.h
@@ -41,14 +41,14 @@ namespace tg = trtllm::gen;
 #ifdef TLLM_ENABLE_CUDA
 
 inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, std::vector<uint64_t> const& shapes,
-    std::vector<uint64_t> const& strides, int32_t tileSizeMn, int32_t tileSizeK, void* gmemAddr, bool doSwizzle = true)
+    std::vector<uint64_t> const& strides, std::vector<int32_t> const& tileShapes, void* gmemAddr, bool doSwizzle = true)
 {
     // The multiplication factor of the data padding in SMEM.
     int32_t padMultiplier = 1;
     CUtensorMap desc{};
     // The data type.
     CUtensorMapDataType tmaDataFormat{CU_TENSOR_MAP_DATA_TYPE_FLOAT32};
-    if (dtype == tg::Dtype::E4m3 || dtype == tg::Dtype::MxE4m3)
+    if (dtype == tg::Dtype::E4m3 || dtype == tg::Dtype::MxE4m3 || dtype == tg::Dtype::UE8m0)
     {
         tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_UINT8;
     }
@@ -71,15 +71,11 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, st
             padMultiplier = 2;
             tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN16B;
         }
-        else if (mmaKind == tg::MmaKind::MxFp4NvFp4 || mmaKind == tg::MmaKind::Auto)
-        {
-            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN8B;
-        }
         else
         {
-            std::cerr << "Invalid dtype / mmaKind combination " << tg::dtypeToString(dtype) << "/"
-                      << tg::mmaKindToString(mmaKind) << std::endl;
-            assert(false);
+            // Note: this is used with the MMA kind MxFp4NvFp4 and also when casting to a higher-precision
+            // type such as Bfloat16 before the MMA.
+            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN8B;
         }
     }
     else if (dtype == tg::Dtype::Fp32)
@@ -94,24 +90,30 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, st
 
     // The swizzle type.
     CUtensorMapSwizzle swizzleType{CU_TENSOR_MAP_SWIZZLE_NONE};
-    int32_t tileKSizeInBytes = (tileSizeK * tg::dtypeGetNumBits(dtype) * padMultiplier) / /* bits */ 8;
+    int32_t fastestDimTileSizeBytes = (tileShapes[0] * tg::dtypeGetNumBits(dtype) * padMultiplier) / /* bits */ 8;
     if (doSwizzle)
     {
-        if ((tileKSizeInBytes % 128) == 0)
+        if ((fastestDimTileSizeBytes % 128) == 0)
         {
             swizzleType = CU_TENSOR_MAP_SWIZZLE_128B;
         }
-        else if ((tileKSizeInBytes % 64) == 0)
+        else if ((fastestDimTileSizeBytes % 64) == 0)
         {
             swizzleType = CU_TENSOR_MAP_SWIZZLE_64B;
         }
-        else if ((tileKSizeInBytes % 32) == 0)
+        else if ((fastestDimTileSizeBytes % 32) == 0)
         {
             swizzleType = CU_TENSOR_MAP_SWIZZLE_32B;
+            // This path is only for the scaling factors.
+        }
+        else if ((fastestDimTileSizeBytes % 16) == 0 && (dtype == tg::Dtype::UE8m0 || dtype == tg::Dtype::E4m3))
+        {
+            swizzleType = CU_TENSOR_MAP_SWIZZLE_NONE;
         }
         else
         {
-            std::cerr << "buildNdTmaDescriptor: unexpected tileKSizeInBytes " << tileKSizeInBytes << std::endl;
+            std::cerr << "buildNdTmaDescriptor: unexpected fastestDimTileSizeBytes " << fastestDimTileSizeBytes
+                      << std::endl;
             assert(false);
         }
     }
@@ -121,8 +123,9 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, st
 
     // Check shape must be in range [1, 2^32]
     int32_t dim = shapes.size();
-    // Expect 2 dimensions.
-    assert(dim == 2 || dim == 3);
+    // Expect 2 dimensions for regular gemm, 3 dimensions for batched gemm or blocked layout, and 4
+    // dimensions for batched gemm with blocked layout.
+    assert(dim == 2 || dim == 3 || dim == 4);
     // Check shape range.
     for (int32_t ii = 0; ii < dim; ++ii)
     {
@@ -147,59 +150,74 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, st
     // The number of elements in 128B.
     auto const numEltsIn128B = numEltsPerUInt32 /*4B*/ * 32;
     // The number of tile K hidden size (per token) in each block of shared memory.
-    auto const numEltsInClampedTileKSize = std::min(numEltsIn128B, tileSizeK);
+    auto const numEltsInClampedFastestTileSize = std::min(numEltsIn128B, tileShapes[0]);
 
-    // Build tile shapes.
-    std::vector<uint32_t> tileShapes(dim, 1);
-    tileShapes[0] = numEltsInClampedTileKSize; // tileSizeK
-    tileShapes[1] = tileSizeMn;                // tileSizeMn
+    // Build box dim array. If tileShapes is smaller than dim, just fill with 1s.
+    assert(static_cast<int32_t>(tileShapes.size()) <= dim);
+    std::vector<uint32_t> boxDim(dim, 1);
+    boxDim[0] = numEltsInClampedFastestTileSize;
+    for (size_t ii = 1; ii < tileShapes.size(); ++ii)
+    {
+        if (tileShapes[ii] > 256)
+        {
+            std::cerr << "buildNdTmaDescriptor: boxDim too large " << tileShapes[ii] << std::endl;
+            assert(false);
+        }
+        else
+        {
+            boxDim[ii] = tileShapes[ii];
+        }
+    }
 
     // Set tile strides to 1;
     std::vector<uint32_t> tileStrides(dim, 1);
 
     // Build the descriptor.
     CUresult result = cuTensorMapEncodeTiled(&desc, tmaDataFormat,
-        /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), tileShapes.data(), tileStrides.data(),
+        /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), boxDim.data(), tileStrides.data(),
         /*interleave=*/CU_TENSOR_MAP_INTERLEAVE_NONE, swizzleType,
         /*l2Promotion=*/CU_TENSOR_MAP_L2_PROMOTION_L2_128B,
         /*oobFill=*/CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE);
 
     if (result != CUDA_SUCCESS)
     {
-        std::cerr << "Error: Failed to initialize the TMA descriptor " << result << std::endl;
+        char const* errorString;
+        cuGetErrorString(result, &errorString);
+        std::stringstream ss;
+        ss << "Error: Failed to initialize the TMA descriptor " << result << std::endl;
 
-        std::cerr << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr
-                  << std::endl;
+        ss << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr << std::endl;
 
-        std::cerr << "Shape: ";
+        ss << "Shape: ";
         for (int ii = 0; ii < dim; ++ii)
         {
-            std::cerr << shapes[ii] << " ";
+            ss << shapes[ii] << " ";
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "Stride: ";
+        ss << "Stride: ";
         for (int ii = 0; ii < dim - 1; ++ii)
         {
-            std::cerr << stridesInBytes[ii] << " ";
+            ss << stridesInBytes[ii] << " ";
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileShapes: ";
+        ss << "tileShapes: ";
         for (int ii = 0; ii < dim; ++ii)
         {
-            std::cerr << tileShapes[ii] << " ";
+            ss << boxDim[ii] << " ";
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileStrides: ";
+        ss << "tileStrides: ";
         for (int ii = 0; ii < dim; ++ii)
         {
-            std::cerr << tileStrides[ii] << " ";
+            ss << tileStrides[ii] << " ";
         }
-        std::cerr << std::endl;
-        std::cerr << "swizzleType: " << int(swizzleType) << std::endl;
-        assert(false);
+        ss << std::endl;
+        ss << "swizzleType: " << int(swizzleType) << std::endl;
+        ss << "(in " << __FILE__ << ":" << __LINE__ << ")" << std::endl;
+        throw std::runtime_error(ss.str());
     }
 
     return desc;
@@ -267,41 +285,44 @@ inline CUtensorMap buildSfTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
 
     if (result != CUDA_SUCCESS)
     {
-        std::cerr << "Error: Failed to initialize the TMA descriptor for SF " << result << std::endl;
+        char const* errorString;
+        cuGetErrorString(result, &errorString);
+        std::stringstream ss;
+        ss << "Error: Failed to initialize the TMA descriptor for SF " << errorString << std::endl;
 
-        std::cerr << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr
-                  << std::endl;
+        ss << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr << std::endl;
 
-        std::cerr << "shape:";
+        ss << "shape:";
         for (uint32_t shape_i : shapes)
         {
-            std::cerr << " " << shape_i;
+            ss << " " << shape_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "stridesInBytes:";
+        ss << "stridesInBytes:";
         for (uint32_t stride_i : stridesInBytes)
         {
-            std::cerr << " " << stride_i;
+            ss << " " << stride_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileShapes:";
+        ss << "tileShapes:";
         for (uint32_t tileShape_i : tileShapes)
         {
-            std::cerr << " " << tileShape_i;
+            ss << " " << tileShape_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileStrides:";
+        ss << "tileStrides:";
         for (uint32_t tileStride_i : tileStrides)
         {
-            std::cerr << " " << tileStride_i;
+            ss << " " << tileStride_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "swizzleType: " << int(swizzleType) << std::endl;
-        assert(false);
+        ss << "swizzleType: " << int(swizzleType) << std::endl;
+        ss << "(in " << __FILE__ << ":" << __LINE__ << ")" << std::endl;
+        throw std::runtime_error(ss.str());
     }
 
     return desc;
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/config.json b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/config.json
index fbbcdfa059..d502017fc2 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/config.json
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/config.json
@@ -12,7 +12,6 @@
             "epilogueTileM": 128,
             "epilogueTileN": 8,
             "numStages": 4,
-            "numMmaStages": 1,
             "numSlicesForSplitK": 1,
             "useTwoTmaLoadWarps": true,
             "clusterDimX": 1,
@@ -43,7 +42,6 @@
             "epilogueTileM": 128,
             "epilogueTileN": 128,
             "numStages": 3,
-            "numMmaStages": 1,
             "numSlicesForSplitK": 1,
             "useTwoTmaLoadWarps": true,
             "clusterDimX": 1,
@@ -75,7 +73,6 @@
             "epilogueTileM": 64,
             "epilogueTileN": 8,
             "numStages": 3,
-            "numMmaStages": 1,
             "numSlicesForSplitK": 1,
             "useTwoTmaLoadWarps": true,
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@@ -105,7 +102,6 @@
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@@ -135,7 +131,6 @@
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@@ -182,7 +177,6 @@
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@@ -212,7 +206,6 @@
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@@ -232,7 +225,6 @@
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@@ -246,7 +238,6 @@
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@@ -0,0 +1,3 @@
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
new file mode 100644
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@@ -0,0 +1,3 @@
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x128u2_s4_et64x8_m64x8x32_cga1x1x1_16dp256b_TN_transOut_noShflA_dsFp8_schedS_sm100a_cubin.cpp
new file mode 100644
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new file mode 100644
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp16_E4m3E4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x2_16dp256b_splitK2_TN_transOut_schedS_sm100a_cubin.cpp
new file mode 100644
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x128_m128x128x64_cga1x1x1_16dp256b_TN_schedS_sm100a_cubin.cpp
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_Fp32_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemm/trtllmGen_gemm_export/cubins/Gemm_MxE4m3_MxE2m1MxE4m3_Fp32_t128x8x512u2_s3_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_sm100a_cubin.cpp
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@@ -0,0 +1,3 @@
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+size 492288
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.cpp
index c5d5a18c00..25eb9cd915 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.cpp
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.cpp
@@ -26,14 +26,14 @@ namespace tensorrt_llm
 {
 namespace kernels
 {
-
-static gemmGatedAct::GemmGatedActInterface::ModuleCache globalTrtllmGenGemmGatedActModuleCache;
+using namespace gemmGatedAct::gemmGatedAct;
+static GemmGatedActInterface::ModuleCache globalTrtllmGenGemmGatedActModuleCache;
 
 TrtllmGenGemmGatedActRunner::TrtllmGenGemmGatedActRunner(TrtllmGenGemmGatedActRunnerOptions const& options_)
     : mOptions(options_)
 {
     // Select a GEMM kernel config to use
-    auto const gemm = gemmGatedAct::GemmGatedActInterface();
+    auto const gemm = GemmGatedActInterface();
     auto const configs = gemm.getGemmConfigs();
 
     mPassingConfigIndices.clear();
@@ -43,7 +43,7 @@ TrtllmGenGemmGatedActRunner::TrtllmGenGemmGatedActRunner(TrtllmGenGemmGatedActRu
         auto const options = configs[i].mOptions;
 
         // When we include low-latency kernels we can set transposeMmaOutput via constructor
-        if (options.mDtypeElt == mOptions.eltType && options.mDtypeC == mOptions.outputType
+        if (options.mDtypeA == mOptions.eltType && options.mDtypeC == mOptions.outputType
             && options.mUseDeepSeekFp8 == mOptions.deepSeekFp8
             && options.mTransposeMmaOutput == mOptions.transposeMmaOutput)
         {
@@ -56,14 +56,14 @@ TrtllmGenGemmGatedActRunner::TrtllmGenGemmGatedActRunner(TrtllmGenGemmGatedActRu
 
 size_t TrtllmGenGemmGatedActRunner::getWorkspaceSizeInBytes(int32_t m, int32_t n, int32_t k)
 {
-    gemmGatedAct::GemmGatedActData gemmData;
+    GemmGatedActData gemmData;
     gemmData.mProblemDimensions.mM = mOptions.transposeMmaOutput ? n : m;
     gemmData.mProblemDimensions.mN = mOptions.transposeMmaOutput ? m : n;
     gemmData.mProblemDimensions.mK = k;
 
     selectGemmConfig(m, n, k);
 
-    auto gemm = gemmGatedAct::GemmGatedActInterface();
+    auto gemm = GemmGatedActInterface();
     auto const configs = gemm.getGemmConfigs();
     TLLM_CHECK_WITH_INFO(
         mSelectedConfigIndex.has_value(), "No valid kernel found for given param config and problem size");
@@ -76,9 +76,9 @@ void TrtllmGenGemmGatedActRunner::run(int32_t m, int32_t n, int32_t k, void cons
     void const* b, float const* bScale, void* c, float* cScale, float* cScaleGate, void* workspace, CUstream stream,
     int device)
 {
-    auto gemm = gemmGatedAct::GemmGatedActInterface();
+    auto gemm = GemmGatedActInterface();
 
-    gemmGatedAct::GemmGatedActData gemmData;
+    GemmGatedActData gemmData;
 
     auto const configs = gemm.getGemmConfigs();
     TLLM_CHECK_WITH_INFO(
@@ -107,7 +107,7 @@ void TrtllmGenGemmGatedActRunner::run(int32_t m, int32_t n, int32_t k, void cons
     gemm.runInitBeforeWorldSync(config, gemmData, static_cast<void*>(stream));
 
     auto const err = gemm.run(config, workspace, gemmData, static_cast<void*>(stream), multiProcessorCount,
-        globalTrtllmGenGemmGatedActModuleCache);
+        /*usePdl=*/true, globalTrtllmGenGemmGatedActModuleCache);
 
     TLLM_CHECK_WITH_INFO(err == 0, "Error occurred when running GEMM!");
 }
@@ -120,10 +120,10 @@ void TrtllmGenGemmGatedActRunner::run(int32_t m, int32_t n, int32_t k, void cons
 
 void TrtllmGenGemmGatedActRunner::selectGemmConfig(int32_t m, int32_t n, int32_t k)
 {
-    auto const gemm = gemmGatedAct::GemmGatedActInterface();
+    auto const gemm = GemmGatedActInterface();
     auto const configs = gemm.getGemmConfigs();
 
-    gemmGatedAct::GemmGatedActData gemmData;
+    GemmGatedActData gemmData;
     // Dims
     gemmData.mProblemDimensions.mM = mOptions.transposeMmaOutput ? n : m;
     gemmData.mProblemDimensions.mN = mOptions.transposeMmaOutput ? m : n;
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.h
index f7c30c9e0c..cbd6bada46 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/KernelRunner.h
@@ -28,8 +28,8 @@ namespace kernels
 
 struct TrtllmGenGemmGatedActRunnerOptions
 {
-    trtllm::gen::Dtype eltType;
-    trtllm::gen::Dtype outputType;
+    gemmGatedAct::trtllm::gen::Dtype eltType;
+    gemmGatedAct::trtllm::gen::Dtype outputType;
     bool deepSeekFp8{false};
     bool transposeMmaOutput{false};
 };
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/Enums.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/Enums.h
index 14c5d15b53..d1a31876f3 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/Enums.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/Enums.h
@@ -18,6 +18,9 @@
 
 #include <cstdint>
 
+namespace gemmGatedAct
+{
+
 namespace gemm
 {
 
@@ -36,6 +39,31 @@ enum class AllReduceAlgo : uint32_t
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+enum class MatrixLayout
+{
+    // K-major layout (default). [Mn, K]
+    MajorK = 0,
+    // M-major for A and N-major for B. [K, Mn]
+    MajorMn,
+    // Layout is blocked along the K dimension as seen in the diagram below. [K / blockK, Mn, blockK]
+    // where blockK is fixed at 128B
+    //
+    //         ├──────────────  K  ──────────────┤
+    //  ┬  ┬   ├──── K block ───┤
+    //  │  │   │ 0   1   2   3  ║ 32  33  34  35 │
+    //  │ CTA0 │ 4   5   6   7  ║ 36  37  38  39 │
+    //  │  │   │ 8   9   10  11 ║ 40  41  42  43 │
+    //  │  ┴   │ 12  13  14  15 ║ 44  45  46  47 │
+    //  M  ┬   ├────────────────║────────────────┤
+    //  │  │   │ 16  17  18  19 ║ 48  49  50  51 │
+    //  │ CTA1 │ 20  21  22  23 ║ 52  53  54  55 │
+    //  │  │   │ 24  25  26  27 ║ 56  57  58  59 │
+    //  ┴  ┴   │ 28  29  30  31 ║ 60  61  62  63 │
+    BlockMajorK
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 enum class SplitK : uint32_t
 {
     // No split-k is needed. I.e. mNumSlicesForSplitK == 1.
@@ -51,6 +79,20 @@ enum class SplitK : uint32_t
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+enum class BiasType : uint32_t
+{
+    // No bias.
+    None = 0,
+    // One bias value per N of the output tensor.
+    M = 1,
+    // One bias value per row M of the output tensor.
+    N = 2,
+    // One bias value for each element of the output tensor.
+    Mn = 3,
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 enum class TileScheduler
 {
     // Static scheduler (Non-persistent).
@@ -77,4 +119,23 @@ SPLIT_K_FUNCTION(Dsmem)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+// Helper functions to check the Bias type.
+
+#define BIAS_TYPE_FUNCTION(Mode)                                                                                       \
+    inline bool isBiasType##Mode(BiasType type)                                                                        \
+    {                                                                                                                  \
+        return (type == BiasType::Mode);                                                                               \
+    }
+
+BIAS_TYPE_FUNCTION(None)
+BIAS_TYPE_FUNCTION(N)
+BIAS_TYPE_FUNCTION(M)
+BIAS_TYPE_FUNCTION(Mn)
+
+#undef BIAS_TYPE_FUNCTION
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 } // namespace gemm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActInterface.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActInterface.h
index a8087dc59a..f4cd7e2ad2 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActInterface.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActInterface.h
@@ -17,6 +17,7 @@
 #pragma once
 
 #include <numeric>
+#include <optional>
 
 #include "GemmGatedActOptions.h"
 #include "KernelParams.h"
@@ -29,6 +30,9 @@
 namespace gemmGatedAct
 {
 
+namespace gemmGatedAct
+{
+
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //
 // GemmGatedActData
@@ -51,14 +55,19 @@ struct GemmGatedActData
         int32_t mK{0};
         // The rank id of the current device in the multi-gpu space.
         int32_t mRank{0};
-        // The number of peer devices in tensor-parallel group.
+        // The number of devices in tensor-parallel group.
         int32_t mWorldSize{0};
     };
 
     struct InputBuffers
     {
-        // The matrix A. The data type is controlled by options.mDtypeElt.
-        // The shape is [M, K]. The rightmost dimension is contiguous in memory.
+        // The matrix A. The data type is controlled by options.mDtypeA.
+        //
+        // When layoutA is MatrixLayout::MajorK, the shape is [M, K].
+        // When LayoutA is MatrixLayout::MajorMn, the shape is [K, M].
+        // When LayoutA is MatrixLayout::BlockMajorK, the shape is [K / blockK, M, blockK] where blockK
+        // is 128B.
+        // The rightmost dimension is contiguous in memory.
         void const* mPtrA{nullptr};
 
         // The block scaling factors to dequantize A.
@@ -91,8 +100,13 @@ struct GemmGatedActData
         // The shape is [M]
         void const* mPtrPerTokenSfA{nullptr};
 
-        // The matrix B. The data type is controlled by options.mDtypeElt.
-        // The shape is [N, K]. The rightmost dimension is contiguous in memory.
+        // The matrix B. The data type is controlled by options.mDtypeB.
+        //
+        // When layoutB is MatrixLayout::MajorK, the shape is [N, K].
+        // When layoutB is MatrixLayout::MajorMn, the shape is [K, N].
+        // When layoutB is MatrixLayout::BlockMajorK, the shape is [K / blockK, N, blockK] where blockK
+        // is 128B.
+        // The rightmost dimension is contiguous in memory.
         void const* mPtrB{nullptr};
 
         // The scaling factors to dequantize B.
@@ -132,6 +146,21 @@ struct GemmGatedActData
         // The shape is [N]
         void const* mPtrPerTokenSfB{nullptr};
 
+        // The bias applied after the GEMM and before the activation function.
+        // The bias is applied before the global scaling factor. I.e.
+        // C = act(A * B + bias') * scaleC
+        // scaleC = dequantA * dequantB * quantC
+        // Thus, the bias' = bias / (dequantA * dequantB), where the bias is the original bias.
+        //
+        // if BiasType is N, the shape is [N]
+        // The bias is broadcasted along the M dimension.
+        //
+        // if BiasType is M, the shape is [M]
+        // The bias is broadcasted along the N dimension.
+        //
+        // The dtype is float32.
+        void const* mPtrBias{nullptr};
+
         // The output tensor scaling factor for MxFp{4,8}, Fp8, NvFp4 and DeepSeek FP8 quantization.
         // TensorRT-LLM API requires a scaling factor on the device.
         // Shape is [1].
@@ -140,6 +169,43 @@ struct GemmGatedActData
         // TensorRT-LLM API requires a scaling factor on the device.
         // Shape is [1].
         void const* mPtrScaleGate{nullptr};
+        // The alpha for SwiGlu.
+        // Alpha is 1.f if nullptr.
+        // Shape is [1].
+        void const* mPtrSwiGluAlpha{nullptr};
+        // The beta for SwiGlu.
+        // Beta is 0.f if nullptr.
+        // Shape is [1].
+        void const* mPtrSwiGluBeta{nullptr};
+        // The clamp limit before the activation.
+        // Clamp limit is FLT_MAX if nullptr.
+        // When the input is FP8 or NVFP4, the clamp has to be scaled by limit' = limit / dequantAb.
+        // Shape is [1].
+        //
+        // The given clamp limit applies to the dequantized values, so the order of operations would
+        // look something like this:
+        //
+        // x0 = x0 * dqAb
+        // x0 = clamp(x0, none, limit)
+        // x0 = x0 * sigmoid(alpha * x0)
+        // x1 = dqAb * x1
+        // x1 = clamp(x1, -limit, limit)
+        // out = qC * (x1 + beta) * x0
+        //
+        // Given that the dqAb and qC are combined into scaleC, we can bring the dqAb into the clamp
+        // limit and apply the clamping prior to dequantization:
+        //
+        // x0 = clamp(x0, none, limit / dqAb)
+        // x0 = x0 * dqAb
+        // x0 = x0 * sigmoid(alpha * x0)
+        // x1 = clamp(x1, -limit / dqAb, limit / dqAb)
+        // scaleC = dqAb * qC
+        // beta' = beta / dqAb
+        // out = scaleC * (x1 + beta') * x0
+        //
+        // Note this assumes that scaleAb == scaleGate which is true in TRT-LLM MoE use-case
+        //
+        void const* mPtrClampLimit{nullptr};
     };
 
     struct OutputBuffers
@@ -190,7 +256,7 @@ public:
     // Launch the cubin from the provided config. It calls all necessary memsets for internal buffers.
     // Provided config must be validated with isValidConfig before the call.
     int32_t run(GemmGatedActConfig const& config, void* workspace, GemmGatedActData const& data, void* cudaStream,
-        int32_t multiProcessorCount,
+        int32_t multiProcessorCount, bool usePdl = true,
         std::optional<std::reference_wrapper<ModuleCache>> moduleCache = std::nullopt) const;
 
     // Initializes the buffers before the world sync. Must be called before run.
@@ -343,8 +409,12 @@ bool GemmGatedActInterface::isValidConfig(GemmGatedActConfig const& config, Gemm
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 int32_t GemmGatedActInterface::run(GemmGatedActConfig const& config, void* workspace, GemmGatedActData const& data,
-    void* cudaStream, int32_t multiProcessorCount, std::optional<std::reference_wrapper<ModuleCache>> moduleCache) const
+    void* cudaStream, int32_t multiProcessorCount, bool usePdl,
+    std::optional<std::reference_wrapper<ModuleCache>> moduleCache) const
 {
+    // Might be used.
+    (void) usePdl;
+    (void) moduleCache;
     // Get options from config and data.
     auto options = getOptionsFromConfigAndData(config, data);
 
@@ -373,9 +443,12 @@ int32_t GemmGatedActInterface::run(GemmGatedActConfig const& config, void* works
     // Create kernel params.
     auto kernelParams = gemmGatedAct::KernelParams::setKernelParams(options, data.mInputBuffers.mPtrA,
         data.mInputBuffers.mPtrSfA, data.mInputBuffers.mPtrPerTokenSfA, data.mInputBuffers.mPtrB,
-        data.mInputBuffers.mPtrSfB, data.mInputBuffers.mPtrPerTokenSfB, data.mOutputBuffers.mPtrC,
-        reinterpret_cast<float const*>(data.mInputBuffers.mPtrScaleC), data.mOutputBuffers.mPtrSfC,
-        reinterpret_cast<float const*>(data.mInputBuffers.mPtrScaleGate), reinterpret_cast<float*>(dRowMax),
+        data.mInputBuffers.mPtrSfB, data.mInputBuffers.mPtrPerTokenSfB, data.mInputBuffers.mPtrBias,
+        data.mOutputBuffers.mPtrC, reinterpret_cast<float const*>(data.mInputBuffers.mPtrScaleC),
+        data.mOutputBuffers.mPtrSfC, reinterpret_cast<float const*>(data.mInputBuffers.mPtrScaleGate),
+        reinterpret_cast<float const*>(data.mInputBuffers.mPtrClampLimit),
+        reinterpret_cast<float const*>(data.mInputBuffers.mPtrSwiGluAlpha),
+        reinterpret_cast<float const*>(data.mInputBuffers.mPtrSwiGluBeta), reinterpret_cast<float*>(dRowMax),
         reinterpret_cast<uint32_t*>(dRowMaxBars));
 
     // The size of the grid.
@@ -395,26 +468,26 @@ int32_t GemmGatedActInterface::run(GemmGatedActConfig const& config, void* works
 #ifdef TLLM_GEN_EXPORT_INTERFACE
     CUmodule cuModule;
     CUfunction cuFunction;
+
     if (moduleCache.has_value())
     {
         ModuleCache& moduleCacheRef = moduleCache.value().get();
 
-        // Modules are associated with a specific context so include the ctxId in the key
+        // Modules are associated with a specific context, so the context is included in the key
         CUcontext ctx;
         unsigned long long ctxId;
         cuCtxGetCurrent(&ctx);
         cuCtxGetId(ctx, &ctxId);
 
-        // Reinterpret the ctxId as a string to avoid needing a custom hash or converting it to a string in decimal
-        // representation.
+        // Reinterpret the ctxId as a string to avoid needing a custom hash or converting it to a
+        // string in decimal representation.
         std::string const ctxName
             = std::string(reinterpret_cast<char*>(&ctxId), sizeof(unsigned long long) / sizeof(char));
         std::string const funcName = std::string(config.mFunctionName);
-        // As the ctxName is a fixed number of bytes, the two strings can just be appended without risk of a collision
         auto const moduleKey = ctxName + funcName;
         auto module = moduleCacheRef.find(moduleKey);
 
-        // Check if module exists in cache. Otherwise, load it
+        // Use cache if module is found, otherwise load and insert into cache
         if (module != moduleCacheRef.end())
         {
             cuFunction = std::get<1>(module->second);
@@ -444,8 +517,9 @@ int32_t GemmGatedActInterface::run(GemmGatedActConfig const& config, void* works
     // Run the kernel.
     auto result = trtllm::gen::launchKernel((void*) &kernelParams, cudaStream, config.mSharedMemSize, cuFunction,
         block3, grid3, cluster3,
-        config.mOptions.mGridWaitForPrimaryEarlyExit | config.mOptions.mGridWaitForPrimaryA
-            | config.mOptions.mGridWaitForPrimaryB);
+        usePdl
+            && (config.mOptions.mGridWaitForPrimaryEarlyExit | config.mOptions.mGridWaitForPrimaryA
+                | config.mOptions.mGridWaitForPrimaryB));
     if (result != CUDA_SUCCESS)
     {
         return -1;
@@ -474,3 +548,5 @@ int32_t GemmGatedActInterface::runInitBeforeWorldSync(GemmGatedActConfig const&,
 } // namespace gemmGatedAct
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActOptions.h
index b23efd2774..a6cf385a13 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmGatedActOptions.h
@@ -48,6 +48,9 @@
 namespace gemmGatedAct
 {
 
+namespace gemmGatedAct
+{
+
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 namespace tg = trtllm::gen;
@@ -55,8 +58,16 @@ namespace tg = trtllm::gen;
 // Type of the gated activation
 enum class ActType
 {
-    // silu(x) = x * sigmoid(x) = x * (1 / (1 + e^(-x)))
-    Silu = 0
+    // For ActType == SwiGlu, ideally we would like to have something like
+    //    gatedAct = scaleC * (x0 * scaleAb + beta) * ((x1 * scaleGate) * sigmoid(alpha * x1 *
+    //    scaleGate)).
+    // But for now, we use the simplified version
+    //    gatedAct = scaleC' * (x0 + beta') * ((x1 * scaleGate) * sigmoid(alpha * x1 * scaleGate)),
+    // where x0 and x1 are the raw numbers from Gemm, while scaleC and scaleGate are input scales,
+    // beta' = beta / scaleAb, scaleC' = scaleC * scaleAb.
+    //
+    // GatedSilu is a special case of SwiGlu where the alpha is 1.0 and the beta is 0.0.
+    SwiGlu
 };
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -69,24 +80,38 @@ enum class ActType
         return (type == ActType::actType);                                                                             \
     }
 
-TLLM_ACT_TYPE_FUNCTION(Silu)
+TLLM_ACT_TYPE_FUNCTION(SwiGlu)
 
 #undef TLLM_ACT_TYPE_FUNCTION
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-struct GemmGatedActOptions : virtual public gemm::GemmOptions
+inline std::string getActTypeName(ActType type)
+{
+    switch (type)
+    {
+    case ActType::SwiGlu: return "SwiGlu";
+    default: return "Unknown type";
+    }
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+struct GemmGatedActOptions : public gemm::GemmOptions
 {
     GemmGatedActOptions() = default;
 
-    GemmGatedActOptions(gemm::GemmOptions const& options, ActType actType)
+    GemmGatedActOptions(gemm::GemmOptions options, ActType actType, bool clampBeforeAct)
         : gemm::GemmOptions(options)
         , mActType(actType)
+        , mClampBeforeAct(clampBeforeAct)
     {
     }
 
     // Type of the gated activation.
-    ActType mActType{ActType::Silu};
+    ActType mActType{ActType::SwiGlu};
+    // Clamp the dequantized values to the range [-limit, limit].
+    bool mClampBeforeAct{false};
 };
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -108,7 +133,7 @@ inline bool checkAndUpdateGemmGatedActOptions(
 
     if (options.mUseTmaStore)
     {
-        TLLM_CHECK_ERROR(hiddenEpilogueTileSize * tg::dtypeGetNumBits(options.mDtypeElt) / /* bits */ 8 % 32 == 0,
+        TLLM_CHECK_ERROR(hiddenEpilogueTileSize * tg::dtypeGetNumBits(options.mDtypeC) / /* bits */ 8 % 32 == 0,
             "Unsupported output hidden tile size");
     }
 
@@ -138,6 +163,11 @@ inline bool checkAndUpdateGemmGatedActOptions(
         TLLM_CHECK_ERROR(doesSplitKUseDsmem(options.mSplitK), "Split-k GMEM and GemmGatedAct are not supported yet.");
     }
 
+    if (gemm::isBiasTypeMn(options.mBiasType))
+    {
+        TLLM_CHECK_ERROR(options.mTransposeMmaOutput, "Bias type Mn is not supported with not transpose mma output.");
+    }
+
     return true;
 }
 
@@ -148,7 +178,8 @@ inline std::string dumpOptions(GemmGatedActOptions const& options)
     std::stringstream ss;
     ss << gemm::dumpOptions(options) << ", ";
     ss << "mActType="
-       << "gemmGatedAct::ActType(" << static_cast<int32_t>(options.mActType) << ")" << std::endl;
+       << "gemmGatedAct::ActType(" << static_cast<int32_t>(options.mActType) << ")," << std::endl;
+    ss << "mClampBeforeAct=" << options.mClampBeforeAct << "" << std::endl;
     return ss.str();
 }
 
@@ -169,6 +200,7 @@ struct GemmGatedActConfig
     uint32_t const mSharedMemSize{0};
     char const* mFunctionName{nullptr};
     uint32_t const mNumThreadsPerCTA{0};
+    char const* mHash{nullptr};
 #else
     trtllm::gen::CudaRunner* mCudaRunner{nullptr};
 #endif
@@ -190,3 +222,5 @@ struct GemmGatedActConfig
 #undef TLLM_LOG_INFO
 #undef TLLM_LOG_ERROR
 #endif // TLLM_GEN_EXPORT_INTERFACE
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmOptions.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmOptions.h
index 24624ee0aa..367d68b971 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmOptions.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/GemmOptions.h
@@ -23,6 +23,7 @@
 #include "KernelParams.h"
 #include "KernelTraits.h"
 #include "trtllm/gen/DtypeDecl.h"
+#include "trtllm/gen/MmaDecl.h"
 #include "trtllm/gen/SfLayoutDecl.h"
 #ifndef TLLM_GEN_EXPORT_INTERFACE
 #include "trtllm/gen/CudaRunner.h"
@@ -33,12 +34,14 @@
 template <typename T, typename... Args>
 void printArgs(T first, Args... args)
 {
+#ifdef TLLM_GEN_DEBUG
     std::cout << first;
     if constexpr (sizeof...(args) > 0)
     {
         std::cout << " ";
         printArgs(args...);
     }
+#endif
 }
 
 #define TLLM_CHECK_ERROR(cond, ...)                                                                                    \
@@ -65,6 +68,9 @@ void printArgs(T first, Args... args)
 
 #endif
 
+namespace gemmGatedAct
+{
+
 namespace gemm
 {
 
@@ -83,9 +89,98 @@ struct GemmOptions
     virtual ~GemmOptions() = default;
 #endif
 
+    GemmOptions() = default;
+
+    GemmOptions(AllReduceAlgo allReduceAlgo, BiasType biasType, int blockK, int clusterDimX, int clusterDimY,
+        int clusterDimZ, tg::Dtype dtypeAcc, tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeMmaA,
+        tg::Dtype dtypeMmaB, bool enablesEarlyExit, bool enablesDelayedEarlyExit, bool enablesGlobalPtxKnobs,
+        int epilogueLdtmDps, int epilogueLdtmBits, int epilogueTileM, int epilogueTileN, bool gridTriggerSecondaryA,
+        bool gridTriggerSecondaryB, bool gridWaitForPrimaryEarlyExit, bool gridWaitForPrimaryA,
+        bool gridWaitForPrimaryB, bool hoistLoadTaskInit, bool hoistMmaTaskTryWaits, int k, KernelTraits kernelTraits,
+        MatrixLayout layoutA, MatrixLayout layoutB, int m, int mmaK, tg::MmaKind mmaKind, int mmaM, int mmaN,
+        bool mockAllReduce, int n, int numSlicesForSplitK, int numSlicesForSliceK, int numStages, int numStagesMma,
+        int numStagesMmaWithinWorkTile, int numStagesMmaAcrossWorkTile, int numStagesWorkId, bool outputDebugTensors,
+        bool patchF2fp, bool useShuffledMatrixA, bool sliceK, SplitK splitK, bool transposeMmaOutput, int tileM,
+        int tileN, int tileK, bool useUnrollLoop2xForMma, bool useCustomMmaSchedule,
+        bool useHoistTryWaitForCustomMmaSchedule, bool useDeepSeekFp8, bool usePerTokenSfA, bool usePerTokenSfB,
+        bool useTmaStore, bool useTwoTmaLoadWarps, bool useTwoMmaWarps, tg::SfLayout sfLayoutA, tg::SfLayout sfLayoutB,
+        tg::SfLayout sfLayoutC, int sfReshapeFactor, TileScheduler tileScheduler)
+        : mAllReduceAlgo{allReduceAlgo}
+        , mBiasType{biasType}
+        , mBlockK(blockK)
+        , mClusterDimX{clusterDimX}
+        , mClusterDimY{clusterDimY}
+        , mClusterDimZ{clusterDimZ}
+        , mDtypeAcc{dtypeAcc}
+        , mDtypeA{dtypeA}
+        , mDtypeB{dtypeB}
+        , mDtypeC{dtypeC}
+        , mDtypeMmaA{dtypeMmaA}
+        , mDtypeMmaB{dtypeMmaB}
+        , mEnablesEarlyExit{enablesEarlyExit}
+        , mEnablesDelayedEarlyExit{enablesDelayedEarlyExit}
+        , mEnablesGlobalPtxKnobs{enablesGlobalPtxKnobs}
+        , mEpilogueLdtmDps{epilogueLdtmDps}
+        , mEpilogueLdtmBits{epilogueLdtmBits}
+        , mEpilogueTileM{epilogueTileM}
+        , mEpilogueTileN{epilogueTileN}
+        , mGridTriggerSecondaryA{gridTriggerSecondaryA}
+        , mGridTriggerSecondaryB{gridTriggerSecondaryB}
+        , mGridWaitForPrimaryEarlyExit{gridWaitForPrimaryEarlyExit}
+        , mGridWaitForPrimaryA{gridWaitForPrimaryA}
+        , mGridWaitForPrimaryB{gridWaitForPrimaryB}
+        , mHoistLoadTaskInit{hoistLoadTaskInit}
+        , mHoistMmaTaskTryWaits{hoistMmaTaskTryWaits}
+        , mK{k}
+        , mKernelTraits{kernelTraits}
+        , mLayoutA{layoutA}
+        , mLayoutB{layoutB}
+        , mM{m}
+        , mMmaK{mmaK}
+        , mMmaKind{mmaKind}
+        , mMmaM{mmaM}
+        , mMmaN{mmaN}
+        , mMockAllReduce{mockAllReduce}
+        , mN{n}
+        , mNumSlicesForSplitK{numSlicesForSplitK}
+        , mNumSlicesForSliceK{numSlicesForSliceK}
+        , mNumStages{numStages}
+        , mNumStagesMma{numStagesMma}
+        , mNumStagesMmaWithinWorkTile{numStagesMmaWithinWorkTile}
+        , mNumStagesMmaAcrossWorkTile{numStagesMmaAcrossWorkTile}
+        , mNumStagesWorkId{numStagesWorkId}
+        , mOutputDebugTensors{outputDebugTensors}
+        , mPatchF2fp{patchF2fp}
+        , mUseShuffledMatrixA{useShuffledMatrixA}
+        , mSliceK{sliceK}
+        , mSplitK{splitK}
+        , mTransposeMmaOutput{transposeMmaOutput}
+        , mTileM{tileM}
+        , mTileN{tileN}
+        , mTileK{tileK}
+        , mUseUnrollLoop2xForMma{useUnrollLoop2xForMma}
+        , mUseCustomMmaSchedule{useCustomMmaSchedule}
+        , mUseHoistTryWaitForCustomMmaSchedule{useHoistTryWaitForCustomMmaSchedule}
+        , mUseDeepSeekFp8{useDeepSeekFp8}
+        , mUsePerTokenSfA{usePerTokenSfA}
+        , mUsePerTokenSfB{usePerTokenSfB}
+        , mUseTmaStore{useTmaStore}
+        , mUseTwoTmaLoadWarps{useTwoTmaLoadWarps}
+        , mUseTwoMmaWarps{useTwoMmaWarps}
+        , mSfLayoutA{sfLayoutA}
+        , mSfLayoutB{sfLayoutB}
+        , mSfLayoutC{sfLayoutC}
+        , mSfReshapeFactor{sfReshapeFactor}
+        , mTileScheduler{tileScheduler}
+    {
+    }
+
     // The all-reduce algorithm.
     AllReduceAlgo mAllReduceAlgo{AllReduceAlgo::None};
-
+    // The type of bias.
+    BiasType mBiasType{BiasType::None};
+    // Block size in the K dimension
+    int mBlockK{-1};
     // Cluster size in X dim.
     int mClusterDimX{1};
     // Cluster size in Y dim.
@@ -94,16 +189,34 @@ struct GemmOptions
     int mClusterDimZ{1};
     // Data type of the accumulators.
     tg::Dtype mDtypeAcc{tg::Dtype::Fp32};
-    // Data type of the inputs.
-    tg::Dtype mDtypeElt{tg::Dtype::Fp16};
+    // Data type of the A matrix.
+    tg::Dtype mDtypeA{tg::Dtype::Fp16};
+    // Data type of the B matrix.
+    tg::Dtype mDtypeB{tg::Dtype::Void};
     // Data type of the outputs.
     tg::Dtype mDtypeC{tg::Dtype::Void};
+    // Data type of the A matrix for the MMA, if different from the input type.
+    tg::Dtype mDtypeMmaA{tg::Dtype::Void};
+    // Data type of the B matrix for the MMA, if different from the input type.
+    tg::Dtype mDtypeMmaB{tg::Dtype::Void};
     // Whether to enable early exit.
     bool mEnablesEarlyExit{false};
-    // Whether to enable early exit.
+    // Whether to enable delayed early exit to overlap
+    // numNonExitingCtas loading with the other instructions.
     bool mEnablesDelayedEarlyExit{false};
     // Whether to enable the global PTX knobs for guiding the compiler optimizations.
     bool mEnablesGlobalPtxKnobs{true};
+    // The epilogue supports multiple LDTM shapes, although not every shape is applicable in every
+    // case. In particular:
+    // - On Hopper: must be 16dp256bit.
+    // - Transposed output: must be 16dp256bit.
+    // - Non-transposed output:
+    //     - NvFp4 with fused activation: must be 32dp32bit.
+    //     - Else it can be either 16dp256bit or 32dp32bit.
+    // The number of DP lanes in the epilogue LDTM.
+    int mEpilogueLdtmDps{16};
+    // The number of bits in the epilogue LDTM.
+    int mEpilogueLdtmBits{256};
     // Tile size for the epilogue in M dimension.
     int mEpilogueTileM{128};
     // Tile size for the epilogue in N dimension.
@@ -118,16 +231,24 @@ struct GemmOptions
     bool mGridWaitForPrimaryA{true};
     // Whether the load of B should wait on a grid dependency.
     bool mGridWaitForPrimaryB{true};
+    // Whether to hoist the initialization of the loading tasks.
+    bool mHoistLoadTaskInit{true};
     // Whether to hoist the mbarrier try_waits (e.g., mma.prodAcq, smemAb.consWait) in the MMA task.
     bool mHoistMmaTaskTryWaits{false};
     // The K dimension of GEMM.
     int mK{16 * 16};
     // Traits of the kernel.
     KernelTraits mKernelTraits{};
+    // Layout of A matrix
+    MatrixLayout mLayoutA{MatrixLayout::MajorK};
+    // Layout of B matrix
+    MatrixLayout mLayoutB{MatrixLayout::MajorK};
     // The M dimension of GEMM.
     int mM{128 * 2};
     // Size of the MMA instruction in the K dimension.
     int mMmaK{16};
+    // The kind of MMA instruction to use.
+    tg::MmaKind mMmaKind{tg::MmaKind::Auto};
     // Size of the MMA instruction in the M dimension.
     int mMmaM{64};
     // Size of the MMA instruction in the N dimension.
@@ -156,6 +277,8 @@ struct GemmOptions
     int mNumStagesWorkId{3};
     // Whether to output debug tensors.
     bool mOutputDebugTensors{false};
+    // Patch float conversions.
+    bool mPatchF2fp{false};
     // Reorder rows/cols in the A matrix for the better memory accesses in the M-major epilogue.
     bool mUseShuffledMatrixA{false};
     // Slice-K implementation to use TileM dimension for TileK.
@@ -196,6 +319,12 @@ struct GemmOptions
     tg::SfLayout mSfLayoutB{tg::SfLayout::R128c4};
     // Scale factors layout for C.
     tg::SfLayout mSfLayoutC{tg::SfLayout::R128c4};
+    // Number of "repeats", i.e. reshaping factor, to fold hidden dimension into SfBlock dimension.
+    // As result, the hidden dimension of the SF tensor must be a multiple of NumRepeats *
+    // numEltsPerSf * 4. This reduces the problem shape space that the kernel is able to run.
+    // But it reduces the number of L2 requests under the hood and potentially improves perf.
+    // Applies to layout 8x4 only.
+    int mSfReshapeFactor{1};
     // Tile scheduler type.
     TileScheduler mTileScheduler{TileScheduler::Static};
 };
@@ -225,6 +354,7 @@ struct GemmConfig
     uint32_t const mSharedMemSize{0};
     char const* mFunctionName{nullptr};
     uint32_t const mNumThreadsPerCTA{0};
+    char const* mHash{nullptr};
 #else
     trtllm::gen::CudaRunner* mCudaRunner{nullptr};
 #endif
@@ -252,27 +382,50 @@ inline std::string toString(trtllm::gen::Dtype e)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+template <>
+inline std::string toString(trtllm::gen::MmaKind e)
+{
+    return trtllm::gen::mmaKindToString(e);
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 inline std::string dumpOptions(GemmOptions const& options)
 {
     std::stringstream ss;
     ss << "mAllReduceAlgo="
        << "gemm::AllReduceAlgo(" << static_cast<int32_t>(options.mAllReduceAlgo) << ")"
        << "," << std::endl;
+    ss << "mBiasType="
+       << "gemm::BiasType(" << static_cast<int32_t>(options.mBiasType) << ")"
+       << "," << std::endl;
+    ss << "mBlockK=" << options.mBlockK << "," << std::endl;
     ss << "mClusterDimX=" << options.mClusterDimX << "," << std::endl;
     ss << "mClusterDimY=" << options.mClusterDimY << "," << std::endl;
     ss << "mClusterDimZ=" << options.mClusterDimZ << "," << std::endl;
     ss << "mDtypeAcc="
        << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeAcc) << ")"
        << "," << std::endl;
-    ss << "mDtypeElt="
-       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeElt) << ")"
+    ss << "mDtypeA="
+       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeA) << ")"
+       << "," << std::endl;
+    ss << "mDtypeB="
+       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeB) << ")"
        << "," << std::endl;
     ss << "mDtypeC="
        << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeC) << ")"
        << "," << std::endl;
+    ss << "mDtypeMmaA="
+       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeMmaA) << ")"
+       << "," << std::endl;
+    ss << "mDtypeMmaB="
+       << "trtllm::gen::Dtype(" << static_cast<int32_t>(options.mDtypeMmaB) << ")"
+       << "," << std::endl;
     ss << "mEnablesEarlyExit=" << options.mEnablesEarlyExit << "," << std::endl;
     ss << "mEnablesDelayedEarlyExit=" << options.mEnablesDelayedEarlyExit << "," << std::endl;
     ss << "mEnablesGlobalPtxKnobs=" << options.mEnablesGlobalPtxKnobs << "," << std::endl;
+    ss << "mEpilogueLdtmDps=" << options.mEpilogueLdtmDps << "," << std::endl;
+    ss << "mEpilogueLdtmBits=" << options.mEpilogueLdtmBits << "," << std::endl;
     ss << "mEpilogueTileM=" << options.mEpilogueTileM << "," << std::endl;
     ss << "mEpilogueTileN=" << options.mEpilogueTileN << "," << std::endl;
     ss << "mGridTriggerSecondaryA=" << options.mGridTriggerSecondaryA << "," << std::endl;
@@ -280,12 +433,20 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mGridWaitForPrimaryEarlyExit=" << options.mGridWaitForPrimaryEarlyExit << "," << std::endl;
     ss << "mGridWaitForPrimaryA=" << options.mGridWaitForPrimaryA << "," << std::endl;
     ss << "mGridWaitForPrimaryB=" << options.mGridWaitForPrimaryB << "," << std::endl;
+    ss << "mHoistLoadTaskInit=" << options.mHoistLoadTaskInit << "," << std::endl;
     ss << "mHoistMmaTaskTryWaits=" << options.mHoistMmaTaskTryWaits << "," << std::endl;
     ss << "mK=" << options.mK << "," << std::endl;
     ss << "mKernelTraits={}"
        << "," << std::endl;
+    ss << "mLayoutA=gemm::MatrixLayout(" << static_cast<int32_t>(options.mLayoutA) << ")"
+       << "," << std::endl;
+    ss << "mLayoutB=gemm::MatrixLayout(" << static_cast<int32_t>(options.mLayoutB) << ")"
+       << "," << std::endl;
     ss << "mM=" << options.mM << "," << std::endl;
     ss << "mMmaK=" << options.mMmaK << "," << std::endl;
+    ss << "mMmaKind="
+       << "trtllm::gen::MmaKind(" << static_cast<int32_t>(options.mMmaKind) << ")"
+       << "," << std::endl;
     ss << "mMmaM=" << options.mMmaM << "," << std::endl;
     ss << "mMmaN=" << options.mMmaN << "," << std::endl;
     ss << "mMockAllReduce=" << options.mMockAllReduce << "," << std::endl;
@@ -298,6 +459,7 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mNumStagesMmaAcrossWorkTile=" << options.mNumStagesMmaAcrossWorkTile << "," << std::endl;
     ss << "mNumStagesWorkId=" << options.mNumStagesWorkId << "," << std::endl;
     ss << "mOutputDebugTensors=" << options.mOutputDebugTensors << "," << std::endl;
+    ss << "mPatchF2fp=" << options.mPatchF2fp << "," << std::endl;
     ss << "mUseShuffledMatrixA=" << options.mUseShuffledMatrixA << "," << std::endl;
     ss << "mSliceK=" << options.mSliceK << "," << std::endl;
     ss << "mSplitK="
@@ -325,6 +487,7 @@ inline std::string dumpOptions(GemmOptions const& options)
     ss << "mSfLayoutC="
        << "trtllm::gen::SfLayout(" << static_cast<int32_t>(options.mSfLayoutC) << ")"
        << "," << std::endl;
+    ss << "mSfReshapeFactor=" << options.mSfReshapeFactor << "," << std::endl;
     ss << "mTileScheduler="
        << "gemm::TileScheduler(" << static_cast<int32_t>(options.mTileScheduler) << ")" << std::endl;
     return ss.str();
@@ -340,6 +503,14 @@ inline T divUp(T a, T b)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+template <typename T>
+inline T divUpMul(T a, T b)
+{
+    return gemm::divUp(a, b) * b;
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 inline int32_t getShuffleBlockSize(int epilogueTileM)
 {
     int shuffleBlockSize = 16;
@@ -356,10 +527,136 @@ inline int32_t getShuffleBlockSize(int epilogueTileM)
 inline bool checkAndUpdateGemmOptions(
     GemmOptions& options, bool isBlackwell, int /* tpGrpSize */, bool updateOptions = true)
 {
-    if (options.mDtypeElt == tg::Dtype::E4m3 && options.mMmaK != 32)
+
+    if (options.mDtypeB == tg::Dtype::Void)
     {
-        TLLM_LOG_WARNING(
-            "Unsupported MmaK (", options.mMmaK, ") for ", gemm::toString(options.mDtypeElt), ". Setting MmaK to 32");
+        if (updateOptions)
+        {
+            options.mDtypeB = options.mDtypeA;
+        }
+        else
+        {
+            return false;
+        }
+    }
+
+    // If not specified, used the input dtypes as MMA dtypes (no cast required).
+    if (options.mDtypeMmaA == tg::Dtype::Void)
+    {
+        if (updateOptions)
+        {
+            options.mDtypeMmaA = options.mDtypeA;
+        }
+        else
+        {
+            return false;
+        }
+    }
+    if (options.mDtypeMmaB == tg::Dtype::Void)
+    {
+        if (updateOptions)
+        {
+            options.mDtypeMmaB = options.mDtypeB;
+        }
+        else
+        {
+            return false;
+        }
+    }
+
+    // Check that the A cast is supported.
+    // Currently, we only support {MxFp4, NvFp4} -> Bf16.
+    TLLM_CHECK_ERROR((options.mDtypeA == options.mDtypeMmaA)
+            || ((options.mDtypeA == tg::Dtype::MxE2m1 || options.mDtypeA == tg::Dtype::E2m1)
+                && options.mDtypeMmaA == tg::Dtype::Bfloat16)
+            || (options.mDtypeA == tg::Dtype::E2m1 && options.mDtypeMmaA == tg::Dtype::E4m3),
+        "Unsupported cast for A: ", tg::dtypeToString(options.mDtypeA), " -> ", tg::dtypeToString(options.mDtypeMmaA));
+
+    // Check that the B cast is supported.
+    // Currently, we only support Fp8 -> MxFp8.
+    // TODO: add same support for A (no transpose)
+    TLLM_CHECK_ERROR((options.mDtypeB == options.mDtypeMmaB)
+            || (options.mDtypeB == tg::Dtype::E4m3 && options.mDtypeMmaB == tg::Dtype::MxE4m3),
+        "Unsupported cast for B: ", tg::dtypeToString(options.mDtypeB), " -> ", tg::dtypeToString(options.mDtypeMmaB));
+
+    if (options.mDtypeA != options.mDtypeMmaA)
+    {
+        TLLM_CHECK_ERROR(options.mTileM == 128, "TileM must be 128 when casting the input matrix A before the MMA.");
+    }
+
+    if (options.mPatchF2fp)
+    {
+        TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::MxE2m1 && options.mDtypeMmaA == tg::Dtype::Bfloat16,
+            "PatchF2fp is only supported for MxFp4 to Bf16 casts.");
+    }
+
+    // FIXME: We do not support different dtypes for A and B when not on Blackwell.
+    if (!isBlackwell)
+    {
+        TLLM_CHECK_ERROR(
+            options.mDtypeMmaA == options.mDtypeMmaB, "For non-Blackwell, A and B must have the same dtype.");
+    }
+
+    // Check that the different dtypes for A and B are supported by the tensor core
+    // kind::f8f6f4
+    if (options.mDtypeMmaA == tg::Dtype::E4m3 || options.mDtypeMmaA == tg::Dtype::E2m1)
+    {
+        TLLM_CHECK_ERROR(options.mDtypeMmaB == tg::Dtype::E4m3 || options.mDtypeMmaB == tg::Dtype::E2m1,
+            "For dtypeMmaA = E4m3/E2m1 A, dtypeMmaB must also be E4m3/E2m1.");
+    }
+
+    // kind::mxf8f6f4
+    if (options.mDtypeMmaA == tg::Dtype::MxE4m3 || options.mDtypeMmaA == tg::Dtype::MxE2m1)
+    {
+        TLLM_CHECK_ERROR(options.mDtypeMmaB == tg::Dtype::MxE4m3 || options.mDtypeMmaB == tg::Dtype::MxE2m1,
+            "For dtypeMmaA = MxE4m3 or MxE2m1, dtypeMmaB must also be MxE4m3 or MxE2m1.");
+    }
+    if (options.mDtypeMmaB == tg::Dtype::MxE4m3 || options.mDtypeMmaB == tg::Dtype::MxE2m1)
+    {
+        TLLM_CHECK_ERROR(options.mDtypeMmaA == tg::Dtype::MxE4m3 || options.mDtypeMmaA == tg::Dtype::MxE2m1,
+            "For dtypeMmaB = MxE4m3 or MxE2m1, dtypeMmaA must also be MxE4m3 or MxE2m1.");
+    }
+
+    // kind::f16
+    if (options.mDtypeMmaA == tg::Dtype::Fp16 || options.mDtypeMmaA == tg::Dtype::Bfloat16)
+    {
+        TLLM_CHECK_ERROR(options.mDtypeMmaB == options.mDtypeMmaA,
+            "For dtypeMmaA = Fp16/Bfloat16, dtypeMmaB must be the same as dtypeMmaA.");
+    }
+
+    // When one of the inputs needs to be cast, we must use two load warps.
+    if ((options.mDtypeMmaA != options.mDtypeA || options.mDtypeMmaB != options.mDtypeB)
+        && !options.mUseTwoTmaLoadWarps)
+    {
+        TLLM_LOG_WARNING("Two TMA load warps must be enabled if any of the inputs needs to be cast.");
+    }
+
+    // When different dtypes are used for A and B, we must use different tiles to do the loading.
+    // It is not strictly required, but current implementation of SmemAb requires that.
+    if (options.mDtypeA != options.mDtypeB)
+    {
+        TLLM_CHECK_ERROR(
+            options.mUseTwoTmaLoadWarps, "Two TMA load warps must be enabled for different input types of A and B.");
+    }
+
+    // Get the mma kind for the input types.
+    if (options.mMmaKind == tg::MmaKind::Auto)
+    {
+        if (updateOptions)
+        {
+            options.mMmaKind = dtypeGetMmaKind(options.mDtypeMmaA, options.mDtypeMmaB);
+        }
+        else
+        {
+            return false;
+        }
+    }
+
+    if ((options.mMmaKind == tg::MmaKind::Fp8Fp6Fp4 || options.mMmaKind == tg::MmaKind::MxFp8Fp6Fp4)
+        && options.mMmaK != 32)
+    {
+        TLLM_LOG_WARNING("Unsupported MmaK (", options.mMmaK, ") for MmaKind=", gemm::toString(options.mMmaKind),
+            ". Setting MmaK to 32");
         if (updateOptions)
         {
             options.mMmaK = 32;
@@ -371,15 +668,42 @@ inline bool checkAndUpdateGemmOptions(
         }
     }
 
+    // Check LDTM shape.
+    if (isBlackwell)
+    {
+        TLLM_CHECK_ERROR((options.mEpilogueLdtmDps == 16 && options.mEpilogueLdtmBits == 256)
+                || (options.mEpilogueLdtmDps == 32 && options.mEpilogueLdtmBits == 32),
+            "Unsupported LDTM shape: ", options.mEpilogueLdtmDps, "dp", options.mEpilogueLdtmBits, "bit.");
+        if (options.mEpilogueTileM == 64)
+        {
+            TLLM_CHECK_ERROR(options.mEpilogueLdtmDps == 16,
+                "Unsupported LDTM shape for epilogueTileM=64: ", options.mEpilogueLdtmDps, "dp",
+                options.mEpilogueLdtmBits, "bit.");
+        }
+        if (options.mTransposeMmaOutput)
+        {
+            // We can't use 32dp32bit LDTM for transposed outputs because we need each thread to own
+            // multiple consecutive output elements.
+            TLLM_CHECK_ERROR((options.mEpilogueLdtmDps == 16 && options.mEpilogueLdtmBits == 256),
+                "Only 16dp256bit LDTM is supported for transposed outputs.");
+        }
+    }
+    else
+    {
+        TLLM_CHECK_ERROR(options.mEpilogueLdtmDps == 16 && options.mEpilogueLdtmBits == 256,
+            "Hopper does not use TMEM. The register layout corresponds to 16dp256bit. Got ", options.mEpilogueLdtmDps,
+            "dp", options.mEpilogueLdtmBits, "bit.");
+    }
+
     // Constraints for NvFp4 and MxFp8.
-    if ((options.mDtypeElt == tg::Dtype::E2m1 || options.mDtypeElt == tg::Dtype::MxE4m3
+    if ((options.mMmaKind == tg::MmaKind::MxFp4NvFp4 || options.mMmaKind == tg::MmaKind::MxFp8Fp6Fp4
             || options.mDtypeC == tg::Dtype::MxE4m3)
         && options.mMmaM != 128)
     {
         // MMA M must be 128 when the input uses block scaling, or when the output is an Mx format.
         int newTileM = 128 * divUp(options.mTileM, 128);
-        TLLM_LOG_WARNING("Unsupported MmaM (", options.mMmaM, ") for dtypeElt=", gemm::toString(options.mDtypeElt),
-            ", dtypeC=", gemm::toString(options.mDtypeC), ". Setting MmaM to 128 and TileM to ", newTileM);
+        TLLM_LOG_WARNING("Unsupported MmaM (", options.mMmaM, ") for MmaKind=", gemm::toString(options.mMmaKind),
+            ". Setting MmaM to 128 and TileM to ", newTileM);
         if (updateOptions)
         {
             options.mMmaM = 128;
@@ -390,18 +714,15 @@ inline bool checkAndUpdateGemmOptions(
             return false;
         }
     }
-    if (options.mDtypeElt == tg::Dtype::E2m1 || options.mDtypeElt == tg::Dtype::MxE4m3)
+    if (options.mMmaKind == tg::MmaKind::MxFp4NvFp4 || options.mMmaKind == tg::MmaKind::MxFp8Fp6Fp4)
     {
         TLLM_CHECK_ERROR(isBlackwell, "Block scaling is only supported on Blackwell");
 
-        TLLM_CHECK_ERROR(options.mSfLayoutB == tg::SfLayout::R128c4 || options.mSfLayoutB == tg::SfLayout::R8c4,
-            "Only the 128x4 and 8x4 SF layouts are supported for B, got ", tg::sfLayoutToString(options.mSfLayoutB));
-
-        int const mmaK = (options.mDtypeElt == tg::Dtype::E2m1) ? 64 : 32;
+        int const mmaK = (options.mMmaKind == tg::MmaKind::MxFp4NvFp4) ? 64 : 32;
         if (options.mMmaK != mmaK)
         {
             int newTileK = mmaK * divUp(options.mTileK, mmaK);
-            TLLM_LOG_WARNING("Unsupported MmaK (", options.mMmaK, ") for ", gemm::toString(options.mDtypeElt),
+            TLLM_LOG_WARNING("Unsupported MmaK (", options.mMmaK, ") for MmaKind=", gemm::toString(options.mMmaKind),
                 ". Setting MmaK to ", mmaK, " and TileK to ", newTileK);
             if (updateOptions)
             {
@@ -414,18 +735,56 @@ inline bool checkAndUpdateGemmOptions(
             }
         }
 
+        // The MMA N may only be smaller than 64 if it is equal to the tile N.
+        TLLM_CHECK_ERROR(options.mMmaN >= 64 || options.mMmaN == options.mTileN, "MmaN (", options.mMmaN,
+            ") must be >= 64 or equal to TileN (", options.mTileN, ")");
+    }
+    if (tg::dtypeIsBlockFmt(options.mDtypeA))
+    {
+        int numEltsPerSfA = tg::dtypeNumEltsPerSf(options.mDtypeA);
+        TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSfA) == 0, "TileK (", options.mTileK,
+            ") must be a multiple of ", (4 * numEltsPerSfA), " for typeA ", gemm::toString(options.mDtypeA));
+        auto const numEltsPerSfAInK = options.mK / numEltsPerSfA;
+        TLLM_CHECK_ERROR(numEltsPerSfAInK % 4 == 0, "K dimension of scaling factors for A (", numEltsPerSfAInK,
+            ") must be a multiple of 4");
+    }
+    if (tg::dtypeIsBlockFmt(options.mDtypeB))
+    {
+        TLLM_CHECK_ERROR(options.mSfLayoutB == tg::SfLayout::R128c4 || options.mSfLayoutB == tg::SfLayout::R8c4
+                || options.mSfLayoutB == tg::SfLayout::Linear,
+            "Only the 128x4 and 8x4 SF layouts are supported for B, got ", tg::sfLayoutToString(options.mSfLayoutB));
+
         // TileN must be a multiple of the number of rows per SF tile.
         int const numSfTileRowsB = options.mSfLayoutB == tg::SfLayout::R128c4 ? 128 : 8;
         TLLM_CHECK_ERROR(options.mTileN % numSfTileRowsB == 0, "TileN (", options.mTileN, ") must be a multiple of ",
             numSfTileRowsB, " for B SF layout ", tg::sfLayoutToString(options.mSfLayoutB));
-        // The MMA N may only be smaller than 64 if it is equal to the tile N.
-        TLLM_CHECK_ERROR(options.mMmaN >= 64 || options.mMmaN == options.mTileN, "MmaN (", options.mMmaN,
-            ") must be >= 64 or equal to TileN (", options.mTileN, ") for ", gemm::toString(options.mDtypeElt));
 
-        int numEltsPerSf = tg::dtypeNumEltsPerSf(options.mDtypeElt);
-        TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSf) == 0, "TileK (", options.mTileK,
-            ") must be a multiple of ", (4 * numEltsPerSf), " for type ", gemm::toString(options.mDtypeElt));
+        int numEltsPerSfB = tg::dtypeNumEltsPerSf(options.mDtypeB);
+        TLLM_CHECK_ERROR(options.mTileK % (4 * numEltsPerSfB) == 0, "TileK (", options.mTileK,
+            ") must be a multiple of ", (4 * numEltsPerSfB), " for typeB ", gemm::toString(options.mDtypeB));
+        auto const numEltsPerSfBInK = options.mK / numEltsPerSfB;
+        TLLM_CHECK_ERROR(numEltsPerSfBInK % 4 == 0, "K dimension of scaling factors for B (", numEltsPerSfBInK,
+            ") must be a multiple of 4");
     }
+
+    int32_t padMultiplierA = 1;
+    int32_t padMultiplierB = 1;
+    if (options.mMmaKind == tg::MmaKind::MxFp8Fp6Fp4)
+    {
+        if (options.mDtypeA == tg::Dtype::MxE2m1)
+        {
+            padMultiplierA = 2;
+        }
+        if (options.mDtypeB == tg::Dtype::MxE2m1)
+        {
+            padMultiplierB = 2;
+        }
+    }
+    TLLM_CHECK_ERROR((padMultiplierA * tg::dtypeGetNumBits(options.mDtypeA) * options.mK / 8) % 16 == 0,
+        "K dimension of A must be aligned to 16 bytes.");
+    TLLM_CHECK_ERROR((padMultiplierB * tg::dtypeGetNumBits(options.mDtypeB) * options.mK / 8) % 16 == 0,
+        "K dimension of B must be aligned to 16 bytes.");
+
     if (options.mDtypeC == tg::Dtype::E2m1 || options.mDtypeC == tg::Dtype::MxE4m3)
     {
         TLLM_CHECK_ERROR(isBlackwell, "Block scaling is only supported on Blackwell");
@@ -433,8 +792,10 @@ inline bool checkAndUpdateGemmOptions(
         TLLM_CHECK_ERROR(options.mSfLayoutC == tg::SfLayout::R128c4 || options.mSfLayoutC == tg::SfLayout::R8c4,
             "Only the 128x4 and 8x4 SF layouts are supported for C.");
         int const numSfTileRowsC = options.mSfLayoutC == tg::SfLayout::R128c4 ? 128 : 8;
-        TLLM_CHECK_ERROR(options.mTileN % numSfTileRowsC == 0, "TileN (", options.mTileN, ") must be a multiple of ",
-            numSfTileRowsC, " for C SF layout ", tg::sfLayoutToString(options.mSfLayoutC));
+        int const tileTokenDim = options.mTransposeMmaOutput ? options.mTileN : options.mTileM;
+        TLLM_CHECK_ERROR_FMT(tileTokenDim % numSfTileRowsC == 0,
+            "Tile%s (%d) must be a multiple of %d for C SF layout %s", options.mTransposeMmaOutput ? "N" : "M",
+            tileTokenDim, numSfTileRowsC, tg::sfLayoutToString(options.mSfLayoutC).c_str());
 
         int const hiddenDim = options.mTransposeMmaOutput ? options.mM : options.mN;
         int const hiddenGranularity = 4 * tg::dtypeNumEltsPerSf(options.mDtypeC);
@@ -447,10 +808,10 @@ inline bool checkAndUpdateGemmOptions(
     // If dtypeC is unspecified (Dtype::Void), assign to the input dtype.
     if (options.mDtypeC == tg::Dtype::Void)
     {
-        TLLM_LOG_INFO("Setting dtypeC to ", tg::dtypeToString(options.mDtypeElt));
+        TLLM_LOG_INFO("Setting dtypeC to ", tg::dtypeToString(options.mDtypeA));
         if (updateOptions)
         {
-            options.mDtypeC = options.mDtypeElt;
+            options.mDtypeC = options.mDtypeA;
         }
         else
         {
@@ -518,10 +879,6 @@ inline bool checkAndUpdateGemmOptions(
 
     TLLM_CHECK_ERROR(options.mM > 0 && options.mN > 0 && options.mK > 0, "M, N and K must be larger than 0");
     TLLM_CHECK_ERROR(options.mNumSlicesForSplitK > 0, "Split K must be larger than 0.");
-    TLLM_CHECK_ERROR(options.mK % options.mNumSlicesForSplitK == 0, "K must be divisible by NumSlicesForSplitK.");
-    TLLM_CHECK_ERROR((options.mK / options.mNumSlicesForSplitK) % options.mTileK == 0,
-        "K / NumSlicesForSplitK must be divisible by TileK. Found TileK=", options.mTileK, " and K=", options.mK,
-        " and NumSlicesForSplitK=", options.mNumSlicesForSplitK);
 
     if (options.mUseShuffledMatrixA)
     {
@@ -530,8 +887,10 @@ inline bool checkAndUpdateGemmOptions(
             shuffleBlockSize, ") when useShuffledMatrixA");
     }
 
-    TLLM_CHECK_ERROR(options.mMmaM <= options.mEpilogueTileM && options.mMmaN <= options.mEpilogueTileN,
-        "EpilogueTileM and EpilogueTileN must be larger or equal than the respective atom sizes.");
+    if (!options.mSliceK)
+    {
+        TLLM_CHECK_ERROR(options.mMmaM <= options.mEpilogueTileM, "EpilogueTileM must be larger or equal than mmaM.");
+    }
     TLLM_CHECK_ERROR(options.mTileM % options.mEpilogueTileM == 0 && options.mTileN % options.mEpilogueTileN == 0,
         "TileM and TileN must be divisible by EpilogueTileM and EpilogueTileN respectively.");
     TLLM_CHECK_ERROR(
@@ -677,19 +1036,25 @@ inline bool checkAndUpdateGemmOptions(
     {
         TLLM_CHECK_ERROR(
             options.mNumStagesMmaWithinWorkTile == 1, "Non-DeepSeekFp8 requires numStagesMmaWithinWorkTile == 1");
+        if (options.mNumStagesMma > 1)
+        {
+            TLLM_CHECK_ERROR(options.mTileScheduler == TileScheduler::Persistent,
+                "Non-DeepSeekFp8 requires persistent scheduler when using numStagesMma >1");
+        }
     }
     if (options.mUseDeepSeekFp8)
     {
-        TLLM_CHECK_ERROR(options.mDtypeElt == tg::Dtype::E4m3, "A and B dtype must be E4m3 for DeepSeek Fp8. Found ",
-            tg::dtypeToString(options.mDtypeElt));
+        TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::E4m3 && options.mDtypeB == tg::Dtype::E4m3,
+            "A and B dtype must be E4m3 for DeepSeek Fp8. Found dtypeA=", tg::dtypeToString(options.mDtypeA),
+            " dtypeB=", tg::dtypeToString(options.mDtypeB));
 
         TLLM_CHECK_ERROR(isBlackwell, "DeepSeek Fp8 is not supported for Hopper");
         TLLM_CHECK_ERROR(options.mAllReduceAlgo == AllReduceAlgo::None, "DeepSeek Fp8 does not support AllReduce");
 
         // Check that TileK = 128 for correct scaling of every 128 channels.
         TLLM_CHECK_ERROR(options.mTileK == 128, "Tile-K must be equal to 128 for DeepSeek Fp8");
+        TLLM_CHECK_ERROR(options.mK % options.mTileK == 0, "K must be a multiple of TileK");
         // Tile sizes of the output hidden dimension.
-        auto hiddenDim = options.mTransposeMmaOutput ? options.mM : options.mN;
         auto hiddenDimPerOutputTile = options.mTransposeMmaOutput ? options.mTileM : options.mTileN;
         auto hiddenDimPerEpilogueTile = options.mTransposeMmaOutput ? options.mEpilogueTileM : options.mEpilogueTileN;
         auto hiddenDimPerMma = options.mTransposeMmaOutput ? options.mMmaM : options.mMmaN;
@@ -702,9 +1067,6 @@ inline bool checkAndUpdateGemmOptions(
         // Use two MMA warps to reduce mbar trywait latency. TODO: enable by default for deepseek.
         // options.mUseTwoMmaWarps = true;
 
-        // Make sure the GEMM-M/N dimension is a multiple of 128 when using DeepSeek FP8.
-        TLLM_CHECK_ERROR(hiddenDim % 128 == 0, "GEMM-", hiddenDimName,
-            " must be a multiple of 128 when using DeepSeek Fp8. Found ", hiddenDim);
         // Make sure the GEMM-K dimension is a multiple of 128 when using DeepSeek FP8.
         TLLM_CHECK_ERROR(
             options.mK % 128 == 0, "GEMM-K must be a multiple of 128 when using DeepSeek Fp8. Found ", options.mK);
@@ -732,25 +1094,32 @@ inline bool checkAndUpdateGemmOptions(
         TLLM_CHECK_ERROR(options.mTileN == options.mEpilogueTileN, "TileN must be equal to EpilogueTileN for slice-K");
 
         TLLM_LOG_WARNING("Overwriting TileM and EpilogueTileM to 32 for slice-K");
-        if (updateOptions)
+        if (options.mTileM != 32 || options.mEpilogueTileM != 32)
         {
-            // FIXME: it is possible to remove this restriction.
-            options.mTileM = 32;
-            options.mEpilogueTileM = 32;
+            if (updateOptions)
+            {
+                // FIXME: it is possible to remove this restriction.
+                options.mTileM = 32;
+                options.mEpilogueTileM = 32;
+            }
+            else
+            {
+                return false;
+            }
         }
-        else
-        {
-            return false;
-        }
-        TLLM_CHECK_ERROR(options.mDtypeElt == tg::Dtype::E4m3, "Slice-K requires e4m3 input dtype");
+        TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::E4m3 && options.mDtypeB == tg::Dtype::E4m3,
+            "Slice-K requires e4m3 input dtype");
 
-        if (updateOptions)
+        if (options.mNumSlicesForSliceK != 4)
         {
-            options.mNumSlicesForSliceK = 4;
-        }
-        else
-        {
-            return false;
+            if (updateOptions)
+            {
+                options.mNumSlicesForSliceK = 4;
+            }
+            else
+            {
+                return false;
+            }
         }
         TLLM_CHECK_ERROR((options.mTileK / options.mMmaK) % options.mNumSlicesForSliceK == 0, "TileK (", options.mTileK,
             ") / MmaK (", options.mMmaK, ") must be a multiple of mNumSlicesForSliceK (", options.mNumSlicesForSliceK,
@@ -759,14 +1128,22 @@ inline bool checkAndUpdateGemmOptions(
 
     if (options.mUseUnrollLoop2xForMma)
     {
-        bool notSupported = (options.mK / options.mNumSlicesForSplitK) % (options.mTileK * 2) != 0;
-        // Check that the 2*TileK is a multiple of MmaK when UnrollLoop2x is enabled.
-        // This is to avoid deadlock when mma runs even-numbered loop while the other warps run
-        // odd-numbered loop.
+        // Number of iterations in K dimension after padding.
+        // Note the perCtaK in each CTA in the splitK group are padded to the same number of iterations.
+        // E.g., K = 512, TileK = 128, numSlicesForSplitK = 3. Then the padded K is
+        //
+        //   ceil(512 / (128*3)) * (128*3) = 768
+        //
+        int paddedK = divUpMul(options.mK, options.mTileK * options.mNumSlicesForSplitK);
+        // Check that the padded K (K rounded to next multiple of tileK) is a multiple of 2*TileK when
+        // UnrollLoop2x is enabled. This is to avoid deadlock when mma runs even-numbered loop while the
+        // other warps run odd-numbered loop.
+        //
+        bool notSupported = (paddedK / options.mNumSlicesForSplitK) % (options.mTileK * 2) != 0;
         if (notSupported)
         {
             TLLM_LOG_WARNING("Size K / splitK must be a multiple of TileK * 2. Found TileK=", options.mTileK,
-                " and K=", options.mK, " and numSlicesForSplitK=", options.mNumSlicesForSplitK,
+                " and K=", options.mK, " (paddedK=", paddedK, ") and numSlicesForSplitK=", options.mNumSlicesForSplitK,
                 ". Disabling unrollLoop2xForMma.");
             if (updateOptions)
             {
@@ -821,23 +1198,108 @@ inline bool checkAndUpdateGemmOptions(
     //
     // Kernel 1:  ----PREEXIT-----------FLUSH
     // Kernel 2:      -------PREEXIT----ACQBULK---FLUSH
-    // Kernel 3:  Warp 0:           ---- (!) Output of 1,2 is not yet visible -----------------------
-    //            Warp 1:           ---- (!) We normally assume that 1 is visible is not yet visible-
-    //            Warp 2:           -------------------ACQBULK-- Kernel 1,2 output visible ----------
+    // Kernel 3:  Warp 0:           ---- (!) Output of 1,2 is not yet visible
+    // -----------------------
+    //            Warp 1:           ---- (!) We normally assume that 1 is visible is not yet
+    //            visible- Warp 2:           -------------------ACQBULK-- Kernel 1,2 output visible
+    //            ----------
     TLLM_CHECK_ERROR((options.mGridWaitForPrimaryA || !options.mGridTriggerSecondaryA),
         "A: If a task triggers a secondary kernel, it must also wait for primary kernel.");
     TLLM_CHECK_ERROR((options.mGridWaitForPrimaryB || !options.mGridTriggerSecondaryB),
         "B: If a task triggers a secondary kernel, it must also wait for primary kernel.");
 
+    if (options.mUsePerTokenSfA || options.mUsePerTokenSfB)
+    {
+        // Checks applicable to both MetaFP8 and RoutingScalesOnInput
+        TLLM_CHECK_ERROR(!options.mUseDeepSeekFp8, "DeepSeek FP8 and per-token scaling are not compatible");
+        TLLM_CHECK_ERROR(isBlackwell, "Per-token scaling is not supported for Hopper");
+        if (options.mUsePerTokenSfA && options.mUsePerTokenSfB)
+        {
+            // MetaFP8 case
+            TLLM_CHECK_ERROR(options.mDtypeA == tg::Dtype::E4m3 && options.mDtypeB == tg::Dtype::E4m3,
+                "A and B dtype must be E4m3 for Meta Fp8. Found dtypeA=", tg::dtypeToString(options.mDtypeA),
+                " dtypeB=", tg::dtypeToString(options.mDtypeB));
+        }
+        else
+        {
+            // RoutingScalesOnInput case
+            TLLM_CHECK_ERROR((options.mUsePerTokenSfA && !options.mTransposeMmaOutput)
+                    || (options.mUsePerTokenSfB && options.mTransposeMmaOutput),
+                "In RoutingScalesOnInput mode, perToken scales must be used on activations");
+        }
+    }
+
+    // The generation should support non K-major layouts for both A and B; however, it is unclear if
+    // there is a use-case
+    TLLM_CHECK_ERROR((options.mLayoutA == MatrixLayout::MajorK) || (options.mLayoutB == MatrixLayout::MajorK),
+        "At least one matrix must be in k-major layout");
+
+    // Some features are currently only support when both matrices are in K-major format
+    if (options.mLayoutB != MatrixLayout::MajorK || options.mLayoutB != MatrixLayout::MajorK)
+    {
+        TLLM_CHECK_ERROR(isBlackwell, "Non K-major layouts are only supported on Blackwell");
+        TLLM_CHECK_ERROR(options.mSplitK == SplitK::None, "Non K-major layouts do not support split K");
+    }
+    if (options.mLayoutA == MatrixLayout::MajorMn)
+    {
+        TLLM_CHECK_ERROR(tg::dtypeGetNumBits(options.mDtypeA) >= 8, "Subbyte types only support K major layout");
+    }
+    if (options.mLayoutB == MatrixLayout::MajorMn)
+    {
+        TLLM_CHECK_ERROR(tg::dtypeGetNumBits(options.mDtypeB) >= 8, "Subbyte types only support K major layout");
+    }
+
+    if ((options.mLayoutA == MatrixLayout::BlockMajorK) || (options.mLayoutB == MatrixLayout::BlockMajorK))
+    {
+        bool const isBlockA = options.mLayoutA == MatrixLayout::BlockMajorK;
+
+        // Block K size must be 128B.
+        // TODO Leaving this as an option for now in case we want to expertiment with other block sizes
+        // As the user is not expected to set this, do not fail if updateOptions is false
+        int32_t const elemSizeInBits
+            = (isBlockA) ? tg::dtypeGetNumBits(options.mDtypeA) : tg::dtypeGetNumBits(options.mDtypeB);
+        int32_t const elemsIn128B = 128 * 8 /* Bits in byte */ / elemSizeInBits;
+
+        if (options.mBlockK != elemsIn128B)
+        {
+            if (updateOptions)
+            {
+                options.mBlockK = elemsIn128B;
+            }
+            else
+            {
+                return false;
+            }
+        }
+
+        if (options.mBlockK > options.mTileK)
+        {
+            TLLM_CHECK_ERROR(options.mBlockK % options.mTileK == 0,
+                "If block size is greater than tile size, block size must be a multiple of tile size");
+        }
+        else if (options.mBlockK < options.mTileK)
+        {
+            TLLM_CHECK_ERROR(options.mTileK % options.mBlockK == 0,
+                "If tile size is greater than block size, tile size must be a multiple of block size");
+        }
+    }
+
+    if (!isBiasTypeNone(options.mBiasType))
+    {
+        TLLM_CHECK_ERROR(!isBiasTypeMn(options.mBiasType), "BiasType::Mn is not supported");
+        TLLM_CHECK_ERROR(!options.mUseDeepSeekFp8, "Bias is not supported for DeepSeek Fp8");
+        TLLM_CHECK_ERROR(!(options.mUsePerTokenSfA && options.mUsePerTokenSfB), "Bias is not supported for Meta Fp8");
+    }
+
     if (updateOptions)
     {
         // Init kernel traits.
-        options.mKernelTraits = KernelTraits(options.mDtypeElt, options.mDtypeC, options.mDtypeAcc, options.mTileM,
-            options.mTileN, options.mTileK, options.mEpilogueTileM, options.mEpilogueTileN, options.mNumStages,
-            options.mNumStagesMma, options.mNumSlicesForSplitK, options.mNumSlicesForSliceK, options.mSplitK,
-            options.mUseTmaStore, options.mTransposeMmaOutput, options.mAllReduceAlgo,
-            options.mTileScheduler == TileScheduler::Persistent, options.mUseDeepSeekFp8, options.mUsePerTokenSfA,
-            options.mUsePerTokenSfB);
+        options.mKernelTraits = KernelTraits(options.mDtypeA, options.mDtypeB, options.mDtypeC, options.mDtypeAcc,
+            options.mDtypeMmaA, options.mDtypeMmaB, options.mMmaKind, options.mTileM, options.mTileN, options.mTileK,
+            options.mEpilogueTileM, options.mEpilogueTileN, options.mNumStages, options.mNumStagesMma,
+            options.mNumSlicesForSplitK, options.mNumSlicesForSliceK, options.mSplitK, options.mUseTmaStore,
+            options.mTransposeMmaOutput, options.mAllReduceAlgo, options.mTileScheduler == TileScheduler::Persistent,
+            options.mUseDeepSeekFp8, options.mUsePerTokenSfA, options.mUsePerTokenSfB, options.mBiasType);
     }
 
     return true;
@@ -857,3 +1319,5 @@ inline bool checkAndUpdateGemmOptions(
 #undef TLLM_LOG_ERROR
 
 #endif // TLLM_GEN_EXPORT_INTERFACE
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelMetaInfo.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelMetaInfo.h
index e4f9b89c93..d953deb571 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelMetaInfo.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelMetaInfo.h
@@ -19,92 +19,249 @@
 
 #include "GemmGatedActOptions.h"
 
+namespace gemmGatedAct
+{
+
 namespace tensorrt_llm
 {
 namespace kernels
 {
 // clang-format off
 
-#define TLLM_GEN_COMMIT "23d32a5"
-#define TLLM_GEN_EXPORT_VERSION "0.0"
+#define TLLM_GEN_COMMIT "32110ebf-dirty"
+#define TLLM_GEN_EXPORT_VERSION "7.0.3.0"
 
-static constexpr size_t tllmGenGemmGatedActListLen = 13;
+static constexpr size_t tllmGenGemmGatedActListLen = 84;
 
 #ifndef EXCLUDE_SM_100
-extern unsigned char GemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
-extern unsigned char GemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin[];
+extern unsigned char GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin[];
 #endif // EXCLUDE_SM_100
 
 #ifndef EXCLUDE_SM_100
-extern unsigned int GemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
-extern unsigned int GemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
+extern unsigned int GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len;
 #endif // EXCLUDE_SM_100
 
 
 static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 #ifndef EXCLUDE_SM_100
-{GemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 86016, "gemmGatedActKernel_Bfloat16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 448, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 136192, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "5b67e4f9514141995486e4b8c33f0f885552b26c3fe8cc3e1389136761ac4094", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(17826819)
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 64
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
-, /* mMmaN */ 8
+, /* mMmaN */ 128
 , /* mMockAllReduce */ 0
 , /* mN */ 256
-, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 3
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(2)
+, /* mSplitK */ gemm::SplitK(0)
 , /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
-, /* mTileN */ 8
+, /* mTileN */ 128
 , /* mTileK */ 256
 , /* mUseUnrollLoop2xForMma */ 0
 , /* mUseCustomMmaSchedule */ 1
@@ -118,47 +275,61 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin_len, 168960, "gemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 136192, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "4315ac2b0d090711080eb399c209955f6963f7ad05a12b6978fab9d88e874477", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileN */ 64
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
 , /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
-, /* mMmaK */ 32
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 128
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 2
+, /* mNumStages */ 3
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
-, /* mUseShuffledMatrixA */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMmaOutput */ 0
+, /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
 , /* mTileK */ 256
@@ -172,45 +343,479 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin_len, 112640, "gemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 136192, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "bf2d1b36035114d6193e72943740e99d7aad417cdea0c30e7a3e69c374255e94", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 16
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
-, /* mMmaK */ 32
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 136192, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "29494acc8be01db6fe7c482c3b50aa0e14b3dd4feabb8fc448c9f95f947517f0", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 154624, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "9efcb65bb29b98c06f81a6359fc37a14ecaa774eaf5c6eeb006459994c0612bf", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 154624, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "99792d201f89a353a375d5d18fed42a144371e46b32783e3e66e232d1b554ea0", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 162816, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "4e60f235d519d3ee892b07b7ee21b13b933e629668c88c1de7571aa1843dbae7", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 162816, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "364051e633dcd5bc7255cb13323ebabce66d9accb01e4693dc84a06379791bda", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 126976, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "de187182b79ffa8209138ec7d14f30bb8d1f47cee37ea16e7ba790673c40684e", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
@@ -218,7 +823,7 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileK */ 256
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseDeepSeekFp8 */ 0
@@ -228,101 +833,59 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 110592, "gemmGatedActKernel_Bfloat16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 124928, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "1d175d0142c0236322ac25c476b1bf9ba915a53416bdbb5680bfe08432313197", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
 , /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mM */ 256
-, /* mMmaK */ 32
-, /* mMmaM */ 128
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumSlicesForSplitK */ 4
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
-, /* mNumStagesMma */ 1
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mUseShuffledMatrixA */ 1
-, /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTransposeMmaOutput */ 1
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileK */ 256
-, /* mUseUnrollLoop2xForMma */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseDeepSeekFp8 */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
-, /* mTileScheduler */ gemm::TileScheduler(0)
- }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 86016, "gemmGatedActKernel_E2m1_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 448, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(17826819)
-, /* mDtypeC */ trtllm::gen::Dtype(17826819)
-, /* mEnablesEarlyExit */ 0
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 4
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(2)
@@ -342,31 +905,464 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin_len, 218112, "gemmGatedActKernel_E4m3_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 126976, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "99fd786c8db39de59dc6fe34973afb9ce5dd044b90008105697df87fc24d8bdf", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
-, /* mDtypeC */ trtllm::gen::Dtype(1050630)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileN */ 8
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
 , /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 124928, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "2f3b6546de54fe852ea5d47faa55561623b983c2059972e995d409e5f6ad1ac9", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 205824, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "49c6f6729366a9e619ebcd50f931b9d8aae1fde98e05ea952480c8d7a8258b2c", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 203776, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "0ba3a788108f96705971e8ecba7dd97c55be2e79918fde8086706c7942d36dac", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 203776, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "0ba3a788108f96705971e8ecba7dd97c55be2e79918fde8086706c7942d36dac", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 205824, "gemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "f1706cfa1f7cfcf07c98036f53efba2503beea1d3c1ba87d423bfcde6ea1ba04", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 121856, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "3dd66b74165ec2840acec6d7d5f6598943759bff9d3df10b9b1852cc9d7d6bf9", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
 , /* mMmaM */ 128
 , /* mMmaN */ 128
 , /* mMockAllReduce */ 0
@@ -379,10 +1375,921 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
-, /* mUseShuffledMatrixA */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMmaOutput */ 0
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 121856, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "cfb5a79df17aac6a15adae18b9c323056eb351b1fab1b961eded6762beb98485", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 194560, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "9bab7ba6449fe2ac4f3cd9835f8f3c064af150c4158923b7dfb8d98436a83d93", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 194560, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "1e3f20bbc07c40b3c2a9b59398317cb9697ff2ec56f4f713cdc6fa51d94f9d8e", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 219136, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "6f5263481c50465513910742b56f76224ae7f1167ec3900a5695fb76b50e1093", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 219136, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "39e629d2222bee2438a0429c5b358334635600987d8bb71b3e16a6f68d22d68f", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 169984, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "d884002e16cdcf3fe600386c4bb98033d12bd88d695495923af2f9e746eda1a6", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 169984, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "3afa69de26495aac2c51fb738efb3be9a56043e9eb28aa26ec4c8a1011d9e238", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 217088, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "730666bd70b9cb9798960f75b14ee32150dce70f93b183889339af1bc935d52a", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 224, "7caa1bc595167e16fae6b3dc7c065b804cdf24bf9860a9a5f05fa881c05eb1fb", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 217088, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "093afd94b8aa7d3c9bfbbb37449fb1ae7b377a4932180bd1feb3208f519132d0", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_Bfloat16_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 224, "5c244b6342b61b29d97519a151f28b1fd26d2ef67a1eb1871f9c61fc260f8361", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1052672)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 128000, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "01d98ed8c0fba4621e78191f7c6fd93c4821e25ee7527bbc5c83c2a9c3368852", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 128000, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "5fd38415175c2492d221bff2f008d356849b2ac5f936bc592e00b61c76dd5edd", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
 , /* mTileK */ 256
@@ -396,45 +2303,479 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin_len, 111616, "gemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 134144, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "e0ffe2a3ef05cc27c1d4867049431b58186e20ac7df5e5e51de3f7bd746f8fb2", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
-, /* mDtypeC */ trtllm::gen::Dtype(1050630)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 16
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
-, /* mMmaK */ 32
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 134144, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "c6a6eadb7e90bda398f45614f6d82350120b6b05abef1d5c5a874f7ffe99ebb2", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 150528, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "5a9feacd1dc9854de7c2837582857525834e086eab8e688dfb8e215c745e3220", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 150528, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "ea8dff090f1cd624bb0e8c17f08c9964b00b38641a8faa674610ae13172e3b1e", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 154624, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "8cb3c535c2168ae2cad0743c3aa9539471443c6a289cea713111bfa632de7934", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 154624, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "c93896ae65c029c4ec7dfc8f6e0763e999ef15daad4f3bea7d36fa5157c49d8e", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 125952, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "af7781853572012961cea76b7e2a082d6d9342e43b31abe297a81db85b06d813", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
@@ -442,7 +2783,7 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileK */ 256
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseDeepSeekFp8 */ 0
@@ -452,101 +2793,59 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 110592, "gemmGatedActKernel_E4m3_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 124928, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "87fac270b79941879e5c23a8e8f59e5f1d96696f96d1ef0b3cd14fad5ffe5dba", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
-, /* mDtypeC */ trtllm::gen::Dtype(1050630)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mM */ 256
-, /* mMmaK */ 32
-, /* mMmaM */ 128
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumSlicesForSplitK */ 4
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
-, /* mNumStagesMma */ 1
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mUseShuffledMatrixA */ 1
-, /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTransposeMmaOutput */ 1
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileK */ 256
-, /* mUseUnrollLoop2xForMma */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseDeepSeekFp8 */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
-, /* mTileScheduler */ gemm::TileScheduler(0)
- }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 86016, "gemmGatedActKernel_Fp16_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 448, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(17826819)
-, /* mDtypeC */ trtllm::gen::Dtype(1052680)
-, /* mEnablesEarlyExit */ 0
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 4
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(2)
@@ -566,47 +2865,1391 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin, GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a_cubin_len, 168960, "gemmGatedActKernel_Fp16_E4m3_Fp32_tile128x128x256_epilogueTile128x128_mma128x128x32_cluster1x1x1_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 125952, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "c4a819db82a83df03e82c399c6fe741f068bbac46835eee69a358f99a29b7c1b", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
-, /* mDtypeC */ trtllm::gen::Dtype(1052680)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 128
+, /* mEpilogueTileN */ 8
 , /* mGridTriggerSecondaryA */ 0
 , /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
 , /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 124928, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "d1a0af495d8108a7ae3ec48e87326181a93bb91ab901f662b8992f551c048c00", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 204800, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "4c1d3d6fd24e8ff2d04ce69c9c225b3e77b6dcb4fb977ee3717cd2f04f0166a1", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 203776, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "27c9fec59bbe27e81111633837e72b2962ddf18f96194351bc9442acbc2343f3", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 203776, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "27c9fec59bbe27e81111633837e72b2962ddf18f96194351bc9442acbc2343f3", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 204800, "gemmGatedActKernel_E4m3_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "9b607b46dc0fb419b03807ce73d366a83d5a55352df0dba94c31d03fd9f06610", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 113664, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "ec9a5dbd34f3ad0a17231641211733d0a1b69f11331f2b26ab9c2c00df542cae", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
 , /* mMmaM */ 128
 , /* mMmaN */ 128
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 2
+, /* mNumStages */ 3
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
-, /* mUseShuffledMatrixA */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
-, /* mTransposeMmaOutput */ 0
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 113664, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "732c9c63ba7a5bc1fd15ab63e71cc601c2cbee4671eb804ddcc523a093bd0ee7", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 192512, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "926cb38fb683ac2b8ad5d3b55c88e1535ebd0e6669fe060f4a2f2bab56e64bf8", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 192512, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "ae0b7ac83d2d4b5711c7dfb0261ffd459714372075e26140d61df4b0c101805d", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "1792b7a0e51fc1b15733d3c4d5e88436b71b43dcb303a762ea8d67365c514c43", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "be83e8927e5f0d7116881e625370ff27e9bd32dad586c6be5b19148a324b0526", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 161792, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "a20f89c5892265e6f3294aa2b80d7058e556817b5dbf083cddeae39d73b668d6", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 161792, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "33a720803a9e091a306038f0bafaf1f6da9377695e312269ef47ce2848ead809", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 216064, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "204f40d2ec61881fdbdd1a8b302d18e2e34e2b3a92401c0613c849d7550245bf", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 224, "c4e3e3dd484dac49034359fa74db1895e1c1f8b18e16a5c8d2a80d9065f1bf8a", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 216064, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "0e1ee1d570e3501a7ae4e28ad518e73362814e871bd0c99eb16b1009db9dc255", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_E4m3_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 224, "c39a61a71fe1c363ca8fb35c0a44201e226e2a37bbc9340b30d8693f6a2801a1", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 152576, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "116e2251afff6fc4b35e203e20e67fec51fea0bf080924d9f372d01e8c09dca9", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 152576, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x128x256u2_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "2c6676fa241d1cfa228d38d752455367f406b6fdf63e6e743fcfb601d6cad4d6", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
 , /* mTileM */ 128
 , /* mTileN */ 128
 , /* mTileK */ 256
@@ -620,45 +4263,479 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a_cubin_len, 112640, "gemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x1_transposeMmaOutput_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 140288, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "757616ca0f06ae3e788e03ef2eb0937d9e74f8f8253788e23eb4c1030c36b0c7", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 1
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
-, /* mDtypeC */ trtllm::gen::Dtype(1052680)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
+, /* mEpilogueTileN */ 16
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
-, /* mMmaK */ 32
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 140288, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x16x256u2_s6_et128x16_m128x16x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "e588cb33ab99116fbcfdb2b17151573ebf82617182918d175415aa6f4cf98aa1", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 162816, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "d2d4ae0b52ea4f1d1f2a17a3279c0c8d71dc74ddd413046ffd1ed409b3cf80c0", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 162816, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x32x256u2_s6_et128x32_m128x32x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "d734b1b43833a67d9366198b0f92b464d9693fbe3e6f133de48c17b321ad7076", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 179200, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "ea7fc2413963783f4c0c8e20e50916cf28c601a20e79bc8058f8da59322e3712", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 179200, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x64x256u2_s5_et128x64_m128x64x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "7e28fe19e2cf656d223f81e393bb90a6ba39198c807e3c8f0192e5eb4dd5c514", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 129024, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "a2860fc7708cea6ce0896cd07f98ca232f6a6d6f7daa29007968a9fcd44b4121", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 1
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(0)
@@ -666,7 +4743,7 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mTileM */ 128
 , /* mTileN */ 8
 , /* mTileK */ 256
-, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseUnrollLoop2xForMma */ 0
 , /* mUseCustomMmaSchedule */ 1
 , /* mUseHoistTryWaitForCustomMmaSchedule */ 0
 , /* mUseDeepSeekFp8 */ 0
@@ -676,101 +4753,59 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mUseTwoTmaLoadWarps */ 1
 , /* mUseTwoMmaWarps */ 0
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 110592, "gemmGatedActKernel_Fp16_E4m3_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x32_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 224, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 124928, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "fd5b2b93a53f2e998abadc4a3b4cb4204610606a38656b9712af9764e73a2736", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
 , /* mClusterDimX */ 1
 , /* mClusterDimY */ 1
 , /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(1050630)
-, /* mDtypeC */ trtllm::gen::Dtype(1052680)
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
 , /* mEnablesEarlyExit */ 0
 , /* mEnablesDelayedEarlyExit */ 0
 , /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
 , /* mEpilogueTileM */ 128
 , /* mEpilogueTileN */ 8
 , /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
+, /* mGridTriggerSecondaryB */ 0
 , /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
-, /* mGridWaitForPrimaryB */ 1
-, /* mHoistMmaTaskTryWaits */ 0
-, /* mK */ 2048
-, /* mKernelTraits */ {}
-, /* mM */ 256
-, /* mMmaK */ 32
-, /* mMmaM */ 128
-, /* mMmaN */ 8
-, /* mMockAllReduce */ 0
-, /* mN */ 256
-, /* mNumSlicesForSplitK */ 4
-, /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 3
-, /* mNumStagesMma */ 1
-, /* mNumStagesMmaWithinWorkTile */ 1
-, /* mNumStagesMmaAcrossWorkTile */ 1
-, /* mNumStagesWorkId */ 3
-, /* mOutputDebugTensors */ 0
-, /* mUseShuffledMatrixA */ 1
-, /* mSliceK */ 0
-, /* mSplitK */ gemm::SplitK(2)
-, /* mTransposeMmaOutput */ 1
-, /* mTileM */ 128
-, /* mTileN */ 8
-, /* mTileK */ 256
-, /* mUseUnrollLoop2xForMma */ 1
-, /* mUseCustomMmaSchedule */ 1
-, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
-, /* mUseDeepSeekFp8 */ 0
-, /* mUsePerTokenSfA */ 0
-, /* mUsePerTokenSfB */ 0
-, /* mUseTmaStore */ 1
-, /* mUseTwoTmaLoadWarps */ 1
-, /* mUseTwoMmaWarps */ 0
-, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
-, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
-, /* mTileScheduler */ gemm::TileScheduler(0)
- }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
-{GemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a_cubin_len, 86016, "gemmGatedActKernel_Fp32_E2m1_Fp32_tile128x8x256_epilogueTile128x8_mma128x8x64_cluster1x1x4_splitK4_transposeMmaOutput_sm100a", 448, {{ /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
-, /* mClusterDimX */ 1
-, /* mClusterDimY */ 1
-, /* mClusterDimZ */ 4
-, /* mDtypeAcc */ trtllm::gen::Dtype(1056777)
-, /* mDtypeElt */ trtllm::gen::Dtype(17826819)
-, /* mDtypeC */ trtllm::gen::Dtype(1056777)
-, /* mEnablesEarlyExit */ 0
-, /* mEnablesDelayedEarlyExit */ 0
-, /* mEnablesGlobalPtxKnobs */ 1
-, /* mEpilogueTileM */ 128
-, /* mEpilogueTileN */ 8
-, /* mGridTriggerSecondaryA */ 0
-, /* mGridTriggerSecondaryB */ 1
-, /* mGridWaitForPrimaryEarlyExit */ 1
-, /* mGridWaitForPrimaryA */ 0
+, /* mGridWaitForPrimaryA */ 1
 , /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
 , /* mHoistMmaTaskTryWaits */ 0
 , /* mK */ 2048
 , /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
 , /* mM */ 256
 , /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
 , /* mMmaM */ 128
 , /* mMmaN */ 8
 , /* mMockAllReduce */ 0
 , /* mN */ 256
 , /* mNumSlicesForSplitK */ 4
 , /* mNumSlicesForSliceK */ 1
-, /* mNumStages */ 4
+, /* mNumStages */ 6
 , /* mNumStagesMma */ 1
 , /* mNumStagesMmaWithinWorkTile */ 1
 , /* mNumStagesMmaAcrossWorkTile */ 1
 , /* mNumStagesWorkId */ 3
 , /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
 , /* mUseShuffledMatrixA */ 1
 , /* mSliceK */ 0
 , /* mSplitK */ gemm::SplitK(2)
@@ -790,11 +4825,1274 @@ static const gemmGatedAct::GemmGatedActConfig tllmGenGemmGatedActList[] = {
 , /* mSfLayoutA */ trtllm::gen::SfLayout(3)
 , /* mSfLayoutB */ trtllm::gen::SfLayout(1)
 , /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
 , /* mTileScheduler */ gemm::TileScheduler(0)
  }, /* mActType */ gemmGatedAct::ActType(0)
- }, gemm::SmVersion::Sm100a },
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 129024, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "8b4191af5a1a18dcadebbfc266c942d5957a372b487eb959cbb7dd8ab8f36dcf", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 124928, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x256u2_s6_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "e8a9038cc0ced071eb9386a64e9322752f8b9552d2c897b925ca8540312b85b8", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 207872, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "0cd1fd3c55848cb2dd2a1b9920276bb0063c0e3700d2d6f604635bdda8ead2ce", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 203776, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "416072b8397e5025dae0a16ce7c734e7cd40c8c33baa65d0d3b29761e9dfacbc", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 203776, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512_s5_et128x8_m128x8x64_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 448, "416072b8397e5025dae0a16ce7c734e7cd40c8c33baa65d0d3b29761e9dfacbc", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 207872, "gemmGatedActKernel_Fp32_E2m1E2m1_Fp32_t128x8x512u2_s5_et128x8_m128x8x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 448, "0d4c6ba1dfd9cffc117d4dc341f090a202db2358d72b42f6dc9f891f4d846e12", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeB */ trtllm::gen::Dtype(17826818)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(17826818)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(17826818)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 64
+, /* mMmaKind */ trtllm::gen::MmaKind(4)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 512
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(1)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(1)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 138240, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "c06536f6d5d938daa1f33e630bed439831af757dd44d055b46f562675b9512d7", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 138240, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x128x128u2_s3_et128x64_m128x128x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "3adb82e655205a0d821e860428f5cd55a03ad06d5d01b98372bec55db3a37899", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 128
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 128
+, /* mTileK */ 128
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 198656, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "8812b1becc29e5ab522797b5951bbb721d6022c46d8bab6f5756f2f4999e5fc7", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 198656, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x16x256u2_s5_et128x16_m128x16x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "ce8d3fa4a4e6c25f79ecfe60ce641b8bd0df788e551b213449416f99a005d93c", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 16
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 16
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 16
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 227328, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "f6ee8c1ff3d850c29a7c078cfbed67e92d53075acb425b8dc0d6a58d52e7f913", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 227328, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x32x256u2_s5_et128x32_m128x32x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "6ffde3f730bf6203df01fd6b3874d9dee623da09ae3c05e990750cb3bd3c8bb5", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 32
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 32
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 5
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 32
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 186368, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "606a2af8f34b76d77d2e3bb69e7d8a515e39f9ea90a9bb45d4986b3a0cb3a163", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 186368, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x64x256u2_s3_et128x64_m128x64x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "69508eda91440eb9eb9b402dcab2c4b90352023dfbd5a0cd2cb7018a60c3a972", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 64
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 64
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 3
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 64
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 219136, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "ad022f58f0c498ff1089adde0c7bbb4a666dc1c261ef7af3b67d9e645116fd69", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 224, "647eba9e708e696300ae306a59cbd6f92bc9e300cf4519012a828dff8e06b6d9", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 0
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 219136, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a", 224, "ca75d11c5f5dd5f1cb64a60fd95b3e9d6091987eb354e0e5a9b8980106660f2a", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 1
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 1
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(0)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
+{GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin, GemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a_cubin_len, 215040, "gemmGatedActKernel_Fp32_E4m3E4m3_Fp32_t128x8x256u2_s6_et128x8_m128x8x32_cga1x1x4_16dp256b_splitK4_TN_transOut_schedS_swiGlu_sm100a", 224, "eecb5bf45dfafe6bf0c12d8fb0d2dcc5940a821e6770150420cf7df8bdba04f2", { { /* mAllReduceAlgo */ gemm::AllReduceAlgo(0)
+, /* mBiasType */ gemm::BiasType(0)
+, /* mBlockK */ -1
+, /* mClusterDimX */ 1
+, /* mClusterDimY */ 1
+, /* mClusterDimZ */ 4
+, /* mDtypeAcc */ trtllm::gen::Dtype(1056776)
+, /* mDtypeA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeB */ trtllm::gen::Dtype(1050629)
+, /* mDtypeC */ trtllm::gen::Dtype(1056776)
+, /* mDtypeMmaA */ trtllm::gen::Dtype(1050629)
+, /* mDtypeMmaB */ trtllm::gen::Dtype(1050629)
+, /* mEnablesEarlyExit */ 0
+, /* mEnablesDelayedEarlyExit */ 0
+, /* mEnablesGlobalPtxKnobs */ 1
+, /* mEpilogueLdtmDps */ 16
+, /* mEpilogueLdtmBits */ 256
+, /* mEpilogueTileM */ 128
+, /* mEpilogueTileN */ 8
+, /* mGridTriggerSecondaryA */ 0
+, /* mGridTriggerSecondaryB */ 0
+, /* mGridWaitForPrimaryEarlyExit */ 1
+, /* mGridWaitForPrimaryA */ 1
+, /* mGridWaitForPrimaryB */ 1
+, /* mHoistLoadTaskInit */ 1
+, /* mHoistMmaTaskTryWaits */ 0
+, /* mK */ 2048
+, /* mKernelTraits */ {}
+, /* mLayoutA */ gemm::MatrixLayout(0)
+, /* mLayoutB */ gemm::MatrixLayout(0)
+, /* mM */ 256
+, /* mMmaK */ 32
+, /* mMmaKind */ trtllm::gen::MmaKind(2)
+, /* mMmaM */ 128
+, /* mMmaN */ 8
+, /* mMockAllReduce */ 0
+, /* mN */ 256
+, /* mNumSlicesForSplitK */ 4
+, /* mNumSlicesForSliceK */ 1
+, /* mNumStages */ 6
+, /* mNumStagesMma */ 1
+, /* mNumStagesMmaWithinWorkTile */ 1
+, /* mNumStagesMmaAcrossWorkTile */ 1
+, /* mNumStagesWorkId */ 3
+, /* mOutputDebugTensors */ 0
+, /* mPatchF2fp */ 0
+, /* mUseShuffledMatrixA */ 1
+, /* mSliceK */ 0
+, /* mSplitK */ gemm::SplitK(2)
+, /* mTransposeMmaOutput */ 1
+, /* mTileM */ 128
+, /* mTileN */ 8
+, /* mTileK */ 256
+, /* mUseUnrollLoop2xForMma */ 1
+, /* mUseCustomMmaSchedule */ 1
+, /* mUseHoistTryWaitForCustomMmaSchedule */ 0
+, /* mUseDeepSeekFp8 */ 0
+, /* mUsePerTokenSfA */ 0
+, /* mUsePerTokenSfB */ 0
+, /* mUseTmaStore */ 1
+, /* mUseTwoTmaLoadWarps */ 1
+, /* mUseTwoMmaWarps */ 0
+, /* mSfLayoutA */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutB */ trtllm::gen::SfLayout(3)
+, /* mSfLayoutC */ trtllm::gen::SfLayout(3)
+, /* mSfReshapeFactor */ 1
+, /* mTileScheduler */ gemm::TileScheduler(0)
+ }, /* mActType */ gemmGatedAct::ActType(0)
+, /* mClampBeforeAct */ 0
+ }, gemm::SmVersion::Sm100a},
 #endif // EXCLUDE_SM_100
 };
 // clang-format on
 } // namespace kernels
 } // namespace tensorrt_llm
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelParams.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelParams.h
index 4a7bde2a17..dc6c9a928b 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelParams.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelParams.h
@@ -26,6 +26,9 @@
 namespace gemmGatedAct
 {
 
+namespace gemmGatedAct
+{
+
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 namespace tg = trtllm::gen;
@@ -34,7 +37,7 @@ namespace tg = trtllm::gen;
 
 #ifdef TLLM_ENABLE_CUDA
 CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> const& shapes,
-    std::vector<uint64_t> const& strides, int32_t tileSizeMn, int32_t tileSizeK, void* gmemAddr)
+    std::vector<uint64_t> const& strides, std::vector<int32_t> const& tileShapes, void* gmemAddr)
 {
     CUtensorMap desc{};
     // The data type.
@@ -67,22 +70,22 @@ CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> const& s
 
     // The swizzle type.
     CUtensorMapSwizzle swizzleType{CU_TENSOR_MAP_SWIZZLE_NONE};
-    int32_t tileKSizeInBytes = (tileSizeK * tg::dtypeGetNumBits(dtype)) / /* bits */ 8;
-    if ((tileKSizeInBytes % 128) == 0)
+    int32_t fastestDimTileSizeBytes = (tileShapes[0] * tg::dtypeGetNumBits(dtype)) / /* bits */ 8;
+    if ((fastestDimTileSizeBytes % 128) == 0)
     {
         swizzleType = CU_TENSOR_MAP_SWIZZLE_128B;
     }
-    else if ((tileKSizeInBytes % 64) == 0)
+    else if ((fastestDimTileSizeBytes % 64) == 0)
     {
         swizzleType = CU_TENSOR_MAP_SWIZZLE_64B;
     }
-    else if ((tileKSizeInBytes % 32) == 0)
+    else if ((fastestDimTileSizeBytes % 32) == 0)
     {
         swizzleType = CU_TENSOR_MAP_SWIZZLE_32B;
     }
     else
     {
-        std::cerr << "Unexpected tileKSizeInBytes " << tileKSizeInBytes << std::endl;
+        std::cerr << "Unexpected fastestDimTileSizeBytes  " << fastestDimTileSizeBytes << std::endl;
         assert(false);
     }
 
@@ -91,8 +94,8 @@ CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> const& s
 
     // Check shape must be in range [1, 2^32]
     int32_t dim = shapes.size();
-    // Expect 2 dimensions.
-    assert(dim == 2);
+    // Expect 2 dimensions for regular gemm or 3 dimensions for blocked layout
+    assert(dim == 2 || dim == 3);
     // Check shape range.
     for (int32_t ii = 0; ii < dim; ++ii)
     {
@@ -117,19 +120,31 @@ CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> const& s
     // The number of elements in 128B.
     auto const numEltsIn128B = numEltsPerUInt32 /*4B*/ * 32;
     // The number of tile K hidden size (per token) in each block of shared memory.
-    auto const numEltsInClampedTileKSize = std::min(numEltsIn128B, tileSizeK);
+    auto const numEltsInClampedFastestTileSize = std::min(numEltsIn128B, tileShapes[0]);
 
-    // Build tile shapes.
-    std::vector<uint32_t> tileShapes(dim, 1);
-    tileShapes[0] = numEltsInClampedTileKSize; // tileSizeK
-    tileShapes[1] = tileSizeMn;                // tileSizeMn
+    // Build box dim array. If tileShapes is smaller than dim, just fill with 1s.
+    assert(static_cast<int32_t>(tileShapes.size()) <= dim);
+    std::vector<uint32_t> boxDim(dim, 1);
+    boxDim[0] = numEltsInClampedFastestTileSize;
+    for (size_t ii = 1; ii < tileShapes.size(); ++ii)
+    {
+        if (tileShapes[ii] > 256)
+        {
+            std::cerr << "buildNdTmaDescriptor: boxDim too large " << tileShapes[ii] << std::endl;
+            assert(false);
+        }
+        else
+        {
+            boxDim[ii] = tileShapes[ii];
+        }
+    }
 
     // Set tile strides to 0;
     std::vector<uint32_t> tileStrides(dim, 1);
 
     // Build the descriptor.
     CUresult result = cuTensorMapEncodeTiled(&desc, tmaDataFormat,
-        /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), tileShapes.data(), tileStrides.data(),
+        /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), boxDim.data(), tileStrides.data(),
         /*interleave=*/CU_TENSOR_MAP_INTERLEAVE_NONE, swizzleType,
         /*l2Promotion=*/CU_TENSOR_MAP_L2_PROMOTION_L2_128B,
         /*oobFill=*/CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE);
@@ -140,10 +155,34 @@ CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> const& s
 
         std::cerr << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr
                   << std::endl;
-        std::cerr << "Shape: " << shapes[0] << " " << shapes[1] << std::endl;
-        std::cerr << "Stride: " << stridesInBytes[0] << std::endl;
-        std::cerr << "tileShapes: " << tileShapes[0] << " " << tileShapes[1] << std::endl;
-        std::cerr << "tileStrides: " << tileStrides[0] << " " << tileStrides[1] << std::endl;
+
+        std::cerr << "Shape: ";
+        for (int ii = 0; ii < dim; ++ii)
+        {
+            std::cerr << shapes[ii] << " ";
+        }
+        std::cerr << std::endl;
+
+        std::cerr << "Stride: ";
+        for (int ii = 0; ii < dim - 1; ++ii)
+        {
+            std::cerr << stridesInBytes[ii] << " ";
+        }
+        std::cerr << std::endl;
+
+        std::cerr << "tileShapes: ";
+        for (int ii = 0; ii < dim; ++ii)
+        {
+            std::cerr << boxDim[ii] << " ";
+        }
+        std::cerr << std::endl;
+
+        std::cerr << "tileStrides: ";
+        for (int ii = 0; ii < dim; ++ii)
+        {
+            std::cerr << tileStrides[ii] << " ";
+        }
+        std::cerr << std::endl;
         std::cerr << "swizzleType: " << int(swizzleType) << std::endl;
         assert(false);
     }
@@ -165,16 +204,54 @@ struct KernelParams
 
     // TMA descriptor for A.
     // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAb. Logical shape is [M, K]. Logical strides are [K, 1]. Tile box shape is
-    // [tileM, tileK]. Tile box strides are [tileK, 1].
-    // Dtype is set from options.mDtypeElt.
+    // makeTmaShapeStrideAb.
+    //
+    // If layoutA is MatrixLayout::MajorK
+    //   Logical shape is [M, K].
+    //   Logical strides are [K, 1].
+    //   Tile box shape is [tileM, tileK].
+    //   Tile box strides are [tileK, 1].
+    //   Dtype is set from options.mDtypeA.
+    //
+    // If layoutA is MatrixLayout::MajorMn
+    //   Logical shape is [K, M].
+    //   Logical strides are [M, 1].
+    //   Tile box shape is [tileK, tileM].
+    //   Tile box strides are [tileM, 1].
+    //   Dtype is set from options.mDtypeA.
+    //
+    // If layoutA is MatrixLayout::BlockMajorK
+    //   Logical shape is [K / blockK, M, blockK].
+    //   Logical strides are [M * blockK, blockK, 1].
+    //   Tile box shape is [tileK / min(blockK, tileK), tileM, min(blockK, tileK)].
+    //   Tile box strides are [tileM * min(blockK, tileK), min(blockK, tileK), 1].
+    //   Dtype is set from options.mDtypeA, and blockK is 128B.
     CUtensorMap tmaA;
 
     // TMA descriptor for B.
     // Must be setup using gemm::buildNdTmaDescriptor with shapes and strides from
-    // makeTmaShapeStrideAb. Logical shape is [N, K]. Logical strides are [K, 1]. Tile box shape is
-    // [tileN, tileK]. Tile box strides are [tileK, 1].
-    // Dtype is set from options.mDtypeElt.
+    // makeTmaShapeStrideAb.
+    //
+    // If layoutB is MatrixLayout::MajorK
+    //   Logical shape is [N, K].
+    //   Logical strides are [K, 1].
+    //   Tile box shape is [tileN, tileK].
+    //   Tile box strides are [tileK, 1].
+    //   Dtype is set from options.mDtypeB.
+    //
+    // If layoutB is MatrixLayout::MajorMn
+    //   Logical shape is [K, N].
+    //   Logical strides are [N, 1].
+    //   Tile box shape is [tileK, tileN].
+    //   Tile box strides are [tileN, 1].
+    //   Dtype is set from options.mDtypeB.
+    //
+    // If layoutB is MatrixLayout::BlockMajorK
+    //   Logical shape is [K / blockK, N, blockK].
+    //   Logical strides are [N * blockK, blockK, 1].
+    //   Tile box shape is [tileK / min(blockK, tileK), tileN, min(blockK, tileK)].
+    //   Tile box strides are [tileN * min(blockK, tileK), min(blockK, tileK), 1].
+    //   Dtype is set from options.mDtypeB, and blockK is 128B.
     CUtensorMap tmaB;
 
     // TMA descriptor for C, (when useTmaStore is true)
@@ -236,21 +313,21 @@ struct KernelParams
     // When transposeMmaOutput is true, the shape is [N, M / 2].
     // Otherwise, the shape is [M, N / 2].
     // Elements in a given row are stored contiguously in memory (row-major).
-    void* ptrC;
+    void* ptrC{nullptr};
 
     // The scaling factors to dequantize A.
     // It is used when the DeepSeek FP8 recipe is enabled. Otherwise should be set to nullptr.
     // If transposeMmaOutput is false, shape is [K / 128, M].
     // Otherwise, shape is [M / 128, K / 128].
     // The rightmost dimension is contiguous in memory.
-    void const* ptrSfA;
+    void const* ptrSfA{nullptr};
 
     // The scaling factors to dequantize B.
     // It is used when the DeepSeek FP8 recipe is enabled. Otherwise should be set to nullptr.
     // If transposeMmaOutput is false, shape is [N / 128, K / 128].
     // Otherwise, shape is [K / 128, N].
     // The rightmost dimension is contiguous in memory.
-    void const* ptrSfB;
+    void const* ptrSfB{nullptr};
 
     // The per-token scaling factors from scale A.
     //
@@ -260,7 +337,7 @@ struct KernelParams
     //   transposed). The dtype is Dtype::Bfloat16
     //
     // The shape is [M]
-    void const* ptrPerTokenSfA;
+    void const* ptrPerTokenSfA{nullptr};
 
     // The per-token scaling factors from scale B.
     //
@@ -270,7 +347,22 @@ struct KernelParams
     //   transposed). The dtype is Dtype::Bfloat16
     //
     // The shape is [N]
-    void const* ptrPerTokenSfB;
+    void const* ptrPerTokenSfB{nullptr};
+
+    // The bias applied after the GEMM and before the activation function.
+    // The bias is applied before applying the global scaling factor. I.e.
+    // C = act(A * B + bias') * scaleC
+    // scaleC = dequantA * dequantB * quantC
+    // Thus, the bias' = bias / (dequantA * dequantB), where the bias is the original bias.
+    //
+    // if BiasType is N, the shape is [N]
+    // The bias is broadcasted along the M dimension.
+    //
+    // if BiasType is M, the shape is [M]
+    // The bias is broadcasted along the N dimension.
+    //
+    // The dtype is float32.
+    void const* ptrBias{nullptr};
 
     // The scaling factors calculated when quantizing C, for MxFp{4,8} and NvFp4 formats, also
     // used for the DeepSeek FP8 recipe.
@@ -284,7 +376,7 @@ struct KernelParams
     // If transposeMmaOutput is false, shape is [M, N / 2 / 16].
     // Otherwise, shape is [N, M / 2 / 16].
     // The layout is controlled by options.mSfLayoutC (either R128c4 or R8c4).
-    void* ptrSfC;
+    void* ptrSfC{nullptr};
 
     // Output is equal to
     // y = act(ptrScaleGate[0] * y1) * (ptrScaleC[0] * y2)
@@ -292,10 +384,29 @@ struct KernelParams
     // The output tensor scaling factor for MxFp{4,8}, NvFp4 and DeepSeek FP8 quantization.
     // TensorRT-LLM API requires a scaling factor on the device.
     // Shape is [1].
-    float const* ptrScaleC;
+    float const* ptrScaleC{nullptr};
     // The output gate scale for MxFp{4,8}, NvFp4 and DeepSeek FP8 quantization.
     // Shape is [1].
-    float const* ptrScaleGate;
+    float const* ptrScaleGate{nullptr};
+
+    // The clamp limit before the activation.
+    // Shape is [1].
+    // Clamp is INF if nullptr.
+    // If applied on SwiGlu, it will be:
+    //
+    //   x_glu    = x_glu.clamp(min=None, max=limit)
+    //   x_linear = x_linear.clamp(min=-limit, max=limit)
+    float const* ptrClampLimit{nullptr};
+
+    // The alpha and beta for SwiGlu.
+    // Shape is [1]. One alpha and one beta per tensor in batch.
+    // Alpha is 1.f if nullptr.
+    // Beta is 0.f if nullptr.
+    // The formula:
+    //
+    //   out_glu  = x_glu * torch.sigmoid(alpha * x_glu) * (x_linear + beta)
+    float const* ptrSwiGluAlpha{nullptr};
+    float const* ptrSwiGluBeta{nullptr};
 
     // The M dimension.
     // It is the total number of tokens if A is the activation matrix.
@@ -328,12 +439,12 @@ struct KernelParams
     // Pointer for partial row max for DeepSeek FP8 recipe.
     // This is temporary storage for the row max results.
     // The shape is [2, M, N / 128] and the dtype is float.
-    float* ptrPartialRowMax;
+    float* ptrPartialRowMax{nullptr};
 
     // Flags in global memory that sync on "exit" for row max computation.
     // The size is numTilesM * numTilesN / 2 and the dtype is uint32_t.
     // The memory must be set to 0 before the kernel launch.
-    uint32_t* ptrRowMaxCompletionBars;
+    uint32_t* ptrRowMaxCompletionBars{nullptr};
 
     enum class MatrixType
     {
@@ -346,13 +457,24 @@ struct KernelParams
     template <class GemmOptions>
     static auto makeTmaShapeStrideAbc(GemmOptions const& options, MatrixType matrixType)
     {
+        // The outer dimension.
         auto numTokens
             = (matrixType == MatrixType::MatrixA || matrixType == MatrixType::MatrixC) ? options.mM : options.mN;
+        // The outer dimension tile size.
+        auto tileNumTokens = (matrixType == MatrixType::MatrixC) ? options.mEpilogueTileM
+            : (matrixType == MatrixType::MatrixA)                ? options.mTileM
+                                                                 : options.mTileN;
+        // The inner dimension.
         auto hiddenSize = (matrixType == MatrixType::MatrixC) ? options.mN / 2 : options.mK;
+        // The inner dimension tile size.
+        auto tileHiddenSize = (matrixType == MatrixType::MatrixC) ? options.mEpilogueTileN / 2 : options.mTileK;
+        // Swap variables if transpose output
         if (matrixType == MatrixType::MatrixC && options.mTransposeMmaOutput)
         {
             numTokens = options.mN;
             hiddenSize = options.mM / 2;
+            tileNumTokens = options.mEpilogueTileN;
+            tileHiddenSize = options.mEpilogueTileM / 2;
         }
         // The cute tensor shape for A/B: (numTokens, hiddenSize).
         // Note that TMA descriptor expects the first dimension's stride to be
@@ -363,12 +485,41 @@ struct KernelParams
         // Swap the first two dimension as mentioned before.
         auto stride = std::vector<uint64_t>{1, static_cast<uint64_t>(hiddenSize)};
 
-        return std::make_tuple(shape, stride);
+        // Assemble the box shape
+        std::vector<int32_t> tileShape = {tileHiddenSize, tileNumTokens};
+
+        // Alternate layouts do not apply to matrixC
+        if (matrixType != MatrixType::MatrixC)
+        {
+            gemm::MatrixLayout layout = (matrixType == MatrixType::MatrixA) ? options.mLayoutA : options.mLayoutB;
+            if (layout == gemm::MatrixLayout::MajorMn)
+            {
+                // Apply transpose if necessary
+                std::swap(shape[0], shape[1]);
+                stride[1] = numTokens;
+                std::swap(tileShape[0], tileShape[1]);
+            }
+            else if (layout == gemm::MatrixLayout::BlockMajorK)
+            {
+                // Set shapes based on blocking layout
+                shape = {static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens),
+                    static_cast<uint64_t>(options.mK / options.mBlockK)};
+                stride
+                    = {1, static_cast<uint64_t>(options.mBlockK), static_cast<uint64_t>(numTokens * options.mBlockK)};
+
+                // If blockK > tileK, then the inner most box size will be based on the tile
+                int32_t const tileBlockK = std::min(options.mBlockK, tileHiddenSize);
+                tileShape = {tileBlockK, tileNumTokens, tileHiddenSize / tileBlockK};
+            }
+        }
+
+        return std::make_tuple(shape, stride, tileShape);
     }
 
     // Create the TMA shape/stride for A/B block scaling factors.
     template <class GemmOptions>
-    static auto makeTmaShapeStrideSfAb(GemmOptions const& options, MatrixType matrixType, tg::SfLayout layout)
+    static auto makeTmaShapeStrideSfAb(
+        GemmOptions const& options, MatrixType matrixType, tg::SfLayout layout, int sfReshapeFactor)
     {
         // The outer dimension.
         auto numTokens = matrixType == MatrixType::MatrixA ? options.mM : options.mN;
@@ -378,8 +529,10 @@ struct KernelParams
         auto numTokensPerTile = matrixType == MatrixType::MatrixA ? options.mTileM : options.mTileN;
         // The inner tile dimension.
         auto hiddenSizePerTile = options.mTileK;
+        // The dtype of the matrix.
+        tg::Dtype matrixDtype = matrixType == MatrixType::MatrixA ? options.mDtypeA : options.mDtypeB;
         // Number of elements per scaling factor.
-        int32_t const numEltsPerSf = (options.mDtypeElt == tg::Dtype::E2m1) ? 16 : 32;
+        int32_t const numEltsPerSf = (matrixDtype == tg::Dtype::E2m1) ? 16 : 32;
 
         switch (layout)
         {
@@ -417,15 +570,36 @@ struct KernelParams
         {
             // The scaling factor tensor packs 8x4 tiles into contiguous 32B blocks.
             //
-            // As the inner dimension (k) is required to be a multiple of the tile size, we
-            // can reshape to use fewer read requests, if the tile dimensions allow.
+            // As the inner dimension (k) is often a multiple of the tile size, we can reshape to use
+            // fewer read requests, if the tile dimensions allow. It does not reduce the number of
+            // instructions.
+            //
             // I.e., let's define r = min(⌈hiddenSizePerTile / (numEltsPerSf * 4)⌉, 8)
             //
-            // The "logical" tensor is: [outer,        inner / numEltsPerSf]
-            // The 8x4 SF layout is:    [⌈outer / 128⌉, inner / (4 * numEltsPerSf), 32]
-            // The TMA tensor shape is: [⌈outer / 128⌉, inner / (4 * numEltsPerSf * r), r * 32]
+            // The "logical" tensor is: [outer,      inner / numEltsPerSf]
+            // The 8x4 SF layout is:    [⌈outer / 8⌉, inner / (4 * numEltsPerSf), 32]
+            // The TMA tensor shape is: [⌈outer / 8⌉, inner / (4 * numEltsPerSf * r), r * 32]
+            //
+            // The caveat of NumRepeats>1 is we must pad the hidden dimension of SF to multiples of
+            // NumRepeats * numEltsPerSf * 4.
 
-            int const repeats = std::min(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4), 8);
+            // Detect if the supplied factor is power of 2. E.g., 0b0100 and (0b0100 - 1) == 0b0000.
+            int const r = sfReshapeFactor;
+            if (r > 0 && (r & (r - 1)) != 0)
+            {
+                throw std::runtime_error(
+                    "mSfReshapeFactor must be positive and a power of 2. Found " + std::to_string(r));
+            }
+
+            // Sanitize number of repeats so it doesn't exceed the dimension.
+            int const repeats = std::min(tg::ceilDiv(hiddenSizePerTile, numEltsPerSf * 4), r);
+
+            // Detect if the input hidden size K is a multiple of the repeats.
+            if (tg::ceilDiv(hiddenSize, numEltsPerSf * 4) % repeats != 0)
+            {
+                throw std::runtime_error("SF hiddenSize K (" + std::to_string(tg::ceilDiv(hiddenSize, numEltsPerSf * 4))
+                    + ") must be a multiple of repeats (" + std::to_string(repeats) + ")");
+            }
 
             auto shape = std::vector<uint64_t>{static_cast<uint64_t>(repeats * 32),
                 static_cast<uint64_t>(tg::ceilDiv(hiddenSize, numEltsPerSf * 4 * repeats)),
@@ -445,7 +619,7 @@ struct KernelParams
             return std::make_tuple(shape, stride, tileShapes);
         }
 
-        default: assert(false);
+        default: throw std::runtime_error("Unsupported SF layout");
         }
         return std::make_tuple(std::vector<uint64_t>{}, std::vector<uint64_t>{}, std::vector<uint32_t>{});
     }
@@ -453,38 +627,43 @@ struct KernelParams
     // Setup the kernel parameters.
     template <class GemmOptions_>
     static KernelParams setKernelParams(GemmOptions_ const& options, void const* ptrA, void const* ptrSfA,
-        void const* ptrPerTokenSfA, void const* ptrB, void const* ptrSfB, void const* ptrPerTokenSfB, void* ptrC,
-        float const* ptrScaleC, void* ptrSfC, float const* ptrScaleGate, float* rowMax, uint32_t* rowMaxBars)
+        void const* ptrPerTokenSfA, void const* ptrB, void const* ptrSfB, void const* ptrPerTokenSfB,
+        void const* ptrBias, void* ptrC, float const* ptrScaleC, void* ptrSfC, float const* ptrScaleGate,
+        float const* ptrClampLimit, float const* ptrSwiGluAlpha, float const* ptrSwiGluBeta, float* rowMax,
+        uint32_t* rowMaxBars)
     {
 
         // Create the return struct.
         KernelParams params;
 
         // Shape/stride for gmem tensor A.
-        auto [shapeA, strideA] = makeTmaShapeStrideAbc(options, MatrixType::MatrixA);
+        auto [shapeA, strideA, tileShapeA] = makeTmaShapeStrideAbc(options, MatrixType::MatrixA);
         // Build tma descriptor for A.
-        params.tmaA = gemmGatedAct::buildNdTmaDescriptor(
-            options.mDtypeElt, shapeA, strideA, options.mTileM, options.mTileK, const_cast<void*>(ptrA));
+        params.tmaA
+            = gemmGatedAct::buildNdTmaDescriptor(options.mDtypeA, shapeA, strideA, tileShapeA, const_cast<void*>(ptrA));
 
         // Shape/stride for gmem tensor B.
-        auto [shapeB, strideB] = makeTmaShapeStrideAbc(options, MatrixType::MatrixB);
+        auto [shapeB, strideB, tileShapeB] = makeTmaShapeStrideAbc(options, MatrixType::MatrixB);
         // Build tma descriptor for B.
-        params.tmaB = gemmGatedAct::buildNdTmaDescriptor(
-            options.mDtypeElt, shapeB, strideB, options.mTileN, options.mTileK, const_cast<void*>(ptrB));
+        params.tmaB
+            = gemmGatedAct::buildNdTmaDescriptor(options.mDtypeB, shapeB, strideB, tileShapeB, const_cast<void*>(ptrB));
 
-        if (options.mDtypeElt == tg::Dtype::E2m1 || options.mDtypeElt == tg::Dtype::MxE4m3)
+        if (options.mDtypeA == tg::Dtype::E2m1 || options.mDtypeA == tg::Dtype::MxE4m3)
         {
-            tg::Dtype const dTypeSf = tg::dtypeGetBlockSfType(options.mDtypeElt);
+            tg::Dtype const dTypeSf = tg::dtypeGetBlockSfType(options.mDtypeA);
 
             // Build TMA descriptor for gmem A block scaling factors.
             auto [shapeSfA, strideSfA, tileShapesSfA]
-                = makeTmaShapeStrideSfAb(options, MatrixType::MatrixA, tg::SfLayout::R128c4);
+                = makeTmaShapeStrideSfAb(options, MatrixType::MatrixA, tg::SfLayout::R128c4, options.mSfReshapeFactor);
             params.tmaSfA
                 = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfA, strideSfA, tileShapesSfA, const_cast<void*>(ptrSfA));
-
+        }
+        if (options.mDtypeB == tg::Dtype::E2m1 || options.mDtypeB == tg::Dtype::MxE4m3)
+        {
+            tg::Dtype const dTypeSf = tg::dtypeGetBlockSfType(options.mDtypeB);
             // Build TMA descriptor for gmem B block scaling factors.
             auto [shapeSfB, strideSfB, tileShapesSfB]
-                = makeTmaShapeStrideSfAb(options, MatrixType::MatrixB, options.mSfLayoutB);
+                = makeTmaShapeStrideSfAb(options, MatrixType::MatrixB, options.mSfLayoutB, options.mSfReshapeFactor);
             params.tmaSfB
                 = gemm::buildSfTmaDescriptor(dTypeSf, shapeSfB, strideSfB, tileShapesSfB, const_cast<void*>(ptrSfB));
         }
@@ -492,14 +671,10 @@ struct KernelParams
         if (options.mUseTmaStore)
         {
             // Shape/stride for gmem tensor C.
-            auto [shapeC, strideC] = makeTmaShapeStrideAbc(options, MatrixType::MatrixC);
-
-            // Swap M and N tiles for the M-major epilogue.
-            auto outputTileM = options.mTransposeMmaOutput ? options.mEpilogueTileN : options.mEpilogueTileM;
-            auto outputTileN = options.mTransposeMmaOutput ? options.mEpilogueTileM : options.mEpilogueTileN;
+            auto [shapeC, strideC, tileShapeC] = makeTmaShapeStrideAbc(options, MatrixType::MatrixC);
             // Build tma descriptor for C.
             params.tmaC = gemmGatedAct::buildNdTmaDescriptor(
-                options.mDtypeC, shapeC, strideC, outputTileM, outputTileN / 2, const_cast<void*>(ptrC));
+                options.mDtypeC, shapeC, strideC, tileShapeC, const_cast<void*>(ptrC));
         }
 
         params.ptrC = ptrC;
@@ -512,8 +687,13 @@ struct KernelParams
         params.ptrPerTokenSfA = ptrPerTokenSfA;
         params.ptrPerTokenSfB = ptrPerTokenSfB;
 
+        params.ptrBias = ptrBias;
+
         params.ptrScaleC = ptrScaleC;
         params.ptrScaleGate = ptrScaleGate;
+        params.ptrClampLimit = ptrClampLimit;
+        params.ptrSwiGluAlpha = ptrSwiGluAlpha;
+        params.ptrSwiGluBeta = ptrSwiGluBeta;
         params.rank = 0;
         params.tpGrpSize = 1;
 
@@ -532,3 +712,5 @@ struct KernelParams
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 } // namespace gemmGatedAct
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelTraits.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelTraits.h
index 1c3d4581c4..34189eebb0 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelTraits.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/KernelTraits.h
@@ -20,6 +20,10 @@
 #include "trtllm/gen/CommonUtils.h"
 #include "trtllm/gen/DtypeDecl.h"
 #include <cassert>
+#include <stdexcept>
+
+namespace gemmGatedAct
+{
 
 namespace gemm
 {
@@ -74,6 +78,38 @@ public:
     }
 
     // Returns the offset of the ith chunk
+    int32_t getChunkOffsetByName(std::string const& name) const
+    {
+        for (size_t ii = 0; ii < mSmemChunkNames.size(); ++ii)
+        {
+            if (mSmemChunkNames[ii] == name)
+            {
+                return getChunkOffset(ii);
+            }
+        }
+        throw std::runtime_error("Name not found: " + name);
+    }
+
+    // Returns the first chunk reuse flag given chunk name.
+    int getFirstChunkReuseFlagByName(std::string const& name) const
+    {
+        for (size_t ii = 0; ii < mSmemChunkNames.size(); ++ii)
+        {
+            if (mSmemChunkNames[ii] == name)
+            {
+                return getFirstChunkReuseFlag(ii);
+            }
+        }
+        throw std::runtime_error("Name not found: " + name);
+    }
+
+    // Function to calculate the total size of the SMEM array
+    int32_t getTotalSize() const
+    {
+        return getOffsetBeforeChunk(static_cast<int32_t>(mNumBytesAndAlignmentPerSmemChunk.size()));
+    }
+
+private:
     int32_t getChunkOffset(int32_t ii) const
     {
         if (mFirstChunkReuse[ii])
@@ -88,12 +124,6 @@ public:
         return getSizePaddedToAlignment(offset, mNumBytesAndAlignmentPerSmemChunk[ii].second);
     }
 
-    // Function to calculate the total size of the SMEM array
-    int32_t getTotalSize() const
-    {
-        return getOffsetBeforeChunk(static_cast<int32_t>(mNumBytesAndAlignmentPerSmemChunk.size()));
-    }
-
     // Returns the first chunk reuse flag for the ith chunk.
     int getFirstChunkReuseFlag(int32_t ii) const
     {
@@ -132,6 +162,24 @@ private:
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+int getNumSmemBitsPerElt(tg::Dtype dtype, tg::MmaKind mmaKind)
+{
+    if (mmaKind == tg::MmaKind::Auto)
+    {
+        throw std::runtime_error("mmaKind != tg::MmaKind::Auto");
+    }
+    if (mmaKind == tg::MmaKind::MxFp8Fp6Fp4)
+    {
+        return 8;
+    }
+    else
+    {
+        return tg::dtypeGetNumBits(dtype);
+    }
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 class KernelTraits
 {
 public:
@@ -139,11 +187,13 @@ public:
     KernelTraits() {}
 
     // The constructor.
-    KernelTraits(tg::Dtype dtypeElt, tg::Dtype dtypeC, tg::Dtype dtypeAcc, int32_t tileM, int32_t tileN, int32_t tileK,
-        int32_t epilogueTileM, int32_t epilogueTileN, int32_t numStages, int32_t numStagesMma,
-        int32_t numSlicesForSplitK, int32_t numSlicesForSliceK, SplitK splitK, bool useTmaStore,
-        bool transposeMmaOutput, AllReduceAlgo allReduceAlgo, bool usePersistentScheduler, bool useDeepSeekFp8,
-        bool usePerTokenSfA, bool usePerTokenSfB)
+    KernelTraits(tg::Dtype dtypeA, tg::Dtype dtypeB, tg::Dtype dtypeC, tg::Dtype dtypeAcc, tg::Dtype dtypeMmaA,
+        tg::Dtype dtypeMmaB, tg::MmaKind mmaKind, int32_t tileM, int32_t tileN, int32_t tileK, int32_t epilogueTileM,
+        int32_t epilogueTileN, int32_t numStages, int32_t numStagesMma, int32_t numSlicesForSplitK,
+        int32_t numSlicesForSliceK, SplitK splitK, bool useTmaStore, bool transposeMmaOutput,
+        AllReduceAlgo allReduceAlgo, bool usePersistentScheduler, bool useDeepSeekFp8, bool usePerTokenSfA,
+        bool usePerTokenSfB, BiasType biasType)
+        : mMmaKind{mmaKind}
     {
         //
         // SMEM
@@ -157,13 +207,19 @@ public:
             // [rowMax       ] (16B aligned) (if needed)
             // [sliceK       ] (16B aligned) (if needed)
             // [per-token SF ] (16B aligned) (if needed)
+            // [bias         ] (16B aligned) (if needed)
             //
             // SMEM for smemA and smemB might be repurposed and used for gmemC0 and gmemC1:
             //
             // [..smemA..][..smemB..][..smemBShuffle..]
-            // [..gmemC0..][..gmemC1..][..rowMax..][..sliceK..]
+            // [..gmemC0..][..gmemC1..][..rowMax..][..sliceK..][..per-token SF..][..bias..]
             //
 
+            if (mMmaKind == tg::MmaKind::Auto)
+            {
+                mMmaKind = dtypeGetMmaKind(dtypeMmaA, dtypeMmaB);
+            }
+
             std::vector<std::pair<int32_t, int32_t>> numBytesAndAlignmentPerSmemChunk;
             std::vector<bool> firstChunkReuseSmem;
             // Buffer names for inspection purposes.
@@ -172,7 +228,8 @@ public:
             // LoadA
             {
                 // Number of bytes in load A shared memory.
-                auto const numSmemBytesLoadA = numStages * tileM * tileK * tg::dtypeGetNumBits(dtypeElt) / 8 /* bits */;
+                auto const numSmemBytesLoadA
+                    = numStages * tileM * tileK * getNumSmemBitsPerElt(dtypeA, mMmaKind) / 8 /* bits */;
                 // Number of bytes for load A alignment for TMA load.
                 auto const numBytesAlignmentLoadA = 1024;
                 // loadA is already at first chunk. No need to reuse it.
@@ -187,7 +244,8 @@ public:
             // LoadB
             {
                 // Number of bytes in load B shared memory.
-                auto const numSmemBytesLoadB = numStages * tileN * tileK * tg::dtypeGetNumBits(dtypeElt) / 8 /* bits */;
+                auto const numSmemBytesLoadB
+                    = numStages * tileN * tileK * getNumSmemBitsPerElt(dtypeB, mMmaKind) / 8 /* bits */;
                 // Number of bytes for load B alignment for TMA load.
                 auto const numBytesAlignmentLoadB = 1024;
                 // No need to reuse the first chunk.
@@ -207,7 +265,7 @@ public:
             {
                 // Number of bytes in save shuffled B in shared memory.
                 auto const numSmemBytesLoadB = numSlicesForSliceK > 1
-                    ? numStages * tileN * tileK * tg::dtypeGetNumBits(dtypeElt) / 8 /* bits */
+                    ? numStages * tileN * tileK * getNumSmemBitsPerElt(dtypeB, mMmaKind) / 8 /* bits */
                     : 0;
                 // Number of bytes for load B alignment for TMA load.
                 auto const numBytesAlignmentLoadB = 1024;
@@ -313,6 +371,29 @@ public:
                 firstChunkReuseSmem.emplace_back(false);
             }
 
+            // Bias
+            {
+                int32_t numBytesSmemBias = 0;
+                if (isBiasTypeN(biasType))
+                {
+                    numBytesSmemBias = tileN * sizeof(float);
+                }
+                else if (isBiasTypeM(biasType))
+                {
+                    numBytesSmemBias = tileM * sizeof(float);
+                }
+                else if (isBiasTypeMn(biasType))
+                {
+                    numBytesSmemBias = tileM * tileN * sizeof(float);
+                }
+                // Number of bytes alignment for bias
+                auto const numBytesAlignmentBias = 16;
+                // Add info.
+                smemChunkNames.emplace_back("smemBias");
+                numBytesAndAlignmentPerSmemChunk.emplace_back(std::make_pair(numBytesSmemBias, numBytesAlignmentBias));
+                firstChunkReuseSmem.emplace_back(false);
+            }
+
             // Per-block absolute maximum for multi-warp reduction.
             {
                 // Number of bytes: number of epilogue warps * number of tile columns.
@@ -327,6 +408,25 @@ public:
                 firstChunkReuseSmem.emplace_back(false);
             }
 
+            // SmemConstSfBuf
+            // A buffer used to copy constant values to TMEM.
+            {
+                // Do we need the buffer?
+                bool const useConstSfBuf = dtypeB == tg::Dtype::E4m3 && dtypeMmaB == tg::Dtype::MxE4m3;
+                // Number of bytes for the buffer.
+                auto const numSmemBytesConstSfBuf = useConstSfBuf ? 512 : 0;
+                // Number of bytes for the alignment of the buffer.
+                auto const numBytesAlignmentConstSfBuf = 16;
+                // No need to reuse the first chunk.
+                auto const reuseChunksSmemConstSfBuf = false;
+
+                // Add info.
+                smemChunkNames.emplace_back("smemConstSfBuf");
+                numBytesAndAlignmentPerSmemChunk.emplace_back(
+                    std::make_pair(numSmemBytesConstSfBuf, numBytesAlignmentConstSfBuf));
+                firstChunkReuseSmem.emplace_back(reuseChunksSmemConstSfBuf);
+            }
+
             // Create SMEM helper object.
             mSmemAllocatorHelper
                 = MemAllocatorHelper(numBytesAndAlignmentPerSmemChunk, firstChunkReuseSmem, smemChunkNames);
@@ -370,10 +470,12 @@ public:
 
             // Matrix A
             {
+                // We use TMEM for A if we use slice-K or if we need to cast A.
+                bool const useTmemA = (numSlicesForSliceK > 1) || (dtypeMmaA != dtypeA);
                 // Number of columns for A.
-                auto const numTmemColsA = numSlicesForSliceK > 1 ? numStages * tileK
-                        / (numSlicesForSliceK * tg::dtypeGetNumBits(tg::Dtype::UInt32) / tg::dtypeGetNumBits(dtypeElt))
-                                                                 : 0;
+                auto const numTmemColsA = useTmemA ? numStages * tileK
+                        / (numSlicesForSliceK * tg::dtypeGetNumBits(tg::Dtype::UInt32) / tg::dtypeGetNumBits(dtypeMmaA))
+                                                   : 0;
                 // Number of columns for A alignment.
                 auto const numColsAlignmentA = 4;
                 // No need to reuse TMEM.
@@ -385,15 +487,18 @@ public:
                 firstChunkReuseTmem.emplace_back(reuseChunksTmemA);
             }
 
-            bool const useBlockScaling = tg::dtypeIsBlockFmt(dtypeElt);
-
             // Sf A
             {
+                // Does the MMA require block scales in TMEM for A?
+                bool const useBlockScalingA = tg::dtypeIsBlockFmt(dtypeMmaA);
+                // Are the block scales constant?
+                bool const useConstSfA = useBlockScalingA && !tg::dtypeIsBlockFmt(dtypeA);
                 // Number of columns for scaling factors of A.
-                auto const numTmemColsSfA
-                    = useBlockScaling ? ((tileK / 64) * 2 * tg::ceilDiv(tileM, 64)) * numStages : 0;
+                auto const numTmemColsSfA = useConstSfA
+                    ? tg::roundUp((tileK / 64) * 2 * tg::ceilDiv(tileM, 64), 4)
+                    : (useBlockScalingA ? ((tileK / 64) * 2 * tg::ceilDiv(tileM, 64)) * numStages : 0);
                 // Number of columns for Sf alignment.
-                auto const numColsAlignmentSfA = 2;
+                auto const numColsAlignmentSfA = 4;
                 // No need to reuse TMEM.
                 auto const reuseChunksTmemSfA = false;
 
@@ -405,11 +510,16 @@ public:
 
             // Sf B
             {
+                // Does the MMA require block scales in TMEM for B?
+                bool const useBlockScalingB = tg::dtypeIsBlockFmt(dtypeMmaB);
+                // Are the block scales constant?
+                bool const useConstSfB = useBlockScalingB && !tg::dtypeIsBlockFmt(dtypeB);
                 // Number of columns for scaling factors of B.
-                auto const numTmemColsSfB
-                    = useBlockScaling ? ((tileK / 64) * 2 * tg::ceilDiv(tileN, 64)) * numStages : 0;
+                auto const numTmemColsSfB = useConstSfB
+                    ? tg::roundUp((tileK / 64) * 2 * tg::ceilDiv(tileN, 64), 4)
+                    : (useBlockScalingB ? ((tileK / 64) * 2 * tg::ceilDiv(tileN, 64)) * numStages : 0);
                 // Number of columns for Sf alignment.
-                auto const numColsAlignmentSfB = 2;
+                auto const numColsAlignmentSfB = 4;
                 // No need to reuse TMEM.
                 auto const reuseChunksTmemSfB = false;
 
@@ -426,6 +536,8 @@ public:
     }
 
 public:
+    // The MMA kind.
+    tg::MmaKind mMmaKind;
     // Helper for SMEM allocation.
     MemAllocatorHelper mSmemAllocatorHelper;
     // Helper for TMEM allocation.
@@ -454,14 +566,14 @@ inline int32_t getTmemBufferSize(KernelTraits traits)
 
 inline int32_t getSmemOffsetLoadA(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(0);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemLoadA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetLoadB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(1);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemLoadB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -475,50 +587,63 @@ inline int32_t getSmemOffsetLoadAb(KernelTraits traits)
 
 inline int32_t getSmemOffsetLoadShuffleB(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(2);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBShuffle");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetGmemC(KernelTraits traits, int resIdx = 0)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(3 + resIdx);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemGmemC" + std::to_string(resIdx));
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetRowMax(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(5);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemRowMax");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetSliceK(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(6);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemSliceK");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetPerTokenSf(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(7);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemPerTokenSf");
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+inline int32_t getSmemOffsetBias(KernelTraits traits)
+{
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBias");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getSmemOffsetBlockAmax(KernelTraits traits)
 {
-    return traits.mSmemAllocatorHelper.getChunkOffset(8);
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemBlockAmax");
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+inline int32_t getSmemOffsetConstSfBuf(KernelTraits traits)
+{
+    return traits.mSmemAllocatorHelper.getChunkOffsetByName("smemConstSfBuf");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t isSmemAbRepurposedToGmemC(KernelTraits traits, int resIdx = 0)
 {
-    // Be conscious that the index (3 + resIdx) should match the index in getSmemOffsetGmemC().
-    return traits.mSmemAllocatorHelper.getFirstChunkReuseFlag(3 + resIdx);
+    return traits.mSmemAllocatorHelper.getFirstChunkReuseFlagByName("smemGmemC" + std::to_string(resIdx));
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -529,30 +654,32 @@ inline int32_t isSmemAbRepurposedToGmemC(KernelTraits traits, int resIdx = 0)
 
 inline int32_t getTmemOffsetD(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(0);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemD");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetA(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(1);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetSfA(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(2);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemSfA");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 inline int32_t getTmemOffsetSfB(KernelTraits traits)
 {
-    return traits.mTmemAllocatorHelper.getChunkOffset(3);
+    return traits.mTmemAllocatorHelper.getChunkOffsetByName("tmemSfB");
 }
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 } // namespace gemm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/TmaDescriptor.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/TmaDescriptor.h
index 8d26c4b972..159169e4a8 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/TmaDescriptor.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/TmaDescriptor.h
@@ -17,6 +17,7 @@
 #pragma once
 
 #include "trtllm/gen/DtypeDecl.h"
+#include "trtllm/gen/MmaDecl.h"
 #include <iostream>
 
 #ifdef TLLM_ENABLE_CUDA
@@ -25,6 +26,9 @@
 #include <cutlass/half.h>
 #endif
 
+namespace gemmGatedAct
+{
+
 namespace gemm
 {
 
@@ -36,13 +40,15 @@ namespace tg = trtllm::gen;
 
 #ifdef TLLM_ENABLE_CUDA
 
-inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> const& shapes,
-    std::vector<uint64_t> const& strides, int32_t tileSizeMn, int32_t tileSizeK, void* gmemAddr, bool doSwizzle = true)
+inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, tg::MmaKind mmaKind, std::vector<uint64_t> const& shapes,
+    std::vector<uint64_t> const& strides, std::vector<int32_t> const& tileShapes, void* gmemAddr, bool doSwizzle = true)
 {
+    // The multiplication factor of the data padding in SMEM.
+    int32_t padMultiplier = 1;
     CUtensorMap desc{};
     // The data type.
     CUtensorMapDataType tmaDataFormat{CU_TENSOR_MAP_DATA_TYPE_FLOAT32};
-    if (dtype == tg::Dtype::E4m3 || dtype == tg::Dtype::MxE4m3)
+    if (dtype == tg::Dtype::E4m3 || dtype == tg::Dtype::MxE4m3 || dtype == tg::Dtype::UE8m0)
     {
         tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_UINT8;
     }
@@ -58,36 +64,56 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
     {
         tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN8B;
     }
+    else if (dtype == tg::Dtype::MxE2m1)
+    {
+        if (mmaKind == tg::MmaKind::MxFp8Fp6Fp4)
+        {
+            padMultiplier = 2;
+            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN16B;
+        }
+        else
+        {
+            // Note: this is used with the MMA kind MxFp4NvFp4 and also when casting to a higher-precision
+            // type such as Bfloat16 before the MMA.
+            tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_16U4_ALIGN8B;
+        }
+    }
     else if (dtype == tg::Dtype::Fp32)
     {
         tmaDataFormat = CU_TENSOR_MAP_DATA_TYPE_FLOAT32;
     }
     else
     {
-        std::cerr << "buildNdTmaDescriptor: unexpected dtype " << static_cast<int32_t>(dtype) << std::endl;
+        std::cerr << "buildNdTmaDescriptor: unexpected dtype " << tg::dtypeToString(dtype) << std::endl;
         assert(false);
     }
 
     // The swizzle type.
     CUtensorMapSwizzle swizzleType{CU_TENSOR_MAP_SWIZZLE_NONE};
-    int32_t tileKSizeInBytes = (tileSizeK * tg::dtypeGetNumBits(dtype)) / /* bits */ 8;
+    int32_t fastestDimTileSizeBytes = (tileShapes[0] * tg::dtypeGetNumBits(dtype) * padMultiplier) / /* bits */ 8;
     if (doSwizzle)
     {
-        if ((tileKSizeInBytes % 128) == 0)
+        if ((fastestDimTileSizeBytes % 128) == 0)
         {
             swizzleType = CU_TENSOR_MAP_SWIZZLE_128B;
         }
-        else if ((tileKSizeInBytes % 64) == 0)
+        else if ((fastestDimTileSizeBytes % 64) == 0)
         {
             swizzleType = CU_TENSOR_MAP_SWIZZLE_64B;
         }
-        else if ((tileKSizeInBytes % 32) == 0)
+        else if ((fastestDimTileSizeBytes % 32) == 0)
         {
             swizzleType = CU_TENSOR_MAP_SWIZZLE_32B;
+            // This path is only for the scaling factors.
+        }
+        else if ((fastestDimTileSizeBytes % 16) == 0 && (dtype == tg::Dtype::UE8m0 || dtype == tg::Dtype::E4m3))
+        {
+            swizzleType = CU_TENSOR_MAP_SWIZZLE_NONE;
         }
         else
         {
-            std::cerr << "buildNdTmaDescriptor: unexpected tileKSizeInBytes " << tileKSizeInBytes << std::endl;
+            std::cerr << "buildNdTmaDescriptor: unexpected fastestDimTileSizeBytes " << fastestDimTileSizeBytes
+                      << std::endl;
             assert(false);
         }
     }
@@ -97,8 +123,9 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
 
     // Check shape must be in range [1, 2^32]
     int32_t dim = shapes.size();
-    // Expect 2 dimensions.
-    assert(dim == 2 || dim == 3);
+    // Expect 2 dimensions for regular gemm, 3 dimensions for batched gemm or blocked layout, and 4
+    // dimensions for batched gemm with blocked layout.
+    assert(dim == 2 || dim == 3 || dim == 4);
     // Check shape range.
     for (int32_t ii = 0; ii < dim; ++ii)
     {
@@ -119,63 +146,78 @@ inline CUtensorMap buildNdTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
     }
 
     // Set the number of elements in the packed uint32_t element.
-    auto const numEltsPerUInt32 = 4 * /* bits */ 8 / tg::dtypeGetNumBits(dtype);
+    auto const numEltsPerUInt32 = 4 * /* bits */ 8 / (tg::dtypeGetNumBits(dtype) * padMultiplier);
     // The number of elements in 128B.
     auto const numEltsIn128B = numEltsPerUInt32 /*4B*/ * 32;
     // The number of tile K hidden size (per token) in each block of shared memory.
-    auto const numEltsInClampedTileKSize = std::min(numEltsIn128B, tileSizeK);
+    auto const numEltsInClampedFastestTileSize = std::min(numEltsIn128B, tileShapes[0]);
 
-    // Build tile shapes.
-    std::vector<uint32_t> tileShapes(dim, 1);
-    tileShapes[0] = numEltsInClampedTileKSize; // tileSizeK
-    tileShapes[1] = tileSizeMn;                // tileSizeMn
+    // Build box dim array. If tileShapes is smaller than dim, just fill with 1s.
+    assert(static_cast<int32_t>(tileShapes.size()) <= dim);
+    std::vector<uint32_t> boxDim(dim, 1);
+    boxDim[0] = numEltsInClampedFastestTileSize;
+    for (size_t ii = 1; ii < tileShapes.size(); ++ii)
+    {
+        if (tileShapes[ii] > 256)
+        {
+            std::cerr << "buildNdTmaDescriptor: boxDim too large " << tileShapes[ii] << std::endl;
+            assert(false);
+        }
+        else
+        {
+            boxDim[ii] = tileShapes[ii];
+        }
+    }
 
     // Set tile strides to 1;
     std::vector<uint32_t> tileStrides(dim, 1);
 
     // Build the descriptor.
     CUresult result = cuTensorMapEncodeTiled(&desc, tmaDataFormat,
-        /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), tileShapes.data(), tileStrides.data(),
+        /*tensorRank=*/dim, gmemAddr, shapes.data(), stridesInBytes.data(), boxDim.data(), tileStrides.data(),
         /*interleave=*/CU_TENSOR_MAP_INTERLEAVE_NONE, swizzleType,
         /*l2Promotion=*/CU_TENSOR_MAP_L2_PROMOTION_L2_128B,
         /*oobFill=*/CU_TENSOR_MAP_FLOAT_OOB_FILL_NONE);
 
     if (result != CUDA_SUCCESS)
     {
-        std::cerr << "Error: Failed to initialize the TMA descriptor " << result << std::endl;
+        char const* errorString;
+        cuGetErrorString(result, &errorString);
+        std::stringstream ss;
+        ss << "Error: Failed to initialize the TMA descriptor " << result << std::endl;
 
-        std::cerr << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr
-                  << std::endl;
+        ss << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr << std::endl;
 
-        std::cerr << "Shape: ";
+        ss << "Shape: ";
         for (int ii = 0; ii < dim; ++ii)
         {
-            std::cerr << shapes[ii] << " ";
+            ss << shapes[ii] << " ";
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "Stride: ";
+        ss << "Stride: ";
         for (int ii = 0; ii < dim - 1; ++ii)
         {
-            std::cerr << stridesInBytes[ii] << " ";
+            ss << stridesInBytes[ii] << " ";
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileShapes: ";
+        ss << "tileShapes: ";
         for (int ii = 0; ii < dim; ++ii)
         {
-            std::cerr << tileShapes[ii] << " ";
+            ss << boxDim[ii] << " ";
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileStrides: ";
+        ss << "tileStrides: ";
         for (int ii = 0; ii < dim; ++ii)
         {
-            std::cerr << tileStrides[ii] << " ";
+            ss << tileStrides[ii] << " ";
         }
-        std::cerr << std::endl;
-        std::cerr << "swizzleType: " << int(swizzleType) << std::endl;
-        assert(false);
+        ss << std::endl;
+        ss << "swizzleType: " << int(swizzleType) << std::endl;
+        ss << "(in " << __FILE__ << ":" << __LINE__ << ")" << std::endl;
+        throw std::runtime_error(ss.str());
     }
 
     return desc;
@@ -193,7 +235,7 @@ inline CUtensorMap buildSfTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
     }
     else
     {
-        std::cerr << "buildSfTmaDescriptor: unexpected dtype " << static_cast<int32_t>(dtype) << std::endl;
+        std::cerr << "buildSfTmaDescriptor: unexpected dtype " << tg::dtypeToString(dtype) << std::endl;
         assert(false);
     }
 
@@ -243,41 +285,44 @@ inline CUtensorMap buildSfTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
 
     if (result != CUDA_SUCCESS)
     {
-        std::cerr << "Error: Failed to initialize the TMA descriptor for SF " << result << std::endl;
+        char const* errorString;
+        cuGetErrorString(result, &errorString);
+        std::stringstream ss;
+        ss << "Error: Failed to initialize the TMA descriptor for SF " << errorString << std::endl;
 
-        std::cerr << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr
-                  << std::endl;
+        ss << "tmaFormat: " << static_cast<int>(tmaDataFormat) << " dim: " << dim << " gmem: " << gmemAddr << std::endl;
 
-        std::cerr << "shape:";
+        ss << "shape:";
         for (uint32_t shape_i : shapes)
         {
-            std::cerr << " " << shape_i;
+            ss << " " << shape_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "stridesInBytes:";
+        ss << "stridesInBytes:";
         for (uint32_t stride_i : stridesInBytes)
         {
-            std::cerr << " " << stride_i;
+            ss << " " << stride_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileShapes:";
+        ss << "tileShapes:";
         for (uint32_t tileShape_i : tileShapes)
         {
-            std::cerr << " " << tileShape_i;
+            ss << " " << tileShape_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "tileStrides:";
+        ss << "tileStrides:";
         for (uint32_t tileStride_i : tileStrides)
         {
-            std::cerr << " " << tileStride_i;
+            ss << " " << tileStride_i;
         }
-        std::cerr << std::endl;
+        ss << std::endl;
 
-        std::cerr << "swizzleType: " << int(swizzleType) << std::endl;
-        assert(false);
+        ss << "swizzleType: " << int(swizzleType) << std::endl;
+        ss << "(in " << __FILE__ << ":" << __LINE__ << ")" << std::endl;
+        throw std::runtime_error(ss.str());
     }
 
     return desc;
@@ -288,3 +333,5 @@ inline CUtensorMap buildSfTmaDescriptor(tg::Dtype dtype, std::vector<uint64_t> c
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
 } // namespace gemm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
new file mode 100644
index 0000000000..03bd577f3b
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/cubins/GemmGatedActKernel_Bfloat16_E2m1E2m1_Fp32_t128x128x256_s3_et128x64_m128x128x64_cga1x1x1_16dp256b_TN_transOut_schedS_swiGlu_sm100a_cubin.cpp
@@ -0,0 +1,3 @@
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diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CommonUtils.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CommonUtils.h
index 0efa93faf5..680f22271a 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CommonUtils.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CommonUtils.h
@@ -16,6 +16,9 @@
  */
 #pragma once
 
+namespace gemmGatedAct
+{
+
 namespace trtllm
 {
 namespace gen
@@ -41,3 +44,5 @@ inline T roundUp(T m, T n)
 
 } // namespace gen
 } // namespace trtllm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CudaKernelLauncher.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CudaKernelLauncher.h
index 5d31c37411..60e07c6fce 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CudaKernelLauncher.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/CudaKernelLauncher.h
@@ -22,6 +22,9 @@
 #include <cuda.h>
 #include <cuda_runtime_api.h>
 #endif
+namespace gemmGatedAct
+{
+
 namespace trtllm
 {
 namespace gen
@@ -89,3 +92,5 @@ inline CUresult launchKernel(void* kernelParams, void* cudaStream, int32_t smemS
 
 } // namespace gen
 } // namespace trtllm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/DtypeDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/DtypeDecl.h
index a6892f12ca..ce0670f9e7 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/DtypeDecl.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/DtypeDecl.h
@@ -20,6 +20,11 @@
 #include <cstdint>
 #include <string>
 #include <vector>
+#ifndef TLLM_GEN_EXPORT_INTERFACE
+#include "trtllm/gen/MmaDecl.h"
+#else
+#include "MmaDecl.h"
+#endif
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //
@@ -28,6 +33,9 @@
 //
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+namespace gemmGatedAct
+{
+
 namespace trtllm
 {
 namespace gen
@@ -55,26 +63,25 @@ enum class Dtype : uint32_t
     // clang-format off
   Bfloat16 = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/  16u, /*uid*/  0u),
   Bool     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/   1u, /*uid*/  1u),
-  PadType  = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/   8u, /*uid*/  2u),
-  E2m1     = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   4u, /*uid*/  3u),
-  E2m3     = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   6u, /*uid*/  4u),
-  E3m2     = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   6u, /*uid*/  5u),
-  E4m3     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   8u, /*uid*/  6u),
-  E5m2     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   8u, /*uid*/  7u),
-  Fp16     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/  16u, /*uid*/  8u),
-  Fp32     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/  32u, /*uid*/  9u),
-  Int8     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/   8u, /*uid*/ 10u),
-  Int32    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/  32u, /*uid*/ 11u),
-  Int64    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/  64u, /*uid*/ 12u),
-  MxE2m1   = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   4u, /*uid*/ 13u),
-  MxE4m3   = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   8u, /*uid*/ 14u),
-  UE8m0    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 0u, /*bits*/   8u, /*uid*/ 15u),
-  UInt8    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/   8u, /*uid*/ 16u),
-  UInt16   = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/  16u, /*uid*/ 17u),
-  UInt32   = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/  32u, /*uid*/ 18u),
-  UInt64   = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/  64u, /*uid*/ 19u),
-  UInt128  = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/ 128u, /*uid*/ 20u),
-  Void     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   0u, /*uid*/ 21u),
+  E2m1     = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   4u, /*uid*/  2u),
+  E2m3     = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   6u, /*uid*/  3u),
+  E3m2     = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   6u, /*uid*/  4u),
+  E4m3     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   8u, /*uid*/  5u),
+  E5m2     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   8u, /*uid*/  6u),
+  Fp16     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/  16u, /*uid*/  7u),
+  Fp32     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/  32u, /*uid*/  8u),
+  Int8     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/   8u, /*uid*/  9u),
+  Int32    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/  32u, /*uid*/ 10u),
+  Int64    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 1u, /*bits*/  64u, /*uid*/ 11u),
+  MxE2m1   = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   4u, /*uid*/ 12u),
+  MxE4m3   = TLLM_ENCODE_DTYPE(/*block*/ 1u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   8u, /*uid*/ 13u),
+  UE8m0    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 0u, /*bits*/   8u, /*uid*/ 14u),
+  UInt8    = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/   8u, /*uid*/ 15u),
+  UInt16   = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/  16u, /*uid*/ 16u),
+  UInt32   = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/  32u, /*uid*/ 17u),
+  UInt64   = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/  64u, /*uid*/ 18u),
+  UInt128  = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 0u, /*int*/ 1u, /*bits*/ 128u, /*uid*/ 19u),
+  Void     = TLLM_ENCODE_DTYPE(/*block*/ 0u, /*signed*/ 1u, /*int*/ 0u, /*bits*/   0u, /*uid*/ 20u),
 // clang-format on
 
 #undef TLLM_ENCODE_DTYPE
@@ -153,6 +160,7 @@ inline std::string dtypeToString(Dtype dtype)
     case Dtype::Int32: return "Int32";
     case Dtype::Int64: return "Int64";
     case Dtype::MxE4m3: return "MxE4m3";
+    case Dtype::MxE2m1: return "MxE2m1";
     case Dtype::UE8m0: return "UE8m0";
     case Dtype::UInt8: return "UInt8";
     case Dtype::UInt16: return "UInt16";
@@ -205,5 +213,50 @@ inline Dtype dtypeGetBlockSfType(Dtype dtype)
 
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+inline MmaKind dtypeGetMmaKind(Dtype dtypeA, Dtype dtypeB)
+{
+    auto dtypeEltA = dtypeEltType(dtypeA);
+    auto dtypeEltB = dtypeEltType(dtypeB);
+
+    // Note: the order of the conditions is important here.
+    if ((dtypeA == Dtype::Fp16 && dtypeB == Dtype::Fp16) || (dtypeA == Dtype::Bfloat16 && dtypeB == Dtype::Bfloat16))
+    {
+        return MmaKind::Fp16;
+    }
+
+    if ((dtypeA == Dtype::Int8 || dtypeA == Dtype::UInt8) && (dtypeB == Dtype::Int8 || dtypeB == Dtype::UInt8))
+    {
+        return MmaKind::Int8;
+    }
+
+    // This statement captures both MxE2m1 and E2m1.
+    if (dtypeEltA == Dtype::E2m1 && dtypeEltB == Dtype::E2m1)
+    {
+        return MmaKind::MxFp4NvFp4;
+    }
+
+    if ((dtypeA == Dtype::E4m3 || dtypeA == Dtype::E5m2 || dtypeA == Dtype::E2m3 || dtypeA == Dtype::E3m2
+            || dtypeA == Dtype::E2m1)
+        && (dtypeB == Dtype::E4m3 || dtypeB == Dtype::E5m2 || dtypeB == Dtype::E2m3 || dtypeB == Dtype::E3m2
+            || dtypeB == Dtype::E2m1))
+    {
+        return MmaKind::Fp8Fp6Fp4;
+    }
+
+    // At this point we know that both dtypes are Mx types and not both MxE2m1 at the same time.
+    if ((dtypeEltA == Dtype::E4m3 || dtypeEltA == Dtype::E5m2 || dtypeEltA == Dtype::E2m3 || dtypeEltA == Dtype::E3m2
+            || dtypeEltA == Dtype::E2m1)
+        && (dtypeEltB == Dtype::E4m3 || dtypeEltB == Dtype::E5m2 || dtypeEltB == Dtype::E2m3 || dtypeEltB == Dtype::E3m2
+            || dtypeEltB == Dtype::E2m1))
+    {
+        return MmaKind::MxFp8Fp6Fp4;
+    }
+    return MmaKind::Tf32;
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
 } // namespace gen
 } // namespace trtllm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/MmaDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/MmaDecl.h
new file mode 100644
index 0000000000..f3822f89fa
--- /dev/null
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/MmaDecl.h
@@ -0,0 +1,90 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2025 NVIDIA CORPORATION &
+ * AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#pragma once
+
+namespace gemmGatedAct
+{
+
+namespace trtllm
+{
+namespace gen
+{
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// The kind of the MMA instruction
+enum class MmaKind : uint32_t
+{
+    // For Blackwell this follows the PTX ISA description of the MMA instructions.
+    // https://docs.nvidia.com/cuda/parallel-thread-execution/#tcgen05-kind-shapes
+
+    // The MMA type is auto-detected from the dtypes of the input tensors
+    Auto = 0,
+    // Supports dtypeA = dtypeB = Fp16 and dtypeD = [Fp16, Fp32]
+    // or dtypeA = dtypeB = Bfloat16 and dtypeD = [Fp32]
+    // Corresponds to the kind::f16 of tcgen05.mma.
+    Fp16 = 1,
+    // Supports dtypeA/B = [E4m3, E5m2, E2m3, E3m2, E2m1] and dtypeD = [Fp16, Fp32]
+    // Corresponds to the kind::f8f6f4 of tcgen05.mma.
+    Fp8Fp6Fp4 = 2,
+    // Supports dtypeA = dtypeB = [Int8, Uint8] and dtypeD = [Int32]
+    // Corresponds to the kind::i8 of tcgen05.mma.
+    Int8 = 3,
+    // Supports dtypeA = dtypeB = [MxE2m1, E2m1] with block scale [UM8e0, UEm4e3]
+    // and dtypeD = [Fp32]
+    // Corresponds to the kind::mxf4nvf4 of tcgen05.mma.
+    MxFp4NvFp4 = 4,
+    // Supports dtype dtypeA = dtypeB = [MxE4m3, MxE2m1] with block scale [UM8e0]
+    // and dtypeD = [Fp32]
+    // Corresponds to the kind::mxf8f6f4 of tcgen05.mma.
+    MxFp8Fp6Fp4 = 5,
+    // Supports dtypeA = dtypeB = Tf32 with dtypeD = [Fp32]
+    // Corresponds to the kind::tf32 of tcgen05.mma.
+    Tf32 = 6
+};
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+inline bool mmaKindIsBlockFmt(MmaKind mmaKind)
+{
+    return mmaKind == MmaKind::MxFp8Fp6Fp4 || mmaKind == MmaKind::MxFp4NvFp4;
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+// For logging and error reporting
+inline std::string mmaKindToString(MmaKind mmaKind)
+{
+    switch (mmaKind)
+    {
+    case MmaKind::Auto: return "Auto";
+    case MmaKind::Fp16: return "Fp16";
+    case MmaKind::Fp8Fp6Fp4: return "Fp8Fp6Fp4";
+    case MmaKind::Int8: return "Int8";
+    case MmaKind::MxFp4NvFp4: return "MxFp4NvFp4";
+    case MmaKind::MxFp8Fp6Fp4: return "MxFp8Fp6Fp4";
+    case MmaKind::Tf32: return "Tf32";
+    default: assert(false); return "Unsupported type";
+    }
+}
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+} // namespace gen
+} // namespace trtllm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/SfLayoutDecl.h b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/SfLayoutDecl.h
index f86c383259..9dca3cce24 100644
--- a/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/SfLayoutDecl.h
+++ b/cpp/tensorrt_llm/kernels/trtllmGenKernels/gemmGatedAct/trtllmGen_gatedAct_export/trtllm/gen/SfLayoutDecl.h
@@ -26,6 +26,9 @@
 //
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
+namespace gemmGatedAct
+{
+
 namespace trtllm
 {
 namespace gen
@@ -89,3 +92,5 @@ inline std::string sfLayoutToString(SfLayout layout)
 
 } // namespace gen
 } // namespace trtllm
+
+} // namespace gemmGatedAct
diff --git a/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp b/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp
index b64f9b7111..32631b1f5e 100644
--- a/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp
+++ b/cpp/tensorrt_llm/thop/fp8BlockScalingGemm.cpp
@@ -205,6 +205,7 @@ extern torch::Tensor fp8_block_scaling_gemm(torch::Tensor const& mat1, torch::Te
     auto const sm = tensorrt_llm::common::getSMVersion();
     switch (sm)
     {
+    case 103: return fp8_block_scale_gemm_blackwell(mat1, mat2, mat1Scale, mat2Scale);
     case 100: return fp8_block_scale_gemm_blackwell(mat1, mat2, mat1Scale, mat2Scale);
     case 90: return fp8_block_scaling_gemm_hopper(mat1, mat2, mat1Scale, mat2Scale);
     case 89: return fp8_block_scaling_gemm_ada(mat1, mat2, mat1Scale, mat2Scale);
diff --git a/cpp/tensorrt_llm/thop/fp8PerTensorScalingTrtllmGenGemm.cpp b/cpp/tensorrt_llm/thop/fp8PerTensorScalingTrtllmGenGemm.cpp
index f0fd52868f..169970a037 100644
--- a/cpp/tensorrt_llm/thop/fp8PerTensorScalingTrtllmGenGemm.cpp
+++ b/cpp/tensorrt_llm/thop/fp8PerTensorScalingTrtllmGenGemm.cpp
@@ -53,11 +53,11 @@ void runGemm(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2, at
         stream.stream(), mat1.get_device());
 }
 
-template <trtllm::gen::Dtype outDtype>
+template <gemmGatedAct::trtllm::gen::Dtype outDtype>
 void runGemmGatedAct(at::Tensor& out, at::Tensor const& mat1, at::Tensor const& mat2, at::Tensor const& globalScale,
     at::Tensor const& globalScaleGate, int64_t m, int64_t n, int64_t k, bool lowLatencyKernel)
 {
-    auto eltType = trtllm::gen::Dtype::E4m3;
+    auto eltType = gemmGatedAct::trtllm::gen::Dtype::E4m3;
 
     tensorrt_llm::kernels::TrtllmGenGemmGatedActRunnerOptions options
         = {.eltType = eltType, .outputType = outDtype, .deepSeekFp8 = false, .transposeMmaOutput = lowLatencyKernel};
@@ -117,15 +117,15 @@ torch::Tensor fp8_per_tensor_scaling_tllmg_gemm_impl(torch::Tensor const& mat1,
         switch (outDtype.value())
         {
         case at::ScalarType::Half:
-            runGemmGatedAct<trtllm::gen::Dtype::Fp16>(
+            runGemmGatedAct<gemmGatedAct::trtllm::gen::Dtype::Fp16>(
                 out, mat1, mat2, globalScale, globalScaleGate.value(), m, n, k, lowLatencyKernel);
             break;
         case at::ScalarType::BFloat16:
-            runGemmGatedAct<trtllm::gen::Dtype::Bfloat16>(
+            runGemmGatedAct<gemmGatedAct::trtllm::gen::Dtype::Bfloat16>(
                 out, mat1, mat2, globalScale, globalScaleGate.value(), m, n, k, lowLatencyKernel);
             break;
         case at::ScalarType::Float8_e4m3fn:
-            runGemmGatedAct<trtllm::gen::Dtype::E4m3>(
+            runGemmGatedAct<gemmGatedAct::trtllm::gen::Dtype::E4m3>(
                 out, mat1, mat2, globalScale, globalScaleGate.value(), m, n, k, lowLatencyKernel);
             break;
         default: C10_THROW_ERROR(NotImplementedError, "outDtype must be one of fp16/bf16/e4m3.");