Gabriel Wu
|
2e0cd7922e
|
fix: add SM90 guard for FP8 Blockscale GEMM (#3575)
* fix: add SM90 guard for FP8 Blockscale GEMM
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
* fix: add SM90 guard for FP8 Blockscale GEMM
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
---------
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
Co-authored-by: Tao Li @ NVIDIA <tali@nvidia.com>
|
2025-04-16 14:44:37 +08:00 |
|
Gabriel Wu
|
4d78f51608
|
fix: remove DeepGEMM line info (#3411)
Signed-off-by: Zihua Wu <13583761+lucifer1004@users.noreply.github.com>
|
2025-04-09 18:01:02 +08:00 |
|
Gabriel Wu
|
376731013d
|
feat: use NVRTC for DeepGEMM JIT compilation (#3239)
* feat: use NVRTC for DeepGEMM JIT compilation
Signed-off-by: Zihua Wu
* fix: add license
Signed-off-by: Zihua Wu
* feat: store NVRTC JIT results in memory by default
Signed-off-by: Zihua Wu
* feat: refinement
Signed-off-by: Zihua Wu
* feat: refinement
Signed-off-by: Zihua Wu
* test: set timeout to 7200
Signed-off-by: Zihua Wu
---------
Signed-off-by: Zihua Wu
|
2025-04-07 20:29:23 +08:00 |
|
Gabriel Wu
|
05b50b297f
|
[feat] open source fp8_blockscale_gemm (#3071)
Signed-off-by: Zihua Wu <zihuaw@nvidia.com>
|
2025-04-02 12:12:52 +08:00 |
|
Kaiyu Xie
|
3aa6b11d13
|
Update TensorRT-LLM (#2936)
* Update TensorRT-LLM
---------
Co-authored-by: changcui <cuichang147@gmail.com>
|
2025-03-18 21:25:19 +08:00 |
|