mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
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73 lines
2.4 KiB
C++
73 lines
2.4 KiB
C++
/*
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* Copyright (c) 2019-2024, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2021, NAVER Corp. Authored by CLOVA.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include "tensorrt_llm/layers/baseLayer.h"
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#include "tensorrt_llm/runtime/common.h"
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namespace tensorrt_llm::layers
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{
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//! \brief Layer to randomly sample tokens from TopP logits.
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//! Layer expects probs precomputed in "logits" tensor
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template <typename T>
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class TopPSamplingLayer : public BaseLayer
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{
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using Base = BaseLayer;
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public:
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TopPSamplingLayer(DecoderDomain const& decoderDomain, std::shared_ptr<runtime::BufferManager> bufferManager,
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bool isDeterministic = true, bool isAirTopP = true);
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void setup(runtime::SizeType32 batchSize, runtime::SizeType32 beamWidth, TensorConstPtr batchSlots,
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std::shared_ptr<BaseSetupParams> const& setupParams,
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std::shared_ptr<runtime::DecodingLayerWorkspace> const& workspace) override;
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void forwardAsync(std::shared_ptr<BaseDecodingOutputs> const& outputs,
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std::shared_ptr<BaseDecodingInputs> const& inputs,
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std::shared_ptr<runtime::DecodingLayerWorkspace> const& workspace) override;
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//! @returns workspace needed for this layer in bytes
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[[nodiscard]] size_t getWorkspaceSize() const noexcept override;
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protected:
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TensorPtr mRuntimeTopKDevice;
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TensorPtr mRuntimeTopPDevice;
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TensorPtr mInitialTopPDevice;
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TensorPtr mTopPDecayDevice;
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TensorPtr mTopPMinDevice;
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TensorPtr mTopPResetIdsDevice;
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TensorPtr mSkipDecodeDevice;
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TensorPtr mSkipDecodeHost;
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size_t mWorkspaceSize{0};
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size_t mSetupWorkspaceSize{0};
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// AirTopP
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cudaDeviceProp mDeviceProp;
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runtime::SizeType32 mAirTopPBlockNum{0};
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bool mIsDeterministic{true};
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bool mIsAirTopP{false};
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using Base::mDecoderDomain;
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private:
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void allocateBuffer(runtime::SizeType32 batchSize);
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};
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} // namespace tensorrt_llm::layers
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