TensorRT-LLMs/cpp/tensorrt_llm/kernels/dsv3MinLatencyKernels
Zhenhuan Chen 34fbc7052c [https://nvbugs/5545522][fix] move PREEXIT in UB kernels to fix accuracy issue (#8318)
Signed-off-by: Zhenhuan Chen <zhenhuanc@nvidia.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
2025-11-04 16:42:31 +08:00
..
CMakeLists.txt Feat/ds r1 min latency opt round3, add router gemm, fused a gemm, PDL (#4560) 2025-06-14 17:36:22 +08:00
dsv3FusedAGemm.cu [https://nvbugs/5545522][fix] move PREEXIT in UB kernels to fix accuracy issue (#8318) 2025-11-04 16:42:31 +08:00
dsv3FusedAGemm.h Feat/ds r1 min latency opt round3, add router gemm, fused a gemm, PDL (#4560) 2025-06-14 17:36:22 +08:00
dsv3RouterGemm.cu Feat/ds r1 min latency opt round3, add router gemm, fused a gemm, PDL (#4560) 2025-06-14 17:36:22 +08:00
dsv3RouterGemm.h Feat/ds r1 min latency opt round3, add router gemm, fused a gemm, PDL (#4560) 2025-06-14 17:36:22 +08:00