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https://github.com/NVIDIA/TensorRT-LLM.git
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63 lines
2.8 KiB
C++
63 lines
2.8 KiB
C++
/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* Common utils to be shared between Precompiled and JIT implementation.
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*/
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#include "tensorrt_llm/kernels/decoderMaskedMultiheadAttention/decoderXQAImplCommon.h"
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namespace tensorrt_llm::kernels
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{
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uint32_t getKernelMTileSize(
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uint32_t headGrpSize, bool isSpecDec, uint32_t qSeqLen, bool isXqaJit, bool supportQGMMA, bool supportMLA)
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{
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if (!isSpecDec)
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{
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return headGrpSize;
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}
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if (isXqaJit && (supportQGMMA || supportMLA)) // HMMA (mha.cu) goes to the heuristic below
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{
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return 64;
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}
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uint32_t const gemmM = qSeqLen * headGrpSize;
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return gemmM < 16 ? 16 : 32;
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}
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XQAKernelRuntimeHashKey getRuntimeHashKeyFromXQAParams(XQAParams const& xqaParams, bool isXqaJit, int SM)
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{
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unsigned int head_size = xqaParams.head_size;
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unsigned int num_q_heads = xqaParams.num_q_heads;
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unsigned int num_kv_heads = xqaParams.num_kv_heads;
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TLLM_CHECK_WITH_INFO(num_q_heads % num_kv_heads == 0, "numQHeads should be multiple of numKVHeads.");
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unsigned int num_q_heads_over_kv = num_q_heads / num_kv_heads;
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unsigned int beam_width = xqaParams.beam_width;
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unsigned int qSeqLen = static_cast<unsigned int>(xqaParams.generation_input_length);
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// MultiQueryToken kernels can support any num_q_heads_over_kv that is power of 2.
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unsigned int kernel_num_q_heads_over_kv = xqaParams.multi_query_tokens ? 0 : num_q_heads_over_kv;
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bool supportQGMMA = jit::supportConfigQGMMA(xqaParams, SM, true);
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bool supportMLA = jit::supportConfigMLA(xqaParams, SM, true);
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unsigned int kernel_m_tilesize = getKernelMTileSize(
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num_q_heads_over_kv, xqaParams.multi_query_tokens, qSeqLen, isXqaJit, supportQGMMA, supportMLA);
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// precompiled XQA does not use is_fp8_output as hashing key
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return {xqaParams.kv_cache_data_type, head_size, beam_width, kernel_num_q_heads_over_kv, kernel_m_tilesize,
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xqaParams.paged_kv_cache ? static_cast<unsigned int>(xqaParams.tokens_per_block) : 0, xqaParams.paged_kv_cache,
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xqaParams.multi_query_tokens, isXqaJit ? xqaParams.is_fp8_output : false,
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isXqaJit ? std::optional(xqaParams.position_embedding_type) : std::nullopt};
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}
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} // namespace tensorrt_llm::kernels
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