mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
synced 2026-01-14 06:27:45 +08:00
191 lines
8.9 KiB
C++
191 lines
8.9 KiB
C++
/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "tensorrt_llm/common/cudaUtils.h"
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#include "tensorrt_llm/kernels/internal_cutlass_kernels/include/fp8_blockscale_gemm.h"
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#include "tensorrt_llm/kernels/trtllmGenKernels/blockscaleGemm/kernelRunner.h"
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#include "tensorrt_llm/thop/thUtils.h"
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#include <ATen/cuda/EmptyTensor.h>
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#include <optional>
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using namespace tensorrt_llm::kernels::small_m_gemm;
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using namespace tensorrt_llm::kernels;
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namespace torch_ext
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{
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using Fp8BlockScaleGemmRunnerPtr
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= std::unique_ptr<tensorrt_llm::kernels::small_m_gemm::CutlassFp8BlockScaleGemmRunnerInterface>;
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namespace
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{
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void check_input_dtypes(torch::Tensor mat, std::optional<torch::Tensor> matScale)
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{
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TORCH_CHECK(matScale.has_value(), "matrix scale must be provided for FP8 matrix");
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CHECK_INPUT((*matScale), FP8_BLOCK_SCALING_SF_DTYPE);
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TORCH_CHECK(mat.scalar_type() == at::ScalarType::Float8_e4m3fn,
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"Matrix dtype must be FP8 (the matrix will be dequantized on the fly).");
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}
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#define DISPATCH_SCALAR_TYPE(scalar_type, ...) \
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if (scalar_type == at::ScalarType::BFloat16) \
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{ \
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using DataType = __nv_bfloat16; \
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__VA_ARGS__(); \
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} \
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else if (scalar_type == at::ScalarType::Float8_e4m3fn) \
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{ \
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using DataType = __nv_fp8_e4m3; \
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__VA_ARGS__(); \
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} \
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else \
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{ \
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TORCH_CHECK(false); \
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}
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Fp8BlockScaleGemmRunnerPtr get_gemm_runner(at::ScalarType dtype_a, at::ScalarType dtype_b)
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{
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Fp8BlockScaleGemmRunnerPtr result;
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DISPATCH_SCALAR_TYPE(dtype_a,
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[&]
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{
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using ADtypeStatic = DataType;
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DISPATCH_SCALAR_TYPE(dtype_b,
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[&]
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{
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using BDtypeStatic = DataType;
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result
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= std::make_unique<CutlassFp8BlockScaleGemmRunner<ADtypeStatic, BDtypeStatic, __nv_bfloat16>>();
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})
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})
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return result;
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}
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} // namespace
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torch::Tensor fp8_block_scaling_gemm_hopper(torch::Tensor mat1, torch::Tensor mat2,
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std::optional<torch::Tensor> mat1Scale, std::optional<torch::Tensor> mat2Scale)
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{
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check_input_dtypes(mat1, mat1Scale);
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check_input_dtypes(mat2, mat2Scale);
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TORCH_CHECK(mat1.dim() == 2, "mat1 must be a matrix");
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TORCH_CHECK(mat2.dim() == 2, "mat2 must be a matrix");
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TORCH_CHECK(mat1.sizes()[1] == mat2.sizes()[1], "mat1 and mat2 shapes cannot be multiplied (", mat1.sizes()[0], "x",
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mat1.sizes()[1], " and ", mat2.sizes()[0], "x", mat2.sizes()[1], ")");
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auto const m = mat1.sizes()[0];
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auto const n = mat2.sizes()[0];
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auto const k = mat1.sizes()[1];
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TORCH_CHECK(k % 16 == 0, "K must be a multiple of 16, (K=", k, ")");
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TORCH_CHECK(n % 16 == 0, "N must be a multiple of 16, (N=", n, ")");
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at::Tensor out = at::detail::empty_cuda({m, n}, at::ScalarType::BFloat16, mat1.device(), std::nullopt);
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auto gemm_runner = get_gemm_runner(mat1.scalar_type(), mat2.scalar_type());
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auto stream = at::cuda::getCurrentCUDAStream(mat1.get_device());
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float const* mat1ScalePtr = mat1Scale.has_value() ? mat1Scale->data_ptr<float>() : nullptr;
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float const* mat2ScalePtr = mat2Scale.has_value() ? mat2Scale->data_ptr<float>() : nullptr;
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gemm_runner->gemm(reinterpret_cast<__nv_fp8_e4m3*>(mat1.data_ptr()), k,
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reinterpret_cast<__nv_fp8_e4m3*>(mat2.data_ptr()), k, reinterpret_cast<__nv_bfloat16*>(out.data_ptr()), n, m, n,
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k, mat1ScalePtr, mat2ScalePtr, stream);
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return out;
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}
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torch::Tensor fp8_block_scale_gemm_blackwell(
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torch::Tensor mat1, torch::Tensor mat2, torch::Tensor mat1Scale, torch::Tensor mat2Scale)
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{
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TORCH_CHECK(mat1.scalar_type() == at::ScalarType::Float8_e4m3fn, "Matrix dtype must be FP8.");
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TORCH_CHECK(mat2.scalar_type() == at::ScalarType::Float8_e4m3fn, "Matrix dtype must be FP8.");
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TORCH_CHECK(mat1Scale.scalar_type() == at::ScalarType::Float, "Scale dtype must be FP32.");
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TORCH_CHECK(mat2Scale.scalar_type() == at::ScalarType::Float, "Scale dtype must be FP32.");
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TORCH_CHECK(mat1.dim() == 2, "mat1 must be a matrix");
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TORCH_CHECK(mat2.dim() == 2, "mat2 must be a matrix");
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TORCH_CHECK(mat1.sizes()[1] == mat2.sizes()[1], "mat1 and mat2 shapes cannot be multiplied (", mat1.sizes()[0], "x",
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mat1.sizes()[1], " and ", mat2.sizes()[0], "x", mat2.sizes()[1], ")");
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auto const m = mat1.sizes()[0];
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auto const n = mat2.sizes()[0];
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auto const k = mat1.sizes()[1];
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TORCH_CHECK(m <= std::numeric_limits<int32_t>::max(), "M must be within int32");
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TORCH_CHECK(n <= std::numeric_limits<int32_t>::max(), "N must be within int32");
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TORCH_CHECK(k <= std::numeric_limits<int32_t>::max(), "K must be within int32");
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TORCH_CHECK(k % 128 == 0, "K must be a multiple of 128, (K=", k, ")");
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TORCH_CHECK(n % 128 == 0, "N must be a multiple of 128, (N=", n, ")");
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TORCH_CHECK(mat1Scale.dim() == 2, "mat1Scale must be a matrix");
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TORCH_CHECK(mat1Scale.sizes()[0] == k / 128, "mat1Scale must have size K/128 x M");
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TORCH_CHECK(mat1Scale.sizes()[1] == m, "mat1Scale must have size K/128 x M");
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TORCH_CHECK(mat2Scale.dim() == 2, "mat2Scale must be a matrix");
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TORCH_CHECK(mat2Scale.sizes()[0] == n / 128, "mat2Scale must have size N/128 x K/128");
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TORCH_CHECK(mat2Scale.sizes()[1] == k / 128, "mat2Scale must have size N/128 x K/128");
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auto stream = at::cuda::getCurrentCUDAStream(mat1.get_device());
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float const* mat1ScalePtr = mat1Scale.data_ptr<float>();
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float const* mat2ScalePtr = mat2Scale.data_ptr<float>();
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at::Tensor out = at::detail::empty_cuda({m, n}, at::ScalarType::BFloat16, mat1.device(), std::nullopt);
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// The output scale is not used in the current implementation.
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/*
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at::Tensor outScale = at::detail::empty_cuda({n / 128, m}, at::ScalarType::Float, mat1.device(), std::nullopt);
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float* outScalePtr = outScale.data_ptr<float>();
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*/
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float* outScalePtr = nullptr;
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tensorrt_llm::kernels::TrtllmGenBlockScaleGemmRunner runner(Data_type::DATA_TYPE_BF16);
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runner.run(
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m, n, k, mat1.data_ptr(), mat1ScalePtr, mat2.data_ptr(), mat2ScalePtr, out.data_ptr(), outScalePtr, stream);
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return out;
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}
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extern torch::Tensor fp8_block_scaling_gemm(torch::Tensor mat1, torch::Tensor mat2,
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std::optional<torch::Tensor> mat1Scale, std::optional<torch::Tensor> mat2Scale)
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{
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auto const sm = tensorrt_llm::common::getSMVersion();
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switch (sm)
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{
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case 100:
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TORCH_CHECK(mat1Scale.has_value(), "mat1Scale must be provided for SM100");
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TORCH_CHECK(mat2Scale.has_value(), "mat2Scale must be provided for SM100");
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return fp8_block_scale_gemm_blackwell(mat1, mat2, mat1Scale.value(), mat2Scale.value());
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case 90: return fp8_block_scaling_gemm_hopper(mat1, mat2, mat1Scale, mat2Scale);
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default: TORCH_CHECK(false, "Unsupported SM version for FP8 block scaling GEMM");
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}
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}
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} // namespace torch_ext
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TORCH_LIBRARY_FRAGMENT(trtllm, m)
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{
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m.def("fp8_block_scaling_gemm(Tensor mat1, Tensor mat2, Tensor? mat1Scale, Tensor? mat2Scale) -> Tensor");
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}
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TORCH_LIBRARY_IMPL(trtllm, CUDA, m)
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{
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m.impl("fp8_block_scaling_gemm", &torch_ext::fp8_block_scaling_gemm);
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}
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