mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
synced 2026-01-14 06:27:45 +08:00
3e27029c1c
Signed-off-by: qqiao <qqiao@nvidia.com> Signed-off-by: Yanchao Lu <yanchaol@nvidia.com> Co-authored-by: Emma Qiao <qqiao@nvidia.com>
99 lines
3.9 KiB
C++
99 lines
3.9 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "tensorrt_llm/batch_manager/logitsPostProcessor.h"
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#include "tensorrt_llm/batch_manager/decoderBuffers.h"
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#include "tensorrt_llm/batch_manager/llmRequest.h"
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#include "tensorrt_llm/batch_manager/runtimeBuffers.h"
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#include "tensorrt_llm/common/nvtxUtils.h"
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#include "tensorrt_llm/runtime/iTensor.h"
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#include "tensorrt_llm/runtime/tllmRuntime.h"
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#include "tensorrt_llm/runtime/utils/debugUtils.h"
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namespace tr = tensorrt_llm::runtime;
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namespace tensorrt_llm::batch_manager
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{
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using BufferManager = tensorrt_llm::runtime::BufferManager;
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using TensorPtr = runtime::ITensor::SharedPtr;
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using ITensor = runtime::ITensor;
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using SizeType32 = tensorrt_llm::runtime::SizeType32;
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bool LogitsPostProcessor::operator()(RequestVector const& contextRequests, RequestVector const& generationRequests,
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bool replicateLogitsPostProcessor, std::vector<TensorPtr>& seqSlotLogits, tr::WorldConfig const& worldConfig,
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tr::TllmRuntime& runtime, std::optional<LogitsPostProcessorBatched> const& logitsPostProcessorBatched) const
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{
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TLLM_LOG_TRACE("%s start", __PRETTY_FUNCTION__);
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NVTX3_SCOPED_RANGE(LogitsPostProcessor);
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// Arguments for batched processor
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std::vector<LlmRequest::RequestIdType> reqIdsVec;
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std::vector<LlmRequest::TensorPtr> logitsVec;
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std::vector<std::reference_wrapper<LlmRequest::BeamTokens const>> beamTokensVec;
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std::vector<std::optional<LlmRequest::RequestIdType>> clientIdsVec;
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bool logitsPostProcessorIsApplied = false;
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for (auto const& requests : {contextRequests, generationRequests})
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{
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for (auto const& llmReq : requests)
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{
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if (llmReq->isContextInitState() ? llmReq->isLastContextChunk() : llmReq->isGenerationInProgressState())
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{
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// Invoke non-batched processor or collect arguments for batched processor
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if (llmReq->mLogitsPostProcessor)
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{
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logitsPostProcessorIsApplied = true;
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if (replicateLogitsPostProcessor || worldConfig.isFirstTensorParallelRank())
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{
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auto& logits = seqSlotLogits.at(llmReq->mSeqSlot.value());
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(*llmReq->mLogitsPostProcessor)(
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llmReq->mRequestId, logits, llmReq->getTokens(), runtime.getStreamPtr(), llmReq->mClientId);
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}
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}
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else if (llmReq->mApplyLogitsPostProcessorBatched)
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{
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reqIdsVec.push_back(llmReq->mRequestId);
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auto& logits = seqSlotLogits.at(llmReq->mSeqSlot.value());
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logitsVec.push_back(logits);
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beamTokensVec.emplace_back(llmReq->getTokens());
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clientIdsVec.push_back(llmReq->mClientId);
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}
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}
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}
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}
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// Invoke batched processor
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if (!reqIdsVec.empty())
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{
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logitsPostProcessorIsApplied = true;
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if (replicateLogitsPostProcessor || worldConfig.isFirstTensorParallelRank())
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{
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(*logitsPostProcessorBatched)(reqIdsVec, logitsVec, beamTokensVec, runtime.getStreamPtr(), clientIdsVec);
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}
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}
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TLLM_LOG_TRACE("%s stop", __PRETTY_FUNCTION__);
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return logitsPostProcessorIsApplied;
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}
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} // namespace tensorrt_llm::batch_manager
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