mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
synced 2026-01-14 06:27:45 +08:00
98 lines
3.9 KiB
C++
98 lines
3.9 KiB
C++
/*
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* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "tensorrt_llm/common/cudaUtils.h"
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#include "tensorrt_llm/kernels/logitsBitmask.h"
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#include "tensorrt_llm/thop/thUtils.h"
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namespace torch_ext
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{
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int32_t constexpr kBitsPerMaskElement = 32;
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void logitsBitmask(std::vector<torch::Tensor> const& logits, std::vector<torch::Tensor> const& bitmask)
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{
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TORCH_CHECK(bitmask.size() == logits.size(), "The lengths of logits and bitmask do not match.");
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int32_t batchSize = logits.size();
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if (batchSize == 0)
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{
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return;
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}
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int32_t vocabSizePadded = logits[0].size(0);
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int32_t bitmaskSize = tensorrt_llm::common::ceilDiv(vocabSizePadded, kBitsPerMaskElement);
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auto options = torch::TensorOptions().dtype(torch::kUInt64).device(torch::kCPU).pinned_memory(true);
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auto logitsPtrsHost = torch::empty({batchSize}, options);
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auto bitmaskPtrsHost = torch::empty({batchSize}, options);
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for (int i = 0; i < batchSize; i++)
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{
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TORCH_CHECK(logits[i].is_cuda(), "logits must be a CUDA tensor.");
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TORCH_CHECK(logits[i].is_contiguous(), "logits must be contiguous.");
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TORCH_CHECK(logits[i].dim() == 1, "logits must be a 1D tensor.");
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TORCH_CHECK(logits[i].size(0) == vocabSizePadded, "logits must have the same vocab size.");
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TORCH_CHECK(bitmask[i].is_cuda(), "bitmask must be a CUDA tensor.");
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TORCH_CHECK(bitmask[i].is_contiguous(), "bitmask must be contiguous.");
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TORCH_CHECK(bitmask[i].dim() == 1, "bitmask must be a 1D tensor.");
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TORCH_CHECK(bitmask[i].size(0) == bitmaskSize, "bitmask must have size equal to ceilDiv(vocab_size, 32).");
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TORCH_CHECK(bitmask[i].scalar_type() == torch::kUInt32 || bitmask[i].scalar_type() == torch::kInt32,
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"bitmask must have element type uint32 or int32.");
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logitsPtrsHost[i] = reinterpret_cast<uint64_t>(logits[i].data_ptr());
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bitmaskPtrsHost[i] = reinterpret_cast<uint64_t>(bitmask[i].data_ptr());
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}
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auto logitsPtrs = logitsPtrsHost.to(torch::kCUDA);
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auto bitmaskPtrs = bitmaskPtrsHost.to(torch::kCUDA);
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auto stream = at::cuda::getCurrentCUDAStream(logits[0].get_device()).stream();
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switch (logits[0].scalar_type())
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{
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case torch::kFloat32:
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{
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tensorrt_llm::kernels::invokeLogitsBitmask<float>(reinterpret_cast<float**>(logitsPtrs.data_ptr()),
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reinterpret_cast<uint32_t const**>(bitmaskPtrs.data_ptr()), batchSize, vocabSizePadded, stream);
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break;
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}
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case torch::kFloat16:
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{
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tensorrt_llm::kernels::invokeLogitsBitmask<__half>(reinterpret_cast<__half**>(logitsPtrs.data_ptr()),
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reinterpret_cast<uint32_t const**>(bitmaskPtrs.data_ptr()), batchSize, vocabSizePadded, stream);
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break;
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}
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case torch::kBFloat16:
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{
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tensorrt_llm::kernels::invokeLogitsBitmask<__nv_bfloat16>(
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reinterpret_cast<__nv_bfloat16**>(logitsPtrs.data_ptr()),
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reinterpret_cast<uint32_t const**>(bitmaskPtrs.data_ptr()), batchSize, vocabSizePadded, stream);
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break;
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}
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default: TORCH_CHECK(false, "logits dtype must be float, half or bfloat16."); break;
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}
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}
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} // namespace torch_ext
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TORCH_LIBRARY_FRAGMENT(trtllm, m)
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{
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m.def("logits_bitmask(Tensor[] logits, Tensor[] bitmask) -> ()");
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}
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TORCH_LIBRARY_IMPL(trtllm, CUDA, m)
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{
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m.impl("logits_bitmask", &torch_ext::logitsBitmask);
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}
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