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https://github.com/NVIDIA/TensorRT-LLM.git
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102 lines
3.4 KiB
C++
102 lines
3.4 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include "tensorrt_llm/batch_manager/llmRequest.h"
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#include "tensorrt_llm/kernels/kvCacheIndex.h"
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#include "tensorrt_llm/runtime/iBuffer.h"
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#include "tensorrt_llm/runtime/iTensor.h"
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#include <ATen/ATen.h>
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#include <cstdint>
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#include <cuda.h>
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#include <set>
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#include <unordered_map>
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#include <vector>
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namespace tk = tensorrt_llm::kernels;
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using SizeType32 = tensorrt_llm::runtime::SizeType32;
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using ITensor = tensorrt_llm::runtime::ITensor;
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namespace tensorrt_llm::batch_manager::kv_cache_manager_v2
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{
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struct DiskAddress
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{
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int fd;
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ssize_t pos;
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};
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using MemAddress = std::uintptr_t;
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// Please make sure to align with the definition in tensorrt_llm/runtime/kv_cache_manager_v2/_common.py
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constexpr tk::KVCacheIndex::UnderlyingType BAD_PAGE_INDEX = -1;
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template <typename DstAddr, typename SrcAddr>
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struct Task
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{
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DstAddr dst;
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SrcAddr src;
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};
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using PackedInt = union
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{
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int4 packed;
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tk::KVCacheIndex::UnderlyingType unpacked[4];
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};
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class IndexMapper
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{
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public:
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IndexMapper(SizeType32 maxBatchSize, SizeType32 maxBeamWidth);
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~IndexMapper();
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IndexMapper(IndexMapper const&) = delete;
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IndexMapper& operator=(IndexMapper const&) = delete;
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SizeType32 addNewSequence(LlmRequest::RequestIdType requestId);
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SizeType32 getIndex(LlmRequest::RequestIdType requestId);
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void removeSequence(LlmRequest::RequestIdType requestId);
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at::Tensor getCopyIndex(
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std::vector<LlmRequest::RequestIdType> const& requestIds, SizeType32 numContext, SizeType32 beamWidth);
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private:
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std::unordered_map<LlmRequest::RequestIdType, SizeType32> indexMap_;
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std::set<SizeType32> freeIndices_;
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SizeType32 maxBeamWidth_;
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at::Tensor copyIndex_;
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};
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CUresult copyDiskToDisk(std::vector<Task<DiskAddress, DiskAddress>> tasks, ssize_t numBytes, CUstream stream) noexcept;
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CUresult copyDiskToHost(std::vector<Task<MemAddress, DiskAddress>> tasks, ssize_t numBytes, CUstream stream) noexcept;
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CUresult copyHostToDisk(std::vector<Task<DiskAddress, MemAddress>> tasks, ssize_t numBytes, CUstream stream) noexcept;
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CUresult copyHostToHost(std::vector<Task<MemAddress, MemAddress>> tasks, ssize_t numBytes, CUstream stream) noexcept;
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CUresult copyHostToDevice(
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std::vector<Task<MemAddress, MemAddress>> const& tasks, ssize_t numBytes, CUstream stream) noexcept;
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CUresult copyDeviceToHost(
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std::vector<Task<MemAddress, MemAddress>> const& tasks, ssize_t numBytes, CUstream stream) noexcept;
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CUresult copyDeviceToDevice(
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std::vector<Task<MemAddress, MemAddress>> const& tasks, ssize_t numBytes, CUstream stream) noexcept;
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void copyBatchBlockOffsetsToDevice(
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ITensor const& input, ITensor& output, ITensor const& copyIndex, bool copyVIdx, CUstream stream) noexcept;
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} // namespace tensorrt_llm::batch_manager::kv_cache_manager_v2
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