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attention_backend
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[https://nvbugs/5624818][fix] Work around accuracy issue by enforcing paged_context_fmha on Hopper for fmha_v2 (#11192)
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2026-02-04 19:21:50 +08:00 |
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auto_deploy
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[None][infra] AutoDeploy: Dump graph IR after every transform (#11045)
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2026-02-09 10:43:44 -08:00 |
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compilation
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[https://nvbugs/5800646][fix] Fix hang issue by avoid exposing UB buf… (#10842)
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2026-02-09 23:53:40 +08:00 |
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configs
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[TRTLLM-8535][feat] Support DeepSeek V3.2 with FP8 + BF16 KV cache/NVFP4 + BF16 KV cache (#8405)
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2025-10-24 13:40:41 -04:00 |
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cuda_tile_kernels
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[None][feat] Integrate cuda.tile RMS norm kernels (#9725)
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2026-02-02 19:44:27 +08:00 |
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custom_ops
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[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)
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2026-02-06 09:49:30 +08:00 |
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cute_dsl_kernels
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[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)
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2026-02-06 09:49:30 +08:00 |
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debug
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Add debug hook to support dump tensor data and add new debug functions easily (#5182)
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2025-06-24 17:45:28 +08:00 |
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disaggregation
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[TRTLLM-9527][feat] Modularization of the transceiver for KV manager v2 (step 4) (#11225)
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2026-02-06 07:15:18 -05:00 |
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distributed
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[TRTLLM-10264][feat] Support attention DP + Helix CP (#10477)
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2026-01-29 02:57:13 -05:00 |
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models
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[TRTLLM-10669][fix] Fix Eagle3 draft model weight loading for throughput checkpoint (#11010)
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2026-02-09 23:53:40 +08:00 |
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modules
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[https://nvbugs/5800646][fix] Fix hang issue by avoid exposing UB buf… (#10842)
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2026-02-09 23:53:40 +08:00 |
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peft
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[https://nvbugs/5322131][feat] Multi-LoRA serving with CUDA Graph (#8279)
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2026-01-22 14:01:18 +01:00 |
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pyexecutor
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[https://nvbugs/5769815][fix] Fix offset calculation in _are_stop_words when using speculative decoding (#10854)
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2026-02-09 23:53:40 +08:00 |
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shared_tensor
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[1/N][TRTLLM-5195][feat] Share PyTorch tensor between processes (#5396)
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2025-07-10 05:12:53 +09:00 |
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speculative
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[https://nvbugs/5756028][fix] Fix VSWA initialization with spec-dec and boundary condition in context input preparation (#10798)
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2026-02-06 14:28:47 +08:00 |
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__init__.py
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[TRTLLM-9212][chore] move MoeLoadBalancerConfig to llm_args.py (#9002)
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2025-11-13 10:47:35 +08:00 |
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async_llm.py
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[TRTLLM-9736][feat] AsyncLLM and verl integ (#9353)
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2025-12-11 09:33:25 -08:00 |
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autotuner.py
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[TRTLLM-10264][feat] Support attention DP + Helix CP (#10477)
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2026-01-29 02:57:13 -05:00 |
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cublaslt_utils.py
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[https://nvbugs/5451205][feat] Add cuBLASLt NVFP4 GEMM backend support (#7943)
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2025-10-23 15:55:10 +08:00 |
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cuda_tile_utils.py
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[None][feat] Integrate cuda.tile RMS norm kernels (#9725)
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2026-02-02 19:44:27 +08:00 |
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cute_dsl_utils.py
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[None][chore] polish error message in cute_dsl_utils.py (#7852)
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2025-09-19 12:05:11 +08:00 |
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device_mesh.py
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[TRTLLM-9465][fix] Swap TP-CP grouping order (#10350)
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2026-01-05 20:08:03 +08:00 |
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expert_statistic.py
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[TRTLLM-8831][feat] Enable early exit with overlap scheduler (#8587)
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2025-11-17 18:07:13 +01:00 |
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flashinfer_utils.py
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[TRTLLM-9578][feat] make PDL enabled by default (#9695)
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2025-12-25 07:15:24 -05:00 |
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hostfunc.py
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[TRTLLM-7028][feat] Enable guided decoding with speculative decoding (part 2: one-model engine) (#6948)
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2025-09-03 15:16:11 -07:00 |
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llm.py
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[TRTLLM-5208][BREAKING CHANGE] chore: make pytorch LLM the default (#5312)
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2025-06-20 03:01:10 +08:00 |
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memory_buffer_utils.py
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[https://nvbugs/5811697][fix] Fix buffer reuse. (#10716)
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2026-01-25 18:12:21 +08:00 |
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metadata.py
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[None][feat] Use Separate QKV Input Layout for Context MLA (#6538)
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2025-08-19 22:04:48 +08:00 |
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model_config.py
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[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)
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2026-02-06 09:49:30 +08:00 |
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utils.py
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[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)
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2026-02-06 09:49:30 +08:00 |
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virtual_memory.py
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[TRTLLM-9736][feat] AsyncLLM and verl integ (#9353)
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2025-12-11 09:33:25 -08:00 |
