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4bb65f216f
* Update TensorRT-LLM --------- Co-authored-by: meghagarwal <16129366+megha95@users.noreply.github.com> Co-authored-by: Shixiaowei02 <39303645+Shixiaowei02@users.noreply.github.com>
72 lines
2.2 KiB
C++
72 lines
2.2 KiB
C++
/*
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* Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <assert.h>
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#include <iostream>
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#include "tensorrt_llm/common/assert.h"
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#include "tensorrt_llm/common/cudaUtils.h"
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#include "tensorrt_llm/common/tensor.h"
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namespace tensorrt_llm::kernels
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{
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constexpr size_t WARP_SIZE = 32;
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constexpr size_t MAX_ALL_REDUCE_BLOCKS = 24;
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constexpr size_t MAX_RANKS_PER_NODE = 8;
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constexpr size_t DEFAULT_BLOCK_SIZE = 1024;
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// Warning: python definition is in tensorrt_llm/functional.py
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// they must be kept in sync
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enum class AllReduceStrategyType : int8_t
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{
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RING = 0,
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ONESHOT = 1,
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TWOSHOT = 2,
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AUTO = 3,
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};
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struct AllReduceParams
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{
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size_t elts_total;
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size_t elts_per_rank;
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size_t elts_per_block;
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size_t rank_offset;
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size_t ranks_per_node, rank, local_rank;
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uint32_t barrier_flag;
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uint32_t* peer_barrier_ptrs_in[MAX_RANKS_PER_NODE];
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uint32_t* peer_barrier_ptrs_out[MAX_RANKS_PER_NODE];
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void* peer_comm_buffer_ptrs[MAX_RANKS_PER_NODE];
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void* local_output_buffer_ptr;
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static AllReduceParams deserialize(int32_t const* buffer, size_t tpSize, size_t tpRank, uint32_t flag_value);
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};
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template <typename T>
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void invokeOneOrTwoShotAllReduceKernel(AllReduceParams& param, AllReduceStrategyType strat, cudaStream_t stream);
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void invokeMultiGpuBarrier(AllReduceParams& param, cudaStream_t stream);
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void customAllReduce(kernels::AllReduceParams& params, void* data, size_t elts, size_t size_per_elem,
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common::datatype_enum dataType, AllReduceStrategyType strat, cudaStream_t stream);
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} // namespace tensorrt_llm::kernels
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