mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
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44fb3c1673
- Adds a new Python custom op (fp8_block_scale_moe_runner) and a FP8BlockScaleMoERunner class for autotuning. - Updates C++ MoE and batched GEMM kernels to accept a configIndex for workspace sizing and execution. - Extends the unit test to run both autotuned and non-autotuned code paths. Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com>
255 lines
14 KiB
C++
255 lines
14 KiB
C++
/*
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* Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.h"
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#include "tensorrt_llm/runtime/torchUtils.h"
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#include "tensorrt_llm/thop/thUtils.h"
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#include <ATen/cuda/EmptyTensor.h>
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namespace torch_ext
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{
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namespace btg = batchedGemm::trtllm::gen;
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using tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::Routing::RoutingMethodType;
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torch::Tensor fp8_per_tensor_scale_moe_runner(torch::Tensor const& routing_logits, torch::Tensor const& routing_bias,
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torch::Tensor const& hidden_states, torch::Tensor const& gemm1_weights, torch::Tensor const& output1_scales_scalar,
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torch::Tensor const& output1_scales_gate_scalar, torch::Tensor const& gemm2_weights,
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torch::Tensor const& output2_scales_scalar, int64_t const num_experts, int64_t const top_k, int64_t const n_group,
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int64_t const topk_group, int64_t const intermediate_size, int64_t const local_expert_offset,
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int64_t const local_num_experts, double const routed_scaling_factor, bool const use_routing_scales_on_input,
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int64_t const tile_tokens_dim, int64_t const routing_method_type)
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{
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auto const sm = tensorrt_llm::common::getSMVersion();
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TORCH_CHECK(sm == 100, "Only SM100 is supported by FP8 block scale MOE");
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if (use_routing_scales_on_input)
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{
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TORCH_CHECK(routing_logits.scalar_type() == at::ScalarType::BFloat16, "routing_logits must be bfloat16.");
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}
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else
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{
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TORCH_CHECK(routing_logits.scalar_type() == at::ScalarType::Float, "routing_logits must be float.");
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}
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TORCH_CHECK(routing_logits.dim() == 2, "routing_logits must be 2D.");
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TORCH_CHECK(routing_logits.sizes()[1] == num_experts, "routing_logits has incorrect shape.");
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TORCH_CHECK(routing_bias.scalar_type() == at::ScalarType::BFloat16, "routing_bias must be bfloat16.");
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TORCH_CHECK(routing_bias.dim() == 1, "routing_bias must be 1D.");
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TORCH_CHECK(routing_bias.sizes()[0] == num_experts, "routing_bias has incorrect shape.");
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if (n_group <= 0 || topk_group <= 0)
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{
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TORCH_CHECK(top_k == 1, "Current routing kernel (no groups) only supports top_k=1.");
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}
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else
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{
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TORCH_CHECK(top_k <= 8, "Current routing kernel (with groups) only supports top_k<=8.");
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TORCH_CHECK(topk_group <= 4, "Current routing kernel (with groups) only supports topk_group<=4.");
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TORCH_CHECK(topk_group <= n_group, "n_group must not be smaller than topk_group.");
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TORCH_CHECK(num_experts % n_group == 0, "num_experts must be divisible by n_group");
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// This check ensures we have enough experts in the selected groups to handle the top_k routing
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TORCH_CHECK(top_k < (topk_group * num_experts / n_group),
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"top_k must be less than total number of experts in selected groups");
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}
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TORCH_CHECK(num_experts % 4 == 0, "Routing kernel expects that num_experts must be divisible by 4");
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TORCH_CHECK(num_experts > top_k, "num_experts must be greater than top_k");
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tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::MoE::MoERunnerArgs args;
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tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::MoE::MoEWorkspace workspace;
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// setup args
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args.mDtypeElt = btg::Dtype::E4m3;
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args.routing_logits = routing_logits.data_ptr();
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args.routing_bias = routing_bias.data_ptr();
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args.hidden_states = hidden_states.data_ptr();
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args.gemm1_weights = gemm1_weights.data_ptr();
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args.output1_scales_scalar = output1_scales_scalar.data_ptr<float>();
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args.output1_scales_gate_scalar = output1_scales_gate_scalar.data_ptr<float>();
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args.gemm2_weights = gemm2_weights.data_ptr();
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args.output2_scales_scalar = output2_scales_scalar.data_ptr<float>();
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args.num_tokens = hidden_states.sizes()[0];
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args.num_experts = num_experts;
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args.hidden_size = hidden_states.sizes()[1];
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args.top_k = top_k;
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args.n_group = n_group;
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args.topk_group = topk_group;
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args.local_expert_offset = local_expert_offset;
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args.local_num_experts = local_num_experts;
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args.routed_scaling_factor = routed_scaling_factor;
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args.intermediate_size = intermediate_size;
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args.mUseRoutingScalesOnInput = use_routing_scales_on_input;
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// allocate workspace for routing kernel
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at::Tensor num_tokens_per_expert
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= at::detail::empty_cuda({num_experts}, at::ScalarType::Int, routing_logits.device(), std::nullopt);
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int32_t max_num_padded_tokens
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= tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::Routing::getMaxPermutedPaddedCount(
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args.num_tokens, top_k, num_experts, tile_tokens_dim);
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at::Tensor total_num_padded_tokens
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= at::empty({}, at::TensorOptions().device(routing_logits.device()).dtype(at::ScalarType::Int));
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at::Tensor expanded_idx_to_permuted_idx = at::detail::empty_cuda(
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{args.num_tokens * args.top_k}, at::ScalarType::Int, routing_logits.device(), std::nullopt);
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at::Tensor permuted_idx_to_token_idx
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= at::detail::empty_cuda({max_num_padded_tokens}, at::ScalarType::Int, routing_logits.device(), std::nullopt);
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at::Tensor expert_weights = at::detail::empty_cuda(
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{args.num_tokens, args.top_k}, at::ScalarType::BFloat16, routing_logits.device(), std::nullopt);
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at::Tensor expert_indexes = at::detail::empty_cuda(
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{args.num_tokens, args.top_k}, at::ScalarType::Int, routing_logits.device(), std::nullopt);
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at::Tensor expert_count_histogram = at::detail::empty_cuda({2 * 256},
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at::ScalarType::Int, // 256 is the max number of threads per block and max number of experts
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routing_logits.device(), std::nullopt);
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// allocate workspace for activation/gemm/finalize kernels
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at::Tensor gemm1_output = at::detail::empty_cuda({max_num_padded_tokens, 2 * intermediate_size},
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at::ScalarType::Float8_e4m3fn, hidden_states.device(), std::nullopt);
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at::Tensor gemm1_output_scale = at::detail::empty_cuda({2 * intermediate_size / 128, max_num_padded_tokens},
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at::ScalarType::Float, hidden_states.device(), std::nullopt);
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at::Tensor activation_output = at::detail::empty_cuda({max_num_padded_tokens, intermediate_size},
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at::ScalarType::Float8_e4m3fn, hidden_states.device(), std::nullopt);
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at::Tensor activation_output_scale = at::detail::empty_cuda(
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{intermediate_size / 128, max_num_padded_tokens}, at::ScalarType::Float, hidden_states.device(), std::nullopt);
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at::Tensor gemm2_output = at::detail::empty_cuda(
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{max_num_padded_tokens, args.hidden_size}, at::ScalarType::BFloat16, hidden_states.device(), std::nullopt);
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int32_t max_num_ctas = tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::Routing::getMaxNumCtasInBatchDim(
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args.num_tokens, args.top_k, args.num_experts, tile_tokens_dim);
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at::Tensor cta_idx_xy_to_batch_idx
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= at::detail::empty_cuda({max_num_ctas}, at::ScalarType::Int, routing_logits.device(), std::nullopt);
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at::Tensor cta_idx_xy_to_mn_limit
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= at::detail::empty_cuda({max_num_ctas}, at::ScalarType::Int, routing_logits.device(), std::nullopt);
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at::Tensor num_non_exiting_ctas
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= at::empty({}, at::TensorOptions().device(routing_logits.device()).dtype(at::ScalarType::Int));
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tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::Routing::Runner routing_runner(tile_tokens_dim);
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auto const& stream = at::cuda::getCurrentCUDAStream(routing_logits.get_device());
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routing_runner.run(routing_logits.data_ptr(), routing_bias.data_ptr(), args.num_tokens, args.num_experts,
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args.top_k, args.n_group, args.topk_group, args.local_expert_offset, args.local_num_experts,
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args.routed_scaling_factor, expert_indexes.data_ptr<int>(), expert_count_histogram.data_ptr<int>(),
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total_num_padded_tokens.data_ptr<int>(), expanded_idx_to_permuted_idx.data_ptr<int>(),
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nullptr /*permuted_idx_to_expanded_idx.data_ptr<int>()*/, permuted_idx_to_token_idx.data_ptr<int>(),
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expert_weights.data_ptr(), num_tokens_per_expert.data_ptr<int>(), cta_idx_xy_to_batch_idx.data_ptr<int>(),
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cta_idx_xy_to_mn_limit.data_ptr<int>(), num_non_exiting_ctas.data_ptr<int>(), args.mDtypeElt,
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use_routing_scales_on_input, false /* use_deep_seek_fp8 */, static_cast<RoutingMethodType>(routing_method_type),
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stream);
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// MoE kernel except routing
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TORCH_CHECK(hidden_states.scalar_type() == at::ScalarType::Float8_e4m3fn, "hidden_states must be fp8.");
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TORCH_CHECK(gemm1_weights.scalar_type() == at::ScalarType::Float8_e4m3fn, "gemm1_weights must be fp8.");
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TORCH_CHECK(gemm1_weights.dim() == 3, "gemm1_weights must be 3D.");
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TORCH_CHECK(gemm1_weights.sizes()[1] % 2 == 0, "the second dimension of weights must be even.");
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TORCH_CHECK(intermediate_size == gemm1_weights.sizes()[1] / 2, "intermediate_size has incorrect shape.");
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TORCH_CHECK(gemm1_weights.sizes()[2] == hidden_states.sizes()[1],
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"the third dimension of weights must be equal to hidden_size.");
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TORCH_CHECK(intermediate_size % 128 == 0, "the second dimension of weights must be a multiple of 128.");
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TORCH_CHECK(output1_scales_scalar.scalar_type() == at::ScalarType::Float, "output1_scales_scalar must be float.");
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TORCH_CHECK(output1_scales_scalar.dim() == 1, "output1_scales_scalar must be 1D.");
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TORCH_CHECK(output1_scales_scalar.sizes()[0] == local_num_experts, "output1_scales_scalar has incorrect dim 0.");
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TORCH_CHECK(
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output1_scales_gate_scalar.scalar_type() == at::ScalarType::Float, "output1_scales_gate_scalar must be float.");
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TORCH_CHECK(output1_scales_gate_scalar.dim() == 1, "output1_scales_gate_scalar must be 1D.");
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TORCH_CHECK(
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output1_scales_gate_scalar.sizes()[0] == local_num_experts, "output1_scales_gate_scalar has incorrect dim 0.");
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TORCH_CHECK(gemm2_weights.scalar_type() == at::ScalarType::Float8_e4m3fn, "gemm2_weights must be fp8.");
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TORCH_CHECK(gemm2_weights.dim() == 3, "gemm2_weights must be 3D.");
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TORCH_CHECK(gemm2_weights.sizes()[2] == intermediate_size,
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"the third dimension of weights must be equal to intermediate_size.");
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TORCH_CHECK(output2_scales_scalar.scalar_type() == at::ScalarType::Float, "output2_scales_scalar must be float.");
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TORCH_CHECK(output2_scales_scalar.dim() == 1, "output2_scales_scalar must be 1D.");
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TORCH_CHECK(output2_scales_scalar.sizes()[0] == local_num_experts, "output2_scales_scalar has incorrect dim 0.");
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// allocate output
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at::Tensor output = at::detail::empty_cuda(
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{args.num_tokens, args.hidden_size}, at::ScalarType::BFloat16, hidden_states.device(), std::nullopt);
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// setup workspace
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workspace.total_num_padded_tokens = total_num_padded_tokens.data_ptr<int>();
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workspace.total_max_padded_tokens = max_num_padded_tokens;
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workspace.ProjUpTileN = tile_tokens_dim;
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workspace.routing_expert_indexes = expert_indexes.data_ptr<int>();
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workspace.permuted_idx_size = total_num_padded_tokens.data_ptr<int>();
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workspace.expanded_idx_to_permuted_idx
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= expanded_idx_to_permuted_idx.data_ptr<int>(); // Needed by activation/finalize kernels
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workspace.permuted_idx_to_token_idx = permuted_idx_to_token_idx.data_ptr<int>(); // Needed by permuteGemm1 kernel
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workspace.expert_weights = expert_weights.data_ptr(); // Consumed by finalize kernel
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workspace.cta_idx_xy_to_batch_idx = cta_idx_xy_to_batch_idx.data_ptr<int>();
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workspace.cta_idx_xy_to_mn_limit = cta_idx_xy_to_mn_limit.data_ptr<int>();
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workspace.num_non_exiting_ctas = num_non_exiting_ctas.data_ptr<int>();
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// gemm1 intermediate ws
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workspace.gemm1_output = gemm1_output.data_ptr();
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workspace.gemm1_output_scale = gemm1_output_scale.data_ptr<float>();
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// activation intermediate ws
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workspace.activation_output = activation_output.data_ptr();
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workspace.activation_output_scale = activation_output_scale.data_ptr<float>();
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// gemm2 intermediate ws
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workspace.gemm2_output = gemm2_output.data_ptr();
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workspace.gemm2_output_scale = nullptr;
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args.output = output.data_ptr();
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args.output_scale = nullptr;
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tensorrt_llm::kernels::trtllmGenFp8BlockScaleMoe::MoE::Runner moe_runner(
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args.mDtypeElt, args.mUseDeepSeekFp8, tile_tokens_dim);
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auto const moeConfigIndex = moe_runner.getDefaultValidConfigIndex(
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args.top_k, args.hidden_size, args.intermediate_size, args.local_num_experts, args.num_tokens);
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auto workspace_sizes = moe_runner.getWorkspaceSizeInBytes(args, moeConfigIndex);
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at::Tensor workspace_fc1 = at::detail::empty_cuda(
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{std::get<0>(workspace_sizes)}, at::ScalarType::Char, hidden_states.device(), std::nullopt);
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at::Tensor workspace_fc2 = at::detail::empty_cuda(
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{std::get<1>(workspace_sizes)}, at::ScalarType::Char, hidden_states.device(), std::nullopt);
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workspace.bmm1_workspace = workspace_fc1.data_ptr();
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workspace.bmm2_workspace = workspace_fc2.data_ptr();
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auto const& moe_stream = at::cuda::getCurrentCUDAStream(hidden_states.get_device());
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moe_runner.run(args, workspace, hidden_states.get_device(), moe_stream, moeConfigIndex);
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return output;
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}
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} // namespace torch_ext
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TORCH_LIBRARY_FRAGMENT(trtllm, m)
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{
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m.def(
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"fp8_per_tensor_scale_moe_runner("
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"Tensor routing_logits,"
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"Tensor routing_bias,"
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"Tensor hidden_states,"
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"Tensor gemm1_weights,"
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"Tensor output1_scales_scalar,"
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"Tensor output1_scales_gate_scalar,"
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"Tensor gemm2_weights,"
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"Tensor output2_scales_scalar,"
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"int num_experts,"
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"int top_k,"
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"int n_group,"
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"int topk_group,"
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"int intermediate_size,"
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"int local_expert_offset,"
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"int local_num_experts,"
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"float routed_scaling_factor,"
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"bool use_routing_scales_on_input,"
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"int tile_tokens_dim,"
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"int routing_method_type) -> Tensor");
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}
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TORCH_LIBRARY_IMPL(trtllm, CUDA, m)
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{
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m.impl("fp8_per_tensor_scale_moe_runner", &torch_ext::fp8_per_tensor_scale_moe_runner);
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}
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