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https://github.com/NVIDIA/TensorRT-LLM.git
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66 lines
2.0 KiB
C++
66 lines
2.0 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "envUtils.h"
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#include "tensorrt_llm/common/logger.h"
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#include <cstdlib>
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namespace tensorrt_llm::common
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{
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// Tune the number of blocks per sequence for accuracy/performance purpose.
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bool getEnvMmhaMultiblockDebug()
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{
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static bool init = false;
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static bool forceMmhaMaxSeqLenTile = false;
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if (!init)
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{
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init = true;
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const char* enable_mmha_debug_var = std::getenv("TRTLLM_ENABLE_MMHA_MULTI_BLOCK_DEBUG");
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if (enable_mmha_debug_var)
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{
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if (enable_mmha_debug_var[0] == '1' && enable_mmha_debug_var[1] == '\0')
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{
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forceMmhaMaxSeqLenTile = true;
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}
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}
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}
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return forceMmhaMaxSeqLenTile;
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}
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int getEnvMmhaBlocksPerSequence()
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{
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static bool init = false;
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static int mmhaBlocksPerSequence = 0;
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if (!init)
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{
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init = true;
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const char* mmhaBlocksPerSequenceEnv = std::getenv("TRTLLM_MMHA_BLOCKS_PER_SEQUENCE");
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if (mmhaBlocksPerSequenceEnv)
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{
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mmhaBlocksPerSequence = std::atoi(mmhaBlocksPerSequenceEnv);
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if (mmhaBlocksPerSequence <= 0)
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{
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TLLM_LOG_WARNING("Invalid value for TRTLLM_MMHA_BLOCKS_PER_SEQUENCE. Will use default values instead!");
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}
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}
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}
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return mmhaBlocksPerSequence;
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}
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} // namespace tensorrt_llm::common
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