mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
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119 lines
4.2 KiB
C++
119 lines
4.2 KiB
C++
/*
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* Copyright (c) 2019-2024, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2021, NAVER Corp. Authored by CLOVA.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <curand_kernel.h>
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#include "tensorrt_llm/common/tensor.h"
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#include "tensorrt_llm/layers/baseLayer.h"
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#include "tensorrt_llm/layers/decodingParams.h"
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#include "tensorrt_llm/runtime/common.h"
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#include "tensorrt_llm/runtime/decodingMode.h"
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#include "tensorrt_llm/runtime/iTensor.h"
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namespace tc = tensorrt_llm::common;
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namespace tensorrt_llm
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{
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namespace layers
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{
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//! \brief
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template <typename T>
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class MedusaDecodingLayer : public BaseLayer
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{
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public:
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using Base = BaseLayer;
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using PathsVec = std::vector<std::vector<std::vector<runtime::SizeType>>>;
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class MedusaSetupParams : public DecodingSetupParams
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{
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public:
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std::optional<std::vector<runtime::SizeType>> runtimeTopK; // [1] or [batchSize] on cpu
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std::optional<std::vector<std::vector<runtime::SizeType>>>
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runtimeHeadsTopK; // [batchSize, maxMedusaHeads] on cpu
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std::optional<std::vector<uint64_t>> randomSeed; // [1] or [batchSize] on cpu
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std::optional<std::vector<runtime::SizeType>> tokensPerStep; // [1] or [batchSize] on cpu
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};
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class MedusaForwardParams : public DecodingParams
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{
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public:
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MedusaForwardParams(tc::Tensor logits, tc::Tensor endIds)
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: DecodingParams{0, 0, std::move(logits), std::move(endIds)}
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{
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}
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tc::Tensor paths; // [maxBatchSize, maxTokensPerStep, maxNumHeads + 1] on gpu
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tc::Tensor medusaLogits; // [maxNumHeads, maxBatchSize, maxTokensPerStep, vocabSize] on gpu
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};
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MedusaDecodingLayer(runtime::SizeType maxBatchSize, runtime::SizeType vocabSize, runtime::SizeType vocabSizePadded,
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runtime::SizeType maxTokensPerStep, runtime::SizeType maxNumHeads, cudaStream_t stream,
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std::shared_ptr<tensorrt_llm::common::IAllocator> allocator);
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~MedusaDecodingLayer() override;
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void setup(runtime::SizeType batchSize, runtime::SizeType const* batchSlots, MedusaSetupParams const& setupParams);
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void forward(DecodingOutputParams& outputs, MedusaForwardParams& inputs);
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private:
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void allocateBuffer();
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void freeBuffer();
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void samplePrimeHeadTokens(DecodingOutputParams& outputs, MedusaForwardParams& inputs);
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void acceptDraftTokens(DecodingOutputParams& outputs, MedusaForwardParams& inputs);
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void sampleNewDraftTokens(DecodingOutputParams& outputs, MedusaForwardParams& inputs);
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private:
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using Base::mStream;
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using Base::mAllocator;
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runtime::SizeType mMaxBatchSize;
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runtime::SizeType mVocabSize;
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runtime::SizeType mVocabSizePadded;
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runtime::SizeType mMaxTokensPerStep;
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runtime::SizeType mMaxNumHeads;
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size_t mSamplingWorkspaceSize;
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runtime::SizeType mRuntimeMaxTopK{0};
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runtime::SizeType mRuntimeMaxTopKPerRequestPerMedusaHead{0};
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curandState_t* mCurandStatesDevice{nullptr};
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runtime::SizeType* mTokensPerStepDevice{nullptr};
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void* mSetupWorkspaceDevice{nullptr};
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void* mSamplingWorkspaceDevice{nullptr};
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runtime::SizeType* mRuntimeTopKDevice{nullptr};
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runtime::TokenIdType* mTargetTokensDevice{nullptr};
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uint64_t* mRandomSeedsDevice{nullptr};
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T** mMedusaLogitsPtrsDevice{nullptr};
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curandState_t* mCurandStatesMedusaLogitsDevice{nullptr};
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runtime::SizeType* mRuntimeTopKPerRequestPerMedusaHeadDevice{nullptr};
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runtime::ITensor::UniquePtr mTiledBatchSlotsSetup;
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runtime::ITensor::UniquePtr mTiledBatchSlotsForward;
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runtime::ITensor::UniquePtr mDraftIdsPtrHost;
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std::vector<runtime::SizeType> mCummulativeTopK;
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};
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} // namespace layers
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} // namespace tensorrt_llm
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