mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
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91 lines
3.7 KiB
C++
91 lines
3.7 KiB
C++
/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include "tensorrt_llm/common/config.h"
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#include "tensorrt_llm/common/cudaUtils.h"
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#include "tensorrt_llm/kernels/quantization.h"
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#include "tensorrt_llm/thop/thUtils.h"
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#include <ATen/cuda/EmptyTensor.h>
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#include <cuda_fp16.h>
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#include <cstdint>
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TRTLLM_NAMESPACE_BEGIN
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namespace torch_ext
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{
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// Given the rowIdx and colIdx in the unswizzled SFMatrix, compute the 1D offset in the swizzled SFMatrix.
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// colIdx and totalCloumn should be in SFMatrix, not activation Matrix, so no sfVecSize needed.
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inline int computeSFIndex(int rowIdx, int colIdx, int totalRow, int totalColumn,
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tensorrt_llm::QuantizationSFLayout layout, bool useUE8M0 = false)
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{
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constexpr int kColumnGroup0Size = 4;
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constexpr int kRowGroup0Size = 32;
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constexpr int kRowGroup1Size = kRowGroup0Size * 4;
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// Swizzled layout is used as default layout.
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if (layout == tensorrt_llm::QuantizationSFLayout::SWIZZLED)
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{
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// int paddedRow = PadUpFn(totalRow, 128);
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int paddedColumn = PadUpFn(totalColumn, 4);
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int columnIdxInGroup0 = colIdx % kColumnGroup0Size;
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int columnGroupIdx = colIdx / kColumnGroup0Size;
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constexpr int columnGroupStride = kColumnGroup0Size * kRowGroup1Size;
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int rowIdxInGroup0 = rowIdx % kRowGroup0Size;
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int rowIdxInGroup1 = (rowIdx % kRowGroup1Size) / kRowGroup0Size;
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int rowGroupIdx = rowIdx / kRowGroup1Size;
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constexpr int rowGroup1Stride = kColumnGroup0Size;
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constexpr int rowGroup0Stride = kColumnGroup0Size * rowGroup1Stride;
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int rowGroupStride = kRowGroup1Size * paddedColumn;
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return columnIdxInGroup0 + columnGroupIdx * columnGroupStride + rowIdxInGroup0 * rowGroup0Stride
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+ rowIdxInGroup1 * rowGroup1Stride + rowGroupIdx * rowGroupStride;
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}
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// Linear layout is only used in E2M1AndUFP8SFScaleToFloatV2.
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else if (layout == tensorrt_llm::QuantizationSFLayout::LINEAR)
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{
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// no padding needed. totalColumn is multiple of kVecSize.
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return rowIdx * totalColumn + colIdx;
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}
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else
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{
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TLLM_THROW("Other layout not implemented yet.");
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}
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}
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std::tuple<torch::Tensor, torch::Tensor> symmetric_quantize_weight(torch::Tensor weight);
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std::tuple<torch::Tensor, torch::Tensor> symmetric_quantize_activation(torch::Tensor activation);
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std::tuple<torch::Tensor, torch::Tensor> symmetric_quantize_per_tensor(torch::Tensor input);
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std::tuple<torch::Tensor, torch::Tensor> symmetric_static_quantize_weight(torch::Tensor weight, torch::Tensor scales);
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std::tuple<torch::Tensor, torch::Tensor> symmetric_static_quantize_activation(
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torch::Tensor activation, torch::Tensor scales);
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std::tuple<torch::Tensor, torch::Tensor> symmetric_static_quantize_per_tensor(
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torch::Tensor input, torch::Tensor scales);
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torch::Tensor symmetric_dequantize_weight(torch::Tensor weight, torch::Tensor scales);
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torch::Tensor symmetric_dequantize_activation(torch::Tensor activation, torch::Tensor scales);
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torch::Tensor symmetric_dequantize_per_tensor(torch::Tensor input, torch::Tensor scales);
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} // namespace torch_ext
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TRTLLM_NAMESPACE_END
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