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https://github.com/NVIDIA/TensorRT-LLM.git
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f0dc746738
Signed-off-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com> Signed-off-by: Tracin <10434017+Tracin@users.noreply.github.com> Signed-off-by: Fanrong Li <23290157+lfr-0531@users.noreply.github.com> Co-authored-by: Perkz Zheng <67892460+PerkzZheng@users.noreply.github.com> Co-authored-by: Tracin <10434017+Tracin@users.noreply.github.com>
81 lines
2.8 KiB
C++
81 lines
2.8 KiB
C++
/*
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* Copyright (c) 2022-2025, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <cstdint>
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#include <cuda_runtime.h>
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#include <sstream>
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#include <string>
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#include <tuple>
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namespace tensorrt_llm
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{
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namespace kernels
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{
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struct SparseAttentionParams
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{
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int32_t* sparse_kv_indices{nullptr}; // [num_kv_heads, num_sparse_kv_indices]
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int32_t* sparse_attn_indices{nullptr}; // [num_kv_heads, num_sparse_attn_indices]
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int32_t* sparse_kv_offsets{nullptr}; // [num_contexts + 1]
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int32_t* sparse_attn_offsets{nullptr}; // [num_generations + 1]
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int32_t sparse_mla_topk{0}; // for DSA attention
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void* sparse_mla_kv_cache_pool{nullptr}; // for DSA attention
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std::string toString() const
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{
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std::stringstream ss;
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ss << "sparse_kv_indices: " << this->sparse_kv_indices << std::endl
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<< "sparse_attn_indices: " << this->sparse_attn_indices << std::endl
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<< "sparse_kv_offsets: " << this->sparse_kv_offsets << std::endl
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<< "sparse_attn_offsets: " << this->sparse_attn_offsets << std::endl
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<< "sparse_mla_topk: " << this->sparse_mla_topk << std::endl
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<< "sparse_mla_kv_cache_pool: " << this->sparse_mla_kv_cache_pool << std::endl;
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return ss.str();
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}
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};
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struct Pair
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{
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int32_t max_val;
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int32_t sum_val;
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};
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struct PairReduceOp
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{
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#if defined(__CUDACC__)
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inline __device__
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#endif
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Pair
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operator()(Pair const& a, Pair const& b) const
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{
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Pair result;
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result.max_val = a.max_val > b.max_val ? a.max_val : b.max_val;
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result.sum_val = a.sum_val + b.sum_val;
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return result;
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}
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};
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void invokeGatherKvPageOffsets(int32_t* output_kv_page_offsets, // [num_head_kv, batch_size, 2, max_num_pages_per_seq]
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int32_t* output_seq_lengths, // [num_head_kv, batch_size]
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int32_t const* kv_page_offsets, // [batch_size, 2, max_num_pages_per_seq]
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int32_t const* seq_lengths, // [batch_size]
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SparseAttentionParams const sparse_params, int32_t const batch_size, int32_t const num_head_kv,
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int32_t const tokens_per_page, int32_t const max_num_pages_per_seq, cudaStream_t stream);
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} // namespace kernels
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} // namespace tensorrt_llm
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