mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
synced 2026-01-14 06:27:45 +08:00
235 lines
8.5 KiB
C++
235 lines
8.5 KiB
C++
/*
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* Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <vector>
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// clang-format off
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#include "trtllmGen_gemm_export/GemmInterface.h"
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#include "trtllmGen_gemm_export/GemmOptions.h"
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#include "trtllmGen_gemm_export/trtllm/gen/DtypeDecl.h"
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// clang-format on
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#include "KernelRunner.h"
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#include "tensorrt_llm/common/assert.h"
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#include "tensorrt_llm/common/cudaUtils.h"
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#include "tensorrt_llm/common/envUtils.h"
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namespace tensorrt_llm
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{
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namespace kernels
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{
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namespace tg = gemm::trtllm::gen;
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using namespace gemm::gemm;
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static GemmInterface::ModuleCache globalTrtllmGenGemmModuleCache;
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constexpr bool isSMCompatible(int gpuSM, SmVersion kernelSM)
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{
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if (gpuSM == 103)
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{
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return kernelSM == SmVersion::Sm103a || kernelSM == SmVersion::Sm100f;
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}
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else if (gpuSM == 100)
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{
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return kernelSM == SmVersion::Sm100a || kernelSM == SmVersion::Sm100f;
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}
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else if (gpuSM == 90)
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{
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return kernelSM == SmVersion::Sm90a;
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}
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return true;
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}
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TrtllmGenGemmRunner::TrtllmGenGemmRunner(TrtllmGenGemmRunnerOptions const& options_)
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: mOptions(options_)
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{
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// Select a GEMM kernel config to use
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auto const gemm = GemmInterface();
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auto const configs = gemm.getGemmConfigs();
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mPassingConfigIndices.clear();
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int gpuNativeSmVersion = tensorrt_llm::common::getSMVersion();
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for (size_t i = 0; i < gemm.getNumGemmConfigs(); ++i)
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{
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auto const options = configs[i].mOptions;
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// When we include low-latency kernels we can set transposeMmaOutput via constructor
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if (options.mDtypeA == mOptions.eltTypeA && options.mDtypeC == mOptions.outputType
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&& options.mUseDeepSeekFp8 == mOptions.deepSeekFp8
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&& options.mTransposeMmaOutput == mOptions.transposeMmaOutput
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&& (mOptions.eltTypeB == gemm::trtllm::gen::Dtype::Void || options.mDtypeB == mOptions.eltTypeB)
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&& isSMCompatible(gpuNativeSmVersion, configs[i].mSm))
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{
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mPassingConfigIndices.push_back(i);
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}
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}
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TLLM_CHECK_WITH_INFO(mPassingConfigIndices.size() != 0, "No kernel found for the given output type");
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}
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size_t TrtllmGenGemmRunner::getWorkspaceSizeInBytes(int32_t m, int32_t n, int32_t k)
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{
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GemmData gemmData;
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gemmData.mProblemDimensions.mM = mOptions.transposeMmaOutput ? n : m;
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gemmData.mProblemDimensions.mN = mOptions.transposeMmaOutput ? m : n;
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gemmData.mProblemDimensions.mK = k;
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gemmData.mProblemDimensions.mRank = 0;
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gemmData.mProblemDimensions.mWorldSize = 1;
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selectGemmConfig(m, n, k);
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auto gemm = GemmInterface();
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auto const configs = gemm.getGemmConfigs();
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TLLM_CHECK_WITH_INFO(
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mSelectedConfigIndex.has_value(), "No valid kernel found for given param config and problem size");
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auto const config = configs[mSelectedConfigIndex.value()];
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return gemm.getWorkspaceSizeInBytes(config, gemmData);
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}
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void TrtllmGenGemmRunner::run(int32_t m, int32_t n, int32_t k, void const* a, float const* aScale, void const* b,
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float const* bScale, void* c, float* cScale, float* cScalePtr, void* workspace, CUstream stream, int device)
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{
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auto gemm = GemmInterface();
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GemmData gemmData;
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auto const configs = gemm.getGemmConfigs();
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TLLM_CHECK_WITH_INFO(
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mSelectedConfigIndex.has_value(), "No valid kernel found for given param config and problem size");
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auto const& config = configs[mSelectedConfigIndex.value()];
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// Dims
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gemmData.mProblemDimensions.mM = mOptions.transposeMmaOutput ? n : m;
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gemmData.mProblemDimensions.mN = mOptions.transposeMmaOutput ? m : n;
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gemmData.mProblemDimensions.mK = k;
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gemmData.mProblemDimensions.mRank = 0;
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gemmData.mProblemDimensions.mWorldSize = 1;
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// Inputs
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gemmData.mInputBuffers.mPtrA = mOptions.transposeMmaOutput ? b : a;
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gemmData.mInputBuffers.mPtrSfA = mOptions.transposeMmaOutput ? bScale : aScale;
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gemmData.mInputBuffers.mPtrB = mOptions.transposeMmaOutput ? a : b;
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gemmData.mInputBuffers.mPtrSfB = mOptions.transposeMmaOutput ? aScale : bScale;
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gemmData.mInputBuffers.mPtrScaleC = cScale;
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// Outputs
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gemmData.mOutputBuffers.mPtrC = c;
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gemmData.mOutputBuffers.mPtrSfC = cScalePtr;
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int32_t multiProcessorCount;
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cudaDeviceGetAttribute(&multiProcessorCount, cudaDevAttrMultiProcessorCount, device);
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// FIXME once we start using all-reduce in the epilogue of the gemm this can be moved elsewhere
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gemm.runInitBeforeWorldSync(config, gemmData, static_cast<void*>(stream));
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auto const err = gemm.run(config, workspace, gemmData, static_cast<void*>(stream), multiProcessorCount,
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tensorrt_llm::common::getEnvEnablePDL(), globalTrtllmGenGemmModuleCache);
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TLLM_CHECK_WITH_INFO(err == 0, "Error occurred when running GEMM!");
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}
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void TrtllmGenGemmRunner::run(int32_t m, int32_t n, int32_t k, void const* a, void const* b, void* c, float* cScale,
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void* workspace, CUstream stream, int device)
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{
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run(m, n, k, a, /*aScale*/ nullptr, b, /*bScale*/ nullptr, c, cScale, /*cScalePtr*/ nullptr, workspace, stream,
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device);
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}
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void TrtllmGenGemmRunner::selectGemmConfig(int32_t m, int32_t n, int32_t k)
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{
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auto const gemm = GemmInterface();
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auto const configs = gemm.getGemmConfigs();
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GemmData gemmData;
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// Dims
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gemmData.mProblemDimensions.mM = mOptions.transposeMmaOutput ? n : m;
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gemmData.mProblemDimensions.mN = mOptions.transposeMmaOutput ? m : n;
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gemmData.mProblemDimensions.mK = k;
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gemmData.mProblemDimensions.mRank = 0;
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gemmData.mProblemDimensions.mWorldSize = 1;
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std::vector<int32_t> sortedIndices = mPassingConfigIndices;
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std::sort(sortedIndices.begin(), sortedIndices.end(),
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[&configs, &gemmData](int32_t idx0, int32_t idx1)
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{
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auto const& optionsA = configs[idx0].mOptions;
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auto const& optionsB = configs[idx1].mOptions;
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// Choose the tileN that is closest to the problem N. Also if one tileN is larger and the other is smaller,
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// prefer the larger one. This is the batch size dimension for low latency (transposeMmaOutput) case;
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if (optionsA.mTileN != optionsB.mTileN)
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{
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auto const N = gemmData.mProblemDimensions.mN;
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auto const tileA = optionsA.mTileN;
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auto const tileB = optionsB.mTileN;
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// If one tile is larger than N and one is smaller, prefer the larger one
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if ((tileA >= N) != (tileB >= N))
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{
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return tileA > tileB;
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}
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// Otherwise, choose the closest to N
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return abs(N - tileA) < abs(N - tileB);
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}
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// Sort by tileK sizes
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if (optionsA.mTileK != optionsB.mTileK)
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{
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return optionsA.mTileK > optionsB.mTileK;
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}
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// Then by unroll loop 2x for mma
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if (optionsA.mUseUnrollLoop2xForMma != optionsB.mUseUnrollLoop2xForMma)
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{
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return optionsA.mUseUnrollLoop2xForMma;
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}
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// Sort by tileM sizes
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// This is the batch size dimension for throughput (non-transposeMmaOutput) case;
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if (optionsA.mTileM != optionsB.mTileM)
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{
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return optionsA.mTileM > optionsB.mTileM;
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}
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// Then by splitK sizes
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if (optionsA.mNumSlicesForSplitK != optionsB.mNumSlicesForSplitK)
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{
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return optionsA.mNumSlicesForSplitK > optionsB.mNumSlicesForSplitK;
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}
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return true;
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});
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for (auto const& configIndex : sortedIndices)
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{
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auto const& config = configs[configIndex];
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// FIXME: We select the first valid config,
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// but must instead choose the "best" config based on some heruistics.
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auto isValidConfig = gemm.isValidConfig(config, gemmData);
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if (isValidConfig)
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{
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mSelectedConfigIndex = configIndex;
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return;
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}
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}
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}
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} // namespace kernels
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} // namespace tensorrt_llm
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