yifeizhang-c 5521c7b7e7 [TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130) ... Added FP8 cute dsl gemm and batch gemm. Signed-off-by: Yifei Zhang <219273404+yifeizhang-c@users.noreply.github.com>		2026-02-06 09:49:30 +08:00
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__init__.py	[None][feat] Integrate cuda.tile RMS norm kernels (#9725)	2026-02-02 19:44:27 +08:00
cpp_custom_ops.py	[TRTLLM-9390][chore] Add Fake OPs for One-Sided AlltoAll. (#11002)	2026-01-27 15:55:07 +08:00
cuda_tile_custom_ops.py	[None][feat] Integrate cuda.tile RMS norm kernels (#9725)	2026-02-02 19:44:27 +08:00
cute_dsl_custom_ops.py	[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)	2026-02-06 09:49:30 +08:00
flashinfer_custom_ops.py	[TRTC-1943][feat] Env vars override support in LLM API (#9104)	2025-12-01 10:04:49 -08:00
torch_custom_ops.py	[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)	2026-02-06 09:49:30 +08:00
trtllm_gen_custom_ops.py	[TRTLLM-10398][feat] Enable TRTLLM moe backend for Nemotron Super (#10791)	2026-01-31 13:48:25 +08:00
userbuffers_custom_ops.py	feat: Introduce UB allocator for pytorch flow (#3257)	2025-04-08 18:39:49 +08:00