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9bd15f1937
* TensorRT-LLM Release 0.10.0 --------- Co-authored-by: Loki <lokravi@amazon.com> Co-authored-by: meghagarwal <16129366+megha95@users.noreply.github.com>
87 lines
2.6 KiB
C++
87 lines
2.6 KiB
C++
/*
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* Copyright (c) 2019-2024, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2021, NAVER Corp. Authored by CLOVA.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include "tensorrt_llm/common/tensor.h"
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#include "tensorrt_llm/kernels/decodingCommon.h"
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#include "tensorrt_llm/layers/baseLayer.h"
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#include "tensorrt_llm/layers/samplingParams.h"
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#include "tensorrt_llm/runtime/common.h"
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namespace tc = tensorrt_llm::common;
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namespace tensorrt_llm
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{
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namespace layers
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{
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//! \brief Layer to randomly sample tokens from TopP logits.
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//! Layer expects probs precomputed in "logits" tensor
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template <typename T>
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class TopPSamplingLayer : public BaseLayer
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{
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using Base = BaseLayer;
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public:
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TopPSamplingLayer(DecoderDomain const& decoderDomain, cudaStream_t stream,
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std::shared_ptr<tensorrt_llm::common::IAllocator> allocator, bool isDeterministic = true,
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bool isAirTopP = true);
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~TopPSamplingLayer();
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void setup(runtime::SizeType32 batchSize, runtime::SizeType32 beamWidth, runtime::SizeType32 const* batchSlots,
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std::shared_ptr<BaseSetupParams> setupParams) override;
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void forward(std::shared_ptr<BaseOutputParams> outputs, std::shared_ptr<BaseInputParams> inputs) override;
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bool const* getSkipDecodeHost() const
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{
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return mSkipDecodeHost;
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}
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protected:
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runtime::SizeType32* mRuntimeTopKDevice{nullptr};
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float* mRuntimeTopPDevice{nullptr};
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float mRuntimeMaxTopP{0.f};
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float* mInitialTopPDevice{nullptr};
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float* mTopPDecayDevice{nullptr};
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float* mTopPMinDevice{nullptr};
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runtime::TokenIdType* mTopPResetIdsDevice{nullptr};
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void* mSetupWorkspaceDevice{nullptr};
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bool* mSkipDecodeDevice{nullptr};
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bool* mSkipDecodeHost{nullptr};
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runtime::SizeType32 mAirTopPBlockNum{0};
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cudaDeviceProp mDeviceProp;
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bool mIsDeterministic{true};
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bool mIsAirTopP{false};
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using Base::mWorkspaceSize;
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using Base::mAllocatedSize;
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using Base::mStream;
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using Base::mAllocator;
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using Base::mDecoderDomain;
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private:
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void allocateBuffer(runtime::SizeType32 batchSize);
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void freeBuffer();
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};
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} // namespace layers
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} // namespace tensorrt_llm
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