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41 lines
1.5 KiB
C++
41 lines
1.5 KiB
C++
/*
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* Copyright (c) 2019-2025, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2021, NAVER Corp. Authored by CLOVA.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include "tensorrt_llm/common/config.h"
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#include <cuda_bf16.h>
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#include <cuda_fp16.h>
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#include "tensorrt_llm/common/cudaUtils.h"
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TRTLLM_NAMESPACE_BEGIN
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namespace kernels
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{
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void invokeIndexerTopKDecode(float const* logits, int const* seqLens, int* indices, float* outLogitsAux,
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int* outIndicesAux, int const splitWorkThreshold, int const numRows, int const numColumns, int const stride0,
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int const stride1, int const next_n, int const topK = 2048, cudaStream_t const stream = 0);
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void invokeIndexerTopKPrefill(float const* logits, int const* rowStarts, int const* rowEnds, int* indices,
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int const numRows, int const numColumns, int const stride0, int const stride1, int const topK = 2048,
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cudaStream_t const stream = 0);
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} // namespace kernels
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TRTLLM_NAMESPACE_END
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