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a8310b01dc
* feat: trtllm-gen fp4 GEMM Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com> * Clean up Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com> * Remove incorrect header Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com> * Reviewer comment Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com> --------- Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com>
106 lines
3.4 KiB
C++
106 lines
3.4 KiB
C++
/*
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* Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <vector>
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#include "KernelRunner.h"
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#include "tensorrt_llm/common/assert.h"
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#include "trtllmGen_export/GemmInterface.h"
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namespace tensorrt_llm
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{
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namespace kernels
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{
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TrtllmGenGemmRunner::TrtllmGenGemmRunner(tg::Dtype eltType, tg::Dtype outputType)
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: mEltType(eltType)
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, mOutputType(outputType)
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{
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// Select a GEMM kernel config to use
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auto const gemm = gemm::GemmInterface();
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auto const configs = gemm.getGemmConfigs();
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std::vector<int32_t> selectedIndex;
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for (size_t i = 0; i < gemm.getNumGemmConfigs(); ++i)
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{
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auto const options = configs[i].mOptions;
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// When we include low-latency kernels we can set transposeMmaOutput via constructor
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if (options.mDtypeElt == eltType && options.mDtypeC == outputType && !options.mTransposeMmaOutput)
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{
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selectedIndex.push_back(i);
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}
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}
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TLLM_CHECK_WITH_INFO(selectedIndex.size() != 0, "No kernel found for the given output type");
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TLLM_CHECK_WITH_INFO(selectedIndex.size() == 1, "Multiple kernels found for the given output type");
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mGemmConfig = &configs[selectedIndex[0]];
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}
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size_t TrtllmGenGemmRunner::getWorkspaceSizeInBytes(
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int32_t m, int32_t n, int32_t k, tg::Dtype eltType, tg::Dtype outputType) const
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{
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gemm::GemmData gemmData;
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gemmData.mProblemDimensions.mM = m;
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gemmData.mProblemDimensions.mN = n;
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gemmData.mProblemDimensions.mK = k;
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auto gemm = gemm::GemmInterface();
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return gemm.getWorkspaceSizeInBytes(*mGemmConfig, gemmData);
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}
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void TrtllmGenGemmRunner::run(int32_t m, int32_t n, int32_t k, void const* a, float const* aScale, void const* b,
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float const* bScale, void* c, float* cScale, void* workspace, CUstream stream, int device)
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{
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auto gemm = gemm::GemmInterface();
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gemm::GemmData gemmData;
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// Dims
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gemmData.mProblemDimensions.mM = m;
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gemmData.mProblemDimensions.mN = n;
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gemmData.mProblemDimensions.mK = k;
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// Inputs
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gemmData.mInputBuffers.mPtrA = a;
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gemmData.mInputBuffers.mPtrSfA = aScale;
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gemmData.mInputBuffers.mPtrB = b;
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gemmData.mInputBuffers.mPtrSfB = bScale;
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gemmData.mInputBuffers.mPtrScaleC = cScale;
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// Outputs
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gemmData.mOutputBuffers.mPtrC = c;
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auto isValidConfig = gemm.isValidConfig(*mGemmConfig, gemmData);
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TLLM_CHECK_WITH_INFO(isValidConfig, "Invalid GEMM config selected!");
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cudaDeviceProp deviceProperties;
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cudaGetDeviceProperties(&deviceProperties, device);
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// FIXME once we start using all-reduce in the epilogue of the gemm this can be moved elsewhere
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gemm.runInitBeforeWorldSync(*mGemmConfig, gemmData, static_cast<void*>(stream));
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auto const err = gemm.run(*mGemmConfig, workspace, gemmData, static_cast<void*>(stream), deviceProperties);
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TLLM_CHECK_WITH_INFO(err == 0, "Error occurred when running GEMM!");
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}
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} // namespace kernels
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} // namespace tensorrt_llm
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