dongjiyingdjy 17e0d0fb1a fix: fix illeagel memory access (#6437) ... Signed-off-by: Jiying Dong <87510204+dongjiyingdjy@users.noreply.github.com>		2025-07-31 10:01:34 +08:00
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__init__.py	feat: Add group_rms_norm kernel to normalize multiple inputs in a single operator. (#3438)	2025-05-02 13:25:30 +08:00
flashinfer.py	fix: Flush stale PlanParams with custom attention mask (#6163)	2025-07-21 09:55:09 +08:00
interface.py	feat: TRTLLM-6450 update long rope for phi3.5/phi4-mini/phi4-mm (#6353)	2025-07-30 09:20:16 -07:00
star_flashinfer.py	Remove dummy forward path (#3669)	2025-04-18 16:17:50 +08:00
trtllm.py	fix: fix illeagel memory access (#6437)	2025-07-31 10:01:34 +08:00
utils.py	[feat] Integrate Hopper chunked attention kernels (#4330)	2025-05-22 17:10:57 -04:00
vanilla.py	fix: Investigate Gemma3 1B decoder output discrepancy (#5564)	2025-07-04 13:14:13 +08:00