TensorRT-LLMs/tests/integration/defs/disaggregated
Venky b3146d095d
[TRTC-122][feat] Eagle3 Specdec UX improvements (#10124)
Signed-off-by: Venky Ganesh <23023424+venkywonka@users.noreply.github.com>
2026-01-22 07:24:11 -08:00
..
test_configs [https://nvbugs/5689235][fix] Fix cancellation+chunked prefill+disagg (#10111) 2026-01-12 18:23:26 -05:00
test_auto_scaling.py [https://nvbugs/5649010][fix] use 0 port as arbitrary port when disagg service discovery is enabled (#10383) 2026-01-05 09:40:40 +08:00
test_disaggregated_etcd.py [TRTC-102][docs] --extra_llm_api_options->--config in docs/examples/tests (#10005) 2025-12-19 13:48:43 -05:00
test_disaggregated_single_gpu.py [TRTC-122][feat] Eagle3 Specdec UX improvements (#10124) 2026-01-22 07:24:11 -08:00
test_disaggregated.py [https://nvbugs/5769890][fix] enable system memory to transfer active message in NIXL ucx (#10602) 2026-01-19 09:20:12 +08:00
test_workers.py [https://nvbugs/5703953][fix] Preserving ip:port for trtllm-serve before initializing llm (#9646) 2025-12-06 20:13:48 -08:00