yunruis b99c5ce8c1 Feat/ds r1 min latency opt round3, add router gemm, fused a gemm, PDL (#4560) ... Signed-off-by: yunruis <yunruis@nvidia.com> Signed-off-by: kduan <176893526+Kefeng-Duan@users.noreply.github.com> Signed-off-by: Kefeng-Duan <176893526+Kefeng-Duan@users.noreply.github.com> Co-authored-by: kduan <176893526+Kefeng-Duan@users.noreply.github.com>		2025-06-14 17:36:22 +08:00
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__init__.py	feat: Add group_rms_norm kernel to normalize multiple inputs in a single operator. (#3438)	2025-05-02 13:25:30 +08:00
cpp_custom_ops.py	Feat/ds r1 min latency opt round3, add router gemm, fused a gemm, PDL (#4560)	2025-06-14 17:36:22 +08:00
flashinfer_custom_ops.py	Cherry pick feat/llama4 to main (#4739)	2025-05-30 05:28:40 +08:00
torch_custom_ops.py	[TRTLLM-5589] feat: Integrate TRT-LLM Gen FP8 Batched GEMM with Pytorch workflow kernel autotuner (#4872)	2025-06-09 11:02:48 +01:00
userbuffers_custom_ops.py	feat: Introduce UB allocator for pytorch flow (#3257)	2025-04-08 18:39:49 +08:00