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https://github.com/NVIDIA/TensorRT-LLM.git
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e71de2a13e
Signed-off-by: Barry Kang <43644113+Barry-Delaney@users.noreply.github.com> Signed-off-by: Omer Ullman Argov <118735753+omera-nv@users.noreply.github.com> Co-authored-by: Barry Kang <43644113+Barry-Delaney@users.noreply.github.com>
44 lines
1.3 KiB
C++
44 lines
1.3 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <stdint.h>
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#include <cuda_fp16.h>
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#include <cuda_fp8.h>
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#include <cuda_runtime.h>
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#include <cuda_runtime_api.h>
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#if defined(ENABLE_BF16)
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#include <cuda_bf16.h>
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#endif
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#include <type_traits>
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#include <vector>
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namespace tensorrt_llm
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{
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namespace kernels
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{
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template <typename T_in, typename T_out = T_in>
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void apply_per_channel_scale_kernel_launcher(T_out* smoothed_act, T_in const* act, T_in const* per_channel_scale,
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int rows, int cols, int64_t const* num_valid_tokens_ptr = nullptr, cudaStream_t stream = 0);
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} // namespace kernels
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} // namespace tensorrt_llm
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