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attention_backend
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[None][feat] Initial PR for trtllm-gen attention backend (#10784)
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2026-02-11 17:16:52 +08:00 |
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auto_deploy
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[#11203][feat] AutoDeploy: Refactor node caching and improve engine build time (#11250)
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2026-02-10 13:35:44 -08:00 |
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compilation
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[None][chore] Mass merge commits from release/1.2.0rc6.post1 branch (#11384)
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2026-02-10 14:00:42 +08:00 |
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configs
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[TRTLLM-8535][feat] Support DeepSeek V3.2 with FP8 + BF16 KV cache/NVFP4 + BF16 KV cache (#8405)
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2025-10-24 13:40:41 -04:00 |
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cuda_tile_kernels
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[None][feat] Integrate cuda.tile RMS norm kernels (#9725)
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2026-02-02 19:44:27 +08:00 |
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custom_ops
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[None][fix] Pre-Allocation for Auto-Tuning NCCL_SYMMETRIC (#11326)
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2026-02-12 14:31:51 -08:00 |
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cute_dsl_kernels
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[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)
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2026-02-06 09:49:30 +08:00 |
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debug
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disaggregation
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[None][fix] Avoid reserved filename on Windows (#11382)
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2026-02-10 11:22:59 +08:00 |
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distributed
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[TRTLLM-10264][feat] Support attention DP + Helix CP (#10477)
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2026-01-29 02:57:13 -05:00 |
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models
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[None][feat] Optimize NemotronH model with elementwise and nvfp4 fusion (#11273)
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2026-02-12 09:25:31 -05:00 |
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modules
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[None][feat] Optimize NemotronH model with elementwise and nvfp4 fusion (#11273)
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2026-02-12 09:25:31 -05:00 |
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peft
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[https://nvbugs/5322131][feat] Multi-LoRA serving with CUDA Graph (#8279)
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2026-01-22 14:01:18 +01:00 |
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pyexecutor
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[https://nvbugs/5888410][fix] Enable warmup for Helix CP (#11460)
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2026-02-12 14:24:51 -08:00 |
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shared_tensor
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speculative
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[https://nvbugs/5853720][fix] Disable cutedsl argmax kernel to fix perf regression (#11403)
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2026-02-10 18:10:38 +08:00 |
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__init__.py
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[TRTLLM-9212][chore] move MoeLoadBalancerConfig to llm_args.py (#9002)
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2025-11-13 10:47:35 +08:00 |
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async_llm.py
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[TRTLLM-9736][feat] AsyncLLM and verl integ (#9353)
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2025-12-11 09:33:25 -08:00 |
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autotuner.py
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[TRTLLM-10264][feat] Support attention DP + Helix CP (#10477)
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2026-01-29 02:57:13 -05:00 |
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cublaslt_utils.py
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[https://nvbugs/5451205][feat] Add cuBLASLt NVFP4 GEMM backend support (#7943)
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2025-10-23 15:55:10 +08:00 |
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cuda_tile_utils.py
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[None][feat] Integrate cuda.tile RMS norm kernels (#9725)
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2026-02-02 19:44:27 +08:00 |
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cute_dsl_utils.py
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device_mesh.py
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[TRTLLM-9465][fix] Swap TP-CP grouping order (#10350)
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2026-01-05 20:08:03 +08:00 |
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expert_statistic.py
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[TRTLLM-8831][feat] Enable early exit with overlap scheduler (#8587)
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2025-11-17 18:07:13 +01:00 |
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flashinfer_utils.py
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[TRTLLM-9578][feat] make PDL enabled by default (#9695)
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2025-12-25 07:15:24 -05:00 |
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hostfunc.py
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llm.py
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memory_buffer_utils.py
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[https://nvbugs/5811697][fix] Fix buffer reuse. (#10716)
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2026-01-25 18:12:21 +08:00 |
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metadata.py
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model_config.py
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[TRTLLM-9457][feat] Add cute dsl fp8 gemm for Blackwell (#10130)
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2026-02-06 09:49:30 +08:00 |
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utils.py
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[None][feat] Remove the hard code for activation type definition in T… (#11164)
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2026-02-11 21:50:45 +08:00 |
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virtual_memory.py
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[TRTLLM-9736][feat] AsyncLLM and verl integ (#9353)
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2025-12-11 09:33:25 -08:00 |
