qsang-nv e9cd810071 keep sm90 headsize 128 cubins (#5320) ... Signed-off-by: Qidi Sang <200703406+qsang-nv@users.noreply.github.com>		2025-06-26 12:14:01 +08:00
..
cmake	feat: NIXL interface integration (#3934)	2025-05-19 18:18:22 +08:00
include/tensorrt_llm	refactor: manage cache indirection in decoder state (#5315)	2025-06-24 09:15:59 +02:00
kernels	keep sm90 headsize 128 cubins (#5320)	2025-06-26 12:14:01 +08:00
micro_benchmarks	[TRTLLM-5330] perf: Optimize MoE supplementary kernels for large-scale EP (#5215)	2025-06-17 15:23:24 +08:00
tensorrt_llm	keep sm90 headsize 128 cubins (#5320)	2025-06-26 12:14:01 +08:00
tests	Add unit test for routing kernels (#5405)	2025-06-26 09:49:11 +08:00
CMakeLists.txt	[Infra] - Update dependencies with NGC PyTorch 25.05 and TRT 10.11 (#4885)	2025-06-17 23:48:34 +08:00
conandata.yml	infra: add conan (#3744)	2025-04-30 11:53:14 -07:00
conanfile.py	feat: large-scale EP(part 6: Online EP load balancer integration for GB200 nvfp4) (#4818)	2025-06-08 10:25:18 +08:00
libnuma_conan.py	fix cuda driver link issue with driver version less than 12.3 (#5025)	2025-06-10 15:27:39 +08:00