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https://github.com/NVIDIA/TensorRT-LLM.git
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f430a4b447
* Update TensorRT-LLM --------- Co-authored-by: IbrahimAmin <ibrahimamin532@gmail.com> Co-authored-by: Fabian Joswig <fjosw@users.noreply.github.com> Co-authored-by: Pzzzzz <hello-cd.plus@hotmail.com> Co-authored-by: CoderHam <hemant@cohere.com> Co-authored-by: Konstantin Lopuhin <kostia.lopuhin@gmail.com>
72 lines
2.0 KiB
C++
72 lines
2.0 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION &
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* AFFILIATES. All rights reserved. SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <NvInferRuntime.h>
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namespace tensorrt_llm::plugins::utils
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{
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using DimType64 = int64_t;
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inline DimType64 computeMDimension(bool transA, nvinfer1::Dims const& dims)
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{
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DimType64 M{1};
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if (transA)
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{
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for (int i = dims.nbDims - 1; i > 0; --i)
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{
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M *= dims.d[i];
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}
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}
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else
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{
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for (int i = 0; i < dims.nbDims - 1; ++i)
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{
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M *= dims.d[i];
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}
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}
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return M;
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}
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inline DimType64 computeNDimension(bool transB, nvinfer1::Dims const& dims)
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{
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DimType64 N{1};
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if (transB)
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{
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for (int32_t i = 0; i < dims.nbDims - 1; ++i)
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{
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N *= dims.d[i];
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}
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}
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else
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{
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for (int32_t i = dims.nbDims - 1; i > 0; --i)
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{
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N *= dims.d[i];
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}
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}
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return N;
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}
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#define TLLM_INT32_CAST(value) \
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((value > 0x7FFFFFFFLL || value < -0x80000000LL) \
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? (TLLM_LOG_ERROR("Value of " #value " is out of range for int32_t"), 0) \
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: static_cast<int32_t>(value))
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} // namespace tensorrt_llm::plugins::utils
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