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https://github.com/NVIDIA/TensorRT-LLM.git
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f430a4b447
* Update TensorRT-LLM --------- Co-authored-by: IbrahimAmin <ibrahimamin532@gmail.com> Co-authored-by: Fabian Joswig <fjosw@users.noreply.github.com> Co-authored-by: Pzzzzz <hello-cd.plus@hotmail.com> Co-authored-by: CoderHam <hemant@cohere.com> Co-authored-by: Konstantin Lopuhin <kostia.lopuhin@gmail.com>
98 lines
4.3 KiB
C++
98 lines
4.3 KiB
C++
/*
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "tensorrt_llm/kernels/convertSpecDecodingMaskToPackedMask.h"
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#include "tensorrt_llm/thop/thUtils.h"
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namespace th = torch;
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namespace torch_ext
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{
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void convertSpecDecodingMaskToPackedMask(torch::Tensor specDecodingGenerationLengthsTensor,
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torch::Tensor specDecodingMaskTensor, int64_t maxSpecDecodingTokens, torch::Tensor specDecodingPackedMaskTensor,
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torch::optional<int64_t> stream_ptr = torch::nullopt)
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{
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TLLM_CHECK_WITH_INFO(
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at::cuda::is_available(), "convert_spec_decoding_mask_to_packed_mask should be called with cuda enabled.");
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cudaStream_t stream;
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if (stream_ptr.has_value())
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{
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stream = reinterpret_cast<cudaStream_t>(stream_ptr.value());
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}
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else
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{
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stream = at::cuda::getCurrentCUDAStream();
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}
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TLLM_CHECK_WITH_INFO(specDecodingGenerationLengthsTensor.dim() == 1
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&& specDecodingGenerationLengthsTensor.scalar_type() == torch::kInt,
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"spec_decoding_generation_lengths tensor should be 1D int tensor.");
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TLLM_CHECK_WITH_INFO(specDecodingMaskTensor.dim() == 3 && specDecodingMaskTensor.scalar_type() == torch::kBool,
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"spec_decoding_mask tensor should be 3D bool tensor.");
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TLLM_CHECK_WITH_INFO(
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specDecodingPackedMaskTensor.dim() == 2 && specDecodingPackedMaskTensor.scalar_type() == torch::kInt,
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"spec_decoding_packed_mask tensor should be 2D int tensor.");
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int batchSize = specDecodingGenerationLengthsTensor.size(0);
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int64_t scanTempMemoryBytes
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= tensorrt_llm::kernels::invokeScanSpecDecodingGenerationLenghtsTempStorageBytes(batchSize, stream);
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int64_t reduceMaxTempMemoryBytes
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= tensorrt_llm::kernels::invokeReduceMaxSpecDecodingGenerationLengthsTempStorageBytes(batchSize, stream);
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torch::Tensor scanTempMemoryStorage = torch::empty(
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{
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scanTempMemoryBytes,
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},
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torch::dtype(torch::kInt8).device(torch::kCUDA).requires_grad(false));
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torch::Tensor reduceMaxTempMemoryStorage = torch::empty(
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{
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reduceMaxTempMemoryBytes,
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},
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torch::dtype(torch::kInt8).device(torch::kCUDA).requires_grad(false));
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torch::Tensor scanedSpecDecodingGenerationLengths = torch::empty(
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{
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batchSize,
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},
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torch::dtype(torch::kInt).device(torch::kCUDA).requires_grad(false));
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torch::Tensor maxSpecDecodingGenerationLengths = torch::empty(
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{
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1,
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},
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torch::dtype(torch::kInt).device(torch::kCUDA).requires_grad(false));
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tensorrt_llm::kernels::invokeScanSpecDecodingGenerationLenghths(batchSize,
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specDecodingGenerationLengthsTensor.data_ptr<int>(),
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reinterpret_cast<void*>(scanTempMemoryStorage.data_ptr<int8_t>()), scanTempMemoryBytes,
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scanedSpecDecodingGenerationLengths.data_ptr<int>(),
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reinterpret_cast<void*>(reduceMaxTempMemoryStorage.data_ptr<int8_t>()), reduceMaxTempMemoryBytes,
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maxSpecDecodingGenerationLengths.data_ptr<int>(), stream);
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int hostMaxSpecDecodingGenerationLengths;
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cudaMemcpyAsync(&hostMaxSpecDecodingGenerationLengths, maxSpecDecodingGenerationLengths.data_ptr<int>(),
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sizeof(int), cudaMemcpyDeviceToHost, stream);
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tensorrt_llm::kernels::invokeConvertSpecDecodingMaskToPackedMask(batchSize,
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scanedSpecDecodingGenerationLengths.data_ptr<int>(), specDecodingMaskTensor.data_ptr<bool>(),
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maxSpecDecodingTokens, hostMaxSpecDecodingGenerationLengths, specDecodingPackedMaskTensor.data_ptr<int>(),
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stream);
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}
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} // namespace torch_ext
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static auto convert_spec_decoding_mask_to_packed_mask = torch::RegisterOperators(
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"tensorrt_llm::convert_spec_decoding_mask_to_packed_mask", &torch_ext::convertSpecDecodingMaskToPackedMask);
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