mirror of
https://github.com/NVIDIA/TensorRT-LLM.git
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80 lines
2.8 KiB
C++
80 lines
2.8 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "rnnStateBuffers.h"
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#include "tensorrt_llm/batch_manager/llmRequest.h"
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#include "tensorrt_llm/batch_manager/rnnStateManager.h"
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#include "tensorrt_llm/batch_manager/runtimeBuffers.h"
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#include "tensorrt_llm/common/nvtxUtils.h"
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#include "tensorrt_llm/runtime/tllmRuntime.h"
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#include "tensorrt_llm/runtime/utils/sessionUtils.h"
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using namespace tensorrt_llm::runtime;
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namespace tensorrt_llm::batch_manager
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{
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RnnStateBuffers::RnnStateBuffers(SizeType32 maxBatchSize, runtime::TllmRuntime const& runtime)
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{
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auto const& manager = runtime.getBufferManager();
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slotMappingHost = BufferManager::cpu(ITensor::makeShape({maxBatchSize}), nvinfer1::DataType::kINT32);
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slotMappingDevice = manager.gpu(ITensor::makeShape({maxBatchSize}), nvinfer1::DataType::kINT32);
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}
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void RnnStateBuffers::reshape(SizeType32 numSequences)
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{
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slotMappingHost->reshape(ITensor::makeShape({numSequences}));
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slotMappingDevice->reshape(ITensor::makeShape({numSequences}));
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}
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void RnnStateBuffers::fillSlotMappings(
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RequestVector const& contextRequests, rnn_state_manager::RnnStateManager* rnnStateManager)
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{
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TLLM_LOG_TRACE("%s start", __PRETTY_FUNCTION__);
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NVTX3_SCOPED_RANGE(rnnStateBuffersFillSlotMappings);
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SizeType32 batchIdx{0};
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for (auto const& llmReq : contextRequests)
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{
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auto const seqSlot = llmReq->mSeqSlot.value();
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auto const reqBeamWidth = llmReq->mSamplingConfig.beamWidth;
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rnnStateManager->fillSlotMapping(*slotMappingHost, batchIdx, seqSlot, reqBeamWidth);
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++batchIdx;
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}
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TLLM_LOG_TRACE("%s stop", __PRETTY_FUNCTION__);
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}
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void RnnStateBuffers::copySlotMappingH2D(runtime::TllmRuntime const& runtime)
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{
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auto const& manager = runtime.getBufferManager();
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manager.copy(*slotMappingHost, *slotMappingDevice);
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}
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void RnnStateBuffers::getBuffers(TensorMap& inputBuffers) const
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{
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TLLM_LOG_TRACE("%s start", __PRETTY_FUNCTION__);
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NVTX3_SCOPED_RANGE(rnnStateBuffersGetBuffers);
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inputBuffers.insert_or_assign("slot_mapping", slotMappingDevice);
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TLLM_LOG_TRACE("%s stop", __PRETTY_FUNCTION__);
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}
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} // namespace tensorrt_llm::batch_manager
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