- Further cleaned up register definitions

git-svn-id: http://cmock.svn.sourceforge.net/svnroot/cmock/trunk@39 bf332499-1b4d-0410-844d-d2d48d5cc64c
This commit is contained in:
greg-williams
2008-11-07 21:55:36 +00:00
parent ce521a6d78
commit 792f904e86
+34 -50
View File
@@ -2460,39 +2460,44 @@ typedef struct _AT91S_ADC {
// *****************************************************************************
// BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
// *****************************************************************************
#define AT91C_BASE_SYS ((AT91PS_SYS) 0xFFFFF000) // (SYS) Base Address
#ifdef TEST
extern AT91S_AIC AicPeripheral;
#define AT91C_BASE_AIC ((AT91PS_AIC) &AicPeripheral)
extern AT91S_AIC AicPeripheral;
extern AT91S_PIO PioAPeripheral;
extern AT91S_PIO PioBPeripheral;
extern AT91S_PMC PmcPeripheral;
extern AT91S_USART Usart0Peripheral;
extern AT91S_TC TimerCounter0Peripheral;
extern AT91S_ADC AdcPeripheral;
#define AIC_ADDR &AicPeripheral
#define PIOA_ADDR &PioAPeripheral
#define PIOB_ADDR &PioBPeripheral
#define PMC_ADDR &PmcPeripheral
#define US0_ADDR &Usart0Peripheral
#define TC0_ADDR &TimerCounter0Peripheral
#define ADC_ADDR &AdcPeripheral
#else
#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) // (AIC) Base Address
#define AIC_ADDR 0xFFFFF000
#define PIOA_ADDR 0xFFFFF400
#define PIOB_ADDR 0xFFFFF600
#define PMC_ADDR 0xFFFFFC00
#define US0_ADDR 0xFFFFFC00
#define TC0_ADDR 0xFFFFFC00
#define ADC_ADDR 0xFFFD8000
#endif // TEST
#define AT91C_BASE_SYS ((AT91PS_SYS) 0xFFFFF000) // (SYS) Base Address
#define AT91C_BASE_AIC ((AT91PS_AIC) AIC_ADDR) // (AIC) Base Address
#define AT91C_BASE_PDC_DBGU ((AT91PS_PDC) 0xFFFFF300) // (PDC_DBGU) Base Address
#define AT91C_BASE_DBGU ((AT91PS_DBGU) 0xFFFFF200) // (DBGU) Base Address
#ifdef TEST
extern AT91S_PIO PioAPeripheral;
#define AT91C_BASE_PIOA ((AT91PS_PIO) &PioAPeripheral)
#else
#define AT91C_BASE_PIOA ((AT91PS_PIO) 0xFFFFF400) // (PIOA) Base Address
#endif // TEST
#ifdef TEST
extern AT91S_PIO PioBPeripheral;
#define AT91C_BASE_PIOB ((AT91PS_PIO) &PioBPeripheral)
#else
#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) // (PIOB) Base Address
#endif // TEST
#ifdef TEST
extern AT91S_PMC PmcPeripheral;
#define AT91C_BASE_PMC ((AT91PS_PMC) &PmcPeripheral)
#else
#define AT91C_BASE_PMC ((AT91PS_PMC) 0xFFFFFC00) // (PMC) Base Address
#endif // TEST
#define AT91C_BASE_PIOA ((AT91PS_PIO) PIOA_ADDR) // (PIOA) Base Address
#define AT91C_BASE_PIOB ((AT91PS_PIO) PIOB_ADDR) // (PIOB) Base Address
#define AT91C_BASE_PMC ((AT91PS_PMC) PMC_ADDR) // (PMC) Base Address
#define AT91C_BASE_CKGR ((AT91PS_CKGR) 0xFFFFFC20) // (CKGR) Base Address
#define AT91C_BASE_RSTC ((AT91PS_RSTC) 0xFFFFFD00) // (RSTC) Base Address
#define AT91C_BASE_RTTC ((AT91PS_RTTC) 0xFFFFFD20) // (RTTC) Base Address
@@ -2507,14 +2512,7 @@ extern AT91S_PMC PmcPeripheral;
#define AT91C_BASE_PDC_US1 ((AT91PS_PDC) 0xFFFC4100) // (PDC_US1) Base Address
#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFC4000) // (US1) Base Address
#define AT91C_BASE_PDC_US0 ((AT91PS_PDC) 0xFFFC0100) // (PDC_US0) Base Address
#ifdef TEST
extern AT91S_USART Usart0Peripheral;
#define AT91C_BASE_US0 ((AT91PS_USART) &Usart0Peripheral)
#else
#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFC0000) // (US0) Base Address
#endif // TEST
#define AT91C_BASE_US0 ((AT91PS_USART) US0_ADDR) // (US0) Base Address
#define AT91C_BASE_PDC_SSC ((AT91PS_PDC) 0xFFFD4100) // (PDC_SSC) Base Address
#define AT91C_BASE_SSC ((AT91PS_SSC) 0xFFFD4000) // (SSC) Base Address
#define AT91C_BASE_TWI ((AT91PS_TWI) 0xFFFB8000) // (TWI) Base Address
@@ -2524,14 +2522,7 @@ extern AT91S_USART Usart0Peripheral;
#define AT91C_BASE_PWMC_CH0 ((AT91PS_PWMC_CH) 0xFFFCC200) // (PWMC_CH0) Base Address
#define AT91C_BASE_PWMC ((AT91PS_PWMC) 0xFFFCC000) // (PWMC) Base Address
#define AT91C_BASE_UDP ((AT91PS_UDP) 0xFFFB0000) // (UDP) Base Address
#ifdef TEST
extern AT91S_TC TimerCounter0Peripheral;
#define AT91C_BASE_TC0 ((AT91PS_TC) &TimerCounter0Peripheral)
#else
#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFA0000) // (TC0) Base Address
#endif // TEST
#define AT91C_BASE_TC0 ((AT91PS_TC) TC0_ADDR) // (TC0) Base Address
#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFA0040) // (TC1) Base Address
#define AT91C_BASE_TC2 ((AT91PS_TC) 0xFFFA0080) // (TC2) Base Address
#define AT91C_BASE_TCB ((AT91PS_TCB) 0xFFFA0000) // (TCB) Base Address
@@ -2544,14 +2535,7 @@ extern AT91S_TC TimerCounter0Peripheral;
#define AT91C_BASE_CAN_MB6 ((AT91PS_CAN_MB) 0xFFFD02C0) // (CAN_MB6) Base Address
#define AT91C_BASE_CAN_MB7 ((AT91PS_CAN_MB) 0xFFFD02E0) // (CAN_MB7) Base Address
#define AT91C_BASE_CAN ((AT91PS_CAN) 0xFFFD0000) // (CAN) Base Address
#ifdef TEST
extern AT91S_ADC AdcPeripheral;
#define AT91C_BASE_ADC ((AT91PS_ADC) &AdcPeripheral) // (ADC) Base Address
#else
#define AT91C_BASE_ADC ((AT91PS_ADC) 0xFFFD8000) // (ADC) Base Address
#endif
#define AT91C_BASE_ADC ((AT91PS_ADC) ADC_ADDR) // (ADC) Base Address
#define AT91C_BASE_EMAC ((AT91PS_EMAC) 0xFFFDC000) // (EMAC) Base Address
#define AT91C_BASE_PDC_ADC ((AT91PS_PDC) 0xFFFD8100) // (PDC_ADC) Base Address