mirror of
https://github.com/espressif/esp-nimble.git
synced 2026-07-28 21:57:55 +00:00
Add support for esp32c2
This commit is contained in:
committed by
Abhinav Kudnar
parent
13a8bcb7cd
commit
cd72ab3e32
@@ -26,7 +26,7 @@
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#define NIMBLE_HS_STACK_SIZE CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE
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#if (CONFIG_IDF_TARGET_ESP32H2)
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#if (CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2)
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#define NIMBLE_LL_STACK_SIZE CONFIG_BT_NIMBLE_CONTROLLER_TASK_STACK_SIZE
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#endif
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@@ -242,7 +242,7 @@ void uart0_init(uint32_t baud)
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REG_SET_BIT(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_UART_CLK_EN_M);
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const int sclk_div = 1;
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uint32_t sclk_freq = 32000000;
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uint32_t sclk_freq = XTAL_CLK_FREQ;
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uint32_t clk_div = ((sclk_freq) << 4) / baud;
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uart_dev_t *hw = &UART0;
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hw->clk_conf.sclk_en = 0;
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@@ -324,7 +324,7 @@ void uart_init(uint32_t baud)
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REG_SET_BIT(SYSTEM_PERIP_CLK_EN0_REG, SYSTEM_UART1_CLK_EN_M);
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const int sclk_div = 1;
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uint32_t sclk_freq = 32000000;
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uint32_t sclk_freq = XTAL_CLK_FREQ;
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uint32_t clk_div = ((sclk_freq) << 4) / baud;
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struct hal_uart *u = &uart;
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@@ -369,7 +369,7 @@ void uart_init(uint32_t baud)
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u->u_rx_sem = xSemaphoreCreateBinary();
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uint8_t TX_IO = 18, RX_IO = 19, ISR_ID = ETS_UART1_INUM;
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uint8_t TX_IO = CONFIG_HCI_UART_TX_PIN, RX_IO = CONFIG_HCI_UART_RX_PIN, ISR_ID = ETS_UART1_INUM;
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ets_printf("set nimble port tx:%d, rx:%d.\n", TX_IO, RX_IO);
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ets_printf("set baud:%d.\n", baud);
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intr_handler_set(ISR_ID, (intr_handler_t)&uart_tout_isr, NULL);
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@@ -383,14 +383,9 @@ void uart_init(uint32_t baud)
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ESP_ERROR_CHECK(uart_set_pin(1, TX_IO, RX_IO, -1, -1));
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//Enable hw flow control of UART1 for BQB test, which if not enabled, the tester takes quite long time to send a byte to DUT
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//RX -> J52.IO0
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//CTS -> J52.IO1
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//TX -> J52.IO2
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//RTS -> J52.IO3
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#ifndef CONFIG_WVT_TEST
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uart_ll_set_hw_flow_ctrl(hw, UART_HW_FLOWCTRL_CTS_RTS, 110);
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#endif
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// uart_ll_set_hw_flow_ctrl(hw, UART_HW_FLOWCTRL_CTS_RTS, 110);
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xTaskCreate(uart_rx_task, "uart_rx", CONFIG_BT_NIMBLE_HCI_UART_TASK_STACK_SIZE,
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NULL, 1, &hci_uart_task_h);
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