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nimble/transport: Move cmac_driver to core repo

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cmac_driver is moved as ipc_cmac driver to core repository. This is to
have drivers stored in one place, as with ipc_nrf5340.
This commit is contained in:
Andrzej Kaczmarek
2023-01-03 16:22:47 +01:00
parent 357f7210ee
commit edaffa71f3
18 changed files with 33 additions and 1400 deletions
Download Patch File Download Diff File Expand all files Collapse all files
nimble/drivers/dialog_cmac/src/ble_hw.c
+1 -1
View File
@@ -23,7 +23,7 @@
#include "nimble/ble.h"
#include "controller/ble_hw.h"
#include "CMAC.h"
#include "cmac_driver/cmac_shared.h"
#include <ipc_cmac/rand.h>
#include "tinycrypt/aes.h"
static struct tc_aes_key_sched_struct g_ctx;
nimble/drivers/dialog_cmac/src/ble_phy.c
+4 -4
View File
@@ -27,7 +27,7 @@
#include "nimble/ble.h"
#include "mcu/mcu.h"
#include "mcu/cmac_timer.h"
#include "cmac_driver/cmac_shared.h"
#include <ipc_cmac/shm.h>
#include "controller/ble_phy.h"
#include "controller/ble_ll.h"
#include "stats/stats.h"
@@ -524,7 +524,7 @@ ble_phy_rx_start_isr(void)
/* Read the latched RSSI value */
ble_hdr->rxinfo.rssi = ble_rf_get_rssi();
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
g_cmac_shared_data.debug.last_rx_rssi = ble_hdr->rxinfo.rssi;
g_cmac_shm_debugdata.last_rx_rssi = ble_hdr->rxinfo.rssi;
#endif
/* Count rx starts */
@@ -1659,8 +1659,8 @@ int
ble_phy_tx_power_set(int dbm)
{
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
if (g_cmac_shared_data.debug.tx_power_override != INT8_MAX) {
ble_rf_set_tx_power(g_cmac_shared_data.debug.tx_power_override);
if (g_cmac_shm_debugdata.tx_power_ovr_enable) {
ble_rf_set_tx_power(g_cmac_shm_debugdata.tx_power_ovr);
} else {
ble_rf_set_tx_power(dbm);
}
nimble/drivers/dialog_cmac/src/ble_rf.c
+17 -19
View File
@@ -23,7 +23,7 @@
#include "mcu/mcu.h"
#include "mcu/cmac_timer.h"
#include "controller/ble_phy.h"
#include "cmac_driver/cmac_shared.h"
#include <ipc_cmac/shm.h>
#include "ble_rf_priv.h"
#define RF_CALIBRATION_0 (0x01)
@@ -206,8 +206,7 @@ ble_rf_rfcu_apply_recommended_settings(void)
static void
ble_rf_rfcu_apply_settings(void)
{
ble_rf_apply_trim(g_cmac_shared_data.trim.rfcu,
g_cmac_shared_data.trim.rfcu_len);
ble_rf_apply_trim(g_cmac_shm_trim.rfcu, g_cmac_shm_trim.rfcu_len);
ble_rf_rfcu_apply_recommended_settings();
}
@@ -242,8 +241,7 @@ ble_rf_synth_apply_recommended_settings(void)
static void
ble_rf_synth_apply_settings(void)
{
ble_rf_apply_trim(g_cmac_shared_data.trim.synth,
g_cmac_shared_data.trim.synth_len);
ble_rf_apply_trim(g_cmac_shm_trim.synth, g_cmac_shm_trim.synth_len);
ble_rf_synth_apply_recommended_settings();
}
@@ -495,8 +493,8 @@ ble_rf_calibrate_int(uint8_t mask)
__enable_irq();
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
g_cmac_shared_data.debug.cal_res_1 = g_ble_phy_rf_data.cal_res_1;
g_cmac_shared_data.debug.cal_res_2 = g_ble_phy_rf_data.cal_res_2;
g_cmac_shm_debugdata.cal_res_1 = g_ble_phy_rf_data.cal_res_1;
g_cmac_shm_debugdata.cal_res_2 = g_ble_phy_rf_data.cal_res_2;
#endif
}
@@ -545,19 +543,19 @@ ble_rf_init(void)
return;
}
val = ble_rf_find_trim_reg(g_cmac_shared_data.trim.rfcu_mode1,
g_cmac_shared_data.trim.rfcu_mode1_len,
val = ble_rf_find_trim_reg(g_cmac_shm_trim.rfcu_mode1,
g_cmac_shm_trim.rfcu_mode1_len,
0x4002004c);
g_ble_phy_rf_data.trim_val1_tx_1 = val;
val = ble_rf_find_trim_reg(g_cmac_shared_data.trim.rfcu_mode2,
g_cmac_shared_data.trim.rfcu_mode2_len,
val = ble_rf_find_trim_reg(g_cmac_shm_trim.rfcu_mode2,
g_cmac_shm_trim.rfcu_mode2_len,
0x4002004c);
g_ble_phy_rf_data.trim_val1_tx_2 = val;
if (!g_ble_phy_rf_data.trim_val1_tx_1 || !g_ble_phy_rf_data.trim_val1_tx_2) {
val = ble_rf_find_trim_reg(g_cmac_shared_data.trim.rfcu,
g_cmac_shared_data.trim.rfcu_len,
val = ble_rf_find_trim_reg(g_cmac_shm_trim.rfcu,
g_cmac_shm_trim.rfcu_len,
0x4002004c);
if (!val) {
val = 0x0300;
@@ -566,8 +564,8 @@ ble_rf_init(void)
g_ble_phy_rf_data.trim_val1_tx_2 = val;
}
val = ble_rf_find_trim_reg(g_cmac_shared_data.trim.synth,
g_cmac_shared_data.trim.synth_len,
val = ble_rf_find_trim_reg(g_cmac_shm_trim.synth,
g_cmac_shm_trim.synth_len,
0x40022038);
if (!val) {
val = 0x0198ff03;
@@ -577,10 +575,10 @@ ble_rf_init(void)
set_reg32_bits((uint32_t)&g_ble_phy_rf_data.trim_val2_tx, 0x0001ff00, 0x87);
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
g_cmac_shared_data.debug.trim_val1_tx_1 = g_ble_phy_rf_data.trim_val1_tx_1;
g_cmac_shared_data.debug.trim_val1_tx_2 = g_ble_phy_rf_data.trim_val1_tx_2;
g_cmac_shared_data.debug.trim_val2_tx = g_ble_phy_rf_data.trim_val2_tx;
g_cmac_shared_data.debug.trim_val2_rx = g_ble_phy_rf_data.trim_val2_rx;
g_cmac_shm_debugdata.trim_val1_tx_1 = g_ble_phy_rf_data.trim_val1_tx_1;
g_cmac_shm_debugdata.trim_val1_tx_2 = g_ble_phy_rf_data.trim_val1_tx_2;
g_cmac_shm_debugdata.trim_val2_tx = g_ble_phy_rf_data.trim_val2_tx;
g_cmac_shm_debugdata.trim_val2_rx = g_ble_phy_rf_data.trim_val2_rx;
#endif
ble_rf_rfcu_enable();
nimble/transport/dialog_cmac/cmac_driver/diag/pkg.yml
-28
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@@ -1,28 +0,0 @@
#
# Licensed to the Apache Software Foundation (ASF) under one
# or more contributor license agreements. See the NOTICE file
# distributed with this work for additional information
# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
# KIND, either express or implied. See the License for the
# specific language governing permissions and limitations
# under the License.
#
pkg.name: nimble/transport/dialog_cmac/cmac_driver/diag
pkg.description: Default diag configuration for CMAC
pkg.author: "Apache Mynewt <dev@mynewt.apache.org>"
pkg.homepage: "http://mynewt.apache.org/"
pkg.keywords:
- dialog
- da1469x
- cmac
pkg.apis: dialog_cmac_diag
nimble/transport/dialog_cmac/cmac_driver/diag/src/cmac_diag.c
-66
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@@ -1,66 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include "syscfg/syscfg.h"
#include "mcu/mcu.h"
#if MYNEWT_VAL(BLE_CONTROLLER)
void
cmac_diag_setup_cmac(void)
{
MCU_DIAG_MAP( 0, 4, DSER);
MCU_DIAG_MAP( 1, 6, CMAC_ON_ERROR);
MCU_DIAG_MAP( 2, 2, PHY_TX_EN);
MCU_DIAG_MAP( 3, 2, PHY_RX_EN);
MCU_DIAG_MAP( 4, 2, PHY_TXRX_DATA_COMB);
MCU_DIAG_MAP( 5, 2, PHY_TXRX_DATA_EN_COMB);
MCU_DIAG_MAP( 6, 5, EV1US_FRAME_START);
MCU_DIAG_MAP( 7, 5, EV_BS_START);
MCU_DIAG_MAP( 8, 5, EV1C_BS_STOP);
MCU_DIAG_MAP( 9, 5, EV1US_PHY_TO_IDLE);
MCU_DIAG_MAP(10, 9, CALLBACK_IRQ);
MCU_DIAG_MAP(11, 9, FIELD_IRQ);
MCU_DIAG_MAP(12, 9, FRAME_IRQ);
MCU_DIAG_MAP(13, 3, SLP_TIMER_ACTIVE);
MCU_DIAG_MAP(14, 4, SLEEPING);
MCU_DIAG_MAP(15, 8, LL_TIMER1_00);
}
#else
void
cmac_diag_setup_host(void)
{
/* Setup pins for diagnostic signals */
mcu_gpio_set_pin_function(42, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAG0); /* DIAG_0 @ P1.10 */
mcu_gpio_set_pin_function(43, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAG1); /* DIAG_1 @ P1.11 */
mcu_gpio_set_pin_function(44, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAG2); /* DIAG_2 @ P1.12 */
mcu_gpio_set_pin_function(24, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_3 @ P0.24 */
mcu_gpio_set_pin_function(21, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_4 @ P0.21 */
mcu_gpio_set_pin_function(20, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_5 @ P0.20 */
mcu_gpio_set_pin_function(19, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_6 @ P0.19 */
mcu_gpio_set_pin_function(18, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_7 @ P0.18 */
mcu_gpio_set_pin_function(31, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_8 @ P0.31 */
mcu_gpio_set_pin_function(30, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_9 @ P0.30 */
mcu_gpio_set_pin_function(29, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_10 @ P0.29 */
mcu_gpio_set_pin_function(28, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_11 @ P0.28 */
mcu_gpio_set_pin_function(27, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_12 @ P0.27 */
mcu_gpio_set_pin_function(26, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_13 @ P0.26 */
mcu_gpio_set_pin_function(38, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_14 @ P1.06 */
mcu_gpio_set_pin_function(41, MCU_GPIO_MODE_OUTPUT, MCU_GPIO_FUNC_CMAC_DIAGX); /* DIAG_15 @ P1.09 */
}
#endif
nimble/transport/dialog_cmac/cmac_driver/include/cmac_driver/cmac_diag.h
-34
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@@ -1,34 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef __MCU_CMAC_DIAG_H_
#define __MCU_CMAC_DIAG_H_
#ifdef __cplusplus
extern "C" {
#endif
void cmac_diag_setup_host(void);
void cmac_diag_setup_cmac(void);
#ifdef __cplusplus
}
#endif
#endif /* __MCU_CMAC_DIAG_H_ */
nimble/transport/dialog_cmac/cmac_driver/include/cmac_driver/cmac_host.h
-35
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@@ -1,35 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef __DA1469X_CMAC_V2_H_
#define __DA1469X_CMAC_V2_H_
#ifdef __cplusplus
extern "C" {
#endif
void cmac_host_init(void);
void cmac_host_signal2cmac(void);
void cmac_host_rf_calibrate(void);
#ifdef __cplusplus
}
#endif
#endif /* __DA1469X_CMAC_V2_H_ */
nimble/transport/dialog_cmac/cmac_driver/include/cmac_driver/cmac_shared.h
-194
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@@ -1,194 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#ifndef __MCU_CMAC_SHARED_H_
#define __MCU_CMAC_SHARED_H_
#include <stdint.h>
#include "syscfg/syscfg.h"
#ifdef __cplusplus
extern "C" {
#endif
#define CMAC_SHARED_MAGIC_CMAC (0x4C6C) /* "lL" */
#define CMAC_SHARED_MAGIC_SYS (0x5368) /* "hS" */
#define CMAC_SHARED_F_SYS_LPCLK_AVAILABLE (0x0001)
/*
* Simple circular buffer for storing random numbers generated by M33
* Empty: cmr_in = cmr_out = 0;
* Full: cmr_in + 1 = cmr_out
*
* cmr_in: used by the M33 to add random numbers to the circular buffer.
* cmr_out: used by CMAC to retrieve random numbers
*
* NOTE: cmr_in and cmr_out are indices.
*/
#define CMAC_RAND_BUF_ELEMS (16)
struct cmac_rand {
int cmr_active;
int cmr_in;
int cmr_out;
uint32_t cmr_buf[CMAC_RAND_BUF_ELEMS];
};
struct cmac_mbox {
uint16_t rd_off;
uint16_t wr_off;
};
struct cmac_dcdc {
uint8_t enabled;
uint32_t v18;
uint32_t v18p;
uint32_t vdd;
uint32_t v14;
uint32_t ctrl1;
};
struct cmac_trim {
uint8_t rfcu_len;
uint8_t rfcu_mode1_len;
uint8_t rfcu_mode2_len;
uint8_t synth_len;
uint32_t rfcu[ MYNEWT_VAL(CMAC_TRIM_SIZE_RFCU) ];
uint32_t rfcu_mode1[2];
uint32_t rfcu_mode2[2];
uint32_t synth[ MYNEWT_VAL(CMAC_TRIM_SIZE_SYNTH) ];
};
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
struct cmac_debug {
int8_t last_rx_rssi;
int8_t tx_power_override;
uint32_t cal_res_1;
uint32_t cal_res_2;
uint32_t trim_val1_tx_1;
uint32_t trim_val1_tx_2;
uint32_t trim_val2_tx;
uint32_t trim_val2_rx;
};
#endif
#if MYNEWT_VAL(CMAC_DEBUG_COREDUMP_ENABLE)
struct cmac_coredump {
uint32_t lr;
uint32_t pc;
uint32_t assert;
const char *assert_file;
uint32_t assert_line;
uint32_t CM_STAT_REG;
uint32_t CM_LL_TIMER1_36_10_REG;
uint32_t CM_LL_TIMER1_9_0_REG;
uint32_t CM_ERROR_REG;
uint32_t CM_EXC_STAT_REG;
};
#endif
#define CMAC_PENDING_OP_LP_CLK 0x0001
#define CMAC_PENDING_OP_RF_CAL 0x0002
struct cmac_shared_data {
uint16_t magic_cmac;
uint16_t magic_sys;
uint16_t pending_ops;
uint16_t lp_clock_freq; /* LP clock frequency */
uint32_t xtal32m_settle_us;/* XTAL32M settling time */
struct cmac_mbox mbox_s2c; /* SYS2CMAC mailbox */
struct cmac_mbox mbox_c2s; /* CMAC2SYS mailbox */
struct cmac_dcdc dcdc; /* DCDC settings */
struct cmac_trim trim; /* Trim data */
struct cmac_rand rand; /* Random numbers */
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
struct cmac_debug debug; /* Extra debug data */
#endif
#if MYNEWT_VAL(CMAC_DEBUG_COREDUMP_ENABLE)
struct cmac_coredump coredump;
#endif
uint8_t mbox_s2c_buf[ MYNEWT_VAL(CMAC_MBOX_SIZE_S2C) ];
uint8_t mbox_c2s_buf[ MYNEWT_VAL(CMAC_MBOX_SIZE_C2S) ];
};
#if MYNEWT_VAL(BLE_CONTROLLER)
extern volatile struct cmac_shared_data g_cmac_shared_data;
#else
extern volatile struct cmac_shared_data *g_cmac_shared_data;
#endif
/* cmac_mbox */
typedef int (cmac_mbox_read_cb)(const void *data, uint16_t len);
typedef void (cmac_mbox_write_notif_cb)(void);
void cmac_mbox_set_read_cb(cmac_mbox_read_cb *cb);
void cmac_mbox_set_write_notif_cb(cmac_mbox_write_notif_cb *cb);
int cmac_mbox_has_data(void);
int cmac_mbox_read(void);
int cmac_mbox_write(const void *data, uint16_t len);
/* cmac_rand */
typedef void (*cmac_rand_isr_cb_t)(uint8_t rnum);
void cmac_rand_start(void);
void cmac_rand_stop(void);
void cmac_rand_read(void);
void cmac_rand_write(void);
void cmac_rand_chk_fill(void);
int cmac_rand_get_next(void);
int cmac_rand_is_active(void);
int cmac_rand_is_full(void);
void cmac_rand_fill(uint32_t *buf, int num_words);
void cmac_rand_set_isr_cb(cmac_rand_isr_cb_t cb);
void cmac_shared_init(void);
void cmac_shared_sync(void);
#if MYNEWT_VAL(BLE_CONTROLLER)
#define CMAC_SHARED_LOCK_VAL 0xc0000000
#else
#define CMAC_SHARED_LOCK_VAL 0x40000000
#endif
static inline void
cmac_shared_lock(void)
{
volatile uint32_t *bsr_set = (void *)0x50050074;
volatile uint32_t *bsr_stat = (void *)0x5005007c;
while ((*bsr_stat & 0xc0000000) != CMAC_SHARED_LOCK_VAL) {
*bsr_set = CMAC_SHARED_LOCK_VAL;
}
}
static inline void
cmac_shared_unlock(void)
{
volatile uint32_t *bsr_reset = (void *)0x50050078;
*bsr_reset = CMAC_SHARED_LOCK_VAL;
}
#ifdef __cplusplus
}
#endif
#endif /* __MCU_CMAC_SHARED_H_ */
nimble/transport/dialog_cmac/cmac_driver/pkg.yml
-39
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@@ -1,39 +0,0 @@
#
# Licensed to the Apache Software Foundation (ASF) under one
# or more contributor license agreements. See the NOTICE file
# distributed with this work for additional information
# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
# KIND, either express or implied. See the License for the
# specific language governing permissions and limitations
# under the License.
#
pkg.name: nimble/transport/dialog_cmac/cmac_driver
pkg.description: Driver for Dialog CMAC IPC
pkg.author: "Apache Mynewt <dev@mynewt.apache.org>"
pkg.homepage: "http://mynewt.apache.org/"
pkg.keywords:
- dialog
- da1469x
- cmac
pkg.req_apis.CMAC_DEBUG_DIAG_ENABLE:
- dialog_cmac_diag
pkg.ign_files.BLE_CONTROLLER:
- cmac_host.c
pkg.post_link_cmds.BLE_CONTROLLER:
scripts/create_cmac_bin.sh: 100
pkg.pre_link_cmds.!BLE_CONTROLLER:
scripts/build_libcmac.sh: 100
nimble/transport/dialog_cmac/cmac_driver/scripts/build_libcmac.sh
-45
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@@ -1,45 +0,0 @@
#!/bin/bash
# Licensed to the Apache Software Foundation (ASF) under one
# or more contributor license agreements. See the NOTICE file
# distributed with this work for additional information
# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
# KIND, either express or implied. See the License for the
# specific language governing permissions and limitations
# under the License.
NEWT=${MYNEWT_NEWT_PATH}
OBJCOPY=${MYNEWT_OBJCOPY_PATH}
AR=${MYNEWT_AR_PATH}
LIBCMAC_A=${MYNEWT_USER_SRC_DIR}/libcmac.a
export WORK_DIR=${MYNEWT_USER_WORK_DIR}
export BASENAME_ROM=cmac.rom
export BASENAME_RAM=cmac.ram
if [ ${MYNEWT_VAL_CMAC_IMAGE_SINGLE} -eq 0 ]; then
# Create empty binary for ROM image (1 byte required for objcopy)
truncate -s 1 ${WORK_DIR}/${BASENAME_ROM}.bin
# Create fixed size RAM image
truncate -s ${MYNEWT_VAL_CMAC_IMAGE_RAM_SIZE} ${WORK_DIR}/${BASENAME_RAM}.bin
else
${NEWT} build ${MYNEWT_VAL_CMAC_IMAGE_TARGET_NAME}
fi
cd ${WORK_DIR}
# Convert both binaries to objects and create archive to link
${OBJCOPY} -I binary -O elf32-littlearm -B armv8-m.main \
--rename-section .data=.libcmac.rom ${BASENAME_ROM}.bin ${BASENAME_ROM}.o
${OBJCOPY} -I binary -O elf32-littlearm -B armv8-m.main \
--rename-section .data=.libcmac.ram ${BASENAME_RAM}.bin ${BASENAME_RAM}.o
${AR} -rcs ${LIBCMAC_A} ${BASENAME_ROM}.o ${BASENAME_RAM}.o
nimble/transport/dialog_cmac/cmac_driver/scripts/create_cmac_bin.sh
-31
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@@ -1,31 +0,0 @@
#!/bin/bash
# Licensed to the Apache Software Foundation (ASF) under one
# or more contributor license agreements. See the NOTICE file
# distributed with this work for additional information
# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
# KIND, either express or implied. See the License for the
# specific language governing permissions and limitations
# under the License.
OBJCOPY=${MYNEWT_OBJCOPY_PATH}
ELF=${MYNEWT_APP_BIN_DIR}/blehci.elf
cd ${WORK_DIR}
# Strip .ram section from ROM image
${OBJCOPY} -R .ram -O binary ${ELF} ${BASENAME_ROM}.bin
# RAM image is the same as binary created by newt
cp ${ELF}.bin ${BASENAME_RAM}.bin
# Create a copy of ROM image to flash to partition, if required
cp ${BASENAME_ROM}.bin ${ELF}.rom.bin
nimble/transport/dialog_cmac/cmac_driver/src/cmac_host.c
-375
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@@ -1,375 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include <assert.h>
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include "syscfg/syscfg.h"
#include "sysflash/sysflash.h"
#include "os/os.h"
#include "mcu/mcu.h"
#include "mcu/cmsis_nvic.h"
#include "mcu/da1469x_hal.h"
#include "mcu/da1469x_lpclk.h"
#include "mcu/da1469x_clock.h"
#include "mcu/da1469x_trimv.h"
#include "mcu/da1469x_pdc.h"
#include "cmac_driver/cmac_host.h"
#include "cmac_driver/cmac_shared.h"
#include "cmac_driver/cmac_diag.h"
#include "trng/trng.h"
#if MYNEWT_VAL(CMAC_DEBUG_COREDUMP_ENABLE)
#include "console/console.h"
#endif
/* CMAC data */
extern char _binary_cmac_rom_bin_start[];
extern char _binary_cmac_rom_bin_end;
extern char _binary_cmac_ram_bin_start[];
extern char _binary_cmac_ram_bin_end;
struct cmac_image_info {
uint32_t magic;
uint32_t size_rom;
uint32_t size_ram;
uint32_t offset_data;
uint32_t offset_shared;
};
/* PDC entry for waking up CMAC */
static int8_t g_cmac_host_pdc_sys2cmac;
/* PDC entry for waking up M33 */
static int8_t g_cmac_host_pdc_cmac2sys;
static void cmac_host_rand_fill(struct os_event *ev);
static struct os_event g_cmac_host_rand_ev = {
.ev_cb = cmac_host_rand_fill
};
static void cmac_host_rand_chk_fill(void);
#if MYNEWT_VAL_CHOICE(BLE_TRANSPORT_HS, uart)
static void cmac_host_error_w4flush(struct os_event *ev);
static struct os_event g_cmac_host_error_ev = {
.ev_cb = cmac_host_error_w4flush
};
#endif
static void
cmac2sys_isr(void)
{
#if MYNEWT_VAL(CMAC_DEBUG_COREDUMP_ENABLE)
volatile struct cmac_coredump *cd = &g_cmac_shared_data->coredump;
const char *assert_file;
#endif
os_trace_isr_enter();
/* Clear CMAC2SYS interrupt */
*(volatile uint32_t *)0x40002000 = 2;
cmac_mbox_read();
if (*(volatile uint32_t *)0x40002000 & 0x1c00) {
#if MYNEWT_VAL(CMAC_DEBUG_COREDUMP_ENABLE)
console_blocking_mode();
console_printf("CMAC error (0x%08lx)\n", *(volatile uint32_t *)0x40002000);
console_printf(" lr:0x%08lx pc:0x%08lx\n", cd->lr, cd->pc);
if (cd->assert) {
console_printf(" assert:0x%08lx\n", cd->assert);
if (cd->assert_file) {
/* Need to translate pointer from M0 code segment to M33 data */
assert_file = cd->assert_file + MCU_MEM_SYSRAM_START_ADDRESS +
MEMCTRL->CMI_CODE_BASE_REG;
console_printf(" %s:%d\n",
assert_file, (unsigned)cd->assert_line);
}
}
console_printf(" 0x%08lx CM_ERROR_REG\n", cd->CM_ERROR_REG);
console_printf(" 0x%08lx CM_EXC_STAT_REG\n", cd->CM_EXC_STAT_REG);
console_printf(" 0x%08lx CM_LL_TIMER1_36_10_REG\n", cd->CM_LL_TIMER1_36_10_REG);
console_printf(" 0x%08lx CM_LL_TIMER1_9_0_REG\n", cd->CM_LL_TIMER1_9_0_REG);
/* Spin if debugger is connected to CMAC to avoid resetting it */
if (cd->CM_STAT_REG & 0x20) {
for (;;);
}
#endif
#if MYNEWT_VAL_CHOICE(BLE_TRANSPORT_HS, uart)
NVIC_DisableIRQ(CMAC2SYS_IRQn);
/* Wait until UART is flushed and then assert */
cmac_host_error_w4flush(NULL);
return;
#endif
/* XXX CMAC is in error state, need to recover */
assert(0);
return;
}
cmac_host_rand_chk_fill();
os_trace_isr_exit();
}
static void
cmac_host_rand_fill(struct os_event *ev)
{
size_t num_bytes;
struct trng_dev *trng;
uint32_t *rnum;
uint32_t rnums[CMAC_RAND_BUF_ELEMS];
/* Check if full */
if (!cmac_rand_is_active() || cmac_rand_is_full()) {
return;
}
assert(ev->ev_arg != NULL);
/* Fill buffer with random numbers even though we may not use all of them */
trng = ev->ev_arg;
rnum = &rnums[0];
num_bytes = trng_read(trng, rnum, CMAC_RAND_BUF_ELEMS * sizeof(uint32_t));
cmac_rand_fill(rnum, num_bytes / 4);
cmac_host_signal2cmac();
}
static void
cmac_host_rand_chk_fill(void)
{
if (cmac_rand_is_active() && !cmac_rand_is_full()) {
os_eventq_put(os_eventq_dflt_get(), &g_cmac_host_rand_ev);
}
}
#if MYNEWT_VAL_CHOICE(BLE_TRANSPORT_HS, uart)
#if MYNEWT_VAL(BLE_TRANSPORT_UART_PORT) < 0 || MYNEWT_VAL(BLE_TRANSPORT_UART_PORT) > 2
#error Invalid BLE_HCI_UART_PORT
#endif
static void
cmac_host_error_w4flush(struct os_event *ev)
{
static UART_Type * const regs[] = {
(void *)UART,
(void *)UART2,
(void *)UART3
};
if (!ev) {
/* Move to task context, we do not want to spin in interrupt */
os_eventq_put(os_eventq_dflt_get(), &g_cmac_host_error_ev);
return;
}
do {
cmac_mbox_read();
while ((regs[MYNEWT_VAL(BLE_TRANSPORT_UART_PORT)]->UART_LSR_REG &
UART_UART_LSR_REG_UART_TEMT_Msk) == 0) {
/* Wait until both FIFO and shift registers are empty */
}
} while (cmac_mbox_has_data());
/* Reset CMAC */
CRG_TOP->CLK_RADIO_REG |= CRG_TOP_CLK_RADIO_REG_CMAC_SYNCH_RESET_Msk;
assert(0);
}
#endif
void
cmac_host_signal2cmac(void)
{
da1469x_pdc_set(g_cmac_host_pdc_sys2cmac);
}
static void
cmac_host_lpclk_cb(uint32_t freq)
{
/* No need to wakeup CMAC if LP clock frequency did not change */
if (g_cmac_shared_data->lp_clock_freq == freq) {
return;
}
cmac_shared_lock();
g_cmac_shared_data->lp_clock_freq = freq;
g_cmac_shared_data->pending_ops |= CMAC_PENDING_OP_LP_CLK;
cmac_shared_unlock();
cmac_host_signal2cmac();
}
#if MYNEWT_VAL(CMAC_DEBUG_HOST_PRINT_ENABLE)
static void
cmac_host_print_trim(const char *name, const uint32_t *tv, unsigned len)
{
console_printf("[CMAC] Trim values for '%s'\n", name);
while (len) {
console_printf(" 0x%08x = 0x%08x\n", (unsigned)tv[0], (unsigned)tv[1]);
len -= 2;
tv += 2;
}
}
#endif
void
cmac_host_rf_calibrate(void)
{
cmac_shared_lock();
g_cmac_shared_data->pending_ops |= CMAC_PENDING_OP_RF_CAL;
cmac_shared_unlock();
cmac_host_signal2cmac();
}
void
cmac_host_init(void)
{
struct trng_dev *trng;
struct cmac_image_info ii;
uint32_t cmac_rom_size;
uint32_t cmac_ram_size;
#if !MYNEWT_VAL(CMAC_IMAGE_SINGLE)
const struct flash_area *fa;
int rc;
#endif
struct cmac_trim *trim;
/* Get trng os device */
trng = (struct trng_dev *) os_dev_open("trng", OS_TIMEOUT_NEVER, NULL);
assert(trng);
g_cmac_host_rand_ev.ev_arg = trng;
#if MYNEWT_VAL(CMAC_DEBUG_DIAG_ENABLE)
cmac_diag_setup_host();
#endif
#if MYNEWT_VAL(CMAC_DEBUG_SWD_ENABLE)
/* Enable CMAC debugger */
CRG_TOP->SYS_CTRL_REG |= 0x40; /* CRG_TOP_SYS_CTRL_REG_CMAC_DEBUGGER_ENABLE_Msk */
#endif
/*
* Add PDC entry to wake up CMAC from M33
*
* XXX if MCU_DEBUG_GPIO_DEEP_SLEEP is enabled on CMAC, this should also
* enable PD_COM so CMAC can access GPIOs after wake up
*/
g_cmac_host_pdc_sys2cmac = da1469x_pdc_add(MCU_PDC_TRIGGER_MAC_TIMER,
MCU_PDC_MASTER_CMAC,
MCU_PDC_EN_XTAL);
da1469x_pdc_set(g_cmac_host_pdc_sys2cmac);
da1469x_pdc_ack(g_cmac_host_pdc_sys2cmac);
/* Add PDC entry to wake up M33 from CMAC, if does not exist yet */
g_cmac_host_pdc_cmac2sys = da1469x_pdc_find(MCU_PDC_TRIGGER_COMBO,
MCU_PDC_MASTER_M33, 0);
if (g_cmac_host_pdc_cmac2sys < 0) {
g_cmac_host_pdc_cmac2sys = da1469x_pdc_add(MCU_PDC_TRIGGER_COMBO,
MCU_PDC_MASTER_M33,
MCU_PDC_EN_XTAL);
da1469x_pdc_set(g_cmac_host_pdc_cmac2sys);
da1469x_pdc_ack(g_cmac_host_pdc_cmac2sys);
}
/* Setup CMAC2SYS interrupt */
NVIC_SetVector(CMAC2SYS_IRQn, (uint32_t)cmac2sys_isr);
NVIC_SetPriority(CMAC2SYS_IRQn, MYNEWT_VAL(CMAC_CMAC2SYS_IRQ_PRIORITY));
NVIC_DisableIRQ(CMAC2SYS_IRQn);
/* Enable Radio LDO */
CRG_TOP->POWER_CTRL_REG |= CRG_TOP_POWER_CTRL_REG_LDO_RADIO_ENABLE_Msk;
/* Enable CMAC, but keep it in reset */
CRG_TOP->CLK_RADIO_REG = (1 << CRG_TOP_CLK_RADIO_REG_RFCU_ENABLE_Pos) |
(1 << CRG_TOP_CLK_RADIO_REG_CMAC_SYNCH_RESET_Pos) |
(0 << CRG_TOP_CLK_RADIO_REG_CMAC_CLK_SEL_Pos) |
(1 << CRG_TOP_CLK_RADIO_REG_CMAC_CLK_ENABLE_Pos) |
(0 << CRG_TOP_CLK_RADIO_REG_CMAC_DIV_Pos);
/* Calculate size of ROM and RAM area */
cmac_rom_size = &_binary_cmac_rom_bin_end - &_binary_cmac_rom_bin_start[0];
cmac_ram_size = &_binary_cmac_ram_bin_end - &_binary_cmac_ram_bin_start[0];
/* Load image header and check if image can be loaded */
#if MYNEWT_VAL(CMAC_IMAGE_SINGLE)
memcpy(&ii, &_binary_cmac_rom_bin_start[128], sizeof(ii));
#else
rc = flash_area_open(FLASH_AREA_IMAGE_1, &fa);
assert(rc == 0);
rc = flash_area_read(fa, 128, &ii, sizeof(ii));
assert(rc == 0);
#endif
assert(ii.magic == 0xC3ACC3AC);
assert(ii.size_rom == cmac_rom_size);
assert(ii.size_ram <= cmac_ram_size);
/* Copy CMAC image to RAM */
#if MYNEWT_VAL(CMAC_IMAGE_SINGLE)
memset(&_binary_cmac_ram_bin_start, 0xaa, cmac_ram_size);
memcpy(&_binary_cmac_ram_bin_start, &_binary_cmac_rom_bin_start, ii.size_rom);
#else
memset(&_binary_cmac_ram_bin_start, 0xaa, cmac_ram_size);
rc = flash_area_read(fa, 0, &_binary_cmac_ram_bin_start, ii.size_rom);
assert(rc == 0);
#endif
/* Setup CMAC memory addresses */
MEMCTRL->CMI_CODE_BASE_REG = (uint32_t)&_binary_cmac_ram_bin_start;
MEMCTRL->CMI_DATA_BASE_REG = MEMCTRL->CMI_CODE_BASE_REG + ii.offset_data;
MEMCTRL->CMI_SHARED_BASE_REG = MEMCTRL->CMI_CODE_BASE_REG + ii.offset_shared;
MEMCTRL->CMI_END_REG = MEMCTRL->CMI_CODE_BASE_REG + ii.size_ram - 1;
/* Initialize shared memory */
cmac_shared_init();
trim = (struct cmac_trim *)&g_cmac_shared_data->trim;
trim->rfcu_len = da1469x_trimv_group_read(6, trim->rfcu, ARRAY_SIZE(trim->rfcu));
trim->rfcu_mode1_len = da1469x_trimv_group_read(8, trim->rfcu_mode1, ARRAY_SIZE(trim->rfcu_mode1));
trim->rfcu_mode2_len = da1469x_trimv_group_read(10, trim->rfcu_mode2, ARRAY_SIZE(trim->rfcu_mode2));
trim->synth_len = da1469x_trimv_group_read(7, trim->synth, ARRAY_SIZE(trim->synth));
#if MYNEWT_VAL(CMAC_DEBUG_HOST_PRINT_ENABLE)
cmac_host_print_trim("rfcu", trim->rfcu, trim->rfcu_len);
cmac_host_print_trim("rfcu_mode1", trim->rfcu_mode1, trim->rfcu_mode1_len);
cmac_host_print_trim("rfcu_mode2", trim->rfcu_mode2, trim->rfcu_mode2_len);
cmac_host_print_trim("synth", trim->synth, trim->synth_len);
#endif
/* Release CMAC from reset and sync */
CRG_TOP->CLK_RADIO_REG &= ~CRG_TOP_CLK_RADIO_REG_CMAC_SYNCH_RESET_Msk;
cmac_shared_sync();
da1469x_lpclk_register_cmac_cb(cmac_host_lpclk_cb);
#if MYNEWT_VAL(CMAC_DEBUG_HOST_PRINT_ENABLE) && MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
/* Trim values are calculated on RF init, so are valid after synced with CMAC */
console_printf("[CMAC] Calculated trim_val1: 1=0x%08x 2=0x%08x\n",
(unsigned)g_cmac_shared_data->debug.trim_val1_tx_1,
(unsigned)g_cmac_shared_data->debug.trim_val1_tx_2);
console_printf("[CMAC] Calculated trim_val2: tx=0x%08x rx=0x%08x\n",
(unsigned)g_cmac_shared_data->debug.trim_val2_tx,
(unsigned)g_cmac_shared_data->debug.trim_val2_rx);
#endif
}
nimble/transport/dialog_cmac/cmac_driver/src/cmac_mbox.c
-174
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@@ -1,174 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include <assert.h>
#include <cmac_driver/cmac_shared.h>
#include <string.h>
#include <stdbool.h>
#include <stdint.h>
#include "syscfg/syscfg.h"
#include "mcu/mcu.h"
#include "os/os_arch.h"
#include "os/os.h"
#ifndef min
#define min(_a, _b) ((_a) < (_b) ? (_a) : (_b))
#endif
static cmac_mbox_read_cb *g_cmac_mbox_read_cb;
static cmac_mbox_write_notif_cb *g_cmac_mbox_write_notif_cb;
void
cmac_mbox_set_read_cb(cmac_mbox_read_cb *cb)
{
g_cmac_mbox_read_cb = cb;
}
void
cmac_mbox_set_write_notif_cb(cmac_mbox_write_notif_cb *cb)
{
g_cmac_mbox_write_notif_cb = cb;
}
int
cmac_mbox_has_data(void)
{
#if MYNEWT_VAL(BLE_CONTROLLER)
volatile struct cmac_mbox *mbox = &g_cmac_shared_data.mbox_s2c;
#else
volatile struct cmac_mbox *mbox = &g_cmac_shared_data->mbox_c2s;
#endif
return mbox->rd_off != mbox->wr_off;
}
int
cmac_mbox_read(void)
{
#if MYNEWT_VAL(BLE_CONTROLLER)
volatile struct cmac_mbox *mbox = &g_cmac_shared_data.mbox_s2c;
uint8_t *mbox_buf = (uint8_t *)&g_cmac_shared_data.mbox_s2c_buf;
const uint16_t mbox_size = MYNEWT_VAL(CMAC_MBOX_SIZE_S2C);
#else
volatile struct cmac_mbox *mbox = &g_cmac_shared_data->mbox_c2s;
uint8_t *mbox_buf = (uint8_t *)&g_cmac_shared_data->mbox_c2s_buf;
const uint16_t mbox_size = MYNEWT_VAL(CMAC_MBOX_SIZE_C2S);
#endif
uint16_t rd_off;
uint16_t wr_off;
uint16_t chunk;
int len = 0;
if (!g_cmac_mbox_read_cb) {
return 0;
}
do {
rd_off = mbox->rd_off;
wr_off = mbox->wr_off;
if (rd_off <= wr_off) {
chunk = wr_off - rd_off;
} else {
chunk = mbox_size - rd_off;
}
while (chunk) {
len = g_cmac_mbox_read_cb(&mbox_buf[rd_off], chunk);
if (len < 0) {
break;
}
rd_off += len;
chunk -= len;
}
mbox->rd_off = rd_off == mbox_size ? 0 : rd_off;
} while ((mbox->rd_off != mbox->wr_off) && (len >= 0));
return 0;
}
int
cmac_mbox_write(const void *data, uint16_t len)
{
#if MYNEWT_VAL(BLE_CONTROLLER)
volatile struct cmac_mbox *mbox = &g_cmac_shared_data.mbox_c2s;
uint8_t *mbox_buf = (uint8_t *)&g_cmac_shared_data.mbox_c2s_buf;
const uint16_t mbox_size = MYNEWT_VAL(CMAC_MBOX_SIZE_C2S);
#else
volatile struct cmac_mbox *mbox = &g_cmac_shared_data->mbox_s2c;
uint8_t *mbox_buf = (uint8_t *)&g_cmac_shared_data->mbox_s2c_buf;
const uint16_t mbox_size = MYNEWT_VAL(CMAC_MBOX_SIZE_S2C);
#endif
uint16_t rd_off;
uint16_t wr_off;
uint16_t max_wr;
uint16_t chunk;
while (len) {
rd_off = mbox->rd_off;
wr_off = mbox->wr_off;
/*
* Calculate maximum length to write, i.e. up to end of buffer or stop
* before rd_off to be able to detect full queue.
*/
if (rd_off > wr_off) {
/*
* |0|1|2|3|4|5|6|7|
* | | | |W| | |R| |
* `---^
*/
max_wr = rd_off - wr_off - 1;
} else if (rd_off == 0) {
/*
* |0|1|2|3|4|5|6|7|
* |R| | |W| | | | |
* `-------^
*/
max_wr = mbox_size - wr_off - 1;
} else {
/*
* |0|1|2|3|4|5|6|7|
* | |R| |W| | | | |
* `---------^
*/
max_wr = mbox_size - wr_off;
}
chunk = min(len, max_wr);
if (chunk == 0) {
continue;
}
memcpy(&mbox_buf[wr_off], data, chunk);
wr_off += chunk;
mbox->wr_off = wr_off == mbox_size ? 0 : wr_off;
g_cmac_mbox_write_notif_cb();
len -= chunk;
data = (uint8_t *)data + chunk;
}
return 0;
}
nimble/transport/dialog_cmac/cmac_driver/src/cmac_rand.c
-145
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@@ -1,145 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include <assert.h>
#include <cmac_driver/cmac_shared.h>
#include <string.h>
#include <stdbool.h>
#include "syscfg/syscfg.h"
#include "mcu/mcu.h"
#include "os/os_arch.h"
#include "os/os.h"
#if !MYNEWT_VAL(BLE_CONTROLLER)
int
cmac_rand_is_active(void)
{
return g_cmac_shared_data->rand.cmr_active;
}
int
cmac_rand_is_full(void)
{
int next;
bool rc;
next = cmac_rand_get_next();
if (next == g_cmac_shared_data->rand.cmr_out) {
rc = 1;
} else {
rc = 0;
}
return rc;
}
int
cmac_rand_get_next(void)
{
int next;
/* If active and not full, put event on queue to get random numbers */
next = g_cmac_shared_data->rand.cmr_in + 1;
if (next == CMAC_RAND_BUF_ELEMS) {
next = 0;
}
return next;
}
void
cmac_rand_fill(uint32_t *buf, int num_words)
{
int next;
/* XXX: if words is 0, is it possible we could get into a state
where we are waiting for random numbers but M33 does not know it
has to fill any? */
/* NOTE: we already know the buffer is not full first time through */
next = g_cmac_shared_data->rand.cmr_in;
while (num_words) {
g_cmac_shared_data->rand.cmr_buf[next] = buf[0];
next = cmac_rand_get_next();
g_cmac_shared_data->rand.cmr_in = next;
next = cmac_rand_get_next();
if (next == g_cmac_shared_data->rand.cmr_out) {
break;
}
--num_words;
++buf;
}
}
#endif
#if MYNEWT_VAL(BLE_CONTROLLER)
static cmac_rand_isr_cb_t g_cmac_rand_isr_cb;
void
cmac_rand_set_isr_cb(cmac_rand_isr_cb_t cb)
{
g_cmac_rand_isr_cb = cb;
}
void
cmac_rand_start(void)
{
g_cmac_shared_data.rand.cmr_active = 1;
}
void
cmac_rand_stop(void)
{
g_cmac_shared_data.rand.cmr_active = 0;
}
/**
* cmac rnum read
*
* Called during the system to cmac isr to take random numbers
* from shared memory into the BLE stack.
*/
void
cmac_rand_read(void)
{
uint8_t bytes_left;
uint32_t rnum;
/* Just leave if no callback. */
if (g_cmac_rand_isr_cb == NULL) {
return;
}
bytes_left = 0;
while (g_cmac_shared_data.rand.cmr_active) {
if (bytes_left) {
--bytes_left;
rnum >>= 8;
} else if (g_cmac_shared_data.rand.cmr_out != g_cmac_shared_data.rand.cmr_in) {
bytes_left = 3;
rnum = g_cmac_shared_data.rand.cmr_buf[g_cmac_shared_data.rand.cmr_out];
++g_cmac_shared_data.rand.cmr_out;
if (g_cmac_shared_data.rand.cmr_out == CMAC_RAND_BUF_ELEMS) {
g_cmac_shared_data.rand.cmr_out = 0;
}
} else {
break;
}
(*g_cmac_rand_isr_cb)((uint8_t)rnum);
}
}
#endif
nimble/transport/dialog_cmac/cmac_driver/src/cmac_shared.c
-96
View File
@@ -1,96 +0,0 @@
/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include "syscfg/syscfg.h"
#if MYNEWT_VAL(BLE_CONTROLLER) && !MYNEWT_VAL(MCU_DEBUG_DSER_CMAC_SHARED)
#define MCU_DIAG_SER_DISABLE
#endif
#include <assert.h>
#include <string.h>
#include <stdbool.h>
#include "mcu/mcu.h"
#include <cmac_driver/cmac_shared.h>
#include "os/os_arch.h"
#include "os/os.h"
#ifndef min
#define min(_a, _b) ((_a) < (_b) ? (_a) : (_b))
#endif
#if MYNEWT_VAL(BLE_CONTROLLER)
volatile struct cmac_shared_data g_cmac_shared_data __attribute__((section(".shdata")));
#else
volatile struct cmac_shared_data *g_cmac_shared_data;
#include "mcu/da1469x_clock.h"
#define MCU_DIAG_SER(_x)
#endif
void
cmac_shared_init(void)
{
#if !MYNEWT_VAL(BLE_CONTROLLER)
g_cmac_shared_data = (void *)(MCU_MEM_SYSRAM_START_ADDRESS +
MEMCTRL->CMI_SHARED_BASE_REG);
memset((void *)g_cmac_shared_data, 0, sizeof(*g_cmac_shared_data));
g_cmac_shared_data->xtal32m_settle_us = MYNEWT_VAL(MCU_CLOCK_XTAL32M_SETTLE_TIME_US);
g_cmac_shared_data->dcdc.enabled = DCDC->DCDC_CTRL1_REG & DCDC_DCDC_CTRL1_REG_DCDC_ENABLE_Msk;
if (g_cmac_shared_data->dcdc.enabled) {
g_cmac_shared_data->dcdc.v18 = DCDC->DCDC_V18_REG;
g_cmac_shared_data->dcdc.v18p = DCDC->DCDC_V18P_REG;
g_cmac_shared_data->dcdc.vdd = DCDC->DCDC_VDD_REG;
g_cmac_shared_data->dcdc.v14 = DCDC->DCDC_V14_REG;
g_cmac_shared_data->dcdc.ctrl1 = DCDC->DCDC_CTRL1_REG;
}
#if MYNEWT_VAL(CMAC_DEBUG_DATA_ENABLE)
g_cmac_shared_data->debug.tx_power_override = INT8_MAX;
#endif
#endif
}
void
cmac_shared_sync(void)
{
/*
* We need to guarantee proper order of initialization here, i.e. SYS has
* to wait until CMAC finished initialization as otherwise host may start
* sending HCI packets which will timeout as there is no one to read them.
*/
#if MYNEWT_VAL(BLE_CONTROLLER)
assert(g_cmac_shared_data.magic_cmac == 0);
g_cmac_shared_data.magic_cmac = CMAC_SHARED_MAGIC_CMAC;
while (g_cmac_shared_data.magic_sys != CMAC_SHARED_MAGIC_SYS);
NVIC_SetPriority(SYS2CMAC_IRQn, 3);
NVIC_EnableIRQ(SYS2CMAC_IRQn);
#else
assert(g_cmac_shared_data->magic_sys == 0);
while (g_cmac_shared_data->magic_cmac != CMAC_SHARED_MAGIC_CMAC);
g_cmac_shared_data->magic_sys = CMAC_SHARED_MAGIC_SYS;
NVIC_EnableIRQ(CMAC2SYS_IRQn);
#endif
}
nimble/transport/dialog_cmac/cmac_driver/syscfg.yml
-104
View File
@@ -1,104 +0,0 @@
# Licensed to the Apache Software Foundation (ASF) under one
# or more contributor license agreements. See the NOTICE file
# distributed with this work for additional information
# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing,
# software distributed under the License is distributed on an
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
# KIND, either express or implied. See the License for the
# specific language governing permissions and limitations
# under the License.
#
syscfg.defs:
CMAC_MBOX_SIZE_S2C:
description: >
Size of mailbox for SYS to CMAC data. The size
value should be power of 2 to allow for better
code optimization.
value: 128
CMAC_MBOX_SIZE_C2S:
description: >
Size of mailbox for CMAC to SYS data. The size
value should be power of 2 to allow for better
code optimization.
value: 128
CMAC_TRIM_SIZE_RFCU:
description: >
Size of trim values for RFCU. This is maximum
number of trim values that can be read from
OTP and applied, all excessive values will be
discarded.
value: 10
CMAC_TRIM_SIZE_SYNTH:
description: >
Size of trim values for RFCU. This is maximum
number of trim values that can be read from
OTP and applied, all excessive values will be
discarded.
value: 10
CMAC_DEBUG_SWD_ENABLE:
description: >
Enable CMAC SWD interface.
value: 0
CMAC_DEBUG_DIAG_ENABLE:
description: >
Enable CMAC diagnostic lines.
value: 0
CMAC_DEBUG_DATA_ENABLE:
description: >
Enable extra debugging data in shared segment.
value: 0
CMAC_DEBUG_COREDUMP_ENABLE:
description: >
Enable dumping CMAC registers to shared segment
on fault.
value: 1
CMAC_DEBUG_HOST_PRINT_ENABLE:
description: >
Enable some debug printouts to console from host side.
This will dump some settings during startup, useful to
check what is loaded to CMAC via shared data.
value: 0
CMAC_IMAGE_SINGLE:
description: >
When enable, CMAC binary is linked with application image
creating a single image build. See CMAC_IMAGE_TARGET_NAME.
When disabled, CMAC binary is built and flashed separately
to flash partition. See CMAC_IMAGE_PARTITION.
value: 1
CMAC_IMAGE_TARGET_NAME:
description: >
Target name to build for CMAC binary for single image build.
value: "@apache-mynewt-nimble/targets/dialog_cmac"
CMAC_IMAGE_PARTITION:
description: >
Flash partition to load CMAC binary from if single image build
is disabled.
value: FLASH_AREA_IMAGE_1
CMAC_IMAGE_RAM_SIZE:
description: >
Size of RAM area in bytes reserved for CMAC if single image
build is disabled. Unit suffix (K, M) is allowed.
Note: for single image build this setting is not applicable
since proper RAM area size is automatically calculated from
CMAC binary.
value: 128K
CMAC_CMAC2SYS_IRQ_PRIORITY:
description: >
The priority of the CMAC2SYS IRQ. Default is 0, or highest
priority.
value: 0
syscfg.restrictions.!BLE_CONTROLLER:
- TRNG
nimble/transport/dialog_cmac/pkg.yml
+3 -3
View File
@@ -18,16 +18,16 @@
#
pkg.name: nimble/transport/dialog_cmac
pkg.description: HCI H4 transport for Dialog CMAC
pkg.description: IPC transport for Dialog CMAC
pkg.author: "Apache Mynewt <dev@mynewt.apache.org>"
pkg.homepage: "http://mynewt.apache.org/"
pkg.homepage: "https://mynewt.apache.org/"
pkg.keywords:
- ble
- bluetooth
pkg.deps:
- nimble/transport/common/hci_h4
- nimble/transport/dialog_cmac/cmac_driver
- "@apache-mynewt-core/hw/drivers/ipc_cmac"
pkg.apis:
- ble_transport
nimble/transport/dialog_cmac/src/hci_cmac.c
+8 -7
View File
@@ -24,9 +24,10 @@
/* to enable dser diag */
#include <mcu/mcu.h>
#endif /* BLE_CONTROLLER */
#include <cmac_driver/cmac_shared.h>
#include <ipc_cmac/shm.h>
#include <ipc_cmac/mbox.h>
#if !MYNEWT_VAL(BLE_CONTROLLER)
#include <cmac_driver/cmac_host.h>
#include <ipc_cmac/mbox.h>
#endif /* !BLE_CONTROLLER */
#include <os/os_mbuf.h>
#include <os/os_mempool.h>
@@ -99,8 +100,8 @@ ble_transport_ll_init(void)
hci_h4_sm_init(&hci_cmac_h4sm, &hci_h4_allocs_from_ll, hci_cmac_hs_frame_cb);
/* We can now handle data from CMAC, initialize it */
cmac_mbox_set_read_cb(hci_cmac_hs_mbox_read_cb);
cmac_mbox_set_write_notif_cb(hci_cmac_hs_mbox_write_notif_cb);
cmac_mbox_cb_set(hci_cmac_hs_mbox_read_cb,
hci_cmac_hs_mbox_write_notif_cb);
cmac_host_init();
}
#endif /* !BLE_CONTROLLER */
@@ -155,11 +156,11 @@ ble_transport_hs_init(void)
hci_h4_sm_init(&hci_cmac_h4sm, &hci_h4_allocs_from_hs, hci_cmac_ll_frame_cb);
/* Setup callbacks for mailboxes */
cmac_mbox_set_read_cb(hci_cmac_ll_mbox_read_cb);
cmac_mbox_set_write_notif_cb(hci_cmac_ll_mbox_write_notif_cb);
cmac_mbox_cb_set(hci_cmac_ll_mbox_read_cb,
hci_cmac_ll_mbox_write_notif_cb);
/* Synchronize with SYS */
cmac_shared_sync();
cmac_shm_ll_ready();
}
#endif