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[script] simplify pretty (#4660)

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* No need to bootstrap and configure for make pretty
* Use parallel to speed up make pretty
This commit is contained in:
Yakun Xu
2020-03-10 22:15:07 -07:00
committed by GitHub
parent e81562f182
commit 34b83ae6c5
62 changed files with 1255 additions and 1551 deletions
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.travis.yml
+1 -1
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@@ -210,7 +210,7 @@ jobs:
apt:
packages:
- clang-format-6.0
script: .travis/check-pretty
script: python3 -m pip install yapf && script/make-pretty check
- name: "Package Check"
os: linux
compiler: gcc
.travis/check-pretty
-74
View File
@@ -1,74 +0,0 @@
#!/bin/bash
#
# Copyright (c) 2019, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set -e -x -o pipefail
setup_python()
{
python3 -m pip install yapf
}
check_python()
{
python3 -m yapf --style google -dpr tests tools
}
check_clang()
{
clang-format --version
./bootstrap
./configure
make pretty-check
}
main()
{
case $1 in
setup)
setup_python
;;
python)
check_python
;;
clang)
check_cpp
;;
'')
setup_python
check_python
check_clang
;;
*)
echo "USAGE: $0 [setup|python|clang]"
exit 1
;;
esac
}
main "$@"
CONTRIBUTING.md
+2 -10
View File
@@ -109,17 +109,9 @@ This will open up a text editor where you can specify which commits to squash.
#### Coding Conventions and Style
OpenThread uses and enforces the [OpenThread Coding Conventions and Style](STYLE_GUIDE.md) on all code, except for code located in [third_party](third_party). Use the `make pretty` and `make pretty-check` targets to automatically reformat code and check for code-style compliance, respectively. OpenThread currently requires [clang-format v6.0.0](http://releases.llvm.org/download.html#6.0.0) for `make pretty` and `make pretty-check`.
OpenThread uses and enforces the [OpenThread Coding Conventions and Style](STYLE_GUIDE.md) on all code, except for code located in [third_party](third_party). Use the `script/make-pretty` and `script/make-pretty check` targets to automatically reformat code and check for code-style compliance, respectively. OpenThread currently requires [clang-format v6.0.0](http://releases.llvm.org/download.html#6.0.0) and [yapf](https://github.com/google/yapf) for `script/make-pretty` and `script/make-pretty check`.
As part of the cleanup process, you should also run `make pretty-check` to ensure that your code passes the baseline code style checks.
```bash
./bootstrap
./configure
make pretty-check
```
Make sure to include any code format changes in your commits.
As part of the cleanup process, you should also run `script/make-pretty check` to ensure that your code passes the baseline code style checks.
#### Push and Test
Makefile.am
-8
View File
@@ -71,14 +71,6 @@ DISTCLEANFILES = \
.local-version \
$(NULL)
PRETTY_SUBDIRS = \
examples \
include \
src \
tests \
tools \
$(NULL)
# Ignore the pseudo flash files on Posix platform during diskcheck
distcleancheck_listfiles = \
$(AM_V_at)find . -type f -name "*flash"
configure.ac
-15
View File
@@ -402,22 +402,11 @@ if test "${enable_address_sanitizer}" = "yes" ; then
check_prospective_CXXFLAGS
fi
#
# Code style
#
AC_SUBST(PRETTY, ["\${abs_top_srcdir}/script/clang-format.sh"])
AC_SUBST(PRETTY_ARGS, ["-style=file -i"])
AC_SUBST(PRETTY_CHECK, ["\${abs_top_srcdir}/script/clang-format-check.sh"])
AC_SUBST(PRETTY_CHECK_ARGS, [""])
#
# Tests
#
AC_MSG_NOTICE([checking whether to build tests])
# Tests
NL_ENABLE_TESTS([yes])
AM_CONDITIONAL([OPENTHREAD_BUILD_TESTS], [test "${nl_cv_build_tests}" = "yes"])
@@ -1167,10 +1156,6 @@ AC_MSG_NOTICE([
Link flags : ${LDFLAGS:--}
Link libraries : ${LIBS}
Link maps : ${enable_linker_map}
Pretty : ${PRETTY:--}
Pretty args : ${PRETTY_ARGS:--}
Pretty check : ${PRETTY_CHECK:--}
Pretty check args : ${PRETTY_CHECK_ARGS:--}
OpenThread FTD support : ${enable_ftd}
OpenThread MTD support : ${enable_mtd}
OpenThread Radio Only support : ${enable_radio_only}
examples/Makefile.am
-7
View File
@@ -47,11 +47,4 @@ SUBDIRS += \
$(NULL)
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
platforms \
apps \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/apps/Makefile.am
-7
View File
@@ -50,11 +50,4 @@ SUBDIRS += ncp
endif
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
cli \
ncp \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/Makefile.am
-19
View File
@@ -109,23 +109,4 @@ noinst_HEADERS = \
openthread-system.h \
$(NULL)
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
cc1352 \
cc2538 \
cc2650 \
cc2652 \
efr32mg12 \
efr32mg13 \
efr32mg21 \
gp712 \
kw41z \
nrf528xx \
simulation \
qpg6095 \
samr21 \
utils \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/cc1352/Makefile.am
-4
View File
@@ -73,10 +73,6 @@ libopenthread_cc1352_a_DEPENDENCIES
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_cc1352_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
examples/platforms/cc1352/crypto/aes_alt.h
+3 -6
View File
@@ -71,8 +71,7 @@ void mbedtls_aes_free(mbedtls_aes_context *ctx);
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* @brief AES key schedule (decryption)
@@ -84,8 +83,7 @@ int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
@@ -99,8 +97,7 @@ int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
* @retval 0 If successful
* @retval AES_KEYSTORE_READ_ERROR If the indicated keystore ram could not be read
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16],
unsigned char output[16]);
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
#ifdef __cplusplus
}
examples/platforms/cc2538/Makefile.am
-4
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@@ -58,10 +58,6 @@ libopenthread_cc2538_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_cc2538_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
examples/platforms/cc2650/Makefile.am
-4
View File
@@ -74,10 +74,6 @@ libopenthread_cc2650_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_cc2650_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
examples/platforms/cc2650/crypto/aes_alt.h
+3 -6
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@@ -70,8 +70,7 @@ void mbedtls_aes_free(mbedtls_aes_context *ctx);
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES key schedule (decryption)
@@ -82,8 +81,7 @@ int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
@@ -95,8 +93,7 @@ int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
*
* \return 0 if successful
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16],
unsigned char output[16]);
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
#ifdef __cplusplus
}
examples/platforms/cc2652/Makefile.am
-4
View File
@@ -73,10 +73,6 @@ libopenthread_cc2652_a_DEPENDENCIES
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_cc2652_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
examples/platforms/cc2652/crypto/aes_alt.h
+3 -6
View File
@@ -71,8 +71,7 @@ void mbedtls_aes_free(mbedtls_aes_context *ctx);
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* @brief AES key schedule (decryption)
@@ -84,8 +83,7 @@ int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
@@ -99,8 +97,7 @@ int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
* @retval 0 If successful
* @retval AES_KEYSTORE_READ_ERROR If the indicated keystore ram could not be read
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16],
unsigned char output[16]);
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
#ifdef __cplusplus
}
examples/platforms/efr32mg12/Makefile.am
+1 -9
View File
@@ -123,10 +123,6 @@ libopenthread_efr32mg12_a_SOURCES =
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_efr32mg12_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
@@ -135,13 +131,9 @@ libopenthread_efr32mg12_a_LIBADD
DIST_SUBDIRS = \
sleepy-demo \
$(NULL)
SUBDIRS = \
sleepy-demo \
$(NULL)
PRETTY_SUBDIRS = \
sleepy-demo \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/efr32mg12/brd4161a/board_config.h
+4 -4
View File
@@ -35,17 +35,17 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
#endif
#ifndef RADIO_CONFIG_DMP_SUPPORT
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#endif
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif // __BOARD_CONFIG_H__
examples/platforms/efr32mg12/brd4161a/hal-config.h
+188 -180
View File
@@ -33,35 +33,38 @@
// [BULBPWM_COLOR]$
// $[BUTTON]
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT { { BSP_BUTTON0_PORT, BSP_BUTTON0_PIN }, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } }
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT \
{ \
{BSP_BUTTON0_PORT, BSP_BUTTON0_PIN}, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } \
}
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
// [BUTTON]$
// $[CMU]
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (0)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (338)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (0)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (0)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (338)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (0)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
// [CMU]$
// $[COEX]
@@ -74,10 +77,10 @@
// [CSEN0]$
// $[DCDC]
#define BSP_DCDC_PRESENT (1)
#define BSP_DCDC_PRESENT (1)
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
// [DCDC]$
// $[EMU]
@@ -90,47 +93,47 @@
// [EZRADIOPRO]$
// $[GPIO]
#define PORTIO_GPIO_SWCLKTCK_PIN (0)
#define PORTIO_GPIO_SWCLKTCK_PORT (gpioPortF)
#define PORTIO_GPIO_DBGROUTE_LOC (0)
#define PORTIO_GPIO_SWCLKTCK_PIN (0)
#define PORTIO_GPIO_SWCLKTCK_PORT (gpioPortF)
#define PORTIO_GPIO_DBGROUTE_LOC (0)
#define PORTIO_GPIO_SWDIOTMS_PIN (1)
#define PORTIO_GPIO_SWDIOTMS_PORT (gpioPortF)
#define PORTIO_GPIO_SWDIOTMS_PIN (1)
#define PORTIO_GPIO_SWDIOTMS_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_PIN (2)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0)
#define PORTIO_GPIO_SWV_PIN (2)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0)
#define PORTIO_GPIO_TCLK_PIN (8)
#define PORTIO_GPIO_TCLK_PORT (gpioPortF)
#define PORTIO_GPIO_TCLK_LOC (0)
#define PORTIO_GPIO_TCLK_PIN (8)
#define PORTIO_GPIO_TCLK_PORT (gpioPortF)
#define PORTIO_GPIO_TCLK_LOC (0)
#define PORTIO_GPIO_TD0_PIN (9)
#define PORTIO_GPIO_TD0_PORT (gpioPortF)
#define PORTIO_GPIO_TD0_LOC (0)
#define PORTIO_GPIO_TD0_PIN (9)
#define PORTIO_GPIO_TD0_PORT (gpioPortF)
#define PORTIO_GPIO_TD0_LOC (0)
#define PORTIO_GPIO_TD1_PIN (10)
#define PORTIO_GPIO_TD1_PORT (gpioPortF)
#define PORTIO_GPIO_TD1_LOC (0)
#define PORTIO_GPIO_TD1_PIN (10)
#define PORTIO_GPIO_TD1_PORT (gpioPortF)
#define PORTIO_GPIO_TD1_LOC (0)
#define PORTIO_GPIO_TD2_PIN (11)
#define PORTIO_GPIO_TD2_PORT (gpioPortF)
#define PORTIO_GPIO_TD2_LOC (0)
#define PORTIO_GPIO_TD2_PIN (11)
#define PORTIO_GPIO_TD2_PORT (gpioPortF)
#define PORTIO_GPIO_TD2_LOC (0)
#define PORTIO_GPIO_TD3_PIN (12)
#define PORTIO_GPIO_TD3_PORT (gpioPortF)
#define PORTIO_GPIO_TD3_LOC (0)
#define PORTIO_GPIO_TD3_PIN (12)
#define PORTIO_GPIO_TD3_PORT (gpioPortF)
#define PORTIO_GPIO_TD3_LOC (0)
// [GPIO]$
// $[I2C0]
#define PORTIO_I2C0_SCL_PIN (10)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (14)
#define PORTIO_I2C0_SCL_PIN (10)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (14)
#define PORTIO_I2C0_SDA_PIN (11)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (16)
#define PORTIO_I2C0_SDA_PIN (11)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (16)
// [I2C0]$
@@ -147,18 +150,24 @@
// [IOEXP]$
// $[LED]
#define BSP_LED_PRESENT (1)
#define BSP_LED_PRESENT (1)
#define BSP_LED0_PIN (4)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED0_PIN (4)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED1_PIN (5)
#define BSP_LED1_PORT (gpioPortF)
#define BSP_LED1_PIN (5)
#define BSP_LED1_PORT (gpioPortF)
#define HAL_LED_ENABLE { 0, 1 }
#define HAL_LED_COUNT (2)
#define BSP_LED_COUNT (2)
#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
#define HAL_LED_ENABLE \
{ \
0, 1 \
}
#define HAL_LED_COUNT (2)
#define BSP_LED_COUNT (2)
#define BSP_LED_INIT \
{ \
{BSP_LED0_PORT, BSP_LED0_PIN}, { BSP_LED1_PORT, BSP_LED1_PIN } \
}
// [LED]$
// $[LESENSE]
@@ -177,13 +186,13 @@
// [LNA]$
// $[PA]
#define HAL_PA_ENABLE (1)
#define HAL_PA_ENABLE (1)
#define HAL_PA_RAMP (10)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252)
#define HAL_PA_VOLTAGE (3300)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
#define HAL_PA_RAMP (10)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252)
#define HAL_PA_VOLTAGE (3300)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
// [PA]$
// $[PCNT0]
@@ -199,67 +208,67 @@
// [PORTIO]$
// $[PRS]
#define PORTIO_PRS_CH4_PIN (13)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4)
#define PORTIO_PRS_CH4_PIN (13)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4)
// [PRS]$
// $[PTI]
#define PORTIO_PTI_DFRAME_PIN (13)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6)
#define PORTIO_PTI_DFRAME_PIN (13)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6)
#define PORTIO_PTI_DOUT_PIN (12)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6)
#define PORTIO_PTI_DOUT_PIN (12)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6)
#define HAL_PTI_ENABLE (1)
#define HAL_PTI_ENABLE (1)
#define BSP_PTI_DFRAME_PIN (13)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6)
#define BSP_PTI_DFRAME_PIN (13)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6)
#define BSP_PTI_DOUT_PIN (12)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6)
#define BSP_PTI_DOUT_PIN (12)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000)
// [PTI]$
// $[PYD1698]
// [PYD1698]$
// $[SERIAL]
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (2)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30)
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (2)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30)
#define BSP_SERIAL_APP_RX_PIN (1)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0)
#define BSP_SERIAL_APP_RX_PIN (1)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0)
#define BSP_SERIAL_APP_TX_PIN (0)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0)
#define BSP_SERIAL_APP_TX_PIN (0)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0)
#define BSP_SERIAL_APP_RTS_PIN (3)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30)
#define BSP_SERIAL_APP_RTS_PIN (3)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_BAUD_RATE (115200)
#define HAL_SERIAL_APP_RXSTOP (16)
#define HAL_SERIAL_APP_RXSTART (16)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_BAUD_RATE (115200)
#define HAL_SERIAL_APP_RXSTOP (16)
#define HAL_SERIAL_APP_RXSTART (16)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [SERIAL]$
// $[SPIDISPLAY]
@@ -278,102 +287,102 @@
// [UARTNCP]$
// $[USART0]
#define PORTIO_USART0_CTS_PIN (2)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30)
#define PORTIO_USART0_CTS_PIN (2)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30)
#define PORTIO_USART0_RTS_PIN (3)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30)
#define PORTIO_USART0_RTS_PIN (3)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30)
#define PORTIO_USART0_RX_PIN (1)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0)
#define PORTIO_USART0_RX_PIN (1)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0)
#define PORTIO_USART0_TX_PIN (0)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0)
#define PORTIO_USART0_TX_PIN (0)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0)
#define HAL_USART0_ENABLE (1)
#define HAL_USART0_ENABLE (1)
#define BSP_USART0_CTS_PIN (2)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30)
#define BSP_USART0_CTS_PIN (2)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30)
#define BSP_USART0_RX_PIN (1)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0)
#define BSP_USART0_RX_PIN (1)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0)
#define BSP_USART0_TX_PIN (0)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0)
#define BSP_USART0_TX_PIN (0)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0)
#define BSP_USART0_RTS_PIN (3)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30)
#define BSP_USART0_RTS_PIN (3)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30)
#define HAL_USART0_RX_QUEUE_SIZE (128)
#define HAL_USART0_BAUD_RATE (115200)
#define HAL_USART0_RXSTOP (16)
#define HAL_USART0_RXSTART (16)
#define HAL_USART0_TX_QUEUE_SIZE (128)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
#define HAL_USART0_RX_QUEUE_SIZE (128)
#define HAL_USART0_BAUD_RATE (115200)
#define HAL_USART0_RXSTOP (16)
#define HAL_USART0_RXSTART (16)
#define HAL_USART0_TX_QUEUE_SIZE (128)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
// [USART0]$
// $[USART1]
#define PORTIO_USART1_CLK_PIN (8)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11)
#define PORTIO_USART1_CLK_PIN (8)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11)
#define PORTIO_USART1_CS_PIN (9)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11)
#define PORTIO_USART1_CS_PIN (9)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11)
#define PORTIO_USART1_RX_PIN (7)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11)
#define PORTIO_USART1_RX_PIN (7)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11)
#define PORTIO_USART1_TX_PIN (6)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11)
#define PORTIO_USART1_TX_PIN (6)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11)
// [USART1]$
// $[USART2]
#define PORTIO_USART2_CLK_PIN (8)
#define PORTIO_USART2_CLK_PORT (gpioPortA)
#define PORTIO_USART2_CLK_LOC (1)
#define PORTIO_USART2_CLK_PIN (8)
#define PORTIO_USART2_CLK_PORT (gpioPortA)
#define PORTIO_USART2_CLK_LOC (1)
#define PORTIO_USART2_CS_PIN (9)
#define PORTIO_USART2_CS_PORT (gpioPortA)
#define PORTIO_USART2_CS_LOC (1)
#define PORTIO_USART2_CS_PIN (9)
#define PORTIO_USART2_CS_PORT (gpioPortA)
#define PORTIO_USART2_CS_LOC (1)
#define PORTIO_USART2_RX_PIN (7)
#define PORTIO_USART2_RX_PORT (gpioPortA)
#define PORTIO_USART2_RX_LOC (1)
#define PORTIO_USART2_RX_PIN (7)
#define PORTIO_USART2_RX_PORT (gpioPortA)
#define PORTIO_USART2_RX_LOC (1)
#define PORTIO_USART2_TX_PIN (6)
#define PORTIO_USART2_TX_PORT (gpioPortA)
#define PORTIO_USART2_TX_LOC (1)
#define PORTIO_USART2_TX_PIN (6)
#define PORTIO_USART2_TX_PORT (gpioPortA)
#define PORTIO_USART2_TX_LOC (1)
// [USART2]$
// $[USART3]
#define PORTIO_USART3_CTS_PIN (8)
#define PORTIO_USART3_CTS_PORT (gpioPortD)
#define PORTIO_USART3_CTS_LOC (28)
#define PORTIO_USART3_CTS_PIN (8)
#define PORTIO_USART3_CTS_PORT (gpioPortD)
#define PORTIO_USART3_CTS_LOC (28)
#define PORTIO_USART3_RTS_PIN (9)
#define PORTIO_USART3_RTS_PORT (gpioPortD)
#define PORTIO_USART3_RTS_LOC (28)
#define PORTIO_USART3_RTS_PIN (9)
#define PORTIO_USART3_RTS_PORT (gpioPortD)
#define PORTIO_USART3_RTS_LOC (28)
#define PORTIO_USART3_RX_PIN (7)
#define PORTIO_USART3_RX_PORT (gpioPortB)
#define PORTIO_USART3_RX_LOC (10)
#define PORTIO_USART3_RX_PIN (7)
#define PORTIO_USART3_RX_PORT (gpioPortB)
#define PORTIO_USART3_RX_LOC (10)
#define PORTIO_USART3_TX_PIN (6)
#define PORTIO_USART3_TX_PORT (gpioPortB)
#define PORTIO_USART3_TX_LOC (10)
#define PORTIO_USART3_TX_PIN (6)
#define PORTIO_USART3_TX_PORT (gpioPortB)
#define PORTIO_USART3_TX_LOC (10)
// [USART3]$
@@ -396,4 +405,3 @@
// [WTIMER1]$
#endif /* HAL_CONFIG_H */
examples/platforms/efr32mg12/brd4166a/board_config.h
+4 -4
View File
@@ -35,17 +35,17 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
#endif
#ifndef RADIO_CONFIG_DMP_SUPPORT
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#endif
#define RADIO_CONFIG_PA_USES_DCDC 1 /// The PA(s) is(are) fed from the DCDC
#define RADIO_CONFIG_PA_USES_DCDC 1 /// The PA(s) is(are) fed from the DCDC
#endif // __BOARD_CONFIG_H__
examples/platforms/efr32mg12/brd4166a/hal-config.h
+188 -180
View File
@@ -33,35 +33,38 @@
// [BULBPWM_COLOR]$
// $[BUTTON]
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON0_PIN (14U)
#define BSP_BUTTON0_PORT (gpioPortD)
#define BSP_BUTTON0_PIN (14U)
#define BSP_BUTTON0_PORT (gpioPortD)
#define BSP_BUTTON1_PIN (15U)
#define BSP_BUTTON1_PORT (gpioPortD)
#define BSP_BUTTON1_PIN (15U)
#define BSP_BUTTON1_PORT (gpioPortD)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT { { BSP_BUTTON0_PORT, BSP_BUTTON0_PIN }, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } }
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT \
{ \
{BSP_BUTTON0_PORT, BSP_BUTTON0_PIN}, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } \
}
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
// [BUTTON]$
// $[CMU]
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (32U)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (332)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (0)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (32U)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (332)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (0)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
// [CMU]$
// $[COEX]
@@ -74,10 +77,10 @@
// [CSEN0]$
// $[DCDC]
#define BSP_DCDC_PRESENT (1)
#define BSP_DCDC_PRESENT (1)
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
// [DCDC]$
// $[EMU]
@@ -90,47 +93,47 @@
// [EZRADIOPRO]$
// $[GPIO]
#define PORTIO_GPIO_SWCLKTCK_PIN (0)
#define PORTIO_GPIO_SWCLKTCK_PORT (gpioPortF)
#define PORTIO_GPIO_DBGROUTE_LOC (0)
#define PORTIO_GPIO_SWCLKTCK_PIN (0)
#define PORTIO_GPIO_SWCLKTCK_PORT (gpioPortF)
#define PORTIO_GPIO_DBGROUTE_LOC (0)
#define PORTIO_GPIO_SWDIOTMS_PIN (1)
#define PORTIO_GPIO_SWDIOTMS_PORT (gpioPortF)
#define PORTIO_GPIO_SWDIOTMS_PIN (1)
#define PORTIO_GPIO_SWDIOTMS_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_PIN (2)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0)
#define PORTIO_GPIO_SWV_PIN (2)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0)
#define PORTIO_GPIO_TCLK_PIN (8)
#define PORTIO_GPIO_TCLK_PORT (gpioPortF)
#define PORTIO_GPIO_TCLK_LOC (0)
#define PORTIO_GPIO_TCLK_PIN (8)
#define PORTIO_GPIO_TCLK_PORT (gpioPortF)
#define PORTIO_GPIO_TCLK_LOC (0)
#define PORTIO_GPIO_TD0_PIN (9)
#define PORTIO_GPIO_TD0_PORT (gpioPortF)
#define PORTIO_GPIO_TD0_LOC (0)
#define PORTIO_GPIO_TD0_PIN (9)
#define PORTIO_GPIO_TD0_PORT (gpioPortF)
#define PORTIO_GPIO_TD0_LOC (0)
#define PORTIO_GPIO_TD1_PIN (10)
#define PORTIO_GPIO_TD1_PORT (gpioPortF)
#define PORTIO_GPIO_TD1_LOC (0)
#define PORTIO_GPIO_TD1_PIN (10)
#define PORTIO_GPIO_TD1_PORT (gpioPortF)
#define PORTIO_GPIO_TD1_LOC (0)
#define PORTIO_GPIO_TD2_PIN (11)
#define PORTIO_GPIO_TD2_PORT (gpioPortF)
#define PORTIO_GPIO_TD2_LOC (0)
#define PORTIO_GPIO_TD2_PIN (11)
#define PORTIO_GPIO_TD2_PORT (gpioPortF)
#define PORTIO_GPIO_TD2_LOC (0)
#define PORTIO_GPIO_TD3_PIN (12)
#define PORTIO_GPIO_TD3_PORT (gpioPortF)
#define PORTIO_GPIO_TD3_LOC (0)
#define PORTIO_GPIO_TD3_PIN (12)
#define PORTIO_GPIO_TD3_PORT (gpioPortF)
#define PORTIO_GPIO_TD3_LOC (0)
// [GPIO]$
// $[I2C0]
#define PORTIO_I2C0_SCL_PIN (10)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (14)
#define PORTIO_I2C0_SCL_PIN (10)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (14)
#define PORTIO_I2C0_SDA_PIN (11)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (16)
#define PORTIO_I2C0_SDA_PIN (11)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (16)
// [I2C0]$
@@ -147,18 +150,24 @@
// [IOEXP]$
// $[LED]
#define BSP_LED_PRESENT (1)
#define BSP_LED_PRESENT (1)
#define BSP_LED0_PIN (8)
#define BSP_LED0_PORT (gpioPortD)
#define BSP_LED0_PIN (8)
#define BSP_LED0_PORT (gpioPortD)
#define BSP_LED1_PIN (9)
#define BSP_LED1_PORT (gpioPortD)
#define BSP_LED1_PIN (9)
#define BSP_LED1_PORT (gpioPortD)
#define HAL_LED_ENABLE { 0, 1 }
#define HAL_LED_COUNT (2)
#define BSP_LED_COUNT (2)
#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
#define HAL_LED_ENABLE \
{ \
0, 1 \
}
#define HAL_LED_COUNT (2)
#define BSP_LED_COUNT (2)
#define BSP_LED_INIT \
{ \
{BSP_LED0_PORT, BSP_LED0_PIN}, { BSP_LED1_PORT, BSP_LED1_PIN } \
}
// [LED]$
// $[LESENSE]
@@ -177,13 +186,13 @@
// [LNA]$
// $[PA]
#define HAL_PA_ENABLE (1)
#define HAL_PA_ENABLE (1)
#define HAL_PA_RAMP (10)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252)
#define HAL_PA_VOLTAGE (3300)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
#define HAL_PA_RAMP (10)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252)
#define HAL_PA_VOLTAGE (3300)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
// [PA]$
// $[PCNT0]
@@ -199,67 +208,67 @@
// [PORTIO]$
// $[PRS]
#define PORTIO_PRS_CH4_PIN (13)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4)
#define PORTIO_PRS_CH4_PIN (13)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4)
// [PRS]$
// $[PTI]
#define PORTIO_PTI_DFRAME_PIN (13)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6)
#define PORTIO_PTI_DFRAME_PIN (13)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6)
#define PORTIO_PTI_DOUT_PIN (12)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6)
#define PORTIO_PTI_DOUT_PIN (12)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6)
#define HAL_PTI_ENABLE (1)
#define HAL_PTI_ENABLE (1)
#define BSP_PTI_DFRAME_PIN (13)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6)
#define BSP_PTI_DFRAME_PIN (13)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6)
#define BSP_PTI_DOUT_PIN (12)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6)
#define BSP_PTI_DOUT_PIN (12)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000)
// [PTI]$
// $[PYD1698]
// [PYD1698]$
// $[SERIAL]
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (2)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30)
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (2)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30)
#define BSP_SERIAL_APP_RX_PIN (1)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0)
#define BSP_SERIAL_APP_RX_PIN (1)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0)
#define BSP_SERIAL_APP_TX_PIN (0)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0)
#define BSP_SERIAL_APP_TX_PIN (0)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0)
#define BSP_SERIAL_APP_RTS_PIN (3)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30)
#define BSP_SERIAL_APP_RTS_PIN (3)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_BAUD_RATE (115200)
#define HAL_SERIAL_APP_RXSTOP (16)
#define HAL_SERIAL_APP_RXSTART (16)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_BAUD_RATE (115200)
#define HAL_SERIAL_APP_RXSTOP (16)
#define HAL_SERIAL_APP_RXSTART (16)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
// [SERIAL]$
// $[SPIDISPLAY]
@@ -278,102 +287,102 @@
// [UARTNCP]$
// $[USART0]
#define PORTIO_USART0_CTS_PIN (2)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30)
#define PORTIO_USART0_CTS_PIN (2)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30)
#define PORTIO_USART0_RTS_PIN (3)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30)
#define PORTIO_USART0_RTS_PIN (3)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30)
#define PORTIO_USART0_RX_PIN (1)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0)
#define PORTIO_USART0_RX_PIN (1)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0)
#define PORTIO_USART0_TX_PIN (0)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0)
#define PORTIO_USART0_TX_PIN (0)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0)
#define HAL_USART0_ENABLE (1)
#define HAL_USART0_ENABLE (1)
#define BSP_USART0_CTS_PIN (2)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30)
#define BSP_USART0_CTS_PIN (2)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30)
#define BSP_USART0_RX_PIN (1)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0)
#define BSP_USART0_RX_PIN (1)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0)
#define BSP_USART0_TX_PIN (0)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0)
#define BSP_USART0_TX_PIN (0)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0)
#define BSP_USART0_RTS_PIN (3)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30)
#define BSP_USART0_RTS_PIN (3)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30)
#define HAL_USART0_RX_QUEUE_SIZE (128)
#define HAL_USART0_BAUD_RATE (115200)
#define HAL_USART0_RXSTOP (16)
#define HAL_USART0_RXSTART (16)
#define HAL_USART0_TX_QUEUE_SIZE (128)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
#define HAL_USART0_RX_QUEUE_SIZE (128)
#define HAL_USART0_BAUD_RATE (115200)
#define HAL_USART0_RXSTOP (16)
#define HAL_USART0_RXSTART (16)
#define HAL_USART0_TX_QUEUE_SIZE (128)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
// [USART0]$
// $[USART1]
#define PORTIO_USART1_CLK_PIN (8)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11)
#define PORTIO_USART1_CLK_PIN (8)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11)
#define PORTIO_USART1_CS_PIN (9)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11)
#define PORTIO_USART1_CS_PIN (9)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11)
#define PORTIO_USART1_RX_PIN (7)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11)
#define PORTIO_USART1_RX_PIN (7)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11)
#define PORTIO_USART1_TX_PIN (6)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11)
#define PORTIO_USART1_TX_PIN (6)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11)
// [USART1]$
// $[USART2]
#define PORTIO_USART2_CLK_PIN (8)
#define PORTIO_USART2_CLK_PORT (gpioPortA)
#define PORTIO_USART2_CLK_LOC (1)
#define PORTIO_USART2_CLK_PIN (8)
#define PORTIO_USART2_CLK_PORT (gpioPortA)
#define PORTIO_USART2_CLK_LOC (1)
#define PORTIO_USART2_CS_PIN (9)
#define PORTIO_USART2_CS_PORT (gpioPortA)
#define PORTIO_USART2_CS_LOC (1)
#define PORTIO_USART2_CS_PIN (9)
#define PORTIO_USART2_CS_PORT (gpioPortA)
#define PORTIO_USART2_CS_LOC (1)
#define PORTIO_USART2_RX_PIN (7)
#define PORTIO_USART2_RX_PORT (gpioPortA)
#define PORTIO_USART2_RX_LOC (1)
#define PORTIO_USART2_RX_PIN (7)
#define PORTIO_USART2_RX_PORT (gpioPortA)
#define PORTIO_USART2_RX_LOC (1)
#define PORTIO_USART2_TX_PIN (6)
#define PORTIO_USART2_TX_PORT (gpioPortA)
#define PORTIO_USART2_TX_LOC (1)
#define PORTIO_USART2_TX_PIN (6)
#define PORTIO_USART2_TX_PORT (gpioPortA)
#define PORTIO_USART2_TX_LOC (1)
// [USART2]$
// $[USART3]
#define PORTIO_USART3_CTS_PIN (8)
#define PORTIO_USART3_CTS_PORT (gpioPortD)
#define PORTIO_USART3_CTS_LOC (28)
#define PORTIO_USART3_CTS_PIN (8)
#define PORTIO_USART3_CTS_PORT (gpioPortD)
#define PORTIO_USART3_CTS_LOC (28)
#define PORTIO_USART3_RTS_PIN (9)
#define PORTIO_USART3_RTS_PORT (gpioPortD)
#define PORTIO_USART3_RTS_LOC (28)
#define PORTIO_USART3_RTS_PIN (9)
#define PORTIO_USART3_RTS_PORT (gpioPortD)
#define PORTIO_USART3_RTS_LOC (28)
#define PORTIO_USART3_RX_PIN (7)
#define PORTIO_USART3_RX_PORT (gpioPortB)
#define PORTIO_USART3_RX_LOC (10)
#define PORTIO_USART3_RX_PIN (7)
#define PORTIO_USART3_RX_PORT (gpioPortB)
#define PORTIO_USART3_RX_LOC (10)
#define PORTIO_USART3_TX_PIN (6)
#define PORTIO_USART3_TX_PORT (gpioPortB)
#define PORTIO_USART3_TX_LOC (10)
#define PORTIO_USART3_TX_PIN (6)
#define PORTIO_USART3_TX_PORT (gpioPortB)
#define PORTIO_USART3_TX_LOC (10)
// [USART3]$
@@ -396,4 +405,3 @@
// [WTIMER1]$
#endif /* HAL_CONFIG_H */
examples/platforms/efr32mg12/brd4170a/board_config.h
+4 -4
View File
@@ -35,17 +35,17 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 915MHz band.
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 915MHz band.
#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
#endif
#ifndef RADIO_CONFIG_DMP_SUPPORT
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#endif
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif // __BOARD_CONFIG_H__
examples/platforms/efr32mg12/brd4170a/hal-config.h
+132 -120
View File
@@ -33,37 +33,43 @@
// [BULBPWM_COLOR]$
// $[BUTTON]
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT { { BSP_BUTTON0_PORT, BSP_BUTTON0_PIN }, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } }
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
#define HAL_BUTTON_ENABLE { 0, 1 }
#define HAL_BUTTON_COUNT (2U)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT \
{ \
{BSP_BUTTON0_PORT, BSP_BUTTON0_PIN}, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } \
}
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
#define HAL_BUTTON_ENABLE \
{ \
0, 1 \
}
#define HAL_BUTTON_COUNT (2U)
// [BUTTON]$
// $[CMU]
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (32U)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (342)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (0)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (32U)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (342)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (0)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
// [CMU]$
// $[COEX]
@@ -76,10 +82,10 @@
// [CSEN]$
// $[DCDC]
#define BSP_DCDC_PRESENT (1)
#define BSP_DCDC_PRESENT (1)
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
// [DCDC]$
// $[EMU]
@@ -113,18 +119,24 @@
// [IOEXP]$
// $[LED]
#define BSP_LED_PRESENT (1)
#define BSP_LED_PRESENT (1)
#define BSP_LED0_PIN (4U)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED0_PIN (4U)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED1_PIN (5U)
#define BSP_LED1_PORT (gpioPortF)
#define BSP_LED1_PIN (5U)
#define BSP_LED1_PORT (gpioPortF)
#define HAL_LED_ENABLE { 0, 1 }
#define HAL_LED_COUNT (2U)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
#define HAL_LED_ENABLE \
{ \
0, 1 \
}
#define HAL_LED_COUNT (2U)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT \
{ \
{BSP_LED0_PORT, BSP_LED0_PIN}, { BSP_LED1_PORT, BSP_LED1_PIN } \
}
// [LED]$
// $[LESENSE]
@@ -140,13 +152,13 @@
// [LFXO]$
// $[PA]
#define HAL_PA_ENABLE (1)
#define HAL_PA_ENABLE (1)
#define HAL_PA_RAMP (10UL)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252U)
#define HAL_PA_VOLTAGE (3300U)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
#define HAL_PA_RAMP (10UL)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252U)
#define HAL_PA_VOLTAGE (3300U)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
// [PA]$
// $[PCNT0]
@@ -165,65 +177,65 @@
// [PRS]$
// $[PTI]
#define PORTIO_PTI_DCLK_PIN (11U)
#define PORTIO_PTI_DCLK_PORT (gpioPortB)
#define PORTIO_PTI_DCLK_LOC (6U)
#define PORTIO_PTI_DCLK_PIN (11U)
#define PORTIO_PTI_DCLK_PORT (gpioPortB)
#define PORTIO_PTI_DCLK_LOC (6U)
#define PORTIO_PTI_DFRAME_PIN (13U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6U)
#define PORTIO_PTI_DFRAME_PIN (13U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6U)
#define PORTIO_PTI_DOUT_PIN (12U)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6U)
#define PORTIO_PTI_DOUT_PIN (12U)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6U)
#define HAL_PTI_ENABLE (1)
#define HAL_PTI_ENABLE (1)
#define BSP_PTI_DFRAME_PIN (13U)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6U)
#define BSP_PTI_DFRAME_PIN (13U)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6U)
#define BSP_PTI_DOUT_PIN (12U)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6U)
#define BSP_PTI_DOUT_PIN (12U)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6U)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000UL)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000UL)
// [PTI]$
// $[PYD1698]
// [PYD1698]$
// $[SERIAL]
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define HAL_SERIAL_IDLE_WAKE_ENABLE (1)
#define BSP_SERIAL_APP_CTS_PIN (2U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30U)
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define HAL_SERIAL_IDLE_WAKE_ENABLE (1)
#define BSP_SERIAL_APP_CTS_PIN (2U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30U)
#define BSP_SERIAL_APP_RX_PIN (1U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0U)
#define BSP_SERIAL_APP_RX_PIN (1U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0U)
#define BSP_SERIAL_APP_TX_PIN (0U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0U)
#define BSP_SERIAL_APP_TX_PIN (0U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0U)
#define BSP_SERIAL_APP_RTS_PIN (3U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30U)
#define BSP_SERIAL_APP_RTS_PIN (3U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30U)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_BAUD_RATE (115200UL)
#define HAL_SERIAL_APP_RXSTOP (16UL)
#define HAL_SERIAL_APP_RXSTART (16UL)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_BAUD_RATE (115200UL)
#define HAL_SERIAL_APP_RXSTOP (16UL)
#define HAL_SERIAL_APP_RXSTART (16UL)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [SERIAL]$
// $[SPIDISPLAY]
@@ -242,46 +254,46 @@
// [UARTNCP]$
// $[USART0]
#define PORTIO_USART0_CTS_PIN (2U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30U)
#define PORTIO_USART0_CTS_PIN (2U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30U)
#define PORTIO_USART0_RTS_PIN (3U)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30U)
#define PORTIO_USART0_RTS_PIN (3U)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30U)
#define PORTIO_USART0_RX_PIN (1U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0U)
#define PORTIO_USART0_RX_PIN (1U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0U)
#define PORTIO_USART0_TX_PIN (0U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0U)
#define PORTIO_USART0_TX_PIN (0U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0U)
#define HAL_USART0_ENABLE (1)
#define HAL_USART0_ENABLE (1)
#define BSP_USART0_CTS_PIN (2U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30U)
#define BSP_USART0_CTS_PIN (2U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30U)
#define BSP_USART0_RX_PIN (1U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0U)
#define BSP_USART0_RX_PIN (1U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0U)
#define BSP_USART0_TX_PIN (0U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0U)
#define BSP_USART0_TX_PIN (0U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0U)
#define BSP_USART0_RTS_PIN (3U)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30U)
#define BSP_USART0_RTS_PIN (3U)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30U)
#define HAL_USART0_RX_QUEUE_SIZE (128UL)
#define HAL_USART0_BAUD_RATE (115200UL)
#define HAL_USART0_RXSTOP (16UL)
#define HAL_USART0_RXSTART (16UL)
#define HAL_USART0_TX_QUEUE_SIZE (128UL)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
#define HAL_USART0_RX_QUEUE_SIZE (128UL)
#define HAL_USART0_BAUD_RATE (115200UL)
#define HAL_USART0_RXSTOP (16UL)
#define HAL_USART0_RXSTART (16UL)
#define HAL_USART0_TX_QUEUE_SIZE (128UL)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_NONE)
// [USART0]$
// $[USART1]
@@ -294,10 +306,10 @@
// [USART3]$
// $[VCOM]
#define HAL_VCOM_ENABLE (1)
#define HAL_VCOM_ENABLE (1)
#define BSP_VCOM_ENABLE_PIN (5U)
#define BSP_VCOM_ENABLE_PORT (gpioPortA)
#define BSP_VCOM_ENABLE_PIN (5U)
#define BSP_VCOM_ENABLE_PORT (gpioPortA)
// [VCOM]$
examples/platforms/efr32mg12/brd4304a/board_config.h
+4 -4
View File
@@ -35,17 +35,17 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
#endif
#ifndef RADIO_CONFIG_DMP_SUPPORT
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#endif
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif // __BOARD_CONFIG_H__
examples/platforms/efr32mg12/brd4304a/hal-config.h
+163 -155
View File
@@ -33,35 +33,38 @@
// [BULBPWM_COLOR]$
// $[BUTTON]
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT { { BSP_BUTTON0_PORT, BSP_BUTTON0_PIN }, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } }
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT \
{ \
{BSP_BUTTON0_PORT, BSP_BUTTON0_PIN}, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } \
}
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
// [BUTTON]$
// $[CMU]
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (0U)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (285)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (1)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (0U)
#define BSP_CLK_LFXO_FREQ (32768U)
#define HAL_CLK_LFACLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (285)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE_TOKEN (1)
#define HAL_CLK_HFXO_AUTOSTART (HAL_CLK_HFXO_AUTOSTART_NONE)
// [CMU]$
// $[COEX]
@@ -74,10 +77,10 @@
// [CSEN]$
// $[DCDC]
#define BSP_DCDC_PRESENT (1)
#define BSP_DCDC_PRESENT (1)
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
#define HAL_DCDC_BYPASS (0)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
// [DCDC]$
// $[EMU]
@@ -90,39 +93,39 @@
// [EZRADIOPRO]$
// $[FEM]
#define HAL_FEM_ENABLE (1)
#define HAL_FEM_ENABLE (1)
#define BSP_FEM_RX_PIN (10U)
#define BSP_FEM_RX_PORT (gpioPortD)
#define BSP_FEM_RX_LOC (0U)
#define BSP_FEM_RX_PIN (10U)
#define BSP_FEM_RX_PORT (gpioPortD)
#define BSP_FEM_RX_LOC (0U)
#define BSP_FEM_SLEEP_PIN (11U)
#define BSP_FEM_SLEEP_PORT (gpioPortD)
#define BSP_FEM_SLEEP_LOC (13U)
#define BSP_FEM_SLEEP_PIN (11U)
#define BSP_FEM_SLEEP_PORT (gpioPortD)
#define BSP_FEM_SLEEP_LOC (13U)
#define HAL_FEM_RX_ACTIVE (1)
#define BSP_FEM_RX_CHANNEL (5)
#define HAL_FEM_TX_ACTIVE (0)
#define HAL_FEM_BYPASS_ENABLE (0)
#define BSP_FEM_SLEEP_CHANNEL (6)
#define HAL_FEM_TX_HIGH_POWER (0)
#define HAL_FEM_RX_ACTIVE (1)
#define BSP_FEM_RX_CHANNEL (5)
#define HAL_FEM_TX_ACTIVE (0)
#define HAL_FEM_BYPASS_ENABLE (0)
#define BSP_FEM_SLEEP_CHANNEL (6)
#define HAL_FEM_TX_HIGH_POWER (0)
// [FEM]$
// $[GPIO]
#define PORTIO_GPIO_SWV_PIN (2U)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0U)
#define PORTIO_GPIO_SWV_PIN (2U)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0U)
// [GPIO]$
// $[I2C0]
#define PORTIO_I2C0_SCL_PIN (11U)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (15U)
#define PORTIO_I2C0_SCL_PIN (11U)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (15U)
#define PORTIO_I2C0_SDA_PIN (10U)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (15U)
#define PORTIO_I2C0_SDA_PIN (10U)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (15U)
// [I2C0]$
@@ -139,18 +142,24 @@
// [IOEXP]$
// $[LED]
#define BSP_LED_PRESENT (1)
#define BSP_LED_PRESENT (1)
#define BSP_LED0_PIN (6U)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED0_PIN (6U)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED1_PIN (7U)
#define BSP_LED1_PORT (gpioPortF)
#define BSP_LED1_PIN (7U)
#define BSP_LED1_PORT (gpioPortF)
#define HAL_LED_ENABLE { 0, 1 }
#define HAL_LED_COUNT (2U)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
#define HAL_LED_ENABLE \
{ \
0, 1 \
}
#define HAL_LED_COUNT (2U)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT \
{ \
{BSP_LED0_PORT, BSP_LED0_PIN}, { BSP_LED1_PORT, BSP_LED1_PIN } \
}
// [LED]$
// $[LESENSE]
@@ -166,13 +175,13 @@
// [LFXO]$
// $[PA]
#define HAL_PA_ENABLE (1)
#define HAL_PA_ENABLE (1)
#define HAL_PA_RAMP (10UL)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252U)
#define HAL_PA_VOLTAGE (3300U)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
#define HAL_PA_RAMP (10UL)
#define HAL_PA_2P4_LOWPOWER (0)
#define HAL_PA_POWER (252U)
#define HAL_PA_VOLTAGE (3300U)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
// [PA]$
// $[PCNT0]
@@ -188,75 +197,75 @@
// [PORTIO]$
// $[PRS]
#define PORTIO_PRS_CH4_PIN (13U)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4U)
#define PORTIO_PRS_CH4_PIN (13U)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4U)
#define PORTIO_PRS_CH5_PIN (10U)
#define PORTIO_PRS_CH5_PORT (gpioPortD)
#define PORTIO_PRS_CH5_LOC (0U)
#define PORTIO_PRS_CH5_PIN (10U)
#define PORTIO_PRS_CH5_PORT (gpioPortD)
#define PORTIO_PRS_CH5_LOC (0U)
#define PORTIO_PRS_CH6_PIN (11U)
#define PORTIO_PRS_CH6_PORT (gpioPortD)
#define PORTIO_PRS_CH6_LOC (13U)
#define PORTIO_PRS_CH6_PIN (11U)
#define PORTIO_PRS_CH6_PORT (gpioPortD)
#define PORTIO_PRS_CH6_LOC (13U)
// [PRS]$
// $[PTI]
#define PORTIO_PTI_DFRAME_PIN (13U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6U)
#define PORTIO_PTI_DFRAME_PIN (13U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6U)
#define PORTIO_PTI_DOUT_PIN (11U)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (5U)
#define PORTIO_PTI_DOUT_PIN (11U)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (5U)
#define HAL_PTI_ENABLE (1)
#define HAL_PTI_ENABLE (1)
#define BSP_PTI_DFRAME_PIN (13U)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6U)
#define BSP_PTI_DFRAME_PIN (13U)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6U)
#define BSP_PTI_DOUT_PIN (11U)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (5U)
#define BSP_PTI_DOUT_PIN (11U)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (5U)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000UL)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000UL)
// [PTI]$
// $[PYD1698]
// [PYD1698]$
// $[SERIAL]
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (2U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30U)
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (2U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30U)
#define BSP_SERIAL_APP_RX_PIN (1U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0U)
#define BSP_SERIAL_APP_RX_PIN (1U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0U)
#define BSP_SERIAL_APP_TX_PIN (0U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0U)
#define BSP_SERIAL_APP_TX_PIN (0U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0U)
#define BSP_SERIAL_APP_RTS_PIN (3U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30U)
#define BSP_SERIAL_APP_RTS_PIN (3U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30U)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_BAUD_RATE (115200UL)
#define HAL_SERIAL_APP_RXSTOP (16UL)
#define HAL_SERIAL_APP_RXSTART (16UL)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_BAUD_RATE (115200UL)
#define HAL_SERIAL_APP_RXSTOP (16UL)
#define HAL_SERIAL_APP_RXSTART (16UL)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [SERIAL]$
// $[SPIDISPLAY]
@@ -275,64 +284,64 @@
// [UARTNCP]$
// $[USART0]
#define PORTIO_USART0_CTS_PIN (2U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30U)
#define PORTIO_USART0_CTS_PIN (2U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30U)
#define PORTIO_USART0_RTS_PIN (3U)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30U)
#define PORTIO_USART0_RTS_PIN (3U)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30U)
#define PORTIO_USART0_RX_PIN (1U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0U)
#define PORTIO_USART0_RX_PIN (1U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0U)
#define PORTIO_USART0_TX_PIN (0U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0U)
#define PORTIO_USART0_TX_PIN (0U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0U)
#define HAL_USART0_ENABLE (1)
#define HAL_USART0_ENABLE (1)
#define BSP_USART0_CTS_PIN (2U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30U)
#define BSP_USART0_CTS_PIN (2U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30U)
#define BSP_USART0_RX_PIN (1U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0U)
#define BSP_USART0_RX_PIN (1U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0U)
#define BSP_USART0_TX_PIN (0U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0U)
#define BSP_USART0_TX_PIN (0U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0U)
#define BSP_USART0_RTS_PIN (3U)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30U)
#define BSP_USART0_RTS_PIN (3U)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30U)
#define HAL_USART0_RX_QUEUE_SIZE (128UL)
#define HAL_USART0_BAUD_RATE (115200UL)
#define HAL_USART0_RXSTOP (16UL)
#define HAL_USART0_RXSTART (16UL)
#define HAL_USART0_TX_QUEUE_SIZE (128UL)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_USART0_RX_QUEUE_SIZE (128UL)
#define HAL_USART0_BAUD_RATE (115200UL)
#define HAL_USART0_RXSTOP (16UL)
#define HAL_USART0_RXSTART (16UL)
#define HAL_USART0_TX_QUEUE_SIZE (128UL)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [USART0]$
// $[USART1]
#define PORTIO_USART1_CLK_PIN (8U)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11U)
#define PORTIO_USART1_CLK_PIN (8U)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11U)
#define PORTIO_USART1_CS_PIN (9U)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11U)
#define PORTIO_USART1_CS_PIN (9U)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11U)
#define PORTIO_USART1_RX_PIN (7U)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11U)
#define PORTIO_USART1_RX_PIN (7U)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11U)
#define PORTIO_USART1_TX_PIN (6U)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11U)
#define PORTIO_USART1_TX_PIN (6U)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11U)
// [USART1]$
@@ -361,4 +370,3 @@
// [WTIMER1]$
#endif /* HAL_CONFIG_H */
examples/platforms/efr32mg12/crypto/efr32-mbedtls-config.h
+1 -1
View File
@@ -25,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef EFR32_MBEDTLS_CONFIG_H
#define EFR32_MBEDTLS_CONFIG_H
examples/platforms/efr32mg12/sleepy-demo/Makefile.am
-7
View File
@@ -44,11 +44,4 @@ if OPENTHREAD_ENABLE_EXECUTABLE
SUBDIRS += sleepy-demo-mtd sleepy-demo-ftd
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
sleepy-demo-mtd \
sleepy-demo-ftd \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/efr32mg13/Makefile.am
+1 -9
View File
@@ -123,10 +123,6 @@ libopenthread_efr32mg13_a_SOURCES =
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_efr32mg13_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
@@ -135,13 +131,9 @@ libopenthread_efr32mg13_a_LIBADD
DIST_SUBDIRS = \
sleepy-demo \
$(NULL)
SUBDIRS = \
sleepy-demo \
$(NULL)
PRETTY_SUBDIRS = \
sleepy-demo \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/efr32mg13/brd4168a/board_config.h
+4 -4
View File
@@ -35,17 +35,17 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_915MHZ_OQPSK_SUPPORT 0 /// Dev board doesn't support OQPSK modulation in 915MHz band.
#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
#endif
#ifndef RADIO_CONFIG_DMP_SUPPORT
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#define RADIO_CONFIG_PA_USES_DCDC 0 /// The PA(s) is(are) fed from VBAT
#endif
examples/platforms/efr32mg13/brd4168a/hal-config.h
+215 -209
View File
@@ -26,8 +26,8 @@
// $[BTL_BUTTON]
#define BSP_BTL_BUTTON_PIN (6U)
#define BSP_BTL_BUTTON_PORT (gpioPortF)
#define BSP_BTL_BUTTON_PIN (6U)
#define BSP_BTL_BUTTON_PORT (gpioPortF)
// [BTL_BUTTON]$
@@ -38,33 +38,36 @@
// [BULBPWM_COLOR]$
// $[BUTTON]
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON_PRESENT (1)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON0_PIN (6U)
#define BSP_BUTTON0_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON1_PIN (7U)
#define BSP_BUTTON1_PORT (gpioPortF)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT { { BSP_BUTTON0_PORT, BSP_BUTTON0_PIN }, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } }
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
#define BSP_BUTTON_COUNT (2U)
#define BSP_BUTTON_INIT \
{ \
{BSP_BUTTON0_PORT, BSP_BUTTON0_PIN}, { BSP_BUTTON1_PORT, BSP_BUTTON1_PIN } \
}
#define BSP_BUTTON_GPIO_DOUT (HAL_GPIO_DOUT_LOW)
#define BSP_BUTTON_GPIO_MODE (HAL_GPIO_MODE_INPUT)
// [BUTTON]$
// $[CMU]
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define HAL_CLK_LFECLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_LFBCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE (330)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_FREQ (32768U)
#define BSP_CLK_LFXO_CTUNE (32U)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define BSP_CLK_HFXO_CTUNE (330)
#define BSP_CLK_LFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_FREQ (32768U)
#define BSP_CLK_LFXO_CTUNE (32U)
// [CMU]$
// $[COEX]
@@ -77,31 +80,31 @@
// [CSEN]$
// $[DCDC]
#define BSP_DCDC_PRESENT (1)
#define BSP_DCDC_PRESENT (1)
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
#define BSP_DCDC_INIT EMU_DCDCINIT_DEFAULT
// [DCDC]$
// $[EMU]
// [EMU]$
// $[EXTFLASH]
#define BSP_EXTFLASH_CS_PIN (4U)
#define BSP_EXTFLASH_CS_PORT (gpioPortA)
#define BSP_EXTFLASH_CS_PIN (4U)
#define BSP_EXTFLASH_CS_PORT (gpioPortA)
#define BSP_EXTFLASH_INTERNAL (0)
#define BSP_EXTFLASH_USART (HAL_SPI_PORT_USART1)
#define BSP_EXTFLASH_MOSI_PIN (6U)
#define BSP_EXTFLASH_MOSI_PORT (gpioPortC)
#define BSP_EXTFLASH_MOSI_LOC (11U)
#define BSP_EXTFLASH_INTERNAL (0)
#define BSP_EXTFLASH_USART (HAL_SPI_PORT_USART1)
#define BSP_EXTFLASH_MOSI_PIN (6U)
#define BSP_EXTFLASH_MOSI_PORT (gpioPortC)
#define BSP_EXTFLASH_MOSI_LOC (11U)
#define BSP_EXTFLASH_MISO_PIN (7U)
#define BSP_EXTFLASH_MISO_PORT (gpioPortC)
#define BSP_EXTFLASH_MISO_LOC (11U)
#define BSP_EXTFLASH_MISO_PIN (7U)
#define BSP_EXTFLASH_MISO_PORT (gpioPortC)
#define BSP_EXTFLASH_MISO_LOC (11U)
#define BSP_EXTFLASH_CLK_PIN (8U)
#define BSP_EXTFLASH_CLK_PORT (gpioPortC)
#define BSP_EXTFLASH_CLK_LOC (11U)
#define BSP_EXTFLASH_CLK_PIN (8U)
#define BSP_EXTFLASH_CLK_PORT (gpioPortC)
#define BSP_EXTFLASH_CLK_LOC (11U)
// [EXTFLASH]$
@@ -112,32 +115,32 @@
// [FEM]$
// $[GPIO]
#define PORTIO_GPIO_SWV_PIN (2U)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0U)
#define PORTIO_GPIO_SWV_PIN (2U)
#define PORTIO_GPIO_SWV_PORT (gpioPortF)
#define PORTIO_GPIO_SWV_LOC (0U)
#define BSP_TRACE_SWO_PIN (2U)
#define BSP_TRACE_SWO_PORT (gpioPortF)
#define BSP_TRACE_SWO_LOC (0U)
#define BSP_TRACE_SWO_PIN (2U)
#define BSP_TRACE_SWO_PORT (gpioPortF)
#define BSP_TRACE_SWO_LOC (0U)
// [GPIO]$
// $[I2C0]
#define PORTIO_I2C0_SCL_PIN (10U)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (14U)
#define PORTIO_I2C0_SCL_PIN (10U)
#define PORTIO_I2C0_SCL_PORT (gpioPortC)
#define PORTIO_I2C0_SCL_LOC (14U)
#define PORTIO_I2C0_SDA_PIN (11U)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (16U)
#define PORTIO_I2C0_SDA_PIN (11U)
#define PORTIO_I2C0_SDA_PORT (gpioPortC)
#define PORTIO_I2C0_SDA_LOC (16U)
#define BSP_I2C0_SCL_PIN (10U)
#define BSP_I2C0_SCL_PORT (gpioPortC)
#define BSP_I2C0_SCL_LOC (14U)
#define BSP_I2C0_SCL_PIN (10U)
#define BSP_I2C0_SCL_PORT (gpioPortC)
#define BSP_I2C0_SCL_LOC (14U)
#define BSP_I2C0_SDA_PIN (11U)
#define BSP_I2C0_SDA_PORT (gpioPortC)
#define BSP_I2C0_SDA_LOC (16U)
#define BSP_I2C0_SDA_PIN (11U)
#define BSP_I2C0_SDA_PORT (gpioPortC)
#define BSP_I2C0_SDA_LOC (16U)
// [I2C0]$
@@ -146,17 +149,17 @@
// $[I2CSENSOR]
#define BSP_I2CSENSOR_ENABLE_PIN (15U)
#define BSP_I2CSENSOR_ENABLE_PORT (gpioPortD)
#define BSP_I2CSENSOR_ENABLE_PIN (15U)
#define BSP_I2CSENSOR_ENABLE_PORT (gpioPortD)
#define BSP_I2CSENSOR_PERIPHERAL (HAL_I2C_PORT_I2C0)
#define BSP_I2CSENSOR_SCL_PIN (10U)
#define BSP_I2CSENSOR_SCL_PORT (gpioPortC)
#define BSP_I2CSENSOR_SCL_LOC (14U)
#define BSP_I2CSENSOR_PERIPHERAL (HAL_I2C_PORT_I2C0)
#define BSP_I2CSENSOR_SCL_PIN (10U)
#define BSP_I2CSENSOR_SCL_PORT (gpioPortC)
#define BSP_I2CSENSOR_SCL_LOC (14U)
#define BSP_I2CSENSOR_SDA_PIN (11U)
#define BSP_I2CSENSOR_SDA_PORT (gpioPortC)
#define BSP_I2CSENSOR_SDA_LOC (16U)
#define BSP_I2CSENSOR_SDA_PIN (11U)
#define BSP_I2CSENSOR_SDA_PORT (gpioPortC)
#define BSP_I2CSENSOR_SDA_LOC (16U)
// [I2CSENSOR]$
@@ -167,17 +170,20 @@
// [IOEXP]$
// $[LED]
#define BSP_LED_PRESENT (1)
#define BSP_LED_PRESENT (1)
#define BSP_LED0_PIN (4U)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED0_PIN (4U)
#define BSP_LED0_PORT (gpioPortF)
#define BSP_LED1_PIN (5U)
#define BSP_LED1_PORT (gpioPortF)
#define BSP_LED1_PIN (5U)
#define BSP_LED1_PORT (gpioPortF)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
#define BSP_LED_POLARITY (1)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT \
{ \
{BSP_LED0_PORT, BSP_LED0_PIN}, { BSP_LED1_PORT, BSP_LED1_PIN } \
}
#define BSP_LED_POLARITY (1)
// [LED]$
// $[LESENSE]
@@ -197,7 +203,7 @@
// $[PA]
#define BSP_PA_VOLTAGE (3300U)
#define BSP_PA_VOLTAGE (3300U)
// [PA]$
// $[PCNT0]
@@ -207,32 +213,32 @@
// [PORTIO]$
// $[PRS]
#define PORTIO_PRS_CH4_PIN (13U)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4U)
#define PORTIO_PRS_CH4_PIN (13U)
#define PORTIO_PRS_CH4_PORT (gpioPortD)
#define PORTIO_PRS_CH4_LOC (4U)
// [PRS]$
// $[PTI]
#define PORTIO_PTI_DCLK_PIN (11U)
#define PORTIO_PTI_DCLK_PORT (gpioPortB)
#define PORTIO_PTI_DCLK_LOC (6U)
#define PORTIO_PTI_DCLK_PIN (11U)
#define PORTIO_PTI_DCLK_PORT (gpioPortB)
#define PORTIO_PTI_DCLK_LOC (6U)
#define PORTIO_PTI_DFRAME_PIN (13U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6U)
#define PORTIO_PTI_DFRAME_PIN (13U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortB)
#define PORTIO_PTI_DFRAME_LOC (6U)
#define PORTIO_PTI_DOUT_PIN (12U)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6U)
#define PORTIO_PTI_DOUT_PIN (12U)
#define PORTIO_PTI_DOUT_PORT (gpioPortB)
#define PORTIO_PTI_DOUT_LOC (6U)
#define BSP_PTI_DFRAME_PIN (13U)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6U)
#define BSP_PTI_DFRAME_PIN (13U)
#define BSP_PTI_DFRAME_PORT (gpioPortB)
#define BSP_PTI_DFRAME_LOC (6U)
#define BSP_PTI_DOUT_PIN (12U)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6U)
#define BSP_PTI_DOUT_PIN (12U)
#define BSP_PTI_DOUT_PORT (gpioPortB)
#define BSP_PTI_DOUT_LOC (6U)
// [PTI]$
@@ -240,83 +246,83 @@
// [PYD1698]$
// $[SERIAL]
#define BSP_SERIAL_APP_PORT (HAL_SERIAL_PORT_USART0)
#define BSP_SERIAL_APP_TX_PIN (0U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0U)
#define BSP_SERIAL_APP_PORT (HAL_SERIAL_PORT_USART0)
#define BSP_SERIAL_APP_TX_PIN (0U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_LOC (0U)
#define BSP_SERIAL_APP_RX_PIN (1U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0U)
#define BSP_SERIAL_APP_RX_PIN (1U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_LOC (0U)
#define BSP_SERIAL_APP_CTS_PIN (2U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30U)
#define BSP_SERIAL_APP_CTS_PIN (2U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_CTS_LOC (30U)
#define BSP_SERIAL_APP_RTS_PIN (3U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30U)
#define BSP_SERIAL_APP_RTS_PIN (3U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_LOC (30U)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_BAUD_RATE (115200)
#define HAL_SERIAL_APP_RXSTOP (16)
#define HAL_SERIAL_APP_RXSTART (16)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_BAUD_RATE (115200)
#define HAL_SERIAL_APP_RXSTOP (16)
#define HAL_SERIAL_APP_RXSTART (16)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [SERIAL]$
// $[SPIDISPLAY]
#define BSP_SPIDISPLAY_CS_PIN (14U)
#define BSP_SPIDISPLAY_CS_PORT (gpioPortD)
#define BSP_SPIDISPLAY_CS_PIN (14U)
#define BSP_SPIDISPLAY_CS_PORT (gpioPortD)
#define BSP_SPIDISPLAY_ENABLE_PIN (15U)
#define BSP_SPIDISPLAY_ENABLE_PORT (gpioPortD)
#define BSP_SPIDISPLAY_ENABLE_PIN (15U)
#define BSP_SPIDISPLAY_ENABLE_PORT (gpioPortD)
#define BSP_SPIDISPLAY_EXTCOMIN_PIN (13U)
#define BSP_SPIDISPLAY_EXTCOMIN_PORT (gpioPortD)
#define BSP_SPIDISPLAY_EXTCOMIN_LOC (4U)
#define BSP_SPIDISPLAY_EXTCOMIN_PIN (13U)
#define BSP_SPIDISPLAY_EXTCOMIN_PORT (gpioPortD)
#define BSP_SPIDISPLAY_EXTCOMIN_LOC (4U)
#define BSP_SPIDISPLAY_DISPLAY (HAL_DISPLAY_SHARP_LS013B7DH03)
#define BSP_SPIDISPLAY_USART (HAL_SPI_PORT_USART1)
#define BSP_SPIDISPLAY_EXTCOMIN_CHANNEL (4)
#define BSP_SPIDISPLAY_MOSI_PIN (6U)
#define BSP_SPIDISPLAY_MOSI_PORT (gpioPortC)
#define BSP_SPIDISPLAY_MOSI_LOC (11U)
#define BSP_SPIDISPLAY_DISPLAY (HAL_DISPLAY_SHARP_LS013B7DH03)
#define BSP_SPIDISPLAY_USART (HAL_SPI_PORT_USART1)
#define BSP_SPIDISPLAY_EXTCOMIN_CHANNEL (4)
#define BSP_SPIDISPLAY_MOSI_PIN (6U)
#define BSP_SPIDISPLAY_MOSI_PORT (gpioPortC)
#define BSP_SPIDISPLAY_MOSI_LOC (11U)
#define BSP_SPIDISPLAY_MISO_PIN (7U)
#define BSP_SPIDISPLAY_MISO_PORT (gpioPortC)
#define BSP_SPIDISPLAY_MISO_LOC (11U)
#define BSP_SPIDISPLAY_MISO_PIN (7U)
#define BSP_SPIDISPLAY_MISO_PORT (gpioPortC)
#define BSP_SPIDISPLAY_MISO_LOC (11U)
#define BSP_SPIDISPLAY_CLK_PIN (8U)
#define BSP_SPIDISPLAY_CLK_PORT (gpioPortC)
#define BSP_SPIDISPLAY_CLK_LOC (11U)
#define BSP_SPIDISPLAY_CLK_PIN (8U)
#define BSP_SPIDISPLAY_CLK_PORT (gpioPortC)
#define BSP_SPIDISPLAY_CLK_LOC (11U)
// [SPIDISPLAY]$
// $[SPINCP]
#define BSP_SPINCP_NHOSTINT_PIN (6U)
#define BSP_SPINCP_NHOSTINT_PORT (gpioPortF)
#define BSP_SPINCP_NHOSTINT_PIN (6U)
#define BSP_SPINCP_NHOSTINT_PORT (gpioPortF)
#define BSP_SPINCP_NWAKE_PIN (7U)
#define BSP_SPINCP_NWAKE_PORT (gpioPortF)
#define BSP_SPINCP_NWAKE_PIN (7U)
#define BSP_SPINCP_NWAKE_PORT (gpioPortF)
#define BSP_SPINCP_USART_PORT (HAL_SPI_PORT_USART1)
#define BSP_SPINCP_MOSI_PIN (6U)
#define BSP_SPINCP_MOSI_PORT (gpioPortC)
#define BSP_SPINCP_MOSI_LOC (11U)
#define BSP_SPINCP_USART_PORT (HAL_SPI_PORT_USART1)
#define BSP_SPINCP_MOSI_PIN (6U)
#define BSP_SPINCP_MOSI_PORT (gpioPortC)
#define BSP_SPINCP_MOSI_LOC (11U)
#define BSP_SPINCP_MISO_PIN (7U)
#define BSP_SPINCP_MISO_PORT (gpioPortC)
#define BSP_SPINCP_MISO_LOC (11U)
#define BSP_SPINCP_MISO_PIN (7U)
#define BSP_SPINCP_MISO_PORT (gpioPortC)
#define BSP_SPINCP_MISO_LOC (11U)
#define BSP_SPINCP_CLK_PIN (8U)
#define BSP_SPINCP_CLK_PORT (gpioPortC)
#define BSP_SPINCP_CLK_LOC (11U)
#define BSP_SPINCP_CLK_PIN (8U)
#define BSP_SPINCP_CLK_PORT (gpioPortC)
#define BSP_SPINCP_CLK_LOC (11U)
#define BSP_SPINCP_CS_PIN (9U)
#define BSP_SPINCP_CS_PORT (gpioPortC)
#define BSP_SPINCP_CS_LOC (11U)
#define BSP_SPINCP_CS_PIN (9U)
#define BSP_SPINCP_CS_PORT (gpioPortC)
#define BSP_SPINCP_CS_LOC (11U)
// [SPINCP]$
@@ -327,92 +333,92 @@
// [TIMER1]$
// $[UARTNCP]
#define BSP_UARTNCP_USART_PORT (HAL_SERIAL_PORT_USART0)
#define BSP_UARTNCP_TX_PIN (0U)
#define BSP_UARTNCP_TX_PORT (gpioPortA)
#define BSP_UARTNCP_TX_LOC (0U)
#define BSP_UARTNCP_USART_PORT (HAL_SERIAL_PORT_USART0)
#define BSP_UARTNCP_TX_PIN (0U)
#define BSP_UARTNCP_TX_PORT (gpioPortA)
#define BSP_UARTNCP_TX_LOC (0U)
#define BSP_UARTNCP_RX_PIN (1U)
#define BSP_UARTNCP_RX_PORT (gpioPortA)
#define BSP_UARTNCP_RX_LOC (0U)
#define BSP_UARTNCP_RX_PIN (1U)
#define BSP_UARTNCP_RX_PORT (gpioPortA)
#define BSP_UARTNCP_RX_LOC (0U)
#define BSP_UARTNCP_CTS_PIN (2U)
#define BSP_UARTNCP_CTS_PORT (gpioPortA)
#define BSP_UARTNCP_CTS_LOC (30U)
#define BSP_UARTNCP_CTS_PIN (2U)
#define BSP_UARTNCP_CTS_PORT (gpioPortA)
#define BSP_UARTNCP_CTS_LOC (30U)
#define BSP_UARTNCP_RTS_PIN (3U)
#define BSP_UARTNCP_RTS_PORT (gpioPortA)
#define BSP_UARTNCP_RTS_LOC (30U)
#define BSP_UARTNCP_RTS_PIN (3U)
#define BSP_UARTNCP_RTS_PORT (gpioPortA)
#define BSP_UARTNCP_RTS_LOC (30U)
// [UARTNCP]$
// $[USART0]
#define PORTIO_USART0_CTS_PIN (2U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30U)
#define PORTIO_USART0_CTS_PIN (2U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_LOC (30U)
#define PORTIO_USART0_RTS_PIN (3U)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30U)
#define PORTIO_USART0_RTS_PIN (3U)
#define PORTIO_USART0_RTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_LOC (30U)
#define PORTIO_USART0_RX_PIN (1U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0U)
#define PORTIO_USART0_RX_PIN (1U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_LOC (0U)
#define PORTIO_USART0_TX_PIN (0U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0U)
#define PORTIO_USART0_TX_PIN (0U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_LOC (0U)
#define BSP_USART0_TX_PIN (0U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0U)
#define BSP_USART0_TX_PIN (0U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_LOC (0U)
#define BSP_USART0_RX_PIN (1U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0U)
#define BSP_USART0_RX_PIN (1U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_LOC (0U)
#define BSP_USART0_CTS_PIN (2U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30U)
#define BSP_USART0_CTS_PIN (2U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_LOC (30U)
#define BSP_USART0_RTS_PIN (3U)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30U)
#define BSP_USART0_RTS_PIN (3U)
#define BSP_USART0_RTS_PORT (gpioPortA)
#define BSP_USART0_RTS_LOC (30U)
// [USART0]$
// $[USART1]
#define PORTIO_USART1_CLK_PIN (8U)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11U)
#define PORTIO_USART1_CLK_PIN (8U)
#define PORTIO_USART1_CLK_PORT (gpioPortC)
#define PORTIO_USART1_CLK_LOC (11U)
#define PORTIO_USART1_CS_PIN (9U)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11U)
#define PORTIO_USART1_CS_PIN (9U)
#define PORTIO_USART1_CS_PORT (gpioPortC)
#define PORTIO_USART1_CS_LOC (11U)
#define PORTIO_USART1_RX_PIN (7U)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11U)
#define PORTIO_USART1_RX_PIN (7U)
#define PORTIO_USART1_RX_PORT (gpioPortC)
#define PORTIO_USART1_RX_LOC (11U)
#define PORTIO_USART1_TX_PIN (6U)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11U)
#define PORTIO_USART1_TX_PIN (6U)
#define PORTIO_USART1_TX_PORT (gpioPortC)
#define PORTIO_USART1_TX_LOC (11U)
#define BSP_USART1_MOSI_PIN (6U)
#define BSP_USART1_MOSI_PORT (gpioPortC)
#define BSP_USART1_MOSI_LOC (11U)
#define BSP_USART1_MOSI_PIN (6U)
#define BSP_USART1_MOSI_PORT (gpioPortC)
#define BSP_USART1_MOSI_LOC (11U)
#define BSP_USART1_MISO_PIN (7U)
#define BSP_USART1_MISO_PORT (gpioPortC)
#define BSP_USART1_MISO_LOC (11U)
#define BSP_USART1_MISO_PIN (7U)
#define BSP_USART1_MISO_PORT (gpioPortC)
#define BSP_USART1_MISO_LOC (11U)
#define BSP_USART1_CLK_PIN (8U)
#define BSP_USART1_CLK_PORT (gpioPortC)
#define BSP_USART1_CLK_LOC (11U)
#define BSP_USART1_CLK_PIN (8U)
#define BSP_USART1_CLK_PORT (gpioPortC)
#define BSP_USART1_CLK_LOC (11U)
#define BSP_USART1_CS_PIN (9U)
#define BSP_USART1_CS_PORT (gpioPortC)
#define BSP_USART1_CS_LOC (11U)
#define BSP_USART1_CS_PIN (9U)
#define BSP_USART1_CS_PORT (gpioPortC)
#define BSP_USART1_CS_LOC (11U)
// [USART1]$
@@ -421,8 +427,8 @@
// $[VCOM]
#define BSP_VCOM_ENABLE_PIN (5U)
#define BSP_VCOM_ENABLE_PORT (gpioPortA)
#define BSP_VCOM_ENABLE_PIN (5U)
#define BSP_VCOM_ENABLE_PORT (gpioPortA)
// [VCOM]$
examples/platforms/efr32mg13/crypto/efr32-mbedtls-config.h
+1 -1
View File
@@ -25,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef EFR32_MBEDTLS_CONFIG_H
#define EFR32_MBEDTLS_CONFIG_H
examples/platforms/efr32mg13/sleepy-demo/Makefile.am
-7
View File
@@ -44,11 +44,4 @@ if OPENTHREAD_ENABLE_EXECUTABLE
SUBDIRS += sleepy-demo-mtd sleepy-demo-ftd
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
sleepy-demo-mtd \
sleepy-demo-ftd \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/efr32mg21/Makefile.am
+1 -9
View File
@@ -118,10 +118,6 @@ libopenthread_efr32mg21_a_SOURCES =
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_efr32mg21_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o") \
@@ -130,13 +126,9 @@ libopenthread_efr32mg21_a_LIBADD
DIST_SUBDIRS = \
sleepy-demo \
$(NULL)
SUBDIRS = \
sleepy-demo \
$(NULL)
PRETTY_SUBDIRS = \
sleepy-demo \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/efr32mg21/brd4180a/board_config.h
+2 -2
View File
@@ -35,14 +35,14 @@
#ifndef __BOARD_CONFIG_H__
#define __BOARD_CONFIG_H__
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#define RADIO_CONFIG_2P4GHZ_OQPSK_SUPPORT 1 /// Dev board suppports OQPSK modulation in 2.4GHz band.
#ifndef RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT
#define RADIO_CONFIG_DEBUG_COUNTERS_SUPPORT 0 /// Set to 1 to enable debug counters in radio.c
#endif
#ifndef RADIO_CONFIG_DMP_SUPPORT
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#define RADIO_CONFIG_DMP_SUPPORT 0 /// Set to 1 to enable Dynamic Multi-Protocol support in radio.c
#endif
#endif // __BOARD_CONFIG_H__
examples/platforms/efr32mg21/brd4180a/hal-config.h
+96 -92
View File
@@ -36,18 +36,18 @@
// [BUTTON]$
// $[CMU]
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define BSP_CLK_LFXO_PRESENT (1)
#define HAL_CLK_EM4CLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_EM23CLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (79U)
#define HAL_CLK_RTCCCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_FREQ (32768U)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (129)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
#define HAL_CLK_HFCLK_SOURCE (HAL_CLK_HFCLK_SOURCE_HFXO)
#define BSP_CLK_LFXO_PRESENT (1)
#define HAL_CLK_EM4CLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define HAL_CLK_EM23CLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_HFXO_PRESENT (1)
#define BSP_CLK_LFXO_INIT CMU_LFXOINIT_DEFAULT
#define BSP_CLK_LFXO_CTUNE (79U)
#define HAL_CLK_RTCCCLK_SOURCE (HAL_CLK_LFCLK_SOURCE_LFRCO)
#define BSP_CLK_LFXO_FREQ (32768U)
#define BSP_CLK_HFXO_FREQ (38400000UL)
#define BSP_CLK_HFXO_CTUNE (129)
#define BSP_CLK_HFXO_INIT CMU_HFXOINIT_DEFAULT
// [CMU]$
// $[COEX]
@@ -63,11 +63,11 @@
// [EZRADIOPRO]$
// $[GPIO]
#define PORTIO_GPIO_SWV_PIN (3U)
#define PORTIO_GPIO_SWV_PORT (gpioPortA)
#define PORTIO_GPIO_SWV_PIN (3U)
#define PORTIO_GPIO_SWV_PORT (gpioPortA)
#define BSP_TRACE_SWO_PIN (3U)
#define BSP_TRACE_SWO_PORT (gpioPortA)
#define BSP_TRACE_SWO_PIN (3U)
#define BSP_TRACE_SWO_PORT (gpioPortA)
// [GPIO]$
@@ -87,19 +87,25 @@
// [IOEXP]$
// $[LED]
#define BSP_LED_PRESENT (1)
#define BSP_LED_PRESENT (1)
#define BSP_LED0_PIN (0U)
#define BSP_LED0_PORT (gpioPortB)
#define BSP_LED0_PIN (0U)
#define BSP_LED0_PORT (gpioPortB)
#define BSP_LED1_PIN (1U)
#define BSP_LED1_PORT (gpioPortB)
#define BSP_LED1_PIN (1U)
#define BSP_LED1_PORT (gpioPortB)
#define HAL_LED_ENABLE { 0, 1 }
#define BSP_LED_POLARITY (1)
#define HAL_LED_COUNT (2U)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT { { BSP_LED0_PORT, BSP_LED0_PIN }, { BSP_LED1_PORT, BSP_LED1_PIN } }
#define HAL_LED_ENABLE \
{ \
0, 1 \
}
#define BSP_LED_POLARITY (1)
#define HAL_LED_COUNT (2U)
#define BSP_LED_COUNT (2U)
#define BSP_LED_INIT \
{ \
{BSP_LED0_PORT, BSP_LED0_PIN}, { BSP_LED1_PORT, BSP_LED1_PIN } \
}
// [LED]$
// $[LETIMER0]
@@ -112,13 +118,13 @@
// [MODEM]$
// $[PA]
#define HAL_PA_ENABLE (1)
#define HAL_PA_ENABLE (1)
#define HAL_PA_RAMP (10UL)
#define HAL_PA_SELECTION (HAL_PA_SELECTION_2P4_HP)
#define HAL_PA_POWER (252U)
#define HAL_PA_VOLTAGE (3300U)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
#define HAL_PA_RAMP (10UL)
#define HAL_PA_SELECTION (HAL_PA_SELECTION_2P4_HP)
#define HAL_PA_POWER (252U)
#define HAL_PA_VOLTAGE (3300U)
#define HAL_PA_CURVE_HEADER "pa_curves_efr32.h"
// [PA]$
// $[PORTIO]
@@ -128,49 +134,49 @@
// [PRS]$
// $[PTI]
#define PORTIO_PTI_DFRAME_PIN (5U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortC)
#define PORTIO_PTI_DFRAME_PIN (5U)
#define PORTIO_PTI_DFRAME_PORT (gpioPortC)
#define PORTIO_PTI_DOUT_PIN (4U)
#define PORTIO_PTI_DOUT_PORT (gpioPortC)
#define PORTIO_PTI_DOUT_PIN (4U)
#define PORTIO_PTI_DOUT_PORT (gpioPortC)
#define HAL_PTI_ENABLE (1)
#define HAL_PTI_ENABLE (1)
#define BSP_PTI_DFRAME_PIN (5U)
#define BSP_PTI_DFRAME_PORT (gpioPortC)
#define BSP_PTI_DFRAME_PIN (5U)
#define BSP_PTI_DFRAME_PORT (gpioPortC)
#define BSP_PTI_DOUT_PIN (4U)
#define BSP_PTI_DOUT_PORT (gpioPortC)
#define BSP_PTI_DOUT_PIN (4U)
#define BSP_PTI_DOUT_PORT (gpioPortC)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000UL)
#define HAL_PTI_MODE (HAL_PTI_MODE_UART)
#define HAL_PTI_BAUD_RATE (1600000UL)
// [PTI]$
// $[SERIAL]
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (4U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define HAL_SERIAL_USART0_ENABLE (0)
#define HAL_SERIAL_LEUART0_ENABLE (0)
#define HAL_SERIAL_USART1_ENABLE (0)
#define HAL_SERIAL_USART2_ENABLE (0)
#define HAL_SERIAL_USART3_ENABLE (0)
#define HAL_SERIAL_RXWAKE_ENABLE (0)
#define BSP_SERIAL_APP_CTS_PIN (4U)
#define BSP_SERIAL_APP_CTS_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_PIN (6U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RX_PIN (6U)
#define BSP_SERIAL_APP_RX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_PIN (5U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_TX_PIN (5U)
#define BSP_SERIAL_APP_TX_PORT (gpioPortA)
#define BSP_SERIAL_APP_RTS_PIN (1U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortC)
#define BSP_SERIAL_APP_RTS_PIN (1U)
#define BSP_SERIAL_APP_RTS_PORT (gpioPortC)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_BAUD_RATE (115200UL)
#define HAL_SERIAL_APP_RXSTOP (16UL)
#define HAL_SERIAL_APP_RXSTART (16UL)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_SERIAL_APP_RX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_BAUD_RATE (115200UL)
#define HAL_SERIAL_APP_RXSTOP (16UL)
#define HAL_SERIAL_APP_RXSTART (16UL)
#define HAL_SERIAL_APP_TX_QUEUE_SIZE (128UL)
#define HAL_SERIAL_APP_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [SERIAL]$
// $[SPIDISPLAY]
@@ -195,38 +201,38 @@
// [UARTNCP]$
// $[USART0]
#define PORTIO_USART0_CTS_PIN (4U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_CTS_PIN (4U)
#define PORTIO_USART0_CTS_PORT (gpioPortA)
#define PORTIO_USART0_RTS_PIN (1U)
#define PORTIO_USART0_RTS_PORT (gpioPortC)
#define PORTIO_USART0_RTS_PIN (1U)
#define PORTIO_USART0_RTS_PORT (gpioPortC)
#define PORTIO_USART0_RX_PIN (6U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_RX_PIN (6U)
#define PORTIO_USART0_RX_PORT (gpioPortA)
#define PORTIO_USART0_TX_PIN (5U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define PORTIO_USART0_TX_PIN (5U)
#define PORTIO_USART0_TX_PORT (gpioPortA)
#define HAL_USART0_ENABLE (1)
#define HAL_USART0_ENABLE (1)
#define BSP_USART0_CTS_PIN (4U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_CTS_PIN (4U)
#define BSP_USART0_CTS_PORT (gpioPortA)
#define BSP_USART0_RX_PIN (6U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_RX_PIN (6U)
#define BSP_USART0_RX_PORT (gpioPortA)
#define BSP_USART0_TX_PIN (5U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_TX_PIN (5U)
#define BSP_USART0_TX_PORT (gpioPortA)
#define BSP_USART0_RTS_PIN (1U)
#define BSP_USART0_RTS_PORT (gpioPortC)
#define BSP_USART0_RTS_PIN (1U)
#define BSP_USART0_RTS_PORT (gpioPortC)
#define HAL_USART0_RX_QUEUE_SIZE (128UL)
#define HAL_USART0_BAUD_RATE (115200UL)
#define HAL_USART0_RXSTOP (16UL)
#define HAL_USART0_RXSTART (16UL)
#define HAL_USART0_TX_QUEUE_SIZE (128UL)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
#define HAL_USART0_RX_QUEUE_SIZE (128UL)
#define HAL_USART0_BAUD_RATE (115200UL)
#define HAL_USART0_RXSTOP (16UL)
#define HAL_USART0_RXSTART (16UL)
#define HAL_USART0_TX_QUEUE_SIZE (128UL)
#define HAL_USART0_FLOW_CONTROL (HAL_USART_FLOW_CONTROL_HWUART)
// [USART0]$
// $[USART1]
@@ -236,10 +242,10 @@
// [USART2]$
// $[VCOM]
#define HAL_VCOM_ENABLE (1)
#define HAL_VCOM_ENABLE (1)
#define BSP_VCOM_ENABLE_PIN (4U)
#define BSP_VCOM_ENABLE_PORT (gpioPortD)
#define BSP_VCOM_ENABLE_PIN (4U)
#define BSP_VCOM_ENABLE_PORT (gpioPortD)
// [VCOM]$
@@ -247,7 +253,7 @@
// [VUART]$
// $[WDOG]
#define HAL_WDOG_ENABLE (0)
#define HAL_WDOG_ENABLE (0)
// [WDOG]$
@@ -255,6 +261,4 @@
#include "sl_module.h"
#endif
#endif /* HAL_CONFIG_H */
examples/platforms/efr32mg21/crypto/efr32-mbedtls-config.h
+1 -2
View File
@@ -25,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef EFR32_MBEDTLS_CONFIG_H
#define EFR32_MBEDTLS_CONFIG_H
@@ -54,7 +54,6 @@
#define MBEDTLS_ENTROPY_HARDWARE_ALT
#define MBEDTLS_SHA256_C
/**
* \def MBEDTLS_ECP_INTERNAL_ALT
* \def ECP_SHORTWEIERSTRASS
examples/platforms/efr32mg21/sleepy-demo/Makefile.am
-7
View File
@@ -44,11 +44,4 @@ if OPENTHREAD_ENABLE_EXECUTABLE
SUBDIRS += sleepy-demo-mtd sleepy-demo-ftd
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
sleepy-demo-mtd \
sleepy-demo-ftd \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/gp712/Makefile.am
-4
View File
@@ -65,10 +65,6 @@ libopenthread_gp712_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
if OPENTHREAD_BUILD_COVERAGE
CLEANFILES = $(wildcard *.gcda *.gcno)
endif # OPENTHREAD_BUILD_COVERAGE
examples/platforms/gp712/uart-socket.c
+46 -49
View File
@@ -32,26 +32,26 @@
*
*/
#include "platform_qorvo.h"
#include "alarm_qorvo.h"
#include "platform_qorvo.h"
#include "uart_qorvo.h"
#include <assert.h>
#include <errno.h>
#include <fcntl.h>
#include <poll.h>
#include <stdlib.h>
#include <signal.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <termios.h>
#include <unistd.h>
#include <errno.h>
#include <signal.h>
#include <string.h>
#include <sys/types.h>
#include <sys/socket.h>
#include <netdb.h>
#include <netinet/in.h>
#include <netinet/tcp.h>
#include <netdb.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <pthread.h>
@@ -62,27 +62,28 @@
#include "utils/code_utils.h"
#define BUFFER_MAX_SIZE 255
#define BUFFER_MAX_SIZE 255
#define SOCKET_PORT 9190
#define SOCKET_WRITE(socketInfo, buf, length) sendto(socketInfo.socketId, (const char*)buf, length, 0, &socketInfo.addr, sizeof(socketInfo.addr))
#define SOCKET_READ(socketId, buf, length) recv(socketId, buf, length, 0)
#define SOCKET_WRITE(socketInfo, buf, length) \
sendto(socketInfo.socketId, (const char *)buf, length, 0, &socketInfo.addr, sizeof(socketInfo.addr))
#define SOCKET_READ(socketId, buf, length) recv(socketId, buf, length, 0)
typedef struct
{
uint32_t socketId;
bool isValid;
uint32_t socketId;
bool isValid;
struct sockaddr addr;
pthread_t rfReadThread;
pthread_t rfReadThread;
} PlatSocket_t;
PlatSocket_t PlatSocketConnection;
int PlatSocketPipeFd [2];
int PlatServerSocketId;
PlatSocket_t PlatSocketConnection;
int PlatSocketPipeFd[2];
int PlatServerSocketId;
void PlatSocketRxNewConn(uint8_t id);
void PlatSocketInit(void);
void PlatSocketDeInit(void);
int PlatSocketTxData(uint16_t length, uint8_t *pData, uint32_t socketId);
int PlatSocketTxData(uint16_t length, uint8_t *pData, uint32_t socketId);
#define PLAT_UART_MAX_CHAR 1024
@@ -91,9 +92,9 @@ uint32_t PlatSocketId = 0;
void PlatSocketSendInput(void *buffer)
{
uint8_t len = 0;
uint8_t *buf = (uint8_t *) buffer;
len = strlen((char *)buf);
otPlatUartReceived((uint8_t *) buf, (uint16_t)len);
uint8_t *buf = (uint8_t *)buffer;
len = strlen((char *)buf);
otPlatUartReceived((uint8_t *)buf, (uint16_t)len);
free(buf);
buf = 0;
len = 0;
@@ -110,7 +111,7 @@ void PlatSocketRx(uint16_t length, const char *buffer, uint32_t socketId)
memcpy(buf, buffer, length);
buf[length] = '\n';
buf[length + 1] = 0;
qorvoAlarmScheduleEventArg(0, PlatSocketSendInput, (void *) buf);
qorvoAlarmScheduleEventArg(0, PlatSocketSendInput, (void *)buf);
}
}
@@ -142,7 +143,7 @@ otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
if (PlatSocketId)
{
PlatSocketTxData(aBufLength, (uint8_t *) aBuf, PlatSocketId);
PlatSocketTxData(aBufLength, (uint8_t *)aBuf, PlatSocketId);
}
otPlatUartSendDone();
@@ -164,11 +165,11 @@ void platformUartProcess(void)
int PlatSocketListenForClients()
{
//Setup server side socket
int sockfd;
struct sockaddr_in serv_addr;
uint32_t flag = 1;
int ret;
// Setup server side socket
int sockfd;
struct sockaddr_in serv_addr;
uint32_t flag = 1;
int ret;
sockfd = socket(AF_INET, SOCK_STREAM, 0);
otEXPECT_ACTION(sockfd >= 0, sockfd = -1);
@@ -180,9 +181,9 @@ int PlatSocketListenForClients()
memset(&serv_addr, 0, sizeof(serv_addr));
serv_addr.sin_addr.s_addr = INADDR_ANY;
serv_addr.sin_family = AF_INET;
serv_addr.sin_port = htons(SOCKET_PORT);
ret = bind(sockfd, (struct sockaddr *)&serv_addr, sizeof(serv_addr));
serv_addr.sin_family = AF_INET;
serv_addr.sin_port = htons(SOCKET_PORT);
ret = bind(sockfd, (struct sockaddr *)&serv_addr, sizeof(serv_addr));
otEXPECT_ACTION(ret >= 0, close(sockfd); sockfd = -1);
ret = listen(sockfd, 10);
otEXPECT_ACTION(ret != -1, exit(1));
@@ -194,15 +195,15 @@ void PlatSocketRxSignaled(uint8_t id)
{
OT_UNUSED_VARIABLE(id);
//Dummy callback function to flush pipe
// Dummy callback function to flush pipe
uint8_t readChar;
//Remove trigger byte from pipe
read(PlatSocketPipeFd [0], &readChar, 1);
// Remove trigger byte from pipe
read(PlatSocketPipeFd[0], &readChar, 1);
}
void *PlatSocketReadThread(void *pClientSocket)
{
char buffer[BUFFER_MAX_SIZE];
char buffer[BUFFER_MAX_SIZE];
PlatSocket_t *clientSocket = ((PlatSocket_t *)pClientSocket);
memset(buffer, 0, BUFFER_MAX_SIZE);
@@ -224,11 +225,11 @@ void *PlatSocketReadThread(void *pClientSocket)
}
{
uint8_t someByte = 0x12; //No functional use only using pipe to kick main thread
uint8_t someByte = 0x12; // No functional use only using pipe to kick main thread
PlatSocketRx(readLen, buffer, clientSocket->socketId);
write(PlatSocketPipeFd [1], &someByte, 1); //[1] = write fd
write(PlatSocketPipeFd[1], &someByte, 1); //[1] = write fd
}
}
}
@@ -244,22 +245,20 @@ void *PlatSocketReadThread(void *pClientSocket)
void PlatSocketRxNewConn(uint8_t id)
{
//Find first non-valid client in list - add here
// Find first non-valid client in list - add here
if (PlatSocketConnection.isValid == 0)
{
//Add new client to client list
// Add new client to client list
socklen_t len;
len = sizeof(PlatSocketConnection.addr);
int retval = accept(id, (struct sockaddr *)&PlatSocketConnection.addr, (socklen_t *) &len);
len = sizeof(PlatSocketConnection.addr);
int retval = accept(id, (struct sockaddr *)&PlatSocketConnection.addr, (socklen_t *)&len);
if (retval >= 0)
{
int retErr;
PlatSocketConnection.socketId = retval;
retErr = pthread_create(&PlatSocketConnection.rfReadThread,
NULL,
PlatSocketReadThread,
&PlatSocketConnection);
retErr =
pthread_create(&PlatSocketConnection.rfReadThread, NULL, PlatSocketReadThread, &PlatSocketConnection);
if (retErr)
{
@@ -273,7 +272,6 @@ void PlatSocketRxNewConn(uint8_t id)
}
else
{
int tempfd;
tempfd = accept(id, (struct sockaddr *)NULL, NULL);
@@ -298,7 +296,7 @@ void PlatSocketInit(void)
// hack
pipe(PlatSocketPipeFd);
qorvoPlatRegisterPollFunction(PlatSocketPipeFd [0], PlatSocketRxSignaled);
qorvoPlatRegisterPollFunction(PlatSocketPipeFd[0], PlatSocketRxSignaled);
}
void platformUartRestore(void)
@@ -320,7 +318,7 @@ int PlatSocketTxData(uint16_t length, uint8_t *pData, uint32_t socketId)
{
int result = -1;
//All sockets
// All sockets
if (PlatSocketConnection.isValid)
{
if (PlatSocketConnection.socketId == socketId)
@@ -340,4 +338,3 @@ int PlatSocketTxData(uint16_t length, uint8_t *pData, uint32_t socketId)
return result;
}
examples/platforms/kw41z/Makefile.am
-4
View File
@@ -99,10 +99,6 @@ libopenthread_kw41z_a_SOURCES
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_kw41z_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
examples/platforms/nrf528xx/Makefile.am
-11
View File
@@ -42,14 +42,3 @@ endif
if OPENTHREAD_PLATFORM_NRF52840
include nrf52840/Makefile.am
endif
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
PRETTY_FILES = \
src/platform-fem.h \
src/platform-nrf5.h \
$(wildcard $(srcdir)/**/*.c) \
$(wildcard $(srcdir)/**/*.h) \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/qpg6095/crypto/qpg6095-mbedtls-config.h
-1
View File
@@ -25,4 +25,3 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
examples/platforms/samr21/Makefile.am
-4
View File
@@ -137,10 +137,6 @@ nodist_libopenthread_samr21_a_SOURCES
@top_builddir@/third_party/microchip/asf/thirdparty/wireless/services/trx_access/trx_access.c \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_samr21_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
examples/platforms/samr21/crypto/aes_alt.h
+19 -22
View File
@@ -43,9 +43,9 @@ extern "C" {
typedef struct
{
uint8_t hwKeyLen;
unsigned char aes_enc_key[32]; /* Encryption key */
unsigned char aes_dec_key[32]; /* Decryption key */
uint8_t hwKeyLen;
unsigned char aes_enc_key[32]; /* Encryption key */
unsigned char aes_dec_key[32]; /* Decryption key */
} mbedtls_aes_context;
/**
@@ -71,8 +71,7 @@ void mbedtls_aes_free(mbedtls_aes_context *ctx);
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES key schedule (decryption)
@@ -83,8 +82,7 @@ int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
@@ -96,8 +94,7 @@ int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
*
* \return 0 if successful
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16],
unsigned char output[16]);
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
/**
* \brief AES-CBC buffer encryption/decryption
@@ -121,12 +118,12 @@ int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned cha
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH
*/
int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
int mode,
size_t length,
unsigned char iv[16],
const unsigned char *input,
unsigned char *output );
int mbedtls_aes_crypt_cbc(mbedtls_aes_context *ctx,
int mode,
size_t length,
unsigned char iv[16],
const unsigned char *input,
unsigned char * output);
/**
* \brief AES-CTR buffer encryption/decryption
@@ -150,13 +147,13 @@ int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
*
* \return 0 if successful
*/
int mbedtls_aes_crypt_ctr( mbedtls_aes_context *ctx,
size_t length,
size_t *nc_off,
unsigned char nonce_counter[16],
unsigned char stream_block[16],
const unsigned char *input,
unsigned char *output );
int mbedtls_aes_crypt_ctr(mbedtls_aes_context *ctx,
size_t length,
size_t * nc_off,
unsigned char nonce_counter[16],
unsigned char stream_block[16],
const unsigned char *input,
unsigned char * output);
#ifdef __cplusplus
}
examples/platforms/samr21/crypto/samr21-mbedtls-config.h
+1 -1
View File
@@ -25,7 +25,7 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef SAMR21_MBEDTLS_CONFIG_H
#define SAMR21_MBEDTLS_CONFIG_H
examples/platforms/simulation/Makefile.am
-4
View File
@@ -59,10 +59,6 @@ libopenthread_simulation_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_simulation_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include/Makefile.am
-6
View File
@@ -40,12 +40,6 @@ SUBDIRS = \
openthread \
$(NULL)
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
openthread \
$(NULL)
install-headers: install-includeHEADERS
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
include/openthread/Makefile.am
-6
View File
@@ -40,12 +40,6 @@ SUBDIRS = \
platform \
$(NULL)
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
platform \
$(NULL)
openthread_headers = \
channel_manager.h \
channel_monitor.h \
script/clang-format-check.sh
+8 -13
View File
@@ -1,4 +1,4 @@
#!/bin/sh
#!/bin/bash
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
@@ -33,23 +33,18 @@
# replacements.
#
set -x
set -euo pipefail
die() {
echo " *** ERROR: " $*
echo " *** ERROR: $*"
exit 1
}
# from `man diff`:
# Exit status is 0 if inputs are the same, 1 if different, 2 if trouble.
$(dirname "$0")/clang-format.sh -style=file $@ | diff -u $@ - || die
for arg; do true; done
file=$arg
[ -n "$(tail -c1 $file)" ] && {
echo " *** ERROR: Missing EOF newline: " $file
exit 1
}
exit 0
for file in "$@"; do
echo "Checking ${file}"
"$(dirname "$0")"/clang-format.sh -style=file "${file}" | diff -u "${file}" - || die "${file} is not pretty."
[ -z "$(tail -c1 "${file}")" ] || die "${file} misses EOF newline."
done
script/clang-format.sh
+5 -5
View File
@@ -30,13 +30,13 @@
CLANG_FORMAT_VERSION="clang-format version 6.0"
die() {
echo " *** ERROR: " $*
echo " *** ERROR: $*"
exit 1
}
if which clang-format-6.0 > /dev/null; then
if command -v clang-format-6.0 > /dev/null; then
alias clang-format=clang-format-6.0
elif which clang-format > /dev/null; then
elif command -v clang-format > /dev/null; then
case "$(clang-format --version)" in
"$CLANG_FORMAT_VERSION"*)
;;
@@ -48,7 +48,7 @@ else
die "clang-format 6.0 required"
fi
clang-format $@ || die
clang-format "$@" || die
# ensure EOF newline
REPLACE=no
@@ -64,7 +64,7 @@ done
file=$arg
[ $REPLACE != yes ] || {
[ -n "$(tail -c1 $file)" ] && echo >> $file
[ -n "$(tail -c1 "$file")" ] && echo >> "$file"
}
exit 0
script/make-pretty
+77 -18
View File
@@ -27,45 +27,104 @@
# POSSIBILITY OF SUCH DAMAGE.
#
#
# The script to check or format source code of OpenThread.
#
# Format python and c/c++:
#
# script/make-pretty
#
# Format python only:
#
# script/make-pretty python
#
# Format c/c++ only:
#
# script/make-pretty clang
#
# Check only:
#
# script/make-pretty check clang
# script/make-pretty check python
#
set -euo pipefail
readonly TMP_DIR="/tmp/ot-make-pretty-$(date +%Y%m%d%H%M%S)"
readonly SRC_DIR="$PWD"
at_exit()
{
EXIT_CODE=$?
[[ ! -d "${TMP_DIR}" ]] || rm -rf "${TMP_DIR}"
exit $EXIT_CODE
}
readonly OT_CLANG_DIRS=(examples include src tests tools)
readonly OT_PYTHON_DIRS=(tests tools)
readonly OT_BUILD_JOBS=$(getconf _NPROCESSORS_ONLN)
readonly OT_CLANG_SOURCES=('*.c' '*.cc' '*.cpp' '*.h' '*.hpp')
do_clang_format()
{
./bootstrap
mkdir "${TMP_DIR}"
cd "${TMP_DIR}"
"${SRC_DIR}/configure"
make pretty
echo -e '====================='
echo -e ' format c/c++'
echo -e '====================='
git ls-files "${OT_CLANG_SOURCES[@]}" | grep -E "^($(echo "${OT_CLANG_DIRS[@]}" | tr ' ' '|'))" \
| xargs -n3 -P"${OT_BUILD_JOBS}" script/clang-format.sh -style=file -i -verbose
}
do_clang_check()
{
echo -e '====================='
echo -e ' check c/c++'
echo -e '====================='
git ls-files "${OT_CLANG_SOURCES[@]}" | grep -E "^($(echo "${OT_CLANG_DIRS[@]}" | tr ' ' '|'))" \
| xargs -n3 -P"${OT_BUILD_JOBS}" script/clang-format-check.sh
}
do_python_format()
{
python3 -m yapf --verbose --style google -ipr "${SRC_DIR}/tests" "${SRC_DIR}/tools"
echo -e '======================'
echo -e ' format python'
echo -e '======================'
git ls-files '*.py' | grep -E "^($(echo "${OT_PYTHON_DIRS[@]}" | tr ' ' '|'))" \
| xargs -n10 -P"${OT_BUILD_JOBS}" python3 -m yapf --verbose --style google -ipr
}
do_python_check()
{
echo -e '====================='
echo -e ' check python'
echo -e '====================='
git ls-files '*.py' | grep -E "^($(echo "${OT_PYTHON_DIRS[@]}" | tr ' ' '|'))" \
| xargs -n10 -P"${OT_BUILD_JOBS}" python3 -m yapf --verbose --style google -dpr
}
do_check()
{
if [ $# == 0 ]; then
do_python_check
do_clang_check
elif [ "$1" == 'clang' ]; then
do_clang_check
elif [ "$1" == 'python' ]; then
do_python_check
else
>&2 echo "Unsupported check: $1. Supported: clang, python"
# 128 for Invalid arguments
exit 128
fi
}
main()
{
if [ $# == 0 ]; then
trap at_exit INT TERM EXIT
do_clang_format
do_python_format
elif [ "$1" == 'python' ]; then
do_python_format
elif [ "$1" == 'clang' ]; then
do_clang_format
elif [ "$1" == 'check' ]; then
shift
do_check "$@"
else
>&2 echo "Unsupported action: $1"
>&2 echo "Unsupported action: $1. Supported: clang, python"
# 128 for Invalid arguments
exit 128
fi
src/Makefile.am
-10
View File
@@ -57,14 +57,4 @@ if OPENTHREAD_PLATFORM_POSIX_APP
SUBDIRS += posix
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
cli \
core \
ncp \
posix \
lib \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
src/core/Makefile.am
-6
View File
@@ -447,12 +447,6 @@ noinst_HEADERS = \
$(HEADERS_COMMON) \
$(NULL)
PRETTY_FILES = \
$(HEADERS_COMMON) \
$(SOURCES_COMMON) \
$(EXTRA_DIST) \
$(NULL)
if OPENTHREAD_BUILD_COVERAGE
Dash = -
CLEANFILES = $(shell find $(top_builddir)/src/core $(Dash)name "*.gcda" $(Dash)o $(Dash)name "*.gcno")
src/lib/spinel/spinel_encrypter.hpp
+4 -2
View File
@@ -37,7 +37,8 @@ namespace SpinelEncrypter {
* This method encrypts outbound frames in both directions, i.e. from AP to NCP and from NCP to AP.
*
* @param[in,out] aFrameBuf Pointer to buffer containing the frame, also where the encrypted frame will be placed.
* @param[in] aFrameSize Max number of bytes in frame buffer (max length of spinel frame + additional data for encryption).
* @param[in] aFrameSize Max number of bytes in frame buffer (max length of spinel frame + additional data for
* encryption).
* @param[in,out] aFrameLength Pointer to store frame length, on input value is set to frame length,
* on output changed to show the frame length after encryption.
* @return \c true on success, \c false otherwise.
@@ -50,7 +51,8 @@ bool EncryptOutbound(unsigned char *aFrameBuf, size_t aFrameSize, size_t *aFrame
* This method decrypts inbound frames in both directions, i.e. from AP to NCP and from NCP to AP.
*
* @param[in,out] aFrameBuf Pointer to buffer containing encrypted frame, also where the decrypted frame will be placed.
* @param[in] aFrameSize Max number of bytes in frame buffer (max length of spinel frame + additional data for encryption).
* @param[in] aFrameSize Max number of bytes in frame buffer (max length of spinel frame + additional data for
* encryption).
* @param[in,out] aFrameLength Pointer to store frame length, on input value is set to encrypted frame length,
* on output changed to show the frame length after decryption.
* @return \c true on success, \c false otherwise.
src/posix/Makefile.am
-6
View File
@@ -40,12 +40,6 @@ SUBDIRS = \
platform \
$(NULL)
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
platform \
$(NULL)
CPPFLAGS_COMMON = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src/core \
src/posix/platform/Makefile.am
-6
View File
@@ -73,12 +73,6 @@ openthread_HEADERS = \
openthreaddir = $(includedir)/openthread
dist_openthread_HEADERS = $(openthread_headers)
PRETTY_FILES = \
$(libopenthread_posix_a_SOURCES) \
$(noinst_HEADERS) \
$(openthread_HEADERS) \
$(NULL)
if OPENTHREAD_BUILD_COVERAGE
CLEANFILES = $(wildcard *.gcda *.gcno)
endif # OPENTHREAD_BUILD_COVERAGE
src/posix/platform/openthread-core-posix-config.h
+2 -2
View File
@@ -84,11 +84,11 @@
#if OPENTHREAD_ENABLE_POSIX_APP_DAEMON
#ifndef OPENTHREAD_CONFIG_PLATFORM_NETIF_ENABLE
#ifndef OPENTHREAD_CONFIG_PLATFORM_NETIF_ENABLE
#define OPENTHREAD_CONFIG_PLATFORM_NETIF_ENABLE 1
#endif
#ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE
#ifndef OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE
#define OPENTHREAD_CONFIG_PLATFORM_UDP_ENABLE 1
#endif
tests/Makefile.am
-7
View File
@@ -41,13 +41,6 @@ DIST_SUBDIRS = \
SUBDIRS = \
$(NULL)
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
fuzz \
unit \
$(NULL)
SUBDIRS += \
unit \
$(NULL)
tests/scripts/Makefile.am
-5
View File
@@ -47,10 +47,5 @@ SUBDIRS += \
endif
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
tests/toranj/openthread-core-toranj-config.h
+35 -36
View File
@@ -45,11 +45,11 @@
*
*/
#if OPENTHREAD_RADIO
#define OPENTHREAD_CONFIG_PLATFORM_INFO "POSIX-RCP-toranj"
#define OPENTHREAD_CONFIG_PLATFORM_INFO "POSIX-RCP-toranj"
#elif OPENTHREAD_PLATFORM_POSIX_APP
#define OPENTHREAD_CONFIG_PLATFORM_INFO "POSIX-App-toranj"
#define OPENTHREAD_CONFIG_PLATFORM_INFO "POSIX-App-toranj"
#else
#define OPENTHREAD_CONFIG_PLATFORM_INFO "POSIX-toranj"
#define OPENTHREAD_CONFIG_PLATFORM_INFO "POSIX-toranj"
#endif
/**
@@ -58,7 +58,7 @@
* Define to 1 to enable Border Router support.
*
*/
#define OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE 1
#define OPENTHREAD_CONFIG_BORDER_ROUTER_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_COMMISSIONER_ENABLE
@@ -66,7 +66,7 @@
* Define to 1 to enable Commissioner support.
*
*/
#define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 1
#define OPENTHREAD_CONFIG_COMMISSIONER_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_DIAG_ENABLE
@@ -74,7 +74,7 @@
* Define to 1 to enable Factory Diagnostics support.
*
*/
#define OPENTHREAD_CONFIG_DIAG_ENABLE 1
#define OPENTHREAD_CONFIG_DIAG_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_JOINER_ENABLE
@@ -82,7 +82,7 @@
* Define to 1 to enable Joiner support.
*
*/
#define OPENTHREAD_CONFIG_JOINER_ENABLE 1
#define OPENTHREAD_CONFIG_JOINER_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE
@@ -90,7 +90,7 @@
* Define to 1 to support injecting Service entries into the Thread Network Data.
*
*/
#define OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE 1
#define OPENTHREAD_CONFIG_TMF_NETDATA_SERVICE_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_LEGACY_ENABLE
@@ -98,7 +98,7 @@
* Define to 1 to enable legacy network support.
*
*/
#define OPENTHREAD_CONFIG_LEGACY_ENABLE 1
#define OPENTHREAD_CONFIG_LEGACY_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE
@@ -106,7 +106,7 @@
* Define to 1 to enable the Jam Detection service.
*
*/
#define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 1
#define OPENTHREAD_CONFIG_JAM_DETECTION_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
@@ -114,7 +114,7 @@
* The number of message buffers in the buffer pool.
*
*/
#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 256
#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 256
/**
* @def OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES
@@ -122,7 +122,7 @@
* The number of EID-to-RLOC cache entries.
*
*/
#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 32
#define OPENTHREAD_CONFIG_TMF_ADDRESS_CACHE_ENTRIES 32
/**
* @def OPENTHREAD_CONFIG_TMF_ADDRESS_QUERY_MAX_RETRY_DELAY
@@ -132,7 +132,7 @@
* Default: 28800 seconds (480 minutes or 8 hours)
*
*/
#define OPENTHREAD_CONFIG_TMF_ADDRESS_QUERY_MAX_RETRY_DELAY 120
#define OPENTHREAD_CONFIG_TMF_ADDRESS_QUERY_MAX_RETRY_DELAY 120
/**
* @def OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
@@ -140,7 +140,7 @@
* The maximum number of children.
*
*/
#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 32
#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 32
/**
* @def OPENTHREAD_CONFIG_MLE_CHILD_TIMEOUT_DEFAULT
@@ -148,7 +148,7 @@
* The default child timeout value (in seconds).
*
*/
#define OPENTHREAD_CONFIG_MLE_CHILD_TIMEOUT_DEFAULT 120
#define OPENTHREAD_CONFIG_MLE_CHILD_TIMEOUT_DEFAULT 120
/**
* @def OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD
@@ -156,7 +156,7 @@
* The maximum number of supported IPv6 address registrations per child.
*
*/
#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD 10
#define OPENTHREAD_CONFIG_MLE_IP_ADDRS_PER_CHILD 10
/**
* @def OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS
@@ -164,7 +164,7 @@
* The maximum number of supported IPv6 addresses allows to be externally added.
*
*/
#define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 8
#define OPENTHREAD_CONFIG_IP6_MAX_EXT_UCAST_ADDRS 8
/**
* @def OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS
@@ -172,7 +172,7 @@
* The maximum number of supported IPv6 multicast addresses allows to be externally added.
*
*/
#define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4
#define OPENTHREAD_CONFIG_IP6_MAX_EXT_MCAST_ADDRS 4
/**
* @def OPENTHREAD_CONFIG_MAC_FILTER_ENABLE
@@ -188,7 +188,7 @@
* The number of MAC Filter entries.
*
*/
#define OPENTHREAD_CONFIG_MAC_FILTER_SIZE 80
#define OPENTHREAD_CONFIG_MAC_FILTER_SIZE 80
/**
* @def OPENTHREAD_CONFIG_LOG_OUTPUT
@@ -196,7 +196,7 @@
* Selects if, and where the LOG output goes to.
*
*/
#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL
#define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL
/**
* @def OPENTHREAD_CONFIG_LOG_LEVEL
@@ -204,7 +204,7 @@
* The log level (used at compile time).
*
*/
#define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_INFO
#define OPENTHREAD_CONFIG_LOG_LEVEL OT_LOG_LEVEL_INFO
/**
* @def OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE
@@ -212,7 +212,7 @@
* Define as 1 to enable dynamic log level control.
*
*/
#define OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE 1
#define OPENTHREAD_CONFIG_LOG_LEVEL_DYNAMIC_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL
@@ -220,7 +220,7 @@
* Define to prepend the log level to all log messages
*
*/
#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
/**
* @def OPENTHREAD_CONFIG_LOG_PREPEND_REGION
@@ -228,7 +228,7 @@
* Define to prepend the log region to all log messages
*
*/
#define OPENTHREAD_CONFIG_LOG_PREPEND_REGION 0
#define OPENTHREAD_CONFIG_LOG_PREPEND_REGION 0
/**
* @def OPENTHREAD_CONFIG_LOG_SUFFIX
@@ -236,7 +236,7 @@
* Define suffix to append at the end of logs.
*
*/
#define OPENTHREAD_CONFIG_LOG_SUFFIX ""
#define OPENTHREAD_CONFIG_LOG_SUFFIX ""
/**
* @def OPENTHREAD_CONFIG_LOG_PLATFORM
@@ -244,7 +244,7 @@
* Define to enable platform region logging.
*
*/
#define OPENTHREAD_CONFIG_LOG_PLATFORM 1
#define OPENTHREAD_CONFIG_LOG_PLATFORM 1
/**
* @def OPENTHREAD_CONFIG_NCP_UART_ENABLE
@@ -260,7 +260,7 @@
* The size of NCP message buffer in bytes
*
*/
#define OPENTHREAD_CONFIG_NCP_TX_BUFFER_SIZE 4096
#define OPENTHREAD_CONFIG_NCP_TX_BUFFER_SIZE 4096
/**
* @def OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE
@@ -268,7 +268,7 @@
* Enable setting steering data out of band.
*
*/
#define OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE 1
#define OPENTHREAD_CONFIG_MLE_STEERING_DATA_SET_OOB_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_MLE_INFORM_PREVIOUS_PARENT_ON_REATTACH
@@ -279,7 +279,7 @@
* and mesh-local IP address as the source address) to its previous parent.
*
*/
#define OPENTHREAD_CONFIG_MLE_INFORM_PREVIOUS_PARENT_ON_REATTACH 1
#define OPENTHREAD_CONFIG_MLE_INFORM_PREVIOUS_PARENT_ON_REATTACH 1
/**
* @def OPENTHREAD_CONFIG_MLE_SEND_LINK_REQUEST_ON_ADV_TIMEOUT
@@ -287,7 +287,7 @@
* Define to 1 to send an MLE Link Request when MAX_NEIGHBOR_AGE is reached for a neighboring router.
*
*/
#define OPENTHREAD_CONFIG_MLE_SEND_LINK_REQUEST_ON_ADV_TIMEOUT 1
#define OPENTHREAD_CONFIG_MLE_SEND_LINK_REQUEST_ON_ADV_TIMEOUT 1
/**
* @def OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE
@@ -295,7 +295,7 @@
* Define as 1 to enable Channel Manager support.
*
*/
#define OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE 1
#define OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE
@@ -303,7 +303,7 @@
* Define as 1 to enable Channel Monitor support.
*
*/
#define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 1
#define OPENTHREAD_CONFIG_CHANNEL_MONITOR_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_CHANNEL_MANAGER_MINIMUM_DELAY
@@ -316,7 +316,7 @@
* Applicable only if Channel Manager feature is enabled (i.e., `OPENTHREAD_CONFIG_CHANNEL_MANAGER_ENABLE` is set).
*
*/
#define OPENTHREAD_CONFIG_CHANNEL_MANAGER_MINIMUM_DELAY 2
#define OPENTHREAD_CONFIG_CHANNEL_MANAGER_MINIMUM_DELAY 2
/**
* @def OPENTHREAD_CONFIG_CHANNEL_MANAGER_THRESHOLD_TO_SKIP_FAVORED
@@ -394,7 +394,7 @@
* Define as 1 to enable support for adding of auto-configured SLAAC addresses by OpenThread.
*
*/
#define OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE 1
#define OPENTHREAD_CONFIG_IP6_SLAAC_ENABLE 1
#if OPENTHREAD_RADIO
/**
@@ -419,7 +419,7 @@
* Define to 1 if you want to enable software CSMA-CA backoff logic.
*
*/
#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 1
#define OPENTHREAD_CONFIG_SOFTWARE_CSMA_BACKOFF_ENABLE 1
#endif // OPENTHREAD_RADIO
//--------------------------------------------------------------------------------------------------------------------
@@ -442,4 +442,3 @@
#define OPENTHREAD_POSIX_RCP_UART_ENABLE 1
#endif /* OPENTHREAD_CORE_TORANJ_CONFIG_H_ */
tests/unit/Makefile.am
-27
View File
@@ -233,33 +233,6 @@ test_timer_SOURCES = $(COMMON_SOURCES) test_timer.cpp
test_toolchain_LDADD = $(NULL)
test_toolchain_SOURCES = test_toolchain.cpp test_toolchain_c.c
PRETTY_FILES = \
$(noinst_HEADERS) \
$(test_address_sanitizer_SOURCES) \
$(test_aes_SOURCES) \
$(test_child_SOURCES) \
$(test_child_table_SOURCES) \
$(test_hdlc_SOURCES) \
$(test_heap_SOURCES) \
$(test_hmac_sha256_SOURCES) \
$(test_link_quality_SOURCES) \
$(test_linked_list_SOURCES) \
$(test_lowpan_SOURCES) \
$(test_mac_frame_SOURCES) \
$(test_message_queue_SOURCES) \
$(test_message_SOURCES) \
$(test_spinel_buffer_SOURCES) \
$(test_netif_SOURCES) \
$(test_network_data_SOURCES) \
$(test_priority_queue_SOURCES) \
$(test_pskc_SOURCES) \
$(test_spinel_decoder_SOURCES) \
$(test_spinel_encoder_SOURCES) \
$(test_string_SOURCES) \
$(test_timer_SOURCES) \
$(test_toolchain_SOURCES) \
$(NULL)
if OPENTHREAD_BUILD_COVERAGE
CLEANFILES = $(wildcard *.gcda *.gcno)
endif # OPENTHREAD_BUILD_COVERAGE
tests/unit/test_ip6_address.cpp
+36 -105
View File
@@ -30,7 +30,8 @@
#include "test_util.h"
struct Ip6AddressStringTestVector{
struct Ip6AddressStringTestVector
{
const char * mString;
const uint8_t mAddr[OT_IP6_ADDRESS_SIZE];
otError mError;
@@ -54,147 +55,77 @@ static void checkAddressFromString(Ip6AddressStringTestVector *aTestVector)
void TestIp6AddressFromString(void)
{
Ip6AddressStringTestVector testVectors[] =
{
Ip6AddressStringTestVector testVectors[] = {
// Valid full IPv6 address.
{
"0102:0304:0506:0708:090a:0b0c:0d0e:0f00",
{0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00},
OT_ERROR_NONE
},
{"0102:0304:0506:0708:090a:0b0c:0d0e:0f00",
{0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00},
OT_ERROR_NONE},
// Valid full IPv6 address with mixed capital and small letters.
{
"0102:0304:0506:0708:090a:0B0C:0d0E:0F00",
{0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00},
OT_ERROR_NONE
},
{"0102:0304:0506:0708:090a:0B0C:0d0E:0F00",
{0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00},
OT_ERROR_NONE},
// Short prefix and full IID.
{
"fd11::abcd:e0e0:d10e:0001",
{0xfd, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xab, 0xcd, 0xe0, 0xe0, 0xd1, 0x0e, 0x00, 0x01},
OT_ERROR_NONE
},
{"fd11::abcd:e0e0:d10e:0001",
{0xfd, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xab, 0xcd, 0xe0, 0xe0, 0xd1, 0x0e, 0x00, 0x01},
OT_ERROR_NONE},
// Valid IPv6 address with unnecessary :: symbol.
{
"fd11:1234:5678:abcd::abcd:e0e0:d10e:1000",
{0xfd, 0x11, 0x12, 0x34, 0x56, 0x78, 0xab, 0xcd,
0xab, 0xcd, 0xe0, 0xe0, 0xd1, 0x0e, 0x10, 0x00},
OT_ERROR_NONE
},
{"fd11:1234:5678:abcd::abcd:e0e0:d10e:1000",
{0xfd, 0x11, 0x12, 0x34, 0x56, 0x78, 0xab, 0xcd, 0xab, 0xcd, 0xe0, 0xe0, 0xd1, 0x0e, 0x10, 0x00},
OT_ERROR_NONE},
// Short multicast address.
{
"ff03::0b",
{0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b},
OT_ERROR_NONE
},
{"ff03::0b",
{0xff, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0b},
OT_ERROR_NONE},
// Unspecified address.
{
"::",
{0},
OT_ERROR_NONE
},
{"::", {0}, OT_ERROR_NONE},
// Valid embedded IPv4 address.
{
"64:ff9b::100.200.15.4",
{0x00, 0x64, 0xff, 0x9b, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x64, 0xc8, 0x0f, 0x04},
OT_ERROR_NONE
},
{"64:ff9b::100.200.15.4",
{0x00, 0x64, 0xff, 0x9b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0xc8, 0x0f, 0x04},
OT_ERROR_NONE},
// Valid embedded IPv4 address.
{
"2001:db8::abc:def1:127.0.0.1",
{0x20, 0x01, 0x0d, 0xb8, 0x00, 0x00, 0x00, 0x00,
0x0a, 0xbc, 0xde, 0xf1, 0x7f, 0x00, 0x00, 0x01},
OT_ERROR_NONE
},
{"2001:db8::abc:def1:127.0.0.1",
{0x20, 0x01, 0x0d, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x0a, 0xbc, 0xde, 0xf1, 0x7f, 0x00, 0x00, 0x01},
OT_ERROR_NONE},
// Two :: should cause a parse error.
{
"2001:db8::a::b",
{0},
OT_ERROR_PARSE
},
{"2001:db8::a::b", {0}, OT_ERROR_PARSE},
// The "g" and "h" are not the hex characters.
{
"2001:db8::abcd:efgh",
{0},
OT_ERROR_PARSE
},
{"2001:db8::abcd:efgh", {0}, OT_ERROR_PARSE},
// Too many colons.
{
"1:2:3:4:5:6:7:8:9",
{0},
OT_ERROR_PARSE
},
{"1:2:3:4:5:6:7:8:9", {0}, OT_ERROR_PARSE},
// Too many characters in a single part.
{
"2001:db8::abc:def12:1:2",
{0},
OT_ERROR_PARSE
},
{"2001:db8::abc:def12:1:2", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
"64:ff9b::123.231.0.257",
{0},
OT_ERROR_PARSE
},
{"64:ff9b::123.231.0.257", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
"64:ff9b::1.22.33",
{0},
OT_ERROR_PARSE
},
{"64:ff9b::1.22.33", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
"64:ff9b::1.22.33.44.5",
{0},
OT_ERROR_PARSE
},
{"64:ff9b::1.22.33.44.5", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
".",
{0},
OT_ERROR_PARSE
},
{".", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
":.",
{0},
OT_ERROR_PARSE
},
{":.", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
"::.",
{0},
OT_ERROR_PARSE
},
{"::.", {0}, OT_ERROR_PARSE},
// Invalid embedded IPv4 address.
{
":f:0:0:c:0:f:f:.",
{0},
OT_ERROR_PARSE
},
{":f:0:0:c:0:f:f:.", {0}, OT_ERROR_PARSE},
};
for (uint32_t index = 0; index < OT_ARRAY_LENGTH(testVectors); index++)
tools/Makefile.am
-6
View File
@@ -47,10 +47,4 @@ SUBDIRS += spi-hdlc-adapter
endif
endif # OPENTHREAD_BUILD_TOOLS
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
spi-hdlc-adapter \
$(NULL)
include $(abs_top_nlbuild_autotools_dir)/automake/post.am