mirror of
https://github.com/espressif/openthread.git
synced 2026-10-15 20:27:40 +00:00
[nrf528xx] move transport config to a separate file (#4695)
This commit is contained in:
Piotr Koziar
@@ -44,142 +44,6 @@
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#include "openthread-core-config.h"
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#include <openthread/config.h>
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/*******************************************************************************
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* @section UART Driver Configuration.
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******************************************************************************/
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/**
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* @def UART_INSTANCE
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*
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* UART Instance.
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*
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*/
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#ifndef UART_INSTANCE
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#define UART_INSTANCE NRF_UART0
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#endif
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/**
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* @def UART_PARITY
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*
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* UART Parity configuration.
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*
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* @brief Possible values:
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* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
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* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
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*
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*/
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#ifndef UART_PARITY
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#define UART_PARITY NRF_UART_PARITY_EXCLUDED
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#endif
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/**
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* @def UART_HWFC_ENABLED
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*
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* Enable UART Hardware Flow Control.
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*
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*/
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#ifndef UART_HWFC_ENABLED
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#define UART_HWFC_ENABLED 1
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#endif
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/**
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* @def UART_BAUDRATE
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*
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* UART Baudrate.
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*
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* @brief Possible values:
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* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
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* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
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* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
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* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
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* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
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* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
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* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
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* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
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* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
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* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
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* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
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* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
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* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
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* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
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* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
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* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
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*
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*/
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#ifndef UART_BAUDRATE
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#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
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#endif
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/**
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* @def UART_IRQN
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*
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* UART Interrupt number.
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*
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*/
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#ifndef UART_IRQN
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#define UART_IRQN UARTE0_UART0_IRQn
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#endif
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/**
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* @def UART_IRQ_PRIORITY
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*
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* UART Interrupt priority.
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*
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*/
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#ifndef UART_IRQ_PRIORITY
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#define UART_IRQ_PRIORITY 6
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#endif
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/**
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* @def UART_RX_BUFFER_SIZE
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*
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* UART Receive buffer size.
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*
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*/
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 256
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#endif
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/**
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* @def UART_PIN_TX
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*
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* UART TX Pin.
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*
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*/
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#ifndef UART_PIN_TX
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#define UART_PIN_TX 6
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#endif
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/**
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* @def UART_PIN_RX
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*
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* UART RX Pin.
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*
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*/
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#ifndef UART_PIN_RX
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#define UART_PIN_RX 8
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#endif
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/**
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* @def UART_PIN_CTS
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*
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* UART CTS Pin.
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*
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*/
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#ifndef UART_PIN_CTS
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#define UART_PIN_CTS 7
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#endif
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/**
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* @def UART_PIN_RTS
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*
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* UART RTS Pin.
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*
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*/
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#ifndef UART_PIN_RTS
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#define UART_PIN_RTS 5
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#endif
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/*******************************************************************************
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* @section Alarm Driver Configuration.
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******************************************************************************/
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@@ -248,83 +112,6 @@
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#define RNG_IRQ_PRIORITY 6
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#endif
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/*******************************************************************************
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* @section SPI Slave configuration.
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******************************************************************************/
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/**
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* @def SPIS Instance.
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*/
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#ifndef SPIS_INSTANCE
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#define SPIS_INSTANCE 0
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#endif
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/**
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* @def SPIS mode.
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*
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* @brief Possible values:
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* \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
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* \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
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* \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
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* \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
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*/
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#ifndef SPIS_MODE
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#define SPIS_MODE NRF_SPIS_MODE_0
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#endif
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/**
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* @def SPIS bit orders.
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*
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* @brief Possible values:
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* \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
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* \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
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*/
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#ifndef SPIS_BIT_ORDER
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#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
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#endif
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/**
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* @def SPIS Interrupt priority.
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*/
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#ifndef SPIS_IRQ_PRIORITY
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#define SPIS_IRQ_PRIORITY 6
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#endif
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/**
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* @def SPIS MOSI Pin.
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*/
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#ifndef SPIS_PIN_MOSI
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#define SPIS_PIN_MOSI 4
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#endif
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/**
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* @def SPIS MISO Pin.
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*/
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#ifndef SPIS_PIN_MISO
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#define SPIS_PIN_MISO 28
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#endif
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/**
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* @def SPIS SCK Pin.
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*/
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#ifndef SPIS_PIN_SCK
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#define SPIS_PIN_SCK 3
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#endif
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/**
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* @def SPIS CSN Pin.
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*/
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#ifndef SPIS_PIN_CSN
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#define SPIS_PIN_CSN 29
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#endif
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/**
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* @def SPIS Host IRQ Pin.
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*/
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#ifndef SPIS_PIN_HOST_IRQ
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#define SPIS_PIN_HOST_IRQ 30
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#endif
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/*******************************************************************************
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* @section Platform FEM Configuration
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******************************************************************************/
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@@ -0,0 +1,260 @@
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/*
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* Copyright (c) 2020, The OpenThread Authors.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holder nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* This file includes the transport-specific configuration.
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*
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*/
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#ifndef TRANSPORT_CONFIG_H_
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#define TRANSPORT_CONFIG_H_
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#include "nrf.h"
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#include "nrf_drv_clock.h"
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#include "nrf_peripherals.h"
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#include "hal/nrf_radio.h"
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#include "hal/nrf_uart.h"
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#include "openthread-core-config.h"
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#include <openthread/config.h>
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/*******************************************************************************
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* @section UART Driver Configuration.
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******************************************************************************/
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/**
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* @def UART_INSTANCE
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*
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* UART Instance.
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*
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*/
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#ifndef UART_INSTANCE
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#define UART_INSTANCE NRF_UART0
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#endif
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/**
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* @def UART_PARITY
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*
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* UART Parity configuration.
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*
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* @brief Possible values:
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* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
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* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
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*
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*/
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#ifndef UART_PARITY
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#define UART_PARITY NRF_UART_PARITY_EXCLUDED
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#endif
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/**
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* @def UART_HWFC_ENABLED
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*
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* Enable UART Hardware Flow Control.
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*
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*/
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#ifndef UART_HWFC_ENABLED
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#define UART_HWFC_ENABLED 1
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#endif
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/**
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* @def UART_BAUDRATE
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*
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* UART Baudrate.
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*
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* @brief Possible values:
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* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
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* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
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* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
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* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
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* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
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* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
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* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
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* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
|
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* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
|
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* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
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* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
|
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* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
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* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
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* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
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* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
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* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
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*
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*/
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#ifndef UART_BAUDRATE
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#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
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#endif
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/**
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* @def UART_IRQN
|
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*
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* UART Interrupt number.
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*
|
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*/
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#ifndef UART_IRQN
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#define UART_IRQN UARTE0_UART0_IRQn
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#endif
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/**
|
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* @def UART_IRQ_PRIORITY
|
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*
|
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* UART Interrupt priority.
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*
|
||||
*/
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#ifndef UART_IRQ_PRIORITY
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#define UART_IRQ_PRIORITY 6
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#endif
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/**
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* @def UART_RX_BUFFER_SIZE
|
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*
|
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* UART Receive buffer size.
|
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*
|
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*/
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 256
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#endif
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|
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/**
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* @def UART_PIN_TX
|
||||
*
|
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* UART TX Pin.
|
||||
*
|
||||
*/
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#ifndef UART_PIN_TX
|
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#define UART_PIN_TX 6
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#endif
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|
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/**
|
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* @def UART_PIN_RX
|
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*
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* UART RX Pin.
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*
|
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*/
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#ifndef UART_PIN_RX
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#define UART_PIN_RX 8
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#endif
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|
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/**
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* @def UART_PIN_CTS
|
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*
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* UART CTS Pin.
|
||||
*
|
||||
*/
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#ifndef UART_PIN_CTS
|
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#define UART_PIN_CTS 7
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#endif
|
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|
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/**
|
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* @def UART_PIN_RTS
|
||||
*
|
||||
* UART RTS Pin.
|
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*
|
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*/
|
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#ifndef UART_PIN_RTS
|
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#define UART_PIN_RTS 5
|
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#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section SPI Slave configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def SPIS Instance.
|
||||
*/
|
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#ifndef SPIS_INSTANCE
|
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#define SPIS_INSTANCE 0
|
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#endif
|
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|
||||
/**
|
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* @def SPIS mode.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
|
||||
* \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
|
||||
*/
|
||||
#ifndef SPIS_MODE
|
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#define SPIS_MODE NRF_SPIS_MODE_0
|
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#endif
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||||
|
||||
/**
|
||||
* @def SPIS bit orders.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
|
||||
* \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
|
||||
*/
|
||||
#ifndef SPIS_BIT_ORDER
|
||||
#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Interrupt priority.
|
||||
*/
|
||||
#ifndef SPIS_IRQ_PRIORITY
|
||||
#define SPIS_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MOSI Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MOSI
|
||||
#define SPIS_PIN_MOSI 4
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MISO Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MISO
|
||||
#define SPIS_PIN_MISO 28
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS SCK Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_SCK
|
||||
#define SPIS_PIN_SCK 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS CSN Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_CSN
|
||||
#define SPIS_PIN_CSN 29
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Host IRQ Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_HOST_IRQ
|
||||
#define SPIS_PIN_HOST_IRQ 30
|
||||
#endif
|
||||
|
||||
#endif // TRANSPORT_CONFIG_H_
|
||||
@@ -39,147 +39,10 @@
|
||||
#include "nrf_drv_clock.h"
|
||||
#include "nrf_peripherals.h"
|
||||
#include "hal/nrf_radio.h"
|
||||
#include "hal/nrf_uart.h"
|
||||
|
||||
#include "openthread-core-config.h"
|
||||
#include <openthread/config.h>
|
||||
|
||||
/*******************************************************************************
|
||||
* @section UART Driver Configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def UART_INSTANCE
|
||||
*
|
||||
* UART Instance.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_INSTANCE
|
||||
#define UART_INSTANCE NRF_UART0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PARITY
|
||||
*
|
||||
* UART Parity configuration.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
|
||||
* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PARITY
|
||||
#define UART_PARITY NRF_UART_PARITY_EXCLUDED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_HWFC_ENABLED
|
||||
*
|
||||
* Enable UART Hardware Flow Control.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_HWFC_ENABLED
|
||||
#define UART_HWFC_ENABLED 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_BAUDRATE
|
||||
*
|
||||
* UART Baudrate.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
|
||||
* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_BAUDRATE
|
||||
#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQN
|
||||
*
|
||||
* UART Interrupt number.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQN
|
||||
#define UART_IRQN UARTE0_UART0_IRQn
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQ_PRIORITY
|
||||
*
|
||||
* UART Interrupt priority.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQ_PRIORITY
|
||||
#define UART_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_RX_BUFFER_SIZE
|
||||
*
|
||||
* UART Receive buffer size.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_RX_BUFFER_SIZE
|
||||
#define UART_RX_BUFFER_SIZE 512
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_TX
|
||||
*
|
||||
* UART TX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_TX
|
||||
#define UART_PIN_TX 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RX
|
||||
*
|
||||
* UART RX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RX
|
||||
#define UART_PIN_RX 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_CTS
|
||||
*
|
||||
* UART CTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_CTS
|
||||
#define UART_PIN_CTS 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RTS
|
||||
*
|
||||
* UART RTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RTS
|
||||
#define UART_PIN_RTS 5
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section Alarm Driver Configuration.
|
||||
******************************************************************************/
|
||||
@@ -248,137 +111,6 @@
|
||||
#define RNG_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section SPI Slave configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def SPIS Instance.
|
||||
*/
|
||||
#ifndef SPIS_INSTANCE
|
||||
#define SPIS_INSTANCE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS mode.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
|
||||
* \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
|
||||
*/
|
||||
#ifndef SPIS_MODE
|
||||
#define SPIS_MODE NRF_SPIS_MODE_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS bit orders.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
|
||||
* \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
|
||||
*/
|
||||
#ifndef SPIS_BIT_ORDER
|
||||
#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Interrupt priority.
|
||||
*/
|
||||
#ifndef SPIS_IRQ_PRIORITY
|
||||
#define SPIS_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MOSI Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MOSI
|
||||
#define SPIS_PIN_MOSI 4
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MISO Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MISO
|
||||
#define SPIS_PIN_MISO 28
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS SCK Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_SCK
|
||||
#define SPIS_PIN_SCK 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS CSN Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_CSN
|
||||
#define SPIS_PIN_CSN 29
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Host IRQ Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_HOST_IRQ
|
||||
#define SPIS_PIN_HOST_IRQ 30
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section USB driver configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def USB_HOST_UART_CONFIG_DELAY_MS
|
||||
*
|
||||
* Delay after DTR gets asserted that we start send any queued data. This allows slow
|
||||
* Linux-based hosts to have enough time to configure their port for raw mode.
|
||||
*
|
||||
*/
|
||||
#ifndef USB_HOST_UART_CONFIG_DELAY_MS
|
||||
#define USB_HOST_UART_CONFIG_DELAY_MS 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def USB_CDC_AS_SERIAL_TRANSPORT
|
||||
*
|
||||
* Use USB CDC driver for serial communication.
|
||||
*/
|
||||
#ifndef USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#define USB_CDC_AS_SERIAL_TRANSPORT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM COMM.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_COMM_INTERFACE
|
||||
#define USB_CDC_ACM_COMM_INTERFACE 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM DATA.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_DATA_INTERFACE
|
||||
#define USB_CDC_ACM_DATA_INTERFACE 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
*
|
||||
* Reset the application, not the chip, when a software reset is requested.
|
||||
* via `otPlatReset()`.
|
||||
*/
|
||||
#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section Platform FEM Configuration
|
||||
******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,309 @@
|
||||
/*
|
||||
* Copyright (c) 2020, The OpenThread Authors.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* This file includes the transport-specific configuration.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef TRANSPORT_CONFIG_H_
|
||||
#define TRANSPORT_CONFIG_H_
|
||||
|
||||
#include "nrf.h"
|
||||
#include "hal/nrf_spis.h"
|
||||
#include "hal/nrf_uart.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* @section UART Driver Configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def UART_INSTANCE
|
||||
*
|
||||
* UART Instance.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_INSTANCE
|
||||
#define UART_INSTANCE NRF_UART0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PARITY
|
||||
*
|
||||
* UART Parity configuration.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
|
||||
* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PARITY
|
||||
#define UART_PARITY NRF_UART_PARITY_EXCLUDED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_HWFC_ENABLED
|
||||
*
|
||||
* Enable UART Hardware Flow Control.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_HWFC_ENABLED
|
||||
#define UART_HWFC_ENABLED 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_BAUDRATE
|
||||
*
|
||||
* UART Baudrate.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
|
||||
* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_BAUDRATE
|
||||
#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQN
|
||||
*
|
||||
* UART Interrupt number.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQN
|
||||
#define UART_IRQN UARTE0_UART0_IRQn
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQ_PRIORITY
|
||||
*
|
||||
* UART Interrupt priority.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQ_PRIORITY
|
||||
#define UART_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_RX_BUFFER_SIZE
|
||||
*
|
||||
* UART Receive buffer size.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_RX_BUFFER_SIZE
|
||||
#define UART_RX_BUFFER_SIZE 512
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_TX
|
||||
*
|
||||
* UART TX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_TX
|
||||
#define UART_PIN_TX 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RX
|
||||
*
|
||||
* UART RX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RX
|
||||
#define UART_PIN_RX 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_CTS
|
||||
*
|
||||
* UART CTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_CTS
|
||||
#define UART_PIN_CTS 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RTS
|
||||
*
|
||||
* UART RTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RTS
|
||||
#define UART_PIN_RTS 5
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section SPI Slave configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def SPIS Instance.
|
||||
*/
|
||||
#ifndef SPIS_INSTANCE
|
||||
#define SPIS_INSTANCE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS mode.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
|
||||
* \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
|
||||
*/
|
||||
#ifndef SPIS_MODE
|
||||
#define SPIS_MODE NRF_SPIS_MODE_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS bit orders.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
|
||||
* \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
|
||||
*/
|
||||
#ifndef SPIS_BIT_ORDER
|
||||
#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Interrupt priority.
|
||||
*/
|
||||
#ifndef SPIS_IRQ_PRIORITY
|
||||
#define SPIS_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MOSI Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MOSI
|
||||
#define SPIS_PIN_MOSI 4
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MISO Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MISO
|
||||
#define SPIS_PIN_MISO 28
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS SCK Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_SCK
|
||||
#define SPIS_PIN_SCK 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS CSN Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_CSN
|
||||
#define SPIS_PIN_CSN 29
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Host IRQ Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_HOST_IRQ
|
||||
#define SPIS_PIN_HOST_IRQ 30
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section USB driver configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def USB_HOST_UART_CONFIG_DELAY_MS
|
||||
*
|
||||
* Delay after DTR gets asserted that we start send any queued data. This allows slow
|
||||
* Linux-based hosts to have enough time to configure their port for raw mode.
|
||||
*
|
||||
*/
|
||||
#ifndef USB_HOST_UART_CONFIG_DELAY_MS
|
||||
#define USB_HOST_UART_CONFIG_DELAY_MS 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def USB_CDC_AS_SERIAL_TRANSPORT
|
||||
*
|
||||
* Use USB CDC driver for serial communication.
|
||||
*/
|
||||
#ifndef USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#define USB_CDC_AS_SERIAL_TRANSPORT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM COMM.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_COMM_INTERFACE
|
||||
#define USB_CDC_ACM_COMM_INTERFACE 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM DATA.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_DATA_INTERFACE
|
||||
#define USB_CDC_ACM_DATA_INTERFACE 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
*
|
||||
* Reset the application, not the chip, when a software reset is requested.
|
||||
* via `otPlatReset()`.
|
||||
*/
|
||||
#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#endif
|
||||
|
||||
#endif // TRANSPORT_CONFIG_H_
|
||||
@@ -39,147 +39,10 @@
|
||||
#include "nrf_drv_clock.h"
|
||||
#include "nrf_peripherals.h"
|
||||
#include "hal/nrf_radio.h"
|
||||
#include "hal/nrf_uart.h"
|
||||
|
||||
#include "openthread-core-config.h"
|
||||
#include <openthread/config.h>
|
||||
|
||||
/*******************************************************************************
|
||||
* @section UART Driver Configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def UART_INSTANCE
|
||||
*
|
||||
* UART Instance.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_INSTANCE
|
||||
#define UART_INSTANCE NRF_UART0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PARITY
|
||||
*
|
||||
* UART Parity configuration.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
|
||||
* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PARITY
|
||||
#define UART_PARITY NRF_UART_PARITY_EXCLUDED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_HWFC_ENABLED
|
||||
*
|
||||
* Enable UART Hardware Flow Control.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_HWFC_ENABLED
|
||||
#define UART_HWFC_ENABLED 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_BAUDRATE
|
||||
*
|
||||
* UART Baudrate.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
|
||||
* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_BAUDRATE
|
||||
#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQN
|
||||
*
|
||||
* UART Interrupt number.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQN
|
||||
#define UART_IRQN UARTE0_UART0_IRQn
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQ_PRIORITY
|
||||
*
|
||||
* UART Interrupt priority.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQ_PRIORITY
|
||||
#define UART_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_RX_BUFFER_SIZE
|
||||
*
|
||||
* UART Receive buffer size.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_RX_BUFFER_SIZE
|
||||
#define UART_RX_BUFFER_SIZE 512
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_TX
|
||||
*
|
||||
* UART TX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_TX
|
||||
#define UART_PIN_TX 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RX
|
||||
*
|
||||
* UART RX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RX
|
||||
#define UART_PIN_RX 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_CTS
|
||||
*
|
||||
* UART CTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_CTS
|
||||
#define UART_PIN_CTS 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RTS
|
||||
*
|
||||
* UART RTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RTS
|
||||
#define UART_PIN_RTS 5
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section Alarm Driver Configuration.
|
||||
******************************************************************************/
|
||||
@@ -248,137 +111,6 @@
|
||||
#define RNG_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section SPI Slave configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def SPIS Instance.
|
||||
*/
|
||||
#ifndef SPIS_INSTANCE
|
||||
#define SPIS_INSTANCE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS mode.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
|
||||
* \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
|
||||
*/
|
||||
#ifndef SPIS_MODE
|
||||
#define SPIS_MODE NRF_SPIS_MODE_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS bit orders.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
|
||||
* \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
|
||||
*/
|
||||
#ifndef SPIS_BIT_ORDER
|
||||
#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Interrupt priority.
|
||||
*/
|
||||
#ifndef SPIS_IRQ_PRIORITY
|
||||
#define SPIS_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MOSI Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MOSI
|
||||
#define SPIS_PIN_MOSI 4
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MISO Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MISO
|
||||
#define SPIS_PIN_MISO 28
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS SCK Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_SCK
|
||||
#define SPIS_PIN_SCK 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS CSN Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_CSN
|
||||
#define SPIS_PIN_CSN 29
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Host IRQ Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_HOST_IRQ
|
||||
#define SPIS_PIN_HOST_IRQ 30
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section USB driver configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def USB_HOST_UART_CONFIG_DELAY_MS
|
||||
*
|
||||
* Delay after DTR gets asserted that we start send any queued data. This allows slow
|
||||
* Linux-based hosts to have enough time to configure their port for raw mode.
|
||||
*
|
||||
*/
|
||||
#ifndef USB_HOST_UART_CONFIG_DELAY_MS
|
||||
#define USB_HOST_UART_CONFIG_DELAY_MS 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def USB_CDC_AS_SERIAL_TRANSPORT
|
||||
*
|
||||
* Use USB CDC driver for serial communication.
|
||||
*/
|
||||
#ifndef USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#define USB_CDC_AS_SERIAL_TRANSPORT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM COMM.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_COMM_INTERFACE
|
||||
#define USB_CDC_ACM_COMM_INTERFACE 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM DATA.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_DATA_INTERFACE
|
||||
#define USB_CDC_ACM_DATA_INTERFACE 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
*
|
||||
* Reset the application, not the chip, when a software reset is requested.
|
||||
* via `otPlatReset()`.
|
||||
*/
|
||||
#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section Platform FEM Configuration
|
||||
******************************************************************************/
|
||||
|
||||
@@ -0,0 +1,309 @@
|
||||
/*
|
||||
* Copyright (c) 2020, The OpenThread Authors.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the copyright holder nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file
|
||||
* This file includes the transport-specific configuration.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef TRANSPORT_CONFIG_H_
|
||||
#define TRANSPORT_CONFIG_H_
|
||||
|
||||
#include "nrf.h"
|
||||
#include "hal/nrf_spis.h"
|
||||
#include "hal/nrf_uart.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* @section UART Driver Configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def UART_INSTANCE
|
||||
*
|
||||
* UART Instance.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_INSTANCE
|
||||
#define UART_INSTANCE NRF_UART0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PARITY
|
||||
*
|
||||
* UART Parity configuration.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
|
||||
* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PARITY
|
||||
#define UART_PARITY NRF_UART_PARITY_EXCLUDED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_HWFC_ENABLED
|
||||
*
|
||||
* Enable UART Hardware Flow Control.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_HWFC_ENABLED
|
||||
#define UART_HWFC_ENABLED 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_BAUDRATE
|
||||
*
|
||||
* UART Baudrate.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
|
||||
* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
|
||||
* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
|
||||
* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
|
||||
* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
|
||||
* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_BAUDRATE
|
||||
#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQN
|
||||
*
|
||||
* UART Interrupt number.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQN
|
||||
#define UART_IRQN UARTE0_UART0_IRQn
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_IRQ_PRIORITY
|
||||
*
|
||||
* UART Interrupt priority.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_IRQ_PRIORITY
|
||||
#define UART_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_RX_BUFFER_SIZE
|
||||
*
|
||||
* UART Receive buffer size.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_RX_BUFFER_SIZE
|
||||
#define UART_RX_BUFFER_SIZE 512
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_TX
|
||||
*
|
||||
* UART TX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_TX
|
||||
#define UART_PIN_TX 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RX
|
||||
*
|
||||
* UART RX Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RX
|
||||
#define UART_PIN_RX 8
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_CTS
|
||||
*
|
||||
* UART CTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_CTS
|
||||
#define UART_PIN_CTS 7
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def UART_PIN_RTS
|
||||
*
|
||||
* UART RTS Pin.
|
||||
*
|
||||
*/
|
||||
#ifndef UART_PIN_RTS
|
||||
#define UART_PIN_RTS 5
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section SPI Slave configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def SPIS Instance.
|
||||
*/
|
||||
#ifndef SPIS_INSTANCE
|
||||
#define SPIS_INSTANCE 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS mode.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_MODE_0 - SCK active high, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_1 - SCK active high, sample on trailing edge of clock.
|
||||
* \ref NRF_SPIS_MODE_2 - SCK active low, sample on leading edge of clock.
|
||||
* \ref NRF_SPIS_MODE_3 - SCK active low, sample on trailing edge of clock.
|
||||
*/
|
||||
#ifndef SPIS_MODE
|
||||
#define SPIS_MODE NRF_SPIS_MODE_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS bit orders.
|
||||
*
|
||||
* @brief Possible values:
|
||||
* \ref NRF_SPIS_BIT_ORDER_MSB_FIRST - Most significant bit shifted out first.
|
||||
* \ref NRF_SPIS_BIT_ORDER_LSB_FIRST - Least significant bit shifted out first.
|
||||
*/
|
||||
#ifndef SPIS_BIT_ORDER
|
||||
#define SPIS_BIT_ORDER NRF_SPIS_BIT_ORDER_MSB_FIRST
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Interrupt priority.
|
||||
*/
|
||||
#ifndef SPIS_IRQ_PRIORITY
|
||||
#define SPIS_IRQ_PRIORITY 6
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MOSI Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MOSI
|
||||
#define SPIS_PIN_MOSI 4
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS MISO Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_MISO
|
||||
#define SPIS_PIN_MISO 28
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS SCK Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_SCK
|
||||
#define SPIS_PIN_SCK 3
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS CSN Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_CSN
|
||||
#define SPIS_PIN_CSN 29
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def SPIS Host IRQ Pin.
|
||||
*/
|
||||
#ifndef SPIS_PIN_HOST_IRQ
|
||||
#define SPIS_PIN_HOST_IRQ 30
|
||||
#endif
|
||||
|
||||
/*******************************************************************************
|
||||
* @section USB driver configuration.
|
||||
******************************************************************************/
|
||||
|
||||
/**
|
||||
* @def USB_HOST_UART_CONFIG_DELAY_MS
|
||||
*
|
||||
* Delay after DTR gets asserted that we start send any queued data. This allows slow
|
||||
* Linux-based hosts to have enough time to configure their port for raw mode.
|
||||
*
|
||||
*/
|
||||
#ifndef USB_HOST_UART_CONFIG_DELAY_MS
|
||||
#define USB_HOST_UART_CONFIG_DELAY_MS 10
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def USB_CDC_AS_SERIAL_TRANSPORT
|
||||
*
|
||||
* Use USB CDC driver for serial communication.
|
||||
*/
|
||||
#ifndef USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#define USB_CDC_AS_SERIAL_TRANSPORT 0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM COMM.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_COMM_INTERFACE
|
||||
#define USB_CDC_ACM_COMM_INTERFACE 1
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def The USB interface to use for CDC ACM DATA.
|
||||
*
|
||||
* According to the USB Specification, interface numbers cannot have gaps. Tailor this value to adhere to this
|
||||
* limitation. Takes values between 0-255.
|
||||
*/
|
||||
#ifndef USB_CDC_ACM_DATA_INTERFACE
|
||||
#define USB_CDC_ACM_DATA_INTERFACE 2
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @def OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
*
|
||||
* Reset the application, not the chip, when a software reset is requested.
|
||||
* via `otPlatReset()`.
|
||||
*/
|
||||
#ifndef OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
#define OPENTHREAD_PLATFORM_USE_PSEUDO_RESET USB_CDC_AS_SERIAL_TRANSPORT
|
||||
#endif
|
||||
|
||||
#endif // TRANSPORT_CONFIG_H_
|
||||
@@ -32,6 +32,7 @@
|
||||
|
||||
#include <nrf.h>
|
||||
|
||||
#include "platform-nrf5-transport.h"
|
||||
#include "platform-nrf5.h"
|
||||
|
||||
#if SOFTDEVICE_PRESENT
|
||||
@@ -74,12 +75,16 @@ void otPlatReset(otInstance *aInstance)
|
||||
{
|
||||
OT_UNUSED_VARIABLE(aInstance);
|
||||
|
||||
#if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
gPlatformPseudoResetWasRequested = true;
|
||||
sResetReason = POWER_RESETREAS_SREQ_Msk;
|
||||
#else // if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
NVIC_SystemReset();
|
||||
#endif // else OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
gPlatformPseudoResetWasRequested = nrf5TransportPseudoResetRequired();
|
||||
|
||||
if (gPlatformPseudoResetWasRequested)
|
||||
{
|
||||
sResetReason = POWER_RESETREAS_SREQ_Msk;
|
||||
}
|
||||
else
|
||||
{
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
}
|
||||
|
||||
otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
|
||||
|
||||
@@ -37,7 +37,7 @@
|
||||
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "platform-config.h"
|
||||
#include "transport-config.h"
|
||||
|
||||
/**
|
||||
* Initialization of transport.
|
||||
@@ -57,4 +57,10 @@ void nrf5TransportDeinit(bool aPseudoReset);
|
||||
*/
|
||||
void nrf5TransportProcess(void);
|
||||
|
||||
/**
|
||||
* This function returns true if transport driver should not be affected
|
||||
* by reset. Otherwise, false is returned.
|
||||
*/
|
||||
bool nrf5TransportPseudoResetRequired(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -77,3 +77,12 @@ void nrf5TransportProcess(void)
|
||||
nrf5SpiSlaveProcess();
|
||||
#endif
|
||||
}
|
||||
|
||||
bool nrf5TransportPseudoResetRequired(void)
|
||||
{
|
||||
#if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
return true;
|
||||
#else // if OPENTHREAD_PLATFORM_USE_PSEUDO_RESET
|
||||
return false;
|
||||
#endif
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user