espressif/openthread
1
0
Fork 0
mirror of https://github.com/espressif/openthread.git synced 2026-07-28 06:37:46 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add support for Nordic Semiconductor's nRF52840 (#1188)

Browse Source
This commit is contained in:
Łukasz Duda
2017-01-23 23:28:52 -08:00
committed by Jonathan Hui
parent fd86da586b
commit d724b757cd
74 changed files with 44682 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.travis/script.sh
+14
View File
@@ -63,6 +63,13 @@ set -x
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-ftd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-mtd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-ncp || die
git clean -xfd || die
./bootstrap || die
COMMISSIONER=1 JOINER=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 make -f examples/Makefile-nrf52840 || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-ftd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-mtd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-ncp || die
}
[ $BUILD_TARGET != arm-gcc54 ] || {
@@ -81,6 +88,13 @@ set -x
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-ftd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-mtd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-ncp || die
git clean -xfd || die
./bootstrap || die
COMMISSIONER=1 JOINER=1 DHCP6_CLIENT=1 DHCP6_SERVER=1 make -f examples/Makefile-nrf52840 || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-ftd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-cli-mtd || die
arm-none-eabi-size output/bin/arm-none-eabi-ot-ncp || die
}
[ $BUILD_TARGET != posix ] || {
configure.ac
+14 -1
View File
@@ -201,6 +201,8 @@ AC_PROG_CXXCPP
AC_PROG_CXX
AC_PROG_CXX_C_O
AM_PROG_AS
# Check for other compiler toolchain tools.
AC_CHECK_TOOL(AR, ar)
@@ -849,7 +851,7 @@ AC_ARG_WITH(examples,
[
case "${with_examples}" in
none|posix|cc2538|da15000)
none|posix|cc2538|da15000|nrf52840)
;;
*)
AC_MSG_ERROR([Invalid value ${with_examples} for --with-examples])
@@ -877,6 +879,11 @@ case ${with_examples} in
AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_DA15000],[${OPENTHREAD_EXAMPLES_DA15000}],[Define to 1 if you want to use da15000 examples])
;;
nrf52840)
OPENTHREAD_EXAMPLES_NRF52840=1
AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_NRF52840],[${OPENTHREAD_EXAMPLES_NRF52840}],[Define to 1 if you want to use nrf52840 examples])
;;
esac
AC_MSG_RESULT(${OPENTHREAD_EXAMPLES})
@@ -894,6 +901,9 @@ AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${OPENTHREAD_EXAMPLES}" = "c
AC_SUBST(OPENTHREAD_EXAMPLES_DA15000)
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_DA15000], [test "${OPENTHREAD_EXAMPLES}" = "da15000"])
AC_SUBST(OPENTHREAD_EXAMPLES_NRF52840)
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_NRF52840], [test "${OPENTHREAD_EXAMPLES}" = "nrf52840"])
#
# Platform Information
#
@@ -1028,6 +1038,7 @@ examples/apps/ncp/Makefile
examples/platforms/Makefile
examples/platforms/cc2538/Makefile
examples/platforms/da15000/Makefile
examples/platforms/nrf52840/Makefile
examples/platforms/posix/Makefile
examples/platforms/utils/Makefile
tools/Makefile
@@ -1084,6 +1095,7 @@ AC_MSG_NOTICE([
C Compiler : ${CC}
C++ Preprocessor : ${CXXCPP}
C++ Compiler : ${CXX}
Assembler Compiler : ${CCAS}
Archiver : ${AR}
Archive Indexer : ${RANLIB}
Symbol Stripper : ${STRIP}
@@ -1091,6 +1103,7 @@ AC_MSG_NOTICE([
C Preprocessor flags : ${CPPFLAGS:--}
C Compile flags : ${CFLAGS:--}
C++ Compile flags : ${CXXFLAGS:--}
Assembler flags : ${CCASFLAGS:--}
Link flags : ${LDFLAGS:--}
Link libraries : ${LIBS}
Pretty : ${PRETTY:--}
examples/Makefile-cc2538
+1 -1
View File
@@ -29,7 +29,7 @@
.NOTPARALLEL:
AR = arm-none-eabi-ar
AS = arm-none-eabi-as
CCAS = arm-none-eabi-as
CPP = arm-none-eabi-cpp
CC = arm-none-eabi-gcc
CXX = arm-none-eabi-g++
examples/Makefile-nrf52840
+322
View File
@@ -0,0 +1,322 @@
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
.NOTPARALLEL:
AR = arm-none-eabi-ar
CCAS = arm-none-eabi-gcc
CPP = arm-none-eabi-cpp
CC = arm-none-eabi-gcc
CXX = arm-none-eabi-g++
LD = arm-none-eabi-ld
STRIP = arm-none-eabi-strip
NM = arm-none-eabi-nm
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
BuildJobs ?= 99
configure_OPTIONS = \
--enable-cli \
--enable-ncp \
--enable-diag \
--with-examples=nrf52840 \
--with-platform-info=NRF52840 \
$(NULL)
ifeq ($(DEFAULT_LOGGING),1)
configure_OPTIONS += --enable-default-logging
endif
ifeq ($(CERT_LOG),1)
configure_OPTIONS += --enable-cert-log
endif
ifeq ($(COMMISSIONER),1)
configure_OPTIONS += --enable-commissioner
endif
ifeq ($(JOINER),1)
configure_OPTIONS += --enable-joiner
endif
ifeq ($(JAM_DETECTION),1)
configure_OPTIONS += --enable-jam-detection
endif
ifeq ($(MAC_WHITELIST),1)
configure_OPTIONS += --enable-mac-whitelist
endif
ifeq ($(COAP),1)
configure_OPTIONS += --enable-application-coap
endif
ifeq ($(LEGACY),1)
configure_OPTIONS += --enable-legacy
endif
ifeq ($(DHCP6_SERVER),1)
configure_OPTIONS += --enable-dhcp6-server
endif
ifeq ($(DHCP6_CLIENT),1)
configure_OPTIONS += --enable-dhcp6-client
endif
ifeq ($(COVERAGE),1)
configure_OPTIONS += --enable-coverage --enable-commissioner --enable-joiner --enable-dhcp6-client --enable-dhcp6-server
endif
ifeq ($(DEBUG),1)
configure_OPTIONS += --enable-debug --enable-optimization=no
endif
ifeq ($(DISABLE_DOC),1)
configure_OPTIONS += --disable-docs
endif
ifdef SRC_PATH
configure_OPTIONS += --srcdir="$(SRC_PATH)"
endif
TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
CONFIG_FILE = OPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-nrf52840-config.h\"'
CONFIG_FILE_PATH = $(AbsTopSourceDir)/examples/platforms/nrf52840/
COMMONCFLAGS := \
-fdata-sections \
-ffunction-sections \
-Os \
-g \
-D$(CONFIG_FILE) \
-I$(CONFIG_FILE_PATH) \
$(NULL)
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
$(NULL)
CFLAGS += \
$(COMMONCFLAGS) \
$(target_CFLAGS) \
$(NULL)
CXXFLAGS += \
$(COMMONCFLAGS) \
$(target_CXXFLAGS) \
-fno-exceptions \
-fno-rtti \
$(NULL)
LDFLAGS += \
$(COMMONCFLAGS) \
$(target_LDFLAGS) \
-specs=nano.specs \
-specs=nosys.specs \
-Wl,--gc-sections \
-Wl,-Map=map.map \
$(NULL)
CCASFLAGS += \
$(COMMONCCASFLAGS) \
$(target_CCASFLAGS) \
-x \
assembler-with-cpp \
$(NULL)
ECHO := @echo
MAKE := make
MKDIR_P := mkdir -p
LN_S := ln -s
RM_F := rm -f
INSTALL := /usr/bin/install
INSTALLFLAGS := -p
BuildPath = build
TopBuildDir = $(BuildPath)
AbsTopBuildDir = $(PWD)/$(TopBuildDir)
ResultPath = output
TopResultDir = $(ResultPath)
AbsTopResultDir = $(PWD)/$(TopResultDir)
TargetTuple = arm-none-eabi
ARCHS = cortex-m4
TopTargetLibDir = $(TopResultDir)/$(if $(1),$(1)-,)$(TargetTuple)/lib
ifndef BuildJobs
BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
endif
JOBSFLAG := -j$(BuildJobs)
#
# configure-arch <arch>
#
# Configure OpenThread for the specified architecture.
#
# arch - The architecture to configure.
#
define configure-arch
$(ECHO) " CONFIG $(1)-$(TargetTuple)..."
(cd $(BuildPath)/$(1)-$(TargetTuple) && $(AbsTopSourceDir)/configure \
INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
CPP="$(CPP)" CC="$(CC)" CXX="$(CXX)" CCAS="$(CCAS)" OBJC="$(OBJC)" OBJCXX="$(OBJCXX)" AR="$(AR)" RANLIB="$(RANLIB)" NM="$(NM)" STRIP="$(STRIP)" CPPFLAGS="$(CPPFLAGS)" CFLAGS="$(CFLAGS)" CXXFLAGS="$(CXXFLAGS)" CCASFLAGS="$(CCASFLAGS)" LDFLAGS="$(LDFLAGS)" \
--host=arm-none-eabi \
--target=arm-none-eabi \
--prefix=/ \
$(configure_OPTIONS))
endef # configure-arch
#
# build-arch <arch>
#
# Build the OpenThread intermediate build products for the specified
# architecture.
#
# arch - The architecture to build.
#
define build-arch
$(ECHO) " BUILD $(1)-$(TargetTuple)"
$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(1)-$(TargetTuple) --no-print-directory \
all
endef # build-arch
#
# stage-arch <arch>
#
# Stage (install) the OpenThread final build products for the specified
# architecture.
#
# arch - The architecture to stage.
#
define stage-arch
$(ECHO) " STAGE $(1)-$(TargetTuple)"
$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(1)-$(TargetTuple) --no-print-directory \
DESTDIR=$(AbsTopResultDir) \
install
endef # stage-arch
#
# ARCH_template <arch>
#
# Define macros, targets and rules to configure, build, and stage the
# OpenThread for a single architecture.
#
# arch - The architecture to instantiate the template for.
#
define ARCH_template
CONFIGURE_TARGETS += configure-$(1)
BUILD_TARGETS += do-build-$(1)
STAGE_TARGETS += stage-$(1)
BUILD_DIRS += $(BuildPath)/$(1)-$(TargetTuple)
DIRECTORIES += $(BuildPath)/$(1)-$(TargetTuple)
configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
configure-$(1): target_CCASFLAGS=$($(1)_target_CCASFLAGS)
configure-$(1): $(BuildPath)/$(1)-$(TargetTuple)/config.status
$(BuildPath)/$(1)-$(TargetTuple)/config.status: | $(BuildPath)/$(1)-$(TargetTuple)
$$(call configure-arch,$(1))
do-build-$(1): configure-$(1)
do-build-$(1):
+$$(call build-arch,$(1))
stage-$(1): do-build-$(1)
stage-$(1): | $(TopResultDir)
$$(call stage-arch,$(1))
$(1): stage-$(1)
endef # ARCH_template
.DEFAULT_GOAL := all
all: stage
#
# Cortex-m4
#
cortex-m4_target_ABI = cortex-m4
cortex-m4_target_CPPFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
cortex-m4_target_CFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
cortex-m4_target_CXXFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
cortex-m4_target_LDFLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -mabi=aapcs
# Instantiate an architecture-specific build template for each target
# architecture.
$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
#
# Common / Finalization
#
configure: $(CONFIGURE_TARGETS)
build: $(BUILD_TARGETS)
stage: $(STAGE_TARGETS)
DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
all: stage
$(DIRECTORIES):
$(ECHO) " MKDIR $@"
@$(MKDIR_P) "$@"
clean:
$(ECHO) " CLEAN"
@$(RM_F) -r $(CLEAN_DIRS)
help:
$(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
$(ECHO) "architectures: "
$(ECHO) ""
$(ECHO) " $(ARCHS)"
$(ECHO) ""
$(ECHO) "To build only a particular architecture, specify: "
$(ECHO) ""
$(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
$(ECHO) ""
examples/apps/cli/Makefile.am
+10 -1
View File
@@ -78,7 +78,6 @@ LDFLAGS_COMMON += \
$(NULL)
endif # OPENTHREAD_EXAMPLES_CC2538
if OPENTHREAD_EXAMPLES_DA15000
LDADD_COMMON += \
$(top_builddir)/examples/platforms/da15000/libopenthread-da15000.a \
@@ -89,6 +88,16 @@ LDFLAGS_COMMON += \
$(NULL)
endif # OPENTHREAD_EXAMPLES_DA15000
if OPENTHREAD_EXAMPLES_NRF52840
LDADD_COMMON += \
$(top_builddir)/examples/platforms/nrf52840/libopenthread-nrf52840.a \
$(NULL)
LDFLAGS_COMMON += \
-T $(top_srcdir)/examples/platforms/nrf52840/nrf52840.ld \
$(NULL)
endif
ot_cli_ftd_CPPFLAGS = \
$(CPPFLAGS_COMMON) \
$(NULL)
examples/apps/ncp/Makefile.am
+10
View File
@@ -85,6 +85,16 @@ ot_ncp_LDFLAGS += \
$(NULL)
endif # OPENTHREAD_EXAMPLES_DA15000
if OPENTHREAD_EXAMPLES_NRF52840
ot_ncp_LDADD += \
$(top_builddir)/examples/platforms/nrf52840/libopenthread-nrf52840.a \
$(NULL)
ot_ncp_LDFLAGS += \
-T $(top_srcdir)/examples/platforms/nrf52840/nrf52840.ld \
$(NULL)
endif
ot_ncp_SOURCES = \
main.c \
$(NULL)
examples/platforms/Makefile.am
+10 -4
View File
@@ -33,6 +33,7 @@ include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
DIST_SUBDIRS = \
cc2538 \
da15000 \
nrf52840 \
posix \
utils \
$(NULL)
@@ -43,10 +44,6 @@ SUBDIRS = \
utils \
$(NULL)
if OPENTHREAD_EXAMPLES_POSIX
SUBDIRS += posix
endif
if OPENTHREAD_EXAMPLES_CC2538
SUBDIRS += cc2538
endif
@@ -55,11 +52,20 @@ if OPENTHREAD_EXAMPLES_DA15000
SUBDIRS += da15000
endif
if OPENTHREAD_EXAMPLES_NRF52840
SUBDIRS += nrf52840
endif
if OPENTHREAD_EXAMPLES_POSIX
SUBDIRS += posix
endif
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
cc2538 \
da15000 \
nrf52840 \
posix \
utils \
$(NULL)
examples/platforms/nrf52840/Makefile.am
+141
View File
@@ -0,0 +1,141 @@
#
# Copyright (c) 2016, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
lib_LIBRARIES = \
libopenthread-nrf52840.a \
libopenthread-nrf52840-sdk.a \
$(NULL)
COMMONCPPFLAGS = \
-DCONFIG_GPIO_AS_PINRESET \
-DNRF52 \
-DNRF52840_XXAA \
-I$(top_srcdir)/include \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/src/core \
-I$(srcdir) \
-I$(top_srcdir)/third_party/NordicSemiconductor \
-I$(top_srcdir)/third_party/NordicSemiconductor/cmsis \
-I$(top_srcdir)/third_party/NordicSemiconductor/device \
-I$(top_srcdir)/third_party/NordicSemiconductor/drivers \
-I$(top_srcdir)/third_party/NordicSemiconductor/hal \
-I$(top_srcdir)/third_party/NordicSemiconductor/segger_rtt \
$(NULL)
PLATFORM_SOURCES = \
alarm.c \
flash.c \
logging.c \
misc.c \
platform.c \
radio.c \
random.c \
uart.c \
platform-config.h \
platform-nrf5.h \
$(NULL)
if OPENTHREAD_ENABLE_DIAG
PLATFORM_SOURCES += \
diag.c \
$(NULL)
endif
NORDICSEMI_SOURCES = \
@top_builddir@/third_party/NordicSemiconductor/hal/nrf_nvmc.c \
@top_builddir@/third_party/NordicSemiconductor/device/system_nrf52840.c \
@top_builddir@/third_party/NordicSemiconductor/drivers/nrf_drv_radio802154.c \
@top_builddir@/third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT.c \
@top_builddir@/third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT_Conf.h \
@top_builddir@/third_party/NordicSemiconductor/device/gcc_startup_nrf52840.S \
$(NULL)
libopenthread_nrf52840_a_CPPFLAGS = \
$(COMMONCPPFLAGS) \
$(NULL)
libopenthread_nrf52840_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NORDICSEMI_SOURCES) \
@top_builddir@/third_party/NordicSemiconductor/drivers/nrf_drv_clock.c \
$(NULL)
libopenthread_nrf52840_sdk_a_CPPFLAGS = \
$(COMMONCPPFLAGS) \
$(NULL)
libopenthread_nrf52840_sdk_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NORDICSEMI_SOURCES) \
$(NULL)
noinst_HEADERS = \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/arm_math.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/cmsis_armcc_V6.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/cmsis_armcc.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/cmsis_gcc.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/core_cm4.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/core_cmFunc.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/core_cmInstr.h \
$(top_srcdir)/third_party/NordicSemiconductor/cmsis/core_cmSimd.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/compiler_abstraction.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/nrf.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/nrf51_to_nrf52.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/nrf51_to_nrf52840.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/nrf52_to_nrf52840.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/nrf52840_bitfields.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/nrf52840_peripherals.h \
$(top_srcdir)/third_party/NordicSemiconductor/device/system_nrf52840.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/nrf_drv_clock.h \
$(top_srcdir)/third_party/NordicSemiconductor/drivers/nrf_drv_radio802154.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_assert.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_clock.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_egu.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_nvmc.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_peripherals.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_radio.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_rng.h \
$(top_srcdir)/third_party/NordicSemiconductor/hal/nrf_uart.h \
$(top_srcdir)/third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT.h \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(NULL)
Dash = -
libopenthread_nrf52840_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
libopenthread_nrf52840_sdk_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/nrf52840/README.md
+135
View File
@@ -0,0 +1,135 @@
# OpenThread on nRF52840 Example
This directory contains example platform drivers for [Nordic Semiconductor nRF52840 SoC][nRF52840].
[nRF52840]: https://www.nordicsemi.com/eng/Products/nRF52840
## Toolchain
Download and install [GNU toolchain for ARM Cortex-M][gnu-toolchain].
[gnu-toolchain]: https://launchpad.net/gcc-arm-embedded
## Building the examples
```bash
$ cd <path-to-openthread>
$ ./bootstrap
$ make -f examples/Makefile-nrf52840
```
After a successful build, the `elf` files can be found in
`<path-to-openthread>/output/bin`. You can convert them to `hex`
files using `arm-none-eabi-objcopy`:
```bash
$ arm-none-eabi-objcopy -O ihex arm-none-eabi-ot-cli-ftd arm-none-eabi-ot-cli-ftd.hex
```
## Flashing the binaries
Flash the compiled binaries onto nRF52840 using `nrfjprog` which is
part of the [nRF5x Command Line Tools][nRF5x-Command-Line-Tools].
[nRF5x-Command-Line-Tools]: https://www.nordicsemi.com/eng/Products/nRF52840#Downloads
```bash
$ nrfjprog -f nrf52 --chiperase --program output/bin/arm-none-eabi-ot-cli-ftd.hex
$ nrfjprog -f nrf52 -r
```
## Running the example
1. Prepare two boards with the flashed `CLI Example` (as shown above).
2. The CLI example uses UART connection. To view raw UART output, start a terminal
emulator like PuTTY and connect to the used COM port with the following UART settings:
- Baud rate: 115200
- 8 data bits
- 1 stop bit
- No parity
- HW flow control: RTS/CTS
On Linux system a port name should be called e.g. `/dev/ttyACM0` and `/dev/ttyACM1`.
3. Open a terminal connection on the first board and start a new Thread network.
```bash
> panid 0xabcd
Done
> ifconfig up
Done
> thread start
Done
```
4. After a couple of seconds the node will become a Leader of the network.
```bash
> state
Leader
```
5. Open a terminal connection on the second board and attach a node to the network.
```bash
> panid 0xabcd
Done
> ifconfig up
Done
> thread start
Done
```
6. After a couple of seconds the second node will attach and become a Child.
```bash
> state
Child
```
7. List all IPv6 addresses of the first board.
```bash
> ipaddr
fdde:ad00:beef:0:0:ff:fe00:fc00
fdde:ad00:beef:0:0:ff:fe00:9c00
fdde:ad00:beef:0:4bcb:73a5:7c28:318e
fe80:0:0:0:5c91:c61:b67c:271c
```
8. Choose one of them and send an ICMPv6 ping from the second board.
```bash
> ping fdde:ad00:beef:0:0:ff:fe00:fc00
16 bytes from fdde:ad00:beef:0:0:ff:fe00:fc00: icmp_seq=1 hlim=64 time=8ms
```
For a list of all available commands, visit [OpenThread CLI Reference README.md][CLI].
[CLI]: https://github.com/openthread/openthread/blob/master/src/cli/README.md
## Logging module
By default, the OpenThread's logging module provides functions to output logging
information over SEGGER's Real Time Transfer (RTT).
RTT output can be viewed in the J-Link RTT Viewer, which is available from SEGGER.
The viewer is also included in the nRF Tools. To read or write messages over RTT,
connect an nRF5 development board via USB and run the J-Link RTT Viewer.
Select the correct target device (nRF52) and the target interface "SWD".
The intended log level can be set using `OPENTHREAD_CONFIG_LOG_LEVEL` define.
## Radio driver documentation
The radio driver comes with documentation that describes the operation of state
machines in this the module. To open the `*.uml` sequence diagrams, use [PlantUML][PlantUML-url].
[PlantUML-url]: http://plantuml.com/
## Verification
The following toolchains have been used for testing and verification:
- gcc version 4.9.3
- gcc version 6.2.0
The nRF52840 example has been verified by Nordic Semiconductor with commit `50db58d`.
examples/platforms/nrf52840/alarm.c
+309
View File
@@ -0,0 +1,309 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for the alarm.
*
*/
#include <assert.h>
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include <platform/alarm.h>
#include <platform/diag.h>
#include "platform-config.h"
#include "cmsis/cmsis_gcc.h"
#include "drivers/nrf_drv_clock.h"
#include "hal/nrf_rtc.h"
#include <openthread-config.h>
#include <openthread-types.h>
#define RTC_FREQUENCY 32768ULL
#define US_PER_MS 1000ULL
#define US_PER_S 1000000ULL
#define US_PER_TICK ((US_PER_S + RTC_FREQUENCY - 1ULL) / RTC_FREQUENCY)
#define MS_PER_S 1000UL
#define MS_PER_OVERFLOW (512UL * MS_PER_S) ///< Time that has passed between overflow events. On full RTC speed, it occurs every 512 s.
typedef struct
{
uint32_t ms;
uint16_t us;
} AlarmTime;
static volatile bool sFireAlarm = false; ///< Information for processing function, that alarm should fire.
static volatile AlarmTime sTimeOffset = { 0 }; ///< Time offset to keep track of current time.
static AlarmTime sT0Time = { 0 }; ///< Alarm start time, for tracking overflows.
static AlarmTime sTargetTime = { 0 }; ///< Alarm fire time.
static void HandleOverflow(void);
static inline uint32_t TimeToTicks(AlarmTime aTime)
{
uint64_t microseconds = US_PER_MS * (uint64_t)aTime.ms + (uint64_t)aTime.us;
return (uint32_t)((microseconds * RTC_FREQUENCY) / US_PER_S) & RTC_CC_COMPARE_Msk;
}
static inline AlarmTime TicksToTime(uint32_t aTicks)
{
uint64_t microseconds = (US_PER_S * (uint64_t)aTicks) / RTC_FREQUENCY;
return (AlarmTime) {microseconds / US_PER_MS, microseconds % US_PER_MS};
}
static inline AlarmTime TimeAdd(AlarmTime aTime1, AlarmTime aTime2)
{
AlarmTime result = { aTime1.ms + aTime2.ms, aTime1.us + aTime2.us };
assert(result.us < 2 * US_PER_MS);
if (result.us >= US_PER_MS)
{
result.ms++;
result.us -= US_PER_MS;
}
return result;
}
static inline AlarmTime AlarmGetCurrentTime(void)
{
uint32_t rtcValue1;
uint32_t rtcValue2;
AlarmTime offset;
rtcValue1 = nrf_rtc_counter_get(RTC_INSTANCE);
__DMB();
offset = sTimeOffset;
__DMB();
rtcValue2 = nrf_rtc_counter_get(RTC_INSTANCE);
if ((rtcValue2 < rtcValue1) || (rtcValue1 == 0))
{
// Overflow detected. Additional condition (rtcValue1 == 0) covers situation when overflow occurred in
// interrupt state, before this function was entered. But in general, this function shall not be called
// from interrupt other than alarm interrupt.
// Wait at least 20 cycles, to ensure that if interrupt is going to be called, it will be called now.
for (uint32_t i = 0; i < 4; i++)
{
__NOP();
__NOP();
__NOP();
}
// If the event flag is still on, it means that the interrupt was not called, as we are in interrupt state.
if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
{
HandleOverflow();
}
offset = sTimeOffset;
}
return TimeAdd(offset, TicksToTime(rtcValue2));
}
static inline AlarmTime AlarmGetCurrentTimeRtcProtected(void)
{
return TimeAdd(AlarmGetCurrentTime(), (AlarmTime) {0, 2 * US_PER_TICK});
}
static inline bool TimeIsLower(AlarmTime aTime1, AlarmTime aTime2)
{
return ((aTime1.ms < aTime2.ms) ||
((aTime1.ms == aTime2.ms) && (aTime1.us < aTime2.us)));
}
static inline bool AlarmShallStrike(AlarmTime aNow)
{
if (TimeIsLower(sTargetTime, sT0Time))
{
// Handle situation when timespan included timer overflow.
if (TimeIsLower(aNow, sT0Time) && !TimeIsLower(aNow, sTargetTime))
{
return true;
}
}
else
{
if (TimeIsLower(aNow, sT0Time) || !TimeIsLower(aNow, sTargetTime))
{
return true;
}
}
return false;
}
static void HandleCompare0Match(void)
{
nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_COMPARE_0);
AlarmTime now = AlarmGetCurrentTimeRtcProtected();
// In case the target time was larger than single overflow,
// we should only strike the timer on final compare event.
if (AlarmShallStrike(now))
{
nrf_rtc_event_disable(RTC_INSTANCE, RTC_EVTEN_COMPARE0_Msk);
nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_COMPARE0_MASK);
sFireAlarm = true;
}
}
static void HandleOverflow(void)
{
nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
// Increment counter on overflow.
sTimeOffset = TimeAdd(sTimeOffset, (AlarmTime) {MS_PER_OVERFLOW, 0});
}
void nrf5AlarmInit(void)
{
sFireAlarm = false;
memset((void *)&sTimeOffset, 0, sizeof(sTimeOffset));
memset((void *)&sTargetTime, 0, sizeof(sTargetTime));
memset((void *)&sT0Time, 0, sizeof(sT0Time));
// Setup low frequency clock.
nrf_drv_clock_lfclk_request(NULL);
while (!nrf_drv_clock_lfclk_is_running()) {}
// Setup RTC timer.
NVIC_SetPriority(RTC_IRQN, RTC_IRQ_PRIORITY);
NVIC_ClearPendingIRQ(RTC_IRQN);
NVIC_EnableIRQ(RTC_IRQN);
nrf_rtc_prescaler_set(RTC_INSTANCE, 0);
nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
nrf_rtc_event_enable(RTC_INSTANCE, RTC_EVTEN_OVRFLW_Msk);
nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_COMPARE_0);
nrf_rtc_event_disable(RTC_INSTANCE, RTC_EVTEN_COMPARE0_Msk);
nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_COMPARE0_MASK);
nrf_rtc_task_trigger(RTC_INSTANCE, NRF_RTC_TASK_START);
}
void nrf5AlarmProcess(otInstance *aInstance)
{
if (sFireAlarm)
{
sFireAlarm = false;
#if OPENTHREAD_ENABLE_DIAG
if (otPlatDiagModeGet())
{
otPlatDiagAlarmFired(aInstance);
}
else
#endif
{
otPlatAlarmFired(aInstance);
}
}
}
uint32_t otPlatAlarmGetNow(void)
{
AlarmTime now = AlarmGetCurrentTime();
return now.ms;
}
void otPlatAlarmStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
(void)aInstance;
uint32_t targetCounter;
AlarmTime now;
nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_COMPARE0_MASK);
nrf_rtc_event_enable(RTC_INSTANCE, RTC_EVTEN_COMPARE0_Msk);
sT0Time = (AlarmTime) {aT0, 0};
sTargetTime = (AlarmTime) {aT0 + aDt, 0};
targetCounter = TimeToTicks(sTargetTime);
nrf_rtc_cc_set(RTC_INSTANCE, 0, targetCounter);
now = AlarmGetCurrentTimeRtcProtected();
if (AlarmShallStrike(now))
{
HandleCompare0Match();
}
else
{
nrf_rtc_int_enable(RTC_INSTANCE, NRF_RTC_INT_COMPARE0_MASK);
}
}
void otPlatAlarmStop(otInstance *aInstance)
{
(void)aInstance;
nrf_rtc_event_disable(RTC_INSTANCE, RTC_EVTEN_COMPARE0_Msk);
nrf_rtc_int_disable(RTC_INSTANCE, NRF_RTC_INT_COMPARE0_MASK);
nrf_rtc_event_clear(RTC_INSTANCE, NRF_RTC_EVENT_COMPARE_0);
sFireAlarm = false;
}
void RTC0_IRQHandler(void)
{
// Handle overflow.
if (nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW))
{
HandleOverflow();
}
// Handle compare match.
if (nrf_rtc_int_is_enabled(RTC_INSTANCE, NRF_RTC_INT_COMPARE0_MASK) &&
nrf_rtc_event_pending(RTC_INSTANCE, NRF_RTC_EVENT_COMPARE_0))
{
HandleCompare0Match();
}
}
examples/platforms/nrf52840/diag.c
+56
View File
@@ -0,0 +1,56 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <platform/diag.h>
/**
* Diagnostics mode flag.
*
*/
static bool sDiagMode = false;
void otPlatDiagProcess(int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
{
// Add more plarform specific diagnostics features here.
snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]);
(void)argc;
}
void otPlatDiagModeSet(bool aMode)
{
sDiagMode = aMode;
}
bool otPlatDiagModeGet()
{
return sDiagMode;
}
examples/platforms/nrf52840/flash.c
+132
View File
@@ -0,0 +1,132 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdint.h>
#include <string.h>
#include <assert.h>
#include <openthread-types.h>
#include <common/code_utils.hpp>
#include <platform/alarm.h>
#include <utils/flash.h>
#include "hal/nrf_nvmc.h"
#include "platform-nrf5.h"
extern uint32_t __flash_data_start;
extern uint32_t __flash_data_end;
#define FLASH_PAGE_ADDR_MASK 0xFFFFF000
#define FLASH_PAGE_SIZE 4096
#define FLASH_START_ADDR ((uint32_t)&__flash_data_start)
#define FLASH_END_ADDR ((uint32_t)&__flash_data_end)
static inline uint32_t mapAddress(uint32_t aAddress)
{
return aAddress + FLASH_START_ADDR;
}
ThreadError utilsFlashInit(void)
{
// Just ensure that the start and end addresses are page-aligned.
assert((FLASH_START_ADDR % FLASH_PAGE_SIZE) == 0);
assert((FLASH_END_ADDR % FLASH_PAGE_SIZE) == 0);
return kThreadError_None;
}
uint32_t utilsFlashGetSize(void)
{
return FLASH_END_ADDR - FLASH_START_ADDR;
}
ThreadError utilsFlashErasePage(uint32_t aAddress)
{
ThreadError error = kThreadError_None;
VerifyOrExit(aAddress < utilsFlashGetSize(), error = kThreadError_InvalidArgs);
nrf_nvmc_page_erase(mapAddress(aAddress & FLASH_PAGE_ADDR_MASK));
exit:
return error;
}
ThreadError utilsFlashStatusWait(uint32_t aTimeout)
{
ThreadError error = kThreadError_Busy;
if (aTimeout == 0)
{
if (NRF_NVMC->READY == NVMC_READY_READY_Ready)
{
error = kThreadError_None;
}
}
else
{
uint32_t startTime = otPlatAlarmGetNow();
do
{
if (NRF_NVMC->READY == NVMC_READY_READY_Ready)
{
error = kThreadError_None;
break;
}
}
while (otPlatAlarmGetNow() - startTime < aTimeout);
}
return error;
}
uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
{
uint32_t result = 0;
VerifyOrExit(aData, ;);
VerifyOrExit(aAddress < utilsFlashGetSize(), ;);
nrf_nvmc_write_bytes(mapAddress(aAddress), aData, aSize);
result = aSize;
exit:
return result;
}
uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
{
uint32_t result = 0;
VerifyOrExit(aData, ;);
VerifyOrExit(aAddress < utilsFlashGetSize(), ;);
memcpy(aData, (uint8_t *)mapAddress(aAddress), aSize);
result = aSize;
exit:
return result;
}
examples/platforms/nrf52840/logging.c
+172
View File
@@ -0,0 +1,172 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for logging.
*
*/
#include <stdarg.h>
#include <stdio.h>
#include <platform/logging.h>
#include <platform/alarm.h>
#include <common/code_utils.hpp>
#include "platform-nrf5.h"
#include <openthread-core-config.h>
#include <openthread-config.h>
#include <openthread-types.h>
#if (OPENTHREAD_ENABLE_DEFAULT_LOGGING == 0)
#include <segger_rtt/SEGGER_RTT.h>
#if (LOG_RTT_COLOR_ENABLE == 1)
#define RTT_COLOR_CODE_DEFAULT "\x1B[0m"
#define RTT_COLOR_CODE_RED "\x1B[1;31m"
#define RTT_COLOR_CODE_GREEN "\x1B[1;32m"
#define RTT_COLOR_CODE_YELLOW "\x1B[1;33m"
#define RTT_COLOR_CODE_CYAN "\x1B[1;36m"
#else // LOG_RTT_COLOR_ENABLE == 1
#define RTT_COLOR_CODE_DEFAULT ""
#define RTT_COLOR_CODE_RED ""
#define RTT_COLOR_CODE_GREEN ""
#define RTT_COLOR_CODE_YELLOW ""
#define RTT_COLOR_CODE_CYAN ""
#endif // LOG_RTT_COLOR_ENABLE == 1
static bool sLogInitialized = false;
static uint8_t sLogBuffer[LOG_RTT_BUFFER_SIZE];
/**
* Function for getting color of a given level log.
*
* @param[in] aLogLevel The log level.
*
* @returns String with a log level color value.
*/
static inline const char *levelToString(otLogLevel aLogLevel)
{
switch (aLogLevel)
{
case kLogLevelCrit:
return RTT_COLOR_CODE_RED;
case kLogLevelWarn:
return RTT_COLOR_CODE_YELLOW;
case kLogLevelInfo:
return RTT_COLOR_CODE_GREEN;
case kLogLevelDebg:
default:
return RTT_COLOR_CODE_DEFAULT;
}
}
#if (LOG_TIMESTAMP_ENABLE == 1)
/**
* Function for printing actual timestamp.
*
* @param[inout] aLogString Pointer to the log buffer.
* @param[in] aMaxSize Maximum size of the log buffer.
*
* @returns Number of bytes successfully written to the log buffer.
*/
static inline uint16_t logTimestamp(char *aLogString, uint16_t aMaxSize)
{
return snprintf(aLogString, aMaxSize, "%s[%010ld]", RTT_COLOR_CODE_CYAN,
otPlatAlarmGetNow());
}
#endif
/**
* Function for printing log level.
*
* @param[inout] aLogString Pointer to log buffer.
* @param[in] aMaxSize Maximum size of log buffer.
* @param[in] aLogLevel Log level.
*
* @returns Number of bytes successfully written to the log buffer.
*/
static inline uint16_t logLevel(char *aLogString, uint16_t aMaxSize,
otLogLevel aLogLevel)
{
return snprintf(aLogString, aMaxSize, "%s ", levelToString(aLogLevel));
}
void nrf5LogInit()
{
int res = SEGGER_RTT_ConfigUpBuffer(LOG_RTT_BUFFER_INDEX,
LOG_RTT_BUFFER_NAME, sLogBuffer,
LOG_RTT_BUFFER_SIZE,
SEGGER_RTT_MODE_NO_BLOCK_TRIM);
VerifyOrExit(res >= 0, ;);
sLogInitialized = true;
exit:
return;
}
void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion,
const char *aFormat, ...)
{
(void) aLogRegion;
VerifyOrExit(sLogInitialized == true, ;);
char logString[LOG_PARSE_BUFFER_SIZE + 1];
uint16_t length = 0;
#if (LOG_TIMESTAMP_ENABLE == 1)
length += logTimestamp(logString, LOG_PARSE_BUFFER_SIZE);
#endif
// Add level information.
length += logLevel(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
aLogLevel);
// Parse user string.
va_list paramList;
va_start(paramList, aFormat);
length += vsnprintf(&logString[length], (LOG_PARSE_BUFFER_SIZE - length),
aFormat, paramList);
logString[length++] = '\n';
va_end(paramList);
// Write user log to the RTT memory block.
SEGGER_RTT_WriteNoLock(0, logString, length);
exit:
return;
}
#endif // (OPENTHREAD_ENABLE_DEFAULT_LOGGING == 0)
examples/platforms/nrf52840/misc.c
+86
View File
@@ -0,0 +1,86 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread-types.h>
#include <platform/misc.h>
#include "device/nrf.h"
static uint32_t sResetReason;
void nrf5MiscInit(void)
{
// Read the reason of last reset.
sResetReason = NRF_POWER->RESETREAS;
// Clear the register, as the reasons cumulate over resets.
NRF_POWER->RESETREAS = 0xFFFFFFFF;
}
void otPlatReset(otInstance *aInstance)
{
(void)aInstance;
NVIC_SystemReset();
}
otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
{
(void)aInstance;
otPlatResetReason reason;
if (sResetReason & POWER_RESETREAS_RESETPIN_Msk)
{
reason = kPlatResetReason_External;
}
else if (sResetReason & POWER_RESETREAS_DOG_Msk)
{
reason = kPlatResetReason_Watchdog;
}
else if (sResetReason & POWER_RESETREAS_SREQ_Msk)
{
reason = kPlatResetReason_Software;
}
else if (sResetReason & POWER_RESETREAS_LOCKUP_Msk)
{
reason = kPlatResetReason_Fault;
}
else if ((sResetReason & POWER_RESETREAS_OFF_Msk) ||
(sResetReason & POWER_RESETREAS_LPCOMP_Msk) ||
(sResetReason & POWER_RESETREAS_DIF_Msk) ||
(sResetReason & POWER_RESETREAS_NFC_Msk) ||
(sResetReason & POWER_RESETREAS_VBUS_Msk))
{
reason = kPlatResetReason_Other;
}
else
{
reason = kPlatResetReason_PowerOn;
}
return reason;
}
examples/platforms/nrf52840/nrf52840.ld
+175
View File
@@ -0,0 +1,175 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* GCC linker script for nRF52840.
*/
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000
}
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
ENTRY(Reset_Handler)
FLASH_PAGE_SIZE = 4096;
FLASH_DATA_PAGES_USED = 4;
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
nrf_radio_buffer :
{
__nrf_radio_buffer_start__ = .;
*(nrf_radio_buffer*)
__nrf_radio_buffer_end__ = .;
} > RAM
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM
.heap (COPY):
{
__HeapBase = .;
__end__ = .;
PROVIDE(end = .);
KEEP(*(.heap*))
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
KEEP(*(.stack*))
} > RAM
__flash_data_end = (ORIGIN(FLASH) + LENGTH(FLASH));
__flash_data_start = (__flash_data_end - (FLASH_PAGE_SIZE * FLASH_DATA_PAGES_USED));
/* Assure that code does not overlap flash data area.*/
ASSERT((__flash_data_start >= __etext), "Error: Code overlaps flash data area.")
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}
examples/platforms/nrf52840/openthread-core-nrf52840-config.h
+94
View File
@@ -0,0 +1,94 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file includes nrf52840 compile-time configuration constants
* for OpenThread.
*/
#ifndef OPENTHREAD_CORE_NRF52840_CONFIG_H_
#define OPENTHREAD_CORE_NRF52840_CONFIG_H_
/**
* @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
*
* The number of message buffers in the buffer pool.
*
*/
#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 128
/**
* @def OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS
*
* The maximum number of state-changed callback handlers (set using `otSetStateChangedCallback()`).
*
*/
#define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 2
/**
* @def OPENTHREAD_CONFIG_ADDRESS_CACHE_ENTRIES
*
* The number of EID-to-RLOC cache entries.
*
*/
#define OPENTHREAD_CONFIG_ADDRESS_CACHE_ENTRIES 20
/**
* @def OPENTHREAD_CONFIG_LOG_PREPREND_LEVEL
*
* Define to prepend the log level to all log messages
*
*/
#define OPENTHREAD_CONFIG_LOG_PREPEND_LEVEL 0
/**
* @def SETTINGS_CONFIG_BASE_ADDRESS
*
* The base address of settings.
*
*/
#define SETTINGS_CONFIG_BASE_ADDRESS 0
/**
* @def SETTINGS_CONFIG_PAGE_SIZE
*
* The page size of settings.
*
*/
#define SETTINGS_CONFIG_PAGE_SIZE 4096
/**
* @def SETTINGS_CONFIG_PAGE_NUM
*
* The page number of settings.
*
*/
#define SETTINGS_CONFIG_PAGE_NUM 4
#endif // OPENTHREAD_CORE_WINDOWS_CONFIG_H_
examples/platforms/nrf52840/platform-config.h
+332
View File
@@ -0,0 +1,332 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file includes the platform-specific configuration.
*
*/
#ifndef PLATFORM_CONFIG_H_
#define PLATFORM_CONFIG_H_
#include "device/nrf.h"
#include "hal/nrf_uart.h"
#include "hal/nrf_peripherals.h"
#include "hal/nrf_radio.h"
#include <openthread-core-config.h>
/*******************************************************************************
* @section UART Driver Configuration.
******************************************************************************/
/**
* @def UART_INSTANCE
*
* UART Instance.
*
*/
#define UART_INSTANCE NRF_UART0
/**
* @def UART_PARITY
*
* UART Parity configuration.
*
* @brief Possible values:
* \ref NRF_UART_PARITY_EXCLUDED - Parity bit is not present.
* \ref NRF_UART_PARITY_INCLUDED - Parity bit is present.
*
*/
#define UART_PARITY NRF_UART_PARITY_EXCLUDED
/**
* @def UART_HWFC
*
* UART Hardware Flow Control.
*
* @brief Possible values:
* \ref NRF_UART_HWFC_ENABLED - HW Flow control enabled.
* \ref NRF_UART_HWFC_DISABLED - HW Flow control disabled.
*
*/
#define UART_HWFC NRF_UART_HWFC_ENABLED
/**
* @def UART_BAUDRATE
*
* UART Baudrate.
*
* @brief Possible values:
* \ref NRF_UART_BAUDRATE_1200 - 1200 baud.
* \ref NRF_UART_BAUDRATE_2400 - 2400 baud.
* \ref NRF_UART_BAUDRATE_4800 - 4800 baud.
* \ref NRF_UART_BAUDRATE_9600 - 9600 baud.
* \ref NRF_UART_BAUDRATE_14400 - 14400 baud.
* \ref NRF_UART_BAUDRATE_19200 - 19200 baud.
* \ref NRF_UART_BAUDRATE_28800 - 28800 baud.
* \ref NRF_UART_BAUDRATE_38400 - 38400 baud.
* \ref NRF_UART_BAUDRATE_57600 - 57600 baud.
* \ref NRF_UART_BAUDRATE_76800 - 76800 baud.
* \ref NRF_UART_BAUDRATE_115200 - 115200 baud.
* \ref NRF_UART_BAUDRATE_230400 - 230400 baud.
* \ref NRF_UART_BAUDRATE_250000 - 250000 baud.
* \ref NRF_UART_BAUDRATE_460800 - 460800 baud.
* \ref NRF_UART_BAUDRATE_921600 - 921600 baud.
* \ref NRF_UART_BAUDRATE_1000000 - 1000000 baud.
*
*/
#define UART_BAUDRATE NRF_UART_BAUDRATE_115200
/**
* @def UART_IRQN
*
* UART Interrupt number.
*
*/
#define UART_IRQN UARTE0_UART0_IRQn
/**
* @def UART_IRQ_PRIORITY
*
* UART Interrupt priority.
*
*/
#define UART_IRQ_PRIORITY 6
/**
* @def UART_RX_BUFFER_SIZE
*
* UART Receive buffer size.
*
*/
#define UART_RX_BUFFER_SIZE 256
/**
* @def UART_PIN_TX
*
* UART TX Pin.
*
*/
#define UART_PIN_TX 6
/**
* @def UART_PIN_RX
*
* UART RX Pin.
*
*/
#define UART_PIN_RX 8
/**
* @def UART_PIN_CTS
*
* UART CTS Pin.
*
*/
#define UART_PIN_CTS 7
/**
* @def UART_PIN_RTS
*
* UART RTS Pin.
*
*/
#define UART_PIN_RTS 5
/*******************************************************************************
* @section Alarm Driver Configuration.
******************************************************************************/
/**
* @def RTC_INSTANCE
*
* RTC Instance.
*
*/
#define RTC_INSTANCE NRF_RTC0
/**
* @def RTC_IRQN
*
* RTC Interrupt number.
*
*/
#define RTC_IRQN RTC0_IRQn
/**
* @def RTC_IRQ_PRIORITY
*
* RTC Interrupt priority.
*
*/
#define RTC_IRQ_PRIORITY 6
/*******************************************************************************
* @section Random Number Generator Driver Configuration.
******************************************************************************/
/**
* @def RNG_BUFFER_SIZE
*
* True Random Number Generator buffer size.
*
*/
#define RNG_BUFFER_SIZE 64
/**
* @def RNG_IRQ_PRIORITY
*
* RNG Interrupt priority.
*
*/
#define RNG_IRQ_PRIORITY 6
/*******************************************************************************
* @section Log module configuration.
******************************************************************************/
/**
* @def LOG_RTT_BUFFER_INDEX
*
* RTT's buffer index.
*
*/
#define LOG_RTT_BUFFER_INDEX 0
/**
* @def LOG_RTT_BUFFER_NAME
*
* RTT's name.
*
*/
#define LOG_RTT_BUFFER_NAME "Terminal"
/**
* @def LOG_RTT_BUFFER_SIZE
*
* LOG RTT's buffer size.
*
*/
#define LOG_RTT_BUFFER_SIZE 256
/**
* @def LOG_RTT_COLOR_ENABLE
*
* Enable colors on RTT Viewer.
*
*/
#define LOG_RTT_COLOR_ENABLE 1
/**
* @def LOG_PARSE_BUFFER_SIZE
*
* LOG buffer used to parse print format. It will be locally allocated on the
* stack.
*
*/
#define LOG_PARSE_BUFFER_SIZE 128
/**
* @def LOG_TIMESTAMP_ENABLE
*
* Enable timestamp in the logs.
*
*/
#define LOG_TIMESTAMP_ENABLE 1
/*******************************************************************************
* @section Radio Driver Configuration.
******************************************************************************/
/**
* @def RADIO_CCA_MODE
*
* RADIO CCA Mode.
*
*/
#define RADIO_CCA_MODE NRF_RADIO_CCA_MODE_ED
/**
* @def RADIO_CCA_ED_THRESHOLD
*
* RADIO Energy Detection Threshold.
*
*/
#define RADIO_CCA_ED_THRESHOLD 0x2D
/**
* @def RADIO_CCA_CORR_THRESHOLD
*
* RADIO Correlator Threshold.
*
*/
#define RADIO_CCA_CORR_THRESHOLD 0x2D
/**
* @def RADIO_CCA_CORR_LIMIT
*
* RADIO Correlator limit.
*
*/
#define RADIO_CCA_CORR_LIMIT 0x02
/**
* @def RADIO_IRQ_PRIORITY
*
* RADIO Interrupt priority.
*
*/
#define RADIO_IRQ_PRIORITY 0
/**
* @def RADIO_PENDING_SHORT_ADDRESSES
*
* RADIO Number of slots containing short addresses of nodes for which pending data is stored.
*
*/
#define RADIO_PENDING_SHORT_ADDRESSES OPENTHREAD_CONFIG_MAX_CHILDREN
/**
* @def RADIO_PENDING_EXTENDED_ADDRESSES
*
* RADIO Number of slots containing extended addresses of nodes for which pending data is stored.
*
*/
#define RADIO_PENDING_EXTENDED_ADDRESSES OPENTHREAD_CONFIG_MAX_CHILDREN
/**
* @def RADIO_RX_BUFFERS
*
* RADIO Number of buffers in receive queue.
*
*/
#define RADIO_RX_BUFFERS 16
#endif // PLATFORM_CONFIG_H_
examples/platforms/nrf52840/platform-nrf5.h
+98
View File
@@ -0,0 +1,98 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file includes the platform-specific initializers.
*
*/
#ifndef PLATFORM_NRF5_H_
#define PLATFORM_NRF5_H_
#include <stdint.h>
#include <openthread-types.h>
#include "platform-config.h"
/**
* Initialization of UART driver.
*
*/
void nrf5UartInit(void);
/**
* This function performs UART driver processing.
*
*/
void nrf5UartProcess(void);
/**
* Initialization of Alarm driver.
*
*/
void nrf5AlarmInit(void);
/**
* Function for processing Alarm.
*
*/
void nrf5AlarmProcess(otInstance *aInstance);
/**
* Initialization of Random Number Generator.
*
*/
void nrf5RandomInit(void);
/**
* Initialization of Logger driver.
*
*/
void nrf5LogInit(void);
/**
* Function for processing SPI Slave driver.
*
*/
void nrf5MiscInit(void);
/**
* Initialization of Radio peripheral.
*
*/
void nrf5RadioInit(void);
/**
* Function for processing Radio.
*
*/
void nrf5RadioProcess(otInstance *aInstance);
#endif // PLATFORM_NRF5_H_
examples/platforms/nrf52840/platform.c
+70
View File
@@ -0,0 +1,70 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file includes the platform-specific initializers.
*
*/
#include <platform/logging.h>
#include <platform/uart.h>
#include "drivers/nrf_drv_clock.h"
#include "platform-nrf5.h"
#include <openthread-core-config.h>
#include <openthread-config.h>
void __cxa_pure_virtual(void) { while (1); }
void PlatformInit(int argc, char *argv[])
{
(void)argc;
(void)argv;
nrf_drv_clock_init();
nrf5AlarmInit();
nrf5RandomInit();
nrf5UartInit();
nrf5MiscInit();
nrf5RadioInit();
#if (OPENTHREAD_ENABLE_DEFAULT_LOGGING == 0)
nrf5LogInit();
#endif
// Enable UART since its not enabled by higher level layers.
otPlatUartEnable();
}
void PlatformProcessDrivers(otInstance *aInstance)
{
nrf5AlarmProcess(aInstance);
nrf5RadioProcess(aInstance);
nrf5UartProcess();
}
examples/platforms/nrf52840/radio.c
+559
View File
@@ -0,0 +1,559 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for radio communication.
*
*/
#include <assert.h>
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include <string.h>
#include <common/code_utils.hpp>
#include <platform-config.h>
#include <platform/logging.h>
#include <platform/radio.h>
#include <platform/diag.h>
#include "device/nrf.h"
#include "drivers/nrf_drv_radio802154.h"
#include <openthread-core-config.h>
#include <openthread-config.h>
#include <openthread-types.h>
#define SHORT_ADDRESS_SIZE 2
#define EXTENDED_ADDRESS_SIZE 8
static bool sDisabled;
static RadioPacket sReceivedFrames[RADIO_RX_BUFFERS];
static RadioPacket sTransmitFrame;
static uint8_t sTransmitPsdu[kMaxPHYPacketSize + 1]
__attribute__((section("nrf_radio_buffer.sTransmiPsdu")));
static bool sTransmitPendingBit;
static uint32_t sEnergyDetectionTime;
static uint8_t sEnergyDetectionChannel;
static int8_t sEnergyDetected;
typedef enum
{
kPendingEventSleep, // Requested to enter Sleep state.
kPendingEventFrameTransmitted, // Transmitted frame and received ACK (if requested).
kPendingEventChannelAccessFailure, // Failed to transmit frame (channel busy).
kPendingEventEnergyDetectionStart, // Requested to start Energy Detection procedure.
kPendingEventEnergyDetected, // Energy Detection finished.
} RadioPendingEvents;
static uint32_t sPendingEvents;
static void dataInit(void)
{
sDisabled = true;
sTransmitFrame.mPsdu = sTransmitPsdu + 1;
for (uint32_t i = 0; i < RADIO_RX_BUFFERS; i++)
{
sReceivedFrames[i].mPsdu = NULL;
}
}
static void convertShortAddress(uint8_t *aTo, uint16_t aFrom)
{
aTo[0] = (uint8_t) aFrom;
aTo[1] = (uint8_t)(aFrom >> 8);
}
static inline bool isPendingEventSet(RadioPendingEvents aEvent)
{
return sPendingEvents & (1UL << aEvent);
}
static void setPendingEvent(RadioPendingEvents aEvent)
{
volatile uint32_t pendingEvents;
uint32_t bitToSet = 1UL << aEvent;
do
{
pendingEvents = __LDREXW(&sPendingEvents);
pendingEvents |= bitToSet;
}
while (__STREXW(pendingEvents, &sPendingEvents));
}
static void resetPendingEvent(RadioPendingEvents aEvent)
{
volatile uint32_t pendingEvents;
uint32_t bitsToRemain = ~(1UL << aEvent);
do
{
pendingEvents = __LDREXW(&sPendingEvents);
pendingEvents &= bitsToRemain;
}
while (__STREXW(pendingEvents, &sPendingEvents));
}
static inline void clearPendingEvents(void)
{
// Clear pending events that could cause race in the MAC layer.
volatile uint32_t pendingEvents;
uint32_t bitsToRemain = ~(0UL);
bitsToRemain &= ~(1UL << kPendingEventFrameTransmitted);
bitsToRemain &= ~(1UL << kPendingEventChannelAccessFailure);
bitsToRemain &= ~(1UL << kPendingEventSleep);
do
{
pendingEvents = __LDREXW(&sPendingEvents);
pendingEvents &= bitsToRemain;
}
while (__STREXW(pendingEvents, &sPendingEvents));
}
void otPlatRadioGetIeeeEui64(otInstance *aInstance, uint8_t *aIeeeEui64)
{
(void) aInstance;
uint64_t factoryAddress;
factoryAddress = (((uint64_t)NRF_FICR->DEVICEID[0] << 32) | NRF_FICR->DEVICEID[1]);
memcpy(aIeeeEui64, &factoryAddress, sizeof(factoryAddress));
}
void otPlatRadioSetPanId(otInstance *aInstance, uint16_t aPanId)
{
(void) aInstance;
uint8_t address[SHORT_ADDRESS_SIZE];
convertShortAddress(address, aPanId);
nrf_drv_radio802154_pan_id_set(address);
}
void otPlatRadioSetExtendedAddress(otInstance *aInstance, uint8_t *aExtendedAddress)
{
(void) aInstance;
nrf_drv_radio802154_extended_address_set(aExtendedAddress);
}
void otPlatRadioSetShortAddress(otInstance *aInstance, uint16_t aShortAddress)
{
(void) aInstance;
uint8_t address[SHORT_ADDRESS_SIZE];
convertShortAddress(address, aShortAddress);
nrf_drv_radio802154_short_address_set(address);
}
void nrf5RadioInit(void)
{
dataInit();
nrf_drv_radio802154_init();
}
ThreadError otPlatRadioEnable(otInstance *aInstance)
{
(void) aInstance;
ThreadError error;
if (sDisabled)
{
sDisabled = false;
error = kThreadError_None;
}
else
{
error = kThreadError_InvalidState;
}
return error;
}
ThreadError otPlatRadioDisable(otInstance *aInstance)
{
(void) aInstance;
ThreadError error;
if (!sDisabled)
{
sDisabled = true;
error = kThreadError_None;
}
else
{
error = kThreadError_InvalidState;
}
return error;
}
bool otPlatRadioIsEnabled(otInstance *aInstance)
{
(void) aInstance;
return !sDisabled;
}
ThreadError otPlatRadioSleep(otInstance *aInstance)
{
(void) aInstance;
if (nrf_drv_radio802154_sleep())
{
clearPendingEvents();
}
else
{
clearPendingEvents();
setPendingEvent(kPendingEventSleep);
}
return kThreadError_None;
}
ThreadError otPlatRadioReceive(otInstance *aInstance, uint8_t aChannel)
{
(void) aInstance;
nrf_drv_radio802154_receive(aChannel);
clearPendingEvents();
return kThreadError_None;
}
ThreadError otPlatRadioTransmit(otInstance *aInstance, RadioPacket *aPacket)
{
(void) aInstance;
aPacket->mPsdu[-1] = aPacket->mLength;
if (nrf_drv_radio802154_transmit(&aPacket->mPsdu[-1], aPacket->mChannel, aPacket->mPower))
{
clearPendingEvents();
}
else
{
clearPendingEvents();
setPendingEvent(kPendingEventChannelAccessFailure);
}
return kThreadError_None;
}
RadioPacket *otPlatRadioGetTransmitBuffer(otInstance *aInstance)
{
(void) aInstance;
return &sTransmitFrame;
}
int8_t otPlatRadioGetRssi(otInstance *aInstance)
{
(void) aInstance;
return nrf_drv_radio802154_rssi_last_get();
}
otRadioCaps otPlatRadioGetCaps(otInstance *aInstance)
{
(void) aInstance;
return kRadioCapsEnergyScan;
}
bool otPlatRadioGetPromiscuous(otInstance *aInstance)
{
(void) aInstance;
return nrf_drv_radio802154_promiscuous_get();
}
void otPlatRadioSetPromiscuous(otInstance *aInstance, bool aEnable)
{
(void) aInstance;
nrf_drv_radio802154_promiscuous_set(aEnable);
}
void otPlatRadioEnableSrcMatch(otInstance *aInstance, bool aEnable)
{
(void) aInstance;
nrf_drv_radio802154_auto_pending_bit_set(aEnable);
}
ThreadError otPlatRadioAddSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
{
(void) aInstance;
ThreadError error;
uint8_t shortAddress[SHORT_ADDRESS_SIZE];
convertShortAddress(shortAddress, aShortAddress);
if (nrf_drv_radio802154_pending_bit_for_addr_set(shortAddress, false))
{
error = kThreadError_None;
}
else
{
error = kThreadError_NoBufs;
}
return error;
}
ThreadError otPlatRadioAddSrcMatchExtEntry(otInstance *aInstance, const uint8_t *aExtAddress)
{
(void) aInstance;
ThreadError error;
if (nrf_drv_radio802154_pending_bit_for_addr_set(aExtAddress, true))
{
error = kThreadError_None;
}
else
{
error = kThreadError_NoBufs;
}
return error;
}
ThreadError otPlatRadioClearSrcMatchShortEntry(otInstance *aInstance, const uint16_t aShortAddress)
{
(void) aInstance;
ThreadError error;
uint8_t shortAddress[SHORT_ADDRESS_SIZE];
convertShortAddress(shortAddress, aShortAddress);
if (nrf_drv_radio802154_pending_bit_for_addr_clear(shortAddress, false))
{
error = kThreadError_None;
}
else
{
error = kThreadError_NoAddress;
}
return error;
}
ThreadError otPlatRadioClearSrcMatchExtEntry(otInstance *aInstance, const uint8_t *aExtAddress)
{
(void) aInstance;
ThreadError error;
if (nrf_drv_radio802154_pending_bit_for_addr_clear(aExtAddress, true))
{
error = kThreadError_None;
}
else
{
error = kThreadError_NoAddress;
}
return error;
}
void otPlatRadioClearSrcMatchShortEntries(otInstance *aInstance)
{
(void) aInstance;
nrf_drv_radio802154_pending_bit_for_addr_reset(false);
}
void otPlatRadioClearSrcMatchExtEntries(otInstance *aInstance)
{
(void) aInstance;
nrf_drv_radio802154_pending_bit_for_addr_reset(true);
}
ThreadError otPlatRadioEnergyScan(otInstance *aInstance, uint8_t aScanChannel, uint16_t aScanDuration)
{
(void) aInstance;
sEnergyDetectionTime = (uint32_t) aScanDuration * 1000UL;
sEnergyDetectionChannel = aScanChannel;
if (nrf_drv_radio802154_energy_detection(aScanChannel, sEnergyDetectionTime))
{
clearPendingEvents();
}
else
{
clearPendingEvents();
setPendingEvent(kPendingEventEnergyDetectionStart);
}
return kThreadError_None;
}
void nrf5RadioProcess(otInstance *aInstance)
{
for (uint32_t i = 0; i < RADIO_RX_BUFFERS; i++)
{
if (sReceivedFrames[i].mPsdu != NULL)
{
#if OPENTHREAD_ENABLE_DIAG
if (otPlatDiagModeGet())
{
otPlatDiagRadioReceiveDone(aInstance, &sReceivedFrames[i], kThreadError_None);
}
else
#endif
{
otPlatRadioReceiveDone(aInstance, &sReceivedFrames[i], kThreadError_None);
}
uint8_t *bufferAddress = &sReceivedFrames[i].mPsdu[-1];
sReceivedFrames[i].mPsdu = NULL;
nrf_drv_radio802154_buffer_free(bufferAddress);
}
}
if (isPendingEventSet(kPendingEventFrameTransmitted))
{
#if OPENTHREAD_ENABLE_DIAG
if (otPlatDiagModeGet())
{
otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, sTransmitPendingBit, kThreadError_None);
}
else
#endif
{
otPlatRadioTransmitDone(aInstance, &sTransmitFrame, sTransmitPendingBit, kThreadError_None);
}
resetPendingEvent(kPendingEventFrameTransmitted);
}
if (isPendingEventSet(kPendingEventChannelAccessFailure))
{
#if OPENTHREAD_ENABLE_DIAG
if (otPlatDiagModeGet())
{
otPlatDiagRadioTransmitDone(aInstance, &sTransmitFrame, false, kThreadError_ChannelAccessFailure);
}
else
#endif
{
otPlatRadioTransmitDone(aInstance, &sTransmitFrame, false, kThreadError_ChannelAccessFailure);
}
resetPendingEvent(kPendingEventChannelAccessFailure);
}
if (isPendingEventSet(kPendingEventEnergyDetected))
{
otPlatRadioEnergyScanDone(aInstance, sEnergyDetected);
resetPendingEvent(kPendingEventEnergyDetected);
}
if (isPendingEventSet(kPendingEventSleep))
{
if (nrf_drv_radio802154_sleep())
{
resetPendingEvent(kPendingEventSleep);
}
}
if (isPendingEventSet(kPendingEventEnergyDetectionStart))
{
if (nrf_drv_radio802154_energy_detection(sEnergyDetectionChannel, sEnergyDetectionTime))
{
resetPendingEvent(kPendingEventEnergyDetectionStart);
}
}
}
void nrf_drv_radio802154_received(uint8_t *p_data, int8_t power, int8_t lqi)
{
RadioPacket *receivedFrame = NULL;
for (uint32_t i = 0; i < RADIO_RX_BUFFERS; i++)
{
if (sReceivedFrames[i].mPsdu == NULL)
{
receivedFrame = &sReceivedFrames[i];
break;
}
}
assert(receivedFrame != NULL);
memset(receivedFrame, 0, sizeof(*receivedFrame));
receivedFrame->mPsdu = &p_data[1];
receivedFrame->mLength = p_data[0];
receivedFrame->mPower = power;
receivedFrame->mLqi = lqi;
receivedFrame->mChannel = nrf_drv_radio802154_channel_get();
}
void nrf_drv_radio802154_transmitted(bool pending_bit)
{
sTransmitPendingBit = pending_bit;
setPendingEvent(kPendingEventFrameTransmitted);
}
void nrf_drv_radio802154_busy_channel(void)
{
setPendingEvent(kPendingEventChannelAccessFailure);
}
void nrf_drv_radio802154_energy_detected(int8_t result)
{
sEnergyDetected = result;
setPendingEvent(kPendingEventEnergyDetected);
}
examples/platforms/nrf52840/random.c
+185
View File
@@ -0,0 +1,185 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements a random number generator.
*
*/
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <platform/random.h>
#include <common/code_utils.hpp>
#include "hal/nrf_rng.h"
#include "platform-nrf5.h"
static uint8_t sBuffer[RNG_BUFFER_SIZE];
static volatile uint32_t sReadPosition;
static volatile uint32_t sWritePosition;
static inline uint32_t bufferCount(void)
{
return (sWritePosition - sReadPosition);
}
static inline bool bufferIsEmpty(void)
{
return (bufferCount() == 0);
}
static inline bool bufferIsUint32Ready(void)
{
return (bufferCount() >= 4);
}
static inline bool bufferIsFull(void)
{
return (bufferCount() >= RNG_BUFFER_SIZE);
}
static inline void bufferPut(uint8_t val)
{
if (!bufferIsFull())
{
sBuffer[(sWritePosition++) % RNG_BUFFER_SIZE] = val;
}
}
static inline uint8_t bufferGet()
{
uint8_t retVal = 0;
if (!bufferIsEmpty())
{
retVal = sBuffer[sReadPosition++ % RNG_BUFFER_SIZE];
}
return retVal;
}
static inline uint32_t bufferGetUint32()
{
uint32_t retVal = 0;
if (bufferIsUint32Ready())
{
for (uint32_t i = 0; i < 4; i++)
{
retVal <<= 8;
retVal |= bufferGet();
}
}
return retVal;
}
static void generatorStart(void)
{
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
nrf_rng_int_enable(NRF_RNG_INT_VALRDY_MASK);
nrf_rng_task_trigger(NRF_RNG_TASK_START);
}
static void generatorStop(void)
{
nrf_rng_int_disable(NRF_RNG_INT_VALRDY_MASK);
nrf_rng_task_trigger(NRF_RNG_TASK_STOP);
}
void nrf5RandomInit(void)
{
memset(sBuffer, 0, sizeof(sBuffer));
sReadPosition = 0;
sWritePosition = 0;
NVIC_SetPriority(RNG_IRQn, RNG_IRQ_PRIORITY);
NVIC_ClearPendingIRQ(RNG_IRQn);
NVIC_EnableIRQ(RNG_IRQn);
nrf_rng_error_correction_enable();
nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK);
generatorStart();
// Wait for the first randomized 4 bytes, to randomize software generator seed.
while (!bufferIsUint32Ready()) ;
uint32_t seed = bufferGetUint32();
srand(seed);
}
uint32_t otPlatRandomGet(void)
{
return (uint32_t)rand();
}
ThreadError otPlatRandomSecureGet(uint16_t aInputLength, uint8_t *aOutput, uint16_t *aOutputLength)
{
ThreadError error = kThreadError_None;
VerifyOrExit(aOutput && aOutputLength, error = kThreadError_InvalidArgs);
VerifyOrExit(!bufferIsEmpty(), error = kThreadError_Failed);
uint16_t copyLength = (uint16_t)bufferCount();
if (copyLength > aInputLength)
{
copyLength = aInputLength;
}
for (uint32_t i = 0; i < copyLength; i++)
{
aOutput[i] = bufferGet();
}
*aOutputLength = copyLength;
generatorStart();
exit:
return error;
}
void RNG_IRQHandler(void)
{
if (nrf_rng_event_get(NRF_RNG_EVENT_VALRDY) &&
nrf_rng_int_get(NRF_RNG_INT_VALRDY_MASK))
{
nrf_rng_event_clear(NRF_RNG_EVENT_VALRDY);
bufferPut(nrf_rng_random_value_get());
if (bufferIsFull())
{
generatorStop();
}
}
}
examples/platforms/nrf52840/uart.c
+277
View File
@@ -0,0 +1,277 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for UART communication.
*
*/
#include <stddef.h>
#include <stdint.h>
#include <platform/uart.h>
#include <openthread-types.h>
#include <common/code_utils.hpp>
#include "drivers/nrf_drv_clock.h"
#include "hal/nrf_uart.h"
#include "hal/nrf_gpio.h"
#include "platform-nrf5.h"
/**
* UART TX buffer variables.
*/
static const uint8_t *sTransmitBuffer = NULL;
static uint16_t sTransmitLength = 0;
static bool sTransmitDone = 0;
/**
* UART RX ring buffer variables.
*/
static uint8_t sReceiveBuffer[UART_RX_BUFFER_SIZE];
static uint16_t sReceiveHead = 0;
static uint16_t sReceiveTail = 0;
/**
* Function for checking if RX buffer is full.
*
* @retval true RX buffer is full.
* @retval false RX buffer is not full.
*/
static __INLINE bool isRxBufferFull()
{
uint16_t next = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
return (next == sReceiveTail);
}
/**
* Function for checking if RX buffer is empty.
*
* @retval true RX buffer is empty.
* @retval false RX buffer is not empty.
*/
static __INLINE bool isRxBufferEmpty()
{
return (sReceiveHead == sReceiveTail);
}
/**
* Function for notifying application about new bytes received.
*/
static void processReceive(void)
{
VerifyOrExit(isRxBufferEmpty() == false, ;);
// Set head position to not be changed during read procedure.
uint16_t head = sReceiveHead;
// In case head roll back to the beginning of the buffer, notify about left
// bytes from the end of the buffer.
if (head < sReceiveTail)
{
otPlatUartReceived(&sReceiveBuffer[sReceiveTail],
(UART_RX_BUFFER_SIZE - sReceiveTail));
sReceiveTail = 0;
}
// Notify about received bytes.
if (head > sReceiveTail)
{
otPlatUartReceived(&sReceiveBuffer[sReceiveTail],
(head - sReceiveTail));
sReceiveTail = head;
}
exit:
return;
}
/**
* Function for notifying application about transmission being done.
*/
static void processTransmit(void)
{
VerifyOrExit(sTransmitBuffer != NULL, ;);
if (sTransmitDone)
{
// Clear Transmition transaction and notify application.
sTransmitBuffer = NULL;
sTransmitLength = 0;
sTransmitDone = false;
otPlatUartSendDone();
}
exit:
return;
}
void nrf5UartProcess(void)
{
processReceive();
processTransmit();
}
void nrf5UartInit(void)
{
// Set up TX and RX pins.
nrf_gpio_pin_set(UART_PIN_TX);
nrf_gpio_cfg_output(UART_PIN_TX);
nrf_gpio_cfg_input(UART_PIN_RX, NRF_GPIO_PIN_NOPULL);
nrf_uart_txrx_pins_set(UART_INSTANCE, UART_PIN_TX, UART_PIN_RX);
#if (UART_HWFC == NRF_UART_HWFC_ENABLED)
// Set up CTS and RTS pins.
nrf_gpio_cfg_input(UART_PIN_CTS, NRF_GPIO_PIN_NOPULL);
nrf_gpio_pin_set(UART_PIN_RTS);
nrf_gpio_cfg_output(UART_PIN_RTS);
nrf_uart_hwfc_pins_set(UART_INSTANCE, UART_PIN_RTS, UART_PIN_CTS);
#endif
// Configure baudrate.
nrf_uart_baudrate_set(UART_INSTANCE, UART_BAUDRATE);
// Configure parity and hardware flow control.
nrf_uart_configure(UART_INSTANCE, UART_PARITY, UART_HWFC);
// Clear UART specific events.
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
// Enable interrupts for TX.
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
// Enable interrupts for RX.
nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
// Configure NVIC to handle UART interrupts.
NVIC_SetPriority(UART_IRQN, UART_IRQ_PRIORITY);
NVIC_ClearPendingIRQ(UART_IRQN);
NVIC_EnableIRQ(UART_IRQN);
}
ThreadError otPlatUartEnable(void)
{
// Start HFCLK
nrf_drv_clock_hfclk_request(NULL);
while (!nrf_drv_clock_hfclk_is_running()) {}
// Enable UART instance, and start RX on it.
nrf_uart_enable(UART_INSTANCE);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTRX);
return kThreadError_None;
}
ThreadError otPlatUartDisable(void)
{
// Release HF clock.
nrf_drv_clock_hfclk_release();
// Disable interrupts for TX.
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_TXDRDY);
// Disable interrupts for RX.
nrf_uart_int_disable(UART_INSTANCE, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_ERROR);
// Disable NVIC interrupt.
NVIC_DisableIRQ(UART_IRQN);
// Disable UART instance.
nrf_uart_disable(UART_INSTANCE);
return kThreadError_None;
}
ThreadError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
{
ThreadError error = kThreadError_None;
VerifyOrExit(sTransmitBuffer == NULL, error = kThreadError_Busy);
// Set up transmit buffer and its size without counting first triggered byte.
sTransmitBuffer = aBuf;
sTransmitLength = aBufLength - 1;
// Initiate Transmission process.
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STARTTX);
exit:
return error;
}
/**
* Interrupt handler of UART0 peripherial.
*/
void UARTE0_UART0_IRQHandler(void)
{
// Check if any error has been detected.
if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_ERROR))
{
// Clear error event and ignore erronous byte in RXD register.
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_ERROR);
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
}
else if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_RXDRDY))
{
// Clear RXDRDY event.
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_RXDRDY);
// Read byte from the UART buffer.
uint8_t byte = nrf_uart_rxd_get(UART_INSTANCE);
if (!isRxBufferFull())
{
sReceiveBuffer[sReceiveHead] = byte;
sReceiveHead = (sReceiveHead + 1) % UART_RX_BUFFER_SIZE;
}
}
if (nrf_uart_event_check(UART_INSTANCE, NRF_UART_EVENT_TXDRDY))
{
// Clear TXDRDY event.
nrf_uart_event_clear(UART_INSTANCE, NRF_UART_EVENT_TXDRDY);
// Send any more bytes if available or call application about TX done.
if (sTransmitLength)
{
nrf_uart_txd_set(UART_INSTANCE, *sTransmitBuffer++);
sTransmitLength--;
}
else
{
sTransmitDone = true;
nrf_uart_task_trigger(UART_INSTANCE, NRF_UART_TASK_STOPTX);
}
}
}
third_party/Makefile.am
Vendored
+1
View File
@@ -32,6 +32,7 @@ EXTRA_DIST = \
dialog \
nlbuild-autotools \
openthread-test-driver \
NordicSemiconductor \
$(NULL)
# Always package (e.g. for 'make dist') these subdirectories.
third_party/NordicSemiconductor/README.md
Vendored
+16
View File
@@ -0,0 +1,16 @@
Description:
This folder consists of selected components from the Nordic Semiconductor SDK, that are used
in process of build the OpenThread's nRF52840 platform.
SDK URL: http://developer.nordicsemi.com/nRF5_SDK/nRF5_SDK_v12.x.x/nRF5_SDK_12.2.0_f012efa.zip
Version: 12.2.0
Directory consists of following folders:
/cmsis - Core Peripheral Access Layer Headers files
/device - MDK for the nRF52840 chip
/drivers - Drivers for the nRF52840 that are used in the platform
/hal - Hardware Access Layer for the nRF52840 chip
/segger_rtt - Library for the RTT communication
License:
The source code is distrubuted under BSD license.
third_party/NordicSemiconductor/cmsis/arm_math.h
Vendored
+7165
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/cmsis/cmsis_armcc.h
Vendored
+736
View File
@@ -0,0 +1,736 @@
/**************************************************************************//**
* @file cmsis_armcc.h
* @brief CMSIS Cortex-M Core Function/Instruction Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#ifndef __CMSIS_ARMCC_H
#define __CMSIS_ARMCC_H
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
#error "Please use ARM Compiler Toolchain V4.0.677 or later!"
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/* intrinsic void __enable_irq(); */
/* intrinsic void __disable_irq(); */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return (__regControl);
}
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return (__regIPSR);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return (__regAPSR);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return (__regXPSR);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return (__regProcessStackPointer);
}
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return (__regMainStackPointer);
}
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return (__regPriMask);
}
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return (__regBasePri);
}
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xFFU);
}
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
register uint32_t __regBasePriMax __ASM("basepri_max");
__regBasePriMax = (basePri & 0xFFU);
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return (__regFaultMask);
}
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1);
}
#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
#if (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U)
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__STATIC_INLINE uint32_t __get_FPSCR(void)
{
#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
register uint32_t __regfpscr __ASM("fpscr");
return (__regfpscr);
#else
return (0U);
#endif
}
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
{
#if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#endif
}
#endif /* (__CORTEX_M == 0x04U) || (__CORTEX_M == 0x07U) */
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in integer value.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in two unsigned short values.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
#endif
/**
\brief Reverse byte order in signed short value
\details Reverses the byte order in a signed short value with sign extension to integer.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
{
revsh r0, r0
bx lr
}
#endif
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] value Value to rotate
\param [in] value Number of Bits to rotate
\return Rotated value
*/
#define __ROR __ror
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __breakpoint(value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
#define __RBIT __rbit
#else
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
int32_t s = 4 /*sizeof(v)*/ * 8 - 1; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
for (value >>= 1U; value; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
return (result);
}
#endif
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#if (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U)
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
#else
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
#else
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
#else
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXB(value, ptr) __strex(value, ptr)
#else
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXH(value, ptr) __strex(value, ptr)
#else
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXW(value, ptr) __strex(value, ptr)
#else
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
{
rrx r0, r0
bx lr
}
#endif
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRBT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRHT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRT(value, ptr) __strt(value, ptr)
#endif /* (__CORTEX_M >= 0x03U) || (__CORTEX_SC >= 300U) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if (__CORTEX_M >= 0x04U) /* only for Cortex-M4 and above */
#define __SADD8 __sadd8
#define __QADD8 __qadd8
#define __SHADD8 __shadd8
#define __UADD8 __uadd8
#define __UQADD8 __uqadd8
#define __UHADD8 __uhadd8
#define __SSUB8 __ssub8
#define __QSUB8 __qsub8
#define __SHSUB8 __shsub8
#define __USUB8 __usub8
#define __UQSUB8 __uqsub8
#define __UHSUB8 __uhsub8
#define __SADD16 __sadd16
#define __QADD16 __qadd16
#define __SHADD16 __shadd16
#define __UADD16 __uadd16
#define __UQADD16 __uqadd16
#define __UHADD16 __uhadd16
#define __SSUB16 __ssub16
#define __QSUB16 __qsub16
#define __SHSUB16 __shsub16
#define __USUB16 __usub16
#define __UQSUB16 __uqsub16
#define __UHSUB16 __uhsub16
#define __SASX __sasx
#define __QASX __qasx
#define __SHASX __shasx
#define __UASX __uasx
#define __UQASX __uqasx
#define __UHASX __uhasx
#define __SSAX __ssax
#define __QSAX __qsax
#define __SHSAX __shsax
#define __USAX __usax
#define __UQSAX __uqsax
#define __UHSAX __uhsax
#define __USAD8 __usad8
#define __USADA8 __usada8
#define __SSAT16 __ssat16
#define __USAT16 __usat16
#define __UXTB16 __uxtb16
#define __UXTAB16 __uxtab16
#define __SXTB16 __sxtb16
#define __SXTAB16 __sxtab16
#define __SMUAD __smuad
#define __SMUADX __smuadx
#define __SMLAD __smlad
#define __SMLADX __smladx
#define __SMLALD __smlald
#define __SMLALDX __smlaldx
#define __SMUSD __smusd
#define __SMUSDX __smusdx
#define __SMLSD __smlsd
#define __SMLSDX __smlsdx
#define __SMLSLD __smlsld
#define __SMLSLDX __smlsldx
#define __SEL __sel
#define __QADD __qadd
#define __QSUB __qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
((int64_t)(ARG3) << 32U) ) >> 32U))
#endif /* (__CORTEX_M >= 0x04) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCC_H */
third_party/NordicSemiconductor/cmsis/cmsis_armcc_V6.h
Vendored
+1814
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/cmsis/cmsis_gcc.h
Vendored
+1387
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/cmsis/core_cm4.h
Vendored
+1948
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/cmsis/core_cmFunc.h
Vendored
+87
View File
@@ -0,0 +1,87 @@
/**************************************************************************//**
* @file core_cmFunc.h
* @brief CMSIS Cortex-M Core Function Access Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMFUNC_H
#define __CORE_CMFUNC_H
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CORE_CMFUNC_H */
third_party/NordicSemiconductor/cmsis/core_cmInstr.h
Vendored
+87
View File
@@ -0,0 +1,87 @@
/**************************************************************************//**
* @file core_cmInstr.h
* @brief CMSIS Cortex-M Core Instruction Access Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMINSTR_H
#define __CORE_CMINSTR_H
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
#endif /* __CORE_CMINSTR_H */
third_party/NordicSemiconductor/cmsis/core_cmSimd.h
Vendored
+96
View File
@@ -0,0 +1,96 @@
/**************************************************************************//**
* @file core_cmSimd.h
* @brief CMSIS Cortex-M SIMD Header File
* @version V4.30
* @date 20. October 2015
******************************************************************************/
/* Copyright (c) 2009 - 2015 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CORE_CMSIMD_H
#define __CORE_CMSIMD_H
#ifdef __cplusplus
extern "C" {
#endif
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
/*------------------ RealView Compiler -----------------*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*------------------ ARM Compiler V6 -------------------*/
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#include "cmsis_armcc_V6.h"
/*------------------ GNU Compiler ----------------------*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*------------------ ICC Compiler ----------------------*/
#elif defined ( __ICCARM__ )
#include <cmsis_iar.h>
/*------------------ TI CCS Compiler -------------------*/
#elif defined ( __TMS470__ )
#include <cmsis_ccs.h>
/*------------------ TASKING Compiler ------------------*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
/*------------------ COSMIC Compiler -------------------*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#endif
/*@} end of group CMSIS_SIMD_intrinsics */
#ifdef __cplusplus
}
#endif
#endif /* __CORE_CMSIMD_H */
third_party/NordicSemiconductor/device/compiler_abstraction.h
Vendored
+144
View File
@@ -0,0 +1,144 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _COMPILER_ABSTRACTION_H
#define _COMPILER_ABSTRACTION_H
/*lint ++flb "Enter library region" */
#if defined ( __CC_ARM )
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __ALIGN
#define __ALIGN(n) __align(n)
#endif
#ifndef __PACKED
#define __PACKED __packed
#endif
#define GET_SP() __current_sp()
#elif defined ( __ICCARM__ )
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __ALIGN
#define STRING_PRAGMA(x) _Pragma(#x)
#define __ALIGN(n) STRING_PRAGMA(data_alignment = n)
#endif
#ifndef __PACKED
#define __PACKED __packed
#endif
#define GET_SP() __get_SP()
#elif defined ( __GNUC__ )
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __ALIGN
#define __ALIGN(n) __attribute__((aligned(n)))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#define GET_SP() gcc_current_sp()
static inline unsigned int gcc_current_sp(void)
{
register unsigned sp __ASM("sp");
return sp;
}
#elif defined ( __TASKING__ )
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __ALIGN
#define __ALIGN(n) __align(n)
#endif
/* Not defined for TASKING. */
#ifndef __PACKED
#define __PACKED
#endif
#define GET_SP() __get_MSP()
#endif
/*lint --flb "Leave library region" */
#endif
third_party/NordicSemiconductor/device/gcc_startup_nrf52840.S
Vendored
+538
View File
@@ -0,0 +1,538 @@
/* Copyright (c) 2013 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified
.arch armv7e-m
#ifdef __STARTUP_CONFIG
#include "startup_config.h"
#endif
.section .stack
.align 3
#if defined(__STARTUP_CONFIG)
.equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
#elif defined(__STACK_SIZE)
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 8192
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#if defined(__STARTUP_CONFIG)
.equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
#elif defined(__HEAP_SIZE)
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 8192
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long SVC_Handler
.long DebugMon_Handler
.long 0 /*Reserved */
.long PendSV_Handler
.long SysTick_Handler
/* External Interrupts */
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.long NFCT_IRQHandler
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_LPCOMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_EGU2_IRQHandler
.long SWI3_EGU3_IRQHandler
.long SWI4_EGU4_IRQHandler
.long SWI5_EGU5_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long PWM0_IRQHandler
.long PDM_IRQHandler
.long 0 /*Reserved */
.long 0 /*Reserved */
.long MWU_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long SPIM2_SPIS2_SPI2_IRQHandler
.long RTC2_IRQHandler
.long I2S_IRQHandler
.long FPU_IRQHandler
.long USBD_IRQHandler
.long UARTE1_IRQHandler
.long QSPI_IRQHandler
.long CRYPTOCELL_IRQHandler
.long SPIM3_IRQHandler
.long 0 /*Reserved */
.long PWM3_IRQHandler
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.size __isr_vector, . - __isr_vector
/* Reset Handler */
.text
.thumb
.thumb_func
.align 1
.globl Reset_Handler
.type Reset_Handler, % function
Reset_Handler:
/* Loop to copy data from read only memory to RAM.
* The ranges of copy from/to are specified by following symbols:
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to.
* __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
* the user can add their own initialized data section before BSS section with the INTERT AFTER command.
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, = __etext
ldr r2, = __data_start__
ldr r3, = __bss_start__
subs r3, r2
ble .L_loop1_done
.L_loop1:
subs r3, #4
ldr r0, [r1, r3]
str r0, [r2, r3]
bgt .L_loop1
.L_loop1_done:
/* This part of work usually is done in C library startup code. Otherwise,
* define __STARTUP_CLEAR_BSS to enable it in this startup. This section
* clears the RAM where BSS data is located.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* All addresses must be aligned to 4 bytes boundary.
*/
#ifdef __STARTUP_CLEAR_BSS
ldr r1, = __bss_start__
ldr r2, = __bss_end__
movs r0, 0
subs r2, r1
ble .L_loop3_done
.L_loop3:
subs r2, #4
str r0, [r1, r2]
bgt .L_loop3
.L_loop3_done:
#endif /* __STARTUP_CLEAR_BSS */
/* Execute SystemInit function. */
bl SystemInit
/* Call _start function provided by libraries.
* If those libraries are not accessible, define __START as your entry point.
*/
#ifndef __START
#define __START _start
#endif
bl __START
.pool
.size Reset_Handler, . - Reset_Handler
.section ".text"
/* Dummy Exception Handlers (infinite loops which can be modified) */
.weak NMI_Handler
.type NMI_Handler, % function
NMI_Handler:
b .
.size NMI_Handler, . - NMI_Handler
.weak HardFault_Handler
.type HardFault_Handler, % function
HardFault_Handler:
b .
.size HardFault_Handler, . - HardFault_Handler
.weak MemoryManagement_Handler
.type MemoryManagement_Handler, % function
MemoryManagement_Handler:
b .
.size MemoryManagement_Handler, . - MemoryManagement_Handler
.weak BusFault_Handler
.type BusFault_Handler, % function
BusFault_Handler:
b .
.size BusFault_Handler, . - BusFault_Handler
.weak UsageFault_Handler
.type UsageFault_Handler, % function
UsageFault_Handler:
b .
.size UsageFault_Handler, . - UsageFault_Handler
.weak SVC_Handler
.type SVC_Handler, % function
SVC_Handler:
b .
.size SVC_Handler, . - SVC_Handler
.weak DebugMon_Handler
.type DebugMon_Handler, % function
DebugMon_Handler:
b .
.size DebugMon_Handler, . - DebugMon_Handler
.weak PendSV_Handler
.type PendSV_Handler, % function
PendSV_Handler:
b .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, % function
SysTick_Handler:
b .
.size SysTick_Handler, . - SysTick_Handler
/* IRQ Handlers */
.globl Default_Handler
.type Default_Handler, % function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ POWER_CLOCK_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
IRQ NFCT_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_LPCOMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ SWI2_EGU2_IRQHandler
IRQ SWI3_EGU3_IRQHandler
IRQ SWI4_EGU4_IRQHandler
IRQ SWI5_EGU5_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
IRQ MWU_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM2_IRQHandler
IRQ SPIM2_SPIS2_SPI2_IRQHandler
IRQ RTC2_IRQHandler
IRQ I2S_IRQHandler
IRQ FPU_IRQHandler
IRQ USBD_IRQHandler
IRQ UARTE1_IRQHandler
IRQ QSPI_IRQHandler
IRQ CRYPTOCELL_IRQHandler
IRQ SPIM3_IRQHandler
IRQ PWM3_IRQHandler
.end
third_party/NordicSemiconductor/device/nrf.h
Vendored
+84
View File
@@ -0,0 +1,84 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_H
#define NRF_H
/* MDK version */
#define MDK_MAJOR_VERSION 8
#define MDK_MINOR_VERSION 11
#define MDK_MICRO_VERSION 1
/* Redefine "old" too-generic name NRF52 to NRF52832_XXAA to keep backwards compatibility. */
#if defined (NRF52)
#ifndef NRF52832_XXAA
#define NRF52832_XXAA
#endif
#endif
/* Define NRF52_SERIES for common use in nRF52 series devices. */
#if defined (NRF52832_XXAA) || defined (NRF52840_XXAA)
#define NRF52_SERIES
#endif
#if defined(_WIN32)
/* Do not include nrf specific files when building for PC host */
#elif defined(__unix)
/* Do not include nrf specific files when building for PC host */
#elif defined(__APPLE__)
/* Do not include nrf specific files when building for PC host */
#else
/* Device selection for device includes. */
#if defined (NRF51)
#include "nrf51.h"
#include "nrf51_bitfields.h"
#include "nrf51_deprecated.h"
#elif defined (NRF52840_XXAA)
#include "nrf52840.h"
#include "nrf52840_bitfields.h"
#include "nrf51_to_nrf52840.h"
#include "nrf52_to_nrf52840.h"
#elif defined (NRF52832_XXAA)
#include "nrf52.h"
#include "nrf52_bitfields.h"
#include "nrf51_to_nrf52.h"
#include "nrf52_name_change.h"
#else
#error "Device must be defined. See nrf.h."
#endif /* NRF51, NRF52832_XXAA, NRF52840_XXAA */
#include "compiler_abstraction.h"
#endif /* _WIN32 || __unix || __APPLE__ */
#endif /* NRF_H */
third_party/NordicSemiconductor/device/nrf51_to_nrf52.h
Vendored
+952
View File
@@ -0,0 +1,952 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF51_TO_NRF52_H
#define NRF51_TO_NRF52_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices.
* It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
* functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
* from the nrf51_deprecated.h file. */
/* IRQ */
/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
#define UART0_IRQHandler UARTE0_UART0_IRQHandler
#define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
#define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
#define ADC_IRQHandler SAADC_IRQHandler
#define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler
#define SWI0_IRQHandler SWI0_EGU0_IRQHandler
#define SWI1_IRQHandler SWI1_EGU1_IRQHandler
#define SWI2_IRQHandler SWI2_EGU2_IRQHandler
#define SWI3_IRQHandler SWI3_EGU3_IRQHandler
#define SWI4_IRQHandler SWI4_EGU4_IRQHandler
#define SWI5_IRQHandler SWI5_EGU5_IRQHandler
#define UART0_IRQn UARTE0_UART0_IRQn
#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
#define ADC_IRQn SAADC_IRQn
#define LPCOMP_IRQn COMP_LPCOMP_IRQn
#define SWI0_IRQn SWI0_EGU0_IRQn
#define SWI1_IRQn SWI1_EGU1_IRQn
#define SWI2_IRQn SWI2_EGU2_IRQn
#define SWI3_IRQn SWI3_EGU3_IRQn
#define SWI4_IRQn SWI4_EGU4_IRQn
#define SWI5_IRQn SWI5_EGU5_IRQn
/* UICR */
/* Register RBPCONF was renamed to APPROTECT. */
#define RBPCONF APPROTECT
#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos
#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk
#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled
#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled
/* GPIO */
/* GPIO port was renamed to P0. */
#define NRF_GPIO NRF_P0
#define NRF_GPIO_BASE NRF_P0_BASE
/* QDEC */
/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
#define PSELLED PSEL.LED
#define PSELA PSEL.A
#define PSELB PSEL.B
/* SPIS */
/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
#define PSELSCK PSEL.SCK
#define PSELMISO PSEL.MISO
#define PSELMOSI PSEL.MOSI
#define PSELCSN PSEL.CSN
/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
#define RXDPTR RXD.PTR
#define MAXRX RXD.MAXCNT
#define AMOUNTRX RXD.AMOUNT
#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos
#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk
#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos
#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk
/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
#define TXDPTR TXD.PTR
#define MAXTX TXD.MAXCNT
#define AMOUNTTX TXD.AMOUNT
#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos
#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk
#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos
#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk
/* MPU */
/* Part of MPU module was renamed BPROT, while the rest was eliminated. */
#define NRF_MPU NRF_BPROT
/* Register DISABLEINDEBUG macros were affected. */
#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Pos
#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Msk BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Msk
#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Enabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Enabled
#define MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled BPROT_DISABLEINDEBUG_DISABLEINDEBUG_Disabled
/* Registers PROTENSET0 and PROTENSET1 were affected and renamed as CONFIG0 and CONFIG1. */
#define PROTENSET0 CONFIG0
#define PROTENSET1 CONFIG1
#define MPU_PROTENSET1_PROTREG63_Pos BPROT_CONFIG1_REGION63_Pos
#define MPU_PROTENSET1_PROTREG63_Msk BPROT_CONFIG1_REGION63_Msk
#define MPU_PROTENSET1_PROTREG63_Disabled BPROT_CONFIG1_REGION63_Disabled
#define MPU_PROTENSET1_PROTREG63_Enabled BPROT_CONFIG1_REGION63_Enabled
#define MPU_PROTENSET1_PROTREG63_Set BPROT_CONFIG1_REGION63_Enabled
#define MPU_PROTENSET1_PROTREG62_Pos BPROT_CONFIG1_REGION62_Pos
#define MPU_PROTENSET1_PROTREG62_Msk BPROT_CONFIG1_REGION62_Msk
#define MPU_PROTENSET1_PROTREG62_Disabled BPROT_CONFIG1_REGION62_Disabled
#define MPU_PROTENSET1_PROTREG62_Enabled BPROT_CONFIG1_REGION62_Enabled
#define MPU_PROTENSET1_PROTREG62_Set BPROT_CONFIG1_REGION62_Enabled
#define MPU_PROTENSET1_PROTREG61_Pos BPROT_CONFIG1_REGION61_Pos
#define MPU_PROTENSET1_PROTREG61_Msk BPROT_CONFIG1_REGION61_Msk
#define MPU_PROTENSET1_PROTREG61_Disabled BPROT_CONFIG1_REGION61_Disabled
#define MPU_PROTENSET1_PROTREG61_Enabled BPROT_CONFIG1_REGION61_Enabled
#define MPU_PROTENSET1_PROTREG61_Set BPROT_CONFIG1_REGION61_Enabled
#define MPU_PROTENSET1_PROTREG60_Pos BPROT_CONFIG1_REGION60_Pos
#define MPU_PROTENSET1_PROTREG60_Msk BPROT_CONFIG1_REGION60_Msk
#define MPU_PROTENSET1_PROTREG60_Disabled BPROT_CONFIG1_REGION60_Disabled
#define MPU_PROTENSET1_PROTREG60_Enabled BPROT_CONFIG1_REGION60_Enabled
#define MPU_PROTENSET1_PROTREG60_Set BPROT_CONFIG1_REGION60_Enabled
#define MPU_PROTENSET1_PROTREG59_Pos BPROT_CONFIG1_REGION59_Pos
#define MPU_PROTENSET1_PROTREG59_Msk BPROT_CONFIG1_REGION59_Msk
#define MPU_PROTENSET1_PROTREG59_Disabled BPROT_CONFIG1_REGION59_Disabled
#define MPU_PROTENSET1_PROTREG59_Enabled BPROT_CONFIG1_REGION59_Enabled
#define MPU_PROTENSET1_PROTREG59_Set BPROT_CONFIG1_REGION59_Enabled
#define MPU_PROTENSET1_PROTREG58_Pos BPROT_CONFIG1_REGION58_Pos
#define MPU_PROTENSET1_PROTREG58_Msk BPROT_CONFIG1_REGION58_Msk
#define MPU_PROTENSET1_PROTREG58_Disabled BPROT_CONFIG1_REGION58_Disabled
#define MPU_PROTENSET1_PROTREG58_Enabled BPROT_CONFIG1_REGION58_Enabled
#define MPU_PROTENSET1_PROTREG58_Set BPROT_CONFIG1_REGION58_Enabled
#define MPU_PROTENSET1_PROTREG57_Pos BPROT_CONFIG1_REGION57_Pos
#define MPU_PROTENSET1_PROTREG57_Msk BPROT_CONFIG1_REGION57_Msk
#define MPU_PROTENSET1_PROTREG57_Disabled BPROT_CONFIG1_REGION57_Disabled
#define MPU_PROTENSET1_PROTREG57_Enabled BPROT_CONFIG1_REGION57_Enabled
#define MPU_PROTENSET1_PROTREG57_Set BPROT_CONFIG1_REGION57_Enabled
#define MPU_PROTENSET1_PROTREG56_Pos BPROT_CONFIG1_REGION56_Pos
#define MPU_PROTENSET1_PROTREG56_Msk BPROT_CONFIG1_REGION56_Msk
#define MPU_PROTENSET1_PROTREG56_Disabled BPROT_CONFIG1_REGION56_Disabled
#define MPU_PROTENSET1_PROTREG56_Enabled BPROT_CONFIG1_REGION56_Enabled
#define MPU_PROTENSET1_PROTREG56_Set BPROT_CONFIG1_REGION56_Enabled
#define MPU_PROTENSET1_PROTREG55_Pos BPROT_CONFIG1_REGION55_Pos
#define MPU_PROTENSET1_PROTREG55_Msk BPROT_CONFIG1_REGION55_Msk
#define MPU_PROTENSET1_PROTREG55_Disabled BPROT_CONFIG1_REGION55_Disabled
#define MPU_PROTENSET1_PROTREG55_Enabled BPROT_CONFIG1_REGION55_Enabled
#define MPU_PROTENSET1_PROTREG55_Set BPROT_CONFIG1_REGION55_Enabled
#define MPU_PROTENSET1_PROTREG54_Pos BPROT_CONFIG1_REGION54_Pos
#define MPU_PROTENSET1_PROTREG54_Msk BPROT_CONFIG1_REGION54_Msk
#define MPU_PROTENSET1_PROTREG54_Disabled BPROT_CONFIG1_REGION54_Disabled
#define MPU_PROTENSET1_PROTREG54_Enabled BPROT_CONFIG1_REGION54_Enabled
#define MPU_PROTENSET1_PROTREG54_Set BPROT_CONFIG1_REGION54_Enabled
#define MPU_PROTENSET1_PROTREG53_Pos BPROT_CONFIG1_REGION53_Pos
#define MPU_PROTENSET1_PROTREG53_Msk BPROT_CONFIG1_REGION53_Msk
#define MPU_PROTENSET1_PROTREG53_Disabled BPROT_CONFIG1_REGION53_Disabled
#define MPU_PROTENSET1_PROTREG53_Enabled BPROT_CONFIG1_REGION53_Enabled
#define MPU_PROTENSET1_PROTREG53_Set BPROT_CONFIG1_REGION53_Enabled
#define MPU_PROTENSET1_PROTREG52_Pos BPROT_CONFIG1_REGION52_Pos
#define MPU_PROTENSET1_PROTREG52_Msk BPROT_CONFIG1_REGION52_Msk
#define MPU_PROTENSET1_PROTREG52_Disabled BPROT_CONFIG1_REGION52_Disabled
#define MPU_PROTENSET1_PROTREG52_Enabled BPROT_CONFIG1_REGION52_Enabled
#define MPU_PROTENSET1_PROTREG52_Set BPROT_CONFIG1_REGION52_Enabled
#define MPU_PROTENSET1_PROTREG51_Pos BPROT_CONFIG1_REGION51_Pos
#define MPU_PROTENSET1_PROTREG51_Msk BPROT_CONFIG1_REGION51_Msk
#define MPU_PROTENSET1_PROTREG51_Disabled BPROT_CONFIG1_REGION51_Disabled
#define MPU_PROTENSET1_PROTREG51_Enabled BPROT_CONFIG1_REGION51_Enabled
#define MPU_PROTENSET1_PROTREG51_Set BPROT_CONFIG1_REGION51_Enabled
#define MPU_PROTENSET1_PROTREG50_Pos BPROT_CONFIG1_REGION50_Pos
#define MPU_PROTENSET1_PROTREG50_Msk BPROT_CONFIG1_REGION50_Msk
#define MPU_PROTENSET1_PROTREG50_Disabled BPROT_CONFIG1_REGION50_Disabled
#define MPU_PROTENSET1_PROTREG50_Enabled BPROT_CONFIG1_REGION50_Enabled
#define MPU_PROTENSET1_PROTREG50_Set BPROT_CONFIG1_REGION50_Enabled
#define MPU_PROTENSET1_PROTREG49_Pos BPROT_CONFIG1_REGION49_Pos
#define MPU_PROTENSET1_PROTREG49_Msk BPROT_CONFIG1_REGION49_Msk
#define MPU_PROTENSET1_PROTREG49_Disabled BPROT_CONFIG1_REGION49_Disabled
#define MPU_PROTENSET1_PROTREG49_Enabled BPROT_CONFIG1_REGION49_Enabled
#define MPU_PROTENSET1_PROTREG49_Set BPROT_CONFIG1_REGION49_Enabled
#define MPU_PROTENSET1_PROTREG48_Pos BPROT_CONFIG1_REGION48_Pos
#define MPU_PROTENSET1_PROTREG48_Msk BPROT_CONFIG1_REGION48_Msk
#define MPU_PROTENSET1_PROTREG48_Disabled BPROT_CONFIG1_REGION48_Disabled
#define MPU_PROTENSET1_PROTREG48_Enabled BPROT_CONFIG1_REGION48_Enabled
#define MPU_PROTENSET1_PROTREG48_Set BPROT_CONFIG1_REGION48_Enabled
#define MPU_PROTENSET1_PROTREG47_Pos BPROT_CONFIG1_REGION47_Pos
#define MPU_PROTENSET1_PROTREG47_Msk BPROT_CONFIG1_REGION47_Msk
#define MPU_PROTENSET1_PROTREG47_Disabled BPROT_CONFIG1_REGION47_Disabled
#define MPU_PROTENSET1_PROTREG47_Enabled BPROT_CONFIG1_REGION47_Enabled
#define MPU_PROTENSET1_PROTREG47_Set BPROT_CONFIG1_REGION47_Enabled
#define MPU_PROTENSET1_PROTREG46_Pos BPROT_CONFIG1_REGION46_Pos
#define MPU_PROTENSET1_PROTREG46_Msk BPROT_CONFIG1_REGION46_Msk
#define MPU_PROTENSET1_PROTREG46_Disabled BPROT_CONFIG1_REGION46_Disabled
#define MPU_PROTENSET1_PROTREG46_Enabled BPROT_CONFIG1_REGION46_Enabled
#define MPU_PROTENSET1_PROTREG46_Set BPROT_CONFIG1_REGION46_Enabled
#define MPU_PROTENSET1_PROTREG45_Pos BPROT_CONFIG1_REGION45_Pos
#define MPU_PROTENSET1_PROTREG45_Msk BPROT_CONFIG1_REGION45_Msk
#define MPU_PROTENSET1_PROTREG45_Disabled BPROT_CONFIG1_REGION45_Disabled
#define MPU_PROTENSET1_PROTREG45_Enabled BPROT_CONFIG1_REGION45_Enabled
#define MPU_PROTENSET1_PROTREG45_Set BPROT_CONFIG1_REGION45_Enabled
#define MPU_PROTENSET1_PROTREG44_Pos BPROT_CONFIG1_REGION44_Pos
#define MPU_PROTENSET1_PROTREG44_Msk BPROT_CONFIG1_REGION44_Msk
#define MPU_PROTENSET1_PROTREG44_Disabled BPROT_CONFIG1_REGION44_Disabled
#define MPU_PROTENSET1_PROTREG44_Enabled BPROT_CONFIG1_REGION44_Enabled
#define MPU_PROTENSET1_PROTREG44_Set BPROT_CONFIG1_REGION44_Enabled
#define MPU_PROTENSET1_PROTREG43_Pos BPROT_CONFIG1_REGION43_Pos
#define MPU_PROTENSET1_PROTREG43_Msk BPROT_CONFIG1_REGION43_Msk
#define MPU_PROTENSET1_PROTREG43_Disabled BPROT_CONFIG1_REGION43_Disabled
#define MPU_PROTENSET1_PROTREG43_Enabled BPROT_CONFIG1_REGION43_Enabled
#define MPU_PROTENSET1_PROTREG43_Set BPROT_CONFIG1_REGION43_Enabled
#define MPU_PROTENSET1_PROTREG42_Pos BPROT_CONFIG1_REGION42_Pos
#define MPU_PROTENSET1_PROTREG42_Msk BPROT_CONFIG1_REGION42_Msk
#define MPU_PROTENSET1_PROTREG42_Disabled BPROT_CONFIG1_REGION42_Disabled
#define MPU_PROTENSET1_PROTREG42_Enabled BPROT_CONFIG1_REGION42_Enabled
#define MPU_PROTENSET1_PROTREG42_Set BPROT_CONFIG1_REGION42_Enabled
#define MPU_PROTENSET1_PROTREG41_Pos BPROT_CONFIG1_REGION41_Pos
#define MPU_PROTENSET1_PROTREG41_Msk BPROT_CONFIG1_REGION41_Msk
#define MPU_PROTENSET1_PROTREG41_Disabled BPROT_CONFIG1_REGION41_Disabled
#define MPU_PROTENSET1_PROTREG41_Enabled BPROT_CONFIG1_REGION41_Enabled
#define MPU_PROTENSET1_PROTREG41_Set BPROT_CONFIG1_REGION41_Enabled
#define MPU_PROTENSET1_PROTREG40_Pos BPROT_CONFIG1_REGION40_Pos
#define MPU_PROTENSET1_PROTREG40_Msk BPROT_CONFIG1_REGION40_Msk
#define MPU_PROTENSET1_PROTREG40_Disabled BPROT_CONFIG1_REGION40_Disabled
#define MPU_PROTENSET1_PROTREG40_Enabled BPROT_CONFIG1_REGION40_Enabled
#define MPU_PROTENSET1_PROTREG40_Set BPROT_CONFIG1_REGION40_Enabled
#define MPU_PROTENSET1_PROTREG39_Pos BPROT_CONFIG1_REGION39_Pos
#define MPU_PROTENSET1_PROTREG39_Msk BPROT_CONFIG1_REGION39_Msk
#define MPU_PROTENSET1_PROTREG39_Disabled BPROT_CONFIG1_REGION39_Disabled
#define MPU_PROTENSET1_PROTREG39_Enabled BPROT_CONFIG1_REGION39_Enabled
#define MPU_PROTENSET1_PROTREG39_Set BPROT_CONFIG1_REGION39_Enabled
#define MPU_PROTENSET1_PROTREG38_Pos BPROT_CONFIG1_REGION38_Pos
#define MPU_PROTENSET1_PROTREG38_Msk BPROT_CONFIG1_REGION38_Msk
#define MPU_PROTENSET1_PROTREG38_Disabled BPROT_CONFIG1_REGION38_Disabled
#define MPU_PROTENSET1_PROTREG38_Enabled BPROT_CONFIG1_REGION38_Enabled
#define MPU_PROTENSET1_PROTREG38_Set BPROT_CONFIG1_REGION38_Enabled
#define MPU_PROTENSET1_PROTREG37_Pos BPROT_CONFIG1_REGION37_Pos
#define MPU_PROTENSET1_PROTREG37_Msk BPROT_CONFIG1_REGION37_Msk
#define MPU_PROTENSET1_PROTREG37_Disabled BPROT_CONFIG1_REGION37_Disabled
#define MPU_PROTENSET1_PROTREG37_Enabled BPROT_CONFIG1_REGION37_Enabled
#define MPU_PROTENSET1_PROTREG37_Set BPROT_CONFIG1_REGION37_Enabled
#define MPU_PROTENSET1_PROTREG36_Pos BPROT_CONFIG1_REGION36_Pos
#define MPU_PROTENSET1_PROTREG36_Msk BPROT_CONFIG1_REGION36_Msk
#define MPU_PROTENSET1_PROTREG36_Disabled BPROT_CONFIG1_REGION36_Disabled
#define MPU_PROTENSET1_PROTREG36_Enabled BPROT_CONFIG1_REGION36_Enabled
#define MPU_PROTENSET1_PROTREG36_Set BPROT_CONFIG1_REGION36_Enabled
#define MPU_PROTENSET1_PROTREG35_Pos BPROT_CONFIG1_REGION35_Pos
#define MPU_PROTENSET1_PROTREG35_Msk BPROT_CONFIG1_REGION35_Msk
#define MPU_PROTENSET1_PROTREG35_Disabled BPROT_CONFIG1_REGION35_Disabled
#define MPU_PROTENSET1_PROTREG35_Enabled BPROT_CONFIG1_REGION35_Enabled
#define MPU_PROTENSET1_PROTREG35_Set BPROT_CONFIG1_REGION35_Enabled
#define MPU_PROTENSET1_PROTREG34_Pos BPROT_CONFIG1_REGION34_Pos
#define MPU_PROTENSET1_PROTREG34_Msk BPROT_CONFIG1_REGION34_Msk
#define MPU_PROTENSET1_PROTREG34_Disabled BPROT_CONFIG1_REGION34_Disabled
#define MPU_PROTENSET1_PROTREG34_Enabled BPROT_CONFIG1_REGION34_Enabled
#define MPU_PROTENSET1_PROTREG34_Set BPROT_CONFIG1_REGION34_Enabled
#define MPU_PROTENSET1_PROTREG33_Pos BPROT_CONFIG1_REGION33_Pos
#define MPU_PROTENSET1_PROTREG33_Msk BPROT_CONFIG1_REGION33_Msk
#define MPU_PROTENSET1_PROTREG33_Disabled BPROT_CONFIG1_REGION33_Disabled
#define MPU_PROTENSET1_PROTREG33_Enabled BPROT_CONFIG1_REGION33_Enabled
#define MPU_PROTENSET1_PROTREG33_Set BPROT_CONFIG1_REGION33_Enabled
#define MPU_PROTENSET1_PROTREG32_Pos BPROT_CONFIG1_REGION32_Pos
#define MPU_PROTENSET1_PROTREG32_Msk BPROT_CONFIG1_REGION32_Msk
#define MPU_PROTENSET1_PROTREG32_Disabled BPROT_CONFIG1_REGION32_Disabled
#define MPU_PROTENSET1_PROTREG32_Enabled BPROT_CONFIG1_REGION32_Enabled
#define MPU_PROTENSET1_PROTREG32_Set BPROT_CONFIG1_REGION32_Enabled
#define MPU_PROTENSET0_PROTREG31_Pos BPROT_CONFIG0_REGION31_Pos
#define MPU_PROTENSET0_PROTREG31_Msk BPROT_CONFIG0_REGION31_Msk
#define MPU_PROTENSET0_PROTREG31_Disabled BPROT_CONFIG0_REGION31_Disabled
#define MPU_PROTENSET0_PROTREG31_Enabled BPROT_CONFIG0_REGION31_Enabled
#define MPU_PROTENSET0_PROTREG31_Set BPROT_CONFIG0_REGION31_Enabled
#define MPU_PROTENSET0_PROTREG30_Pos BPROT_CONFIG0_REGION30_Pos
#define MPU_PROTENSET0_PROTREG30_Msk BPROT_CONFIG0_REGION30_Msk
#define MPU_PROTENSET0_PROTREG30_Disabled BPROT_CONFIG0_REGION30_Disabled
#define MPU_PROTENSET0_PROTREG30_Enabled BPROT_CONFIG0_REGION30_Enabled
#define MPU_PROTENSET0_PROTREG30_Set BPROT_CONFIG0_REGION30_Enabled
#define MPU_PROTENSET0_PROTREG29_Pos BPROT_CONFIG0_REGION29_Pos
#define MPU_PROTENSET0_PROTREG29_Msk BPROT_CONFIG0_REGION29_Msk
#define MPU_PROTENSET0_PROTREG29_Disabled BPROT_CONFIG0_REGION29_Disabled
#define MPU_PROTENSET0_PROTREG29_Enabled BPROT_CONFIG0_REGION29_Enabled
#define MPU_PROTENSET0_PROTREG29_Set BPROT_CONFIG0_REGION29_Enabled
#define MPU_PROTENSET0_PROTREG28_Pos BPROT_CONFIG0_REGION28_Pos
#define MPU_PROTENSET0_PROTREG28_Msk BPROT_CONFIG0_REGION28_Msk
#define MPU_PROTENSET0_PROTREG28_Disabled BPROT_CONFIG0_REGION28_Disabled
#define MPU_PROTENSET0_PROTREG28_Enabled BPROT_CONFIG0_REGION28_Enabled
#define MPU_PROTENSET0_PROTREG28_Set BPROT_CONFIG0_REGION28_Enabled
#define MPU_PROTENSET0_PROTREG27_Pos BPROT_CONFIG0_REGION27_Pos
#define MPU_PROTENSET0_PROTREG27_Msk BPROT_CONFIG0_REGION27_Msk
#define MPU_PROTENSET0_PROTREG27_Disabled BPROT_CONFIG0_REGION27_Disabled
#define MPU_PROTENSET0_PROTREG27_Enabled BPROT_CONFIG0_REGION27_Enabled
#define MPU_PROTENSET0_PROTREG27_Set BPROT_CONFIG0_REGION27_Enabled
#define MPU_PROTENSET0_PROTREG26_Pos BPROT_CONFIG0_REGION26_Pos
#define MPU_PROTENSET0_PROTREG26_Msk BPROT_CONFIG0_REGION26_Msk
#define MPU_PROTENSET0_PROTREG26_Disabled BPROT_CONFIG0_REGION26_Disabled
#define MPU_PROTENSET0_PROTREG26_Enabled BPROT_CONFIG0_REGION26_Enabled
#define MPU_PROTENSET0_PROTREG26_Set BPROT_CONFIG0_REGION26_Enabled
#define MPU_PROTENSET0_PROTREG25_Pos BPROT_CONFIG0_REGION25_Pos
#define MPU_PROTENSET0_PROTREG25_Msk BPROT_CONFIG0_REGION25_Msk
#define MPU_PROTENSET0_PROTREG25_Disabled BPROT_CONFIG0_REGION25_Disabled
#define MPU_PROTENSET0_PROTREG25_Enabled BPROT_CONFIG0_REGION25_Enabled
#define MPU_PROTENSET0_PROTREG25_Set BPROT_CONFIG0_REGION25_Enabled
#define MPU_PROTENSET0_PROTREG24_Pos BPROT_CONFIG0_REGION24_Pos
#define MPU_PROTENSET0_PROTREG24_Msk BPROT_CONFIG0_REGION24_Msk
#define MPU_PROTENSET0_PROTREG24_Disabled BPROT_CONFIG0_REGION24_Disabled
#define MPU_PROTENSET0_PROTREG24_Enabled BPROT_CONFIG0_REGION24_Enabled
#define MPU_PROTENSET0_PROTREG24_Set BPROT_CONFIG0_REGION24_Enabled
#define MPU_PROTENSET0_PROTREG23_Pos BPROT_CONFIG0_REGION23_Pos
#define MPU_PROTENSET0_PROTREG23_Msk BPROT_CONFIG0_REGION23_Msk
#define MPU_PROTENSET0_PROTREG23_Disabled BPROT_CONFIG0_REGION23_Disabled
#define MPU_PROTENSET0_PROTREG23_Enabled BPROT_CONFIG0_REGION23_Enabled
#define MPU_PROTENSET0_PROTREG23_Set BPROT_CONFIG0_REGION23_Enabled
#define MPU_PROTENSET0_PROTREG22_Pos BPROT_CONFIG0_REGION22_Pos
#define MPU_PROTENSET0_PROTREG22_Msk BPROT_CONFIG0_REGION22_Msk
#define MPU_PROTENSET0_PROTREG22_Disabled BPROT_CONFIG0_REGION22_Disabled
#define MPU_PROTENSET0_PROTREG22_Enabled BPROT_CONFIG0_REGION22_Enabled
#define MPU_PROTENSET0_PROTREG22_Set BPROT_CONFIG0_REGION22_Enabled
#define MPU_PROTENSET0_PROTREG21_Pos BPROT_CONFIG0_REGION21_Pos
#define MPU_PROTENSET0_PROTREG21_Msk BPROT_CONFIG0_REGION21_Msk
#define MPU_PROTENSET0_PROTREG21_Disabled BPROT_CONFIG0_REGION21_Disabled
#define MPU_PROTENSET0_PROTREG21_Enabled BPROT_CONFIG0_REGION21_Enabled
#define MPU_PROTENSET0_PROTREG21_Set BPROT_CONFIG0_REGION21_Enabled
#define MPU_PROTENSET0_PROTREG20_Pos BPROT_CONFIG0_REGION20_Pos
#define MPU_PROTENSET0_PROTREG20_Msk BPROT_CONFIG0_REGION20_Msk
#define MPU_PROTENSET0_PROTREG20_Disabled BPROT_CONFIG0_REGION20_Disabled
#define MPU_PROTENSET0_PROTREG20_Enabled BPROT_CONFIG0_REGION20_Enabled
#define MPU_PROTENSET0_PROTREG20_Set BPROT_CONFIG0_REGION20_Enabled
#define MPU_PROTENSET0_PROTREG19_Pos BPROT_CONFIG0_REGION19_Pos
#define MPU_PROTENSET0_PROTREG19_Msk BPROT_CONFIG0_REGION19_Msk
#define MPU_PROTENSET0_PROTREG19_Disabled BPROT_CONFIG0_REGION19_Disabled
#define MPU_PROTENSET0_PROTREG19_Enabled BPROT_CONFIG0_REGION19_Enabled
#define MPU_PROTENSET0_PROTREG19_Set BPROT_CONFIG0_REGION19_Enabled
#define MPU_PROTENSET0_PROTREG18_Pos BPROT_CONFIG0_REGION18_Pos
#define MPU_PROTENSET0_PROTREG18_Msk BPROT_CONFIG0_REGION18_Msk
#define MPU_PROTENSET0_PROTREG18_Disabled BPROT_CONFIG0_REGION18_Disabled
#define MPU_PROTENSET0_PROTREG18_Enabled BPROT_CONFIG0_REGION18_Enabled
#define MPU_PROTENSET0_PROTREG18_Set BPROT_CONFIG0_REGION18_Enabled
#define MPU_PROTENSET0_PROTREG17_Pos BPROT_CONFIG0_REGION17_Pos
#define MPU_PROTENSET0_PROTREG17_Msk BPROT_CONFIG0_REGION17_Msk
#define MPU_PROTENSET0_PROTREG17_Disabled BPROT_CONFIG0_REGION17_Disabled
#define MPU_PROTENSET0_PROTREG17_Enabled BPROT_CONFIG0_REGION17_Enabled
#define MPU_PROTENSET0_PROTREG17_Set BPROT_CONFIG0_REGION17_Enabled
#define MPU_PROTENSET0_PROTREG16_Pos BPROT_CONFIG0_REGION16_Pos
#define MPU_PROTENSET0_PROTREG16_Msk BPROT_CONFIG0_REGION16_Msk
#define MPU_PROTENSET0_PROTREG16_Disabled BPROT_CONFIG0_REGION16_Disabled
#define MPU_PROTENSET0_PROTREG16_Enabled BPROT_CONFIG0_REGION16_Enabled
#define MPU_PROTENSET0_PROTREG16_Set BPROT_CONFIG0_REGION16_Enabled
#define MPU_PROTENSET0_PROTREG15_Pos BPROT_CONFIG0_REGION15_Pos
#define MPU_PROTENSET0_PROTREG15_Msk BPROT_CONFIG0_REGION15_Msk
#define MPU_PROTENSET0_PROTREG15_Disabled BPROT_CONFIG0_REGION15_Disabled
#define MPU_PROTENSET0_PROTREG15_Enabled BPROT_CONFIG0_REGION15_Enabled
#define MPU_PROTENSET0_PROTREG15_Set BPROT_CONFIG0_REGION15_Enabled
#define MPU_PROTENSET0_PROTREG14_Pos BPROT_CONFIG0_REGION14_Pos
#define MPU_PROTENSET0_PROTREG14_Msk BPROT_CONFIG0_REGION14_Msk
#define MPU_PROTENSET0_PROTREG14_Disabled BPROT_CONFIG0_REGION14_Disabled
#define MPU_PROTENSET0_PROTREG14_Enabled BPROT_CONFIG0_REGION14_Enabled
#define MPU_PROTENSET0_PROTREG14_Set BPROT_CONFIG0_REGION14_Enabled
#define MPU_PROTENSET0_PROTREG13_Pos BPROT_CONFIG0_REGION13_Pos
#define MPU_PROTENSET0_PROTREG13_Msk BPROT_CONFIG0_REGION13_Msk
#define MPU_PROTENSET0_PROTREG13_Disabled BPROT_CONFIG0_REGION13_Disabled
#define MPU_PROTENSET0_PROTREG13_Enabled BPROT_CONFIG0_REGION13_Enabled
#define MPU_PROTENSET0_PROTREG13_Set BPROT_CONFIG0_REGION13_Enabled
#define MPU_PROTENSET0_PROTREG12_Pos BPROT_CONFIG0_REGION12_Pos
#define MPU_PROTENSET0_PROTREG12_Msk BPROT_CONFIG0_REGION12_Msk
#define MPU_PROTENSET0_PROTREG12_Disabled BPROT_CONFIG0_REGION12_Disabled
#define MPU_PROTENSET0_PROTREG12_Enabled BPROT_CONFIG0_REGION12_Enabled
#define MPU_PROTENSET0_PROTREG12_Set BPROT_CONFIG0_REGION12_Enabled
#define MPU_PROTENSET0_PROTREG11_Pos BPROT_CONFIG0_REGION11_Pos
#define MPU_PROTENSET0_PROTREG11_Msk BPROT_CONFIG0_REGION11_Msk
#define MPU_PROTENSET0_PROTREG11_Disabled BPROT_CONFIG0_REGION11_Disabled
#define MPU_PROTENSET0_PROTREG11_Enabled BPROT_CONFIG0_REGION11_Enabled
#define MPU_PROTENSET0_PROTREG11_Set BPROT_CONFIG0_REGION11_Enabled
#define MPU_PROTENSET0_PROTREG10_Pos BPROT_CONFIG0_REGION10_Pos
#define MPU_PROTENSET0_PROTREG10_Msk BPROT_CONFIG0_REGION10_Msk
#define MPU_PROTENSET0_PROTREG10_Disabled BPROT_CONFIG0_REGION10_Disabled
#define MPU_PROTENSET0_PROTREG10_Enabled BPROT_CONFIG0_REGION10_Enabled
#define MPU_PROTENSET0_PROTREG10_Set BPROT_CONFIG0_REGION10_Enabled
#define MPU_PROTENSET0_PROTREG9_Pos BPROT_CONFIG0_REGION9_Pos
#define MPU_PROTENSET0_PROTREG9_Msk BPROT_CONFIG0_REGION9_Msk
#define MPU_PROTENSET0_PROTREG9_Disabled BPROT_CONFIG0_REGION9_Disabled
#define MPU_PROTENSET0_PROTREG9_Enabled BPROT_CONFIG0_REGION9_Enabled
#define MPU_PROTENSET0_PROTREG9_Set BPROT_CONFIG0_REGION9_Enabled
#define MPU_PROTENSET0_PROTREG8_Pos BPROT_CONFIG0_REGION8_Pos
#define MPU_PROTENSET0_PROTREG8_Msk BPROT_CONFIG0_REGION8_Msk
#define MPU_PROTENSET0_PROTREG8_Disabled BPROT_CONFIG0_REGION8_Disabled
#define MPU_PROTENSET0_PROTREG8_Enabled BPROT_CONFIG0_REGION8_Enabled
#define MPU_PROTENSET0_PROTREG8_Set BPROT_CONFIG0_REGION8_Enabled
#define MPU_PROTENSET0_PROTREG7_Pos BPROT_CONFIG0_REGION7_Pos
#define MPU_PROTENSET0_PROTREG7_Msk BPROT_CONFIG0_REGION7_Msk
#define MPU_PROTENSET0_PROTREG7_Disabled BPROT_CONFIG0_REGION7_Disabled
#define MPU_PROTENSET0_PROTREG7_Enabled BPROT_CONFIG0_REGION7_Enabled
#define MPU_PROTENSET0_PROTREG7_Set BPROT_CONFIG0_REGION7_Enabled
#define MPU_PROTENSET0_PROTREG6_Pos BPROT_CONFIG0_REGION6_Pos
#define MPU_PROTENSET0_PROTREG6_Msk BPROT_CONFIG0_REGION6_Msk
#define MPU_PROTENSET0_PROTREG6_Disabled BPROT_CONFIG0_REGION6_Disabled
#define MPU_PROTENSET0_PROTREG6_Enabled BPROT_CONFIG0_REGION6_Enabled
#define MPU_PROTENSET0_PROTREG6_Set BPROT_CONFIG0_REGION6_Enabled
#define MPU_PROTENSET0_PROTREG5_Pos BPROT_CONFIG0_REGION5_Pos
#define MPU_PROTENSET0_PROTREG5_Msk BPROT_CONFIG0_REGION5_Msk
#define MPU_PROTENSET0_PROTREG5_Disabled BPROT_CONFIG0_REGION5_Disabled
#define MPU_PROTENSET0_PROTREG5_Enabled BPROT_CONFIG0_REGION5_Enabled
#define MPU_PROTENSET0_PROTREG5_Set BPROT_CONFIG0_REGION5_Enabled
#define MPU_PROTENSET0_PROTREG4_Pos BPROT_CONFIG0_REGION4_Pos
#define MPU_PROTENSET0_PROTREG4_Msk BPROT_CONFIG0_REGION4_Msk
#define MPU_PROTENSET0_PROTREG4_Disabled BPROT_CONFIG0_REGION4_Disabled
#define MPU_PROTENSET0_PROTREG4_Enabled BPROT_CONFIG0_REGION4_Enabled
#define MPU_PROTENSET0_PROTREG4_Set BPROT_CONFIG0_REGION4_Enabled
#define MPU_PROTENSET0_PROTREG3_Pos BPROT_CONFIG0_REGION3_Pos
#define MPU_PROTENSET0_PROTREG3_Msk BPROT_CONFIG0_REGION3_Msk
#define MPU_PROTENSET0_PROTREG3_Disabled BPROT_CONFIG0_REGION3_Disabled
#define MPU_PROTENSET0_PROTREG3_Enabled BPROT_CONFIG0_REGION3_Enabled
#define MPU_PROTENSET0_PROTREG3_Set BPROT_CONFIG0_REGION3_Enabled
#define MPU_PROTENSET0_PROTREG2_Pos BPROT_CONFIG0_REGION2_Pos
#define MPU_PROTENSET0_PROTREG2_Msk BPROT_CONFIG0_REGION2_Msk
#define MPU_PROTENSET0_PROTREG2_Disabled BPROT_CONFIG0_REGION2_Disabled
#define MPU_PROTENSET0_PROTREG2_Enabled BPROT_CONFIG0_REGION2_Enabled
#define MPU_PROTENSET0_PROTREG2_Set BPROT_CONFIG0_REGION2_Enabled
#define MPU_PROTENSET0_PROTREG1_Pos BPROT_CONFIG0_REGION1_Pos
#define MPU_PROTENSET0_PROTREG1_Msk BPROT_CONFIG0_REGION1_Msk
#define MPU_PROTENSET0_PROTREG1_Disabled BPROT_CONFIG0_REGION1_Disabled
#define MPU_PROTENSET0_PROTREG1_Enabled BPROT_CONFIG0_REGION1_Enabled
#define MPU_PROTENSET0_PROTREG1_Set BPROT_CONFIG0_REGION1_Enabled
#define MPU_PROTENSET0_PROTREG0_Pos BPROT_CONFIG0_REGION0_Pos
#define MPU_PROTENSET0_PROTREG0_Msk BPROT_CONFIG0_REGION0_Msk
#define MPU_PROTENSET0_PROTREG0_Disabled BPROT_CONFIG0_REGION0_Disabled
#define MPU_PROTENSET0_PROTREG0_Enabled BPROT_CONFIG0_REGION0_Enabled
#define MPU_PROTENSET0_PROTREG0_Set BPROT_CONFIG0_REGION0_Enabled
/* From nrf51_deprecated.h */
/* NVMC */
/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
#define ERASEPROTECTEDPAGE ERASEPCR0
/* IRQ */
/* COMP module was eliminated. Adapted to nrf52 headers. */
#define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler
#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn
/* REFSEL register redefined enumerated values and added some more. */
#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
/* RADIO */
/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
/* FICR */
/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
#define DEVICEID0 DEVICEID[0]
#define DEVICEID1 DEVICEID[1]
/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
#define ER0 ER[0]
#define ER1 ER[1]
#define ER2 ER[2]
#define ER3 ER[3]
/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
#define IR0 IR[0]
#define IR1 IR[1]
#define IR2 IR[2]
#define IR3 IR[3]
/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
#define DEVICEADDR0 DEVICEADDR[0]
#define DEVICEADDR1 DEVICEADDR[1]
/* PPI */
/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
#define TASKS_CHG0EN TASKS_CHG[0].EN
#define TASKS_CHG0DIS TASKS_CHG[0].DIS
#define TASKS_CHG1EN TASKS_CHG[1].EN
#define TASKS_CHG1DIS TASKS_CHG[1].DIS
#define TASKS_CHG2EN TASKS_CHG[2].EN
#define TASKS_CHG2DIS TASKS_CHG[2].DIS
#define TASKS_CHG3EN TASKS_CHG[3].EN
#define TASKS_CHG3DIS TASKS_CHG[3].DIS
/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
#define CH0_EEP CH[0].EEP
#define CH0_TEP CH[0].TEP
#define CH1_EEP CH[1].EEP
#define CH1_TEP CH[1].TEP
#define CH2_EEP CH[2].EEP
#define CH2_TEP CH[2].TEP
#define CH3_EEP CH[3].EEP
#define CH3_TEP CH[3].TEP
#define CH4_EEP CH[4].EEP
#define CH4_TEP CH[4].TEP
#define CH5_EEP CH[5].EEP
#define CH5_TEP CH[5].TEP
#define CH6_EEP CH[6].EEP
#define CH6_TEP CH[6].TEP
#define CH7_EEP CH[7].EEP
#define CH7_TEP CH[7].TEP
#define CH8_EEP CH[8].EEP
#define CH8_TEP CH[8].TEP
#define CH9_EEP CH[9].EEP
#define CH9_TEP CH[9].TEP
#define CH10_EEP CH[10].EEP
#define CH10_TEP CH[10].TEP
#define CH11_EEP CH[11].EEP
#define CH11_TEP CH[11].TEP
#define CH12_EEP CH[12].EEP
#define CH12_TEP CH[12].TEP
#define CH13_EEP CH[13].EEP
#define CH13_TEP CH[13].TEP
#define CH14_EEP CH[14].EEP
#define CH14_TEP CH[14].TEP
#define CH15_EEP CH[15].EEP
#define CH15_TEP CH[15].TEP
/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
#define CHG0 CHG[0]
#define CHG1 CHG[1]
#define CHG2 CHG[2]
#define CHG3 CHG[3]
/* All bitfield macros for the CHGx registers therefore changed name. */
#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
/*lint --flb "Leave library region" */
#endif /* NRF51_TO_NRF52_H */
third_party/NordicSemiconductor/device/nrf51_to_nrf52840.h
Vendored
+567
View File
@@ -0,0 +1,567 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF51_TO_NRF52840_H
#define NRF51_TO_NRF52840_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices.
* It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
* functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
* from the nrf51_deprecated.h file. */
/* IRQ */
/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
#define UART0_IRQHandler UARTE0_UART0_IRQHandler
#define SPI0_TWI0_IRQHandler SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
#define SPI1_TWI1_IRQHandler SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
#define ADC_IRQHandler SAADC_IRQHandler
#define LPCOMP_IRQHandler COMP_LPCOMP_IRQHandler
#define SWI0_IRQHandler SWI0_EGU0_IRQHandler
#define SWI1_IRQHandler SWI1_EGU1_IRQHandler
#define SWI2_IRQHandler SWI2_EGU2_IRQHandler
#define SWI3_IRQHandler SWI3_EGU3_IRQHandler
#define SWI4_IRQHandler SWI4_EGU4_IRQHandler
#define SWI5_IRQHandler SWI5_EGU5_IRQHandler
#define UART0_IRQn UARTE0_UART0_IRQn
#define SPI0_TWI0_IRQn SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
#define SPI1_TWI1_IRQn SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
#define ADC_IRQn SAADC_IRQn
#define LPCOMP_IRQn COMP_LPCOMP_IRQn
#define SWI0_IRQn SWI0_EGU0_IRQn
#define SWI1_IRQn SWI1_EGU1_IRQn
#define SWI2_IRQn SWI2_EGU2_IRQn
#define SWI3_IRQn SWI3_EGU3_IRQn
#define SWI4_IRQn SWI4_EGU4_IRQn
#define SWI5_IRQn SWI5_EGU5_IRQn
/* UICR */
/* Register RBPCONF was renamed to APPROTECT. */
#define RBPCONF APPROTECT
#define UICR_RBPCONF_PALL_Pos UICR_APPROTECT_PALL_Pos
#define UICR_RBPCONF_PALL_Msk UICR_APPROTECT_PALL_Msk
#define UICR_RBPCONF_PALL_Enabled UICR_APPROTECT_PALL_Enabled
#define UICR_RBPCONF_PALL_Disabled UICR_APPROTECT_PALL_Disabled
/* GPIO */
/* GPIO port was renamed to P0. */
#define NRF_GPIO NRF_P0
#define NRF_GPIO_BASE NRF_P0_BASE
/* QDEC */
/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
#define PSELLED PSEL.LED
#define PSELA PSEL.A
#define PSELB PSEL.B
/* SPIS */
/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
#define PSELSCK PSEL.SCK
#define PSELMISO PSEL.MISO
#define PSELMOSI PSEL.MOSI
#define PSELCSN PSEL.CSN
/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
#define RXDPTR RXD.PTR
#define MAXRX RXD.MAXCNT
#define AMOUNTRX RXD.AMOUNT
#define SPIS_MAXRX_MAXRX_Pos SPIS_RXD_MAXCNT_MAXCNT_Pos
#define SPIS_MAXRX_MAXRX_Msk SPIS_RXD_MAXCNT_MAXCNT_Msk
#define SPIS_AMOUNTRX_AMOUNTRX_Pos SPIS_RXD_AMOUNT_AMOUNT_Pos
#define SPIS_AMOUNTRX_AMOUNTRX_Msk SPIS_RXD_AMOUNT_AMOUNT_Msk
/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
#define TXDPTR TXD.PTR
#define MAXTX TXD.MAXCNT
#define AMOUNTTX TXD.AMOUNT
#define SPIS_MAXTX_MAXTX_Pos SPIS_TXD_MAXCNT_MAXCNT_Pos
#define SPIS_MAXTX_MAXTX_Msk SPIS_TXD_MAXCNT_MAXCNT_Msk
#define SPIS_AMOUNTTX_AMOUNTTX_Pos SPIS_TXD_AMOUNT_AMOUNT_Pos
#define SPIS_AMOUNTTX_AMOUNTTX_Msk SPIS_TXD_AMOUNT_AMOUNT_Msk
/* UART */
/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
#define PSELRTS PSEL.RTS
#define PSELTXD PSEL.TXD
#define PSELCTS PSEL.CTS
#define PSELRXD PSEL.RXD
/* TWI */
/* The registers PSELSCL, PSELSDA were restructured into a struct. */
#define PSELSCL PSEL.SCL
#define PSELSDA PSEL.SDA
/* From nrf51_deprecated.h */
/* NVMC */
/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
#define ERASEPROTECTEDPAGE ERASEPCR0
/* IRQ */
/* COMP module was eliminated. Adapted to nrf52840 headers. */
#define LPCOMP_COMP_IRQHandler COMP_LPCOMP_IRQHandler
#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn
/* REFSEL register redefined enumerated values and added some more. */
#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
/* RADIO */
/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos
#define RADIO_CRCCNF_SKIP_ADDR_Msk RADIO_CRCCNF_SKIPADDR_Msk
#define RADIO_CRCCNF_SKIP_ADDR_Include RADIO_CRCCNF_SKIPADDR_Include
#define RADIO_CRCCNF_SKIP_ADDR_Skip RADIO_CRCCNF_SKIPADDR_Skip
/* FICR */
/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
#define DEVICEID0 DEVICEID[0]
#define DEVICEID1 DEVICEID[1]
/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
#define ER0 ER[0]
#define ER1 ER[1]
#define ER2 ER[2]
#define ER3 ER[3]
/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
#define IR0 IR[0]
#define IR1 IR[1]
#define IR2 IR[2]
#define IR3 IR[3]
/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
#define DEVICEADDR0 DEVICEADDR[0]
#define DEVICEADDR1 DEVICEADDR[1]
/* PPI */
/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
#define TASKS_CHG0EN TASKS_CHG[0].EN
#define TASKS_CHG0DIS TASKS_CHG[0].DIS
#define TASKS_CHG1EN TASKS_CHG[1].EN
#define TASKS_CHG1DIS TASKS_CHG[1].DIS
#define TASKS_CHG2EN TASKS_CHG[2].EN
#define TASKS_CHG2DIS TASKS_CHG[2].DIS
#define TASKS_CHG3EN TASKS_CHG[3].EN
#define TASKS_CHG3DIS TASKS_CHG[3].DIS
/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
#define CH0_EEP CH[0].EEP
#define CH0_TEP CH[0].TEP
#define CH1_EEP CH[1].EEP
#define CH1_TEP CH[1].TEP
#define CH2_EEP CH[2].EEP
#define CH2_TEP CH[2].TEP
#define CH3_EEP CH[3].EEP
#define CH3_TEP CH[3].TEP
#define CH4_EEP CH[4].EEP
#define CH4_TEP CH[4].TEP
#define CH5_EEP CH[5].EEP
#define CH5_TEP CH[5].TEP
#define CH6_EEP CH[6].EEP
#define CH6_TEP CH[6].TEP
#define CH7_EEP CH[7].EEP
#define CH7_TEP CH[7].TEP
#define CH8_EEP CH[8].EEP
#define CH8_TEP CH[8].TEP
#define CH9_EEP CH[9].EEP
#define CH9_TEP CH[9].TEP
#define CH10_EEP CH[10].EEP
#define CH10_TEP CH[10].TEP
#define CH11_EEP CH[11].EEP
#define CH11_TEP CH[11].TEP
#define CH12_EEP CH[12].EEP
#define CH12_TEP CH[12].TEP
#define CH13_EEP CH[13].EEP
#define CH13_TEP CH[13].TEP
#define CH14_EEP CH[14].EEP
#define CH14_TEP CH[14].TEP
#define CH15_EEP CH[15].EEP
#define CH15_TEP CH[15].TEP
/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
#define CHG0 CHG[0]
#define CHG1 CHG[1]
#define CHG2 CHG[2]
#define CHG3 CHG[3]
/* All bitfield macros for the CHGx registers therefore changed name. */
#define PPI_CHG0_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG0_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG0_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG0_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG0_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG0_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG0_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG0_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG0_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG0_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG0_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG0_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG0_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG0_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG0_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG0_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG0_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG0_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG0_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG0_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG0_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG0_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG0_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG0_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG0_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG0_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG0_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG0_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG0_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG0_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG0_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG0_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG0_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG0_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG0_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG0_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG0_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG0_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG0_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG0_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG0_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG0_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG0_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG0_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG0_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG0_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG0_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG0_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG0_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG0_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG0_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG0_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG0_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG0_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG0_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG0_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG0_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG0_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG0_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG0_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG0_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG0_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG0_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG0_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG1_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG1_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG1_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG1_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG1_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG1_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG1_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG1_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG1_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG1_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG1_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG1_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG1_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG1_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG1_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG1_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG1_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG1_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG1_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG1_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG1_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG1_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG1_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG1_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG1_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG1_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG1_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG1_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG1_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG1_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG1_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG1_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG1_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG1_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG1_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG1_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG1_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG1_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG1_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG1_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG1_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG1_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG1_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG1_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG1_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG1_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG1_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG1_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG1_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG1_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG1_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG1_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG1_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG1_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG1_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG1_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG1_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG1_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG1_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG1_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG1_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG1_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG1_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG1_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG2_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG2_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG2_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG2_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG2_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG2_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG2_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG2_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG2_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG2_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG2_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG2_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG2_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG2_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG2_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG2_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG2_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG2_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG2_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG2_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG2_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG2_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG2_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG2_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG2_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG2_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG2_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG2_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG2_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG2_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG2_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG2_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG2_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG2_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG2_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG2_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG2_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG2_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG2_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG2_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG2_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG2_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG2_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG2_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG2_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG2_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG2_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG2_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG2_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG2_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG2_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG2_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG2_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG2_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG2_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG2_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG2_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG2_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG2_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG2_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG2_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG2_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG2_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG2_CH0_Included PPI_CHG_CH0_Included
#define PPI_CHG3_CH15_Pos PPI_CHG_CH15_Pos
#define PPI_CHG3_CH15_Msk PPI_CHG_CH15_Msk
#define PPI_CHG3_CH15_Excluded PPI_CHG_CH15_Excluded
#define PPI_CHG3_CH15_Included PPI_CHG_CH15_Included
#define PPI_CHG3_CH14_Pos PPI_CHG_CH14_Pos
#define PPI_CHG3_CH14_Msk PPI_CHG_CH14_Msk
#define PPI_CHG3_CH14_Excluded PPI_CHG_CH14_Excluded
#define PPI_CHG3_CH14_Included PPI_CHG_CH14_Included
#define PPI_CHG3_CH13_Pos PPI_CHG_CH13_Pos
#define PPI_CHG3_CH13_Msk PPI_CHG_CH13_Msk
#define PPI_CHG3_CH13_Excluded PPI_CHG_CH13_Excluded
#define PPI_CHG3_CH13_Included PPI_CHG_CH13_Included
#define PPI_CHG3_CH12_Pos PPI_CHG_CH12_Pos
#define PPI_CHG3_CH12_Msk PPI_CHG_CH12_Msk
#define PPI_CHG3_CH12_Excluded PPI_CHG_CH12_Excluded
#define PPI_CHG3_CH12_Included PPI_CHG_CH12_Included
#define PPI_CHG3_CH11_Pos PPI_CHG_CH11_Pos
#define PPI_CHG3_CH11_Msk PPI_CHG_CH11_Msk
#define PPI_CHG3_CH11_Excluded PPI_CHG_CH11_Excluded
#define PPI_CHG3_CH11_Included PPI_CHG_CH11_Included
#define PPI_CHG3_CH10_Pos PPI_CHG_CH10_Pos
#define PPI_CHG3_CH10_Msk PPI_CHG_CH10_Msk
#define PPI_CHG3_CH10_Excluded PPI_CHG_CH10_Excluded
#define PPI_CHG3_CH10_Included PPI_CHG_CH10_Included
#define PPI_CHG3_CH9_Pos PPI_CHG_CH9_Pos
#define PPI_CHG3_CH9_Msk PPI_CHG_CH9_Msk
#define PPI_CHG3_CH9_Excluded PPI_CHG_CH9_Excluded
#define PPI_CHG3_CH9_Included PPI_CHG_CH9_Included
#define PPI_CHG3_CH8_Pos PPI_CHG_CH8_Pos
#define PPI_CHG3_CH8_Msk PPI_CHG_CH8_Msk
#define PPI_CHG3_CH8_Excluded PPI_CHG_CH8_Excluded
#define PPI_CHG3_CH8_Included PPI_CHG_CH8_Included
#define PPI_CHG3_CH7_Pos PPI_CHG_CH7_Pos
#define PPI_CHG3_CH7_Msk PPI_CHG_CH7_Msk
#define PPI_CHG3_CH7_Excluded PPI_CHG_CH7_Excluded
#define PPI_CHG3_CH7_Included PPI_CHG_CH7_Included
#define PPI_CHG3_CH6_Pos PPI_CHG_CH6_Pos
#define PPI_CHG3_CH6_Msk PPI_CHG_CH6_Msk
#define PPI_CHG3_CH6_Excluded PPI_CHG_CH6_Excluded
#define PPI_CHG3_CH6_Included PPI_CHG_CH6_Included
#define PPI_CHG3_CH5_Pos PPI_CHG_CH5_Pos
#define PPI_CHG3_CH5_Msk PPI_CHG_CH5_Msk
#define PPI_CHG3_CH5_Excluded PPI_CHG_CH5_Excluded
#define PPI_CHG3_CH5_Included PPI_CHG_CH5_Included
#define PPI_CHG3_CH4_Pos PPI_CHG_CH4_Pos
#define PPI_CHG3_CH4_Msk PPI_CHG_CH4_Msk
#define PPI_CHG3_CH4_Excluded PPI_CHG_CH4_Excluded
#define PPI_CHG3_CH4_Included PPI_CHG_CH4_Included
#define PPI_CHG3_CH3_Pos PPI_CHG_CH3_Pos
#define PPI_CHG3_CH3_Msk PPI_CHG_CH3_Msk
#define PPI_CHG3_CH3_Excluded PPI_CHG_CH3_Excluded
#define PPI_CHG3_CH3_Included PPI_CHG_CH3_Included
#define PPI_CHG3_CH2_Pos PPI_CHG_CH2_Pos
#define PPI_CHG3_CH2_Msk PPI_CHG_CH2_Msk
#define PPI_CHG3_CH2_Excluded PPI_CHG_CH2_Excluded
#define PPI_CHG3_CH2_Included PPI_CHG_CH2_Included
#define PPI_CHG3_CH1_Pos PPI_CHG_CH1_Pos
#define PPI_CHG3_CH1_Msk PPI_CHG_CH1_Msk
#define PPI_CHG3_CH1_Excluded PPI_CHG_CH1_Excluded
#define PPI_CHG3_CH1_Included PPI_CHG_CH1_Included
#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
/*lint --flb "Leave library region" */
#endif /* NRF51_TO_NRF52840_H */
third_party/NordicSemiconductor/device/nrf52840.h
Vendored
+2420
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/device/nrf52840_bitfields.h
Vendored
+14633
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/device/nrf52840_peripherals.h
Vendored
+240
View File
@@ -0,0 +1,240 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef _NRF52840_PERIPHERALS_H
#define _NRF52840_PERIPHERALS_H
/* Floating Point Unit */
#define FPU_PRESENT
#define FPU_COUNT 1
/* Systick timer */
#define SYSTICK_PRESENT
#define SYSTICK_COUNT 1
/* Software Interrupts */
#define SWI_PRESENT
#define SWI_COUNT 6
/* Memory Watch Unit */
#define MWU_PRESENT
#define MWU_COUNT 1
/* GPIO */
#define GPIO_PRESENT
#define GPIO_COUNT 2
#define P0_PIN_NUM 32
#define P1_PIN_NUM 16
/* ACL */
#define ACL_PRESENT
#define ACL_REGIONS_COUNT 8
/* Radio */
#define RADIO_PRESENT
#define RADIO_COUNT 1
/* Accelerated Address Resolver */
#define AAR_PRESENT
#define AAR_COUNT 1
#define AAR_MAX_IRK_NUM 16
/* AES Electronic CodeBook mode encryption */
#define ECB_PRESENT
#define ECB_COUNT 1
/* AES CCM mode encryption */
#define CCM_PRESENT
#define CCM_COUNT 1
/* NFC Tag */
#define NFCT_PRESENT
#define NFCT_COUNT 1
/* Peripheral to Peripheral Interconnect */
#define PPI_PRESENT
#define PPI_COUNT 1
#define PPI_CH_NUM 20
#define PPI_GROUP_NUM 6
#define PPI_FEATURE_FORKS_PRESENT
/* Event Generator Unit */
#define EGU_PRESENT
#define EGU_COUNT 6
#define EGU0_CH_NUM 16
#define EGU1_CH_NUM 16
#define EGU2_CH_NUM 16
#define EGU3_CH_NUM 16
#define EGU4_CH_NUM 16
#define EGU5_CH_NUM 16
/* Timer/Counter */
#define TIMER_PRESENT
#define TIMER_COUNT 5
#define TIMER0_MAX_SIZE 32
#define TIMER1_MAX_SIZE 32
#define TIMER2_MAX_SIZE 32
#define TIMER3_MAX_SIZE 32
#define TIMER4_MAX_SIZE 32
#define TIMER0_CC_NUM 4
#define TIMER1_CC_NUM 4
#define TIMER2_CC_NUM 4
#define TIMER3_CC_NUM 6
#define TIMER4_CC_NUM 6
/* Real Time Counter */
#define RTC_PRESENT
#define RTC_COUNT 3
#define RTC0_CC_NUM 3
#define RTC1_CC_NUM 4
#define RTC2_CC_NUM 4
/* RNG */
#define RNG_PRESENT
#define RNG_COUNT 1
/* Watchdog Timer */
#define WDT_PRESENT
#define WDT_COUNT 1
/* Temperature Sensor */
#define TEMP_PRESENT
#define TEMP_COUNT 1
/* Serial Peripheral Interface Master */
#define SPI_PRESENT
#define SPI_COUNT 3
/* Serial Peripheral Interface Master with DMA */
#define SPIM_PRESENT
#define SPIM_COUNT 4
#define SPIM0_MAX_DATARATE 8
#define SPIM1_MAX_DATARATE 8
#define SPIM2_MAX_DATARATE 8
#define SPIM3_MAX_DATARATE 32
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT 1
/* Serial Peripheral Interface Slave with DMA*/
#define SPIS_PRESENT
#define SPIS_COUNT 3
/* Two Wire Interface Master */
#define TWI_PRESENT
#define TWI_COUNT 2
/* Two Wire Interface Master with DMA */
#define TWIM_PRESENT
#define TWIM_COUNT 2
/* Two Wire Interface Slave with DMA */
#define TWIS_PRESENT
#define TWIS_COUNT 2
/* Universal Asynchronous Receiver-Transmitter */
#define UART_PRESENT
#define UART_COUNT 1
/* Universal Asynchronous Receiver-Transmitter with DMA */
#define UARTE_PRESENT
#define UARTE_COUNT 2
/* Quadrature Decoder */
#define QDEC_PRESENT
#define QDEC_COUNT 1
/* Successive Approximation Analog to Digital Converter */
#define SAADC_PRESENT
#define SAADC_COUNT 1
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
#define GPIOTE_CH_NUM 8
#define GPIOTE_FEATURE_SET_PRESENT
#define GPIOTE_FEATURE_CLR_PRESENT
/* Low Power Comparator */
#define LPCOMP_PRESENT
#define LPCOMP_COUNT 1
#define LPCOMP_REFSEL_RESOLUTION 16
#define LPCOMP_FEATURE_HYST_PRESENT
/* Comparator */
#define COMP_PRESENT
#define COMP_COUNT 1
/* Pulse Width Modulator */
#define PWM_PRESENT
#define PWM_COUNT 4
#define PWM0_CH_NUM 4
#define PWM1_CH_NUM 4
#define PWM2_CH_NUM 4
#define PWM3_CH_NUM 4
/* Pulse Density Modulator */
#define PDM_PRESENT
#define PDM_COUNT 1
/* Inter-IC Sound Interface */
#define I2S_PRESENT
#define I2S_COUNT 1
/* Universal Serial Bus Device */
#define USBD_PRESENT
#define USBD_COUNT 1
/* ARM TrustZone Cryptocell 310 */
#define CRYPTOCELL_PRESENT
#define CRYPTOCELL_COUNT 1
/* Quad SPI */
#define QSPI_PRESENT
#define QSPI_COUNT 1
#endif // _NRF52840_PERIPHERALS_H
third_party/NordicSemiconductor/device/nrf52_to_nrf52840.h
Vendored
+88
View File
@@ -0,0 +1,88 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF52_TO_NRF52840_H
#define NRF52_TO_NRF52840_H
/*lint ++flb "Enter library region */
/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices.
* It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the
* functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
* from the nrf52_namechange.h file. */
/* Differences between latest nRF52 headers and nRF52840 headers. */
/* UART */
/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
#define PSELRTS PSEL.RTS
#define PSELTXD PSEL.TXD
#define PSELCTS PSEL.CTS
#define PSELRXD PSEL.RXD
/* TWI */
/* The registers PSELSCL, PSELSDA were restructured into a struct. */
#define PSELSCL PSEL.SCL
#define PSELSDA PSEL.SDA
/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */
/* I2S */
/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */
#define I2S_ENABLE_ENABLE_DISABLE I2S_ENABLE_ENABLE_Disabled
#define I2S_ENABLE_ENABLE_ENABLE I2S_ENABLE_ENABLE_Enabled
#define I2S_CONFIG_MODE_MODE_MASTER I2S_CONFIG_MODE_MODE_Master
#define I2S_CONFIG_MODE_MODE_SLAVE I2S_CONFIG_MODE_MODE_Slave
#define I2S_CONFIG_RXEN_RXEN_DISABLE I2S_CONFIG_RXEN_RXEN_Disabled
#define I2S_CONFIG_RXEN_RXEN_ENABLE I2S_CONFIG_RXEN_RXEN_Enabled
#define I2S_CONFIG_TXEN_TXEN_DISABLE I2S_CONFIG_TXEN_TXEN_Disabled
#define I2S_CONFIG_TXEN_TXEN_ENABLE I2S_CONFIG_TXEN_TXEN_Enabled
#define I2S_CONFIG_MCKEN_MCKEN_DISABLE I2S_CONFIG_MCKEN_MCKEN_Disabled
#define I2S_CONFIG_MCKEN_MCKEN_ENABLE I2S_CONFIG_MCKEN_MCKEN_Enabled
#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT I2S_CONFIG_SWIDTH_SWIDTH_8Bit
#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT I2S_CONFIG_SWIDTH_SWIDTH_16Bit
#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT I2S_CONFIG_SWIDTH_SWIDTH_24Bit
#define I2S_CONFIG_ALIGN_ALIGN_LEFT I2S_CONFIG_ALIGN_ALIGN_Left
#define I2S_CONFIG_ALIGN_ALIGN_RIGHT I2S_CONFIG_ALIGN_ALIGN_Right
#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED I2S_CONFIG_FORMAT_FORMAT_Aligned
#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo
#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left
#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right
/* LPCOMP */
/* Corrected typo in RESULT register. */
#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below
/*lint --flb "Leave library region" */
#endif /* NRF51_TO_NRF52840_H */
third_party/NordicSemiconductor/device/system_nrf52840.c
Vendored
+248
View File
@@ -0,0 +1,248 @@
/* Copyright (c) 2012 ARM LIMITED
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM nor the names of its contributors may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf52840.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK_64M (64000000UL)
static bool errata_36(void);
static bool errata_98(void);
static bool errata_103(void);
static bool errata_115(void);
static bool errata_120(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK_64M;
}
void SystemInit(void)
{
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_36())
{
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
NRF_CLOCK->CTIV = 0;
}
/* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_98())
{
*(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
}
/* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_103())
{
NRF_CCM->MAXPACKETSIZE = 0xFBul;
}
/* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_115())
{
*(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*
(uint32_t *)0x10000258 & 0x0000000F);
}
/* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_120())
{
*(volatile uint32_t *)0x40029640ul = 0x200ul;
}
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
* operations are not used in your code. */
#if (__FPU_USED == 1)
SCB->CPACR |= (3UL << 20) | (3UL << 22);
__DSB();
__ISB();
#endif
/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
normal GPIOs. */
#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos))
{
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NVIC_SystemReset();
}
#endif
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
#if defined (CONFIG_GPIO_AS_PINRESET)
if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected <<
UICR_PSELRESET_CONNECT_Pos)) ||
((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected <<
UICR_PSELRESET_CONNECT_Pos)))
{
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_UICR->PSELRESET[0] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_UICR->PSELRESET[1] = 18;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {}
NVIC_SystemReset();
}
#endif
/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
Specification to see which one). */
#if defined (ENABLE_SWO)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect <<
GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
Specification to see which ones). */
#if defined (ENABLE_TRACE)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[7] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect <<
GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect <<
GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect <<
GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect <<
GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P1->PIN_CNF[9] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect <<
GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
SystemCoreClockUpdate();
}
static bool errata_36(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul))
{
return true;
}
return false;
}
static bool errata_98(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul))
{
return true;
}
return false;
}
static bool errata_103(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul))
{
return true;
}
return false;
}
static bool errata_115(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul))
{
return true;
}
return false;
}
static bool errata_120(void)
{
if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul))
{
return true;
}
return false;
}
/*lint --flb "Leave library region" */
third_party/NordicSemiconductor/device/system_nrf52840.h
Vendored
+69
View File
@@ -0,0 +1,69 @@
/* Copyright (c) 2012 ARM LIMITED
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of ARM nor the names of its contributors may be used to
* endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF52840_H
#define SYSTEM_NRF52840_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit(void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate(void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF52840_H */
third_party/NordicSemiconductor/drivers/README.md
Vendored
+128
View File
@@ -0,0 +1,128 @@
# nRF 802.15.4 radio driver.
This driver implements only __non-beacon mode__ of operation.
It supports following __features__:
* reception of unicast and broadcast frames (with filtering),
* automatic sending ACK frames,
* setting pending bit in ACK frame according to pending data for given
destination,
* transmission of unicast and broadcast frames,
* automatic CCA procedure before transmission,
* automatic receiving ACK frames,
* low power mode (sleep),
* energy detection,
* promiscuous mode.
## Implementation details
The driver is a FSM. From API perspective it has 4 states. Most of those states
contains sub-states in implementation.
### FSM description
```
receive() transmit()
--------> -------->
Sleep Receive Transmit
<-------- | /|\<--------
sleep() | | receive() / transmitted() / busy_channel()
| |
energy_detection() | | energy_detected()
\|/ |
Energy detection
```
#### Transitions
The driver is initialized in the Sleep state. The higher layer should call
the receive() function to make the driver enter the Receive state and start
radio operations.
In basic applications radio should be most time in a Receive state. In this
state the radio receives incoming frames. Changing to any other state should be
performed from Receive state.
When a frame is received in Receive state the driver notifies the higher layer
by calling received() function. This function is called after reception of a
broadcast frame or after sending an ACK to a unicast frame.
In the promiscuous mode the higher layer is notified about all of the received
frames. Even if the frame was not destined to the receiving node.
To transmit a frame the higher layer should call the transmit() function. If
channel is busy the driver goes back to the Receive state and notifies the
higher layer by calling the busy_channel() function. If a broadcast frame was
transmitted the driver goes back to the Receive state and notifies the higher
layer by calling the transmitted() function. If a unicast frame was transmitted
and an ACK was received the driver goes back to the Receive state and notifies
the higher layer by calling the transmitted() function. If a unicast frame was
transmitted and there was no expected ACK received the higher layer shall call
the receive() function after the ACK timeout to make the driver go back to the
Receive state.
To perform an Energy Detection procedure the higher layer should call the
energy_detection() function. When the procedure is completed the driver goes
automatically back to the Receive state and notifies the higher layer with the
energy_detected() function.
#### States
##### Sleep
In this state the radio is in low power mode. It cannot transmit or receive any
frame.
##### Receive
In this state the radio receives 802.15.4 frames. It filters out frames with
invalid CRC, length, type, destination address.
If the driver receives unicast frame destined to the receiving node it
automatically transmits an ACK frame. According to 802.15.4 standard, an ACK
frame should be delayed aTurnaroundTime (192 uS) after reception of the ACKed
frame. To perform this delay the driver uses the TIFS timer in the radio
peripheral. This timer requires 3 shorts to work correctly:
1. END -> DISABLE
2. DISABLE -> TXEN
3. READY -> START
The driver has limited time after receiving of a frame to decide if an ACK
should be transmitted. If ACK should not be transmitted the driver must abort
sending ACK by disabling those shorts and triggering DISABLE task.
To use this limited time most effective the driver uses the Bit Counter feature
of the radio peripheral to get notification when the Frame Control field is
received and when the destination address is received. Those fields are used to
filter the frame before whole frame is received.
If all 3 shorts used to send ACK automatically are enabled the radio peripheral
sends ACK frames in loop. To prevent this during debugging process there are
only 2 shorts enabled when waiting for frame (1. and 2.) and 2 other shorts are
enabled in DISABLED event handler (1. and 3.). The first short is still enabled
to automatically disable transmitter after transmission of the ACK frame.
##### Transmit
In this state the radio performs the CCA procedure. If channel is free the radio
transmits requested frame. If an ACK was requested in the transmitted frame
the driver automatically receives the ACK frame in this state.
To prevent the TXIDLE peripheral state the driver uses 2 shorts in Transmit
state:
1. READY -> START
2. END -> DISABLE
Those shorts automatically start transmission of the frame when transmitter is
ready and disable transmitter when the frame was transmitted.
##### Energy detection
In this state the radio performs the Energy Detection procedure. During this
procedure the radio is busy and cannot change state to any other. The end of
this procedure is notified to the higher layer by a function call.
### Mutex and critical sections.
State transitions in the FSM can be requested simultaneously by the higher layer
and the IRQ handler. To prevent race conditions in the driver there is a mutex.
The mutex is unlocked only in the *Receive* state (*WaitingRxFrame* substate).
If there is requested state transition, the procedure shall lock the mutex
before state is changed. If mutex cannot be locked, another procedure has locked
it and is going to change the state.
The mutex is unlocked when the driver enters *Receive* state.
A race condition could also occur during handle of a requests from the higher
layer. Even if the receiver is stopped (TASK STOP) the END or DISABLED event can
be raised for a few uS after triggering the task. To prevent interrupt of the
higher layer request handler by IRQ handler, the higher layer request handlers
are performend in critical sections. The critical sections are implemented as
software interrupt requests with priority equal to the RADIO IRQ.
third_party/NordicSemiconductor/drivers/doc/diagrams/radio_fsm.uml
Vendored
+76
View File
@@ -0,0 +1,76 @@
@startuml
skinparam state {
BackgroundColor<< locked >> red
BackgroundColor<< unlocked >> green
}
[*] --> Sleep << unlocked >>
Sleep -down-> Receive : API: Receive()
Receive -up-> Sleep : API: Sleep() / MUTEX: Lock; TASK: STOP; TASK: DISABLE\nEV: DISABLED / MUTEX: Unlock
state Receive {
state WaitingRxFrame << unlocked >>
state RxHeader << locked >>
state RxFrame << locked >>
state TxAck << locked >>
state ShortAckTx << locked >>
Enter -down-> WaitingRxFrame : EV: DISABLED / TASK: RXEN; MUTEX: Unlock
WaitingRxFrame --> WaitingRxFrame : EV: READY / AutoACK: enable; TASK: START
WaitingRxFrame -down-> RxHeader : EV: FRAMESTART / MUTEX: Lock
RxHeader -down-> RxFrame : EV: BCMATCH, Frame type and address ok
RxHeader -up-> Enter : EV: BCMATCH, Frame type invalid or dst address mismatch
RxFrame -down-> TxAck : EV: END, CRC: OK, ACK: requested
RxFrame -up-> Enter : EV: END, CRC: invalid / TASK: DISABLE
RxFrame -up-> Enter : EV: END, CRC: OK, ACK: not requested / TASK: DISABLE; received()
TxAck -up-> Enter : EV: END / AutoACK: disable; TASK: DISABLE; received()
RxFrame -left-> ShortAckTx : EV: END; AutoACK: enabled / SHORT: DISABLE
ShortAckTx -left-> ShortAckTx : EV: DISABLED; AutoACK: enabled / SHORT: TXEN
ShortAckTx -right-> ShortAckTx : EV: READY; AutoACK:enabled / AutoACK: disable; SHORT: START
}
state Transmit << locked >>{
[*] --> CCA : EV: DISABLED / TASK: RXEN
CCA --> CCA : EV: READY / TASK: CCA_START
CCA -up-> Receive : EV: CCABUSY / TransmitFailure(); TASK: DISABLE
CCA --> TxFrame : EV: CCAIDLE / SHORT: TXEN
TxFrame --> TxFrame : EV: READY / SHORT: START
state RxAck {
[*] --> EnablingAckRx : TASK: RXEN
EnablingAckRx --> ReceivingAck : EV: READY / TASK: START
ReceivingAck --> ReceivingAck : EV: END (CRCERR) / TASK: START
ReceivingAck --> ReceivingAck : EV: END (CRCOK, Not valid ACK) / TASK: START
ReceivingAck --> WaitingRxFrame : EV: END (CRCOK, Valid ACK) / MUTEX: Unlock; TASK: START; transmitted()
}
TxFrame --> RxAck : EV: END (ACK)
TxFrame -up-> Receive : EV: END (NOACK) / transmitted(OK); SHORT: DISABLE
}
state ShortAckTx {
}
state EnergyDetection << locked >> {
[*] --> ED : EV: DISABLED / TASK: RXEN
ED --> ED : EV: READY / TASK: EDSTART
ED -right-> Receive : EV: EDEND / energy_detected(); TASK: DISABLE
}
Receive -down-> Transmit : API: Transmit() / MUTEX:Lock; AutoACK: disable; TASK: DISABLE
Transmit -up-> Receive : API: Receive() / TASK: CCASTOP; TASK: STOP; TASK: DISABLE
Receive --> Receive : API: Receive()
Receive -left-> EnergyDetection : API: EnergyDetection() / MUTEX: Lock; AutoACK: disable; TASK: DISABLE
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/rx_0length_frame.uml
Vendored
+23
View File
@@ -0,0 +1,23 @@
@startuml
participant RADIO
participant Driver
-> State: WaitingRxFrame
activate RADIO
RADIO -> Driver: EV: END
deactivate RADIO
Driver -> Mutex: lock
activate Mutex
Driver -> Driver: stopSendingAck(WaitingRxFrame)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/rx_ack.uml
Vendored
+27
View File
@@ -0,0 +1,27 @@
@startuml
participant RADIO
participant Driver
-> State: WaitingRxFrame
RADIO -> Driver: EV: FRAMESTART
activate RADIO
Driver -> Mutex: lock
activate Mutex
Driver -> State: RxHeader
RADIO -> Driver: EV: BCMATCH
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_INIT
Driver -> Driver: Check frame type: ACK
Driver -> Driver: stopSendingAck(WaitingRxFrame)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/rx_broadcast.uml
Vendored
+45
View File
@@ -0,0 +1,45 @@
@startuml
participant RADIO
participant Driver
-> State: WaitingRxFrame
RADIO -> Driver: EV: FRAMESTART
activate RADIO
Driver -> Mutex: lock
activate Mutex
Driver -> State: RxHeader
RADIO -> Driver: EV: BCMATCH
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_INIT
Driver -> Driver: Check frame type: Data
Driver -> Driver: Check dest address: short
Driver -> RADIO: set_bcc(BCC_SHORT_ADDR)
RADIO -> Driver: EV: BCMATCH
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_SHORT_ADDR
Driver -> Driver: Check dest addr: Broadcast
Driver -> Flags: ReceivingBroadcastFrame = true
Driver -> State: RxFrame
RADIO -> Driver: EV: END
deactivate RADIO
Driver -> Driver: Check CRC: OK
Driver -> Driver: Prepare ACK
Driver -->> Flags: receivigBroadcastFrame?
Flags --> Driver: true
Driver -> Driver: stopSendingAck(WaitingRxFrame)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
Driver -> Higher_Layer: received()
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/rx_too_short_frame.uml
Vendored
+24
View File
@@ -0,0 +1,24 @@
@startuml
participant RADIO
participant Driver
-> State: WaitingRxFrame
RADIO -> Driver: EV: FRAMESTART
activate RADIO
Driver -> Mutex: lock
activate Mutex
Driver -> State: RxHeader
Driver -> Driver: Check frame length: < ACK_LENGTH
Driver -> Driver: stopSendingAck(WaitingRxFrame)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/rx_unicast.uml
Vendored
+80
View File
@@ -0,0 +1,80 @@
@startuml
participant RADIO
participant Driver
-> State: WaitingRxFrame
RADIO -> Driver: EV: FRAMESTART
activate Driver
activate RADIO
Driver -> Mutex: lock
activate Mutex
Driver -> State: RxHeader
deactivate Driver
RADIO -> Driver: EV: BCMATCH
activate Driver
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_INIT
Driver -> Driver: Check frame type: Data
Driver -> Driver: Check dest address: short
Driver -> RADIO: set_bcc(BCC_SHORT_ADDR)
deactivate Driver
RADIO -> Driver: EV: BCMATCH
activate Driver
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_SHORT_ADDR
Driver -> Driver: Check dest addr: Matched unicast
Driver -> Flags: ReceivingBroadcastFrame = false
Driver -> State: RxFrame
deactivate Driver
RADIO -> RADIO: EV: END / TASK: DISABLE
deactivate RADIO
RADIO -> Driver: EV: END
activate Driver
Driver -> Driver: Check CRC: OK
RADIO -> RADIO: EV: DISABLED / TASK: TXEN
Driver -> Driver: Prepare ACK
Driver -->> Flags: receivigBroadcastFrame?
Flags --> Driver: false
Driver -> Driver: Check if ACK requested: true
Driver -> State: TxAck
Driver -> Driver: set pending bit in ACK()
deactivate Driver
RADIO -> Driver: EV: DISABLED
RADIO -> RADIO: EV: READY / TASK: START
activate RADIO
RADIO -> Driver: EV: READY
activate Driver
Driver -> RADIO: disable_tifs_shorts_ack()
deactivate Driver
RADIO -> Driver: EV: FRAMESTART
RADIO -> RADIO: EV: END / TASK: DISABLE
deactivate RADIO
RADIO -> Driver: EV: END
activate Driver
Driver -> RADIO: disable_tifs_shorts_all()
Driver -> State: WaitingRxFrame
deactivate Driver
RADIO -> Driver: EV: DISABLED
activate Driver
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
deactivate Driver
Driver -> Higher_Layer: received()
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/rx_unicast_other_destination.uml
Vendored
+34
View File
@@ -0,0 +1,34 @@
@startuml
participant RADIO
participant Driver
-> State: WaitingRxFrame
RADIO -> Driver: EV: FRAMESTART
activate RADIO
Driver -> Mutex: lock
activate Mutex
Driver -> State: RxHeader
RADIO -> Driver: EV: BCMATCH
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_INIT
Driver -> Driver: Check frame type: Data
Driver -> Driver: Check dest address: short
Driver -> RADIO: set_bcc(BCC_SHORT_ADDR)
RADIO -> Driver: EV: BCMATCH
Driver -->> RADIO: get_bcc()
RADIO --> Driver: BCC_SHORT_ADDR
Driver -> Driver: Check dest addr: Missed unicast
Driver -> Driver: stopSendingAck(WaitingRxFrame)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/tx_broadcast.uml
Vendored
+51
View File
@@ -0,0 +1,51 @@
@startuml
participant RADIO
participant Driver
participant State
participant Mutex
-> State: WaitingRxFrame
Higher_Layer -> Driver: transmit()
Driver -> Mutex: lock
activate Mutex
Driver -> RADIO: TASK: STOP
Driver -> RADIO: set_channel(tx_channel)
Driver -> Driver: stopSendingAck(Cca)
Driver -> RADIO: set_tx_power(tx_power)
Driver -> RADIO: clear_event(END)
Driver -> RADIO: clear_event(READY)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
RADIO -> Driver: EV: READY
Driver -> State: TxFrame
Driver -> RADIO: enable_txframe_shorts()
Driver -> RADIO: TASK: CCASTART
RADIO -> RADIO: EV: CCAIDLE / TASK: TXEN
RADIO -> RADIO: EV: READY / TASK: START
activate RADIO
RADIO -> Driver: EV: FRAMESTART
RADIO -> RADIO: EV: END / TASK: DISABLE
deactivate RADIO
RADIO -> Driver: EV: END
Driver -> RADIO: disable_txframe_shorts()
Driver -> Driver: Ack requested? false
Driver -> State: WaitingRxFrame
Driver -> Higher_Layer: transmitted()
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/tx_unicast.uml
Vendored
+68
View File
@@ -0,0 +1,68 @@
@startuml
participant RADIO
participant Driver
participant State
participant Mutex
-> State: WaitingRxFrame
Higher_Layer -> Driver: transmit()
Driver -> Mutex: lock
activate Mutex
Driver -> RADIO: TASK: STOP
Driver -> RADIO: set_channel(tx_channel)
Driver -> Driver: stopSendingAck(Cca)
Driver -> RADIO: set_tx_power(tx_power)
Driver -> RADIO: clear_event(END)
Driver -> RADIO: clear_event(READY)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
RADIO -> Driver: EV: READY
Driver -> State: TxFrame
Driver -> RADIO: enable_txframe_shorts()
Driver -> RADIO: TASK: CCASTART
RADIO -> RADIO: EV: CCAIDLE / TASK: TXEN
RADIO -> RADIO: EV: READY / TASK: START
activate RADIO
RADIO -> Driver: EV: FRAMESTART
RADIO -> RADIO: EV: END / TASK: DISABLE
deactivate RADIO
RADIO -> Driver: EV: END
Driver -> RADIO: disable_txframe_shorts()
Driver -> Driver: Ack requested? true
Driver -> State: RxAck
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
RADIO -> Driver: EV: READY
Driver -> RADIO: TASK: START
RADIO -> Driver: EV: FRAMESTART
activate RADIO
RADIO -> Driver: EV: END
deactivate RADIO
Driver -> Driver: ACK matched? false
Driver -> RADIO: TASK: START
RADIO -> Driver: EV: FRAMESTART
activate RADIO
RADIO -> Driver: EV: END
deactivate RADIO
Driver -> Driver: ACK matched? true
Driver -> State: WainingRxFrame
Driver -> RADIO: enable_tifs_shorts()
Driver -> RADIO: TASK: START
Driver -> Mutex: unlock
deactivate Mutex
Driver -> Higher_Layer: transmitted()
@enduml
third_party/NordicSemiconductor/drivers/doc/diagrams/sequence/tx_unicast_no_ack.uml
Vendored
+62
View File
@@ -0,0 +1,62 @@
@startuml
participant RADIO
participant Driver
participant State
participant Mutex
-> State: WaitingRxFrame
Higher_Layer -> Driver: transmit()
Driver -> Mutex: lock
activate Mutex
Driver -> RADIO: TASK: STOP
Driver -> RADIO: set_channel(tx_channel)
Driver -> Driver: stopSendingAck(Cca)
Driver -> RADIO: set_tx_power(tx_power)
Driver -> RADIO: clear_event(END)
Driver -> RADIO: clear_event(READY)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
RADIO -> Driver: EV: READY
Driver -> State: TxFrame
Driver -> RADIO: enable_txframe_shorts()
Driver -> RADIO: TASK: CCASTART
RADIO -> RADIO: EV: CCAIDLE / TASK: TXEN
RADIO -> RADIO: EV: READY / TASK: START
activate RADIO
RADIO -> Driver: EV: FRAMESTART
RADIO -> RADIO: EV: END / TASK: DISABLE
deactivate RADIO
RADIO -> Driver: EV: END
Driver -> RADIO: disable_txframe_shorts()
Driver -> Driver: Ack requested? true
Driver -> State: RxAck
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
RADIO -> Driver: EV: READY
Driver -> RADIO: TASK: START
== Timeout ==
Higher_Layer -> Driver: receive()
Driver -> RADIO: TASK: STOP
Driver -> State: WaitingRxFrame
Driver -> RADIO: TASK: DISABLE
Driver -> RADIO: clear_event(END)
RADIO -> Driver: EV: DISABLED
Driver -> RADIO: TASK: RXEN
Driver -> Mutex: unlock
deactivate Mutex
Driver -> RADIO: clear_event(DISABLED)
@enduml
third_party/NordicSemiconductor/drivers/doc/fsm_description.pdf
Vendored
BIN
View File
Binary file not shown.
third_party/NordicSemiconductor/drivers/nrf_drv_clock.c
Vendored
+166
View File
@@ -0,0 +1,166 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "nrf_drv_clock.h"
#define NRF_ERROR_MODULE_ALREADY_INITIALIZED 0x8085
/*lint -save -e652 */
#define NRF_CLOCK_LFCLK_RC CLOCK_LFCLKSRC_SRC_RC
#define NRF_CLOCK_LFCLK_Xtal CLOCK_LFCLKSRC_SRC_Xtal
#define NRF_CLOCK_LFCLK_Synth CLOCK_LFCLKSRC_SRC_Synth
/*lint -restore */
volatile uint32_t m_hfclk_requests; /*< High frequency clock requests. */
volatile uint32_t m_lfclk_requests; /*< Low frequency clock requests. */
/**@brief Function for starting LFCLK. This function will return immediately without waiting for start.
*/
static void lfclk_start(void)
{
nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED);
nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTART);
}
/**@brief Function for stopping LFCLK and calibration (if it was set up).
*/
static void lfclk_stop(void)
{
nrf_clock_task_trigger(NRF_CLOCK_TASK_LFCLKSTOP);
while (nrf_clock_lf_is_running()) {}
}
static void hfclk_start(void)
{
nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED);
nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTART);
}
static void hfclk_stop(void)
{
nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP);
while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY)) {}
}
uint32_t nrf_drv_clock_init(void)
{
nrf_clock_lf_src_set(NRF_CLOCK_LFCLK_Xtal);
return 0;
}
void nrf_drv_clock_uninit(void)
{
lfclk_stop();
hfclk_stop();
}
void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t *p_handler_item)
{
volatile uint32_t lfclk_requests;
(void) p_handler_item;
do
{
lfclk_requests = __LDREXW(&m_lfclk_requests);
lfclk_requests += 1;
}
while (__STREXW(lfclk_requests, &m_lfclk_requests));
if (!nrf_clock_lf_is_running())
{
lfclk_start();
}
}
void nrf_drv_clock_lfclk_release(void)
{
volatile uint32_t lfclk_requests;
do
{
lfclk_requests = __LDREXW(&m_lfclk_requests);
lfclk_requests -= 1;
}
while (__STREXW(lfclk_requests, &m_lfclk_requests));
if (nrf_clock_lf_is_running() && m_lfclk_requests == 0)
{
lfclk_stop();
}
}
bool nrf_drv_clock_lfclk_is_running(void)
{
return nrf_clock_lf_is_running();
}
void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t *p_handler_item)
{
volatile uint32_t hfclk_requests;
(void) p_handler_item;
do
{
hfclk_requests = __LDREXW(&m_hfclk_requests);
hfclk_requests += 1;
}
while (__STREXW(hfclk_requests, &m_hfclk_requests));
if (!nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY))
{
hfclk_start();
}
}
void nrf_drv_clock_hfclk_release(void)
{
volatile uint32_t hfclk_requests;
do
{
hfclk_requests = __LDREXW(&m_hfclk_requests);
hfclk_requests -= 1;
}
while (__STREXW(hfclk_requests, &m_hfclk_requests));
if (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY) && m_hfclk_requests == 0)
{
hfclk_stop();
}
}
bool nrf_drv_clock_hfclk_is_running(void)
{
return nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY);
}
third_party/NordicSemiconductor/drivers/nrf_drv_clock.h
Vendored
+143
View File
@@ -0,0 +1,143 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_DRV_CLOCK_H__
#define NRF_DRV_CLOCK_H__
#include <stdbool.h>
#include <stdint.h>
#include <nrf_clock.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Simplify version to keep API of SDK.
*/
typedef void nrf_drv_clock_handler_item_t;
/**
* @brief Function for initializing the nrf_drv_clock module.
*
* After initialization, the module is in power off state (clocks are not requested).
*
* @retval NRF_SUCCESS If the procedure was successful.
* @retval NRF_ERROR_MODULE_ALREADY_INITIALIZED If the driver was already initialized.
*/
uint32_t nrf_drv_clock_init(void);
/**
* @brief Function for uninitializing the clock module.
*
*/
void nrf_drv_clock_uninit(void);
/**
* @brief Function for requesting the LFCLK.
*
* The low-frequency clock can be requested by different modules
* or contexts. The driver ensures that the clock will be started only when it is requested
* the first time. If the clock is not ready but it was already started, the handler item that is
* provided as an input parameter is added to the list of handlers that will be notified
* when the clock is started. If the clock is already enabled, user callback is called from the
* current context.
*
* The first request will start the selected LFCLK source. If an event handler is
* provided, it will be called once the LFCLK is started. If the LFCLK was already started at this
* time, the event handler will be called from the context of this function. Additionally,
* the @ref nrf_drv_clock_lfclk_is_running function can be polled to check if the clock has started.
*
* @note When a SoftDevice is enabled, the LFCLK is always running and the driver cannot control it.
*
* @note The handler item provided by the user cannot be an automatic variable.
*
* @param[in] p_handler_item A pointer to the event handler structure.
*/
void nrf_drv_clock_lfclk_request(nrf_drv_clock_handler_item_t *p_handler_item);
/**
* @brief Function for releasing the LFCLK.
*
* If there are no more requests, the LFCLK source will be stopped.
*
* @note When a SoftDevice is enabled, the LFCLK is always running.
*/
void nrf_drv_clock_lfclk_release(void);
/**
* @brief Function for checking the LFCLK state.
*
* @retval true If the LFCLK is running.
* @retval false If the LFCLK is not running.
*/
bool nrf_drv_clock_lfclk_is_running(void);
/**
* @brief Function for requesting the high-accuracy source HFCLK.
*
* The high-accuracy source
* can be requested by different modules or contexts. The driver ensures that the high-accuracy
* clock will be started only when it is requested the first time. If the clock is not ready
* but it was already started, the handler item that is provided as an input parameter is added
* to the list of handlers that will be notified when the clock is started.
*
* If an event handler is provided, it will be called once the clock is started. If the clock was already
* started at this time, the event handler will be called from the context of this function. Additionally,
* the @ref nrf_drv_clock_hfclk_is_running function can be polled to check if the clock has started.
*
* @note If a SoftDevice is running, the clock is managed by the SoftDevice and all requests are handled by
* the SoftDevice. This function cannot be called from all interrupt priority levels in that case.
* @note The handler item provided by the user cannot be an automatic variable.
*
* @param[in] p_handler_item A pointer to the event handler structure.
*/
void nrf_drv_clock_hfclk_request(nrf_drv_clock_handler_item_t *p_handler_item);
/**
* @brief Function for releasing the high-accuracy source HFCLK.
*
* If there are no more requests, the high-accuracy source will be released.
*/
void nrf_drv_clock_hfclk_release(void);
/**
* @brief Function for checking the HFCLK state.
*
* @retval true If the HFCLK is running (for \nRFXX XTAL source).
* @retval false If the HFCLK is not running.
*/
bool nrf_drv_clock_hfclk_is_running(void);
#ifdef __cplusplus
}
#endif
#endif // NRF_CLOCK_H__
third_party/NordicSemiconductor/drivers/nrf_drv_radio802154.c
Vendored
+1617
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/drivers/nrf_drv_radio802154.h
Vendored
+337
View File
@@ -0,0 +1,337 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @brief This module contains generic 802.15.4 radio driver for nRF SoC devices.
*
*/
#ifndef NRF_RADIO802154_H_
#define NRF_RADIO802154_H_
#include <stdbool.h>
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize 802.15.4 driver.
*
* @note This function shall be called once, before any other function from this module.
*
* Initialize radio peripheral to Sleep state.
*/
void nrf_drv_radio802154_init(void);
/**
* @brief Get channel on which the radio operates right now.
*/
uint8_t nrf_drv_radio802154_channel_get(void);
/**
* @section Setting addresses and Pan Id of this device.
*/
/**
* @brief Set PAN Id used by this device.
*
* @param[in] p_pan_id Pointer to PAN Id (2 bytes, little-endian).
*
* This function makes copy of the PAN Id.
*/
void nrf_drv_radio802154_pan_id_set(const uint8_t *p_pan_id);
/**
* @brief Set Extended Address of this device.
*
* @param[in] p_extended_address Pointer to extended address (8 bytes, little-endian).
*
* This function makes copy of the address.
*/
void nrf_drv_radio802154_extended_address_set(const uint8_t *p_extended_address);
/**
* @brief Set Short Address of this device.
*
* @param[in] p_short_address Pointer to short address (2 bytes, little-endian).
*
* This function makes copy of the address.
*/
void nrf_drv_radio802154_short_address_set(const uint8_t *p_short_address);
/**
* @section Functions to request FSM transitions.
*
* receive() transmit()
* --------> -------->
* Sleep Receive Transmit
* <-------- | /|\<--------
* sleep() | | receive() / transmitted() / busy_channel()
* | |
* energy_detection() | | energy_detected()
* \|/ |
* Energy detection
*/
/**
* @brief Change radio state to Sleep.
*
* @note This function should be called only if radio is in Receive state.
*
* Sleep state is the lowest power state. In this state radio cannot transmit or receive frames.
*
* @return true If the radio changes it's state to low power mode.
* @return false If the driver could not schedule changing state.
*/
bool nrf_drv_radio802154_sleep(void);
/**
* @brief Change radio state to Receive.
*
* @note This function should be called in Sleep or Transmit state.
*
* In Receive state radio receives frames and automatically sends ACK frames when appropriate.
* Received frame is reported to higher layer by nrf_radio802154_received() call.
*
* @param[in] channel Channel number on which radio will receive.
*/
void nrf_drv_radio802154_receive(uint8_t channel);
/**
* @brief Change radio state to Transmit.
*
* @note This function should be called in Receive state. In other states transmission will be
* scheduled.
*
* In Transmit state radio transmits given frame. If requested it waits for ACK frame.
* Radio driver wait infinitely for ACK frame. Higher layer is responsible to call
* nrf_radio802154_receive() after ACK timeout.
* Transmission result is reported to higher layer by nrf_radio802154_transmitted() or
* nrf_radio802154_busy_channel() calls.
*
* @param[in] p_data Pointer to array containing data to transmit. First byte should contain
* frame length and following bytes should contain data. CRC is computed
* automatically by radio hardware and can contain any bytes.
* @param[in] channel Channel number on which radio will transmit given frame.
* @param[in] power Transmission power [dBm]. Given value is rounded up to nearest permitted
* value.
*
* @return true If the transmission procedure was scheduled.
* @return false If the driver could not schedule the transmission procedure.
*/
bool nrf_drv_radio802154_transmit(const uint8_t *p_data, uint8_t channel, int8_t power);
/**
* @brief Change radio state to Energy Detection.
*
* @note This function should be called in Receive state. In other states energy detection
* procedure will be scheduled.
*
* In Energy Detection state radio detects maximum energy for given time. Result of the detection
* is reported to the higher layer by nrf_radio802154_energy_detected() call.
*
* @param[in] channel Channel number on which radio will detect energy.
* @param[in] time_us Duration of energy detection procedure. Given value is rounded up to
* multiplication of 10s (128 us).
*
* @return true If the energy detection procedure was scheduled.
* @return false If the driver could not schedule the energy detection procedure.
*/
bool nrf_drv_radio802154_energy_detection(uint8_t channel, uint32_t time_us);
/**
* @section Calls to higher layer.
*/
/**
* @brief Notify that frame was received.
*
* @note Buffer pointed by the p_data pointer is not modified by the radio driver (and can't
* be used to receive a frame) until nrf_drv_radio802154_buffer_free() function is called.
* @note Buffer pointed by the p_data pointer may be modified by the function handler (and other
* modules) until nrf_drv_radio802154_buffer_free() function is called.
*
* @param[in] p_data Pointer to buffer containing received data. First byte in the buffer is
* length of the frame and following bytes is the frame itself (after PHR).
* @param[in] power RSSI of received frame.
* @param[in] lqi LQI of received frame.
*/
void nrf_drv_radio802154_received(uint8_t * p_data, int8_t power, int8_t lqi);
/**
* @brief Notify that frame was transmitted.
*
* @note If ACK was requested for transmitted frame this function is called after proper ACK is
* received. If ACK was not requested this function is called just after transmission is
* ended.
*
* @param[in] pending_bit Value of pending bit in received ACK or false if ACK was not requested.
*/
void nrf_drv_radio802154_transmitted(bool pending_bit);
/**
* @brief Notify that frame was not transmitted due to busy channel.
*
* This function is called if CCA procedure (performed just before transmission) fails.
*/
void nrf_drv_radio802154_busy_channel(void);
/**
* @brief Notify that Energy Detection procedure finished.
*
* @param[in] result Maximum energy detected during Energy Detection procedure.
*/
void nrf_drv_radio802154_energy_detected(int8_t result);
/**
* @section Driver memory management
*/
/**
* @brief Notify driver that buffer containing received frame is not used anymore.
*
* @note The buffer pointed by the @p p_data pointer may be modified by this function.
*
* @param[in] p_data A pointer to the buffer containing received data that is no more needed by
* the higher layer.
*/
void nrf_drv_radio802154_buffer_free(uint8_t * p_data);
/**
* @section RSSI measurement function.
*/
/**
* @brief Begin RSSI measurement.
*
* @note This function should be called in Receive state.
*
* Begin RSSI measurement. The result will be available in 8 uS. The result can be read by
* nrf_radio802154_rssi_last_get() function.
*/
void nrf_drv_radio802154_rssi_measure(void);
/**
* @brief Get result of last RSSI measurement.
*
* @returns RSSI measurement result [dBm].
*/
int8_t nrf_drv_radio802154_rssi_last_get(void);
/**
* @section Promiscuous mode.
*/
/**
* @brief Enable or disable promiscuous radio mode.
*
* In promiscuous mode driver notifies higher layer that it received any frame (regardless
* frame type or destination address).
* In normal mode (not promiscuous) higher layer is not notified about ACK frames and frames with
* unknown type. Also frames with destination address not matching this device address are ignored.
*
* @param[in] enabled If promiscuous mode should be enabled.
*/
void nrf_drv_radio802154_promiscuous_set(bool enabled);
/**
* @brief Check if radio is in promiscuous mode.
*
* @retval True Radio is in promiscuous mode.
* @retval False Radio is not in promiscuous mode.
*/
bool nrf_drv_radio802154_promiscuous_get(void);
/**
* @section Setting pending bit in automatically transmitted ACK frames.
*/
/**
* @brief Enable or disable setting pending bit in automatically transmitted ACK frames.
*
* Radio driver automatically sends ACK frames in response to unicast frames destined to this node.
* Pending bit in ACK frame can be set or cleared regarding data in pending buffer destined to ACK
* destination.
*
* If setting pending bit in ACK frames is disabled, pending bit in every ACK frame is set.
* If setting pending bit in ACK frames is enabled, radio driver checks if there is data
* in pending buffer destined to ACK destination. If there is no such data, pending bit is cleared.
*
* @note It is possible that if there is a lot of supported peers radio driver cannot verify
* if there is pending data before ACK is sent. In this case pending bit is set.
*
* @param[in] enabled If setting pending bit in ACK frames is enabled.
*/
void nrf_drv_radio802154_auto_pending_bit_set(bool enabled);
/**
* @brief Add address of peer node for which there is pending data in the buffer.
*
* @note This function makes a copy of given address.
*
* @param[in] p_addr Array of bytes containing address of the node (little-endian).
* @param[in] extended If given address is Extended MAC Address or Short MAC Address.
*
* @retval True Address successfully added to the list.
* @retval False There is not enough memory to store this address in the list.
*/
bool nrf_drv_radio802154_pending_bit_for_addr_set(const uint8_t *p_addr, bool extended);
/**
* @brief Remove address of peer node for which there is no more pending data in the buffer.
*
* @param[in] p_addr Array of bytes containing address of the node (little-endian).
* @param[in] extended If given address is Extended MAC Address or Short MAC Address.
*
* @retval True Address successfully removed from the list.
* @retval False There is no such address in the list.
*/
bool nrf_drv_radio802154_pending_bit_for_addr_clear(const uint8_t *p_addr, bool extended);
/**
* @brief Remove all addresses of given type from pending bit list.
*
* @param[in] extended If function should remove all Exnteded MAC Adresses of all Short Addresses.
*/
void nrf_drv_radio802154_pending_bit_for_addr_reset(bool extended);
#ifdef __cplusplus
}
#endif
#endif /* NRF_RADIO802154_H_ */
third_party/NordicSemiconductor/hal/nrf_assert.h
Vendored
+52
View File
@@ -0,0 +1,52 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/** @file
* @brief Utilities for verifying program logic
*/
#ifndef NRF_ASSERT_H_
#define NRF_ASSERT_H_
#ifdef __cplusplus
extern "C" {
#endif
#define ASSERT(expr) \
if (!(expr)) \
{ \
while(1); \
}
#ifdef __cplusplus
}
#endif
#endif /* NRF_ASSERT_H_ */
third_party/NordicSemiconductor/hal/nrf_clock.h
Vendored
+392
View File
@@ -0,0 +1,392 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_CLOCK_H__
#define NRF_CLOCK_H__
#include <stddef.h>
#include <stdbool.h>
#include "nrf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrf_clock_hal Clock HAL
* @{
* @ingroup nrf_clock
* @brief Hardware access layer for managing the low-frequency clock (LFCLK) and the high-frequency clock (HFCLK).
*/
#define NRF_CLOCK_TASK_TRIGGER (1UL)
#define NRF_CLOCK_EVENT_CLEAR (0UL)
/**
* @brief Low-frequency clock sources.
* @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers.
*/
typedef enum
{
NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */
NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */
NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth /**< Internal 32 kHz synthesizer from HFCLK system clock. */
} nrf_clock_lfclk_t;
/**
* @brief High-frequency clock sources.
*/
typedef enum
{
NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */
NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */
} nrf_clock_hfclk_t;
/**
* @brief Trigger status of task LFCLKSTART/HFCLKSTART.
* @details Used by LFCLKRUN and HFCLKRUN registers.
*/
typedef enum
{
NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */
NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
} nrf_clock_start_task_status_t;
/**
* @brief Interrupts.
*/
typedef enum
{
NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk /**< Interrupt on CTTO event. */
} nrf_clock_int_mask_t;
/**
* @brief Tasks.
*
* @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
* The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/
NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/
NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source.*/
NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source.*/
NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator.*/
NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/
NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/
} nrf_clock_task_t; /*lint -restore */
/**
* @brief Events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/
NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
} nrf_clock_event_t; /*lint -restore */
/**
* @brief Function for enabling a specific interrupt.
*
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask);
/**
* @brief Function for disabling a specific interrupt.
*
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask);
/**
* @brief Function for retrieving the state of a specific interrupt.
*
* @param[in] int_mask Interrupt.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask);
/**
* @brief Function for retrieving the address of a specific task.
* @details This function can be used by the PPI module.
*
* @param[in] task Task.
*
* @return Address of the requested task register.
*/
__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task);
/**
* @brief Function for setting a specific task.
*
* @param[in] task Task.
*/
__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task);
/**
* @brief Function for retrieving the address of a specific event.
* @details This function can be used by the PPI module.
*
* @param[in] event Event.
*
* @return Address of the requested event register.
*/
__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event);
/**
* @brief Function for clearing a specific event.
*
* @param[in] event Event.
*/
__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event);
/**
* @brief Function for retrieving the state of a specific event.
*
* @param[in] event Event.
*
* @retval true If the event is set.
* @retval false If the event is not set.
*/
__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event);
/**
* @brief Function for changing the low-frequency clock source.
* @details This function cannot be called when the low-frequency clock is running.
*
* @param[in] source New low-frequency clock source.
*
*/
__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source);
/**
* @brief Function for retrieving the selected source for the low-frequency clock.
*
* @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the selected source for the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the selected source for the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the selected source for the low-frequency clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
/**
* @brief Function for retrieving the active source of the low-frequency clock.
*
* @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is the active source of the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is the active source of the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is the active source of the low-frequency clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
/**
* @brief Function for retrieving the clock source for the LFCLK clock when the task LKCLKSTART is triggered.
*
* @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator is running and generating the LFCLK clock.
* @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator is running and generating the LFCLK clock.
* @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from the HFCLK is running and generating the LFCLK clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
/**
* @brief Function for retrieving the state of the LFCLK clock.
*
* @retval false If the LFCLK clock is not running.
* @retval true If the LFCLK clock is running.
*/
__STATIC_INLINE bool nrf_clock_lf_is_running(void);
/**
* @brief Function for retrieving the trigger status of the task LFCLKSTART.
*
* @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered.
* @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered.
*/
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void);
/**
* @brief Function for retrieving the active source of the high-frequency clock.
*
* @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal 16 MHz RC oscillator is the active source of the high-frequency clock.
* @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external 16 MHz/32 MHz crystal oscillator is the active source of the high-frequency clock.
*/
__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
/**
* @brief Function for retrieving the state of the HFCLK clock.
*
* @param[in] clk_src Clock source to be checked.
*
* @retval false If the HFCLK clock is not running.
* @retval true If the HFCLK clock is running.
*/
__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
/**
* @brief Function for retrieving the trigger status of the task HFCLKSTART.
*
* @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered.
* @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered.
*/
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
/**
* @brief Function for changing the calibration timer interval.
*
* @param[in] interval New calibration timer interval in 0.25 s resolution (range: 0.25 seconds to 31.75 seconds).
*/
__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask)
{
NRF_CLOCK->INTENSET = int_mask;
}
__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask)
{
NRF_CLOCK->INTENCLR = int_mask;
}
__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask)
{
return (bool)(NRF_CLOCK->INTENCLR & int_mask);
}
__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task)
{
return ((uint32_t)NRF_CLOCK + task);
}
__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task)
{
*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER;
}
__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
{
return ((uint32_t)NRF_CLOCK + event);
}
__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event)
{
return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event));
}
__STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source)
{
NRF_CLOCK->LFCLKSRC =
(uint32_t)((source << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
}
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void)
{
return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRC &
CLOCK_LFCLKSRC_SRC_Msk) >> CLOCK_LFCLKSRC_SRC_Pos);
}
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void)
{
return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSTAT &
CLOCK_LFCLKSTAT_SRC_Msk) >> CLOCK_LFCLKSTAT_SRC_Pos);
}
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void)
{
return (nrf_clock_lfclk_t)((NRF_CLOCK->LFCLKSRCCOPY &
CLOCK_LFCLKSRCCOPY_SRC_Msk) >> CLOCK_LFCLKSRCCOPY_SRC_Pos);
}
__STATIC_INLINE bool nrf_clock_lf_is_running(void)
{
return ((NRF_CLOCK->LFCLKSTAT &
CLOCK_LFCLKSTAT_STATE_Msk) >> CLOCK_LFCLKSTAT_STATE_Pos);
}
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void)
{
return (nrf_clock_start_task_status_t)((NRF_CLOCK->LFCLKRUN &
CLOCK_LFCLKRUN_STATUS_Msk) >>
CLOCK_LFCLKRUN_STATUS_Pos);
}
__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void)
{
return (nrf_clock_hfclk_t)((NRF_CLOCK->HFCLKSTAT &
CLOCK_HFCLKSTAT_SRC_Msk) >> CLOCK_HFCLKSTAT_SRC_Pos);
}
__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src)
{
return (NRF_CLOCK->HFCLKSTAT & (CLOCK_HFCLKSTAT_STATE_Msk | CLOCK_HFCLKSTAT_SRC_Msk)) ==
(CLOCK_HFCLKSTAT_STATE_Msk | (clk_src << CLOCK_HFCLKSTAT_SRC_Pos));
}
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void)
{
return (nrf_clock_start_task_status_t)((NRF_CLOCK->HFCLKRUN &
CLOCK_HFCLKRUN_STATUS_Msk) >>
CLOCK_HFCLKRUN_STATUS_Pos);
}
__STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval)
{
NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/**
*@}
**/
#ifdef __cplusplus
}
#endif
#endif // NRF_CLOCK_H__
third_party/NordicSemiconductor/hal/nrf_egu.h
Vendored
+354
View File
@@ -0,0 +1,354 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_EGU_H__
#define NRF_EGU_H__
/**
* @defgroup nrf_egu EGU (Event Generator Unit) abstraction
* @{
* @ingroup nrf_drivers
* @brief @tagAPI52 EGU (Event Generator Unit) module functions.
*
*/
#include <stddef.h>
#include <stdbool.h>
#include <stdint.h>
#include "nrf_assert.h"
#include "nrf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @enum nrf_egu_task_t
* @brief EGU tasks.
*/
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */
NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */
NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */
NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */
NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */
NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */
NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */
NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */
NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */
NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */
NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
/*lint -restore*/
} nrf_egu_task_t;
/**
* @enum nrf_egu_event_t
* @brief EGU events.
*/
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */
NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */
NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */
NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */
NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */
NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */
NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */
NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */
NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */
NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */
NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
/*lint -restore*/
} nrf_egu_event_t;
/**
* @enum nrf_egu_int_mask_t
* @brief EGU interrupts.
*/
typedef enum
{
NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */
NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */
NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */
NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */
NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */
NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */
NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */
NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */
NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */
NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */
NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */
NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */
NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */
NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */
NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */
NRF_EGU_INT_ALL = 0xFFFFuL
} nrf_egu_int_mask_t;
/**@brief Function for getting max channel number of given EGU.
*
* @param NRF_EGUx EGU instance.
*
* @returns number of available channels.
*/
__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type *NRF_EGUx)
{
if (NRF_EGUx == NRF_EGU0)
{
return EGU0_CH_NUM;
}
if (NRF_EGUx == NRF_EGU1)
{
return EGU1_CH_NUM;
}
if (NRF_EGUx == NRF_EGU2)
{
return EGU2_CH_NUM;
}
if (NRF_EGUx == NRF_EGU3)
{
return EGU3_CH_NUM;
}
if (NRF_EGUx == NRF_EGU4)
{
return EGU4_CH_NUM;
}
if (NRF_EGUx == NRF_EGU5)
{
return EGU5_CH_NUM;
}
return 0;
}
/**
* @brief Function for triggering a specific EGU task.
*
* @param NRF_EGUx EGU instance.
* @param egu_task EGU task.
*/
__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type *NRF_EGUx, nrf_egu_task_t egu_task)
{
*((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL;
}
/**
* @brief Function for returning the address of a specific EGU task register.
*
* @param NRF_EGUx EGU instance.
* @param egu_task EGU task.
*/
__STATIC_INLINE uint32_t *nrf_egu_task_address_get(NRF_EGU_Type *NRF_EGUx,
nrf_egu_task_t egu_task)
{
return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task);
}
/**
* @brief Function for returning the address of a specific EGU TRIGGER task register.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*/
__STATIC_INLINE uint32_t *nrf_egu_task_trigger_addres_get(NRF_EGU_Type *NRF_EGUx,
uint8_t channel)
{
ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (uint32_t *)&NRF_EGUx->TASKS_TRIGGER[channel];
}
/**
* @brief Function for returning the specific EGU TRIGGER task.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*/
__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type *NRF_EGUx, uint8_t channel)
{
ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t)));
}
/**
* @brief Function for returning the state of a specific EGU event.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event to check.
*/
__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type *NRF_EGUx,
nrf_egu_event_t egu_event)
{
return (bool) * (volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
}
/**
* @brief Function for clearing a specific EGU event.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event to clear.
*/
__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type *NRF_EGUx,
nrf_egu_event_t egu_event)
{
*((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event));
(void)dummy;
#endif
}
/**
* @brief Function for returning the address of a specific EGU event register.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event.
*/
__STATIC_INLINE uint32_t *nrf_egu_event_address_get(NRF_EGU_Type *NRF_EGUx,
nrf_egu_event_t egu_event)
{
return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
}
/**
* @brief Function for returning the address of a specific EGU TRIGGERED event register.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*/
__STATIC_INLINE uint32_t *nrf_egu_event_triggered_addres_get(NRF_EGU_Type *NRF_EGUx,
uint8_t channel)
{
ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (uint32_t *)&NRF_EGUx->EVENTS_TRIGGERED[channel];
}
/**
* @brief Function for returning the specific EGU TRIGGERED event.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*/
__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type *NRF_EGUx,
uint8_t channel)
{
ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
}
/**
* @brief Function for enabling one or more specific EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param egu_int_mask Interrupts to enable.
*/
__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type *NRF_EGUx, uint32_t egu_int_mask)
{
NRF_EGUx->INTENSET = egu_int_mask;
}
/**
* @brief Function for retrieving the state of one or more EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param egu_int_mask Interrupts to check.
*
* @retval true If all of the specified interrupts are enabled.
* @retval false If at least one of the specified interrupts is disabled.
*/
__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type *NRF_EGUx, uint32_t egu_int_mask)
{
return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
}
/**
* @brief Function for disabling one or more specific EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param egu_int_mask Interrupts to disable.
*/
__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type *NRF_EGUx, uint32_t egu_int_mask)
{
NRF_EGUx->INTENCLR = egu_int_mask;
}
/**
* @brief Function for retrieving one or more specific EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*
* @returns EGU interrupt mask.
*/
__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type *NRF_EGUx, uint8_t channel)
{
ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (nrf_egu_int_mask_t)((uint32_t)(EGU_INTENSET_TRIGGERED0_Msk << channel));
}
/** @} */
#ifdef __cplusplus
}
#endif
#endif
third_party/NordicSemiconductor/hal/nrf_gpio.h
Vendored
+786
View File
@@ -0,0 +1,786 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_GPIO_H__
#define NRF_GPIO_H__
#include "nrf.h"
#include "nrf_peripherals.h"
#include "nrf_assert.h"
#include <stdbool.h>
#include <stdlib.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrf_gpio GPIO abstraction
* @{
* @ingroup nrf_drivers
* @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
*/
#if (GPIO_COUNT == 1)
#define NUMBER_OF_PINS (P0_PIN_NUM)
#define GPIO_REG_LIST {NRF_GPIO}
#elif (GPIO_COUNT == 2)
#define NUMBER_OF_PINS (P0_PIN_NUM + P1_PIN_NUM)
#define GPIO_REG_LIST {NRF_P0, NRF_P1}
#else
#error "Not supported."
#endif
/**
* @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions.
*/
#define NRF_GPIO_PIN_MAP(port, pin) ((port << 5) | (pin & 0x1F))
/**
* @brief Pin direction definitions.
*/
typedef enum
{
NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input.
NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output.
} nrf_gpio_pin_dir_t;
/**
* @brief Connection of input buffer.
*/
typedef enum
{
NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer.
NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer.
} nrf_gpio_pin_input_t;
/**
* @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration.
*/
typedef enum
{
NRF_GPIO_PIN_NOPULL = GPIO_PIN_CNF_PULL_Disabled, ///< Pin pull-up resistor disabled.
NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///< Pin pull-down resistor enabled.
NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled.
} nrf_gpio_pin_pull_t;
/**
* @brief Enumerator used for selecting output drive mode.
*/
typedef enum
{
NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'.
NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High-drive '0', standard '1'.
NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high-drive '1'.
NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high-drive '1'.
NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'.
NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high-drive '1'.
NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0', disconnect '1'.
NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'.
} nrf_gpio_pin_drive_t;
/**
* @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
*/
typedef enum
{
NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
NRF_GPIO_PIN_SENSE_LOW = GPIO_PIN_CNF_SENSE_Low, ///< Pin sense low level.
NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
} nrf_gpio_pin_sense_t;
#if (__LINT__ != 1)
/**
* @brief Function for configuring the GPIO pin range as output pins with normal drive strength.
* This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
*
* @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output.
* Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
*/
__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end);
/**
* @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details.
* This function can be used to configure pin range as simple input.
*
* @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*
* @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input.
* Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
*/
__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start,
uint32_t pin_range_end,
nrf_gpio_pin_pull_t pull_config);
/**
* @brief Pin configuration function.
*
* The main pin configuration function.
* This function allows to set any aspect in PIN_CNF register.
* @param pin_number Specifies the pin number.
* @param dir Pin direction.
* @param input Connect or disconnect the input buffer.
* @param pull Pull configuration.
* @param drive Drive configuration.
* @param sense Pin sensing mechanism.
*/
__STATIC_INLINE void nrf_gpio_cfg(
uint32_t pin_number,
nrf_gpio_pin_dir_t dir,
nrf_gpio_pin_input_t input,
nrf_gpio_pin_pull_t pull,
nrf_gpio_pin_drive_t drive,
nrf_gpio_pin_sense_t sense);
/**
* @brief Function for configuring the given GPIO pin number as output, hiding inner details.
* This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
*
* @param pin_number Specifies the pin number.
*
* @note Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
*/
__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
/**
* @brief Function for configuring the given GPIO pin number as input, hiding inner details.
* This function can be used to configure a pin as simple input.
*
* @param pin_number Specifies the pin number.
* @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*
* @note Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
*/
__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config);
/**
* @brief Function for resetting pin configuration to its default state.
*
* @param pin_number Specifies the pin number.
*/
__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number);
/**
* @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected.
*
* @param pin_number Specifies the pin number.
*
*/
__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
/**
* @brief Function for disconnecting input for the given GPIO.
*
* @param pin_number Specifies the pin number.
*
*/
__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
/**
* @brief Function for configuring the given GPIO pin number as input, hiding inner details.
* This function can be used to configure pin range as simple input.
* Sense capability on the pin is configurable and input is connected to buffer so that the GPIO->IN register is readable.
*
* @param pin_number Specifies the pin number.
* @param pull_config State of the pin pull resistor (no pull, pulled down, or pulled high).
* @param sense_config Sense level of the pin (no sense, sense low, or sense high).
*/
__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number,
nrf_gpio_pin_pull_t pull_config,
nrf_gpio_pin_sense_t sense_config);
/**
* @brief Function for configuring sense level for the given GPIO.
*
* @param pin_number Specifies the pin number.
* @param sense_config Sense configuration.
*
*/
__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config);
/**
* @brief Function for setting the direction for a GPIO pin.
*
* @param pin_number Specifies the pin number for which to set the direction.
*
* @param direction Specifies the direction.
*/
__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction);
/**
* @brief Function for setting a GPIO pin.
*
* Note that the pin must be configured as an output for this function to have any effect.
*
* @param pin_number Specifies the pin number to set.
*/
__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
/**
* @brief Function for clearing a GPIO pin.
*
* Note that the pin must be configured as an output for this
* function to have any effect.
*
* @param pin_number Specifies the pin number to clear.
*/
__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number);
/**
* @brief Function for toggling a GPIO pin.
*
* Note that the pin must be configured as an output for this
* function to have any effect.
*
* @param pin_number Specifies the pin number to toggle.
*/
__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number);
/**
* @brief Function for writing a value to a GPIO pin.
*
* Note that the pin must be configured as an output for this
* function to have any effect.
*
* @param pin_number Specifies the pin number to write.
*
* @param value Specifies the value to be written to the pin.
* @arg 0 Clears the pin.
* @arg >=1 Sets the pin.
*/
__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value);
/**
* @brief Function for reading the input level of a GPIO pin.
*
* Note that the pin must have input connected for the value
* returned from this function to be valid.
*
* @param pin_number Specifies the pin number to read.
*
* @return 0 if the pin input level is low. Positive value if the pin is high.
*/
__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number);
/**
* @brief Function for reading the output level of a GPIO pin.
*
* @param pin_number Specifies the pin number to read.
*
* @return 0 if the pin output level is low. Positive value if pin output is high.
*/
__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number);
/**
* @brief Function for reading the sense configuration of a GPIO pin.
*
* @param pin_number Specifies the pin number to read.
*
* @retval Sense configuration.
*/
__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number);
/**
* @brief Function for setting output direction on selected pins on a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param out_mask Mask specifying the pins to set as output.
*
*/
__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask);
/**
* @brief Function for setting input direction on selected pins on a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param in_mask Mask specifying the pins to set as input.
*
*/
__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask);
/**
* @brief Function for writing the direction configuration of GPIO pins in a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output.
*
*/
__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask);
/**
* @brief Function for reading the direction configuration of a GPIO port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
* @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for reading the input signals of GPIO pins on a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
* @retval Port input values.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for reading the output signals of GPIO pins of a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
* @retval Port output values.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for writing the GPIO pins output on a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param value Output port mask.
*
*/
__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value);
/**
* @brief Function for setting high level on selected GPIO pins of a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param set_mask Mask with pins to set as logical high level.
*
*/
__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask);
/**
* @brief Function for setting low level on selected GPIO pins of a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param clr_mask Mask with pins to set as logical low level.
*
*/
__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask);
/**
* @brief Function for reading pins state of multiple consecutive ports.
*
* @param start_port Index of the first port to read.
* @param length Number of ports to read.
* @param p_masks Pointer to output array where port states will be stored.
*/
__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks);
#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT
/**
* @brief Function for reading latch state of multiple consecutive ports.
*
* @param start_port Index of the first port to read.
* @param length Number of ports to read.
* @param p_masks Pointer to output array where latch states will be stored.
*/
__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length,
uint32_t * p_masks);
/**
* @brief Function for reading latch state of single pin.
*
* @param pin_number Pin number.
* @return 0 if latch is not set. Positive value otherwise.
*
*/
__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number);
/**
* @brief Function for clearing latch state of a single pin.
*
* @param pin_number Pin number.
*
*/
__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number);
#endif
#endif // #ifndef (__LINT__ != 1)
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
/**
* @brief Function for extracting port and relative pin number from absolute pin number.
*
* @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number.
*
* @return Pointer to port register set.
*
*/
__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin)
{
ASSERT(*p_pin < NUMBER_OF_PINS);
#if (GPIO_COUNT == 1)
// The oldest definition case
return NRF_GPIO;
#else
if (*p_pin < P0_PIN_NUM)
{
return NRF_P0;
}
else
{
*p_pin = *p_pin & (P0_PIN_NUM - 1);
return NRF_P1;
}
#endif
}
__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
{
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
for (; pin_range_start <= pin_range_end; pin_range_start++)
{
nrf_gpio_cfg_output(pin_range_start);
}
}
__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start,
uint32_t pin_range_end,
nrf_gpio_pin_pull_t pull_config)
{
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
for (; pin_range_start <= pin_range_end; pin_range_start++)
{
nrf_gpio_cfg_input(pin_range_start, pull_config);
}
}
__STATIC_INLINE void nrf_gpio_cfg(
uint32_t pin_number,
nrf_gpio_pin_dir_t dir,
nrf_gpio_pin_input_t input,
nrf_gpio_pin_pull_t pull,
nrf_gpio_pin_drive_t drive,
nrf_gpio_pin_sense_t sense)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
| ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos)
| ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)
| ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
| ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos);
}
__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
{
nrf_gpio_cfg(
pin_number,
NRF_GPIO_PIN_DIR_OUTPUT,
NRF_GPIO_PIN_INPUT_DISCONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
}
__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
{
nrf_gpio_cfg(
pin_number,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
pull_config,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
}
__STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number)
{
nrf_gpio_cfg(
pin_number,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_DISCONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
}
__STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos);
}
__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
}
__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number,
nrf_gpio_pin_pull_t pull_config,
nrf_gpio_pin_sense_t sense_config)
{
nrf_gpio_cfg(
pin_number,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
pull_config,
NRF_GPIO_PIN_S0S1,
sense_config);
}
__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
/*lint -e{845} // A zero has been given as right argument to operator '|'" */
reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk;
reg->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos);
}
__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
{
if (direction == NRF_GPIO_PIN_DIR_INPUT)
{
nrf_gpio_cfg(
pin_number,
NRF_GPIO_PIN_DIR_INPUT,
NRF_GPIO_PIN_INPUT_CONNECT,
NRF_GPIO_PIN_NOPULL,
NRF_GPIO_PIN_S0S1,
NRF_GPIO_PIN_NOSENSE);
}
else
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
reg->DIRSET = (1UL << pin_number);
}
}
__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
nrf_gpio_port_out_set(reg, 1UL << pin_number);
}
__STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
nrf_gpio_port_out_clear(reg, 1UL << pin_number);
}
__STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
uint32_t pins_state = reg->OUT;
reg->OUTSET = (~pins_state & (1UL << pin_number));
reg->OUTCLR = (pins_state & (1UL << pin_number));
}
__STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
{
if (value == 0)
{
nrf_gpio_pin_clear(pin_number);
}
else
{
nrf_gpio_pin_set(pin_number);
}
}
__STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
}
__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL);
}
__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
}
__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask)
{
p_reg->DIRSET = out_mask;
}
__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask)
{
p_reg->DIRCLR = in_mask;
}
__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t value)
{
p_reg->DIR = value;
}
__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg)
{
return p_reg->DIR;
}
__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg)
{
return p_reg->IN;
}
__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg)
{
return p_reg->OUT;
}
__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value)
{
p_reg->OUT = value;
}
__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask)
{
p_reg->OUTSET = set_mask;
}
__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask)
{
p_reg->OUTCLR = clr_mask;
}
__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks)
{
NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
ASSERT(start_port + length <= GPIO_COUNT);
uint32_t i;
for (i = start_port; i < (start_port + length); i++)
{
*p_masks = nrf_gpio_port_in_read(gpio_regs[i]);
p_masks++;
}
}
#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT
__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, uint32_t * p_masks)
{
NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
uint32_t i;
for (i = start_port; i < (start_port + length); i++)
{
*p_masks = gpio_regs[i]->LATCH;
p_masks++;
}
}
__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
return (reg->LATCH & (1 << pin_number)) ? 1 : 0;
}
__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number)
{
NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
reg->LATCH = (1 << pin_number);
}
#endif
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#ifdef __cplusplus
}
#endif
#endif
third_party/NordicSemiconductor/hal/nrf_nvmc.c
Vendored
+147
View File
@@ -0,0 +1,147 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
*@file
*@brief NMVC driver implementation
*/
#include <stdbool.h>
#include "nrf.h"
#include "nrf_nvmc.h"
void nrf_nvmc_page_erase(uint32_t address)
{
// Enable erase.
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
// Erase the page
NRF_NVMC->ERASEPAGE = address;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
}
void nrf_nvmc_write_byte(uint32_t address, uint8_t value)
{
uint32_t byte_shift = address & (uint32_t)0x03;
uint32_t address32 = address & ~byte_shift; // Address to the word this byte is in.
uint32_t value32 = (*(uint32_t *)address32 & ~((uint32_t)0xFF << (byte_shift << (uint32_t)3)));
value32 = value32 + ((uint32_t)value << (byte_shift << 3));
// Enable write.
NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos);
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
*(uint32_t *)address32 = value32;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos);
{
}
}
void nrf_nvmc_write_word(uint32_t address, uint32_t value)
{
// Enable write.
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
*(uint32_t *)address = value;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
}
void nrf_nvmc_write_bytes(uint32_t address, const uint8_t *src, uint32_t num_bytes)
{
uint32_t i;
for (i = 0; i < num_bytes; i++)
{
nrf_nvmc_write_byte(address + i, src[i]);
}
}
void nrf_nvmc_write_words(uint32_t address, const uint32_t *src, uint32_t num_words)
{
uint32_t i;
// Enable write.
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
for (i = 0; i < num_words; i++)
{
((uint32_t *)address)[i] = src[i];
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
{
}
}
third_party/NordicSemiconductor/hal/nrf_nvmc.h
Vendored
+114
View File
@@ -0,0 +1,114 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @file
* @brief NMVC driver API.
*/
#ifndef NRF_NVMC_H__
#define NRF_NVMC_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrf_nvmc Non-volatile memory controller
* @{
* @ingroup nrf_drivers
* @brief Driver for the NVMC peripheral.
*
* This driver allows writing to the non-volatile memory (NVM) regions
* of the chip. In order to write to NVM the controller must be powered
* on and the relevant page must be erased.
*
*/
/**
* @brief Erase a page in flash. This is required before writing to any
* address in the page.
*
* @param address Start address of the page.
*/
void nrf_nvmc_page_erase(uint32_t address);
/**
* @brief Write a single byte to flash.
*
* The function reads the word containing the byte, and then
* rewrites the entire word.
*
* @param address Address to write to.
* @param value Value to write.
*/
void nrf_nvmc_write_byte(uint32_t address , uint8_t value);
/**
* @brief Write a 32-bit word to flash.
* @param address Address to write to.
* @param value Value to write.
*/
void nrf_nvmc_write_word(uint32_t address, uint32_t value);
/**
* @brief Write consecutive bytes to flash.
*
* @param address Address to write to.
* @param src Pointer to data to copy from.
* @param num_bytes Number of bytes in src to write.
*/
void nrf_nvmc_write_bytes(uint32_t address, const uint8_t *src, uint32_t num_bytes);
/**
* @brief Write consecutive words to flash.
*
* @param address Address to write to.
* @param src Pointer to data to copy from.
* @param num_words Number of bytes in src to write.
*/
void nrf_nvmc_write_words(uint32_t address, const uint32_t *src, uint32_t num_words);
#ifdef __cplusplus
}
#endif
#endif // NRF_NVMC_H__
/** @} */
third_party/NordicSemiconductor/hal/nrf_peripherals.h
Vendored
+59
View File
@@ -0,0 +1,59 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_PERIPHERALS_H
#define NRF_PERIPHERALS_H
/*lint ++flb "Enter library region */
#ifdef NRF51422
#include "nrf51422_peripherals.h"
#endif
#ifdef NRF51802
#include "nrf51802_peripherals.h"
#endif
#ifdef NRF51822
#include "nrf51822_peripherals.h"
#endif
#ifdef NRF52832
#include "nrf52832_peripherals.h"
#endif
#ifdef NRF52840_XXAA
#include "nrf52840_peripherals.h"
#endif
/*lint --flb "Leave library region" */
#endif /* NRF_PERIPHERALS_H */
third_party/NordicSemiconductor/hal/nrf_radio.h
Vendored
+608
View File
@@ -0,0 +1,608 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @file
* @brief RADIO HAL API.
*/
#ifndef NRF_RADIO_H__
#define NRF_RADIO_H__
/**
* @defgroup nrf_radio_hal RADIO HAL
* @{
* @ingroup nrf_radio
* @brief Hardware access layer for managing the radio (RADIO).
*/
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include "nrf.h"
#ifdef __cplusplus
extern "C" {
#endif
#define NRF_RADIO_TASK_SET (1UL)
#define NRF_RADIO_EVENT_CLEAR (0UL)
/**
* @enum nrf_radio_task_t
* @brief RADIO tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
NRF_RADIO_TASK_TXEN = offsetof(NRF_RADIO_Type, TASKS_TXEN), /**< Enable radio transmitter. */
NRF_RADIO_TASK_RXEN = offsetof(NRF_RADIO_Type, TASKS_RXEN), /**< Enable radio receiver. */
NRF_RADIO_TASK_START = offsetof(NRF_RADIO_Type, TASKS_START), /**< Start radio transmission or reception. */
NRF_RADIO_TASK_STOP = offsetof(NRF_RADIO_Type, TASKS_STOP), /**< Stop radio transmission or reception. */
NRF_RADIO_TASK_DISABLE = offsetof(NRF_RADIO_Type, TASKS_DISABLE), /**< Disable radio transmitter and receiver. */
NRF_RADIO_TASK_CCASTART = offsetof(NRF_RADIO_Type, TASKS_CCASTART), /**< Start Clear Channel Assessment procedure. */
NRF_RADIO_TASK_CCASTOP = offsetof(NRF_RADIO_Type, TASKS_CCASTOP), /**< Stop Clear Channel Assessment procedure. */
NRF_RADIO_TASK_EDSTART = offsetof(NRF_RADIO_Type, TASKS_EDSTART), /**< Start Energy Detection procedure. */
NRF_RADIO_TASK_RSSISTART = offsetof(NRF_RADIO_Type, TASKS_RSSISTART), /**< Start the RSSI and take one single sample of received signal strength. */
} nrf_radio_task_t; /*lint -restore */
/**
* @enum nrf_radio_event_t
* @brief RADIO events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
NRF_RADIO_EVENT_READY = offsetof(NRF_RADIO_Type, EVENTS_READY), /**< Radio has ramped up and is ready to be started. */
NRF_RADIO_EVENT_ADDRESS = offsetof(NRF_RADIO_Type, EVENTS_ADDRESS), /**< Address sent or received. */
NRF_RADIO_EVENT_END = offsetof(NRF_RADIO_Type, EVENTS_END), /**< Packet transmitted or received. */
NRF_RADIO_EVENT_DISABLED = offsetof(NRF_RADIO_Type, EVENTS_DISABLED), /**< Radio has been disabled. */
NRF_RADIO_EVENT_CRCOK = offsetof(NRF_RADIO_Type, EVENTS_CRCOK), /**< Packet received with correct CRC. */
NRF_RADIO_EVENT_CRCERROR = offsetof(NRF_RADIO_Type, EVENTS_CRCERROR), /**< Packet received with incorrect CRC. */
NRF_RADIO_EVENT_CCAIDLE = offsetof(NRF_RADIO_Type, EVENTS_CCAIDLE), /**< Wireless medium is idle. */
NRF_RADIO_EVENT_CCABUSY = offsetof(NRF_RADIO_Type, EVENTS_CCABUSY), /**< Wireless medium is busy. */
NRF_RADIO_EVENT_RSSIEND = offsetof(NRF_RADIO_Type, EVENTS_RSSIEND), /**< Sampling of receive signal strength complete. */
NRF_RADIO_EVENT_MHRMATCH = offsetof(NRF_RADIO_Type, EVENTS_MHRMATCH), /**< MAC Header match found. */
NRF_RADIO_EVENT_FRAMESTART = offsetof(NRF_RADIO_Type, EVENTS_FRAMESTART), /**< IEEE 802.15.4 length field received. */
NRF_RADIO_EVENT_EDEND = offsetof(NRF_RADIO_Type, EVENTS_EDEND), /**< Energy Detection procedure ended. */
NRF_RADIO_EVENT_BCMATCH = offsetof(NRF_RADIO_Type, EVENTS_BCMATCH), /**< Bit counter reached bit count value. */
} nrf_radio_event_t; /*lint -restore */
/**
* @enum nrf_radio_int_mask_t
* @brief RADIO interrupts.
*/
typedef enum
{
NRF_RADIO_INT_READY_MASK = RADIO_INTENSET_READY_Msk, /**< Mask for enabling or disabling an interrupt on READY event. */
NRF_RADIO_INT_ADDRESS_MASK = RADIO_INTENSET_ADDRESS_Msk, /**< Mask for enabling or disabling an interrupt on ADDRESS event. */
NRF_RADIO_INT_END_MASK = RADIO_INTENSET_END_Msk, /**< Mask for enabling or disabling an interrupt on END event. */
NRF_RADIO_INT_DISABLED_MASK = RADIO_INTENSET_DISABLED_Msk, /**< Mask for enabling or disabling an interrupt on DISABLED event. */
NRF_RADIO_INT_CRCOK_MASK = RADIO_INTENSET_CRCOK_Msk, /**< Mask for enabling or disabling an interrupt on CRCOK event. */
NRF_RADIO_INT_CRCERROR_MASK = RADIO_INTENSET_CRCERROR_Msk, /**< Mask for enabling or disabling an interrupt on CRCERROR event. */
NRF_RADIO_INT_CCAIDLE_MASK = RADIO_INTENSET_CCAIDLE_Msk, /**< Mask for enabling or disabling an interrupt on CCAIDLE event. */
NRF_RADIO_INT_CCABUSY_MASK = RADIO_INTENSET_CCABUSY_Msk, /**< Mask for enabling or disabling an interrupt on CCABUSY event. */
NRF_RADIO_INT_RSSIEND_MASK = RADIO_INTENSET_RSSIEND_Msk, /**< Mask for enabling or disabling an interrupt on RSSIEND event. */
NRF_RADIO_INT_FRAMESTART_MASK = RADIO_INTENSET_FRAMESTART_Msk, /**< Mask for enabling or disabling an interrupt on FRAMESTART event. */
NRF_RADIO_INT_EDEND_MASK = RADIO_INTENSET_EDEND_Msk, /**< Mask for enabling or disabling an interrupt on EDEND event. */
NRF_RADIO_INT_BCMATCH_MASK = RADIO_INTENSET_BCMATCH_Msk, /**< Mask for enabling or disabling an interrupt on BCMATCH event. */
} nrf_radio_int_mask_t;
/**
* @enum nrf_radio_short_mask_t
* @brief Types of RADIO shortcuts.
*/
typedef enum
{
NRF_RADIO_SHORT_READY_START_MASK = RADIO_SHORTS_READY_START_Msk, /**< Mask for setting shortcut between EVENT_READY and TASK_START. */
NRF_RADIO_SHORT_ADDRESS_RSSISTART_MASK = RADIO_SHORTS_ADDRESS_RSSISTART_Msk, /**< Mask for setting shortcut between EVENT_ADDRESS and TASK_RSSISTART. */
NRF_RADIO_SHORT_END_DISABLE_MASK = RADIO_SHORTS_END_DISABLE_Msk, /**< Mask for setting shortcut between EVENT_END and TASK_DISABLE. */
NRF_RADIO_SHORT_END_START_MASK = RADIO_SHORTS_END_START_Msk, /**< Mask for setting shortcut between EVENT_END and TASK_START. */
NRF_RADIO_SHORT_CCAIDLE_TXEN_MASK = RADIO_SHORTS_CCAIDLE_TXEN_Msk, /**< Mask for setting shortcut between EVENT_CCAIDLE and TASK_TXEN. */
NRF_RADIO_SHORT_DISABLED_TXEN_MASK = RADIO_SHORTS_DISABLED_TXEN_Msk, /**< Mask for setting shortcut between EVENT_DISABLED and TASK_TXEN. */
NRF_RADIO_SHORT_FRAMESTART_BCSTART_MASK = RADIO_SHORTS_FRAMESTART_BCSTART_Msk, /**< Mask for setting shortcut between EVENT_FRAMESTART and TASK_BCSTART. */
} nrf_radio_short_mask_t;
/**
* @enum nrf_radio_cca_mode_t
* @brief Types of RADIO Clear Channel Assessment modes.
*/
typedef enum
{
NRF_RADIO_CCA_MODE_ED = RADIO_CCACTRL_CCAMODE_EdMode, /**< Energy Above Threshold. Will report busy whenever energy is detected above set threshold. */
NRF_RADIO_CCA_MODE_CARRIER = RADIO_CCACTRL_CCAMODE_CarrierMode, /**< Carrier Seen. Will report busy whenever compliant IEEE 802.15.4 signal is seen. */
NRF_RADIO_CCA_MODE_CARRIER_AND_ED = RADIO_CCACTRL_CCAMODE_CarrierAndEdMode, /**< Energy Above Threshold AND Carrier Seen. */
NRF_RADIO_CCA_MODE_CARRIER_OR_ED = RADIO_CCACTRL_CCAMODE_CarrierOrEdMode, /**< Energy Above Threshold OR Carrier Seen. */
} nrf_radio_cca_mode_t;
/**
* @enum nrf_radio_state_t
* @brief Types of RADIO States.
*/
typedef enum
{
NRF_RADIO_STATE_DISABLED = RADIO_STATE_STATE_Disabled, /**< No operations are going on inside the radio and the power consumption is at a minimum. */
NRF_RADIO_STATE_RX_RU = RADIO_STATE_STATE_RxRu, /**< The radio is ramping up and preparing for reception. */
NRF_RADIO_STATE_RX_IDLE = RADIO_STATE_STATE_RxIdle, /**< The radio is ready for reception to start. */
NRF_RADIO_STATE_RX = RADIO_STATE_STATE_Rx, /**< Reception has been started. */
NRF_RADIO_STATE_RX_DISABLE = RADIO_STATE_STATE_RxDisable, /**< The radio is disabling the receiver. */
NRF_RADIO_STATE_TX_RU = RADIO_STATE_STATE_TxRu, /**< The radio is ramping up and preparing for transmission. */
NRF_RADIO_STATE_TX_IDLE = RADIO_STATE_STATE_TxIdle, /**< The radio is ready for transmission to start. */
NRF_RADIO_STATE_TX = RADIO_STATE_STATE_Tx, /**< The radio is transmitting a packet. */
NRF_RADIO_STATE_TX_DISABLE = RADIO_STATE_STATE_TxDisable, /**< The radio is disabling the transmitter. */
} nrf_radio_state_t;
/**
* @enum nrf_radio_crc_status_t
* @brief Types of CRC status.
*/
typedef enum
{
NRF_RADIO_CRC_STATUS_ERROR = RADIO_CRCSTATUS_CRCSTATUS_CRCError, /**< Packet received with CRC error. */
NRF_RADIO_CRC_STATUS_OK = RADIO_CRCSTATUS_CRCSTATUS_CRCOk, /**< Packet received with CRC ok. */
} nrf_radio_crc_status_t;
/**
* @enum nrf_radio_mode_t
* @brief Types of RADIO modes (data rate and modulation).
*/
typedef enum
{
NRF_RADIO_MODE_NRF_1MBIT = RADIO_MODE_MODE_Nrf_1Mbit, /**< 1Mbit/s Nordic proprietary radio mode. */
NRF_RADIO_MODE_NRF_2MBIT = RADIO_MODE_MODE_Nrf_2Mbit, /**< 2Mbit/s Nordic proprietary radio mode. */
NRF_RADIO_MODE_BLE_1MBIT = RADIO_MODE_MODE_Ble_1Mbit, /**< 1 Mbit/s Bluetooth Low Energy. */
NRF_RADIO_MODE_BLE_2MBIT = RADIO_MODE_MODE_Ble_2Mbit, /**< 2 Mbit/s Bluetooth Low Energy. */
NRF_RADIO_MODE_IEEE802154_250KBIT = RADIO_MODE_MODE_Ieee802154_250Kbit, /**< IEEE 802.15.4-2006 250 kbit/s. */
} nrf_radio_mode_t;
/**
* @enum nrf_radio_preamble_length_t
* @brief Types of preamble length.
*/
typedef enum
{
NRF_RADIO_PREAMBLE_LENGTH_8BIT = RADIO_PCNF0_PLEN_8bit, /**< 8-bit preamble. */
NRF_RADIO_PREAMBLE_LENGTH_16BIT = RADIO_PCNF0_PLEN_16bit, /**< 16-bit preamble. */
NRF_RADIO_PREAMBLE_LENGTH_32BIT_ZERO = RADIO_PCNF0_PLEN_32bitZero, /**< 32-bit zero preamble used for IEEE 802.15.4. */
NRF_RADIO_PREAMBLE_LENGTH_LONG_RANGE = RADIO_PCNF0_PLEN_LongRange, /**< Preamble - used for BTLE Long Range. */
} nrf_radio_preamble_length_t;
/**
* @enum nrf_radio_crc_includes_addr_t
* @brief Types of CRC calculatons regarding address.
*/
typedef enum
{
NRF_RADIO_CRC_INCLUDES_ADDR_INCLUDE = RADIO_CRCCNF_SKIPADDR_Include, /**< CRC calculation includes address field. */
NRF_RADIO_CRC_INCLUDES_ADDR_SKIP = RADIO_CRCCNF_SKIPADDR_Skip, /**< CRC calculation does not include address field. */
NRF_RADIO_CRC_INCLUDES_ADDR_IEEE802154 = RADIO_CRCCNF_SKIPADDR_Ieee802154, /**< CRC calculation as per 802.15.4 standard. */
} nrf_radio_crc_includes_addr_t;
/**
* @brief Function for enabling interrupts.
*
* @param[in] radio_int_mask Mask of interrupts.
*/
__STATIC_INLINE void nrf_radio_int_enable(uint32_t radio_int_mask)
{
NRF_RADIO->INTENSET = radio_int_mask;
}
/**
* @brief Function for disabling interrupts.
*
* @param[in] radio_int_mask Mask of interrupts.
*/
__STATIC_INLINE void nrf_radio_int_disable(uint32_t radio_int_mask)
{
NRF_RADIO->INTENCLR = radio_int_mask;
}
/**
* @brief Function for getting the state of a specific interrupt.
*
* @param[in] radio_int_mask Interrupt.
*
* @retval true If the interrupt is not enabled.
* @retval false If the interrupt is enabled.
*/
__STATIC_INLINE bool nrf_radio_int_get(nrf_radio_int_mask_t radio_int_mask)
{
return (bool)(NRF_RADIO->INTENCLR & radio_int_mask);
}
/**
* @brief Function for getting the address of a specific task.
*
* This function can be used by the PPI module.
*
* @param[in] radio_task Task.
*/
__STATIC_INLINE uint32_t *nrf_radio_task_address_get(nrf_radio_task_t radio_task)
{
return (uint32_t *)((uint8_t *)NRF_RADIO + radio_task);
}
/**
* @brief Function for setting a specific task.
*
* @param[in] radio_task Task.
*/
__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t radio_task)
{
*((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_task)) = NRF_RADIO_TASK_SET;
}
/**
* @brief Function for getting address of a specific event.
*
* This function can be used by the PPI module.
*
* @param[in] radio_event Event.
*/
__STATIC_INLINE uint32_t *nrf_radio_event_address_get(nrf_radio_event_t radio_event)
{
return (uint32_t *)((uint8_t *)NRF_RADIO + radio_event);
}
/**
* @brief Function for clearing a specific event.
*
* @param[in] radio_event Event.
*/
__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t radio_event)
{
*((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event)) = NRF_RADIO_EVENT_CLEAR;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event));
(void)dummy;
#endif
}
/**
* @brief Function for getting the state of a specific event.
*
* @param[in] radio_event Event.
*
* @retval true If the event is not set.
* @retval false If the event is set.
*/
__STATIC_INLINE bool nrf_radio_event_get(nrf_radio_event_t radio_event)
{
return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event));
}
/**
* @brief Function for setting shortcuts.
*
* @param[in] radio_short_mask Mask of shortcuts.
*
*/
__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t radio_short_mask)
{
NRF_RADIO->SHORTS |= radio_short_mask;
}
/**
* @brief Function for clearing shortcuts.
*
* @param[in] radio_short_mask Mask of shortcuts.
*
*/
__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t radio_short_mask)
{
NRF_RADIO->SHORTS &= ~radio_short_mask;
}
/**
* @brief Function for getting present state of the radio module.
*/
__STATIC_INLINE nrf_radio_state_t nrf_radio_state_get(void)
{
return (nrf_radio_state_t) NRF_RADIO->STATE;
}
/**
* @brief Function for setting Packet Pointer to given location in memory.
*
* @param[in] p_radio_packet_ptr Pointer to tx or rx packet buffer.
*/
__STATIC_INLINE void nrf_radio_packet_ptr_set(const void *p_radio_packet_ptr)
{
NRF_RADIO->PACKETPTR = (uint32_t) p_radio_packet_ptr;
}
/**
* @brief Function for getting CRC status of last received packet.
*/
__STATIC_INLINE nrf_radio_crc_status_t nrf_radio_crc_status_get(void)
{
return (nrf_radio_crc_status_t) NRF_RADIO->CRCSTATUS;
}
/**
* @brief Function for setting Clear Channel Assessment mode.
*
* @param[in] radio_cca_mode Mode of CCA
*/
__STATIC_INLINE void nrf_radio_cca_mode_set(nrf_radio_cca_mode_t radio_cca_mode)
{
NRF_RADIO->CCACTRL &= (~RADIO_CCACTRL_CCAMODE_Msk);
NRF_RADIO->CCACTRL |= ((uint32_t) radio_cca_mode << RADIO_CCACTRL_CCAMODE_Pos);
}
/**
* @brief Function for setting CCA Energy Busy Threshold.
*
* @param[in] radio_cca_ed_threshold Energy Detection threshold value.
*/
__STATIC_INLINE void nrf_radio_cca_ed_threshold_set(uint8_t radio_cca_ed_threshold)
{
NRF_RADIO->CCACTRL &= (~RADIO_CCACTRL_CCAEDTHRES_Msk);
NRF_RADIO->CCACTRL |= ((uint32_t) radio_cca_ed_threshold << RADIO_CCACTRL_CCAEDTHRES_Pos);
}
/**
* @brief Function for setting CCA Correlator Busy Threshold.
*
* @param[in] radio_cca_corr_threshold Correlator Busy Threshold.
*/
__STATIC_INLINE void nrf_radio_cca_corr_threshold_set(uint8_t radio_cca_corr_threshold_set)
{
NRF_RADIO->CCACTRL &= (~RADIO_CCACTRL_CCACORRTHRES_Msk);
NRF_RADIO->CCACTRL |= ((uint32_t) radio_cca_corr_threshold_set << RADIO_CCACTRL_CCACORRTHRES_Pos);
}
/**
* @brief Function for setting limit of occurances above Correlator Threshold.
*
* When not equal to zero the correlator based signal detect is enabled.
*
* @param[in] radio_cca_corr_cnt Limit of occurances above Correlator Threshold
*/
__STATIC_INLINE void nrf_radio_cca_corr_counter_set(uint8_t radio_cca_corr_counter_set)
{
NRF_RADIO->CCACTRL &= (~RADIO_CCACTRL_CCACORRCNT_Msk);
NRF_RADIO->CCACTRL |= ((uint32_t) radio_cca_corr_counter_set << RADIO_CCACTRL_CCACORRCNT_Pos);
}
/**
* @brief Function for setting Radio data rate and modulation settings.
*
* @param[in] radio_mode Mode of radio data rate and modulation.
*/
__STATIC_INLINE void nrf_radio_mode_set(nrf_radio_mode_t radio_mode)
{
NRF_RADIO->MODE = ((uint32_t) radio_mode << RADIO_MODE_MODE_Pos);
}
/**
* @brief Function for setting Length of LENGTH field in number of bits.
*
* @param[in] radio_length_length Length of LENGTH field in number of bits.
*/
__STATIC_INLINE void nrf_radio_config_length_field_length_set(uint8_t radio_length_length)
{
NRF_RADIO->PCNF0 &= (~RADIO_PCNF0_LFLEN_Msk);
NRF_RADIO->PCNF0 |= ((uint32_t) radio_length_length << RADIO_PCNF0_LFLEN_Pos);
}
/**
* @brief Function for setting length of preamble on air.
*
* @param[in] radio_preamble_length Length of preamble on air.
*/
__STATIC_INLINE void nrf_radio_config_preamble_length_set(
nrf_radio_preamble_length_t radio_preamble_length)
{
NRF_RADIO->PCNF0 &= (~RADIO_PCNF0_PLEN_Msk);
NRF_RADIO->PCNF0 |= ((uint32_t) radio_preamble_length << RADIO_PCNF0_PLEN_Pos);
}
/**
* @brief Function for setting if LENGTH field contains CRC.
*
* @param[in] radio_length_contains_crc True if LENGTH field should contain CRC.
*/
__STATIC_INLINE void nrf_radio_config_crc_included_set(bool radio_length_contains_crc)
{
NRF_RADIO->PCNF0 &= (~RADIO_PCNF0_CRCINC_Msk);
NRF_RADIO->PCNF0 |= ((uint32_t) radio_length_contains_crc << RADIO_PCNF0_CRCINC_Pos);
}
/**
* @brief Function for setting maximum length of packet payload.
*
* @param[in] radio_max_packet_length Maximum length of packet payload.
*/
__STATIC_INLINE void nrf_radio_config_max_length_set(uint8_t radio_max_packet_length)
{
NRF_RADIO->PCNF1 &= (~RADIO_PCNF1_MAXLEN_Msk);
NRF_RADIO->PCNF1 |= ((uint32_t) radio_max_packet_length << RADIO_PCNF1_MAXLEN_Pos);
}
/**
* @brief Function for setting CRC length.
*
* @param[in] radio_crc_length CRC length in number of bytes [0-3].
*/
__STATIC_INLINE void nrf_radio_crc_length_set(uint8_t radio_crc_length)
{
NRF_RADIO->CRCCNF &= (~RADIO_CRCCNF_LEN_Msk);
NRF_RADIO->CRCCNF |= ((uint32_t) radio_crc_length << RADIO_CRCCNF_LEN_Pos);
}
/**
* @brief Function for setting if address filed should be included or excluded from CRC calculation.
*
* @param[in] radio_crc_skip_address Include or exclude packet address field out of CRC.
*/
__STATIC_INLINE void nrf_radio_crc_includes_address_set(
nrf_radio_crc_includes_addr_t radio_crc_skip_address)
{
NRF_RADIO->CRCCNF &= (~RADIO_CRCCNF_SKIPADDR_Msk);
NRF_RADIO->CRCCNF |= ((uint32_t) radio_crc_skip_address << RADIO_CRCCNF_SKIPADDR_Pos);
}
/**
* @brief Function for setting CRC polynominal.
*
* @param[in] radio_crc_polynominal CRC polynominal to set.
*/
__STATIC_INLINE void nrf_radio_crc_polynominal_set(uint32_t radio_crc_polynominal)
{
NRF_RADIO->CRCPOLY = (radio_crc_polynominal << RADIO_CRCPOLY_CRCPOLY_Pos);
}
/**
* @brief Function for getting RSSI sample result.
*
* @note The value is a positive value while the actual received signal is a negative value.
* Actual received signal strength is therefore as follows:
* received signal strength = - returned_value dBm .
*/
__STATIC_INLINE uint8_t nrf_radio_rssi_sample_get(void)
{
return (uint8_t)(((NRF_RADIO->RSSISAMPLE) & RADIO_RSSISAMPLE_RSSISAMPLE_Msk) >>
RADIO_RSSISAMPLE_RSSISAMPLE_Pos);
}
/**
* @brief Function for setting MAC Header Match Unit search pattern configuration.
*
* @param[in] radio_mhmu_search_pattern Search Pattern Configuration.
*/
__STATIC_INLINE void nrf_radio_mhmu_search_pattern_set(uint32_t radio_mhmu_search_pattern)
{
NRF_RADIO->MHRMATCHCONF = radio_mhmu_search_pattern;
}
/**
* @brief Function for setting MAC Header Match Unit pattern mask configuration.
*
* @param[in] radio_mhmu_pattern_mask Pattern mask.
*/
__STATIC_INLINE void nrf_radio_mhmu_pattern_mask_set(uint32_t radio_mhmu_pattern_mask)
{
NRF_RADIO->MHRMATCHMAS = radio_mhmu_pattern_mask;
}
/**
* @brief Function for setting radio frequency.
*
* @param[in] radio_frequency Frequency above 2400 MHz [MHz]
*/
__STATIC_INLINE void nrf_radio_frequency_set(uint32_t radio_frequency)
{
NRF_RADIO->FREQUENCY = radio_frequency;
}
/**
* @brief Function for getting radio frequency.
*
* @returns Frequency above 2400 MHz [MHz]
*/
__STATIC_INLINE uint32_t nrf_radio_frequency_get(void)
{
return NRF_RADIO->FREQUENCY;
}
/**
* @brief Function for setting radio transmit power.
*
* @param[in] radio_tx_power Transmit power of the radio.
*/
__STATIC_INLINE void nrf_radio_tx_power_set(int8_t radio_tx_power)
{
NRF_RADIO->TXPOWER = (uint8_t) radio_tx_power;
}
/**
* @brief Function for setting Inter Frame Spacing
*
* @param[in] radio_ifs Inter frame spacing [us].
*/
__STATIC_INLINE void nrf_radio_ifs_set(uint32_t radio_ifs)
{
NRF_RADIO->TIFS = radio_ifs;
}
/**
* @brief Function for setting Bit counter compare.
*
* @param[in] radio_bcc Bit counter compare [bits].
*/
__STATIC_INLINE void nrf_radio_bcc_set(uint32_t radio_bcc)
{
NRF_RADIO->BCC = radio_bcc;
}
/**
* @brief Function for getting Bit counter compare.
*/
__STATIC_INLINE uint32_t nrf_radio_bcc_get(void)
{
return NRF_RADIO->BCC;
}
/**
* @brief Function for getting Energy Detection level.
*/
__STATIC_INLINE uint8_t nrf_radio_ed_sample_get(void)
{
return (uint8_t) NRF_RADIO->EDSAMPLE;
}
/**
* @brief Function for setting number of iterations to perform ED scan.
*
* @param[in] radio_ed_loop_count Number of iterations during ED procedure.
*/
__STATIC_INLINE void nrf_radio_ed_loop_count_set(uint32_t radio_ed_loop_count)
{
NRF_RADIO->EDCNT = (radio_ed_loop_count & 0x001FFFFF);
}
/**
* @brief Function for setting power mode of the radio peripheral.
*
* @param[in] radio_power If radio should powered on.
*/
__STATIC_INLINE void nrf_radio_power_set(bool radio_power)
{
NRF_RADIO->POWER = (uint32_t) radio_power;
}
/**
*@}
**/
#ifdef __cplusplus
}
#endif
#endif /* NRF_RADIO_H__ */
third_party/NordicSemiconductor/hal/nrf_rng.h
Vendored
+242
View File
@@ -0,0 +1,242 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @file
* @brief RNG HAL API.
*/
#ifndef NRF_RNG_H__
#define NRF_RNG_H__
/**
* @defgroup nrf_rng_hal RNG HAL
* @{
* @ingroup nrf_rng
* @brief Hardware access layer for managing the random number generator (RNG).
*/
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include "nrf.h"
#ifdef __cplusplus
extern "C" {
#endif
#define NRF_RNG_TASK_SET (1UL)
#define NRF_RNG_EVENT_CLEAR (0UL)
/**
* @enum nrf_rng_task_t
* @brief RNG tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */
NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */
} nrf_rng_task_t; /*lint -restore */
/**
* @enum nrf_rng_event_t
* @brief RNG events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */
} nrf_rng_event_t; /*lint -restore */
/**
* @enum nrf_rng_int_mask_t
* @brief RNG interrupts.
*/
typedef enum
{
NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */
} nrf_rng_int_mask_t;
/**
* @enum nrf_rng_short_mask_t
* @brief Types of RNG shortcuts.
*/
typedef enum
{
NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */
} nrf_rng_short_mask_t;
/**
* @brief Function for enabling interrupts.
*
* @param[in] rng_int_mask Mask of interrupts.
*/
__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask)
{
NRF_RNG->INTENSET = rng_int_mask;
}
/**
* @brief Function for disabling interrupts.
*
* @param[in] rng_int_mask Mask of interrupts.
*/
__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask)
{
NRF_RNG->INTENCLR = rng_int_mask;
}
/**
* @brief Function for getting the state of a specific interrupt.
*
* @param[in] rng_int_mask Interrupt.
*
* @retval true If the interrupt is not enabled.
* @retval false If the interrupt is enabled.
*/
__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask)
{
return (bool)(NRF_RNG->INTENCLR & rng_int_mask);
}
/**
* @brief Function for getting the address of a specific task.
*
* This function can be used by the PPI module.
*
* @param[in] rng_task Task.
*/
__STATIC_INLINE uint32_t *nrf_rng_task_address_get(nrf_rng_task_t rng_task)
{
return (uint32_t *)((uint8_t *)NRF_RNG + rng_task);
}
/**
* @brief Function for setting a specific task.
*
* @param[in] rng_task Task.
*/
__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task)
{
*((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET;
}
/**
* @brief Function for getting address of a specific event.
*
* This function can be used by the PPI module.
*
* @param[in] rng_event Event.
*/
__STATIC_INLINE uint32_t *nrf_rng_event_address_get(nrf_rng_event_t rng_event)
{
return (uint32_t *)((uint8_t *)NRF_RNG + rng_event);
}
/**
* @brief Function for clearing a specific event.
*
* @param[in] rng_event Event.
*/
__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event)
{
*((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
(void)dummy;
#endif
}
/**
* @brief Function for getting the state of a specific event.
*
* @param[in] rng_event Event.
*
* @retval true If the event is not set.
* @retval false If the event is set.
*/
__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event)
{
return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
}
/**
* @brief Function for setting shortcuts.
*
* @param[in] rng_short_mask Mask of shortcuts.
*
*/
__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask)
{
NRF_RNG->SHORTS |= rng_short_mask;
}
/**
* @brief Function for clearing shortcuts.
*
* @param[in] rng_short_mask Mask of shortcuts.
*
*/
__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask)
{
NRF_RNG->SHORTS &= ~rng_short_mask;
}
/**
* @brief Function for getting the previously generated random value.
*
* @return Previously generated random value.
*/
__STATIC_INLINE uint8_t nrf_rng_random_value_get(void)
{
return (uint8_t)(NRF_RNG->VALUE & RNG_VALUE_VALUE_Msk);
}
/**
* @brief Function for enabling digital error correction.
*/
__STATIC_INLINE void nrf_rng_error_correction_enable(void)
{
NRF_RNG->CONFIG |= RNG_CONFIG_DERCEN_Msk;
}
/**
* @brief Function for disabling digital error correction.
*/
__STATIC_INLINE void nrf_rng_error_correction_disable(void)
{
NRF_RNG->CONFIG &= ~RNG_CONFIG_DERCEN_Msk;
}
/**
*@}
**/
#ifdef __cplusplus
}
#endif
#endif /* NRF_RNG_H__ */
third_party/NordicSemiconductor/hal/nrf_rtc.h
Vendored
+334
View File
@@ -0,0 +1,334 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @file
* @brief RTC HAL API.
*/
#ifndef NRF_RTC_H
#define NRF_RTC_H
/**
* @defgroup nrf_rtc_hal RTC HAL
* @{
* @ingroup nrf_rtc
* @brief Hardware access layer for managing the real time counter (RTC).
*/
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include "nrf.h"
#include "nrf_assert.h"
#include "nrf_peripherals.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Macro for getting the number of compare channels available
* in a given RTC instance.
*/
#define NRF_RTC_CC_CHANNEL_COUNT(id) CONCAT_3(RTC, id, _CC_NUM)
#define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */
/**
* @brief Macro for converting expected frequency to prescaler setting.
*/
#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)((RTC_INPUT_FREQ / (FREQ)) - 1)
/**< Macro for wrapping values to RTC capacity. */
#define RTC_WRAP(val) (val & RTC_COUNTER_COUNTER_Msk)
#define RTC_CHANNEL_INT_MASK(ch) ((uint32_t)NRF_RTC_INT_COMPARE0_MASK << ch)
#define RTC_CHANNEL_EVENT_ADDR(ch) (nrf_rtc_event_t)(NRF_RTC_EVENT_COMPARE_0 + ch * sizeof(uint32_t))
/**
* @enum nrf_rtc_task_t
* @brief RTC tasks.
*/
typedef enum
{
/*lint -save -e30*/
NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */
NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */
NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */
NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */
/*lint -restore*/
} nrf_rtc_task_t;
/**
* @enum nrf_rtc_event_t
* @brief RTC events.
*/
typedef enum
{
/*lint -save -e30*/
NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */
NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */
NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */
NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */
NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */
NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */
/*lint -restore*/
} nrf_rtc_event_t;
/**
* @enum nrf_rtc_int_t
* @brief RTC interrupts.
*/
typedef enum
{
NRF_RTC_INT_TICK_MASK = RTC_INTENSET_TICK_Msk, /**< RTC interrupt from tick event. */
NRF_RTC_INT_OVERFLOW_MASK = RTC_INTENSET_OVRFLW_Msk, /**< RTC interrupt from overflow event. */
NRF_RTC_INT_COMPARE0_MASK = RTC_INTENSET_COMPARE0_Msk, /**< RTC interrupt from compare event on channel 0. */
NRF_RTC_INT_COMPARE1_MASK = RTC_INTENSET_COMPARE1_Msk, /**< RTC interrupt from compare event on channel 1. */
NRF_RTC_INT_COMPARE2_MASK = RTC_INTENSET_COMPARE2_Msk, /**< RTC interrupt from compare event on channel 2. */
NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */
} nrf_rtc_int_t;
/**@brief Function for setting a compare value for a channel.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] ch Channel.
* @param[in] cc_val Compare value to set.
*/
__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val);
/**@brief Function for returning the compare value for a channel.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] ch Channel.
*
* @return COMPARE[ch] value.
*/
__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch);
/**@brief Function for enabling interrupts.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] mask Interrupt mask to be enabled.
*/
__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask);
/**@brief Function for disabling interrupts.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] mask Interrupt mask to be disabled.
*/
__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask);
/**@brief Function for checking if interrupts are enabled.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] mask Mask of interrupt flags to check.
*
* @return Mask with enabled interrupts.
*/
__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask);
/**@brief Function for returning the status of currently enabled interrupts.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
*
* @return Value in INTEN register.
*/
__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc);
/**@brief Function for checking if an event is pending.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] event Address of the event.
*
* @return Mask of pending events.
*/
__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event);
/**@brief Function for clearing an event.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event);
/**@brief Function for returning a counter value.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
*
* @return Counter value.
*/
__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc);
/**@brief Function for setting a prescaler value.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] val Value to set the prescaler to.
*/
__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val);
/**@brief Function for returning the address of an event.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] event Requested event.
*
* @return Address of the requested event register.
*/
__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event);
/**@brief Function for returning the address of a task.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] task Requested task.
*
* @return Address of the requested task register.
*/
__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task);
/**@brief Function for starting a task.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] task Requested task.
*/
__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task);
/**@brief Function for enabling events.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] mask Mask of event flags to enable.
*/
__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask);
/**@brief Function for disabling an event.
*
* @param[in] p_rtc Pointer to the peripheral registers structure.
* @param[in] event Requested event.
*/
__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t event);
/**
*@}
**/
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t cc_val)
{
p_rtc->CC[ch] = cc_val;
}
__STATIC_INLINE uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch)
{
return p_rtc->CC[ch];
}
__STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask)
{
p_rtc->INTENSET = mask;
}
__STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask)
{
p_rtc->INTENCLR = mask;
}
__STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t mask)
{
return (p_rtc->INTENSET & mask);
}
__STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc)
{
return p_rtc->INTENSET;
}
__STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event)
{
return *(volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event);
}
__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event)) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_rtc + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc)
{
return p_rtc->COUNTER;
}
__STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val)
{
ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos));
p_rtc->PRESCALER = val;
}
__STATIC_INLINE uint32_t rtc_prescaler_get(NRF_RTC_Type * p_rtc)
{
return p_rtc->PRESCALER;
}
__STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event)
{
return (uint32_t)p_rtc + event;
}
__STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task)
{
return (uint32_t)p_rtc + task;
}
__STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task)
{
*(__IO uint32_t *)((uint32_t)p_rtc + task) = 1;
}
__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask)
{
p_rtc->EVTENSET = mask;
}
__STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t mask)
{
p_rtc->EVTENCLR = mask;
}
#endif
#ifdef __cplusplus
}
#endif
#endif /* NRF_RTC_H */
third_party/NordicSemiconductor/hal/nrf_uart.h
Vendored
+540
View File
@@ -0,0 +1,540 @@
/* Copyright (c) 2016, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRF_UART_H__
#define NRF_UART_H__
#include "nrf.h"
#include "nrf_peripherals.h"
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
//Temporary defining legacy UART for instance 1
#define NRF_UART1 (NRF_UART_Type *)NRF_UARTE1
/**
* @defgroup nrf_uart_hal UART HAL
* @{
* @ingroup nrf_uart
*
* @brief Hardware access layer for accessing the UART peripheral.
*/
#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF
/**
* @enum nrf_uart_task_t
* @brief UART tasks.
*/
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */
NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */
NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */
NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */
NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */
/*lint -restore*/
} nrf_uart_task_t;
/**
* @enum nrf_uart_event_t
* @brief UART events.
*/
typedef enum
{
/*lint -save -e30*/
NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */
NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */
NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */
NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */
NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */
NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */
/*lint -restore*/
} nrf_uart_event_t;
/**
* @enum nrf_uart_int_mask_t
* @brief UART interrupts.
*/
typedef enum
{
/*lint -save -e30*/
NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */
NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */
NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */
NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */
NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */
NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */
/*lint -restore*/
} nrf_uart_int_mask_t;
/**
* @enum nrf_uart_baudrate_t
* @brief Baudrates supported by UART.
*/
typedef enum
{
#ifdef UARTE_PRESENT
NRF_UART_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */
NRF_UART_BAUDRATE_2400 = UARTE_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */
NRF_UART_BAUDRATE_4800 = UARTE_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */
NRF_UART_BAUDRATE_9600 = UARTE_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */
NRF_UART_BAUDRATE_14400 = UARTE_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */
NRF_UART_BAUDRATE_19200 = UARTE_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */
NRF_UART_BAUDRATE_28800 = UARTE_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */
NRF_UART_BAUDRATE_38400 = UARTE_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */
NRF_UART_BAUDRATE_57600 = UARTE_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */
NRF_UART_BAUDRATE_76800 = UARTE_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */
NRF_UART_BAUDRATE_115200 = UARTE_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */
NRF_UART_BAUDRATE_230400 = UARTE_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */
NRF_UART_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */
NRF_UART_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */
NRF_UART_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */
NRF_UART_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */
#else
NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */
NRF_UART_BAUDRATE_2400 = UART_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */
NRF_UART_BAUDRATE_4800 = UART_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */
NRF_UART_BAUDRATE_9600 = UART_BAUDRATE_BAUDRATE_Baud9600, /**< 9600 baud. */
NRF_UART_BAUDRATE_14400 = UART_BAUDRATE_BAUDRATE_Baud14400, /**< 14400 baud. */
NRF_UART_BAUDRATE_19200 = UART_BAUDRATE_BAUDRATE_Baud19200, /**< 19200 baud. */
NRF_UART_BAUDRATE_28800 = UART_BAUDRATE_BAUDRATE_Baud28800, /**< 28800 baud. */
NRF_UART_BAUDRATE_38400 = UART_BAUDRATE_BAUDRATE_Baud38400, /**< 38400 baud. */
NRF_UART_BAUDRATE_57600 = UART_BAUDRATE_BAUDRATE_Baud57600, /**< 57600 baud. */
NRF_UART_BAUDRATE_76800 = UART_BAUDRATE_BAUDRATE_Baud76800, /**< 76800 baud. */
NRF_UART_BAUDRATE_115200 = UART_BAUDRATE_BAUDRATE_Baud115200, /**< 115200 baud. */
NRF_UART_BAUDRATE_230400 = UART_BAUDRATE_BAUDRATE_Baud230400, /**< 230400 baud. */
NRF_UART_BAUDRATE_250000 = UART_BAUDRATE_BAUDRATE_Baud250000, /**< 250000 baud. */
NRF_UART_BAUDRATE_460800 = UART_BAUDRATE_BAUDRATE_Baud460800, /**< 460800 baud. */
NRF_UART_BAUDRATE_921600 = UART_BAUDRATE_BAUDRATE_Baud921600, /**< 921600 baud. */
NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */
#endif
} nrf_uart_baudrate_t;
/**
* @enum nrf_uart_error_mask_t
* @brief Types of UART error masks.
*/
typedef enum
{
NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */
NRF_UART_ERROR_PARITY_MASK = UART_ERRORSRC_PARITY_Msk, /**< Parity error. */
NRF_UART_ERROR_FRAMING_MASK = UART_ERRORSRC_FRAMING_Msk, /**< Framing error. */
NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */
} nrf_uart_error_mask_t;
/**
* @enum nrf_uart_parity_t
* @brief Types of UART parity modes.
*/
typedef enum
{
NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */
NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */
} nrf_uart_parity_t;
/**
* @enum nrf_uart_hwfc_t
* @brief Types of UART flow control modes.
*/
typedef enum
{
NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */
NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */
} nrf_uart_hwfc_t;
/**
* @brief Function for clearing a specific UART event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type *p_reg, nrf_uart_event_t event);
/**
* @brief Function for checking the state of a specific UART event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
*
* @retval True if event is set, False otherwise.
*/
__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type *p_reg, nrf_uart_event_t event);
/**
* @brief Function for returning the address of a specific UART event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Desired event.
*
* @retval Address of specified event register.
*/
__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type *p_reg,
nrf_uart_event_t event);
/**
* @brief Function for enabling a specific interrupt.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts to enable.
*/
__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type *p_reg, uint32_t int_mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Mask of interrupt to check.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type *p_reg, uint32_t int_mask);
/**
* @brief Function for disabling specific interrupts.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts to disable.
*/
__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type *p_reg, uint32_t int_mask);
/**
* @brief Function for getting error source mask. Function is clearing error source flags after reading.
*
* @param p_reg Pointer to the peripheral registers structure.
* @return Mask with error source flags.
*/
__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type *p_reg);
/**
* @brief Function for enabling UART.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type *p_reg);
/**
* @brief Function for disabling UART.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type *p_reg);
/**
* @brief Function for configuring TX/RX pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param pseltxd TXD pin number.
* @param pselrxd RXD pin number.
*/
__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type *p_reg, uint32_t pseltxd, uint32_t pselrxd);
/**
* @brief Function for disconnecting TX/RX pins.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type *p_reg);
/**
* @brief Function for getting TX pin.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type *p_reg);
/**
* @brief Function for getting RX pin.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type *p_reg);
/**
* @brief Function for getting RTS pin.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type *p_reg);
/**
* @brief Function for getting CTS pin.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type *p_reg);
/**
* @brief Function for configuring flow control pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param pselrts RTS pin number.
* @param pselcts CTS pin number.
*/
__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type *p_reg,
uint32_t pselrts,
uint32_t pselcts);
/**
* @brief Function for disconnecting flow control pins.
*
* @param p_reg Pointer to the peripheral registers structure.
*/
__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type *p_reg);
/**
* @brief Function for reading RX data.
*
* @param p_reg Pointer to the peripheral registers structure.
* @return Received byte.
*/
__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type *p_reg);
/**
* @brief Function for setting Tx data.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param txd Byte.
*/
__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type *p_reg, uint8_t txd);
/**
* @brief Function for starting an UART task.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param task Task.
*/
__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type *p_reg, nrf_uart_task_t task);
/**
* @brief Function for returning the address of a specific task register.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param task Task.
*
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type *p_reg, nrf_uart_task_t task);
/**
* @brief Function for configuring UART.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param hwfc Hardware flow control. Enabled if true.
* @param parity Parity. Included if true.
*/
__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type *p_reg,
nrf_uart_parity_t parity,
nrf_uart_hwfc_t hwfc);
/**
* @brief Function for setting UART baudrate.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param baudrate Baudrate.
*/
__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type *p_reg, nrf_uart_baudrate_t baudrate);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type *p_reg, nrf_uart_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type *p_reg, nrf_uart_event_t event)
{
return (bool) * (volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type *p_reg,
nrf_uart_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type *p_reg, uint32_t int_mask)
{
p_reg->INTENSET = int_mask;
}
__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type *p_reg, uint32_t int_mask)
{
return (bool)(p_reg->INTENSET & int_mask);
}
__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type *p_reg, uint32_t int_mask)
{
p_reg->INTENCLR = int_mask;
}
__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type *p_reg)
{
uint32_t errsrc_mask = p_reg->ERRORSRC;
p_reg->ERRORSRC = errsrc_mask;
return errsrc_mask;
}
__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type *p_reg)
{
p_reg->ENABLE = UART_ENABLE_ENABLE_Enabled;
}
__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type *p_reg)
{
p_reg->ENABLE = UART_ENABLE_ENABLE_Disabled;
}
__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type *p_reg, uint32_t pseltxd, uint32_t pselrxd)
{
#if defined(UART_PSEL_RXD_CONNECT_Pos)
p_reg->PSEL.RXD = pselrxd;
#else
p_reg->PSELRXD = pselrxd;
#endif
#if defined(UART_PSEL_TXD_CONNECT_Pos)
p_reg->PSEL.TXD = pseltxd;
#else
p_reg->PSELTXD = pseltxd;
#endif
}
__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type *p_reg)
{
nrf_uart_txrx_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED);
}
__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type *p_reg)
{
#if defined(UART_PSEL_TXD_CONNECT_Pos)
return p_reg->PSEL.TXD;
#else
return p_reg->PSELTXD;
#endif
}
__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type *p_reg)
{
#if defined(UART_PSEL_RXD_CONNECT_Pos)
return p_reg->PSEL.RXD;
#else
return p_reg->PSELRXD;
#endif
}
__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type *p_reg)
{
#if defined(UART_PSEL_RTS_CONNECT_Pos)
return p_reg->PSEL.RTS;
#else
return p_reg->PSELRTS;
#endif
}
__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type *p_reg)
{
#if defined(UART_PSEL_RTS_CONNECT_Pos)
return p_reg->PSEL.CTS;
#else
return p_reg->PSELCTS;
#endif
}
__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type *p_reg, uint32_t pselrts, uint32_t pselcts)
{
#if defined(UART_PSEL_RTS_CONNECT_Pos)
p_reg->PSEL.RTS = pselrts;
#else
p_reg->PSELRTS = pselrts;
#endif
#if defined(UART_PSEL_RTS_CONNECT_Pos)
p_reg->PSEL.CTS = pselcts;
#else
p_reg->PSELCTS = pselcts;
#endif
}
__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type *p_reg)
{
nrf_uart_hwfc_pins_set(p_reg, NRF_UART_PSEL_DISCONNECTED, NRF_UART_PSEL_DISCONNECTED);
}
__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type *p_reg)
{
return p_reg->RXD;
}
__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type *p_reg, uint8_t txd)
{
p_reg->TXD = txd;
}
__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type *p_reg, nrf_uart_task_t task)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type *p_reg, nrf_uart_task_t task)
{
return (uint32_t)p_reg + (uint32_t)task;
}
__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type *p_reg,
nrf_uart_parity_t parity,
nrf_uart_hwfc_t hwfc)
{
p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc;
}
__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type *p_reg, nrf_uart_baudrate_t baudrate)
{
p_reg->BAUDRATE = baudrate;
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#ifdef __cplusplus
}
#endif
#endif //NRF_UART_H__
third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT.c
Vendored
+1262
View File
File diff suppressed because it is too large Load Diff
third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT.h
Vendored
+214
View File
@@ -0,0 +1,214 @@
/*********************************************************************
* SEGGER MICROCONTROLLER GmbH & Co. KG *
* Solutions for real time microcontroller applications *
**********************************************************************
* *
* (c) 2014 - 2015 SEGGER Microcontroller GmbH & Co. KG *
* *
* www.segger.com Support: [email protected] *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* * This software may in its unmodified form be freely redistributed *
* in source form. *
* * The source code may be modified, provided the source code *
* retains the above copyright notice, this list of conditions and *
* the following disclaimer. *
* * Modified versions of this software in source or linkable form *
* may not be distributed without prior consent of SEGGER. *
* * This software may only be used for communication with SEGGER *
* J-Link debug probes. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************
---------------------------END-OF-HEADER------------------------------
File : SEGGER_RTT.h
Purpose : Implementation of SEGGER real-time transfer which allows
real-time communication on targets which support debugger
memory accesses while the CPU is running.
----------------------------------------------------------------------
*/
#ifndef SEGGER_RTT_H
#define SEGGER_RTT_H
#include "SEGGER_RTT_Conf.h"
/*********************************************************************
*
* Defines, fixed
*
**********************************************************************
*/
/*********************************************************************
*
* Types
*
**********************************************************************
*/
//
// Description for a circular buffer (also called "ring buffer")
// which is used as up- (T->H) or down-buffer (H->T)
//
typedef struct
{
const char *sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4"
char *pBuffer; // Pointer to start of buffer
unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty.
volatile unsigned
WrOff; // Position of next item to be written by either host (down-buffer) or target (up-buffer). Must be volatile since it may be modified by host (down-buffer)
volatile unsigned
RdOff; // Position of next item to be read by target (down-buffer) or host (up-buffer). Must be volatile since it may be modified by host (up-buffer)
unsigned Flags; // Contains configuration flags
} SEGGER_RTT_RING_BUFFER;
//
// RTT control block which describes the number of buffers available
// as well as the configuration for each buffer
//
//
typedef struct
{
char acID[16]; // Initialized to "SEGGER RTT"
int
MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2)
int
MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2)
SEGGER_RTT_RING_BUFFER
aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host
SEGGER_RTT_RING_BUFFER
aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target
} SEGGER_RTT_CB;
/*********************************************************************
*
* Global data
*
**********************************************************************
*/
extern SEGGER_RTT_CB _SEGGER_RTT;
/*********************************************************************
*
* RTT API functions
*
**********************************************************************
*/
int SEGGER_RTT_ConfigUpBuffer(unsigned BufferIndex, const char *sName, void *pBuffer, unsigned BufferSize,
unsigned Flags);
int SEGGER_RTT_ConfigDownBuffer(unsigned BufferIndex, const char *sName, void *pBuffer, unsigned BufferSize,
unsigned Flags);
int SEGGER_RTT_GetKey(void);
unsigned SEGGER_RTT_HasData(unsigned BufferIndex);
int SEGGER_RTT_HasKey(void);
void SEGGER_RTT_Init(void);
unsigned SEGGER_RTT_Read(unsigned BufferIndex, void *pBuffer, unsigned BufferSize);
unsigned SEGGER_RTT_ReadNoLock(unsigned BufferIndex, void *pData, unsigned BufferSize);
int SEGGER_RTT_SetNameDownBuffer(unsigned BufferIndex, const char *sName);
int SEGGER_RTT_SetNameUpBuffer(unsigned BufferIndex, const char *sName);
int SEGGER_RTT_WaitKey(void);
unsigned SEGGER_RTT_Write(unsigned BufferIndex, const void *pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteNoLock(unsigned BufferIndex, const void *pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void *pBuffer, unsigned NumBytes);
unsigned SEGGER_RTT_WriteString(unsigned BufferIndex, const char *s);
//
// Function macro for performance optimization
//
#define SEGGER_RTT_HASDATA(n) (_SEGGER_RTT.aDown[n].WrOff - _SEGGER_RTT.aDown[n].RdOff)
/*********************************************************************
*
* RTT "Terminal" API functions
*
**********************************************************************
*/
int SEGGER_RTT_SetTerminal(char TerminalId);
int SEGGER_RTT_TerminalOut(char TerminalId, const char *s);
/*********************************************************************
*
* RTT printf functions (require SEGGER_RTT_printf.c)
*
**********************************************************************
*/
int SEGGER_RTT_printf(unsigned BufferIndex, const char *sFormat, ...);
/*********************************************************************
*
* Defines
*
**********************************************************************
*/
//
// Operating modes. Define behavior if buffer is full (not enough space for entire message)
//
#define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0U) // Skip. Do not block, output nothing. (Default)
#define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1U) // Trim: Do not block, output as much as fits.
#define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2U) // Block: Wait until there is space in the buffer.
#define SEGGER_RTT_MODE_MASK (3U)
//
// Control sequences, based on ANSI.
// Can be used to control color, and clear the screen
//
#define RTT_CTRL_RESET "\e[0m" // Reset to default colors
#define RTT_CTRL_CLEAR "\e[2J" // Clear screen, reposition cursor to top left
#define RTT_CTRL_TEXT_BLACK "\e[2;30m"
#define RTT_CTRL_TEXT_RED "\e[2;31m"
#define RTT_CTRL_TEXT_GREEN "\e[2;32m"
#define RTT_CTRL_TEXT_YELLOW "\e[2;33m"
#define RTT_CTRL_TEXT_BLUE "\e[2;34m"
#define RTT_CTRL_TEXT_MAGENTA "\e[2;35m"
#define RTT_CTRL_TEXT_CYAN "\e[2;36m"
#define RTT_CTRL_TEXT_WHITE "\e[2;37m"
#define RTT_CTRL_TEXT_BRIGHT_BLACK "\e[1;30m"
#define RTT_CTRL_TEXT_BRIGHT_RED "\e[1;31m"
#define RTT_CTRL_TEXT_BRIGHT_GREEN "\e[1;32m"
#define RTT_CTRL_TEXT_BRIGHT_YELLOW "\e[1;33m"
#define RTT_CTRL_TEXT_BRIGHT_BLUE "\e[1;34m"
#define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\e[1;35m"
#define RTT_CTRL_TEXT_BRIGHT_CYAN "\e[1;36m"
#define RTT_CTRL_TEXT_BRIGHT_WHITE "\e[1;37m"
#define RTT_CTRL_BG_BLACK "\e[24;40m"
#define RTT_CTRL_BG_RED "\e[24;41m"
#define RTT_CTRL_BG_GREEN "\e[24;42m"
#define RTT_CTRL_BG_YELLOW "\e[24;43m"
#define RTT_CTRL_BG_BLUE "\e[24;44m"
#define RTT_CTRL_BG_MAGENTA "\e[24;45m"
#define RTT_CTRL_BG_CYAN "\e[24;46m"
#define RTT_CTRL_BG_WHITE "\e[24;47m"
#define RTT_CTRL_BG_BRIGHT_BLACK "\e[4;40m"
#define RTT_CTRL_BG_BRIGHT_RED "\e[4;41m"
#define RTT_CTRL_BG_BRIGHT_GREEN "\e[4;42m"
#define RTT_CTRL_BG_BRIGHT_YELLOW "\e[4;43m"
#define RTT_CTRL_BG_BRIGHT_BLUE "\e[4;44m"
#define RTT_CTRL_BG_BRIGHT_MAGENTA "\e[4;45m"
#define RTT_CTRL_BG_BRIGHT_CYAN "\e[4;46m"
#define RTT_CTRL_BG_BRIGHT_WHITE "\e[4;47m"
#endif
/*************************** End of file ****************************/
third_party/NordicSemiconductor/segger_rtt/SEGGER_RTT_Conf.h
Vendored
+137
View File
@@ -0,0 +1,137 @@
/*********************************************************************
* SEGGER MICROCONTROLLER GmbH & Co. KG *
* Solutions for real time microcontroller applications *
**********************************************************************
* *
* (c) 2014 - 2015 SEGGER Microcontroller GmbH & Co. KG *
* *
* www.segger.com Support: [email protected] *
* *
**********************************************************************
----------------------------------------------------------------------
File : SEGGER_RTT_Conf.h
Purpose : Implementation of SEGGER real-time transfer (RTT) which
allows real-time communication on targets which support
debugger memory accesses while the CPU is running.
---------------------------END-OF-HEADER------------------------------
*/
#ifndef SEGGER_RTT_CONF_H
#define SEGGER_RTT_CONF_H
#include "compiler_abstraction.h"
#ifdef __ICCARM__
#include <intrinsics.h>
#endif
/*********************************************************************
*
* Defines, configurable
*
**********************************************************************
*/
#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (2) // Max. number of up-buffers (T->H) available on this target (Default: 2)
#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (2) // Max. number of down-buffers (H->T) available on this target (Default: 2)
#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
//
// Target is not allowed to perform other RTT operations while string still has not been stored completely.
// Otherwise we would probably end up with a mixed string in the buffer.
// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
//
/*********************************************************************
*
* RTT lock configuration for SEGGER Embedded Studio,
* Rowley CrossStudio and GCC
*/
#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)
#ifdef __ARM_ARCH_6M__
#define SEGGER_RTT_LOCK(SavedState) { \
__ASM volatile ("mrs %0, primask \n\t" \
"mov r1, $1 \n\t" \
"msr primask, r1 \n\t" \
: "=r" (SavedState) \
: \
: "r1" \
); \
}
#define SEGGER_RTT_UNLOCK(SavedState) { \
__ASM volatile ("msr primask, %0 \n\t" \
: \
: "r" (SavedState) \
: \
); \
}
#elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
#define SEGGER_RTT_LOCK(SavedState) { \
__ASM volatile ("mrs %0, basepri \n\t" \
"mov r1, $128 \n\t" \
"msr basepri, r1 \n\t" \
: "=r" (SavedState) \
: \
: "r1" \
); \
}
#define SEGGER_RTT_UNLOCK(SavedState) { \
__ASM volatile ("msr basepri, %0 \n\t" \
: \
: "r" (SavedState) \
: \
); \
}
#else
#define SEGGER_RTT_LOCK(SavedState) (void)(SavedState)
#define SEGGER_RTT_UNLOCK(SavedState) (void)(SavedState)
#endif
#endif
/*********************************************************************
*
* RTT lock configuration for IAR EWARM
*/
#ifdef __ICCARM__
#if (defined (__ARM7M__) && (__CORE__ == __ARM7M__))
#define SEGGER_RTT_LOCK(SavedState) { \
SavedState = __get_PRIMASK(); \
__set_PRIMASK(1); \
}
#define SEGGER_RTT_UNLOCK(SavedState) { \
__set_PRIMASK(SavedState); \
}
#elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__))
#define SEGGER_RTT_LOCK(SavedState) { \
SavedState = __get_BASEPRI(); \
__set_BASEPRI(128); \
}
#define SEGGER_RTT_UNLOCK(SavedState) { \
__set_BASEPRI(SavedState); \
}
#endif
#endif
/*********************************************************************
*
* RTT lock configuration fallback
*/
#ifndef SEGGER_RTT_LOCK
#define SEGGER_RTT_LOCK(SavedState) (void)(SavedState)
#endif
#ifndef SEGGER_RTT_UNLOCK
#define SEGGER_RTT_UNLOCK(SavedState) (void)(SavedState)
#endif
#endif
/*************************** End of file ****************************/
third_party/NordicSemiconductor/segger_rtt/license/license.txt
Vendored
+38
View File
@@ -0,0 +1,38 @@
/*********************************************************************
* SEGGER MICROCONTROLLER GmbH & Co. KG *
* Solutions for real time microcontroller applications *
**********************************************************************
* *
* (c) 2014 - 2015 SEGGER Microcontroller GmbH & Co. KG *
* *
* www.segger.com Support: [email protected] *
* *
**********************************************************************
* *
* All rights reserved. *
* *
* * This software may in its unmodified form be freely redistributed *
* in source form. *
* * The source code may be modified, provided the source code *
* retains the above copyright notice, this list of conditions and *
* the following disclaimer. *
* * Modified versions of this software in source or linkable form *
* may not be distributed without prior consent of SEGGER. *
* * This software may only be used for communication with SEGGER *
* J-Link debug probes. *
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
* DAMAGE. *
* *
**********************************************************************