[cc13x2-cc26x2] move to openthread/ot-cc13x2-cc26x2 (#6389)

This commit is contained in:
Jonathan Hui
2021-04-02 08:37:37 -07:00
committed by GitHub
parent b9ad0f9391
commit e360c63779
290 changed files with 10 additions and 178923 deletions
+4 -10
View File
@@ -780,7 +780,7 @@ AC_MSG_CHECKING([whether to build examples])
AC_ARG_WITH(examples,
[AS_HELP_STRING([--with-examples=TARGET],
[Build example applications for one of: simulation, cc1352, cc2538, cc2650, cc2652, efr32mg1, efr32mg12, efr32mg13, efr32mg21,
[Build example applications for one of: simulation, cc2538, cc2650, efr32mg1, efr32mg12, efr32mg13, efr32mg21,
jn5189, k32w061, nrf52811, nrf52833, nrf52840 @<:@default=no@:>@.
Note that building example applications also builds the associated OpenThread platform libraries
and any third_party libraries needed to support the examples.])],
@@ -788,7 +788,7 @@ AC_ARG_WITH(examples,
case "${with_examples}" in
no)
;;
simulation|cc1352|cc2538|cc2650|cc2652|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|k32w061|nrf52811|nrf52833|nrf52840)
simulation|cc2538|cc2650|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|k32w061|nrf52811|nrf52833|nrf52840)
;;
*)
AC_MSG_RESULT(ERROR)
@@ -801,10 +801,8 @@ AC_ARG_WITH(examples,
AM_CONDITIONAL([OPENTHREAD_ENABLE_EXAMPLES], [test ${with_examples} != "no"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_SIMULATION],[test "${with_examples}" = "simulation"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC1352], [test "${with_examples}" = "cc1352"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${with_examples}" = "cc2538"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2650], [test "${with_examples}" = "cc2650"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2652], [test "${with_examples}" = "cc2652"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG1], [test "${with_examples}" = "efr32mg1"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG12], [test "${with_examples}" = "efr32mg12"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG13], [test "${with_examples}" = "efr32mg13"])
@@ -837,12 +835,12 @@ AC_MSG_CHECKING([whether to build platform libraries])
AC_ARG_WITH(platform,
[AS_HELP_STRING([--with-platform=TARGET],
[Build OpenThread platform libraries for one of: cc1352, cc2538, cc2650, cc2652,
[Build OpenThread platform libraries for one of: cc2538, cc2650,
efr32mg1, efr32mg12, efr32mg13, efr32mg21, jn5189, nrf52811, nrf52833, nrf52840, posix, simulation @<:@default=simulation@:>@.])],
[
# Make sure the given target is valid.
case "${with_platform}" in
no|cc1352|cc2538|cc2650|cc2652|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|nrf52811|nrf52833|nrf52840|posix|simulation)
no|cc2538|cc2650|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|nrf52811|nrf52833|nrf52840|posix|simulation)
;;
*)
AC_MSG_RESULT(ERROR)
@@ -873,10 +871,8 @@ AM_CONDITIONAL([OPENTHREAD_ENABLE_PLATFORM], [test ${with_platform} != "no"])
OPENTHREAD_ENABLE_PLATFORM=${with_platform}
AM_CONDITIONAL([OPENTHREAD_PLATFORM_CC1352], [test "${with_platform}" = "cc1352"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_CC2538], [test "${with_platform}" = "cc2538"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_CC2650], [test "${with_platform}" = "cc2650"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_CC2652], [test "${with_platform}" = "cc2652"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_EFR32MG1], [test "${with_platform}" = "efr32mg1"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_EFR32MG12], [test "${with_platform}" = "efr32mg12"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_EFR32MG13], [test "${with_platform}" = "efr32mg13"])
@@ -1029,10 +1025,8 @@ examples/apps/Makefile
examples/apps/cli/Makefile
examples/apps/ncp/Makefile
examples/platforms/Makefile
examples/platforms/cc1352/Makefile
examples/platforms/cc2538/Makefile
examples/platforms/cc2650/Makefile
examples/platforms/cc2652/Makefile
examples/platforms/efr32/Makefile
examples/platforms/efr32/sleepy-demo/Makefile
examples/platforms/efr32/sleepy-demo/sleepy-demo-mtd/Makefile
-298
View File
@@ -1,298 +0,0 @@
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
.NOTPARALLEL:
AR = arm-none-eabi-ar
CCAS = arm-none-eabi-as
CPP = arm-none-eabi-cpp
CC = arm-none-eabi-gcc
CXX = arm-none-eabi-g++
LD = arm-none-eabi-ld
STRIP = arm-none-eabi-strip
NM = arm-none-eabi-nm
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
BuildJobs ?= 10
configure_OPTIONS = \
--enable-cli \
--enable-ftd \
--enable-mtd \
--enable-ncp \
--enable-radio-only \
--with-examples=cc1352 \
MBEDTLS_CPPFLAGS="$(CC1352_MBEDTLS_CPPFLAGS)" \
$(NULL)
ifneq ($(DISABLE_BUILTIN_MBEDTLS), 1)
configure_OPTIONS += MBEDTLS_CPPFLAGS="$(CC1352_MBEDTLS_CPPFLAGS)"
endif
DEFAULT_LOGGING ?= 1
CC1352_MBEDTLS_CPPFLAGS = \
-DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"' \
-DMBEDTLS_USER_CONFIG_FILE='\"cc1352-mbedtls-config.h\"' \
-I$(PWD)/examples/platforms/cc1352/crypto \
-I$(PWD)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(PWD)/third_party/mbedtls \
-I$(PWD)/third_party/mbedtls/repo/include \
$(NULL)
CC1352_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-cc1352-config.h\"'
CC1352_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-cc1352-config-check.h\"'
CC1352_CONFIG_FILE_CPPFLAGS += -I$(PWD)/examples/platforms/cc1352/
COMMONCFLAGS := \
-fdata-sections \
-ffunction-sections \
-Os \
-g \
$(CC1352_CONFIG_FILE_CPPFLAGS) \
$(NULL)
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
$(NULL)
CFLAGS += \
$(COMMONCFLAGS) \
$(target_CFLAGS) \
$(NULL)
CXXFLAGS += \
$(COMMONCFLAGS) \
$(target_CXXFLAGS) \
-fno-exceptions \
-fno-rtti \
$(NULL)
LDFLAGS += \
$(COMMONCFLAGS) \
$(target_LDFLAGS) \
-nostartfiles \
-specs=nano.specs \
-specs=nosys.specs \
-Wl,--gc-sections \
-Wl,-Map=map.map \
$(NULL)
ECHO := @echo
MAKE := make
MKDIR_P := mkdir -p
LN_S := ln -s
RM_F := rm -f
INSTALL := /usr/bin/install
INSTALLFLAGS := -p
TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
BuildPath = build
TopBuildDir = $(BuildPath)
AbsTopBuildDir = $(PWD)/$(TopBuildDir)
ResultPath = output
TopResultDir = $(ResultPath)
AbsTopResultDir = $(PWD)/$(TopResultDir)
TargetTuple = cc1352
ARCHS = cortex-m4f
TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib
ifndef BuildJobs
BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
endif
JOBSFLAG := -j$(BuildJobs)
#
# configure-arch <arch>
#
# Configure OpenThread for the specified architecture.
#
# arch - The architecture to configure.
#
define configure-arch
$(ECHO) " CONFIG $(TargetTuple)..."
(cd $(BuildPath)/$(TargetTuple) \
&& $(AbsTopSourceDir)/configure \
INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
CPP="$(CPP)" \
CC="$(CC)" \
CXX="$(CXX)" \
OBJC="$(OBJC)" \
OBJCXX="$(OBJCXX)" \
AR="$(AR)" \
RANLIB="$(RANLIB)" \
NM="$(NM)" \
STRIP="$(STRIP)" \
CPPFLAGS="$(CPPFLAGS)" \
CFLAGS="$(CFLAGS)" \
CXXFLAGS="$(CXXFLAGS)" \
LDFLAGS="$(LDFLAGS)" \
--host=arm-none-eabi \
--prefix=/ \
--exec-prefix=/$(TargetTuple) \
$(configure_OPTIONS))
endef # configure-arch
#
# build-arch <arch>
#
# Build the OpenThread intermediate build products for the specified
# architecture.
#
# arch - The architecture to build.
#
define build-arch
$(ECHO) " BUILD $(TargetTuple)"
$(MAKE) \
$(JOBSFLAG) \
-C $(BuildPath)/$(TargetTuple) \
--no-print-directory \
all
endef # build-arch
#
# stage-arch <arch>
#
# Stage (install) the OpenThread final build products for the specified
# architecture.
#
# arch - The architecture to stage.
#
define stage-arch
$(ECHO) " STAGE $(TargetTuple)"
$(MAKE) \
$(JOBSFLAG) \
-C $(BuildPath)/$(TargetTuple) \
--no-print-directory \
DESTDIR=$(AbsTopResultDir) \
install
endef # stage-arch
#
# ARCH_template <arch>
#
# Define macros, targets and rules to configure, build, and stage the
# OpenThread for a single architecture.
#
# arch - The architecture to instantiate the template for.
#
define ARCH_template
CONFIGURE_TARGETS += configure-$(1)
BUILD_TARGETS += do-build-$(1)
STAGE_TARGETS += stage-$(1)
BUILD_DIRS += $(BuildPath)/$(TargetTuple)
DIRECTORIES += $(BuildPath)/$(TargetTuple)
configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
configure-$(1): $(BuildPath)/$(TargetTuple)/config.status
$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple)
$$(call configure-arch,$(1))
do-build-$(1): configure-$(1)
do-build-$(1):
+$$(call build-arch,$(1))
stage-$(1): do-build-$(1)
stage-$(1): | $(TopResultDir)
$$(call stage-arch,$(1))
$(1): stage-$(1)
endef # ARCH_template
.DEFAULT_GOAL := all
all: stage
#
# cortex-m4f
#
cortex-m4f_target_ABI = cortex-m4f
cortex-m4f_target_CPPFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_CFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_CXXFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_LDFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
# Instantiate an architecture-specific build template for each target
# architecture.
$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
#
# Common / Finalization
#
configure: $(CONFIGURE_TARGETS)
build: $(BUILD_TARGETS)
stage: $(STAGE_TARGETS)
DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
all: stage
$(DIRECTORIES):
$(ECHO) " MKDIR $@"
@$(MKDIR_P) "$@"
clean:
$(ECHO) " CLEAN"
@$(RM_F) -r $(CLEAN_DIRS)
help:
$(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
$(ECHO) "architectures: "
$(ECHO) ""
$(ECHO) " $(ARCHS)"
$(ECHO) ""
$(ECHO) "To build only a particular architecture, specify: "
$(ECHO) ""
$(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
$(ECHO) ""
-298
View File
@@ -1,298 +0,0 @@
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
.NOTPARALLEL:
AR = arm-none-eabi-ar
CCAS = arm-none-eabi-as
CPP = arm-none-eabi-cpp
CC = arm-none-eabi-gcc
CXX = arm-none-eabi-g++
LD = arm-none-eabi-ld
STRIP = arm-none-eabi-strip
NM = arm-none-eabi-nm
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
BuildJobs ?= 10
configure_OPTIONS = \
--enable-cli \
--enable-ftd \
--enable-mtd \
--enable-ncp \
--enable-radio-only \
--with-examples=cc2652 \
MBEDTLS_CPPFLAGS="$(CC2652_MBEDTLS_CPPFLAGS)" \
$(NULL)
ifneq ($(DISABLE_BUILTIN_MBEDTLS), 1)
configure_OPTIONS += MBEDTLS_CPPFLAGS="$(CC2652_MBEDTLS_CPPFLAGS)"
endif
DEFAULT_LOGGING ?= 1
CC2652_MBEDTLS_CPPFLAGS = \
-DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"' \
-DMBEDTLS_USER_CONFIG_FILE='\"cc2652-mbedtls-config.h\"' \
-I$(PWD)/examples/platforms/cc2652/crypto \
-I$(PWD)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(PWD)/third_party/mbedtls \
-I$(PWD)/third_party/mbedtls/repo/include \
$(NULL)
CC2652_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-cc2652-config.h\"'
CC2652_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-cc2652-config-check.h\"'
CC2652_CONFIG_FILE_CPPFLAGS += -I$(PWD)/examples/platforms/cc2652/
COMMONCFLAGS := \
-fdata-sections \
-ffunction-sections \
-Os \
-g \
$(CC2652_CONFIG_FILE_CPPFLAGS) \
$(NULL)
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
$(NULL)
CFLAGS += \
$(COMMONCFLAGS) \
$(target_CFLAGS) \
$(NULL)
CXXFLAGS += \
$(COMMONCFLAGS) \
$(target_CXXFLAGS) \
-fno-exceptions \
-fno-rtti \
$(NULL)
LDFLAGS += \
$(COMMONCFLAGS) \
$(target_LDFLAGS) \
-nostartfiles \
-specs=nano.specs \
-specs=nosys.specs \
-Wl,--gc-sections \
-Wl,-Map=map.map \
$(NULL)
ECHO := @echo
MAKE := make
MKDIR_P := mkdir -p
LN_S := ln -s
RM_F := rm -f
INSTALL := /usr/bin/install
INSTALLFLAGS := -p
TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
BuildPath = build
TopBuildDir = $(BuildPath)
AbsTopBuildDir = $(PWD)/$(TopBuildDir)
ResultPath = output
TopResultDir = $(ResultPath)
AbsTopResultDir = $(PWD)/$(TopResultDir)
TargetTuple = cc2652
ARCHS = cortex-m4f
TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib
ifndef BuildJobs
BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
endif
JOBSFLAG := -j$(BuildJobs)
#
# configure-arch <arch>
#
# Configure OpenThread for the specified architecture.
#
# arch - The architecture to configure.
#
define configure-arch
$(ECHO) " CONFIG $(TargetTuple)..."
(cd $(BuildPath)/$(TargetTuple) \
&& $(AbsTopSourceDir)/configure \
INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
CPP="$(CPP)" \
CC="$(CC)" \
CXX="$(CXX)" \
OBJC="$(OBJC)" \
OBJCXX="$(OBJCXX)" \
AR="$(AR)" \
RANLIB="$(RANLIB)" \
NM="$(NM)" \
STRIP="$(STRIP)" \
CPPFLAGS="$(CPPFLAGS)" \
CFLAGS="$(CFLAGS)" \
CXXFLAGS="$(CXXFLAGS)" \
LDFLAGS="$(LDFLAGS)" \
--host=arm-none-eabi \
--prefix=/ \
--exec-prefix=/$(TargetTuple) \
$(configure_OPTIONS))
endef # configure-arch
#
# build-arch <arch>
#
# Build the OpenThread intermediate build products for the specified
# architecture.
#
# arch - The architecture to build.
#
define build-arch
$(ECHO) " BUILD $(TargetTuple)"
$(MAKE) \
$(JOBSFLAG) \
-C $(BuildPath)/$(TargetTuple) \
--no-print-directory \
all
endef # build-arch
#
# stage-arch <arch>
#
# Stage (install) the OpenThread final build products for the specified
# architecture.
#
# arch - The architecture to stage.
#
define stage-arch
$(ECHO) " STAGE $(TargetTuple)"
$(MAKE) \
$(JOBSFLAG) \
-C $(BuildPath)/$(TargetTuple) \
--no-print-directory \
DESTDIR=$(AbsTopResultDir) \
install
endef # stage-arch
#
# ARCH_template <arch>
#
# Define macros, targets and rules to configure, build, and stage the
# OpenThread for a single architecture.
#
# arch - The architecture to instantiate the template for.
#
define ARCH_template
CONFIGURE_TARGETS += configure-$(1)
BUILD_TARGETS += do-build-$(1)
STAGE_TARGETS += stage-$(1)
BUILD_DIRS += $(BuildPath)/$(TargetTuple)
DIRECTORIES += $(BuildPath)/$(TargetTuple)
configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
configure-$(1): $(BuildPath)/$(TargetTuple)/config.status
$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple)
$$(call configure-arch,$(1))
do-build-$(1): configure-$(1)
do-build-$(1):
+$$(call build-arch,$(1))
stage-$(1): do-build-$(1)
stage-$(1): | $(TopResultDir)
$$(call stage-arch,$(1))
$(1): stage-$(1)
endef # ARCH_template
.DEFAULT_GOAL := all
all: stage
#
# cortex-m4f
#
cortex-m4f_target_ABI = cortex-m4f
cortex-m4f_target_CPPFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_CFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_CXXFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_LDFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
# Instantiate an architecture-specific build template for each target
# architecture.
$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
#
# Common / Finalization
#
configure: $(CONFIGURE_TARGETS)
build: $(BUILD_TARGETS)
stage: $(STAGE_TARGETS)
DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
all: stage
$(DIRECTORIES):
$(ECHO) " MKDIR $@"
@$(MKDIR_P) "$@"
clean:
$(ECHO) " CLEAN"
@$(RM_F) -r $(CLEAN_DIRS)
help:
$(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
$(ECHO) "architectures: "
$(ECHO) ""
$(ECHO) " $(ARCHS)"
$(ECHO) ""
$(ECHO) "To build only a particular architecture, specify: "
$(ECHO) ""
$(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
$(ECHO) ""
+2 -10
View File
@@ -29,6 +29,8 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
EXTRA_DIST = \
cc1352 \
cc2652 \
gp712 \
kw41z \
qpg6095 \
@@ -40,10 +42,8 @@ EXTRA_DIST = \
# Always package (e.g. for 'make dist') these subdirectories.
DIST_SUBDIRS = \
cc1352 \
cc2538 \
cc2650 \
cc2652 \
efr32 \
k32w \
nrf528xx \
@@ -57,10 +57,6 @@ SUBDIRS = \
utils \
$(NULL)
if OPENTHREAD_PLATFORM_CC1352
SUBDIRS += cc1352
endif
if OPENTHREAD_PLATFORM_CC2538
SUBDIRS += cc2538
endif
@@ -69,10 +65,6 @@ if OPENTHREAD_PLATFORM_CC2650
SUBDIRS += cc2650
endif
if OPENTHREAD_PLATFORM_CC2652
SUBDIRS += cc2652
endif
if OPENTHREAD_PLATFORM_EFR32
SUBDIRS += efr32
endif
-8
View File
@@ -41,10 +41,6 @@ LDFLAGS_COMMON = $(NULL)
SOURCES_COMMON = $(NULL)
LIBTOOLFLAGS_COMMON = --preserve-dup-deps
if OPENTHREAD_EXAMPLES_CC1352
include $(top_srcdir)/examples/platforms/cc1352/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_CC2538
include $(top_srcdir)/examples/platforms/cc2538/Makefile.platform.am
endif
@@ -53,10 +49,6 @@ if OPENTHREAD_EXAMPLES_CC2650
include $(top_srcdir)/examples/platforms/cc2650/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_CC2652
include $(top_srcdir)/examples/platforms/cc2652/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_EFR32
include $(top_srcdir)/examples/platforms/efr32/Makefile.platform.am
endif
-96
View File
@@ -1,96 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set(OT_PLATFORM_LIB "openthread-cc1352" PARENT_SCOPE)
if(NOT OT_CONFIG)
set(OT_CONFIG "openthread-core-cc1352-config.h")
set(OT_CONFIG ${OT_CONFIG} PARENT_SCOPE)
endif()
list(APPEND OT_PLATFORM_DEFINES
"OPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE=\"openthread-core-cc1352-config-check.h\""
)
set(OT_PLATFORM_DEFINES ${OT_PLATFORM_DEFINES} PARENT_SCOPE)
target_compile_definitions(ot-config INTERFACE "MBEDTLS_USER_CONFIG_FILE=\"cc1352-mbedtls-config.h\"")
list(APPEND OT_PUBLIC_INCLUDES
"${CMAKE_CURRENT_SOURCE_DIR}/crypto"
"${PROJECT_SOURCE_DIR}/third_party/ti/devices/cc13x2_cc26x2"
)
set(OT_PUBLIC_INCLUDES ${OT_PUBLIC_INCLUDES} PARENT_SCOPE)
list(APPEND OT_PLATFORM_DEFINES "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"${OT_CONFIG}\"")
add_library(openthread-cc1352
alarm.c
diag.c
entropy.c
flash.c
logging.c
misc.c
radio.c
system.c
uart.c
crypto/aes_alt.c
cc1352_ccfg.c
cc1352_startup.c
cxx_helpers.c
)
set_target_properties(
openthread-cc1352
PROPERTIES
C_STANDARD 99
CXX_STANDARD 11
)
target_link_libraries(openthread-cc1352
PUBLIC
cc13x2-cc26x2-driver
-Wl,--gc-sections
-Wl,-Map=$<TARGET_PROPERTY:NAME>.map
PRIVATE
${OT_MBEDTLS}
ot-config
)
target_compile_definitions(openthread-cc1352
PUBLIC
${OT_PLATFORM_DEFINES}
)
target_compile_options(openthread-cc1352 PRIVATE ${OT_CFLAGS})
target_include_directories(openthread-cc1352
PRIVATE
${OT_PUBLIC_INCLUDES}
${PROJECT_SOURCE_DIR}/src/core
${PROJECT_SOURCE_DIR}/examples/platforms
)
-81
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@@ -1,81 +0,0 @@
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
# Do not enable -Wcast-align for this platform
override CFLAGS := $(filter-out -Wcast-align,$(CFLAGS))
override CXXFLAGS := $(filter-out -Wcast-align,$(CXXFLAGS))
lib_LIBRARIES = libopenthread-cc1352.a
libopenthread_cc1352_a_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/cc1352 \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(top_srcdir)/third_party/mbedtls/repo/include \
$(MBEDTLS_CPPFLAGS) \
$(NULL)
PLATFORM_SOURCES = \
alarm.c \
cc1352_radio.h \
diag.c \
entropy.c \
flash.c \
logging.c \
misc.c \
openthread-core-cc1352-config.h \
openthread-core-cc1352-config-check.h \
platform-cc1352.h \
radio.c \
system.c \
uart.c \
crypto/aes_alt.c \
cc1352_ccfg.c \
cc1352_startup.c \
cxx_helpers.c \
$(NULL)
libopenthread_cc1352_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
libopenthread_cc1352_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
Dash = -
libopenthread_cc1352_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
@@ -1,44 +0,0 @@
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
#
# cc1352 platform-specific Makefile
#
CPPFLAGS_COMMON += \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
$(NULL)
LDADD_COMMON += \
$(top_builddir)/examples/platforms/cc1352/libopenthread-cc1352.a \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
LDFLAGS_COMMON += \
-T $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds \
$(NULL)
+1 -103
View File
@@ -1,103 +1 @@
# OpenThread on CC1352 Example
This directory contains example platform drivers for the [Texas Instruments CC1352R1][cc1352r1].
The example platform drivers are intended to present the minimal code necessary to support OpenThread. As a result, the example platform drivers do not necessarily highlight the platform's full capabilities. Consult the [SimpleLink CC26X2R1 SDK][cc26x2r1-sdk] for more development option. The platform drivers were built for the [CC1352R1 LAUNCHXL][cc1352r1-launchxl], usage on other boards with a cc1352r1 may require changes to the peripheral drivers.
[cc1352r1-launchxl]: http://www.ti.com/tool/launchxl-cc26x2r1
[cc26x2r1-sdk]: http://www.ti.com/tool/simplelink-cc26x2-sdk
<!---
TODO: Update link when cc1352 product page is live
[cc1352r1]: http://www.ti.com/product/cc1352r1
-->
[cc1352r1]: http://www.ti.com/tool/launchxl-cc26x2r1
## Toolchain
Building the examples for the cc1352 requires [GNU AutoConf][gnu-autoconf], [GNU AutoMake][gnu-automake], [Python][python], and the [ARM gcc toolchain][arm-toolchain].
With the exception of the arm toolchain, most of these tools are installed by default on modern Posix systems. It is recommended to setup a Linux virtual machine for building on a Windows host system. For help setting up VirtualBox with Ubuntu, consult this [community help wiki article][ubuntu-wiki-virtualbox].
[gnu-autoconf]: https://www.gnu.org/software/autoconf
[gnu-automake]: https://www.gnu.org/software/automake
[python]: https://www.python.org
[arm-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
[cygwin]: https://www.cygwin.com
[mingw]: http://www.mingw.org
[ubuntu-wiki-virtualbox]: https://help.ubuntu.com/community/VirtualBox
In a Bash terminal, follow these instructions to install the GNU toolchain and other dependencies.
```bash
$ cd <path-to-openthread>
$ ./script/bootstrap
```
## Building
In a Bash terminal, follow these instructions to build the cc1352 examples.
```bash
$ cd <path-to-openthread>
$ ./bootstrap
$ make -f examples/Makefile-cc1352
```
## Flash Binaries
If the build completed successfully, the `elf` files may be found in `<path-to-openthread>/output/cc1352/bin`.
Flash the images with [Uniflash][uniflash]. Make sure to deselect the binary check-box, Uniflash assumes a file without an extension is a binary file.
[uniflash]: http://www.ti.com/tool/uniflash
## Interact
### CLI example
1. With a terminal client (PuTTY, minicom, etc.) open the com port associated with the cc1352 UART. The serial port settings are:
- 115200 baud
- 8 data bits
- no parity bit
- 1 stop bit
2. Type `help` for a list of commands.
3. Follow the instructions in the [CLI README][cli-readme] for instructions on setting up a network.
[cli-readme]: ../../../src/cli/README.md
```bash
> help
help
channel
childtimeout
contextreusedelay
extaddr
extpanid
ipaddr
keysequence
leaderweight
masterkey
mode
netdata register
networkidtimeout
networkname
panid
ping
prefix
releaserouterid
rloc16
route
routerupgradethreshold
scan
start
state
stop
```
### NCP example
Refer to the documentation in the [wpantund][wpantund] project for build instructions and usage information.
[wpantund]: https://github.com/openthread/wpantund
The OpenThread on CC1352 example has moved to https://github.com/openthread/ot-cc13x2-cc26x2
-130
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@@ -1,130 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for the alarm.
*
*/
#include <openthread/config.h>
#include <driverlib/aon_rtc.h>
#include <stdbool.h>
#include <stdint.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
#include "platform-cc1352.h"
/* NOTE: we could use systick, but that would sacrifice atleast a few ops
* every ms, and not run when the processor is sleeping.
*/
static uint32_t sTime0 = 0;
static uint32_t sAlarmTime = 0;
static bool sIsRunning = false;
/**
* Function documented in platform-cc1352.h
*/
void cc1352AlarmInit(void)
{
/*
* NOTE: this will not enable the individual rtc alarm channels
*/
AONRTCEnable();
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
uint32_t otPlatAlarmMilliGetNow(void)
{
/*
* This is current value of RTC as it appears in the register.
* With seconds as the upper 32 bits and fractions of a second as the
* lower 32 bits <32.32>.
*/
uint64_t rtcVal = AONRTCCurrent64BitValueGet();
return ((rtcVal * 1000) >> 32);
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
OT_UNUSED_VARIABLE(aInstance);
sTime0 = aT0;
sAlarmTime = aDt;
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStop(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
sIsRunning = false;
}
/**
* Function documented in platform-cc1352.h
*/
void cc1352AlarmProcess(otInstance *aInstance)
{
uint32_t offsetTime;
if (sIsRunning)
{
/* unsinged subtraction will result in the absolute offset */
offsetTime = otPlatAlarmMilliGetNow() - sTime0;
if (sAlarmTime <= offsetTime)
{
sIsRunning = false;
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
{
otPlatDiagAlarmFired(aInstance);
}
else
#endif /* OPENTHREAD_CONFIG_DIAG_ENABLE */
{
otPlatAlarmMilliFired(aInstance);
}
}
}
}
@@ -1,42 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR ARM)
set(CMAKE_C_COMPILER arm-none-eabi-gcc)
set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
set(CMAKE_ASM_COMPILER arm-none-eabi-as)
set(CMAKE_RANLIB arm-none-eabi-ranlib)
set(COMMON_C_FLAGS "-mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -fdata-sections -ffunction-sections")
set(CMAKE_C_FLAGS_INIT "${COMMON_C_FLAGS} -std=gnu99")
set(CMAKE_CXX_FLAGS_INIT "${COMMON_C_FLAGS} -fno-exceptions -fno-rtti")
set(CMAKE_ASM_FLAGS_INIT "${COMMON_C_FLAGS}")
set(CMAKE_EXE_LINKER_FLAGS_INIT "${COMMON_C_FLAGS} -nostartfiles -specs=nano.specs -specs=nosys.specs")
-49
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@@ -1,49 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Configure the Customer Configuration Area.
*/
// clang-format off
// enable bootloader backdoor
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0F // DIO15 (BTN-1 button) on CC1352 LaunchPad Board for boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor
/*
* Include the default ccfg struct and configuration code.
*/
#include <startup_files/ccfg.c>
// clang-format on
-200
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@@ -1,200 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC1352_RADIO_H_
#define CC1352_RADIO_H_
#include <driverlib/rf_ieee_cmd.h>
enum
{
IEEE802154_FRAME_TYPE_MASK = 0x7, ///< (IEEE 802.15.4-2006) PSDU.FCF.frameType
IEEE802154_FRAME_TYPE_ACK = 0x2, ///< (IEEE 802.15.4-2006) frame type: ACK
IEEE802154_ACK_REQUEST = (1 << 5), ///< (IEEE 802.15.4-2006) PSDU.FCF.bAR
IEEE802154_DSN_OFFSET = 2, ///< (IEEE 802.15.4-2006) PSDU.sequenceNumber
IEEE802154_MAC_MIN_BE = 1, ///< (IEEE 802.15.4-2006) macMinBE
IEEE802154_MAC_MAX_BE = 5, ///< (IEEE 802.15.4-2006) macMaxBE
IEEE802154_MAC_MAX_CSMA_BACKOFFS = 4, ///< (IEEE 802.15.4-2006) macMaxCSMABackoffs
IEEE802154_MAC_MAX_FRAMES_RETRIES = 3, ///< (IEEE 802.15.4-2006) macMaxFrameRetries
IEEE802154_A_UINT_BACKOFF_PERIOD = 20, ///< (IEEE 802.15.4-2006 7.4.1) MAC constants
IEEE802154_A_TURNAROUND_TIME = 12, ///< (IEEE 802.15.4-2006 6.4.1) PHY constants
IEEE802154_PHY_SHR_DURATION = 10,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_PHY_SYMBOLS_PER_OCTET = 2,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_MAC_ACK_WAIT_DURATION = (IEEE802154_A_UINT_BACKOFF_PERIOD + //
IEEE802154_A_TURNAROUND_TIME + //
IEEE802154_PHY_SHR_DURATION + //
(6 * IEEE802154_PHY_SYMBOLS_PER_OCTET)), //
///< (IEEE 802.15.4-2006 7.4.2) macAckWaitDuration PIB attribute
IEEE802154_SYMBOLS_PER_SEC = 62500 ///< (IEEE 802.15.4-2006 6.5.3.2) O-QPSK symbol rate
};
enum
{
CC1352_RAT_TICKS_PER_SEC = 4000000, ///< 4MHz clock
CC1352_INVALID_RSSI = 127,
CC1352_UNKNOWN_EUI64 = 0xFF,
///< If the EUI64 read from the ccfg is all ones then the customer did not set the address
};
/**
* TX Power dBm lookup table - values from SmartRF Studio
*/
typedef struct output_config
{
int dbm;
uint16_t value;
} output_config_t;
/**
* * TX Power dBm lookup table from SmartRF Studio 7 2.10.0#94
*/
static const output_config_t rgOutputPower[] = {
{5, 0x941E}, //
{4, 0x6c16}, //
{3, 0x5411}, //
{2, 0x440d}, //
{1, 0x385c}, //
{0, 0x3459}, //
{-3, 0x2851}, //
{-5, 0x224e}, //
{-6, 0x204d}, //
{-9, 0x0a8d}, //
{-10, 0x168c}, //
{-12, 0x108a}, //
{-15, 0xc88c}, //
{-18, 0x06c9}, //
{-21, 0x06c7}, //
};
#define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0]))
/* Max and Min Output Power in dBm */
#define OUTPUT_POWER_MIN (rgOutputPower[OUTPUT_CONFIG_COUNT - 1].dbm)
#define OUTPUT_POWER_MAX (rgOutputPower[0].dbm)
#define OUTPUT_POWER_UNKNOWN 0xFFFF
/**
* return value used when searching the source match array
*/
#define CC1352_SRC_MATCH_NONE 0xFF
/**
* number of extended addresses used for source matching
*/
#define CC1352_EXTADD_SRC_MATCH_NUM 10
/**
* structure for source matching extended addresses
*/
typedef struct __attribute__((aligned(4))) ext_src_match_data
{
uint32_t srcMatchEn[((CC1352_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC1352_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint64_t extAddrEnt[CC1352_EXTADD_SRC_MATCH_NUM];
} ext_src_match_data_t;
/**
* number of short addresses used for source matching
*/
#define CC1352_SHORTADD_SRC_MATCH_NUM 10
/**
* structure for source matching short addresses
*/
typedef struct __attribute__((aligned(4))) short_src_match_data
{
uint32_t srcMatchEn[((CC1352_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC1352_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
rfc_shortAddrEntry_t extAddrEnt[CC1352_SHORTADD_SRC_MATCH_NUM];
} short_src_match_data_t;
/**
* size of length field in receive struct
*
* defined in Table 23-10 of the cc26xx TRM
*/
#define DATA_ENTRY_LENSZ_BYTE 1
/**
* address type for @ref rfCoreModifySourceMatchEntry()
*/
typedef enum cc1352_address
{
SHORT_ADDRESS = 1,
EXT_ADDRESS = 0,
} cc1352_address_t;
/**
* This enum represents the state of a radio.
* Initially, a radio is in the Disabled state.
*
* The following are valid radio state transitions for the cc1352:
*
* (Radio ON)
* +----------+ Enable() +-------+ Receive() +---------+ Transmit() +----------+
* | |----------->| |------------->| |--------------->| |
* | Disabled | | Sleep | | Receive | | Transmit |
* | |<-----------| |<-------------| |<---------------| |
* +----------+ Disable() | | Sleep() | | AckFrame RX or +----------+
* | | (Radio OFF) +---------+ sTxCmdChainDone == true
* | |
* | | EnergyScan() +--------+
* | |------------->| |
* | | | EdScan |
* | |<-------------| |
* | | signal ED | |
* +-------+ scan done +--------+
*
* These states slightly differ from the states in \ref include/platform/radio.h.
* The additional states the phy can be in are due to the asynchronous nature
* of the CM0 radio core.
*
* | state | description |
* |------------------|----------------------------------------------------|
* | Disabled | The rfcore powerdomain is off and the RFCPE is off |
* | Sleep | The RFCORE PD is on, and the RFCPE is in IEEE mode |
* | Receive | The RFCPE is running a CMD_IEEE_RX |
* | Transmit | The RFCPE is running a transmit command string |
* | TransmitComplete | The transmit command string has completed |
* | EdScan | The RFCPE is running a CMD_IEEE_ED_SCAN |
*
* \note The RAT start and Radio Setup commands may be moved to the Receive()
* and EnergyScan() transitions in the future.
*/
typedef enum cc1352_PhyState
{
cc1352_stateDisabled = 0,
cc1352_stateSleep,
cc1352_stateReceive,
cc1352_stateEdScan,
cc1352_stateTransmit,
} cc1352_PhyState_t;
#endif /* CC1352_RADIO_H_ */
@@ -1,39 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Include the standard startup files for the specified toolchain
* startup code is in 'third_party/ti'
*/
#if defined(__GNUC__)
#include <startup_files/startup_gcc.c>
#elif defined(__TI_ARM__)
#include <startup_files/startup_ccs.c>
#else
#error "Unknown compiler"
#endif
-202
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@@ -1,202 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "aes_alt.h"
#include "mbedtls/aes.h"
#ifdef MBEDTLS_AES_ALT
#include <driverlib/crypto.h>
#include <driverlib/prcm.h>
#include <string.h>
#include <utils/code_utils.h>
#define CC1352_AES_KEY_UNUSED (-1)
#define CC1352_AES_CTX_MAGIC (0x7E)
/**
* bitmap of which key stores are currently used
*/
static uint8_t sUsedKeys = 0;
/**
* number of active contexts, used for power on/off of the crypto core
*/
static unsigned int sRefNum = 0;
/*
* Documented in aes_alt.h
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx)
{
if (sRefNum++ == 0)
{
/* enable the crypto core */
/* The TRNG should already be running before we ever ask the AES core
* to do anything, if there is any scenario that the TRNG powers off
* the peripheral power domain use this code to repower it
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON);
*/
PRCMPeripheralRunEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
ctx->magic = CC1352_AES_CTX_MAGIC;
ctx->key_idx = CC1352_AES_KEY_UNUSED;
}
/*
* Documented in aes_alt.h
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx)
{
otEXPECT(ctx->magic == CC1352_AES_CTX_MAGIC);
if (ctx->key_idx != CC1352_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
if (--sRefNum == 0)
{
/* disable the crypto core */
/* The TRNG core needs the peripheral power domain powered on to
* function. if there is a situation where the power domain must be
* powered off, use this code to do so.
PRCMPowerDomainOff(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_OFF);
*/
PRCMPeripheralRunDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
memset((void *)ctx, 0x00, sizeof(ctx));
exit:
return;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC1352_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC1352_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC1352_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC1352_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16])
{
int retval = -1;
retval = CRYPTOAesEcb((uint32_t *)input, (uint32_t *)output, ctx->key_idx, mode == MBEDTLS_AES_ENCRYPT, false);
otEXPECT(retval == AES_SUCCESS);
while ((retval = CRYPTOAesEcbStatus()) == AES_DMA_BSY)
;
CRYPTOAesEcbFinish();
exit:
return retval;
}
#endif /* MBEDTLS_AES_ALT */
-108
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@@ -1,108 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef MBEDTLS_AES_ALT_H
#define MBEDTLS_AES_ALT_H
#ifndef MBEDTLS_CONFIG_FILE
#include "cc1352-mbedtls-config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#ifdef MBEDTLS_AES_ALT
#ifdef __cplusplus
extern "C" {
#endif
typedef struct
{
uint8_t magic;
signed char key_idx;
} mbedtls_aes_context;
/**
* @brief Initialize AES context
*
* @param [in,out] ctx AES context to be initialized
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx);
/**
* @brief Clear AES context
*
* @param [in,out] ctx AES context to be cleared
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx);
/**
* @brief AES key schedule (encryption)
*
* @param [in,out] ctx AES context to be used
* @param [in] key Encryption key
* @param [in] keybits Must be 128
*
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* @brief AES key schedule (decryption)
*
* @param [in,out] ctx AES context to be used
* @param [in] key Decryption key
* @param [in] keybits Must be 128
*
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
*
* \param ctx AES context
* \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
* \param input 16-byte input block
* \param output 16-byte output block
*
* @return The return value of @ref CRYPTOAesEcb.
* @retval 0 If successful
* @retval AES_KEYSTORE_READ_ERROR If the indicated keystore ram could not be read
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
#ifdef __cplusplus
}
#endif
#endif /* MBEDTLS_AES_ALT */
#endif /* MBEDTLS_AES_ALT_H */
@@ -1,37 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC1352_MBEDTLS_CONFIG_H
#define CC1352_MBEDTLS_CONFIG_H
#define MBEDTLS_AES_ALT
/* TODO: remove once AES alt driver supports 256-bit keys */
#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY
#endif // CC1352_MBEDTLS_CONFIG_H
-54
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@@ -1,54 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Helper functions for running c++ without the standard library
*/
__extension__ typedef int __guard __attribute__((mode(__DI__)));
int __cxa_guard_acquire(__guard *g)
{
return !*(char *)(g);
}
void __cxa_guard_release(__guard *g)
{
*(char *)g = 1;
}
void __cxa_guard_abort(__guard *g)
{
(void)g;
}
void __cxa_pure_virtual(void)
{
while (1)
;
}
-81
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@@ -1,81 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <openthread/config.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/radio.h>
#include "platform-cc1352.h"
#if OPENTHREAD_CONFIG_DIAG_ENABLE
/**
* Diagnostics mode variables.
*
*/
static bool sDiagMode = false;
void otPlatDiagModeSet(bool aMode)
{
sDiagMode = aMode;
}
bool otPlatDiagModeGet()
{
return sDiagMode;
}
void otPlatDiagChannelSet(uint8_t aChannel)
{
OT_UNUSED_VARIABLE(aChannel);
}
void otPlatDiagTxPowerSet(int8_t aTxPower)
{
OT_UNUSED_VARIABLE(aTxPower);
}
void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
{
OT_UNUSED_VARIABLE(aInstance);
OT_UNUSED_VARIABLE(aFrame);
OT_UNUSED_VARIABLE(aError);
}
void otPlatDiagAlarmCallback(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
}
#endif // OPENTHREAD_CONFIG_DIAG_ENABLE
-134
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@@ -1,134 +0,0 @@
/*
* Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements an entropy source based on TRNG.
*
*/
#include <openthread/platform/entropy.h>
#include <openthread/config.h>
#include <stddef.h>
#include <utils/code_utils.h>
#include <driverlib/prcm.h>
#include <driverlib/trng.h>
enum
{
CC1352_TRNG_MIN_SAMPLES_PER_CYCLE = (1 << 6),
CC1352_TRNG_MAX_SAMPLES_PER_CYCLE = (1 << 24),
CC1352_TRNG_CLOCKS_PER_SAMPLE = 0,
};
/**
* \note if more than 32 bits of entropy are needed, the TRNG core produces
* 64 bits of random data, we just ignore the upper 32 bytes
*/
/**
* Function documented in platform-cc1352.h
*/
void cc1352RandomInit(void)
{
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON)
;
PRCMPeripheralRunEnable(PRCM_PERIPH_TRNG);
PRCMPeripheralSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMPeripheralDeepSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMLoadSet();
TRNGConfigure(CC1352_TRNG_MIN_SAMPLES_PER_CYCLE, CC1352_TRNG_MAX_SAMPLES_PER_CYCLE, CC1352_TRNG_CLOCKS_PER_SAMPLE);
TRNGEnable();
}
/**
* Fill an arbitrary area with random data.
*
* @param [out] aOutput Area to place the random data.
* @param [in] aLen Size of the area to place random data.
* @param [out] oLen How much of the output was written to.
*
* @return Indication of error.
* @retval 0 No error occurred.
*/
static int TRNGPoll(unsigned char *aOutput, size_t aLen)
{
size_t length = 0;
union
{
uint32_t u32[2];
uint8_t u8[8];
} buffer;
while (length < aLen)
{
if (length % 8 == 0)
{
/* we've run to the end of the buffer */
while (!(TRNGStatusGet() & TRNG_NUMBER_READY))
;
/*
* don't use TRNGNumberGet here because it will tell the TRNG to
* refill the entropy pool, instead we do it ourself.
*/
buffer.u32[0] = HWREG(TRNG_BASE + TRNG_O_OUT0);
buffer.u32[1] = HWREG(TRNG_BASE + TRNG_O_OUT1);
HWREG(TRNG_BASE + TRNG_O_IRQFLAGCLR) = 0x1;
}
aOutput[length] = buffer.u8[length % 8];
length++;
}
return 0;
}
/**
* Function documented in platform/entropy.h
*/
otError otPlatEntropyGet(uint8_t *aOutput, uint16_t aOutputLength)
{
otError error = OT_ERROR_NONE;
size_t length = aOutputLength;
otEXPECT_ACTION(aOutput, error = OT_ERROR_INVALID_ARGS);
otEXPECT_ACTION(TRNGPoll((unsigned char *)aOutput, length) == 0, error = OT_ERROR_FAILED);
exit:
return error;
}
-261
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@@ -1,261 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include <openthread/instance.h>
#include <driverlib/aon_batmon.h>
#include <driverlib/flash.h>
#include <driverlib/interrupt.h>
#include <driverlib/vims.h>
#include <utils/code_utils.h>
#include "platform-cc1352.h"
#define FLASH_BASE_ADDRESS 0x52000
#define FLASH_PAGE_SIZE 0x2000
#define FLASH_PAGE_NUM 2 /* must be a multiple of 2 */
#define FLASH_SWAP_SIZE (FLASH_PAGE_SIZE * (FLASH_PAGE_NUM / 2))
enum
{
MIN_VDD_FLASH = 0x18, /* 1.50 volts (0.50=128/256 -> 128=0x80) */
MAX_WRITE_INCREMENT = 8, /* maximum number of bytes to write at a time to
* avoid interrupt latency while in ROM
*/
};
/**
* Check if the Battery Monitor measurements and calculations are enabled.
*
* @return If the Battery Monitor is enabled.
* @retval true The Battery Monitor is on.
* @retval false The Battery Monitor is off.
*/
static bool isBatMonOn(void)
{
uint32_t batMonCtl = HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL);
return ((batMonCtl & AON_BATMON_CTL_CALC_EN_M) == AON_BATMON_CTL_CALC_EN &&
(batMonCtl & AON_BATMON_CTL_MEAS_EN_M) == AON_BATMON_CTL_MEAS_EN);
}
/**
* Check if the supply voltage is high enough to support flash programming.
*
* @return If the Voltage is too low to support flash programming.
* @retval false The supply voltage is too low.
* @retval true The supply voltage is sufficient.
*/
static bool checkVoltage(void)
{
bool batMonWasOff = !isBatMonOn();
bool ret = false;
if (batMonWasOff)
{
AONBatMonEnable();
}
if (AONBatMonBatteryVoltageGet() >= MIN_VDD_FLASH)
{
ret = true;
}
if (batMonWasOff)
{
AONBatMonDisable();
}
return ret;
}
/**
* Disable Flash data caching and instruction pre-fetching.
*
* It is necessary to disable the caching and VIMS to ensure the cache has
* valid data while the program is executing.
*
* @return The VIMS state before being disabled.
*/
static uint32_t disableFlashCache(void)
{
uint32_t mode = VIMSModeGet(VIMS_BASE);
VIMSLineBufDisable(VIMS_BASE);
if (mode != VIMS_MODE_DISABLED)
{
VIMSModeSet(VIMS_BASE, VIMS_MODE_DISABLED);
while (VIMSModeGet(VIMS_BASE) != VIMS_MODE_DISABLED)
;
}
return mode;
}
/**
* Restore the Flash data caching and instruction pre-fetching.
*
* @param [in] mode The VIMS mode returned by @ref disableFlashCache.
*/
static void restoreFlashCache(uint32_t mode)
{
if (mode != VIMS_MODE_DISABLED)
{
VIMSModeSet(VIMS_BASE, mode);
}
VIMSLineBufEnable(VIMS_BASE);
}
static uint32_t mapAddress(uint8_t aSwapIndex, uint32_t aOffset)
{
uint32_t address = FLASH_BASE_ADDRESS + aOffset;
if (aSwapIndex)
{
address += FLASH_SWAP_SIZE;
}
return address;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashInit(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
}
/**
* Function documented in platforms/utils/flash.h
*/
uint32_t otPlatFlashGetSwapSize(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
return FLASH_SWAP_SIZE;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashErase(otInstance *aInstance, uint8_t aSwapIndex)
{
OT_UNUSED_VARIABLE(aInstance);
uint32_t mode;
otEXPECT(checkVoltage());
mode = disableFlashCache();
for (uint8_t page = 0; page < FLASH_PAGE_NUM; page++)
{
FlashSectorErase(mapAddress(aSwapIndex, (page * FLASH_PAGE_SIZE)));
}
restoreFlashCache(mode);
while (FlashCheckFsmForReady() != FAPI_STATUS_FSM_READY)
{
}
exit:
return;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashWrite(otInstance *aInstance, uint8_t aSwapIndex, uint32_t aOffset, const void *aData, uint32_t aSize)
{
OT_UNUSED_VARIABLE(aInstance);
uint32_t mode;
uint32_t written = 0;
uint32_t address;
otEXPECT(checkVoltage());
mode = disableFlashCache();
address = mapAddress(aSwapIndex, aOffset);
while (written < aSize)
{
uint32_t toWrite = aSize - written;
const uint8_t *data = (uint8_t *)aData + written;
uint32_t fsmRet;
bool interruptsWereDisabled;
if (toWrite > MAX_WRITE_INCREMENT)
{
toWrite = MAX_WRITE_INCREMENT;
}
/* The CPU may not execute code from flash while a program is
* happening. We disable interrupts to ensure one does not preempt the
* ROM fsm.
*/
interruptsWereDisabled = IntMasterDisable();
fsmRet = FlashProgram((uint8_t *)data, address + written, toWrite);
if (!interruptsWereDisabled)
{
IntMasterEnable();
}
if (fsmRet != FAPI_STATUS_SUCCESS)
{
break;
}
written += toWrite;
}
restoreFlashCache(mode);
exit:
return;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashRead(otInstance *aInstance, uint8_t aSwapIndex, uint32_t aOffset, void *aData, uint32_t aSize)
{
OT_UNUSED_VARIABLE(aInstance);
memcpy(aData, (void *)mapAddress(aSwapIndex, aOffset), (size_t)aSize);
}
-46
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@@ -1,46 +0,0 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file logging.c
* Platform abstraction for the logging
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <openthread/platform/logging.h>
#include <openthread/platform/toolchain.h>
#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED)
OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
{
OT_UNUSED_VARIABLE(aLogLevel);
OT_UNUSED_VARIABLE(aLogRegion);
OT_UNUSED_VARIABLE(aFormat);
}
#endif
-93
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@@ -1,93 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <driverlib/sys_ctrl.h>
#include <openthread/platform/misc.h>
/*
* NOTE: if the system is flashed with Flash Programmer 2 or Uniflash, this
* reset will not work the first time. Both programs use the cJTAG module,
* which sets the halt in boot flag. The device must be manually reset the
* first time after being programmed through the JTAG interface.
*/
/**
* Function documented in platform/misc.h
*/
void otPlatReset(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
SysCtrlSystemReset();
}
/**
* Function documented in platform/misc.h
*/
otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
otPlatResetReason ret;
switch (SysCtrlResetSourceGet())
{
case RSTSRC_PWR_ON:
ret = OT_PLAT_RESET_REASON_POWER_ON;
break;
case RSTSRC_PIN_RESET:
ret = OT_PLAT_RESET_REASON_EXTERNAL;
break;
case RSTSRC_VDDS_LOSS:
case RSTSRC_VDDR_LOSS:
case RSTSRC_CLK_LOSS:
ret = OT_PLAT_RESET_REASON_CRASH;
break;
case RSTSRC_WARMRESET:
case RSTSRC_SYSRESET:
case RSTSRC_WAKEUP_FROM_SHUTDOWN:
ret = OT_PLAT_RESET_REASON_SOFTWARE;
break;
default:
ret = OT_PLAT_RESET_REASON_UNKNOWN;
break;
}
return ret;
}
void otPlatWakeHost(void)
{
// TODO: implement an operation to wake the host from sleep state.
}
@@ -1,36 +0,0 @@
/*
* Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC1352_CONFIG_CHECK_H_
#define OPENTHREAD_CORE_CC1352_CONFIG_CHECK_H_
#if OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT
#error "Platform cc1352 doesn't support configuration option: OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT"
#endif
#endif /* OPENTHREAD_CORE_CC1352_CONFIG_CHECK_H_ */
@@ -1,58 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC1352_CONFIG_H_
#define OPENTHREAD_CORE_CC1352_CONFIG_H_
/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
* The platform-specific string to insert into the OpenThread version string.
*
*/
#define OPENTHREAD_CONFIG_PLATFORM_INFO "CC1352"
/**
* @def OPENTHREAD_CONFIG_PLATFORM_FLASH_API_ENABLE
*
* Define to 1 to enable otPlatFlash* APIs to support non-volatile storage.
*
* When defined to 1, the platform MUST implement the otPlatFlash* APIs instead of the otPlatSettings* APIs.
*
*/
#define OPENTHREAD_CONFIG_PLATFORM_FLASH_API_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_NCP_HDLC_ENABLE
*
* Define to 1 to enable NCP HDLC support.
*
*/
#define OPENTHREAD_CONFIG_NCP_HDLC_ENABLE 1
#endif /* OPENTHREAD_CORE_CC1352_CONFIG_H_ */
@@ -1,89 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef PLATFORM_H_
#define PLATFORM_H_
#include <openthread-core-config.h>
#include <stdint.h>
#include <openthread/config.h>
#include <openthread/instance.h>
#ifdef __cplusplus
extern "C" {
#endif
// Global OpenThread instance structure
extern otInstance *sInstance;
/**
* Initialize the debug uart
*/
void cc1352DebugUartInit(void);
/**
* This method initializes the alarm service used by OpenThread.
*
*/
void cc1352AlarmInit(void);
/**
* This method performs alarm driver processing.
*
*/
void cc1352AlarmProcess(otInstance *aInstance);
/**
* This method initializes the radio service used by OpenThread.
*
*/
void cc1352RadioInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc1352RadioProcess(otInstance *aInstance);
/**
* This method initializes the random number service used by OpenThread.
*
*/
void cc1352RandomInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc1352UartProcess(void);
#ifdef __cplusplus
} // extern "C"
#endif
#endif // PLATFORM_H_
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief
* This file includes the platform-specific initializers.
*/
#include <openthread/config.h>
#include "platform-cc1352.h"
#include <stdio.h>
#include "inc/hw_ccfg.h"
#include "inc/hw_ccfg_simple_struct.h"
#include "inc/hw_types.h"
extern const ccfg_t __ccfg;
const char *dummy_ccfg_ref = ((const char *)(&(__ccfg)));
/**
* Function documented in platform-cc1352.h
*/
void otSysInit(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
while (dummy_ccfg_ref == NULL)
{
/*
* This provides a code reference to the customer configuration area of
* the flash, otherwise the data is skipped by the linker and not put
* into the final flash image.
*/
}
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
cc1352DebugUartInit();
#endif
cc1352AlarmInit();
cc1352RandomInit();
cc1352RadioInit();
}
bool otSysPseudoResetWasRequested(void)
{
return false;
}
/**
* Function documented in platform-cc1352.h
*/
void otSysProcessDrivers(otInstance *aInstance)
{
// should sleep and wait for interrupts here
cc1352UartProcess();
cc1352RadioProcess(aInstance);
cc1352AlarmProcess(aInstance);
}
-338
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@@ -1,338 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for UART communication.
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdio.h>
#include <openthread/platform/debug_uart.h>
#include <openthread/platform/logging.h>
#include "utils/code_utils.h"
#include "utils/uart.h"
#include <driverlib/ioc.h>
#include <driverlib/prcm.h>
#include <driverlib/sys_ctrl.h>
#include <driverlib/uart.h>
/**
* @note This will configure the uart for 115200 baud 8-N-1, no HW flow control
* RX pin IOID_2 TX pin IOID_3.
*
* If the DEBUG UART is enabled, IOID_0 = debug tx, IOID_1 = debug rx
*/
enum
{
CC1352_RECV_CIRC_BUFF_SIZE = 256,
};
static uint8_t const *sSendBuffer = NULL;
static uint16_t sSendLen = 0;
static uint8_t sReceiveBuffer[CC1352_RECV_CIRC_BUFF_SIZE];
static uint16_t sReceiveHeadIdx = 0;
static uint16_t sReceiveTailIdx = 0;
void UART0_intHandler(void);
static void uart_power_control(uint32_t who_base, int turnon)
{
uint32_t value;
if (turnon)
{
/* UART0 is in the SERIAL domain
* UART1 is in the PERIPH domain.
* See: ti/devices/cc13x2_cc26x2/driverlib/pcrm.h, line: 658
*/
value = (who_base == UART0_BASE) ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH;
PRCMPowerDomainOn(value);
while (PRCMPowerDomainStatus(value) != PRCM_DOMAIN_POWER_ON)
;
value = (who_base == UART0_BASE) ? PRCM_PERIPH_UART0 : PRCM_PERIPH_UART1;
PRCMPeripheralRunEnable(value);
PRCMPeripheralSleepEnable(value);
PRCMPeripheralDeepSleepEnable(value);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
else
{
if (who_base == UART0_BASE)
{
PRCMPeripheralRunDisable(PRCM_PERIPH_UART0);
PRCMPeripheralSleepDisable(PRCM_PERIPH_UART0);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UART0);
PRCMLoadSet();
PRCMPowerDomainOff(PRCM_DOMAIN_SERIAL);
}
else
{
/* we never turn the debug uart off */
}
}
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartEnable(void)
{
uart_power_control(UART0_BASE, true);
IOCPinTypeUart(UART0_BASE, IOID_12, IOID_13, IOID_UNUSED, IOID_UNUSED);
UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
/* Note: UART1 could use IRQs
* However, for reasons of debug simplicity
* we do not use IRQs for the debug uart
*/
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
UARTIntRegister(UART0_BASE, UART0_intHandler);
UARTEnable(UART0_BASE);
return OT_ERROR_NONE;
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartDisable(void)
{
UARTDisable(UART0_BASE);
UARTIntUnregister(UART0_BASE);
UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT);
IOCPortConfigureSet(IOID_2, IOC_PORT_GPIO, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_3, IOC_PORT_GPIO, IOC_STD_INPUT);
uart_power_control(UART0_BASE, false);
return OT_ERROR_NONE;
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
{
otError error = OT_ERROR_NONE;
otEXPECT_ACTION(sSendBuffer == NULL, error = OT_ERROR_BUSY);
sSendBuffer = aBuf;
sSendLen = aBufLength;
exit:
return error;
}
/**
* @brief process the receive side of the buffers
*/
static void processReceive(void)
{
while (sReceiveHeadIdx != sReceiveTailIdx)
{
uint16_t tailIdx;
if (sReceiveHeadIdx < sReceiveTailIdx)
{
tailIdx = sReceiveTailIdx;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = tailIdx;
}
else
{
tailIdx = CC1352_RECV_CIRC_BUFF_SIZE;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = 0;
}
}
}
otError otPlatUartFlush(void)
{
otEXPECT(sSendBuffer != NULL);
for (; sSendLen > 0; sSendLen--)
{
UARTCharPut(UART0_BASE, *sSendBuffer);
sSendBuffer++;
}
sSendBuffer = NULL;
sSendLen = 0;
return OT_ERROR_NONE;
exit:
return OT_ERROR_INVALID_STATE;
}
/**
* @brief process the transmit side of the buffers
*/
static void processTransmit(void)
{
otPlatUartFlush();
otPlatUartSendDone();
}
/**
* Function documented in platform-cc1352.h
*/
void cc1352UartProcess(void)
{
processReceive();
processTransmit();
}
/**
* @brief the interrupt handler for the uart interrupt vector
*/
void UART0_intHandler(void)
{
while (UARTCharsAvail(UART0_BASE))
{
uint32_t c = UARTCharGet(UART0_BASE);
/* XXX process error flags for this character ?? */
sReceiveBuffer[sReceiveTailIdx] = (uint8_t)c;
sReceiveTailIdx++;
if (sReceiveTailIdx >= CC1352_RECV_CIRC_BUFF_SIZE)
{
sReceiveTailIdx = 0;
}
}
}
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
/*
* Documented in platform-cc1352.h
*/
void cc1352DebugUartInit(void)
{
uart_power_control(UART1_BASE, true);
/*
* LaunchPad Pin29 = tx, Pin 30 = rxd
*
* The function IOCPinTypeUart() is hard coded to
* only support UART0 - and does not support UART1.
*
* Thus, these pins are configured using a different way.
*/
IOCPortConfigureSet(IOID_0, IOC_PORT_MCU_UART1_TX, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_1, IOC_PORT_MCU_UART1_RX, IOC_STD_INPUT);
UARTConfigSetExpClk(UART1_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
UARTEnable(UART1_BASE);
}
/* This holds the last key pressed */
static int debug_uart_ungetbuf;
/*
* Documented in "src/core/common/debug_uart.h"
*/
int otPlatDebugUart_getc(void)
{
int ch = -1;
if (otPlatDebugUart_kbhit())
{
/* get & clear 0x100 bit used below as flag */
ch = debug_uart_ungetbuf & 0x0ff;
debug_uart_ungetbuf = 0;
}
return ch;
}
/*
* Documented in "src/core/common/debug_uart.h"
*/
int otPlatDebugUart_kbhit(void)
{
int r;
/* if something is in the unget buf... */
r = !!debug_uart_ungetbuf;
if (!r)
{
/*
* Driverlib code returns "-1", or "char" on something
* but it comes with flags in upper bits
*/
r = (int)UARTCharGetNonBlocking(UART1_BASE);
if (r < 0)
{
r = 0; /* no key pressed */
}
else
{
/* key was pressed, mask flags
* and set 0x100 bit, to distinguish
* the value "0x00" from "no-key-pressed"
*/
debug_uart_ungetbuf = ((r & 0x0ff) | 0x0100);
r = 1; /* key pressed */
}
}
return r;
}
/*
* Documented in "src/core/common/debug_uart.h"
*/
void otPlatDebugUart_putchar_raw(int b)
{
UARTCharPut(UART1_BASE, b);
}
#endif /* OPENTHREAD_CONFIG_ENABLE_DEBUG_UART */
-98
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@@ -1,98 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set(OT_PLATFORM_LIB "openthread-cc2652" PARENT_SCOPE)
if(NOT OT_CONFIG)
set(OT_CONFIG "openthread-core-cc2652-config.h")
set(OT_CONFIG ${OT_CONFIG} PARENT_SCOPE)
endif()
list(APPEND OT_PLATFORM_DEFINES
"OPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE=\"openthread-core-cc2652-config-check.h\""
)
set(OT_PLATFORM_DEFINES ${OT_PLATFORM_DEFINES} PARENT_SCOPE)
target_compile_definitions(ot-config INTERFACE "MBEDTLS_USER_CONFIG_FILE=\"cc2652-mbedtls-config.h\"")
list(APPEND OT_PUBLIC_INCLUDES
"${CMAKE_CURRENT_SOURCE_DIR}/crypto"
"${PROJECT_SOURCE_DIR}/third_party/ti/devices/cc13x2_cc26x2"
)
set(OT_PUBLIC_INCLUDES ${OT_PUBLIC_INCLUDES} PARENT_SCOPE)
list(APPEND OT_PLATFORM_DEFINES "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"${OT_CONFIG}\"")
add_library(openthread-cc2652
alarm.c
cc2652_ccfg.c
cc2652_startup.c
crypto/aes_alt.c
cxx_helpers.c
diag.c
entropy.c
flash.c
logging.c
misc.c
radio.c
system.c
uart.c
)
set_target_properties(
openthread-cc2652
PROPERTIES
C_STANDARD 99
CXX_STANDARD 11
)
target_link_libraries(openthread-cc2652
PUBLIC
cc13x2-cc26x2-driver
-Wl,--gc-sections
PRIVATE
${OT_MBEDTLS}
ot-config
)
target_compile_definitions(openthread-cc2652
PUBLIC
${OT_PLATFORM_DEFINES}
)
target_compile_options(openthread-cc2652
PRIVATE
${OT_CFLAGS}
)
target_include_directories(openthread-cc2652
PRIVATE
${OT_PUBLIC_INCLUDES}
${PROJECT_SOURCE_DIR}/src/core
${PROJECT_SOURCE_DIR}/examples/platforms
)
-81
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@@ -1,81 +0,0 @@
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
# Do not enable -Wcast-align for this platform
override CFLAGS := $(filter-out -Wcast-align,$(CFLAGS))
override CXXFLAGS := $(filter-out -Wcast-align,$(CXXFLAGS))
lib_LIBRARIES = libopenthread-cc2652.a
libopenthread_cc2652_a_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/cc2652 \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(top_srcdir)/third_party/mbedtls/repo/include \
$(MBEDTLS_CPPFLAGS) \
$(NULL)
PLATFORM_SOURCES = \
alarm.c \
cc2652_radio.h \
diag.c \
entropy.c \
flash.c \
logging.c \
misc.c \
openthread-core-cc2652-config.h \
openthread-core-cc2652-config-check.h \
platform-cc2652.h \
radio.c \
system.c \
uart.c \
crypto/aes_alt.c \
cc2652_ccfg.c \
cc2652_startup.c \
cxx_helpers.c \
$(NULL)
libopenthread_cc2652_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
libopenthread_cc2652_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
Dash = -
libopenthread_cc2652_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
@@ -1,44 +0,0 @@
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
#
# cc2652 platform-specific Makefile
#
CPPFLAGS_COMMON += \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
$(NULL)
LDADD_COMMON += \
$(top_builddir)/examples/platforms/cc2652/libopenthread-cc2652.a \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
LDFLAGS_COMMON += \
-T $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds \
$(NULL)
+1 -103
View File
@@ -1,103 +1 @@
# OpenThread on CC2652 Example
This directory contains example platform drivers for the [Texas Instruments CC2652R1][cc2652r1].
The example platform drivers are intended to present the minimal code necessary to support OpenThread. As a result, the example platform drivers do not necessarily highlight the platform's full capabilities. Consult the [SimpleLink CC26X2R1 SDK][cc26x2r1-sdk] for more development option. The platform drivers were built for the [CC2652R1 LAUNCHXL][cc2652r1-launchxl], usage on other boards with a cc2652r1 may require changes to the peripheral drivers.
[cc2652r1-launchxl]: http://www.ti.com/tool/launchxl-cc26x2r1
[cc26x2r1-sdk]: http://www.ti.com/tool/simplelink-cc26x2-sdk
<!---
TODO: Update link when cc2652 product page is live
[cc2652r1]: http://www.ti.com/product/cc2652r1
-->
[cc2652r1]: http://www.ti.com/tool/launchxl-cc26x2r1
## Toolchain
Building the examples for the cc2652 requires [GNU AutoConf][gnu-autoconf], [GNU AutoMake][gnu-automake], [Python][python], and the [ARM gcc toolchain][arm-toolchain].
With the exception of the arm toolchain, most of these tools are installed by default on modern Posix systems. It is recommended to setup a Linux virtual machine for building on a Windows host system. For help setting up VirtualBox with Ubuntu, consult this [community help wiki article][ubuntu-wiki-virtualbox].
[gnu-autoconf]: https://www.gnu.org/software/autoconf
[gnu-automake]: https://www.gnu.org/software/automake
[python]: https://www.python.org
[arm-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
[cygwin]: https://www.cygwin.com
[mingw]: http://www.mingw.org
[ubuntu-wiki-virtualbox]: https://help.ubuntu.com/community/VirtualBox
In a Bash terminal, follow these instructions to install the GNU toolchain and other dependencies.
```bash
$ cd <path-to-openthread>
$ ./script/bootstrap
```
## Building
In a Bash terminal, follow these instructions to build the cc2652 examples.
```bash
$ cd <path-to-openthread>
$ ./bootstrap
$ make -f examples/Makefile-cc2652
```
## Flash Binaries
If the build completed successfully, the `elf` files may be found in `<path-to-openthread>/output/cc2652/bin`.
Flash the images with [Uniflash][uniflash]. Make sure to deselect the binary check-box, Uniflash assumes a file without an extension is a binary file.
[uniflash]: http://www.ti.com/tool/uniflash
## Interact
### CLI example
1. With a terminal client (PuTTY, minicom, etc.) open the com port associated with the cc2652 UART. The serial port settings are:
- 115200 baud
- 8 data bits
- no parity bit
- 1 stop bit
2. Type `help` for a list of commands.
3. Follow the instructions in the [CLI README][cli-readme] for instructions on setting up a network.
[cli-readme]: ../../../src/cli/README.md
```bash
> help
help
channel
childtimeout
contextreusedelay
extaddr
extpanid
ipaddr
keysequence
leaderweight
masterkey
mode
netdata register
networkidtimeout
networkname
panid
ping
prefix
releaserouterid
rloc16
route
routerupgradethreshold
scan
start
state
stop
```
### NCP example
Refer to the documentation in the [wpantund][wpantund] project for build instructions and usage information.
[wpantund]: https://github.com/openthread/wpantund
The OpenThread on CC2652 example has moved to https://github.com/openthread/ot-cc13x2-cc26x2
-130
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@@ -1,130 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for the alarm.
*
*/
#include <openthread/config.h>
#include <driverlib/aon_rtc.h>
#include <stdbool.h>
#include <stdint.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
#include "platform-cc2652.h"
/* NOTE: we could use systick, but that would sacrifice atleast a few ops
* every ms, and not run when the processor is sleeping.
*/
static uint32_t sTime0 = 0;
static uint32_t sAlarmTime = 0;
static bool sIsRunning = false;
/**
* Function documented in platform-cc2652.h
*/
void cc2652AlarmInit(void)
{
/*
* NOTE: this will not enable the individual rtc alarm channels
*/
AONRTCEnable();
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
uint32_t otPlatAlarmMilliGetNow(void)
{
/*
* This is current value of RTC as it appears in the register.
* With seconds as the upper 32 bits and fractions of a second as the
* lower 32 bits <32.32>.
*/
uint64_t rtcVal = AONRTCCurrent64BitValueGet();
return ((rtcVal * 1000) >> 32);
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
OT_UNUSED_VARIABLE(aInstance);
sTime0 = aT0;
sAlarmTime = aDt;
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStop(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
sIsRunning = false;
}
/**
* Function documented in platform-cc2652.h
*/
void cc2652AlarmProcess(otInstance *aInstance)
{
uint32_t offsetTime;
if (sIsRunning)
{
/* unsinged subtraction will result in the absolute offset */
offsetTime = otPlatAlarmMilliGetNow() - sTime0;
if (sAlarmTime <= offsetTime)
{
sIsRunning = false;
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
{
otPlatDiagAlarmFired(aInstance);
}
else
#endif /* OPENTHREAD_CONFIG_DIAG_ENABLE */
{
otPlatAlarmMilliFired(aInstance);
}
}
}
}
@@ -1,42 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR ARM)
set(CMAKE_C_COMPILER arm-none-eabi-gcc)
set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
set(CMAKE_ASM_COMPILER arm-none-eabi-as)
set(CMAKE_RANLIB arm-none-eabi-ranlib)
set(COMMON_C_FLAGS "-mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb -fdata-sections -ffunction-sections")
set(CMAKE_C_FLAGS_INIT "${COMMON_C_FLAGS} -std=gnu99")
set(CMAKE_CXX_FLAGS_INIT "${COMMON_C_FLAGS} -fno-exceptions -fno-rtti")
set(CMAKE_ASM_FLAGS_INIT "${COMMON_C_FLAGS}")
set(CMAKE_EXE_LINKER_FLAGS_INIT "${COMMON_C_FLAGS} -nostartfiles -specs=nano.specs -specs=nosys.specs -Wl,-Map=map.map")
-49
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@@ -1,49 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Configure the Customer Configuration Area.
*/
// clang-format off
// enable bootloader backdoor
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0D // DIO13 (BTN-1 button) on CC2652 LaunchPad Board for boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor
/*
* Include the default ccfg struct and configuration code.
*/
#include <startup_files/ccfg.c>
// clang-format on
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@@ -1,200 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC2652_RADIO_H_
#define CC2652_RADIO_H_
#include <driverlib/rf_ieee_cmd.h>
enum
{
IEEE802154_FRAME_TYPE_MASK = 0x7, ///< (IEEE 802.15.4-2006) PSDU.FCF.frameType
IEEE802154_FRAME_TYPE_ACK = 0x2, ///< (IEEE 802.15.4-2006) frame type: ACK
IEEE802154_ACK_REQUEST = (1 << 5), ///< (IEEE 802.15.4-2006) PSDU.FCF.bAR
IEEE802154_DSN_OFFSET = 2, ///< (IEEE 802.15.4-2006) PSDU.sequenceNumber
IEEE802154_MAC_MIN_BE = 1, ///< (IEEE 802.15.4-2006) macMinBE
IEEE802154_MAC_MAX_BE = 5, ///< (IEEE 802.15.4-2006) macMaxBE
IEEE802154_MAC_MAX_CSMA_BACKOFFS = 4, ///< (IEEE 802.15.4-2006) macMaxCSMABackoffs
IEEE802154_MAC_MAX_FRAMES_RETRIES = 3, ///< (IEEE 802.15.4-2006) macMaxFrameRetries
IEEE802154_A_UINT_BACKOFF_PERIOD = 20, ///< (IEEE 802.15.4-2006 7.4.1) MAC constants
IEEE802154_A_TURNAROUND_TIME = 12, ///< (IEEE 802.15.4-2006 6.4.1) PHY constants
IEEE802154_PHY_SHR_DURATION = 10,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_PHY_SYMBOLS_PER_OCTET = 2,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_MAC_ACK_WAIT_DURATION = (IEEE802154_A_UINT_BACKOFF_PERIOD + //
IEEE802154_A_TURNAROUND_TIME + //
IEEE802154_PHY_SHR_DURATION + //
(6 * IEEE802154_PHY_SYMBOLS_PER_OCTET)), //
///< (IEEE 802.15.4-2006 7.4.2) macAckWaitDuration PIB attribute
IEEE802154_SYMBOLS_PER_SEC = 62500 ///< (IEEE 802.15.4-2006 6.5.3.2) O-QPSK symbol rate
};
enum
{
CC2652_RAT_TICKS_PER_SEC = 4000000, ///< 4MHz clock
CC2652_INVALID_RSSI = 127,
CC2652_UNKNOWN_EUI64 = 0xFF,
///< If the EUI64 read from the ccfg is all ones then the customer did not set the address
};
/**
* TX Power dBm lookup table - values from SmartRF Studio
*/
typedef struct output_config
{
int dbm;
uint16_t value;
} output_config_t;
/**
* TX Power dBm lookup table from SmartRF Studio 7 2.10.0#94
*/
static const output_config_t rgOutputPower[] = {
{5, 0x941e}, //
{4, 0x6c16}, //
{3, 0x5411}, //
{2, 0x440d}, //
{1, 0x385c}, //
{0, 0x3459}, //
{-3, 0x2851}, //
{-5, 0x224e}, //
{-6, 0x204d}, //
{-9, 0x0a8d}, //
{-10, 0x168c}, //
{-12, 0x10a8}, //
{-15, 0xc88c}, //
{-18, 0x06c9}, //
{-21, 0x06c7}, //
};
#define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0]))
/* Max and Min Output Power in dBm */
#define OUTPUT_POWER_MIN (rgOutputPower[OUTPUT_CONFIG_COUNT - 1].dbm)
#define OUTPUT_POWER_MAX (rgOutputPower[0].dbm)
#define OUTPUT_POWER_UNKNOWN 0xFFFF
/**
* return value used when searching the source match array
*/
#define CC2652_SRC_MATCH_NONE 0xFF
/**
* number of extended addresses used for source matching
*/
#define CC2652_EXTADD_SRC_MATCH_NUM 10
/**
* structure for source matching extended addresses
*/
typedef struct __attribute__((aligned(4))) ext_src_match_data
{
uint32_t srcMatchEn[((CC2652_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC2652_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint64_t extAddrEnt[CC2652_EXTADD_SRC_MATCH_NUM];
} ext_src_match_data_t;
/**
* number of short addresses used for source matching
*/
#define CC2652_SHORTADD_SRC_MATCH_NUM 10
/**
* structure for source matching short addresses
*/
typedef struct __attribute__((aligned(4))) short_src_match_data
{
uint32_t srcMatchEn[((CC2652_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC2652_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
rfc_shortAddrEntry_t extAddrEnt[CC2652_SHORTADD_SRC_MATCH_NUM];
} short_src_match_data_t;
/**
* size of length field in receive struct
*
* defined in Table 23-10 of the cc26xx TRM
*/
#define DATA_ENTRY_LENSZ_BYTE 1
/**
* address type for @ref rfCoreModifySourceMatchEntry()
*/
typedef enum cc2652_address
{
SHORT_ADDRESS = 1,
EXT_ADDRESS = 0,
} cc2652_address_t;
/**
* This enum represents the state of a radio.
* Initially, a radio is in the Disabled state.
*
* The following are valid radio state transitions for the cc2652:
*
* (Radio ON)
* +----------+ Enable() +-------+ Receive() +---------+ Transmit() +----------+
* | |----------->| |------------->| |--------------->| |
* | Disabled | | Sleep | | Receive | | Transmit |
* | |<-----------| |<-------------| |<---------------| |
* +----------+ Disable() | | Sleep() | | AckFrame RX or +----------+
* | | (Radio OFF) +---------+ sTxCmdChainDone == true
* | |
* | | EnergyScan() +--------+
* | |------------->| |
* | | | EdScan |
* | |<-------------| |
* | | signal ED | |
* +-------+ scan done +--------+
*
* These states slightly differ from the states in \ref include/platform/radio.h.
* The additional states the phy can be in are due to the asynchronous nature
* of the CM0 radio core.
*
* | state | description |
* |------------------|----------------------------------------------------|
* | Disabled | The rfcore powerdomain is off and the RFCPE is off |
* | Sleep | The RFCORE PD is on, and the RFCPE is in IEEE mode |
* | Receive | The RFCPE is running a CMD_IEEE_RX |
* | Transmit | The RFCPE is running a transmit command string |
* | TransmitComplete | The transmit command string has completed |
* | EdScan | The RFCPE is running a CMD_IEEE_ED_SCAN |
*
* \note The RAT start and Radio Setup commands may be moved to the Receive()
* and EnergyScan() transitions in the future.
*/
typedef enum cc2652_PhyState
{
cc2652_stateDisabled = 0,
cc2652_stateSleep,
cc2652_stateReceive,
cc2652_stateEdScan,
cc2652_stateTransmit,
} cc2652_PhyState_t;
#endif /* CC2652_RADIO_H_ */
@@ -1,39 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Include the standard startup files for the specified toolchain
* startup code is in 'third_party/ti'
*/
#if defined(__GNUC__)
#include <startup_files/startup_gcc.c>
#elif defined(__TI_ARM__)
#include <startup_files/startup_ccs.c>
#else
#error "Unknown compiler"
#endif
-202
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@@ -1,202 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "aes_alt.h"
#include "mbedtls/aes.h"
#ifdef MBEDTLS_AES_ALT
#include <driverlib/crypto.h>
#include <driverlib/prcm.h>
#include <string.h>
#include <utils/code_utils.h>
#define CC2652_AES_KEY_UNUSED (-1)
#define CC2652_AES_CTX_MAGIC (0x7E)
/**
* bitmap of which key stores are currently used
*/
static uint8_t sUsedKeys = 0;
/**
* number of active contexts, used for power on/off of the crypto core
*/
static unsigned int sRefNum = 0;
/*
* Documented in aes_alt.h
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx)
{
if (sRefNum++ == 0)
{
/* enable the crypto core */
/* The TRNG should already be running before we ever ask the AES core
* to do anything, if there is any scenario that the TRNG powers off
* the peripheral power domain use this code to repower it
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON);
*/
PRCMPeripheralRunEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
ctx->magic = CC2652_AES_CTX_MAGIC;
ctx->key_idx = CC2652_AES_KEY_UNUSED;
}
/*
* Documented in aes_alt.h
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx)
{
otEXPECT(ctx->magic == CC2652_AES_CTX_MAGIC);
if (ctx->key_idx != CC2652_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
if (--sRefNum == 0)
{
/* disable the crypto core */
/* The TRNG core needs the peripheral power domain powered on to
* function. if there is a situation where the power domain must be
* powered off, use this code to do so.
PRCMPowerDomainOff(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_OFF);
*/
PRCMPeripheralRunDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
memset((void *)ctx, 0x00, sizeof(ctx));
exit:
return;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC2652_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC2652_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC2652_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC2652_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16])
{
int retval = -1;
retval = CRYPTOAesEcb((uint32_t *)input, (uint32_t *)output, ctx->key_idx, mode == MBEDTLS_AES_ENCRYPT, false);
otEXPECT(retval == AES_SUCCESS);
while ((retval = CRYPTOAesEcbStatus()) == AES_DMA_BSY)
;
CRYPTOAesEcbFinish();
exit:
return retval;
}
#endif /* MBEDTLS_AES_ALT */
-108
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@@ -1,108 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef MBEDTLS_AES_ALT_H
#define MBEDTLS_AES_ALT_H
#ifndef MBEDTLS_CONFIG_FILE
#include "cc2652-mbedtls-config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#ifdef MBEDTLS_AES_ALT
#ifdef __cplusplus
extern "C" {
#endif
typedef struct
{
uint8_t magic;
signed char key_idx;
} mbedtls_aes_context;
/**
* @brief Initialize AES context
*
* @param [in,out] ctx AES context to be initialized
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx);
/**
* @brief Clear AES context
*
* @param [in,out] ctx AES context to be cleared
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx);
/**
* @brief AES key schedule (encryption)
*
* @param [in,out] ctx AES context to be used
* @param [in] key Encryption key
* @param [in] keybits Must be 128
*
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* @brief AES key schedule (decryption)
*
* @param [in,out] ctx AES context to be used
* @param [in] key Decryption key
* @param [in] keybits Must be 128
*
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
*
* \param ctx AES context
* \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
* \param input 16-byte input block
* \param output 16-byte output block
*
* @return The return value of @ref CRYPTOAesEcb.
* @retval 0 If successful
* @retval AES_KEYSTORE_READ_ERROR If the indicated keystore ram could not be read
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
#ifdef __cplusplus
}
#endif
#endif /* MBEDTLS_AES_ALT */
#endif /* MBEDTLS_AES_ALT_H */
@@ -1,37 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC2652_MBEDTLS_CONFIG_H
#define CC2652_MBEDTLS_CONFIG_H
#define MBEDTLS_AES_ALT
/* TODO: remove once AES alt driver supports 256-bit keys */
#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY
#endif // CC2652_MBEDTLS_CONFIG_H
-54
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@@ -1,54 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Helper functions for running c++ without the standard library
*/
__extension__ typedef int __guard __attribute__((mode(__DI__)));
int __cxa_guard_acquire(__guard *g)
{
return !*(char *)(g);
}
void __cxa_guard_release(__guard *g)
{
*(char *)g = 1;
}
void __cxa_guard_abort(__guard *g)
{
(void)g;
}
void __cxa_pure_virtual(void)
{
while (1)
;
}
-81
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@@ -1,81 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <openthread/config.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/radio.h>
#include "platform-cc2652.h"
#if OPENTHREAD_CONFIG_DIAG_ENABLE
/**
* Diagnostics mode variables.
*
*/
static bool sDiagMode = false;
void otPlatDiagModeSet(bool aMode)
{
sDiagMode = aMode;
}
bool otPlatDiagModeGet()
{
return sDiagMode;
}
void otPlatDiagChannelSet(uint8_t aChannel)
{
OT_UNUSED_VARIABLE(aChannel);
}
void otPlatDiagTxPowerSet(int8_t aTxPower)
{
OT_UNUSED_VARIABLE(aTxPower);
}
void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
{
OT_UNUSED_VARIABLE(aInstance);
OT_UNUSED_VARIABLE(aFrame);
OT_UNUSED_VARIABLE(aError);
}
void otPlatDiagAlarmCallback(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
}
#endif // OPENTHREAD_CONFIG_DIAG_ENABLE
-134
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@@ -1,134 +0,0 @@
/*
* Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements an entropy source based on TRNG.
*
*/
#include <openthread/platform/entropy.h>
#include <openthread/config.h>
#include <stddef.h>
#include <utils/code_utils.h>
#include <driverlib/prcm.h>
#include <driverlib/trng.h>
enum
{
CC2652_TRNG_MIN_SAMPLES_PER_CYCLE = (1 << 6),
CC2652_TRNG_MAX_SAMPLES_PER_CYCLE = (1 << 24),
CC2652_TRNG_CLOCKS_PER_SAMPLE = 0,
};
/**
* \note if more than 32 bits of entropy are needed, the TRNG core produces
* 64 bits of random data, we just ignore the upper 32 bytes
*/
/**
* Function documented in platform-cc2652.h
*/
void cc2652RandomInit(void)
{
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON)
;
PRCMPeripheralRunEnable(PRCM_PERIPH_TRNG);
PRCMPeripheralSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMPeripheralDeepSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMLoadSet();
TRNGConfigure(CC2652_TRNG_MIN_SAMPLES_PER_CYCLE, CC2652_TRNG_MAX_SAMPLES_PER_CYCLE, CC2652_TRNG_CLOCKS_PER_SAMPLE);
TRNGEnable();
}
/**
* Fill an arbitrary area with random data.
*
* @param [out] aOutput Area to place the random data.
* @param [in] aLen Size of the area to place random data.
* @param [out] oLen How much of the output was written to.
*
* @return Indication of error.
* @retval 0 No error occurred.
*/
static int TRNGPoll(unsigned char *aOutput, size_t aLen)
{
size_t length = 0;
union
{
uint32_t u32[2];
uint8_t u8[8];
} buffer;
while (length < aLen)
{
if (length % 8 == 0)
{
/* we've run to the end of the buffer */
while (!(TRNGStatusGet() & TRNG_NUMBER_READY))
;
/*
* don't use TRNGNumberGet here because it will tell the TRNG to
* refill the entropy pool, instead we do it ourself.
*/
buffer.u32[0] = HWREG(TRNG_BASE + TRNG_O_OUT0);
buffer.u32[1] = HWREG(TRNG_BASE + TRNG_O_OUT1);
HWREG(TRNG_BASE + TRNG_O_IRQFLAGCLR) = 0x1;
}
aOutput[length] = buffer.u8[length % 8];
length++;
}
return 0;
}
/**
* Function documented in platform/entropy.h
*/
otError otPlatEntropyGet(uint8_t *aOutput, uint16_t aOutputLength)
{
otError error = OT_ERROR_NONE;
size_t length = aOutputLength;
otEXPECT_ACTION(aOutput, error = OT_ERROR_INVALID_ARGS);
otEXPECT_ACTION(TRNGPoll((unsigned char *)aOutput, length) == 0, error = OT_ERROR_FAILED);
exit:
return error;
}
-261
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@@ -1,261 +0,0 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include <openthread/instance.h>
#include <driverlib/aon_batmon.h>
#include <driverlib/flash.h>
#include <driverlib/interrupt.h>
#include <driverlib/vims.h>
#include <utils/code_utils.h>
#include "platform-cc2652.h"
#define FLASH_BASE_ADDRESS 0x52000
#define FLASH_PAGE_SIZE 0x2000
#define FLASH_PAGE_NUM 2 /* must be a multiple of 2 */
#define FLASH_SWAP_SIZE (FLASH_PAGE_SIZE * (FLASH_PAGE_NUM / 2))
enum
{
MIN_VDD_FLASH = 0x18, /* 1.50 volts (0.50=128/256 -> 128=0x80) */
MAX_WRITE_INCREMENT = 8, /* maximum number of bytes to write at a time to
* avoid interrupt latency while in ROM
*/
};
/**
* Check if the Battery Monitor measurements and calculations are enabled.
*
* @return If the Battery Monitor is enabled.
* @retval true The Battery Monitor is on.
* @retval false The Battery Monitor is off.
*/
static bool isBatMonOn(void)
{
uint32_t batMonCtl = HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL);
return ((batMonCtl & AON_BATMON_CTL_CALC_EN_M) == AON_BATMON_CTL_CALC_EN &&
(batMonCtl & AON_BATMON_CTL_MEAS_EN_M) == AON_BATMON_CTL_MEAS_EN);
}
/**
* Check if the supply voltage is high enough to support flash programming.
*
* @return If the Voltage is too low to support flash programming.
* @retval false The supply voltage is too low.
* @retval true The supply voltage is sufficient.
*/
static bool checkVoltage(void)
{
bool batMonWasOff = !isBatMonOn();
bool ret = false;
if (batMonWasOff)
{
AONBatMonEnable();
}
if (AONBatMonBatteryVoltageGet() >= MIN_VDD_FLASH)
{
ret = true;
}
if (batMonWasOff)
{
AONBatMonDisable();
}
return ret;
}
/**
* Disable Flash data caching and instruction pre-fetching.
*
* It is necessary to disable the caching and VIMS to ensure the cache has
* valid data while the program is executing.
*
* @return The VIMS state before being disabled.
*/
static uint32_t disableFlashCache(void)
{
uint32_t mode = VIMSModeGet(VIMS_BASE);
VIMSLineBufDisable(VIMS_BASE);
if (mode != VIMS_MODE_DISABLED)
{
VIMSModeSet(VIMS_BASE, VIMS_MODE_DISABLED);
while (VIMSModeGet(VIMS_BASE) != VIMS_MODE_DISABLED)
;
}
return mode;
}
/**
* Restore the Flash data caching and instruction pre-fetching.
*
* @param [in] mode The VIMS mode returned by @ref disableFlashCache.
*/
static void restoreFlashCache(uint32_t mode)
{
if (mode != VIMS_MODE_DISABLED)
{
VIMSModeSet(VIMS_BASE, mode);
}
VIMSLineBufEnable(VIMS_BASE);
}
static uint32_t mapAddress(uint8_t aSwapIndex, uint32_t aOffset)
{
uint32_t address = FLASH_BASE_ADDRESS + aOffset;
if (aSwapIndex)
{
address += FLASH_SWAP_SIZE;
}
return address;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashInit(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
}
/**
* Function documented in platforms/utils/flash.h
*/
uint32_t otPlatFlashGetSwapSize(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
return FLASH_SWAP_SIZE;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashErase(otInstance *aInstance, uint8_t aSwapIndex)
{
OT_UNUSED_VARIABLE(aInstance);
uint32_t mode;
otEXPECT(checkVoltage());
mode = disableFlashCache();
for (uint8_t page = 0; page < FLASH_PAGE_NUM; page++)
{
FlashSectorErase(mapAddress(aSwapIndex, (page * FLASH_PAGE_SIZE)));
}
restoreFlashCache(mode);
while (FlashCheckFsmForReady() != FAPI_STATUS_FSM_READY)
{
}
exit:
return;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashWrite(otInstance *aInstance, uint8_t aSwapIndex, uint32_t aOffset, const void *aData, uint32_t aSize)
{
OT_UNUSED_VARIABLE(aInstance);
uint32_t mode;
uint32_t written = 0;
uint32_t address;
otEXPECT(checkVoltage());
mode = disableFlashCache();
address = mapAddress(aSwapIndex, aOffset);
while (written < aSize)
{
uint32_t toWrite = aSize - written;
const uint8_t *data = (uint8_t *)aData + written;
uint32_t fsmRet;
bool interruptsWereDisabled;
if (toWrite > MAX_WRITE_INCREMENT)
{
toWrite = MAX_WRITE_INCREMENT;
}
/* The CPU may not execute code from flash while a program is
* happening. We disable interrupts to ensure one does not preempt the
* ROM fsm.
*/
interruptsWereDisabled = IntMasterDisable();
fsmRet = FlashProgram((uint8_t *)data, address + written, toWrite);
if (!interruptsWereDisabled)
{
IntMasterEnable();
}
if (fsmRet != FAPI_STATUS_SUCCESS)
{
break;
}
written += toWrite;
}
restoreFlashCache(mode);
exit:
return;
}
/**
* Function documented in platforms/utils/flash.h
*/
void otPlatFlashRead(otInstance *aInstance, uint8_t aSwapIndex, uint32_t aOffset, void *aData, uint32_t aSize)
{
OT_UNUSED_VARIABLE(aInstance);
memcpy(aData, (void *)mapAddress(aSwapIndex, aOffset), (size_t)aSize);
}
-46
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@@ -1,46 +0,0 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file logging.c
* Platform abstraction for the logging
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <openthread/platform/logging.h>
#include <openthread/platform/toolchain.h>
#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED)
OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
{
OT_UNUSED_VARIABLE(aLogLevel);
OT_UNUSED_VARIABLE(aLogRegion);
OT_UNUSED_VARIABLE(aFormat);
}
#endif
-93
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@@ -1,93 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <driverlib/sys_ctrl.h>
#include <openthread/platform/misc.h>
/*
* NOTE: if the system is flashed with Flash Programmer 2 or Uniflash, this
* reset will not work the first time. Both programs use the cJTAG module,
* which sets the halt in boot flag. The device must be manually reset the
* first time after being programmed through the JTAG interface.
*/
/**
* Function documented in platform/misc.h
*/
void otPlatReset(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
SysCtrlSystemReset();
}
/**
* Function documented in platform/misc.h
*/
otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
otPlatResetReason ret;
switch (SysCtrlResetSourceGet())
{
case RSTSRC_PWR_ON:
ret = OT_PLAT_RESET_REASON_POWER_ON;
break;
case RSTSRC_PIN_RESET:
ret = OT_PLAT_RESET_REASON_EXTERNAL;
break;
case RSTSRC_VDDS_LOSS:
case RSTSRC_VDDR_LOSS:
case RSTSRC_CLK_LOSS:
ret = OT_PLAT_RESET_REASON_CRASH;
break;
case RSTSRC_WARMRESET:
case RSTSRC_SYSRESET:
case RSTSRC_WAKEUP_FROM_SHUTDOWN:
ret = OT_PLAT_RESET_REASON_SOFTWARE;
break;
default:
ret = OT_PLAT_RESET_REASON_UNKNOWN;
break;
}
return ret;
}
void otPlatWakeHost(void)
{
// TODO: implement an operation to wake the host from sleep state.
}
@@ -1,36 +0,0 @@
/*
* Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC2652_CONFIG_CHECK_H_
#define OPENTHREAD_CORE_CC2652_CONFIG_CHECK_H_
#if OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT
#error "Platform cc2652 doesn't support configuration option: OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT"
#endif
#endif /* OPENTHREAD_CORE_CC2652_CONFIG_CHECK_H_ */
@@ -1,58 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC2652_CONFIG_H_
#define OPENTHREAD_CORE_CC2652_CONFIG_H_
/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
* The platform-specific string to insert into the OpenThread version string.
*
*/
#define OPENTHREAD_CONFIG_PLATFORM_INFO "CC2652"
/**
* @def OPENTHREAD_CONFIG_PLATFORM_FLASH_API_ENABLE
*
* Define to 1 to enable otPlatFlash* APIs to support non-volatile storage.
*
* When defined to 1, the platform MUST implement the otPlatFlash* APIs instead of the otPlatSettings* APIs.
*
*/
#define OPENTHREAD_CONFIG_PLATFORM_FLASH_API_ENABLE 1
/**
* @def OPENTHREAD_CONFIG_NCP_HDLC_ENABLE
*
* Define to 1 to enable NCP HDLC support.
*
*/
#define OPENTHREAD_CONFIG_NCP_HDLC_ENABLE 1
#endif /* OPENTHREAD_CORE_CC2650_CONFIG_H_ */
@@ -1,89 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef PLATFORM_H_
#define PLATFORM_H_
#include <openthread-core-config.h>
#include <stdint.h>
#include <openthread/config.h>
#include <openthread/instance.h>
#ifdef __cplusplus
extern "C" {
#endif
// Global OpenThread instance structure
extern otInstance *sInstance;
/**
* Initialize the debug uart
*/
void cc2652DebugUartInit(void);
/**
* This method initializes the alarm service used by OpenThread.
*
*/
void cc2652AlarmInit(void);
/**
* This method performs alarm driver processing.
*
*/
void cc2652AlarmProcess(otInstance *aInstance);
/**
* This method initializes the radio service used by OpenThread.
*
*/
void cc2652RadioInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc2652RadioProcess(otInstance *aInstance);
/**
* This method initializes the random number service used by OpenThread.
*
*/
void cc2652RandomInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc2652UartProcess(void);
#ifdef __cplusplus
} // extern "C"
#endif
#endif // PLATFORM_H_
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief
* This file includes the platform-specific initializers.
*/
#include <openthread/config.h>
#include "platform-cc2652.h"
#include <stdio.h>
#include "inc/hw_ccfg.h"
#include "inc/hw_ccfg_simple_struct.h"
#include "inc/hw_types.h"
extern const ccfg_t __ccfg;
const char *dummy_ccfg_ref = ((const char *)(&(__ccfg)));
/**
* Function documented in platform-cc2652.h
*/
void otSysInit(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
while (dummy_ccfg_ref == NULL)
{
/*
* This provides a code reference to the customer configuration area of
* the flash, otherwise the data is skipped by the linker and not put
* into the final flash image.
*/
}
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
cc2652DebugUartInit();
#endif
cc2652AlarmInit();
cc2652RandomInit();
cc2652RadioInit();
}
bool otSysPseudoResetWasRequested(void)
{
return false;
}
/**
* Function documented in platform-cc2652.h
*/
void otSysProcessDrivers(otInstance *aInstance)
{
// should sleep and wait for interrupts here
cc2652UartProcess();
cc2652RadioProcess(aInstance);
cc2652AlarmProcess(aInstance);
}
-338
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@@ -1,338 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for UART communication.
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdio.h>
#include <openthread/platform/debug_uart.h>
#include <openthread/platform/logging.h>
#include "utils/code_utils.h"
#include "utils/uart.h"
#include <driverlib/ioc.h>
#include <driverlib/prcm.h>
#include <driverlib/sys_ctrl.h>
#include <driverlib/uart.h>
/**
* @note This will configure the uart for 115200 baud 8-N-1, no HW flow control
* RX pin IOID_2 TX pin IOID_3.
*
* If the DEBUG UART is enabled, IOID_0 = debug tx, IOID_1 = debug rx
*/
enum
{
CC2652_RECV_CIRC_BUFF_SIZE = 256,
};
static uint8_t const *sSendBuffer = NULL;
static uint16_t sSendLen = 0;
static uint8_t sReceiveBuffer[CC2652_RECV_CIRC_BUFF_SIZE];
static uint16_t sReceiveHeadIdx = 0;
static uint16_t sReceiveTailIdx = 0;
void UART0_intHandler(void);
static void uart_power_control(uint32_t who_base, int turnon)
{
uint32_t value;
if (turnon)
{
/* UART0 is in the SERIAL domain
* UART1 is in the PERIPH domain.
* See: ti/devices/cc13x2_cc26x2/driverlib/pcrm.h, line: 658
*/
value = (who_base == UART0_BASE) ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH;
PRCMPowerDomainOn(value);
while (PRCMPowerDomainStatus(value) != PRCM_DOMAIN_POWER_ON)
;
value = (who_base == UART0_BASE) ? PRCM_PERIPH_UART0 : PRCM_PERIPH_UART1;
PRCMPeripheralRunEnable(value);
PRCMPeripheralSleepEnable(value);
PRCMPeripheralDeepSleepEnable(value);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
else
{
if (who_base == UART0_BASE)
{
PRCMPeripheralRunDisable(PRCM_PERIPH_UART0);
PRCMPeripheralSleepDisable(PRCM_PERIPH_UART0);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UART0);
PRCMLoadSet();
PRCMPowerDomainOff(PRCM_DOMAIN_SERIAL);
}
else
{
/* we never turn the debug uart off */
}
}
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartEnable(void)
{
uart_power_control(UART0_BASE, true);
IOCPinTypeUart(UART0_BASE, IOID_2, IOID_3, IOID_UNUSED, IOID_UNUSED);
UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
/* Note: UART1 could use IRQs
* However, for reasons of debug simplicity
* we do not use IRQs for the debug uart
*/
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
UARTIntRegister(UART0_BASE, UART0_intHandler);
UARTEnable(UART0_BASE);
return OT_ERROR_NONE;
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartDisable(void)
{
UARTDisable(UART0_BASE);
UARTIntUnregister(UART0_BASE);
UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT);
IOCPortConfigureSet(IOID_2, IOC_PORT_GPIO, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_3, IOC_PORT_GPIO, IOC_STD_INPUT);
uart_power_control(UART0_BASE, false);
return OT_ERROR_NONE;
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
{
otError error = OT_ERROR_NONE;
otEXPECT_ACTION(sSendBuffer == NULL, error = OT_ERROR_BUSY);
sSendBuffer = aBuf;
sSendLen = aBufLength;
exit:
return error;
}
/**
* @brief process the receive side of the buffers
*/
static void processReceive(void)
{
while (sReceiveHeadIdx != sReceiveTailIdx)
{
uint16_t tailIdx;
if (sReceiveHeadIdx < sReceiveTailIdx)
{
tailIdx = sReceiveTailIdx;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = tailIdx;
}
else
{
tailIdx = CC2652_RECV_CIRC_BUFF_SIZE;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = 0;
}
}
}
otError otPlatUartFlush(void)
{
otEXPECT(sSendBuffer != NULL);
for (; sSendLen > 0; sSendLen--)
{
UARTCharPut(UART0_BASE, *sSendBuffer);
sSendBuffer++;
}
sSendBuffer = NULL;
sSendLen = 0;
return OT_ERROR_NONE;
exit:
return OT_ERROR_INVALID_STATE;
}
/**
* @brief process the transmit side of the buffers
*/
static void processTransmit(void)
{
otPlatUartFlush();
otPlatUartSendDone();
}
/**
* Function documented in platform-cc2652.h
*/
void cc2652UartProcess(void)
{
processReceive();
processTransmit();
}
/**
* @brief the interrupt handler for the uart interrupt vector
*/
void UART0_intHandler(void)
{
while (UARTCharsAvail(UART0_BASE))
{
uint32_t c = UARTCharGet(UART0_BASE);
/* XXX process error flags for this character ?? */
sReceiveBuffer[sReceiveTailIdx] = (uint8_t)c;
sReceiveTailIdx++;
if (sReceiveTailIdx >= CC2652_RECV_CIRC_BUFF_SIZE)
{
sReceiveTailIdx = 0;
}
}
}
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
/*
* Documented in platform-cc2652.h
*/
void cc2652DebugUartInit(void)
{
uart_power_control(UART1_BASE, true);
/*
* LaunchPad Pin29 = tx, Pin 30 = rxd
*
* The function IOCPinTypeUart() is hard coded to
* only support UART0 - and does not support UART1.
*
* Thus, these pins are configured using a different way.
*/
IOCPortConfigureSet(IOID_0, IOC_PORT_MCU_UART1_TX, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_1, IOC_PORT_MCU_UART1_RX, IOC_STD_INPUT);
UARTConfigSetExpClk(UART1_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
UARTEnable(UART1_BASE);
}
/* This holds the last key pressed */
static int debug_uart_ungetbuf;
/*
* Documented in "src/core/common/debug_uart.h"
*/
int otPlatDebugUart_getc(void)
{
int ch = -1;
if (otPlatDebugUart_kbhit())
{
/* get & clear 0x100 bit used below as flag */
ch = debug_uart_ungetbuf & 0x0ff;
debug_uart_ungetbuf = 0;
}
return ch;
}
/*
* Documented in "src/core/common/debug_uart.h"
*/
int otPlatDebugUart_kbhit(void)
{
int r;
/* if something is in the unget buf... */
r = !!debug_uart_ungetbuf;
if (!r)
{
/*
* Driverlib code returns "-1", or "char" on something
* but it comes with flags in upper bits
*/
r = (int)UARTCharGetNonBlocking(UART1_BASE);
if (r < 0)
{
r = 0; /* no key pressed */
}
else
{
/* key was pressed, mask flags
* and set 0x100 bit, to distinguish
* the value "0x00" from "no-key-pressed"
*/
debug_uart_ungetbuf = ((r & 0x0ff) | 0x0100);
r = 1; /* key pressed */
}
}
return r;
}
/*
* Documented in "src/core/common/debug_uart.h"
*/
void otPlatDebugUart_putchar_raw(int b)
{
UARTCharPut(UART1_BASE, b);
}
#endif /* OPENTHREAD_CONFIG_ENABLE_DEBUG_UART */
-32
View File
@@ -34,21 +34,6 @@ reset_source()
rm -rf build output tmp
}
build_cc1352()
{
local options=(
"COMMISSIONER=1"
"DHCP6_CLIENT=1"
"DHCP6_SERVER=1"
"DNS_CLIENT=1"
"JOINER=1"
"SLAAC=1"
)
reset_source
make -f examples/Makefile-cc1352 "${options[@]}"
}
build_cc2538()
{
local options=(
@@ -72,21 +57,6 @@ build_cc2650()
make -f examples/Makefile-cc2650
}
build_cc2652()
{
local options=(
"COMMISSIONER=1"
"DHCP6_CLIENT=1"
"DHCP6_SERVER=1"
"DNS_CLIENT=1"
"JOINER=1"
"SLAAC=1"
)
reset_source
make -f examples/Makefile-cc2652 "${options[@]}"
}
build_jn5189()
{
local options=(
@@ -242,10 +212,8 @@ main()
export CPPFLAGS="${CPPFLAGS:-} -DNDEBUG"
if [[ $# == 0 ]]; then
build_cc1352
build_cc2538
build_cc2650
build_cc2652
build_jn5189
build_k32w061
build_nrf52811
-14
View File
@@ -48,12 +48,6 @@ reset_source()
rm -rf "$OT_BUILDDIR"
}
build_cc1352()
{
reset_source
"$(dirname "$0")"/cmake-build cc1352 "${OT_COMMON_OPTIONS[@]}" "${OT_BASIC_CHECK_OPTIONS[@]}"
}
build_cc2538()
{
local options=(
@@ -71,12 +65,6 @@ build_cc2650()
"$(dirname "$0")"/cmake-build cc2650 "${OT_COMMON_OPTIONS[@]}"
}
build_cc2652()
{
reset_source
"$(dirname "$0")"/cmake-build cc2652 "${OT_COMMON_OPTIONS[@]}" "${OT_BASIC_CHECK_OPTIONS[@]}"
}
build_nrf52811()
{
reset_source
@@ -100,10 +88,8 @@ main()
export CPPFLAGS="${CPPFLAGS:-} -DNDEBUG"
if [[ $# == 0 ]]; then
build_cc1352
build_cc2538
build_cc2650
build_cc2652
# UART transport
build_nrf52840 UART_trans
# USB transport with bootloader e.g. to support PCA10059 dongle
+2 -2
View File
@@ -79,7 +79,7 @@ set -euxo pipefail
OT_CMAKE_NINJA_TARGET=${OT_CMAKE_NINJA_TARGET:-}
readonly OT_SRCDIR="$(pwd)"
readonly OT_PLATFORMS=(cc1352 cc2538 cc2650 cc2652 efr32mg1 efr32mg12 efr32mg13 efr32mg21 nrf52811 nrf52833 nrf52840 simulation posix)
readonly OT_PLATFORMS=(cc2538 cc2650 efr32mg1 efr32mg12 efr32mg13 efr32mg21 nrf52811 nrf52833 nrf52840 simulation posix)
readonly OT_NRF528XX_BUILD_TYPES=(UART_trans USB_trans_bl SPI_trans_NCP soft_crypto soft_crypto_threading)
readonly OT_POSIX_SIM_COMMON_OPTIONS=(
"-DOT_BORDER_AGENT=ON"
@@ -232,7 +232,7 @@ main()
OT_CMAKE_NINJA_TARGET=("ot-cli-mtd" "ot-ncp-mtd")
options+=("-DCMAKE_TOOLCHAIN_FILE=examples/platforms/${platform}/arm-none-eabi.cmake" "-DCMAKE_BUILD_TYPE=MinSizeRel")
;;
cc1352 | cc2538 | cc2652)
cc2538)
options+=("-DCMAKE_TOOLCHAIN_FILE=examples/platforms/${platform}/arm-none-eabi.cmake" "-DCMAKE_BUILD_TYPE=MinSizeRel")
;;
efr32*)
-8
View File
@@ -34,12 +34,4 @@ if(OT_PLATFORM STREQUAL "cc2650")
${CMAKE_CURRENT_SOURCE_DIR}/devices/cc26x0/driverlib/bin/gcc/driverlib.a
-T${CMAKE_CURRENT_SOURCE_DIR}/devices/cc26x0/linker_files/cc26x0f128.lds
)
elseif(OT_PLATFORM STREQUAL "cc1352" OR OT_PLATFORM STREQUAL "cc2652")
add_library(cc13x2-cc26x2-driver INTERFACE)
target_link_libraries(cc13x2-cc26x2-driver
INTERFACE
${CMAKE_CURRENT_SOURCE_DIR}/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a
-T${CMAKE_CURRENT_SOURCE_DIR}/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds
)
endif()
-3
View File
@@ -25,11 +25,8 @@ Also see: release_notes_driverlib_cc13xx_cc26xx.html
| file | change |
|------------------------------------------------------|-------------------------------------------------------------------------|
| `devices/cc26x0/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `devices/cc26x0/linker_files/cc26x0f128.lds` | `end` symbol added for GCC stdlib and C++ init array placement |
| `devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds` | `end` symbol added for GCC stdlib |
| `devices/cc26x0/startup_files/startup_gcc.c` | C++ constructor calls added to `ResetHandler` |
| `devices/cc13x2_cc26x2/startup_files/startup_gcc.c` | C++ constructor calls added to `ResetHandler` |
Documentation can be found within the [SimpleLink CC26x2 Software Development
Kit](http://www.ti.com/tool/simplelink-cc13x2-26x2-sdk).
-43
View File
@@ -1,43 +0,0 @@
/******************************************************************************
* Filename: adi.c
* Revised: 2016-11-17 16:39:28 +0100 (Thu, 17 Nov 2016)
* Revision: 47706
*
* Description: Driver for the ADI interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_smph.h"
#include "adi.h"
#include "cpu.h"
-791
View File
@@ -1,791 +0,0 @@
/******************************************************************************
* Filename: adi.h
* Revised: 2016-11-17 16:39:28 +0100 (Thu, 17 Nov 2016)
* Revision: 47706
*
* Description: Defines and prototypes for the ADI master interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup analog_group
//! @{
//! \addtogroup adi_api
//! @{
//
//*****************************************************************************
#ifndef __ADI_H__
#define __ADI_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_uart.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_adi.h"
#include "debug.h"
#include "ddi.h"
//*****************************************************************************
//
// Number of registers in the ADI slave
//
//*****************************************************************************
#define ADI_SLAVE_REGS 16
//*****************************************************************************
//
// Defines that is used to control the ADI slave and master
//
//*****************************************************************************
#define ADI_PROTECT 0x00000080
#define ADI_ACK 0x00000001
#define ADI_SYNC 0x00000000
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
#ifdef DRIVERLIB_DEBUG
//*****************************************************************************
//
//! \internal
//! \brief Checks an ADI base address.
//!
//! This function determines if an ADI port base address is valid.
//!
//! \param ui32Base is the base address of the ADI port.
//!
//! \return Returns \c true if the base address is valid and \c false
//! otherwise
//
//*****************************************************************************
static bool
ADIBaseValid(uint32_t ui32Base)
{
return(ui32Base == ADI2_BASE || ui32Base == ADI3_BASE ||
ui32Base == AUX_ADI4_BASE);
}
#endif
//*****************************************************************************
//
//! \brief Write an 8 bit value to a register in an ADI slave.
//!
//! This function will write a value to a single register in the analog domain.
//! The access to the registers in the analog domain is either 8, 16, or 32 bit
//! aligned. You can only do 16 bit access on registers 0-1 / 2-3, etc. Similarly
//! 32 bit accesses are always performed on register 0-3 / 4-7, etc. Addresses
//! for the registers and values being written to the registers will be
//! truncated according to this access scheme.
//!
//! \note This operation is write only for the specified register. No
//! previous value of the register will be kept (i.e. this is NOT
//! read-modify-write on the register).
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the register to write.
//! \param ui8Val is the 8 bit value to write to the register.
//!
//! \return None
//!
//! \sa ADI16RegWrite(), ADI32RegWrite()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Write the value to the register.
HWREGB(ui32Base + ui32Reg) = ui8Val;
}
//*****************************************************************************
//
//! \brief Write a 16 bit value to 2 registers in the ADI slave.
//!
//! This function will write a value to 2 consecutive registers in the analog
//! domain. The access to the registers in the analog domain is either 8, 16
//! or 32 bit aligned. You can only do 16 bit access on registers 0-1 / 2-3,
//! etc. Similarly 32 bit accesses are always performed on register 0-3 / 4-7,
//! etc. Addresses for the registers and values being written
//! to the registers will be truncated according to this access scheme.
//!
//! \note The byte addressing bit will be ignored, to ensure 16 bit access
//! to the ADI slave.
//!
//! \note This operation is write only for the specified register. No
//! previous value of the register will be kept (i.e. this is NOT
//! read-modify-write on the register).
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the register to write.
//! \param ui16Val is the 16 bit value to write to the register.
//!
//! \return None
//!
//! \sa ADI8RegWrite(), ADI32RegWrite()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16RegWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint16_t ui16Val)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Write the value to the register.
HWREGH(ui32Base + (ui32Reg & 0xFE)) = ui16Val;
}
//*****************************************************************************
//
//! \brief Write a 32 bit value to 4 registers in the ADI slave.
//!
//! This function will write a value to 4 consecutive registers in the analog
//! domain. The access to the registers in the analog domain is either 8, 16
//! or 32 bit aligned. You can only do 16 bit access on registers 0-1 / 2-3,
//! etc. Similarly 32 bit accesses are always performed on register 0-3 / 4-7,
//! etc. Addresses for the registers and values being written
//! to the registers will be truncated according to this access scheme.
//!
//! \note The byte and half word addressing bits will be ignored, to ensure
//! 32 bit access to the ADI slave.
//!
//! \note This operation is write only for the specified register. No
//! previous value of the register will be kept (i.e. this is NOT
//! read-modify-write on the register).
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the register to write.
//! \param ui32Val is the 32 bit value to write to the register.
//!
//! \return None
//!
//! \sa ADI8RegWrite(), ADI16RegWrite()
//
//*****************************************************************************
__STATIC_INLINE void
ADI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Write the value to the register.
HWREG(ui32Base + (ui32Reg & 0xFC)) = ui32Val;
}
//*****************************************************************************
//
//! \brief Read the value of an 8 bit register in the ADI slave.
//!
//! This function will read an 8 bit register in the analog domain and return
//! the value as the lower 8 bits of an \c uint32_t. The access to the
//! registers in the analog domain is either 8, 16 or 32 bit aligned. You can
//! only do 16 bit access on registers 0-1 / 2-3, etc. Similarly 32 bit accesses
//! are always performed on register 0-3 / 4-7, etc. Addresses for the
//! registers and values being written to the registers will be truncated
//! according to this access scheme.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the 8 bit register to read.
//!
//! \return Returns the 8 bit value of the analog register in the least
//! significant byte of the \c uint32_t.
//!
//! \sa ADI16RegRead(), ADI32RegRead()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ADI8RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Read the register and return the value.
return(HWREGB(ui32Base + ui32Reg));
}
//*****************************************************************************
//
//! \brief Read the value in a 16 bit register.
//!
//! This function will read 2 x 8 bit registers in the analog domain and return
//! the value as the lower 16 bits of an \c uint32_t. The access to the
//! registers in the analog domain is either 8, 16 or 32 bit aligned. You can
//! only do 16 bit access on registers 0-1 / 2-3, etc. Similarly 32 bit accesses
//! are always performed on register 0-3 / 4-7, etc. Addresses for the
//! registers and values being written to the registers will be truncated
//! according to this access scheme.
//!
//! \note The byte addressing bit will be ignored, to ensure 16 bit access
//! to the ADI slave.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the 16 bit register to read.
//!
//! \return Returns the 16 bit value of the 2 analog register in the 2 least
//! significant bytes of the \c uint32_t.
//!
//! \sa ADI8RegRead(), ADI32RegRead()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ADI16RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Read the registers and return the value.
return(HWREGH(ui32Base + (ui32Reg & 0xFE)));
}
//*****************************************************************************
//
//! \brief Read the value in a 32 bit register.
//!
//! This function will read 4 x 8 bit registers in the analog domain and return
//! the value as an \c uint32_t. The access to the registers in the analog
//! domain is either 8, 16 or 32 bit aligned. You can only do 16 bit access on
//! registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always performed on
//! register 0-3 / 4-7, etc. Addresses for the registers and values being
//! written to the registers will be truncated according to this access scheme.
//!
//! \note The byte and half word addressing bits will be ignored, to ensure
//! 32 bit access to the ADI slave.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the 32 bit register to read.
//!
//! \return Returns the 32 bit value of the 4 analog registers.
//!
//! \sa ADI8RegRead(), ADI16RegRead()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ADI32RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Read the registers and return the value.
return(HWREG(ui32Base + (ui32Reg & 0xFC)));
}
//*****************************************************************************
//
//! \brief Set specific bits in a single 8 bit ADI register.
//!
//! This function will set bits in a single register in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in a specific 8 bit register in the
//! ADI slave. Only bits in the selected register are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui8Val is the 8 bit one-hot encoded value specifying which
//! bits to set in the register.
//!
//! \return None
//!
//! \sa ADI16BitsSet(), ADI32BitsSet()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_SET;
// Set the selected bits.
HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val;
}
//*****************************************************************************
//
//! \brief Set specific bits in 2 x 8 bit ADI slave registers.
//!
//! This function will set bits in 2 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in 2 consecutive 8 bit registers in the
//! ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui16Val is the 16 bit one-hot encoded value specifying which
//! bits to set in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsSet(), ADI32BitsSet()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_SET;
// Set the selected bits.
HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val;
}
//*****************************************************************************
//
//! \brief Set specific bits in 4 x 8 bit ADI slave registers.
//!
//! This function will set bits in 4 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in 4 consecutive 8 bit registers in the
//! ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui32Val is the 32 bit one-hot encoded value specifying which
//! bits to set in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsSet(), ADI16BitsSet()
//
//*****************************************************************************
__STATIC_INLINE void
ADI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_SET;
// Set the selected bits.
HWREG(ui32Base + ui32RegOffset + (ui32Reg & 0xFC)) = ui32Val;
}
//*****************************************************************************
//
//! \brief Clear specific bits in an 8 bit ADI register.
//!
//! This function will clear bits in a register in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to clear bits in a specific 8 bit register in
//! the ADI slave. Only bits in the selected register are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui8Val is the 8 bit one-hot encoded value specifying which
//! bits to clear in the register.
//!
//! \return None
//!
//! \sa ADI16BitsClear(), ADI32BitsClear()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_CLR;
// Set the selected bits.
HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val;
}
//*****************************************************************************
//
//! \brief Clear specific bits in two 8 bit ADI register.
//!
//! This function will clear bits in 2 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to clear bits in 2 consecutive 8 bit registers in
//! the ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui16Val is the 16 bit one-hot encoded value specifying which
//! bits to clear in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsClear(), ADI32BitsClear()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_CLR;
// Set the selected bits.
HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val;
}
//*****************************************************************************
//
//! \brief Clear specific bits in four 8 bit ADI register.
//!
//! This function will clear bits in 4 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to clear bits in 4 consecutive 8 bit registers in
//! the ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui32Val is the 32 bit one-hot encoded value specifying which
//! bits to clear in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsClear(), ADI16BitsClear()
//
//*****************************************************************************
__STATIC_INLINE void
ADI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_CLR;
// Set the selected bits.
HWREG(ui32Base + ui32RegOffset + (ui32Reg & 0xFC)) = ui32Val;
}
//*****************************************************************************
//
//! \brief Set a value on any 4 bits inside an 8 bit register in the ADI slave.
//!
//! This function allows halfbyte (4 bit) access to the ADI slave registers.
//! The parameter \c bWriteHigh determines whether to write to the lower
//! or higher part of the 8 bit register.
//!
//! Use this function to write any value in the range 0-3 bits aligned on a
//! half byte boundary. Fx. for writing the value 0b101 to bits 1 to 3 the
//! \c ui8Val = 0xA and the \c ui8Mask = 0xE. Bit 0 will not be affected by
//! the operation, as the corresponding bit is not set in the \c ui8Mask.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the ADI port.
//! \param ui32Reg is the Least Significant Register in the ADI slave that
//! will be affected by the write operation.
//! \param bWriteHigh defines which part of the register to write in.
//! - \c true: Write upper half byte of register.
//! - \c false: Write lower half byte of register.
//! \param ui8Mask is the mask defining which of the 4 bits that should be
//! overwritten. The mask must be defined in the lower half of the 8 bits of
//! the parameter.
//! \param ui8Val is the value to write. The value must be defined in the lower
//! half of the 8 bits of the parameter.
//!
//! \return None
//!
//! \sa ADI8SetValBit(), ADI16SetValBit
//
//*****************************************************************************
__STATIC_INLINE void
ADI4SetValBit(uint32_t ui32Base, uint32_t ui32Reg, bool bWriteHigh,
uint8_t ui8Mask, uint8_t ui8Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
ASSERT(!(ui8Val & 0xF0));
ASSERT(!(ui8Mask & 0xF0));
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_MASK4B + (ui32Reg << 1) + (bWriteHigh ? 1 : 0);
// Set the selected bits.
HWREGB(ui32Base + ui32RegOffset) = (ui8Mask << 4) | ui8Val;
}
//*****************************************************************************
//
//! \brief Set a value on any bits inside an 8 bit register in the ADI slave.
//!
//! This function allows byte (8 bit) access to the ADI slave registers.
//!
//! Use this function to write any value in the range 0-7 bits aligned on a
//! byte boundary. Fx. for writing the value 0b101 to bits 1 and 3 the
//! \c ui16Val = 0x0A and the \c ui16Mask = 0x0E. Bits 0 and 5-7 will not be affected
//! by the operation, as the corresponding bits are not set in the
//! \c ui16Mask.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the ADI port.
//! \param ui32Reg is the Least Significant Register in the ADI slave that
//! will be affected by the write operation.
//! \param ui16Mask is the mask defining which of the 8 bit that should be
//! overwritten. The mask must be defined in the lower half of the 16 bits.
//! \param ui16Val is the value to write. The value must be defined in the lower
//! half of the 16 bits.
//!
//! \return None
//!
//! \sa ADI4SetValBit(), ADI16SetValBit()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint16_t ui16Mask,
uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
ASSERT(!(ui16Val & 0xFF00));
ASSERT(!(ui16Mask & 0xFF00));
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_MASK8B + (ui32Reg << 1);
// Set the selected bits.
HWREGH(ui32Base + ui32RegOffset) = (ui16Mask << 8) | ui16Val;
}
//*****************************************************************************
//
//! \brief Set a value on any bits inside an 2 x 8 bit register aligned on a
//! half-word (byte) boundary in the ADI slave.
//!
//! This function allows 2 byte (16 bit) access to the ADI slave registers.
//!
//! Use this function to write any value in the range 0-15 bits aligned on a
//! half-word (byte) boundary. Fx. for writing the value 0b101 to bits 1 and 3 the
//! \c ui32Val = 0x000A and the \c ui32Mask = 0x000E. Bits 0 and 5-15 will not
//! be affected by the operation, as the corresponding bits are not set
//! in the \c ui32Mask.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the ADI port.
//! \param ui32Reg is the Least Significant Register in the ADI slave that
//! will be affected by the write operation.
//! \param ui32Mask is the mask defining which of the 16 bit that should be
//! overwritten. The mask must be defined in the lower half of the 32 bits.
//! \param ui32Val is the value to write. The value must be defined in the lower
//! half of the 32 bits.
//!
//! \return None
//!
//! \sa ADI4SetValBit(), ADI8SetValBit()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask,
uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
ASSERT(!(ui32Val & 0xFFFF0000));
ASSERT(!(ui32Mask & 0xFFFF0000));
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_MASK16B + ((ui32Reg << 1) & 0xFC);
// Set the selected bits.
HWREG(ui32Base + ui32RegOffset) = (ui32Mask << 16) | ui32Val;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __ADI_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,68 +0,0 @@
/******************************************************************************
* Filename: adi_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup adi_api
//! @{
//! \section sec_adi Introduction
//! \n
//!
//! \section sec_adi_api API
//!
//! The API functions can be grouped like this:
//!
//! Write:
//! - Direct (all bits):
//! - \ref ADI8RegWrite()
//! - \ref ADI16RegWrite()
//! - \ref ADI32RegWrite()
//! - Set individual bits:
//! - \ref ADI8BitsSet()
//! - \ref ADI16BitsSet()
//! - \ref ADI32BitsSet()
//! - Clear individual bits:
//! - \ref ADI8BitsClear()
//! - \ref ADI16BitsClear()
//! - \ref ADI32BitsClear()
//! - Masked:
//! - \ref ADI4SetValBit()
//! - \ref ADI8SetValBit()
//! - \ref ADI16SetValBit()
//!
//! Read:
//! - \ref ADI8RegRead()
//! - \ref ADI16RegRead()
//! - \ref ADI32RegRead()
//!
//! @}
-372
View File
@@ -1,372 +0,0 @@
/******************************************************************************
* Filename: crypto.c
* Revised: 2019-01-25 13:11:50 +0100 (Fri, 25 Jan 2019)
* Revision: 54285
*
* Description: Driver for the aes functions of the crypto module
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aes.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AESStartDMAOperation
#define AESStartDMAOperation NOROM_AESStartDMAOperation
#undef AESSetInitializationVector
#define AESSetInitializationVector NOROM_AESSetInitializationVector
#undef AESWriteCCMInitializationVector
#define AESWriteCCMInitializationVector NOROM_AESWriteCCMInitializationVector
#undef AESReadTag
#define AESReadTag NOROM_AESReadTag
#undef AESVerifyTag
#define AESVerifyTag NOROM_AESVerifyTag
#undef AESWriteToKeyStore
#define AESWriteToKeyStore NOROM_AESWriteToKeyStore
#undef AESReadFromKeyStore
#define AESReadFromKeyStore NOROM_AESReadFromKeyStore
#undef AESWaitForIRQFlags
#define AESWaitForIRQFlags NOROM_AESWaitForIRQFlags
#undef AESConfigureCCMCtrl
#define AESConfigureCCMCtrl NOROM_AESConfigureCCMCtrl
#endif
//*****************************************************************************
//
// Load the initialization vector.
//
//*****************************************************************************
void AESSetInitializationVector(const uint32_t *initializationVector)
{
// Write initialization vector to the aes registers
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0) = initializationVector[0];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV1) = initializationVector[1];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV2) = initializationVector[2];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV3) = initializationVector[3];
}
//*****************************************************************************
//
// Start a crypto DMA operation.
//
//*****************************************************************************
void AESStartDMAOperation(const uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length)
{
if (channel0Length && channel0Addr) {
// We actually want to perform an operation. Clear any outstanding events.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = CRYPTO_IRQCLR_RESULT_AVAIL_M | CRYPTO_IRQEN_DMA_IN_DONE_M; // This might need AES_IRQEN_DMA_IN_DONE as well
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M));
// Configure the DMA controller - enable both DMA channels.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Base address of the payload data in ext. memory.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) = (uint32_t)channel0Addr;
// Payload data length in bytes, equal to the cipher text length.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = channel0Length;
}
if (channel1Length && channel1Addr) {
// Enable DMA channel 1.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 1;
// Base address of the output data buffer.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1EXTADDR) = (uint32_t)channel1Addr;
// Output data length in bytes, equal to the cipher text length.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1LEN) = channel1Length;
}
}
//*****************************************************************************
//
// Poll the IRQ status register and return.
//
//*****************************************************************************
uint32_t AESWaitForIRQFlags(uint32_t irqFlags)
{
uint32_t irqTrigger = 0;
// Wait for the DMA operation to complete. Add a delay to make sure we are
// not flooding the bus with requests too much.
do {
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M |
CRYPTO_IRQSTAT_RESULT_AVAIL_M |
CRYPTO_IRQSTAT_DMA_BUS_ERR_M |
CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)));
// Save the IRQ trigger source
irqTrigger = HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags;
// Clear IRQ flags
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = irqTrigger;
return irqTrigger;
}
//*****************************************************************************
//
// Transfer a key from CM3 memory to a key store location.
//
//*****************************************************************************
uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea)
{
// Check the arguments.
ASSERT((keyStoreArea == AES_KEY_AREA_0) ||
(keyStoreArea == AES_KEY_AREA_1) ||
(keyStoreArea == AES_KEY_AREA_2) ||
(keyStoreArea == AES_KEY_AREA_3) ||
(keyStoreArea == AES_KEY_AREA_4) ||
(keyStoreArea == AES_KEY_AREA_5) ||
(keyStoreArea == AES_KEY_AREA_6) ||
(keyStoreArea == AES_KEY_AREA_7));
ASSERT((aesKeyLength == AES_128_KEY_LENGTH_BYTES) ||
(aesKeyLength == AES_192_KEY_LENGTH_BYTES) ||
(aesKeyLength == AES_256_KEY_LENGTH_BYTES));
uint32_t keySize = 0;
switch (aesKeyLength) {
case AES_128_KEY_LENGTH_BYTES:
keySize = CRYPTO_KEYSIZE_SIZE_128_BIT;
break;
case AES_192_KEY_LENGTH_BYTES:
keySize = CRYPTO_KEYSIZE_SIZE_192_BIT;
break;
case AES_256_KEY_LENGTH_BYTES:
keySize = CRYPTO_KEYSIZE_SIZE_256_BIT;
break;
}
// Clear any previously written key at the keyLocation
AESInvalidateKey(keyStoreArea);
// Disable the external interrupt to stop the interrupt form propagating
// from the module to the System CPU.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL_M;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_DMA_IN_DONE_M | CRYPTO_IRQEN_RESULT_AVAIL_M;
// Configure master control module.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = CRYPTO_ALGSEL_KEY_STORE;
// Clear any outstanding events.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQCLR_RESULT_AVAIL);
// Configure the size of keys contained within the key store
// Do not write to the register if the correct key size is already set.
// Writing to this register causes all current keys to be invalidated.
uint32_t keyStoreKeySize = HWREG(CRYPTO_BASE + CRYPTO_O_KEYSIZE);
if (keySize != keyStoreKeySize) {
HWREG(CRYPTO_BASE + CRYPTO_O_KEYSIZE) = keySize;
}
// Enable key to write (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = 1 << keyStoreArea;
// Total key length in bytes (16 for 1 x 128-bit key and 32 for 1 x 256-bit key).
AESStartDMAOperation(aesKey, aesKeyLength, 0, 0);
// Wait for the DMA operation to complete.
uint32_t irqTrigger = AESWaitForIRQFlags(CRYPTO_IRQCLR_RESULT_AVAIL | CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQSTAT_DMA_BUS_ERR | CRYPTO_IRQSTAT_KEY_ST_WR_ERR);
// Re-enable interrupts globally.
IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ);
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
// If we had a bus error or the key is not in the CRYPTO_O_KEYWRITTENAREA, return an error.
if ((irqTrigger & (CRYPTO_IRQSTAT_DMA_BUS_ERR_M | CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)) || !(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (1 << keyStoreArea))) {
// There was an error in writing to the keyStore.
return AES_KEYSTORE_ERROR;
}
else {
return AES_SUCCESS;
}
}
//*****************************************************************************
//
// Transfer a key from the keyStoreArea to the internal buffer of the module.
//
//*****************************************************************************
uint32_t AESReadFromKeyStore(uint32_t keyStoreArea)
{
// Check the arguments.
ASSERT((keyStoreArea == AES_KEY_AREA_0) ||
(keyStoreArea == AES_KEY_AREA_1) ||
(keyStoreArea == AES_KEY_AREA_2) ||
(keyStoreArea == AES_KEY_AREA_3) ||
(keyStoreArea == AES_KEY_AREA_4) ||
(keyStoreArea == AES_KEY_AREA_5) ||
(keyStoreArea == AES_KEY_AREA_6) ||
(keyStoreArea == AES_KEY_AREA_7));
// Check if there is a valid key in the specified keyStoreArea
if (!(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (1 << keyStoreArea))) {
return AES_KEYSTORE_AREA_INVALID;
}
// Enable keys to read (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) = keyStoreArea;
// Wait until key is loaded to the AES module.
// We cannot simply poll the IRQ status as only an error is communicated through
// the IRQ status and not the completion of the transfer.
do {
CPUdelay(1);
}
while((HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) & CRYPTO_KEYREADAREA_BUSY_M));
// Check for keyStore read error.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & CRYPTO_IRQSTAT_KEY_ST_RD_ERR_M)) {
return AES_KEYSTORE_ERROR;
}
else {
return AES_SUCCESS;
}
}
//*****************************************************************************
//
// Read the tag after a completed CCM, GCM, or CBC-MAC operation.
//
//*****************************************************************************
uint32_t AESReadTag(uint8_t *tag, uint32_t tagLength)
{
// The intermediate array is used instead of a caller-provided one
// to enable a simple API with no unintuitive alignment or size requirements.
// This is a trade-off of stack-depth vs ease-of-use that came out on the
// ease-of-use side.
uint32_t computedTag[AES_BLOCK_SIZE / sizeof(uint32_t)];
// Wait until the computed tag is ready.
while (!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) & CRYPTO_AESCTL_SAVED_CONTEXT_RDY_M));
// Read computed tag out from the HW registers
// Need to read out all 128 bits in four reads to correctly clear CRYPTO_AESCTL_SAVED_CONTEXT_RDY flag
computedTag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0);
computedTag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1);
computedTag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2);
computedTag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3);
memcpy(tag, computedTag, tagLength);
return AES_SUCCESS;
}
//*****************************************************************************
//
// Verify the provided tag against the computed tag after a completed CCM or
// GCM operation.
//
//*****************************************************************************
uint32_t AESVerifyTag(const uint8_t *tag, uint32_t tagLength)
{
uint32_t resultStatus;
// The intermediate array is allocated on the stack to ensure users do not
// point the tag they provide and the one computed at the same location.
// That would cause memcmp to compare an array against itself. We could add
// a check that verifies that the arrays are not the same. If we did that and
// modified AESReadTag to just copy all 128 bits into a provided array,
// we could save 16 bytes of stack space while making the API much more
// complicated.
uint8_t computedTag[AES_BLOCK_SIZE];
resultStatus = AESReadTag(computedTag, tagLength);
if (resultStatus != AES_SUCCESS) {
return resultStatus;
}
resultStatus = memcmp(computedTag, tag, tagLength);
if (resultStatus != 0) {
return AES_TAG_VERIFICATION_FAILED;
}
return AES_SUCCESS;
}
//*****************************************************************************
//
// Configure the AES module for CCM mode
//
//*****************************************************************************
void AESConfigureCCMCtrl(uint32_t nonceLength, uint32_t macLength, bool encrypt)
{
uint32_t ctrlVal = 0;
ctrlVal = ((15 - nonceLength - 1) << CRYPTO_AESCTL_CCM_L_S);
if ( macLength >= 2 ) {
ctrlVal |= ((( macLength - 2 ) >> 1 ) << CRYPTO_AESCTL_CCM_M_S );
}
ctrlVal |= CRYPTO_AESCTL_CCM |
CRYPTO_AESCTL_CTR |
CRYPTO_AESCTL_SAVE_CONTEXT |
CRYPTO_AESCTL_CTR_WIDTH_128_BIT;
ctrlVal |= encrypt ? CRYPTO_AESCTL_DIR : 0;
AESSetCtrl(ctrlVal);
}
//*****************************************************************************
//
// Configure an IV for CCM mode of operation
//
//*****************************************************************************
void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength)
{
union {
uint32_t word[4];
uint8_t byte[16];
} initializationVector = {{0}};
initializationVector.byte[0] = 15 - nonceLength - 1;
memcpy(&(initializationVector.byte[1]), nonce, nonceLength);
AESSetInitializationVector(initializationVector.word);
}
-843
View File
@@ -1,843 +0,0 @@
/******************************************************************************
* Filename: aes.h
* Revised: 2019-01-25 14:45:16 +0100 (Fri, 25 Jan 2019)
* Revision: 54287
*
* Description: AES header file.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup peripheral_group
//! @{
//! \addtogroup aes_api
//! @{
//
//*****************************************************************************
#ifndef __AES_H__
#define __AES_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_crypto.h"
#include "debug.h"
#include "interrupt.h"
#include "cpu.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AESStartDMAOperation NOROM_AESStartDMAOperation
#define AESSetInitializationVector NOROM_AESSetInitializationVector
#define AESWriteCCMInitializationVector NOROM_AESWriteCCMInitializationVector
#define AESReadTag NOROM_AESReadTag
#define AESVerifyTag NOROM_AESVerifyTag
#define AESWriteToKeyStore NOROM_AESWriteToKeyStore
#define AESReadFromKeyStore NOROM_AESReadFromKeyStore
#define AESWaitForIRQFlags NOROM_AESWaitForIRQFlags
#define AESConfigureCCMCtrl NOROM_AESConfigureCCMCtrl
#endif
//*****************************************************************************
//
// Values that can be passed to AESIntEnable, AESIntDisable, and AESIntClear
// as the intFlags parameter, and returned from AESIntStatus.
// Only AES_DMA_IN_DONE and AES_RESULT_RDY are routed to the NVIC. Check each
// function to see if it supports other interrupt status flags.
//
//*****************************************************************************
#define AES_DMA_IN_DONE CRYPTO_IRQEN_DMA_IN_DONE_M
#define AES_RESULT_RDY CRYPTO_IRQEN_RESULT_AVAIL_M
#define AES_DMA_BUS_ERR CRYPTO_IRQCLR_DMA_BUS_ERR_M
#define AES_KEY_ST_WR_ERR CRYPTO_IRQCLR_KEY_ST_WR_ERR_M
#define AES_KEY_ST_RD_ERR CRYPTO_IRQCLR_KEY_ST_RD_ERR_M
//*****************************************************************************
//
// General constants
//
//*****************************************************************************
// AES module return codes
#define AES_SUCCESS 0
#define AES_KEYSTORE_ERROR 1
#define AES_KEYSTORE_AREA_INVALID 2
#define AES_DMA_BUSY 3
#define AES_DMA_ERROR 4
#define AES_TAG_NOT_READY 5
#define AES_TAG_VERIFICATION_FAILED 6
// Key store module defines
#define AES_IV_LENGTH_BYTES 16
#define AES_TAG_LENGTH_BYTES 16
#define AES_128_KEY_LENGTH_BYTES (128 / 8)
#define AES_192_KEY_LENGTH_BYTES (192 / 8)
#define AES_256_KEY_LENGTH_BYTES (256 / 8)
#define AES_BLOCK_SIZE 16
// DMA status codes
#define AES_DMA_CHANNEL0_ACTIVE CRYPTO_DMASTAT_CH0_ACT_M
#define AES_DMA_CHANNEL1_ACTIVE CRYPTO_DMASTAT_CH1_ACT_M
#define AES_DMA_PORT_ERROR CRYPTO_DMASTAT_PORT_ERR_M
// Crypto module operation types
#define AES_ALGSEL_AES CRYPTO_ALGSEL_AES_M
#define AES_ALGSEL_KEY_STORE CRYPTO_ALGSEL_KEY_STORE_M
#define AES_ALGSEL_TAG CRYPTO_ALGSEL_TAG_M
//*****************************************************************************
//
// For 128-bit keys, all 8 key area locations from 0 to 7 are valid.
// A 256-bit key requires two consecutive Key Area locations. The base key area
// may be odd. Do not attempt to write a 256-bit key to AES_KEY_AREA_7.
//
//*****************************************************************************
#define AES_KEY_AREA_0 0
#define AES_KEY_AREA_1 1
#define AES_KEY_AREA_2 2
#define AES_KEY_AREA_3 3
#define AES_KEY_AREA_4 4
#define AES_KEY_AREA_5 5
#define AES_KEY_AREA_6 6
#define AES_KEY_AREA_7 7
//*****************************************************************************
//
// Defines for the AES-CTR mode counter width
//
//*****************************************************************************
#define AES_CTR_WIDTH_32 0x0
#define AES_CTR_WIDTH_64 0x1
#define AES_CTR_WIDTH_96 0x2
#define AES_CTR_WIDTH_128 0x3
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Start a crypto DMA operation
//!
//! Enable the crypto DMA channels, configure the channel addresses,
//! and set the length of the data transfer.
//! Setting the length of the data transfer automatically starts the
//! transfer. It is also used by the hardware module as a signal to
//! begin the encryption, decryption, or MAC operation.
//!
//! \param [in] channel0Addr A pointer to the address channel 0 shall use.
//!
//! \param [in] channel0Length Length of the data in bytes to be read from or
//! written to at channel0Addr. Set to 0 to not set up
//! this channel. Permitted ranges are mode dependent
//! and displayed below.
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [1, sizeof(RAM)]
//!
//! \param [out] channel1Addr A pointer to the address channel 1 shall use.
//!
//! \param [in] channel1Length Length of the data in bytes to be read from or
//! written to at channel1Addr. Set to 0 to not set up
//! this channel.Permitted ranges are mode dependent
//! and displayed below.
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [1, sizeof(RAM)]
//!
//! \return None
//
//*****************************************************************************
extern void AESStartDMAOperation(const uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length);
//*****************************************************************************
//
//! \brief Write the initialization vector (IV) to the crypto module.
//!
//! Depending on the mode of operation, the tag must be constructed
//! differently:
//! - CBC: No special care must be taken. Any 128-bit IV
//! (initialization vector) will suffice.
//! - CBC-MAC: IV's must be all 0's.
//! - CCM: Only 12 and 13 byte IV's are permitted. See code
//! below for formatting.
//! \code
//! uint8_t initVectorLength = 12; // Could also be 13
//!
//! union {
//! uint32_t word[4];
//! uint8_t byte[16];
//! } initVector;
//!
//! uint8_t initVectorUnformatted[initVectorLength];
//!
//! // This is the same field length value that is written to the ctrl register
//! initVector.byte[0] = L - 1;
//!
//! memcpy(&initVector.byte[1], initVectorUnformatted, initVectorLength);
//!
//! // Fill the remaining bytes with zeros
//! for (initVectorLength++; initVectorLength < sizeof(initVector.byte); initVectorLength++) {
//! initVector.byte[initVectorLength] = 0;
//! }
//! \endcode
//!
//! \param [in] initializationVector Pointer to an array with four 32-bit elements
//! to be used as initialization vector.
//! Elements of array must be word aligned in memory.
//!
//! \return None
//
//*****************************************************************************
extern void AESSetInitializationVector(const uint32_t *initializationVector);
//*****************************************************************************
//
//! \brief Generate and load the initialization vector for a CCM operation.
//!
//!
//! \param [in] nonce Pointer to a nonce of length \c nonceLength.
//!
//! \param [in] nonceLength Number of bytes to copy from \c nonce when creating
//! the CCM IV. The L-value is also derived from it.
//!
//! \return None
//
//*****************************************************************************
extern void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength);
//*****************************************************************************
//
//! \brief Read the tag out from the crypto module.
//!
//! This function copies the \c tagLength bytes from the tag calculated by the
//! crypto module in CCM, GCM, or CBC-MAC mode to \c tag.
//!
//! \param [out] tag Pointer to an array of \c tagLength bytes.
//!
//! \param [in] tagLength Number of bytes to copy to \c tag.
//!
//! \return Returns a status code depending on the result of the transfer.
//! - \ref AES_TAG_NOT_READY if the tag is not ready yet
//! - \ref AES_SUCCESS otherwise
//
//*****************************************************************************
extern uint32_t AESReadTag(uint8_t *tag, uint32_t tagLength);
//*****************************************************************************
//
//! \brief Verifies the provided \c tag against calculated one
//!
//! This function compares the provided tag against the tag calculated by the
//! crypto module during the last CCM, GCM, or CBC-MAC
//!
//! This function copies the \c tagLength bytes from the tag calculated by the
//! crypto module in CCM, GCM, or CBC-MAC mode to \c tag.
//!
//! \param [in] tag Pointer to an array of \c tagLength bytes.
//!
//! \param [in] tagLength Number of bytes to compare.
//!
//! \return Returns a status code depending on the result of the transfer.
//! - \ref AES_TAG_VERIFICATION_FAILED if the verification failed
//! - \ref AES_SUCCESS otherwise
//
//*****************************************************************************
extern uint32_t AESVerifyTag(const uint8_t *tag, uint32_t tagLength);
//*****************************************************************************
//
//! \brief Transfer a key from main memory to a key area within the key store.
//!
//! The crypto DMA transfers the key and function does not return until
//! the operation completes.
//! The keyStore can only contain valid keys of one \c aesKeyLength at
//! any one point in time. The keyStore cannot contain both 128-bit and
//! 256-bit keys simultaneously. When a key of a different \c aesKeyLength
//! from the previous \c aesKeyLength is loaded, all previous keys are
//! invalidated.
//!
//! \param [in] aesKey Pointer to key. Does not need to be word-aligned.
//!
//! \param [in] aesKeyLength The key size in bytes. Currently, 128-bit, 192-bit,
//! and 256-bit keys are supported.
//! - \ref AES_128_KEY_LENGTH_BYTES
//! - \ref AES_192_KEY_LENGTH_BYTES
//! - \ref AES_256_KEY_LENGTH_BYTES
//!
//! \param [in] keyStoreArea The key store area to transfer the key to.
//! When using 128-bit keys, only the specified key store
//! area will be occupied.
//! When using 256-bit or 192-bit keys, two consecutive key areas
//! are used to store the key.
//! - \ref AES_KEY_AREA_0
//! - \ref AES_KEY_AREA_1
//! - \ref AES_KEY_AREA_2
//! - \ref AES_KEY_AREA_3
//! - \ref AES_KEY_AREA_4
//! - \ref AES_KEY_AREA_5
//! - \ref AES_KEY_AREA_6
//! - \ref AES_KEY_AREA_7
//!
//! When using 256-bit or 192-bit keys, the 8 \c keyStoreArea's are
//! split into four sets of two. Selecting any \c keyStoreArea automatically
//! occupies the second \c keyStoreArea of the tuples below:
//!
//! - (\ref AES_KEY_AREA_0, \ref AES_KEY_AREA_1)
//! - (\ref AES_KEY_AREA_2, \ref AES_KEY_AREA_3)
//! - (\ref AES_KEY_AREA_4, \ref AES_KEY_AREA_5)
//! - (\ref AES_KEY_AREA_6, \ref AES_KEY_AREA_7)
//!
//! For example: if \c keyStoreArea == \ref AES_KEY_AREA_2,
//! both \ref AES_KEY_AREA_2 and \ref AES_KEY_AREA_3 are occupied.
//! If \c keyStoreArea == \ref AES_KEY_AREA_5, both \ref AES_KEY_AREA_4 and \ref AES_KEY_AREA_5 are occupied.
//!
//! \return Returns a status code depending on the result of the transfer.
//! If there was an error in the read process itself, an error is
//! returned.
//! Otherwise, a success code is returned.
//! - \ref AES_KEYSTORE_ERROR
//! - \ref AES_SUCCESS
//!
//! \sa AESReadFromKeyStore
//
//*****************************************************************************
extern uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea);
//*****************************************************************************
//
//! \brief Transfer a key from key store area to the internal buffers within
//! the hardware module.
//!
//! The function polls until the transfer is complete.
//!
//! \param [in] keyStoreArea The key store area to transfer the key from. When using
//! 256-bit keys, either of the occupied key areas may be
//! specified to load the key. There is no need to specify
//! the length of the key here as the key store keeps track
//! of how long a key associated with any valid key area is
//! and where is starts.
//! - \ref AES_KEY_AREA_0
//! - \ref AES_KEY_AREA_1
//! - \ref AES_KEY_AREA_2
//! - \ref AES_KEY_AREA_3
//! - \ref AES_KEY_AREA_4
//! - \ref AES_KEY_AREA_5
//! - \ref AES_KEY_AREA_6
//! - \ref AES_KEY_AREA_7
//!
//! \return Returns a status code depending on the result of the transfer.
//! When specifying a \c keyStoreArea value without a valid key in it an
//! error is returned.
//! If there was an error in the read process itself, an error is
//! returned.
//! Otherwise, a success code is returned.
//! - \ref AES_KEYSTORE_AREA_INVALID
//! - \ref AES_KEYSTORE_ERROR
//! - \ref AES_SUCCESS
//!
//! \sa AESWriteToKeyStore
//
//*****************************************************************************
extern uint32_t AESReadFromKeyStore(uint32_t keyStoreArea);
//*****************************************************************************
//
//! \brief Poll the interrupt status register and clear when done.
//!
//! This function polls until one of the bits in the \c irqFlags is
//! asserted. Only \ref AES_DMA_IN_DONE and \ref AES_RESULT_RDY can actually
//! trigger the interrupt line. That means that one of those should
//! always be included in \c irqFlags and will always be returned together
//! with any error codes.
//!
//! \param [in] irqFlags IRQ flags to poll and mask that the status register will be
//! masked with. May consist of any bitwise OR of the flags
//! below that includes at least one of
//! \ref AES_DMA_IN_DONE or \ref AES_RESULT_RDY :
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//! - \ref AES_DMA_BUS_ERR
//! - \ref AES_KEY_ST_WR_ERR
//! - \ref AES_KEY_ST_RD_ERR
//!
//! \return Returns the IRQ status register masked with \c irqFlags. May be any
//! bitwise OR of the following masks:
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//! - \ref AES_DMA_BUS_ERR
//! - \ref AES_KEY_ST_WR_ERR
//! - \ref AES_KEY_ST_RD_ERR
//
//*****************************************************************************
extern uint32_t AESWaitForIRQFlags(uint32_t irqFlags);
//*****************************************************************************
//
//! \brief Configure AES engine for CCM operation.
//!
//! \param [in] nonceLength Length of the nonce. Must be <= 14.
//!
//! \param [in] macLength Length of the MAC. Must be <= 16.
//!
//! \param [in] encrypt Whether to set up an encrypt or decrypt operation.
//! - true: encrypt
//! - false: decrypt
//!
//! \return None
//
//*****************************************************************************
extern void AESConfigureCCMCtrl(uint32_t nonceLength, uint32_t macLength, bool encrypt);
//*****************************************************************************
//
//! \brief Invalidate a key in the key store
//!
//! \param [in] keyStoreArea is the entry in the key store to invalidate. This
//! permanently deletes the key from the key store.
//! - \ref AES_KEY_AREA_0
//! - \ref AES_KEY_AREA_1
//! - \ref AES_KEY_AREA_2
//! - \ref AES_KEY_AREA_3
//! - \ref AES_KEY_AREA_4
//! - \ref AES_KEY_AREA_5
//! - \ref AES_KEY_AREA_6
//! - \ref AES_KEY_AREA_7
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESInvalidateKey(uint32_t keyStoreArea)
{
ASSERT((keyStoreArea == AES_KEY_AREA_0) ||
(keyStoreArea == AES_KEY_AREA_1) ||
(keyStoreArea == AES_KEY_AREA_2) ||
(keyStoreArea == AES_KEY_AREA_3) ||
(keyStoreArea == AES_KEY_AREA_4) ||
(keyStoreArea == AES_KEY_AREA_5) ||
(keyStoreArea == AES_KEY_AREA_6) ||
(keyStoreArea == AES_KEY_AREA_7));
// Clear any previously written key at the key location
HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) = (0x00000001 << keyStoreArea);
}
//*****************************************************************************
//
//! \brief Select type of operation
//!
//! \param [in] algorithm Flags that specify which type of operation the crypto
//! module shall perform. The flags are mutually exclusive.
//! - 0 : Reset the module
//! - \ref AES_ALGSEL_AES
//! - \ref AES_ALGSEL_TAG
//! - \ref AES_ALGSEL_KEY_STORE
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESSelectAlgorithm(uint32_t algorithm)
{
ASSERT((algorithm == AES_ALGSEL_AES) ||
(algorithm == AES_ALGSEL_AES | AES_ALGSEL_TAG) ||
(algorithm == AES_ALGSEL_KEY_STORE));
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = algorithm;
}
//*****************************************************************************
//
//! \brief Set up the next crypto module operation.
//!
//! The function uses a bitwise OR of the fields within the CRYPTO_O_AESCTL
//! register. The relevant field names have the format:
//! - CRYPTO_AESCTL_[field name]
//!
//! \param [in] ctrlMask Specifies which register fields shall be set.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESSetCtrl(uint32_t ctrlMask)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = ctrlMask;
}
//*****************************************************************************
//
//! \brief Specify length of the crypto operation.
//!
//! Despite specifying it here, the crypto DMA must still be
//! set up with the correct data length.
//!
//! \param [in] length Data length in bytes. If this
//! value is set to 0, only authentication of the AAD is
//! performed in CCM-mode and AESWriteAuthLength() must be set to
//! >0.
//! Range depends on the mode:
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [0, sizeof(RAM)]
//!
//! \return None
//!
//! \sa AESWriteAuthLength
//
//*****************************************************************************
__STATIC_INLINE void AESSetDataLength(uint32_t length)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = length;
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0;
}
//*****************************************************************************
//
//! \brief Specify the length of the additional authentication data (AAD).
//!
//! Despite specifying it here, the crypto DMA must still be set up with
//! the correct AAD length.
//!
//! \param [in] length Specifies how long the AAD is in a CCM operation. In CCM mode,
//! set this to 0 if no AAD is required. If set to 0,
//! AESWriteDataLength() must be set to >0.
//! Range depends on the mode:
//! - ECB: Do not call.
//! - CBC: [0]
//! - CBC-MAC: [0]
//! - CCM: [0, sizeof(RAM)]
//!
//! \return None
//!
//! \sa AESWriteDataLength
//
//*****************************************************************************
__STATIC_INLINE void AESSetAuthLength(uint32_t length)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESAUTHLEN) = length;
}
//*****************************************************************************
//
//! \brief Reset the accelerator and cancel ongoing operations
//!
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESReset(void)
{
HWREG(CRYPTO_BASE + CRYPTO_O_SWRESET) = 0x00000001;
}
//*****************************************************************************
//
//! \brief Enable individual crypto interrupt sources.
//!
//! This function enables the indicated crypto interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt.
//! Disabled sources have no effect on the processor.
//!
//! \param [in] intFlags is the bitwise OR of the interrupt sources to be enabled.
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESIntEnable(uint32_t intFlags)
{
// Check the arguments.
ASSERT((intFlags & AES_DMA_IN_DONE) ||
(intFlags & AES_RESULT_RDY));
// Using level interrupt.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL_M;
// Enable the specified interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) |= intFlags;
}
//*****************************************************************************
//
//! \brief Disable individual crypto interrupt sources.
//!
//! This function disables the indicated crypto interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt.
//! Disabled sources have no effect on the processor.
//!
//! \param [in] intFlags is the bitwise OR of the interrupt sources to be enabled.
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESIntDisable(uint32_t intFlags)
{
// Check the arguments.
ASSERT((intFlags & AES_DMA_IN_DONE) ||
(intFlags & AES_RESULT_RDY));
// Disable the specified interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) &= ~intFlags;
}
//*****************************************************************************
//
//! \brief Get the current masked interrupt status.
//!
//! This function returns the masked interrupt status of the crypto module.
//!
//! \return Returns the status of the masked lines when enabled:
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//
//*****************************************************************************
__STATIC_INLINE uint32_t AESIntStatusMasked(void)
{
uint32_t mask;
// Return the masked interrupt status
mask = HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN);
return(mask & HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT));
}
//*****************************************************************************
//
//! \brief Get the current raw interrupt status.
//!
//! This function returns the raw interrupt status of the crypto module.
//! It returns both the status of the lines routed to the NVIC as well as the
//! error flags.
//!
//! \return Returns the raw interrupt status:
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//! - \ref AES_DMA_BUS_ERR
//! - \ref AES_KEY_ST_WR_ERR
//! - \ref AES_KEY_ST_RD_ERR
//
//*****************************************************************************
__STATIC_INLINE uint32_t AESIntStatusRaw(void)
{
// Return either the raw interrupt status
return(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT));
}
//*****************************************************************************
//
//! \brief Clear crypto interrupt sources.
//!
//! The specified crypto interrupt sources are cleared, so that they no longer
//! assert. This function must be called in the interrupt handler to keep the
//! interrupt from being recognized again immediately upon exit.
//!
//! \note Due to write buffers and synchronizers in the system it may take several
//! clock cycles from a register write clearing an event in the module until the
//! event is actually cleared in the NVIC of the system CPU. It is recommended to
//! clear the event source early in the interrupt service routine (ISR) to allow
//! the event clear to propagate to the NVIC before returning from the ISR.
//!
//! \param [in] intFlags is a bit mask of the interrupt sources to be cleared.
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESIntClear(uint32_t intFlags)
{
// Check the arguments.
ASSERT((intFlags & AES_DMA_IN_DONE) ||
(intFlags & AES_RESULT_RDY));
// Clear the requested interrupt sources,
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = intFlags;
}
//*****************************************************************************
//
//! \brief Register an interrupt handler for a crypto interrupt.
//!
//! This function does the actual registering of the interrupt handler. This
//! function enables the global interrupt in the interrupt controller; specific
//! crypto interrupts must be enabled via \ref AESIntEnable(). It is the interrupt
//! handler's responsibility to clear the interrupt source.
//!
//! \param handlerFxn is a pointer to the function to be called when the
//! crypto interrupt occurs.
//!
//! \return None
//!
//! \sa \ref IntRegister() for important information about registering interrupt
//! handlers.
//
//*****************************************************************************
__STATIC_INLINE void AESIntRegister(void (*handlerFxn)(void))
{
// Register the interrupt handler.
IntRegister(INT_CRYPTO_RESULT_AVAIL_IRQ, handlerFxn);
// Enable the crypto interrupt.
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
//*****************************************************************************
//
//! \brief Unregister an interrupt handler for a crypto interrupt.
//!
//! This function does the actual unregistering of the interrupt handler. It
//! clears the handler called when a crypto interrupt occurs. This
//! function also masks off the interrupt in the interrupt controller so that
//! the interrupt handler no longer is called.
//!
//! \return None
//!
//! \sa \ref IntRegister() for important information about registering interrupt
//! handlers.
//
//*****************************************************************************
__STATIC_INLINE void AESIntUnregister(void)
{
//
// Disable the interrupt.
//
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
//
// Unregister the interrupt handler.
//
IntUnregister(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AESStartDMAOperation
#undef AESStartDMAOperation
#define AESStartDMAOperation ROM_AESStartDMAOperation
#endif
#ifdef ROM_AESSetInitializationVector
#undef AESSetInitializationVector
#define AESSetInitializationVector ROM_AESSetInitializationVector
#endif
#ifdef ROM_AESWriteCCMInitializationVector
#undef AESWriteCCMInitializationVector
#define AESWriteCCMInitializationVector ROM_AESWriteCCMInitializationVector
#endif
#ifdef ROM_AESReadTag
#undef AESReadTag
#define AESReadTag ROM_AESReadTag
#endif
#ifdef ROM_AESVerifyTag
#undef AESVerifyTag
#define AESVerifyTag ROM_AESVerifyTag
#endif
#ifdef ROM_AESWriteToKeyStore
#undef AESWriteToKeyStore
#define AESWriteToKeyStore ROM_AESWriteToKeyStore
#endif
#ifdef ROM_AESReadFromKeyStore
#undef AESReadFromKeyStore
#define AESReadFromKeyStore ROM_AESReadFromKeyStore
#endif
#ifdef ROM_AESWaitForIRQFlags
#undef AESWaitForIRQFlags
#define AESWaitForIRQFlags ROM_AESWaitForIRQFlags
#endif
#ifdef ROM_AESConfigureCCMCtrl
#undef AESConfigureCCMCtrl
#define AESConfigureCCMCtrl ROM_AESConfigureCCMCtrl
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AES_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,66 +0,0 @@
/******************************************************************************
* Filename: aes_doc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aes_api
//! @{
//! \section sec_aes Introduction
//!
//! The AES (advanced encryption standard) API provides access to the AES and key
//! store functionality of the crypto core. The SHA2 accelerator is also
//! contained within the crypto core. Hence, only one of SHA2 and AES may be
//! used at the same time.
//! This module offers hardware acceleration for several protocols using the
//! AES block cypher. The protocols below are supported by the hardware. The
//! driverlib documentation only explicitly references the most commonly used ones.
//! - ECB
//! - CBC
//! - CCM
//! - CBC-MAC
//! - GCM
//!
//! The key store is a section of crypto memory that is only accessible to the crypto module
//! and may be written to by the application via the crypto DMA. It is not possible to
//! read from the key store to main memory. Thereby, it is not possible to
//! compromise the key should the application be hacked if the original key in main
//! memory was overwritten already.
//!
//! The crypto core does not have retention and all configuration settings and
//! keys in the keystore are lost when going into standby or shutdown.
//! The typical security advantages a key store offers are not available in these
//! low power modes as the key must be saved in regular memory to reload
//! it after going into standby or shutdown.
//! Consequently, the keystore primarily serves as an interface to the AES accelerator.
//!
//! @}
@@ -1,80 +0,0 @@
/******************************************************************************
* Filename: aon_batmon.c
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Driver for the AON Battery and Temperature Monitor
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_batmon.h"
#include "../inc/hw_fcfg1.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONBatMonTemperatureGetDegC
#define AONBatMonTemperatureGetDegC NOROM_AONBatMonTemperatureGetDegC
#endif
//*****************************************************************************
//
// AONBatMonTemperatureGetDegC()
// Returns sign extended temperature in Deg C (-256 .. +255)
//
//*****************************************************************************
int32_t
AONBatMonTemperatureGetDegC( void )
{
int32_t signedTemp ; // Signed extended temperature with 8 fractional bits
int32_t tempCorrection ; // Voltage dependent temp correction with 8 fractional bits
int8_t voltageSlope ; // Signed byte value representing the TEMP slope with battery voltage, in degrees C/V, with 4 fractional bits.
// Shift left then right to sign extend the BATMON_TEMP field
signedTemp = ((((int32_t)HWREG( AON_BATMON_BASE + AON_BATMON_O_TEMP ))
<< ( 32 - AON_BATMON_TEMP_INT_W - AON_BATMON_TEMP_INT_S ))
>> ( 32 - AON_BATMON_TEMP_INT_W - AON_BATMON_TEMP_INT_S ));
// Typecasting voltageSlope to int8_t prior to assignment in order to make sure sign extension works properly
// Using byte read (HWREGB) in order to make more efficient code since voltageSlope is assigned to bits[7:0] of FCFG1_O_MISC_TRIM
voltageSlope = ((int8_t)HWREGB( FCFG1_BASE + FCFG1_O_MISC_TRIM ));
tempCorrection = (( voltageSlope * (((int32_t)HWREG( AON_BATMON_BASE + AON_BATMON_O_BAT )) - 0x300 )) >> 4 );
return ((( signedTemp - tempCorrection ) + 0x80 ) >> 8 );
}
// See aon_batmon.h for implementation of remaining functions
@@ -1,306 +0,0 @@
/******************************************************************************
* Filename: aon_batmon.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the AON Battery and Temperature
* Monitor
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonbatmon_api
//! @{
//
//*****************************************************************************
#ifndef __AON_BATMON_H__
#define __AON_BATMON_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_batmon.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONBatMonTemperatureGetDegC NOROM_AONBatMonTemperatureGetDegC
#endif
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enable the temperature and battery monitoring.
//!
//! This function will enable the measurements of the temperature and the
//! battery voltage.
//!
//! To speed up the measurement of the levels the measurement can be enabled
//! before configuring the battery and temperature settings. When all of the
//! AON_BATMON registers are configured, the calculation of the voltage and
//! temperature values can be enabled (the measurement will now take
//! effect/propagate to other blocks).
//!
//! It is possible to enable both at the same time, after the AON_BATMON
//! registers are configured, but then the first values will be ready at a
//! later point compared to the scenario above.
//!
//! \note Temperature and battery voltage measurements are not done in
//! parallel. The measurement cycle is controlled by a hardware Finite State
//! Machine. First the temperature and then the battery voltage each taking
//! one cycle to complete. However, if the comparator measuring the battery
//! voltage detects a change on the reference value, a new measurement of the
//! battery voltage only is performed immediately after. This has no impact on
//! the cycle count.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONBatMonEnable(void)
{
// Enable the measurements.
HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL) =
AON_BATMON_CTL_CALC_EN |
AON_BATMON_CTL_MEAS_EN;
}
//*****************************************************************************
//
//! \brief Disable the temperature and battery monitoring.
//!
//! This function will disable the measurements of the temperature and the
//! battery voltage.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONBatMonDisable(void)
{
// Disable the measurements.
HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL) = 0;
}
//*****************************************************************************
//
//! \brief Get the current temperature measurement as a signed value in Deg Celsius.
//!
//! This function returns an calibrated and rounded value in degree Celsius.
//! The temperature measurements are updated every cycle.
//!
//! \note The temperature drifts slightly depending on the battery voltage.
//! This function compensates for this drift and returns a calibrated temperature.
//!
//! \note Use the function AONBatMonNewTempMeasureReady() to test for a new measurement.
//!
//! \return Returns signed integer part of temperature in Deg C (-256 .. +255)
//!
//! \sa AONBatMonNewTempMeasureReady()
//
//*****************************************************************************
extern int32_t AONBatMonTemperatureGetDegC( void );
//*****************************************************************************
//
//! \brief Get the battery monitor measurement.
//!
//! This function will return the current battery monitor measurement.
//! The battery voltage measurements are updated every cycle.
//!
//! \note The returned value is NOT sign-extended!
//!
//! \note Use the function \ref AONBatMonNewBatteryMeasureReady() to test for
//! a change in measurement.
//!
//! \return Returns the current battery monitor value of the battery voltage
//! measurement in a <int.frac> format size <3.8> in units of volt.
//!
//! \sa AONBatMonNewBatteryMeasureReady()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONBatMonBatteryVoltageGet(void)
{
uint32_t ui32CurrentBattery;
ui32CurrentBattery = HWREG(AON_BATMON_BASE + AON_BATMON_O_BAT);
// Return the current battery voltage measurement.
return (ui32CurrentBattery >> AON_BATMON_BAT_FRAC_S);
}
//*****************************************************************************
//
//! \brief Check if battery monitor measurement has changed.
//!
//! This function checks if a new battery monitor value is available. If the
//! measurement value has \b changed since last clear the function returns \c true.
//!
//! If the measurement has changed the function will automatically clear the
//! status bit.
//!
//! \note It is always possible to read out the current value of the
//! battery level using AONBatMonBatteryVoltageGet() but this function can be
//! used to check if the measurement has changed.
//!
//! \return Returns \c true if the measurement value has changed and \c false
//! otherwise.
//!
//! \sa AONBatMonNewTempMeasureReady(), AONBatMonBatteryVoltageGet()
//
//*****************************************************************************
__STATIC_INLINE bool
AONBatMonNewBatteryMeasureReady(void)
{
bool bStatus;
// Check the status bit.
bStatus = HWREG(AON_BATMON_BASE + AON_BATMON_O_BATUPD) &
AON_BATMON_BATUPD_STAT ? true : false;
// Clear status bit if set.
if(bStatus)
{
HWREG(AON_BATMON_BASE + AON_BATMON_O_BATUPD) = 1;
}
// Return status.
return (bStatus);
}
//*****************************************************************************
//
//! \brief Check if temperature monitor measurement has changed.
//!
//! This function checks if a new temperature value is available. If the
//! measurement value has \b changed since last clear the function returns \c true.
//!
//! If the measurement has changed the function will automatically clear the
//! status bit.
//!
//! \note It is always possible to read out the current value of the
//! temperature using \ref AONBatMonTemperatureGetDegC()
//! but this function can be used to check if the measurement has changed.
//!
//! \return Returns \c true if the measurement value has changed and \c false
//! otherwise.
//!
//! \sa AONBatMonNewBatteryMeasureReady(), AONBatMonTemperatureGetDegC()
//
//*****************************************************************************
__STATIC_INLINE bool
AONBatMonNewTempMeasureReady(void)
{
bool bStatus;
// Check the status bit.
bStatus = HWREG(AON_BATMON_BASE + AON_BATMON_O_TEMPUPD) &
AON_BATMON_TEMPUPD_STAT ? true : false;
// Clear status bit if set.
if(bStatus)
{
HWREG(AON_BATMON_BASE + AON_BATMON_O_TEMPUPD) = 1;
}
// Return status.
return (bStatus);
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONBatMonTemperatureGetDegC
#undef AONBatMonTemperatureGetDegC
#define AONBatMonTemperatureGetDegC ROM_AONBatMonTemperatureGetDegC
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_BATMON_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,180 +0,0 @@
/******************************************************************************
* Filename: aon_event.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON Event fabric.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_event.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONEventMcuWakeUpSet
#define AONEventMcuWakeUpSet NOROM_AONEventMcuWakeUpSet
#undef AONEventMcuWakeUpGet
#define AONEventMcuWakeUpGet NOROM_AONEventMcuWakeUpGet
#undef AONEventMcuSet
#define AONEventMcuSet NOROM_AONEventMcuSet
#undef AONEventMcuGet
#define AONEventMcuGet NOROM_AONEventMcuGet
#endif
//*****************************************************************************
//
// Select event source for the specified MCU wakeup programmable event
//
//*****************************************************************************
void
AONEventMcuWakeUpSet(uint32_t ui32MCUWUEvent, uint32_t ui32EventSrc)
{
uint32_t ui32Shift ;
uint32_t ui32Mask ;
uint32_t ui32RegAdr ;
// Check the arguments.
ASSERT(( ui32MCUWUEvent >= AON_EVENT_MCU_WU0 ) && ( ui32MCUWUEvent <= AON_EVENT_MCU_WU7 ))
ASSERT( ui32EventSrc <= AON_EVENT_NONE );
ui32Shift = (( ui32MCUWUEvent & 3 ) << 3 );
ui32Mask = ( 0x3F << ui32Shift );
ui32RegAdr = ( AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL );
if ( ui32MCUWUEvent > 3 ) {
ui32RegAdr += 4;
}
HWREG( ui32RegAdr ) = ( HWREG( ui32RegAdr ) & ( ~ui32Mask )) | ( ui32EventSrc << ui32Shift );
}
//*****************************************************************************
//
// Get event source for the specified MCU wakeup programmable event
//
//*****************************************************************************
uint32_t
AONEventMcuWakeUpGet(uint32_t ui32MCUWUEvent)
{
uint32_t ui32Shift ;
uint32_t ui32RegAdr ;
// Check the arguments.
ASSERT(( ui32MCUWUEvent >= AON_EVENT_MCU_WU0 ) && ( ui32MCUWUEvent <= AON_EVENT_MCU_WU7 ))
ui32Shift = (( ui32MCUWUEvent & 3 ) << 3 );
ui32RegAdr = ( AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL );
if ( ui32MCUWUEvent > 3 ) {
ui32RegAdr += 4;
}
return (( HWREG( ui32RegAdr ) >> ui32Shift ) & 0x3F );
}
//*****************************************************************************
//
// Select event source for the specified programmable event forwarded to the
// MCU event fabric
//
//*****************************************************************************
void
AONEventMcuSet(uint32_t ui32MCUEvent, uint32_t ui32EventSrc)
{
uint32_t ui32Ctrl;
// Check the arguments.
ASSERT((ui32MCUEvent == AON_EVENT_MCU_EVENT0) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT1) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT2));
ASSERT(ui32EventSrc <= AON_EVENT_NONE);
ui32Ctrl = HWREG(AON_EVENT_BASE + AON_EVENT_O_EVTOMCUSEL);
if(ui32MCUEvent == AON_EVENT_MCU_EVENT0)
{
ui32Ctrl &= ~(AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_S;
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT1)
{
ui32Ctrl &= ~(AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_S;
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT2)
{
ui32Ctrl &= ~(AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_S;
}
HWREG(AON_EVENT_BASE + AON_EVENT_O_EVTOMCUSEL) = ui32Ctrl;
}
//*****************************************************************************
//
// Get source for the specified programmable event forwarded to the MCU event
// fabric.
//
//*****************************************************************************
uint32_t
AONEventMcuGet(uint32_t ui32MCUEvent)
{
uint32_t ui32EventSrc;
// Check the arguments.
ASSERT((ui32MCUEvent == AON_EVENT_MCU_EVENT0) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT1) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT2));
ui32EventSrc = HWREG(AON_EVENT_BASE + AON_EVENT_O_EVTOMCUSEL);
if(ui32MCUEvent == AON_EVENT_MCU_EVENT0)
{
return((ui32EventSrc & AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_M) >>
AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_S);
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT1)
{
return((ui32EventSrc & AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_M) >>
AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_S);
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT2)
{
return((ui32EventSrc & AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_M) >>
AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_S);
}
// Should never get to this statement, but suppress warning.
ASSERT(0);
return(0);
}
@@ -1,564 +0,0 @@
/******************************************************************************
* Filename: aon_event.h
* Revised: 2017-08-09 16:56:05 +0200 (Wed, 09 Aug 2017)
* Revision: 49506
*
* Description: Defines and prototypes for the AON Event fabric.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonevent_api
//! @{
//
//*****************************************************************************
#ifndef __AON_EVENT_H__
#define __AON_EVENT_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_event.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONEventMcuWakeUpSet NOROM_AONEventMcuWakeUpSet
#define AONEventMcuWakeUpGet NOROM_AONEventMcuWakeUpGet
#define AONEventMcuSet NOROM_AONEventMcuSet
#define AONEventMcuGet NOROM_AONEventMcuGet
#endif
//*****************************************************************************
//
// Event sources for the event AON fabric.
// Note: Events are level-triggered active high
//
//*****************************************************************************
#define AON_EVENT_IOEV_MCU_WU 0 // Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
#define AON_EVENT_AUX_TIMER2_EV0 1 // Event 0 from AUX Timer2
#define AON_EVENT_AUX_TIMER2_EV1 2 // Event 1 from AUX Timer2
#define AON_EVENT_AUX_TIMER2_EV2 3 // Event 2 from AUX Timer2
#define AON_EVENT_AUX_TIMER2_EV3 4 // Event 3 from AUX Timer2
#define AON_EVENT_BATMON_BATT_UL 5 // BATMON event: Battery level above upper limit
#define AON_EVENT_BATMON_BATT_LL 6 // BATMON event: Battery level below lower limit
#define AON_EVENT_BATMON_TEMP_UL 7 // BATMON event: Temperature level above upper limit
#define AON_EVENT_BATMON_TEMP_LL 8 // BATMON event: Temperature level below lower limit
#define AON_EVENT_BATMON_COMBINED 9 // Combined event from BATMON
#define AON_EVENT_IO 32 // Edge detect on any DIO. Edge detect is enabled and configured in IOC.
// Event ID 33 is reserved for future use
// Event ID 34 is reserved for future use
#define AON_EVENT_RTC_CH0 35 // RTC channel 0
#define AON_EVENT_RTC_CH1 36 // RTC channel 1
#define AON_EVENT_RTC_CH2 37 // RTC channel 2
#define AON_EVENT_RTC_CH0_DLY 38 // RTC channel 0 - delayed event
#define AON_EVENT_RTC_CH1_DLY 39 // RTC channel 1 - delayed event
#define AON_EVENT_RTC_CH2_DLY 40 // RTC channel 2 - delayed event
#define AON_EVENT_RTC_COMB_DLY 41 // RTC combined delayed event
#define AON_EVENT_RTC_UPD 42 // RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
#define AON_EVENT_JTAG 43 // JTAG generated event
#define AON_EVENT_AUX_SWEV0 44 // AUX Software triggered event #0
#define AON_EVENT_AUX_SWEV1 45 // AUX Software triggered event #1
#define AON_EVENT_AUX_SWEV2 46 // AUX Software triggered event #2
#define AON_EVENT_AUX_COMPA 47 // Comparator A triggered (synchronized in AUX)
#define AON_EVENT_AUX_COMPB 48 // Comparator B triggered (synchronized in AUX)
#define AON_EVENT_AUX_ADC_DONE 49 // ADC conversion completed
#define AON_EVENT_AUX_TDC_DONE 50 // TDC completed or timed out
#define AON_EVENT_AUX_TIMER0_EV 51 // Timer 0 event
#define AON_EVENT_AUX_TIMER1_EV 52 // Timer 1 event
#define AON_EVENT_BATMON_TEMP 53 // BATMON temperature update event
#define AON_EVENT_BATMON_VOLT 54 // BATMON voltage update event
#define AON_EVENT_AUX_COMPB_ASYNC 55 // Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
#define AON_EVENT_AUX_COMPB_ASYNC_N 56 // Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
// Event ID 57-62 is reserved for future use
#define AON_EVENT_NONE 63 // No event, always low
// Keeping backward compatibility until major revision number is incremented
#define AON_EVENT_RTC0 ( AON_EVENT_RTC_CH0 )
//*****************************************************************************
//
// Values that can be passed to AONEventMCUWakeUpSet() and returned
// by AONEventMCUWakeUpGet().
//
//*****************************************************************************
#define AON_EVENT_MCU_WU0 0 // Programmable MCU wake-up event 0
#define AON_EVENT_MCU_WU1 1 // Programmable MCU wake-up event 1
#define AON_EVENT_MCU_WU2 2 // Programmable MCU wake-up event 2
#define AON_EVENT_MCU_WU3 3 // Programmable MCU wake-up event 3
#define AON_EVENT_MCU_WU4 4 // Programmable MCU wake-up event 4
#define AON_EVENT_MCU_WU5 5 // Programmable MCU wake-up event 5
#define AON_EVENT_MCU_WU6 6 // Programmable MCU wake-up event 6
#define AON_EVENT_MCU_WU7 7 // Programmable MCU wake-up event 7
//*****************************************************************************
//
// Values that can be passed to AONEventMcuSet() and AONEventMcuGet()
//
//*****************************************************************************
#define AON_EVENT_MCU_EVENT0 0 // Programmable event source fed to MCU event fabric (first of 3)
#define AON_EVENT_MCU_EVENT1 1 // Programmable event source fed to MCU event fabric (second of 3)
#define AON_EVENT_MCU_EVENT2 2 // Programmable event source fed to MCU event fabric (third of 3)
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Select event source for the specified MCU wake-up programmable event.
//!
//! The AON event fabric has several programmable events that can wake up the MCU.
//!
//! \note The programmable event sources are effectively OR'ed together
//! to form a single wake-up event.
//!
//! \param ui32MCUWUEvent is one of the programmable MCU wake-up event sources.
//! - \ref AON_EVENT_MCU_WU0
//! - \ref AON_EVENT_MCU_WU1
//! - \ref AON_EVENT_MCU_WU2
//! - \ref AON_EVENT_MCU_WU3
//! - \ref AON_EVENT_MCU_WU4
//! - \ref AON_EVENT_MCU_WU5
//! - \ref AON_EVENT_MCU_WU6
//! - \ref AON_EVENT_MCU_WU7
//! \param ui32EventSrc is an event source for the event AON fabric.
//! - \ref AON_EVENT_IOEV_MCU_WU : Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
//! - \ref AON_EVENT_AUX_TIMER2_EV0 : Event 0 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV1 : Event 1 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV2 : Event 2 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV3 : Event 3 from AUX Timer2
//! - \ref AON_EVENT_BATMON_BATT_UL : BATMON event: Battery level above upper limit
//! - \ref AON_EVENT_BATMON_BATT_LL : BATMON event: Battery level below lower limit
//! - \ref AON_EVENT_BATMON_TEMP_UL : BATMON event: Temperature level above upper limit
//! - \ref AON_EVENT_BATMON_TEMP_LL : BATMON event: Temperature level below lower limit
//! - \ref AON_EVENT_BATMON_COMBINED : Combined event from BATMON
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventMcuWakeUpGet()
//
//*****************************************************************************
extern void AONEventMcuWakeUpSet(uint32_t ui32MCUWUEvent,
uint32_t ui32EventSrc);
//*****************************************************************************
//
//! \brief Get event source for the specified MCU wake-up programmable event.
//!
//! \param ui32MCUWUEvent is one of the programmable MCU wake-up event sources.
//! - \ref AON_EVENT_MCU_WU0
//! - \ref AON_EVENT_MCU_WU1
//! - \ref AON_EVENT_MCU_WU2
//! - \ref AON_EVENT_MCU_WU3
//! - \ref AON_EVENT_MCU_WU4
//! - \ref AON_EVENT_MCU_WU5
//! - \ref AON_EVENT_MCU_WU6
//! - \ref AON_EVENT_MCU_WU7
//!
//! \return Returns the event source for the event AON fabric.
//! - \ref AON_EVENT_IOEV_MCU_WU : Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
//! - \ref AON_EVENT_AUX_TIMER2_EV0 : Event 0 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV1 : Event 1 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV2 : Event 2 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV3 : Event 3 from AUX Timer2
//! - \ref AON_EVENT_BATMON_BATT_UL : BATMON event: Battery level above upper limit
//! - \ref AON_EVENT_BATMON_BATT_LL : BATMON event: Battery level below lower limit
//! - \ref AON_EVENT_BATMON_TEMP_UL : BATMON event: Temperature level above upper limit
//! - \ref AON_EVENT_BATMON_TEMP_LL : BATMON event: Temperature level below lower limit
//! - \ref AON_EVENT_BATMON_COMBINED : Combined event from BATMON
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventMcuWakeUpSet()
//
//*****************************************************************************
extern uint32_t AONEventMcuWakeUpGet(uint32_t ui32MCUWUEvent);
//*****************************************************************************
//
//! \brief Select event source for the specified programmable event forwarded to the
//! MCU event fabric.
//!
//! The AON event fabric has a total of three programmable events that can
//! be forwarded to the MCU event fabric.
//!
//! \note The three programmable event sources are forwarded to the MCU Event
//! Fabric as:
//! - AON_PROG0
//! - AON_PROG1
//! - AON_PROG2
//!
//! \param ui32MCUEvent is one of three programmable events forwarded to the
//! MCU event fabric.
//! - \ref AON_EVENT_MCU_EVENT0
//! - \ref AON_EVENT_MCU_EVENT1
//! - \ref AON_EVENT_MCU_EVENT2
//! \param ui32EventSrc is an event source for the event AON fabric.
//! - \ref AON_EVENT_IOEV_MCU_WU : Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
//! - \ref AON_EVENT_AUX_TIMER2_EV0 : Event 0 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV1 : Event 1 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV2 : Event 2 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV3 : Event 3 from AUX Timer2
//! - \ref AON_EVENT_BATMON_BATT_UL : BATMON event: Battery level above upper limit
//! - \ref AON_EVENT_BATMON_BATT_LL : BATMON event: Battery level below lower limit
//! - \ref AON_EVENT_BATMON_TEMP_UL : BATMON event: Temperature level above upper limit
//! - \ref AON_EVENT_BATMON_TEMP_LL : BATMON event: Temperature level below lower limit
//! - \ref AON_EVENT_BATMON_COMBINED : Combined event from BATMON
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventMcuGet()
//
//*****************************************************************************
extern void AONEventMcuSet(uint32_t ui32MCUEvent, uint32_t ui32EventSrc);
//*****************************************************************************
//
//! \brief Get source for the specified programmable event forwarded to the MCU event
//! fabric.
//!
//! The AON event fabric has a total of three programmable events that can
//! be forwarded to the MCU event fabric.
//!
//! \param ui32MCUEvent is one of three programmable events forwarded to the
//! MCU event fabric.
//! - \ref AON_EVENT_MCU_EVENT0
//! - \ref AON_EVENT_MCU_EVENT1
//! - \ref AON_EVENT_MCU_EVENT2
//!
//! \return Returns the event source for the event AON fabric.
//! - \ref AON_EVENT_IOEV_MCU_WU : Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
//! - \ref AON_EVENT_AUX_TIMER2_EV0 : Event 0 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV1 : Event 1 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV2 : Event 2 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV3 : Event 3 from AUX Timer2
//! - \ref AON_EVENT_BATMON_BATT_UL : BATMON event: Battery level above upper limit
//! - \ref AON_EVENT_BATMON_BATT_LL : BATMON event: Battery level below lower limit
//! - \ref AON_EVENT_BATMON_TEMP_UL : BATMON event: Temperature level above upper limit
//! - \ref AON_EVENT_BATMON_TEMP_LL : BATMON event: Temperature level below lower limit
//! - \ref AON_EVENT_BATMON_COMBINED : Combined event from BATMON
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventMcuSet()
//
//*****************************************************************************
extern uint32_t AONEventMcuGet(uint32_t ui32MCUEvent);
//*****************************************************************************
//
//! \brief Select event source forwarded to AON Real Time Clock (RTC).
//!
//! A programmable event can be forwarded to the AON real time clock
//! for triggering a capture event on RTC channel 1.
//!
//! \param ui32EventSrc is an event source for the event AON fabric.
//! - \ref AON_EVENT_IOEV_MCU_WU : Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
//! - \ref AON_EVENT_AUX_TIMER2_EV0 : Event 0 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV1 : Event 1 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV2 : Event 2 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV3 : Event 3 from AUX Timer2
//! - \ref AON_EVENT_BATMON_BATT_UL : BATMON event: Battery level above upper limit
//! - \ref AON_EVENT_BATMON_BATT_LL : BATMON event: Battery level below lower limit
//! - \ref AON_EVENT_BATMON_TEMP_UL : BATMON event: Temperature level above upper limit
//! - \ref AON_EVENT_BATMON_TEMP_LL : BATMON event: Temperature level below lower limit
//! - \ref AON_EVENT_BATMON_COMBINED : Combined event from BATMON
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventRtcGet()
//
//*****************************************************************************
__STATIC_INLINE void
AONEventRtcSet(uint32_t ui32EventSrc)
{
uint32_t ui32Ctrl;
// Check the arguments.
ASSERT(ui32EventSrc <= AON_EVENT_NONE);
ui32Ctrl = HWREG(AON_EVENT_BASE + AON_EVENT_O_RTCSEL);
ui32Ctrl &= ~(AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_S;
HWREG(AON_EVENT_BASE + AON_EVENT_O_RTCSEL) = ui32Ctrl;
}
//*****************************************************************************
//
//! \brief Get event source forwarded to AON Real Time Clock (RTC).
//!
//! A programmable event can be forwarded to the AON real time clock
//! for triggering a capture event on RTC channel 1.
//!
//! \return Returns the event source to the event AON fabric.
//! - \ref AON_EVENT_IOEV_MCU_WU : Edge detect event from DIOs which have enabled contribution to IOEV_MCU_WU
//! - \ref AON_EVENT_AUX_TIMER2_EV0 : Event 0 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV1 : Event 1 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV2 : Event 2 from AUX Timer2
//! - \ref AON_EVENT_AUX_TIMER2_EV3 : Event 3 from AUX Timer2
//! - \ref AON_EVENT_BATMON_BATT_UL : BATMON event: Battery level above upper limit
//! - \ref AON_EVENT_BATMON_BATT_LL : BATMON event: Battery level below lower limit
//! - \ref AON_EVENT_BATMON_TEMP_UL : BATMON event: Temperature level above upper limit
//! - \ref AON_EVENT_BATMON_TEMP_LL : BATMON event: Temperature level below lower limit
//! - \ref AON_EVENT_BATMON_COMBINED : Combined event from BATMON
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventRtcSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONEventRtcGet(void)
{
uint32_t ui32EventSrc;
// Return the active event.
ui32EventSrc = HWREG(AON_EVENT_BASE + AON_EVENT_O_RTCSEL);
return ((ui32EventSrc & AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_M) >>
AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_S);
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONEventMcuWakeUpSet
#undef AONEventMcuWakeUpSet
#define AONEventMcuWakeUpSet ROM_AONEventMcuWakeUpSet
#endif
#ifdef ROM_AONEventMcuWakeUpGet
#undef AONEventMcuWakeUpGet
#define AONEventMcuWakeUpGet ROM_AONEventMcuWakeUpGet
#endif
#ifdef ROM_AONEventMcuSet
#undef AONEventMcuSet
#define AONEventMcuSet ROM_AONEventMcuSet
#endif
#ifdef ROM_AONEventMcuGet
#undef AONEventMcuGet
#define AONEventMcuGet ROM_AONEventMcuGet
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_EVENT_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,58 +0,0 @@
/******************************************************************************
* Filename: aon_event_doc.h
* Revised: 2017-08-09 16:56:05 +0200 (Wed, 09 Aug 2017)
* Revision: 49506
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonevent_api
//! @{
//! \section sec_aonevent Introduction
//!
//! The event fabric consists of two event modules. One in the MCU power domain (MCU event fabric) and
//! the other in the AON power domain (AON event fabric). The MCU event fabric is one of the subscribers
//! to the AON event fabric. For more information on MCU event fabric, see [MCU event API](@ref event_api).
//!
//! The AON event fabric is a configurable combinatorial router between AON event sources and event
//! subscribers in both AON and MCU domains. The API to control the AON event fabric configuration
//! can be grouped based on the event subscriber to configure:
//!
//! - Wake-up events.
//! - MCU wake-up event
//! - @ref AONEventMcuWakeUpSet()
//! - @ref AONEventMcuWakeUpGet()
//! - AON RTC receives a single programmable event line from the AON event fabric. For more information, see [AON RTC API](@ref aonrtc_api).
//! - @ref AONEventRtcSet()
//! - @ref AONEventRtcGet()
//! - MCU event fabric receives a number of programmable event lines from the AON event fabric. For more information, see [MCU event API](@ref event_api).
//! - @ref AONEventMcuSet()
//! - @ref AONEventMcuGet()
//! @}
@@ -1,39 +0,0 @@
/******************************************************************************
* Filename: aon_ioc.c
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Driver for the AON IO Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_ioc.h"
-292
View File
@@ -1,292 +0,0 @@
/******************************************************************************
* Filename: aon_ioc.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the AON IO Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonioc_api
//! @{
//
//*****************************************************************************
#ifndef __AON_IOC_H__
#define __AON_IOC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_ioc.h"
#include "debug.h"
//*****************************************************************************
//
// Defines for the drive strength
//
//*****************************************************************************
#define AONIOC_DRV_STR_1 0x00000000 // Lowest drive strength
#define AONIOC_DRV_STR_2 0x00000001
#define AONIOC_DRV_STR_3 0x00000003
#define AONIOC_DRV_STR_4 0x00000002
#define AONIOC_DRV_STR_5 0x00000006
#define AONIOC_DRV_STR_6 0x00000007
#define AONIOC_DRV_STR_7 0x00000005
#define AONIOC_DRV_STR_8 0x00000004 // Highest drive strength
#define AONIOC_DRV_LVL_MIN (AON_IOC_O_IOSTRMIN)
#define AONIOC_DRV_LVL_MED (AON_IOC_O_IOSTRMED)
#define AONIOC_DRV_LVL_MAX (AON_IOC_O_IOSTRMAX)
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Configure drive strength values for the manual drive strength options.
//!
//! This function defines the general drive strength settings for the non-AUTO
//! drive strength options in the MCU IOC. Consequently, if all IOs are using the
//! automatic drive strength option this function has no effect.
//!
//! Changing the drive strength values affects all current modes (Low-Current,
//! High-Current, and Extended-Current). Current mode for individual IOs is set in
//! MCU IOC by \ref IOCIODrvStrengthSet().
//!
//! \note Values are Gray encoded. Simply incrementing values to increase drive
//! strength will not work.
//!
//! \param ui32DriveLevel
//! - \ref AONIOC_DRV_LVL_MIN : Minimum drive strength option. Default value is selected
//! to give minimum 2/4/8 mA @3.3V for Low-Current mode, High-Current mode,
//! and Extended-Current mode respectively.
//! - \ref AONIOC_DRV_LVL_MED : Medium drive strength option. Default value is selected
//! to give minimum 2/4/8 mA @2.5V for Low-Current mode, High-Current mode,
//! and Extended-Current mode respectively.
//! - \ref AONIOC_DRV_LVL_MAX : Maximum drive strength option. Default value is selected
//! to give minimum 2/4/8 mA @1.8V for Low-Current mode, High-Current mode,
//! and Extended-Current mode respectively.
//! \param ui32DriveStrength sets the value used by IOs configured as non-AUTO drive strength in MCU IOC.
//! - \ref AONIOC_DRV_STR_1 : Lowest drive strength
//! - \ref AONIOC_DRV_STR_2
//! - \ref AONIOC_DRV_STR_3
//! - \ref AONIOC_DRV_STR_4
//! - \ref AONIOC_DRV_STR_5
//! - \ref AONIOC_DRV_STR_6
//! - \ref AONIOC_DRV_STR_7
//! - \ref AONIOC_DRV_STR_8 : Highest drive strength
//!
//! \return None
//!
//! \sa \ref AONIOCDriveStrengthGet(), \ref IOCIODrvStrengthSet()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOCDriveStrengthSet(uint32_t ui32DriveLevel, uint32_t ui32DriveStrength)
{
ASSERT((ui32DriveLevel == AONIOC_DRV_LVL_MIN) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MED) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MAX));
ASSERT((ui32DriveStrength == AONIOC_DRV_STR_1) ||
(ui32DriveStrength == AONIOC_DRV_STR_2) ||
(ui32DriveStrength == AONIOC_DRV_STR_3) ||
(ui32DriveStrength == AONIOC_DRV_STR_4) ||
(ui32DriveStrength == AONIOC_DRV_STR_5) ||
(ui32DriveStrength == AONIOC_DRV_STR_6) ||
(ui32DriveStrength == AONIOC_DRV_STR_7) ||
(ui32DriveStrength == AONIOC_DRV_STR_8));
// Set the drive strength.
HWREG(AON_IOC_BASE + ui32DriveLevel) = ui32DriveStrength;
}
//*****************************************************************************
//
//! \brief Get a specific drive level setting for all IOs.
//!
//! Use this function to read the drive strength setting for a specific
//! IO drive level.
//!
//! \note Values are Gray encoded.
//!
//! \param ui32DriveLevel is the specific drive level to get the setting for.
//! - \ref AONIOC_DRV_LVL_MIN : Minimum drive strength option.
//! - \ref AONIOC_DRV_LVL_MED : Medium drive strength option.
//! - \ref AONIOC_DRV_LVL_MAX : Maximum drive strength option.
//!
//! \return Returns the requested drive strength level setting for all IOs.
//! Possible values are:
//! - \ref AONIOC_DRV_STR_1 : Lowest drive strength
//! - \ref AONIOC_DRV_STR_2
//! - \ref AONIOC_DRV_STR_3
//! - \ref AONIOC_DRV_STR_4
//! - \ref AONIOC_DRV_STR_5
//! - \ref AONIOC_DRV_STR_6
//! - \ref AONIOC_DRV_STR_7
//! - \ref AONIOC_DRV_STR_8 : Highest drive strength
//!
//! \sa AONIOCDriveStrengthSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONIOCDriveStrengthGet(uint32_t ui32DriveLevel)
{
// Check the arguments.
ASSERT((ui32DriveLevel == AONIOC_DRV_LVL_MIN) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MED) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MAX));
// Return the drive strength value.
return( HWREG(AON_IOC_BASE + ui32DriveLevel) );
}
//*****************************************************************************
//
//! \brief Freeze the IOs.
//!
//! To retain the values of the output IOs during a powerdown/shutdown of the
//! device all IO latches in the AON domain should be frozen in their current
//! state. This ensures that software can regain control of the IOs after a
//! reboot without the IOs first falling back to the default values (i.e. input
//! and no pull).
//!
//! \return None
//!
//! \sa AONIOCFreezeDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOCFreezeEnable(void)
{
// Set the AON IO latches as static.
HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = 0x0;
}
//*****************************************************************************
//
//! \brief Un-freeze the IOs.
//!
//! When rebooting the chip after it has entered powerdown/shutdown mode, the
//! software can regain control of the IOs by setting the IO latches as
//! transparent. The IOs should not be unfrozen before software has restored
//! the functionality of the IO.
//!
//! \return None
//!
//! \sa AONIOCFreezeEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOCFreezeDisable(void)
{
// Set the AON IOC latches as transparent.
HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = AON_IOC_IOCLATCH_EN;
}
//*****************************************************************************
//
//! \brief Disable the 32kHz clock output.
//!
//! When outputting a 32 kHz clock on an IO, the output enable/disable functionality
//! in the IOC is bypassed. Therefore, the programmer needs to call this
//! function to disable the clock output.
//!
//! \return None
//!
//! \sa AONIOC32kHzOutputEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOC32kHzOutputDisable(void)
{
// Disable the LF clock output.
HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = AON_IOC_CLK32KCTL_OE_N;
}
//*****************************************************************************
//
//! \brief Enable the 32kHz clock output.
//!
//! When outputting a 32 kHz clock on an IO, the output enable/disable functionality
//! in the IOC is bypassed. Therefore, the programmer needs to call this
//! function to enable the clock output.
//!
//! \return None
//!
//! \sa AONIOC32kHzOutputDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOC32kHzOutputEnable(void)
{
// Enable the LF clock output.
HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = 0x0;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_IOC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,65 +0,0 @@
/******************************************************************************
* Filename: aon_ioc_doc.h
* Revised: 2016-03-30 11:01:30 +0200 (Wed, 30 Mar 2016)
* Revision: 45969
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonioc_api
//! @{
//! \section sec_aonioc Introduction
//!
//! The Input/Output Controller (IOC) controls the functionality of the pins (called DIO).
//! The IOC consists of two APIs:
//! - MCU IOC API selects which peripheral module is connected to the individual DIO and thus allowed to control it.
//! It also controls individual drive strength, slew rate, pull-up/pull-down, edge detection, etc.
//! - AON IOC API controls the general drive strength definitions, IO latches, and if the LF clock is
//! routed to a DIO for external use.
//!
//! For more information on the MCU IOC see the [IOC API](\ref ioc_api).
//!
//! \section sec_aonioc_api API
//!
//! The API functions can be grouped like this:
//!
//! Freeze IOs while MCU domain is powered down:
//! - \ref AONIOCFreezeEnable()
//! - \ref AONIOCFreezeDisable()
//!
//! Output LF clock to a DIO:
//! - \ref AONIOC32kHzOutputEnable()
//! - \ref AONIOC32kHzOutputDisable()
//!
//! Configure the value of drive strength for the three manual MCU IOC settings (MIN, MED, MAX):
//! - \ref AONIOCDriveStrengthSet()
//! - \ref AONIOCDriveStrengthGet()
//!
//! @}
@@ -1,41 +0,0 @@
/******************************************************************************
* Filename: aon_pmctl.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON Power-Management Controller.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_pmctl.h"
// See aon_pmctl.h for implementation
@@ -1,201 +0,0 @@
/******************************************************************************
* Filename: aon_pmctl.h
* Revised: 2017-11-02 14:16:14 +0100 (Thu, 02 Nov 2017)
* Revision: 50156
*
* Description: Defines and prototypes for the AON Power-Management Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonpmctl_api
//! @{
//
//*****************************************************************************
#ifndef __AON_PMCTL_H__
#define __AON_PMCTL_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_pmctl.h"
#include "debug.h"
//*****************************************************************************
//
// Defines that can be be used to enable/disable the retention on the SRAM
// banks during power off of the MCU BUS domain. The defines can be passed to
// AONPMCTLMcuSRamConfig) .
//
//*****************************************************************************
#define MCU_RAM_RET_NONE AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_NONE
#define MCU_RAM_RET_LVL1 AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL1
#define MCU_RAM_RET_LVL2 AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL2
#define MCU_RAM_RET_LVL3 AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL3
#define MCU_RAM_RET_FULL AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_FULL
//*****************************************************************************
//
// Defines for all the different power modes available through
// AONPMCTLPowerStatusGet() .
//
//*****************************************************************************
#define AONPMCTL_JTAG_POWER_ON AON_PMCTL_PWRSTAT_JTAG_PD_ON
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Configure the retention on the block SRAM in the MCU BUS domain.
//!
//! MCU SRAM is partitioned into 5 banks of 16 KB each. The SRAM supports
//! retention on all 5 banks during MCU BUS domain power off. The retention
//! on the SRAM can be turned on and off. Use this function to enable the
//! retention on the banks.
//!
//! If a group of banks is not represented in the parameter \c ui32Retention
//! then the retention will be disabled for that bank group during MCU BUS
//! domain power off.
//!
//! \note Retention on all SRAM banks is enabled by default. Configuration of
//! individual SRAM banks is not supported. Configuration is only supported
//! on bank group level.
//!
//! \param ui32Retention defines which groups of SRAM banks to enable/disable
//! retention on:
//! - \ref MCU_RAM_RET_NONE Retention is disabled
//! - \ref MCU_RAM_RET_LVL1 Retention on for banks 0 and 1
//! - \ref MCU_RAM_RET_LVL2 Retention on for banks 0, 1 and 2
//! - \ref MCU_RAM_RET_LVL3 Retention on for banks 0, 1, 2 and 3
//! - \ref MCU_RAM_RET_FULL Retention on for all five banks
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONPMCTLMcuSRamRetConfig(uint32_t ui32Retention)
{
uint32_t ui32Reg;
// Check the arguments.
ASSERT((ui32Retention == MCU_RAM_RET_NONE) ||
(ui32Retention == MCU_RAM_RET_LVL1) ||
(ui32Retention == MCU_RAM_RET_LVL2) ||
(ui32Retention == MCU_RAM_RET_LVL3) ||
(ui32Retention == MCU_RAM_RET_FULL));
// Configure the retention.
ui32Reg = HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_M;
ui32Reg |= ui32Retention;
HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) = ui32Reg;
}
//*****************************************************************************
//
//! \brief Get the power status of the Always On (AON) domain.
//!
//! This function reports the power management status in AON.
//!
//! \return Returns the current power status of the device as a bitwise OR'ed
//! combination of these values:
//! - \ref AONPMCTL_JTAG_POWER_ON
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONPMCTLPowerStatusGet(void)
{
// Return the power status.
return (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT));
}
//*****************************************************************************
//
//! \brief Request power off of the JTAG domain.
//!
//! The JTAG domain is automatically powered up on if a debugger is connected.
//! If a debugger is not connected this function can be used to power off the
//! JTAG domain.
//!
//! \note Achieving the lowest power modes (shutdown/powerdown) requires the
//! JTAG domain to be turned off. In general the JTAG domain should never be
//! powered in production code.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONPMCTLJtagPowerOff(void)
{
// Request the power off of the JTAG domain
HWREG(AON_PMCTL_BASE + AON_PMCTL_O_JTAGCFG) = 0;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_PMCTL_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,99 +0,0 @@
/******************************************************************************
* Filename: aon_pmctl_doc.h
* Revised: 2017-11-02 15:41:14 +0100 (Thu, 02 Nov 2017)
* Revision: 50165
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonpmctl_api
//! @{
//! \section sec_aonpmctl Introduction
//!
//! This API provides a set of functions for using the AON Power Management
//! Controller module (AON_PMCTL).
//!
//! The AON_PMCTL module contains the following functional options:
//! - Selection of voltage regulator for the digital domain.
//! - Control of retention of MCU SRAM banks during power off of the BUS power domain.
//! - Control of power and retention of AUX SRAM.
//! - Control of power, reset, and clock for the following domains:
//! - MCU_VD
//! - JTAG_PD
//! - AUX
//! - Control of the recharging of VDDR while in uLDO state.
//! - Control of the generation of a periodic request to the OSCDIG to initiate
//! an XOSC_HF amplitude calibration sequence.
//!
//! The main clock for the AON_PMCTL module is the 2 MHz SCLK MF clock.
//!
//! AON_PMCTL supports the MCU_voltage domain with a 48 MHz clock (SCLK_HF) that is divided
//! and gated by the PRCM module before being distributed to all modules in the
//! MCU voltage domain.
//!
//! The AON_PMCTL controls the SCLK_HF clock to ensure that it is available in the
//! Active and Idle power modes, and disabled for all other modes. SCLK_HF is not
//! allowed in uLDO state since it uses too much power.
//! The SCLK_HF clock is also available for the AUX module in the Active and Idle
//! power modes.
//!
//! The AON_PMCTL selects the clock source for the AUX domain in the different
//! power modes.
//!
//! Main functionality to control power management of the JTAG power domain is
//! supported. Note that no clock control is supported, as the JTAG is clocked
//! on the TCK clock.
//!
//!
//! \section sec_aonpmctl_api API
//!
//! The API functions can be grouped like this:
//!
//! Functions to perform status report:
//! - \ref AONPMCTLPowerStatusGet()
//!
//!
//! Functions to perform device configuration:
//! - \ref AONPMCTLJtagPowerOff()
//! - \ref AONPMCTLMcuSRamRetConfig()
//!
//! Please note that due to legacy software compatibility some functionalities controlled
//! by the AON Power Management Controller module are supported through the APIs of
//! the [System Controller](@ref sysctrl_api) and [Power Controller](@ref pwrctrl_api). Relevant functions are:
//! - \ref PowerCtrlSourceGet()
//! - \ref PowerCtrlSourceSet()
//! - \ref PowerCtrlResetSourceGet()
//! - \ref SysCtrl_DCDC_VoltageConditionalControl()
//! - \ref SysCtrlClockLossResetDisable()
//! - \ref SysCtrlClockLossResetEnable()
//! - \ref SysCtrlSystemReset()
//! - \ref SysCtrlResetSourceGet()
//!
//! @}
@@ -1,77 +0,0 @@
/******************************************************************************
* Filename: aon_rtc.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON RTC.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_rtc.h"
#include "cpu.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONRTCCurrent64BitValueGet
#define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
#endif
//*****************************************************************************
//
// Get the current 64-bit value of the RTC counter.
//
//*****************************************************************************
uint64_t
AONRTCCurrent64BitValueGet( void )
{
union {
uint64_t returnValue ;
uint32_t secAndSubSec[ 2 ] ;
} currentRtc ;
uint32_t ui32SecondSecRead ;
// Reading SEC both before and after SUBSEC in order to detect if SEC incremented while reading SUBSEC
// If SEC incremented, we can't be sure which SEC the SUBSEC belongs to, so repeating the sequence then.
do {
currentRtc.secAndSubSec[ 1 ] = HWREG( AON_RTC_BASE + AON_RTC_O_SEC );
currentRtc.secAndSubSec[ 0 ] = HWREG( AON_RTC_BASE + AON_RTC_O_SUBSEC );
ui32SecondSecRead = HWREG( AON_RTC_BASE + AON_RTC_O_SEC );
} while ( currentRtc.secAndSubSec[ 1 ] != ui32SecondSecRead );
return ( currentRtc.returnValue );
}
-931
View File
@@ -1,931 +0,0 @@
/******************************************************************************
* Filename: aon_rtc.h
* Revised: 2017-08-16 15:13:43 +0200 (Wed, 16 Aug 2017)
* Revision: 49593
*
* Description: Defines and prototypes for the AON RTC
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonrtc_api
//! @{
//
//*****************************************************************************
#ifndef __AON_RTC_H__
#define __AON_RTC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_rtc.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
#endif
//*****************************************************************************
//
// Values that can be passed to most of the AON_RTC APIs as the ui32Channel
// parameter.
//
//*****************************************************************************
#define AON_RTC_CH_NONE 0x0 // RTC No channel
#define AON_RTC_CH0 0x1 // RTC Channel 0
#define AON_RTC_CH1 0x2 // RTC Channel 1
#define AON_RTC_CH2 0x4 // RTC Channel 2
#define AON_RTC_ACTIVE 0x8 // RTC Active
//*****************************************************************************
//
// Values that can be passed to AONRTCConfigDelay as the ui32Delay parameter.
//
//*****************************************************************************
#define AON_RTC_CONFIG_DELAY_NODELAY 0 // NO DELAY
#define AON_RTC_CONFIG_DELAY_1 1 // Delay of 1 clk cycle
#define AON_RTC_CONFIG_DELAY_2 2 // Delay of 2 clk cycles
#define AON_RTC_CONFIG_DELAY_4 3 // Delay of 4 clk cycles
#define AON_RTC_CONFIG_DELAY_8 4 // Delay of 8 clk cycles
#define AON_RTC_CONFIG_DELAY_16 5 // Delay of 16 clk cycles
#define AON_RTC_CONFIG_DELAY_32 6 // Delay of 32 clk cycles
#define AON_RTC_CONFIG_DELAY_48 7 // Delay of 48 clk cycles
#define AON_RTC_CONFIG_DELAY_64 8 // Delay of 64 clk cycles
#define AON_RTC_CONFIG_DELAY_80 9 // Delay of 80 clk cycles
#define AON_RTC_CONFIG_DELAY_96 10 // Delay of 96 clk cycles
#define AON_RTC_CONFIG_DELAY_112 11 // Delay of 112 clk cycles
#define AON_RTC_CONFIG_DELAY_128 12 // Delay of 128 clk cycles
#define AON_RTC_CONFIG_DELAY_144 13 // Delay of 144 clk cycles
//*****************************************************************************
//
// Values that can be passed to AONRTCSetModeCH1 as the ui32Mode
// parameter.
//
//*****************************************************************************
#define AON_RTC_MODE_CH1_CAPTURE 1 // Capture mode
#define AON_RTC_MODE_CH1_COMPARE 0 // Compare Mode
//*****************************************************************************
//
// Values that can be passed to AONRTCSetModeCH2 as the ui32Mode
// parameter.
//
//*****************************************************************************
#define AON_RTC_MODE_CH2_CONTINUOUS 1 // Continuous mode
#define AON_RTC_MODE_CH2_NORMALCOMPARE 0 // Normal compare mode
//*****************************************************************************
//
// Mutliplication factor for converting from seconds to corresponding time in
// the "CompareValue" format.
// The factor correspond to the compare value format described in the registers
// \ref AON_RTC_O_CH0CMP, \ref AON_RTC_O_CH1CMP and \ref AON_RTC_O_CH2CMP.
// Example1:
// 4 milliseconds in CompareValue format can be written like this:
// ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT ))
// Example2:
// 4 seconds in CompareValue format can be written like this:
// ( 4 * FACTOR_SEC_TO_COMP_VAL_FORMAT )
//
//*****************************************************************************
#define FACTOR_SEC_TO_COMP_VAL_FORMAT 0x00010000
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enable the RTC.
//!
//! Enable the AON Real Time Clock.
//!
//! \note Event generation for each of the three channels must also be enabled
//! using the function AONRTCChannelEnable().
//!
//! \return None
//!
//! \sa AONRTCChannelEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCEnable(void)
{
// Enable RTC.
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1;
}
//*****************************************************************************
//
//! \brief Disable the RTC.
//!
//! Disable the AON Real Time Clock.
//!
//! \note Event generation for each of the three channels can also be disabled
//! using the function AONRTCChannelDisable().
//!
//! \return None
//!
//! \sa AONRTCChannelDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCDisable(void)
{
// Disable RTC
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0;
}
//*****************************************************************************
//
//! \brief Reset the RTC.
//!
//! Reset the AON Real Time Clock.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCReset(void)
{
// Reset RTC.
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1;
}
//*****************************************************************************
//
//! \brief Check if the RTC is active (enabled).
//!
//! \return Returns the status of the RTC.
//! - false : RTC is disabled
//! - true : RTC is enabled
//
//*****************************************************************************
__STATIC_INLINE bool
AONRTCActive(void)
{
// Read if RTC is enabled
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN));
}
//*****************************************************************************
//
//! \brief Check if an RTC channel is active (enabled).
//!
//! \param ui32Channel specifies the RTC channel to check status of.
//! Parameter must be one (and only one) of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return Returns the status of the requested channel:
//! - false : Channel is disabled
//! - true : Channel is enabled
//
//*****************************************************************************
__STATIC_INLINE bool
AONRTCChannelActive(uint32_t ui32Channel)
{
uint32_t uint32Status = 0;
if(ui32Channel & AON_RTC_CH0)
{
uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN);
}
if(ui32Channel & AON_RTC_CH1)
{
uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN);
}
if(ui32Channel & AON_RTC_CH2)
{
uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN);
}
return(uint32Status);
}
//*****************************************************************************
//
//! \brief Configure Event Delay for the RTC.
//!
//! Each event from the three individual channels can generate a delayed
//! event. The delay time for these events is set using this function.
//! The delay is measured in clock cycles.
//!
//! \note There is only one delay setting shared for all three channels.
//!
//! \param ui32Delay specifies the delay time for delayed events.
//! Parameter must be one of the following:
//! - \ref AON_RTC_CONFIG_DELAY_NODELAY
//! - \ref AON_RTC_CONFIG_DELAY_1
//! - \ref AON_RTC_CONFIG_DELAY_2
//! - \ref AON_RTC_CONFIG_DELAY_4
//! - \ref AON_RTC_CONFIG_DELAY_8
//! - \ref AON_RTC_CONFIG_DELAY_16
//! - \ref AON_RTC_CONFIG_DELAY_32
//! - \ref AON_RTC_CONFIG_DELAY_48
//! - \ref AON_RTC_CONFIG_DELAY_64
//! - \ref AON_RTC_CONFIG_DELAY_80
//! - \ref AON_RTC_CONFIG_DELAY_96
//! - \ref AON_RTC_CONFIG_DELAY_112
//! - \ref AON_RTC_CONFIG_DELAY_128
//! - \ref AON_RTC_CONFIG_DELAY_144
//!
//! \return None.
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCDelayConfig(uint32_t ui32Delay)
{
uint32_t ui32Cfg;
// Check the arguments.
ASSERT(ui32Delay <= AON_RTC_CONFIG_DELAY_144);
ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
ui32Cfg &= ~(AON_RTC_CTL_EV_DELAY_M);
ui32Cfg |= (ui32Delay << AON_RTC_CTL_EV_DELAY_S);
HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
}
//*****************************************************************************
//
//! \brief Configure the source of the combined event.
//!
//! A combined delayed event can be generated from a combination of the three
//! delayed events. Delayed events form the specified channels are OR'ed
//! together to generate the combined event.
//!
//! \param ui32Channels specifies the channels that are to be used for
//! generating the combined event.
//! The parameter must be the bitwise OR of any of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//! - \ref AON_RTC_CH_NONE
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCCombinedEventConfig(uint32_t ui32Channels)
{
uint32_t ui32Cfg;
// Check the arguments.
ASSERT( (ui32Channels & (AON_RTC_CH0 | AON_RTC_CH1 | AON_RTC_CH2)) ||
(ui32Channels == AON_RTC_CH_NONE) );
ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
ui32Cfg &= ~(AON_RTC_CTL_COMB_EV_MASK_M);
ui32Cfg |= (ui32Channels << AON_RTC_CTL_COMB_EV_MASK_S);
HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
}
//*****************************************************************************
//
//! \brief Clear event from a specified channel.
//!
//! In case of an active event from the specified channel, the event
//! will be cleared (de-asserted).
//!
//! \param ui32Channel clears the event from one or more RTC channels:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCEventClear(uint32_t ui32Channel)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH0;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH1;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH2;
}
}
//*****************************************************************************
//
//! \brief Get event status for a specified channel.
//!
//! In case of an active event from the specified channel,
//! this call will return \c true otherwise \c false.
//!
//! \param ui32Channel specifies the channel from which to query the event state.
//! The parameter must be one (and only one) of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return Returns \c true if an event has occurred for the given channel,
//! otherwise \c false.
//
//*****************************************************************************
__STATIC_INLINE bool
AONRTCEventGet(uint32_t ui32Channel)
{
uint32_t uint32Event = 0;
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH0_BITN);
}
if(ui32Channel & AON_RTC_CH1)
{
uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH1_BITN);
}
if(ui32Channel & AON_RTC_CH2)
{
uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH2_BITN);
}
return(uint32Event);
}
//*****************************************************************************
//
//! \brief Get integer part (seconds) of RTC free-running timer.
//!
//! Get the value in seconds of RTC free-running timer, i.e. the integer part.
//! The fractional part is returned from a call to AONRTCFractionGet().
//!
//! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
//! of this function if the <16.16> format is sufficient.
//!
//! \note To read a consistent pair of integer and fractional parts,
//! \ref AONRTCSecGet() must be called first to trigger latching of the
//! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
//! must be disabled to ensure that these operations are performed atomically.
//!
//! \return Returns the integer part of RTC free running timer.
//!
//! \sa \ref AONRTCFractionGet() \ref AONRTCCurrentCompareValueGet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCSecGet(void)
{
// The following read gets the seconds, but also latches the fractional
// part.
return(HWREG(AON_RTC_BASE + AON_RTC_O_SEC));
}
//*****************************************************************************
//
//! \brief Get fractional part (sub-seconds) of RTC free-running timer.
//!
//! Get the value of the fractional part of RTC free-running timer, i.e. the
//! sub-second part.
//!
//! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
//! of this function if the <16.16> format is sufficient.
//!
//! \note To read a consistent pair of integer and fractional parts,
//! \ref AONRTCSecGet() must be called first to trigger latching of the
//! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
//! must be disabled to ensure that these operations are performed atomically.
//!
//! \return Returns the fractional part of RTC free running timer.
//!
//! \sa \ref AONRTCSecGet() \ref AONRTCCurrentCompareValueGet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCFractionGet(void)
{
// Note1: It is recommended to use AON RTCCurrentCompareValueGet() instead
// of this function if the <16.16> format is sufficient.
// Note2: AONRTCSecGet() must be called before this function to get a
// consistent reading.
// Note3: Interrupts must be disabled between the call to AONRTCSecGet() and this
// call since there are interrupt functions that reads AON_RTC_O_SEC
return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSEC));
}
//*****************************************************************************
//
//! \brief Get the sub second increment of the RTC.
//!
//! Get the value of the sub-second increment which is added to the RTC
//! absolute time on every clock tick.
//!
//! \note For a precise and temperature independent LF clock (e.g. an LF XTAL)
//! this value would stay the same across temperature. For temperatue
//! dependent clock sources like an RC oscillator, this value will change
//! over time if the application includes functionality for doing temperature
//! compensation of the RTC clock source. The default value corresponds to a
//! LF clock frequency of exactly 32.768 kHz.
//!
//! \return Returns the sub-second increment of the RTC added to the overall
//! value on every RTC clock tick.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCSubSecIncrGet(void)
{
return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSECINC));
}
//*****************************************************************************
//
//! \brief Set operational mode of channel 1.
//!
//! Set the operational mode of channel 1. It can be capture or compare mode.
//! In capture mode, an external event causes the value of the free running
//! counter to be stored, to remember the time of the event.
//!
//! \note The default mode is compare.
//!
//! \param ui32Mode specifies the mode for channel 1.
//! The parameter must be one of the following:
//! - \ref AON_RTC_MODE_CH1_CAPTURE
//! - \ref AON_RTC_MODE_CH1_COMPARE
//!
//! \return None
//!
//! \sa AONRTCModeCh1Get()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCModeCh1Set(uint32_t ui32Mode)
{
// Check the arguments.
ASSERT((ui32Mode == AON_RTC_MODE_CH1_CAPTURE) ||
(ui32Mode == AON_RTC_MODE_CH1_COMPARE));
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN) = ui32Mode;
}
//*****************************************************************************
//
//! \brief Get operational mode of channel 1.
//!
//! Get the operational mode of channel 1. It can be capture or compare mode.
//! In capture mode, an external event causes the value of the free running
//! counter to be stored, to remember the time of the event.
//!
//! \return Returns the operational mode of channel 1, one of:
//! - \ref AON_RTC_MODE_CH1_CAPTURE
//! - \ref AON_RTC_MODE_CH1_COMPARE
//!
//! \sa AONRTCModeCh1Set()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCModeCh1Get(void)
{
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN));
}
//*****************************************************************************
//
//! \brief Set operational mode of channel 2.
//!
//! Set the operational mode of channel 2. It can be in continuous compare
//! mode or normal compare mode.
//! In continuous mode, a value is automatically incremented to the channel 2
//! compare register, upon a channel 2 compare event. This allows channel 2 to
//! generate a series of completely equidistant events.
//! The increment value is set by the AONRTCIncValueCh2Set() call.
//!
//! \note The default mode is normal compare.
//!
//! \param ui32Mode specifies the mode for channel 2.
//! The parameter must be one of the following:
//! - \ref AON_RTC_MODE_CH2_CONTINUOUS
//! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
//!
//! \return None
//!
//! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCModeCh2Set(uint32_t ui32Mode)
{
// Check the arguments.
ASSERT((ui32Mode == AON_RTC_MODE_CH2_CONTINUOUS) ||
(ui32Mode == AON_RTC_MODE_CH2_NORMALCOMPARE));
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN) = ui32Mode;
}
//*****************************************************************************
//
//! \brief Get operational mode of channel 2.
//!
//! Get the operational mode of channel 2. It can be in continuous compare
//! mode or normal compare mode.
//! In continuous mode, a value is automatically incremented to the channel 2
//! compare register, upon a channel 2 compare event. This allows channel 2 to
//! generate a series of completely equidistant events.
//! The increment value is set by the AONRTCIncValueCh2Set() call.
//!
//! \return Returns the operational mode of channel 2, i.e. one of:
//! - \ref AON_RTC_MODE_CH2_CONTINUOUS
//! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
//!
//! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCModeCh2Get(void)
{
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN));
}
//*****************************************************************************
//
//! \brief Enable event operation for the specified channel.
//!
//! Enable the event generation for the specified channel.
//!
//! \note The RTC free running clock must also be enabled globally using the
//! AONRTCEnable() call.
//!
//! \param ui32Channel specifies one or more channels to enable:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return None
//!
//! \sa AONRTCEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCChannelEnable(uint32_t ui32Channel)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 1;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 1;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 1;
}
}
//*****************************************************************************
//
//! \brief Disable event operation for the specified channel.
//!
//! Disable the event generation for the specified channel.
//!
//! \note The RTC free running clock can also be disabled globally using the
//! AONRTCDisable() call.
//!
//! \param ui32Channel specifies one or more channels to disable:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return None
//!
//! \sa AONRTCDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCChannelDisable(uint32_t ui32Channel)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 0;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 0;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 0;
}
}
//*****************************************************************************
//
//! \brief Set the compare value for the given channel.
//!
//! Set compare value for the specified channel.
//!
//! The format of the compare value is a 16 bit integer and 16 bit fractional
//! format <16 sec.16 subsec>. The current value of the RTC counter
//! can be retrieved in a format compatible to the compare register using
//! \ref AONRTCCurrentCompareValueGet()
//!
//! \param ui32Channel specifies one or more channels to set compare value for:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//! \param ui32CompValue is the compare value to set for the specified channel.
//! - Format: <16 sec.16 subsec>
//!
//! \return None
//!
//! \sa AONRTCCurrentCompareValueGet()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCCompareValueSet(uint32_t ui32Channel, uint32_t ui32CompValue)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP) = ui32CompValue;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP) = ui32CompValue;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP) = ui32CompValue;
}
}
//*****************************************************************************
//
//! \brief Get the compare value for the given channel.
//!
//! Get compare value for the specified channel.
//!
//! \param ui32Channel specifies a channel.
//! The parameter must be one (and only one) of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return Returns the stored compare value for the given channel.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCCompareValueGet(uint32_t ui32Channel)
{
uint32_t ui32Value = 0;
// Check the arguments
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP);
}
if(ui32Channel & AON_RTC_CH1)
{
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP);
}
if(ui32Channel & AON_RTC_CH2)
{
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP);
}
return(ui32Value);
}
//*****************************************************************************
//
//! \brief Get the current value of the RTC counter in a format that matches
//! RTC compare values.
//!
//! The compare value registers contains 16 integer and 16 fractional bits.
//! This function will return the current value of the RTC counter in an
//! identical format.
//!
//! \return Returns the current value of the RTC counter in a <16.16> format
//! (SEC[15:0].SUBSEC[31:16]).
//!
//! \sa \ref AONRTCCompareValueSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCCurrentCompareValueGet( void )
{
return ( HWREG( AON_RTC_BASE + AON_RTC_O_TIME ));
}
//*****************************************************************************
//
//! \brief Get the current 64-bit value of the RTC counter.
//!
//! \note Reading SEC both before and after SUBSEC in order to detect if SEC
//! incremented while reading SUBSEC. If SEC incremented, we can't be sure
//! which SEC the SUBSEC belongs to, so repeating the sequence then.
//!
//! \return Returns the current value of the RTC counter in a 64-bits format
//! (SEC[31:0].SUBSEC[31:0]).
//
//*****************************************************************************
extern uint64_t AONRTCCurrent64BitValueGet(void);
//*****************************************************************************
//
//! \brief Set the channel 2 increment value when operating in continuous mode.
//!
//! Set the channel 2 increment value when operating in continuous mode.
//! The specified value is automatically incremented to the channel 2 compare
//! register, upon a channel 2 compare event. This allows channel 2 to generate
//! a series of completely equidistant events.
//!
//! \param ui32IncValue is the increment value when operating in continuous mode.
//!
//! \return None
//!
//! \sa AONRTCIncValueCh2Get()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCIncValueCh2Set(uint32_t ui32IncValue)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC) = ui32IncValue;
}
//*****************************************************************************
//
//! \brief Get the channel2 increment value when operating in continuous mode.
//!
//! Get the channel 2 increment value, when channel 2 is operating in
//! continuous mode.
//! This value is automatically incremented to the channel 2 compare
//! register, upon a channel 2 compare event. This allows channel 2 to
//! generate a series of completely equidistant events.
//!
//! \return Returns the channel 2 increment value when operating in continuous
//! mode.
//!
//! \sa AONRTCIncValueCh2Set()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCIncValueCh2Get(void)
{
return(HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC));
}
//*****************************************************************************
//
//! \brief Get the channel 1 capture value.
//!
//! Get the channel 1 capture value.
//! The upper 16 bits of the returned value is the lower 16 bits of the
//! integer part of the RTC timer. The lower 16 bits of the returned part
//! is the upper 16 bits of the fractional part.
//!
//! \return Returns the channel 1 capture value.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCCaptureValueCh1Get(void)
{
return(HWREG(AON_RTC_BASE + AON_RTC_O_CH1CAPT));
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONRTCCurrent64BitValueGet
#undef AONRTCCurrent64BitValueGet
#define AONRTCCurrent64BitValueGet ROM_AONRTCCurrent64BitValueGet
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_RTC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,41 +0,0 @@
/******************************************************************************
* Filename: aon_rtc_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonrtc_api
//! @{
//! \section sec_aonrtc Introduction
//!
//! \note If using TI-RTOS then only TI-RTOS is allowed to configure the RTC timer!
//! @}
-337
View File
@@ -1,337 +0,0 @@
/******************************************************************************
* Filename: aux_adc.c
* Revised: 2017-11-20 14:31:35 +0100 (Mon, 20 Nov 2017)
* Revision: 50315
*
* Description: Driver for the AUX Time to Digital Converter interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_adc.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_sysif.h"
#include "../inc/hw_fcfg1.h"
#include "adi.h"
#include "event.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXADCDisable
#define AUXADCDisable NOROM_AUXADCDisable
#undef AUXADCEnableAsync
#define AUXADCEnableAsync NOROM_AUXADCEnableAsync
#undef AUXADCEnableSync
#define AUXADCEnableSync NOROM_AUXADCEnableSync
#undef AUXADCDisableInputScaling
#define AUXADCDisableInputScaling NOROM_AUXADCDisableInputScaling
#undef AUXADCFlushFifo
#define AUXADCFlushFifo NOROM_AUXADCFlushFifo
#undef AUXADCReadFifo
#define AUXADCReadFifo NOROM_AUXADCReadFifo
#undef AUXADCPopFifo
#define AUXADCPopFifo NOROM_AUXADCPopFifo
#undef AUXADCGetAdjustmentGain
#define AUXADCGetAdjustmentGain NOROM_AUXADCGetAdjustmentGain
#undef AUXADCGetAdjustmentOffset
#define AUXADCGetAdjustmentOffset NOROM_AUXADCGetAdjustmentOffset
#undef AUXADCValueToMicrovolts
#define AUXADCValueToMicrovolts NOROM_AUXADCValueToMicrovolts
#undef AUXADCMicrovoltsToValue
#define AUXADCMicrovoltsToValue NOROM_AUXADCMicrovoltsToValue
#undef AUXADCAdjustValueForGainAndOffset
#define AUXADCAdjustValueForGainAndOffset NOROM_AUXADCAdjustValueForGainAndOffset
#undef AUXADCUnadjustValueForGainAndOffset
#define AUXADCUnadjustValueForGainAndOffset NOROM_AUXADCUnadjustValueForGainAndOffset
#endif
//*****************************************************************************
//
// Disables the ADC
//
//*****************************************************************************
void
AUXADCDisable(void)
{
// Disable the ADC reference
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, ADI_4_AUX_ADCREF0_EN_M | ADI_4_AUX_ADCREF0_REF_ON_IDLE_M | ADI_4_AUX_ADCREF0_SRC_M);
// Assert reset and disable the ADC
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M | ADI_4_AUX_ADC0_SMPL_MODE_M | ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M);
// Ensure that scaling is enabled by default before next use of the ADC
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);
// Flush the FIFO before disabling the clocks
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3)
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1)
// Disable the ADC clock (no need to wait since IOB_WUC_ADCCLKCTL_ACK goes low immediately)
HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = 0;
// Disable the ADC data interface
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = 0;
}
//*****************************************************************************
//
// Enables the ADC for asynchronous operation
//
//*****************************************************************************
void
AUXADCEnableAsync(uint32_t refSource, uint32_t trigger)
{
// Enable the ADC reference, with the following options:
// - SRC: Set when using relative reference
// - REF_ON_IDLE: Always cleared since there is no idle state in asynchronous operation
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, refSource | ADI_4_AUX_ADCREF0_EN_M);
// Enable the ADC clock
HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M;
while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M));
// Enable the ADC data interface
if (trigger == AUXADC_TRIGGER_MANUAL) {
// Manual trigger: No need to configure event routing from GPT
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCTL_CMD_EN;
} else {
// GPT trigger: Configure event routing via MCU_EV to the AUX domain
HWREG(EVENT_BASE + EVENT_O_AUXSEL0) = trigger;
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_CMD_EN;
}
// Configure the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_SMPL_MODE_M);
// Release reset and enable the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}
//*****************************************************************************
//
// Enables the ADC for synchronous operation
//
//*****************************************************************************
void
AUXADCEnableSync(uint32_t refSource, uint32_t sampleTime, uint32_t trigger)
{
// Enable the ADC reference, with the following options:
// - SRC: Set when using relative reference
// - REF_ON_IDLE: Set when using fixed reference and sample time < 21.3 us
uint8_t adcref0 = refSource | ADI_4_AUX_ADCREF0_EN_M;
if (!refSource && (sampleTime < AUXADC_SAMPLE_TIME_21P3_US)) {
adcref0 |= ADI_4_AUX_ADCREF0_REF_ON_IDLE_M;
}
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, adcref0);
// Enable the ADC clock
HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = AUX_SYSIF_ADCCLKCTL_REQ_M;
while (!(HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) & AUX_SYSIF_ADCCLKCTL_ACK_M));
// Enable the ADC data interface
if (trigger == AUXADC_TRIGGER_MANUAL) {
// Manual trigger: No need to configure event routing from GPT
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT | AUX_ANAIF_ADCCTL_CMD_EN;
} else {
// GPT trigger: Configure event routing via MCU_EV to the AUX domain
HWREG(EVENT_BASE + EVENT_O_AUXSEL0) = trigger;
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_CMD_EN;
}
// Configure the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, sampleTime << ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S);
// Release reset and enable the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}
//*****************************************************************************
//
// Disables scaling of the ADC input
//
//*****************************************************************************
void
AUXADCDisableInputScaling(void)
{
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);
}
//*****************************************************************************
//
// Flushes the ADC FIFO
//
//*****************************************************************************
void
AUXADCFlushFifo(void)
{
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3)
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1)
}
//*****************************************************************************
//
// Waits for and returns the first sample in the ADC FIFO
//
//*****************************************************************************
uint32_t
AUXADCReadFifo(void) {
// Wait until there is at least one sample in the FIFO
while (HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT) & AUX_ANAIF_ADCFIFOSTAT_EMPTY_M);
// Return the first sample from the FIFO
return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO);
}
//*****************************************************************************
//
// Returns the first sample in the ADC FIFO, without waiting
//
//*****************************************************************************
uint32_t
AUXADCPopFifo(void) {
// Return the first sample from the FIFO. If the FIFO is empty, this
// generates ADC FIFO underflow
return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO);
}
//*****************************************************************************
//
// Returns the gain value used when adjusting for ADC gain/offset
//
//*****************************************************************************
int32_t
AUXADCGetAdjustmentGain(uint32_t refSource)
{
int32_t gain;
if (refSource == AUXADC_REF_FIXED) {
// AUXADC_REF_FIXED ==> ABS_GAIN
gain = (HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_ABS_GAIN) & FCFG1_SOC_ADC_ABS_GAIN_SOC_ADC_ABS_GAIN_TEMP1_M) >> FCFG1_SOC_ADC_ABS_GAIN_SOC_ADC_ABS_GAIN_TEMP1_S;
} else {
// AUXADC_REF_VDDS_REL ==> REL_GAIN
gain = (HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_REL_GAIN) & FCFG1_SOC_ADC_REL_GAIN_SOC_ADC_REL_GAIN_TEMP1_M) >> FCFG1_SOC_ADC_REL_GAIN_SOC_ADC_REL_GAIN_TEMP1_S;
}
return gain;
}
//*****************************************************************************
//
// Returns the offset value used when adjusting for ADC gain/offset
//
//*****************************************************************************
int32_t
AUXADCGetAdjustmentOffset(uint32_t refSource)
{
int8_t offset;
if ( refSource == AUXADC_REF_FIXED ) {
// AUXADC_REF_FIXED ==> ABS_OFFSET
offset = HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_OFFSET_INT) >> FCFG1_SOC_ADC_OFFSET_INT_SOC_ADC_ABS_OFFSET_TEMP1_S;
} else {
// AUXADC_REF_VDDS_REL ==> REL_OFFSET
offset = HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_OFFSET_INT) >> FCFG1_SOC_ADC_OFFSET_INT_SOC_ADC_REL_OFFSET_TEMP1_S;
}
return offset;
}
//*****************************************************************************
//
// Converts an "ideal" ADC value to microvolts
//
//*****************************************************************************
int32_t
AUXADCValueToMicrovolts(int32_t fixedRefVoltage, int32_t adcValue)
{
// Chop off 4 bits during calculations to avoid 32-bit overflow
fixedRefVoltage >>= 4;
return (((adcValue * fixedRefVoltage) + 2047) / 4095) << 4;
}
//*****************************************************************************
//
// Converts a number of microvolts to corresponding "ideal" ADC value
//
//*****************************************************************************
int32_t
AUXADCMicrovoltsToValue(int32_t fixedRefVoltage, int32_t microvolts)
{
// Chop off 4 bits during calculations to avoid 32-bit overflow
fixedRefVoltage >>= 4;
microvolts >>= 4;
return ((microvolts * 4095) + (fixedRefVoltage / 2)) / fixedRefVoltage;
}
//*****************************************************************************
//
// Performs ADC value gain and offset adjustment
//
//*****************************************************************************
int32_t
AUXADCAdjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset)
{
// Apply gain and offset adjustment
adcValue = (((adcValue + offset) * gain) + 16384) / 32768;
// Saturate
if (adcValue < 0) {
return 0;
} else if (adcValue > 4095) {
return 4095;
} else {
return adcValue;
}
}
//*****************************************************************************
//
// Performs the inverse of the ADC value gain and offset adjustment
//
//*****************************************************************************
int32_t
AUXADCUnadjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset)
{
// Apply inverse gain and offset adjustment
adcValue = (((adcValue * 32768) + (gain / 2)) / gain) - offset;
// Saturate
if (adcValue < 0) {
return 0;
} else if (adcValue > 4095) {
return 4095;
} else {
return adcValue;
}
}
-599
View File
@@ -1,599 +0,0 @@
/******************************************************************************
* Filename: aux_adc.h
* Revised: 2018-02-07 09:45:39 +0100 (Wed, 07 Feb 2018)
* Revision: 51437
*
* Description: Defines and prototypes for the AUX Analog-to-Digital
* Converter
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxadc_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_ADC_H__
#define __AUX_ADC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_event.h"
#include "../inc/hw_adi.h"
#include "../inc/hw_adi_4_aux.h"
#include "../inc/hw_aux_anaif.h"
#include "rom.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXADCDisable NOROM_AUXADCDisable
#define AUXADCEnableAsync NOROM_AUXADCEnableAsync
#define AUXADCEnableSync NOROM_AUXADCEnableSync
#define AUXADCDisableInputScaling NOROM_AUXADCDisableInputScaling
#define AUXADCFlushFifo NOROM_AUXADCFlushFifo
#define AUXADCReadFifo NOROM_AUXADCReadFifo
#define AUXADCPopFifo NOROM_AUXADCPopFifo
#define AUXADCGetAdjustmentGain NOROM_AUXADCGetAdjustmentGain
#define AUXADCGetAdjustmentOffset NOROM_AUXADCGetAdjustmentOffset
#define AUXADCValueToMicrovolts NOROM_AUXADCValueToMicrovolts
#define AUXADCMicrovoltsToValue NOROM_AUXADCMicrovoltsToValue
#define AUXADCAdjustValueForGainAndOffset NOROM_AUXADCAdjustValueForGainAndOffset
#define AUXADCUnadjustValueForGainAndOffset NOROM_AUXADCUnadjustValueForGainAndOffset
#endif
//*****************************************************************************
//
// Defines for ADC reference sources.
//
//*****************************************************************************
#define AUXADC_REF_FIXED (0 << ADI_4_AUX_ADCREF0_SRC_S)
#define AUXADC_REF_VDDS_REL (1 << ADI_4_AUX_ADCREF0_SRC_S)
//*****************************************************************************
//
// Defines for the ADC FIFO status bits.
//
//*****************************************************************************
#define AUXADC_FIFO_EMPTY_M (AUX_ANAIF_ADCFIFOSTAT_EMPTY_M)
#define AUXADC_FIFO_ALMOST_FULL_M (AUX_ANAIF_ADCFIFOSTAT_ALMOST_FULL_M)
#define AUXADC_FIFO_FULL_M (AUX_ANAIF_ADCFIFOSTAT_FULL_M)
#define AUXADC_FIFO_UNDERFLOW_M (AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_M)
#define AUXADC_FIFO_OVERFLOW_M (AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_M)
//*****************************************************************************
//
// Defines for supported ADC triggers.
//
//*****************************************************************************
#define AUXADC_TRIGGER_MANUAL (EVENT_AUXSEL0_EV_NONE)
#define AUXADC_TRIGGER_GPT0A (EVENT_AUXSEL0_EV_GPT0A)
#define AUXADC_TRIGGER_GPT0B (EVENT_AUXSEL0_EV_GPT0B)
#define AUXADC_TRIGGER_GPT1A (EVENT_AUXSEL0_EV_GPT1A)
#define AUXADC_TRIGGER_GPT1B (EVENT_AUXSEL0_EV_GPT1B)
#define AUXADC_TRIGGER_GPT2A (EVENT_AUXSEL0_EV_GPT2A)
#define AUXADC_TRIGGER_GPT2B (EVENT_AUXSEL0_EV_GPT2B)
#define AUXADC_TRIGGER_GPT3A (EVENT_AUXSEL0_EV_GPT3A)
#define AUXADC_TRIGGER_GPT3B (EVENT_AUXSEL0_EV_GPT3B)
// Additional triggers specific for cc26x2 and cc13x2 devices
#define AUXADC_TRIGGER_GPT0A_CMP (EVENT_AUXSEL0_EV_GPT0A_CMP)
#define AUXADC_TRIGGER_GPT0B_CMP (EVENT_AUXSEL0_EV_GPT0B_CMP)
#define AUXADC_TRIGGER_GPT1A_CMP (EVENT_AUXSEL0_EV_GPT1A_CMP)
#define AUXADC_TRIGGER_GPT1B_CMP (EVENT_AUXSEL0_EV_GPT1B_CMP)
#define AUXADC_TRIGGER_GPT2A_CMP (EVENT_AUXSEL0_EV_GPT2A_CMP)
#define AUXADC_TRIGGER_GPT2B_CMP (EVENT_AUXSEL0_EV_GPT2B_CMP)
#define AUXADC_TRIGGER_GPT3A_CMP (EVENT_AUXSEL0_EV_GPT3A_CMP)
#define AUXADC_TRIGGER_GPT3B_CMP (EVENT_AUXSEL0_EV_GPT3B_CMP)
//*****************************************************************************
//
// Defines for ADC sampling type for synchronous operation.
//
//*****************************************************************************
#define AUXADC_SAMPLE_TIME_2P7_US 3
#define AUXADC_SAMPLE_TIME_5P3_US 4
#define AUXADC_SAMPLE_TIME_10P6_US 5
#define AUXADC_SAMPLE_TIME_21P3_US 6
#define AUXADC_SAMPLE_TIME_42P6_US 7
#define AUXADC_SAMPLE_TIME_85P3_US 8
#define AUXADC_SAMPLE_TIME_170_US 9
#define AUXADC_SAMPLE_TIME_341_US 10
#define AUXADC_SAMPLE_TIME_682_US 11
#define AUXADC_SAMPLE_TIME_1P37_MS 12
#define AUXADC_SAMPLE_TIME_2P73_MS 13
#define AUXADC_SAMPLE_TIME_5P46_MS 14
#define AUXADC_SAMPLE_TIME_10P9_MS 15
//*****************************************************************************
//
// Equivalent voltages for fixed ADC reference, in microvolts.
//
//*****************************************************************************
#define AUXADC_FIXED_REF_VOLTAGE_NORMAL 4300000
#define AUXADC_FIXED_REF_VOLTAGE_UNSCALED 1478500
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Disables the ADC.
//!
//! This function must be called:
//! - Before re-enabling the ADC using \ref AUXADCEnableAsync() or
//! \ref AUXADCEnableSync()
//! - Before entering system standby
//
//*****************************************************************************
extern void AUXADCDisable(void);
//*****************************************************************************
//
//! \brief Enables the ADC for asynchronous operation.
//!
//! In asynchronous operation, the ADC samples continuously between
//! conversions.
//!
//! The ADC trigger starts the conversion. Note that the first conversion may
//! be invalid if the sampling period is too short.
//!
//! ADC input scaling is enabled by default after device reset, and is also re-
//! enabled by \ref AUXADCDisable(). To disable input scaling, call
//! \ref AUXADCDisableInputScaling() before calling \ref AUXADCEnableAsync().
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//! \param trigger
//! ADC conversion trigger:
//! - \ref AUXADC_TRIGGER_MANUAL
//! - \ref AUXADC_TRIGGER_GPT0A
//! - \ref AUXADC_TRIGGER_GPT0B
//! - \ref AUXADC_TRIGGER_GPT1A
//! - \ref AUXADC_TRIGGER_GPT1B
//! - \ref AUXADC_TRIGGER_GPT2A
//! - \ref AUXADC_TRIGGER_GPT2B
//! - \ref AUXADC_TRIGGER_GPT3A
//! - \ref AUXADC_TRIGGER_GPT3B
//
//*****************************************************************************
extern void AUXADCEnableAsync(uint32_t refSource, uint32_t trigger);
//*****************************************************************************
//
//! \brief Enables the ADC for synchronous operation.
//!
//! In synchronous operation, the ADC is idle between a conversion and
//! subsequent samplings.
//!
//! The ADC trigger starts sampling with specified duration, followed by the
//! conversion. Note that the first conversion may be invalid if the initial
//! sampling period is too short.
//!
//! ADC input scaling is enabled by default after device reset, and is also re-
//! enabled by \ref AUXADCDisable(). To disable input scaling, call
//! \ref AUXADCDisableInputScaling() before calling \ref AUXADCEnableSync().
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//! \param sampleTime
//! ADC sampling time:
//! - \ref AUXADC_SAMPLE_TIME_2P7_US
//! - \ref AUXADC_SAMPLE_TIME_5P3_US
//! - \ref AUXADC_SAMPLE_TIME_10P6_US
//! - \ref AUXADC_SAMPLE_TIME_21P3_US
//! - \ref AUXADC_SAMPLE_TIME_42P6_US
//! - \ref AUXADC_SAMPLE_TIME_85P3_US
//! - \ref AUXADC_SAMPLE_TIME_170_US
//! - \ref AUXADC_SAMPLE_TIME_341_US
//! - \ref AUXADC_SAMPLE_TIME_682_US
//! - \ref AUXADC_SAMPLE_TIME_1P37_MS
//! - \ref AUXADC_SAMPLE_TIME_2P73_MS
//! - \ref AUXADC_SAMPLE_TIME_5P46_MS
//! - \ref AUXADC_SAMPLE_TIME_10P9_MS
//! \param trigger
//! ADC conversion trigger:
//! - \ref AUXADC_TRIGGER_MANUAL
//! - \ref AUXADC_TRIGGER_GPT0A
//! - \ref AUXADC_TRIGGER_GPT0B
//! - \ref AUXADC_TRIGGER_GPT1A
//! - \ref AUXADC_TRIGGER_GPT1B
//! - \ref AUXADC_TRIGGER_GPT2A
//! - \ref AUXADC_TRIGGER_GPT2B
//! - \ref AUXADC_TRIGGER_GPT3A
//! - \ref AUXADC_TRIGGER_GPT3B
//
//*****************************************************************************
extern void AUXADCEnableSync(uint32_t refSource, uint32_t sampleTime, uint32_t trigger);
//*****************************************************************************
//
//! \brief Disables scaling of the ADC input.
//!
//! By default, the ADC operates internally on a version of the input signal
//! that has been scaled down by a factor <tt>1408 / 4095</tt>. This function
//! disables that scaling, allowing for a trade-off between dynamic range and
//! and resolution.
//!
//! \note This function must only be called while the ADC is disabled, before
//! calling \ref AUXADCEnableSync() or \ref AUXADCEnableAsync().
//! \note Different input maximum ratings apply when input scaling is disabled.
//! Violating these may damage the device.
//
//*****************************************************************************
extern void AUXADCDisableInputScaling(void);
//*****************************************************************************
//
//! \brief Flushes the ADC FIFO.
//!
//! This empties the FIFO and clears the underflow/overflow flags.
//!
//! Note: This function must only be called while the ADC is enabled.
//
//*****************************************************************************
extern void AUXADCFlushFifo(void);
//*****************************************************************************
//
//! \brief Generates a single manual ADC trigger.
//!
//! For synchronous mode, the trigger starts sampling followed by conversion.
//! For asynchronous mode, the trigger starts conversion.
//
//*****************************************************************************
__STATIC_INLINE void
AUXADCGenManualTrigger(void)
{
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCTRIG) = 0;
}
//*****************************************************************************
//
//! \brief Returns flags indicating the status of the ADC FIFO.
//!
//! The flags indicate FIFO empty, full and almost full, and whether
//! overflow/underflow has occurred.
//!
//! \return
//! A combination (bitwise OR) of the following flags:
//! - \ref AUXADC_FIFO_EMPTY_M
//! - \ref AUXADC_FIFO_ALMOST_FULL_M
//! - \ref AUXADC_FIFO_FULL_M
//! - \ref AUXADC_FIFO_UNDERFLOW_M
//! - \ref AUXADC_FIFO_OVERFLOW_M
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXADCGetFifoStatus(void)
{
return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT);
}
//*****************************************************************************
//
//! \brief Waits for and returns the first sample in the ADC FIFO.
//!
//! This function waits until there is at least one sample in the ADC FIFO. It
//! then pops and returns the first sample from the FIFO.
//!
//! \note This procedure will deadlock if called without setting up ADC trigger
//! generation in advance. The trigger can either be manual or periodical
//! (using a GPT).
//!
//! \return The first (12-bit) sample from the ADC FIFO
//
//*****************************************************************************
extern uint32_t AUXADCReadFifo(void);
//*****************************************************************************
//
//! \brief Returns the first sample in the ADC FIFO, without waiting.
//!
//! This function does not wait, and must only be called when there is at least
//! one sample in the ADC FIFO. Otherwise the call will generate FIFO underflow
//! (\ref AUXADC_FIFO_UNDERFLOW_M).
//!
//! \return The first (12-bit) sample from the ADC FIFO, or an undefined value
//! if the FIFO is empty
//
//*****************************************************************************
extern uint32_t AUXADCPopFifo(void);
//*****************************************************************************
//
//! \brief Selects internal or external input for the ADC.
//!
//! Note that calling this function also selects the same input for AUX_COMPB.
//!
//! \param input
//! Internal/external input selection:
//! - \ref ADC_COMPB_IN_DCOUPL
//! - \ref ADC_COMPB_IN_VSS
//! - \ref ADC_COMPB_IN_VDDS
//! - \ref ADC_COMPB_IN_AUXIO7
//! - \ref ADC_COMPB_IN_AUXIO6
//! - \ref ADC_COMPB_IN_AUXIO5
//! - \ref ADC_COMPB_IN_AUXIO4
//! - \ref ADC_COMPB_IN_AUXIO3
//! - \ref ADC_COMPB_IN_AUXIO2
//! - \ref ADC_COMPB_IN_AUXIO1
//! - \ref ADC_COMPB_IN_AUXIO0
//
//*****************************************************************************
__STATIC_INLINE void
AUXADCSelectInput(uint32_t input)
{
HapiSelectADCCompBInput(input);
}
//*****************************************************************************
//
//! \brief Returns the gain value used when adjusting for ADC gain/offset.
//!
//! The function returns the gain value to be used with
//! \ref AUXADCAdjustValueForGainAndOffset() or
//! \ref AUXADCUnadjustValueForGainAndOffset(). The gain value is found during
//! chip manufacturing and is stored in the factory configuration, FCFG1.
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//!
//! \return
//! The gain value to be used in adjustments
//
//*****************************************************************************
extern int32_t AUXADCGetAdjustmentGain(uint32_t refSource);
//*****************************************************************************
//
//! \brief Returns the offset value used when adjusting for ADC gain/offset.
//!
//! The function returns the offset value to be used with
//! \ref AUXADCAdjustValueForGainAndOffset() or
//! \ref AUXADCUnadjustValueForGainAndOffset(). The offset value is found
//! during chip manufacturing and is stored in the factory configuration,
//! FCFG1.
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//!
//! \return
//! The offset value to be used in adjustments
//
//*****************************************************************************
extern int32_t AUXADCGetAdjustmentOffset(uint32_t refSource);
//*****************************************************************************
//
//! \brief Converts an "adjusted" ADC value to microvolts.
//!
//! This function can only be used when measuring with fixed ADC reference
//! (\ref AUXADC_REF_FIXED). The specified reference voltage accounts for
//! whether the sampled ADC input is scaled down before conversion or not.
//!
//! \param fixedRefVoltage
//! Fixed reference voltage, in microvolts
//! - \ref AUXADC_FIXED_REF_VOLTAGE_NORMAL when using scaled input (normal)
//! - \ref AUXADC_FIXED_REF_VOLTAGE_UNSCALED when using unscaled input
//! \param adcValue
//! The ADC value
//!
//! \return
//! The corresponding number of microvolts
//
//*****************************************************************************
extern int32_t AUXADCValueToMicrovolts(int32_t fixedRefVoltage, int32_t adcValue);
//*****************************************************************************
//
//! \brief Converts a number of microvolts to corresponding "adjusted" ADC value.
//!
//! This function can only be used when measuring with fixed ADC reference
//! (\ref AUXADC_REF_FIXED). The specified reference voltage accounts for
//! whether the sampled ADC input is scaled down before conversion or not.
//!
//! \param fixedRefVoltage
//! Fixed reference voltage, in microvolts
//! - \ref AUXADC_FIXED_REF_VOLTAGE_NORMAL when using scaled input (normal)
//! - \ref AUXADC_FIXED_REF_VOLTAGE_UNSCALED when using unscaled input
//! \param microvolts
//! The number of microvolts
//!
//! \return
//! The corresponding expected ADC value (adjusted for ADC gain/offset)
//
//*****************************************************************************
extern int32_t AUXADCMicrovoltsToValue(int32_t fixedRefVoltage, int32_t microvolts);
//*****************************************************************************
//
//! \brief Performs ADC value gain and offset adjustment.
//!
//! This function takes a measured ADC value compensates for the internal gain
//! and offset in the ADC.
//!
//! \param adcValue
//! 12-bit ADC unadjusted value
//! \param gain
//! Gain adjustment value provided by \ref AUXADCGetAdjustmentGain()
//! \param offset
//! Offset adjustment value provided by \ref AUXADCGetAdjustmentOffset()
//!
//! \return
//! 12-bit ADC adjusted value
//
//*****************************************************************************
extern int32_t AUXADCAdjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset);
//*****************************************************************************
//
//! \brief Performs the inverse of the ADC value gain and offset adjustment.
//!
//! This function finds the expected measured ADC value, without gain and
//! offset compensation, for a given "ideal" ADC value. The function can for
//! example be used to find ADC value thresholds to be used in Sensor
//! Controller task configurations.
//!
//! \param adcValue
//! 12-bit ADC adjusted value
//! \param gain
//! Gain adjustment value provided by \ref AUXADCGetAdjustmentGain()
//! \param offset
//! Offset adjustment value provided by \ref AUXADCGetAdjustmentOffset()
//!
//! \return
//! 12-bit ADC unadjusted value
//
//*****************************************************************************
extern int32_t AUXADCUnadjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXADCDisable
#undef AUXADCDisable
#define AUXADCDisable ROM_AUXADCDisable
#endif
#ifdef ROM_AUXADCEnableAsync
#undef AUXADCEnableAsync
#define AUXADCEnableAsync ROM_AUXADCEnableAsync
#endif
#ifdef ROM_AUXADCEnableSync
#undef AUXADCEnableSync
#define AUXADCEnableSync ROM_AUXADCEnableSync
#endif
#ifdef ROM_AUXADCDisableInputScaling
#undef AUXADCDisableInputScaling
#define AUXADCDisableInputScaling ROM_AUXADCDisableInputScaling
#endif
#ifdef ROM_AUXADCFlushFifo
#undef AUXADCFlushFifo
#define AUXADCFlushFifo ROM_AUXADCFlushFifo
#endif
#ifdef ROM_AUXADCReadFifo
#undef AUXADCReadFifo
#define AUXADCReadFifo ROM_AUXADCReadFifo
#endif
#ifdef ROM_AUXADCPopFifo
#undef AUXADCPopFifo
#define AUXADCPopFifo ROM_AUXADCPopFifo
#endif
#ifdef ROM_AUXADCGetAdjustmentGain
#undef AUXADCGetAdjustmentGain
#define AUXADCGetAdjustmentGain ROM_AUXADCGetAdjustmentGain
#endif
#ifdef ROM_AUXADCGetAdjustmentOffset
#undef AUXADCGetAdjustmentOffset
#define AUXADCGetAdjustmentOffset ROM_AUXADCGetAdjustmentOffset
#endif
#ifdef ROM_AUXADCValueToMicrovolts
#undef AUXADCValueToMicrovolts
#define AUXADCValueToMicrovolts ROM_AUXADCValueToMicrovolts
#endif
#ifdef ROM_AUXADCMicrovoltsToValue
#undef AUXADCMicrovoltsToValue
#define AUXADCMicrovoltsToValue ROM_AUXADCMicrovoltsToValue
#endif
#ifdef ROM_AUXADCAdjustValueForGainAndOffset
#undef AUXADCAdjustValueForGainAndOffset
#define AUXADCAdjustValueForGainAndOffset ROM_AUXADCAdjustValueForGainAndOffset
#endif
#ifdef ROM_AUXADCUnadjustValueForGainAndOffset
#undef AUXADCUnadjustValueForGainAndOffset
#define AUXADCUnadjustValueForGainAndOffset ROM_AUXADCUnadjustValueForGainAndOffset
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_ADC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,41 +0,0 @@
/******************************************************************************
* Filename: aux_smph.c
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: Driver for the AUX Semaphore.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_smph.h"
// See aux_smph.h for implementation
@@ -1,258 +0,0 @@
/******************************************************************************
* Filename: aux_smph.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the AUX Semaphore
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxsmph_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_SMPH_H__
#define __AUX_SMPH_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_aux_smph.h"
#include "../inc/hw_memmap.h"
#include "debug.h"
//*****************************************************************************
//
// General constants and defines
//
//*****************************************************************************
#define AUX_SMPH_FREE 0x00000001 // MCU Semaphore has not been claimed
#define AUX_SMPH_CLAIMED 0x00000000 // MCU Semaphore has been claimed
//*****************************************************************************
//
// Values that can be passed to AUXSMPHAcquire and AUXSMPHRelease
// as the ui32Semaphore parameter.
//
//*****************************************************************************
#define AUX_SMPH_0 0 // AUX Semaphore 0
#define AUX_SMPH_1 1 // AUX Semaphore 1
#define AUX_SMPH_2 2 // AUX Semaphore 2
#define AUX_SMPH_3 3 // AUX Semaphore 3
#define AUX_SMPH_4 4 // AUX Semaphore 4
#define AUX_SMPH_5 5 // AUX Semaphore 5
#define AUX_SMPH_6 6 // AUX Semaphore 6
#define AUX_SMPH_7 7 // AUX Semaphore 7
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Acquire an AUX semaphore.
//!
//! This function acquires the given AUX semaphore, blocking the call until
//! the semaphore is available.
//!
//! \note The semaphore can also be acquired by the dedicated Sensor Controller.
//! The System CPU master can thus be competing for the shared resource, i.e.
//! the specified semaphore.
//!
//! \param ui32Semaphore is the semaphore number.
//! - \ref AUX_SMPH_0
//! - \ref AUX_SMPH_1
//! - \ref AUX_SMPH_2
//! - \ref AUX_SMPH_3
//! - \ref AUX_SMPH_4
//! - \ref AUX_SMPH_5
//! - \ref AUX_SMPH_6
//! - \ref AUX_SMPH_7
//!
//! \return None
//!
//! \sa AUXSMPHTryAcquire(), AUXSMPHRelease()
//
//*****************************************************************************
__STATIC_INLINE void
AUXSMPHAcquire(uint32_t ui32Semaphore)
{
// Check the arguments.
ASSERT((ui32Semaphore == AUX_SMPH_0) ||
(ui32Semaphore == AUX_SMPH_1) ||
(ui32Semaphore == AUX_SMPH_2) ||
(ui32Semaphore == AUX_SMPH_3) ||
(ui32Semaphore == AUX_SMPH_4) ||
(ui32Semaphore == AUX_SMPH_5) ||
(ui32Semaphore == AUX_SMPH_6) ||
(ui32Semaphore == AUX_SMPH_7));
// Wait for semaphore to be released such that it can be claimed
// Semaphore register reads 1 when lock was acquired otherwise 0
// (i.e. AUX_SMPH_CLAIMED).
while(HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 + 4 * ui32Semaphore) ==
AUX_SMPH_CLAIMED)
{
}
}
//*****************************************************************************
//
//! \brief Try to acquire an AUX semaphore.
//!
//! This function tries to acquire the given AUX semaphore, if the semaphore
//! could not be claimed the function returns false.
//!
//! \note The semaphore can also be acquired by the dedicated Sensor Controller.
//! The System CPU master can thus be competing for the shared resource, i.e.
//! the specified semaphore.
//!
//! \param ui32Semaphore is the semaphore number.
//! - \ref AUX_SMPH_0
//! - \ref AUX_SMPH_1
//! - \ref AUX_SMPH_2
//! - \ref AUX_SMPH_3
//! - \ref AUX_SMPH_4
//! - \ref AUX_SMPH_5
//! - \ref AUX_SMPH_6
//! - \ref AUX_SMPH_7
//!
//! \return Returns true if semaphore was acquired, false otherwise
//!
//! \sa AUXSMPHAcquire(), AUXSMPHRelease()
//
//*****************************************************************************
__STATIC_INLINE bool
AUXSMPHTryAcquire(uint32_t ui32Semaphore)
{
uint32_t ui32SemaReg;
// Check the arguments.
ASSERT((ui32Semaphore == AUX_SMPH_0) ||
(ui32Semaphore == AUX_SMPH_1) ||
(ui32Semaphore == AUX_SMPH_2) ||
(ui32Semaphore == AUX_SMPH_3) ||
(ui32Semaphore == AUX_SMPH_4) ||
(ui32Semaphore == AUX_SMPH_5) ||
(ui32Semaphore == AUX_SMPH_6) ||
(ui32Semaphore == AUX_SMPH_7));
// AUX Semaphore register reads 1 if lock was acquired
// (i.e. SMPH_FREE when read) but subsequent reads will read 0.
ui32SemaReg = HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 + 4 * ui32Semaphore);
return (ui32SemaReg == AUX_SMPH_FREE);
}
//*****************************************************************************
//
//! \brief Release an AUX semaphore by System CPU master.
//!
//! This function releases the given AUX semaphore.
//!
//! \note It is up to the application to provide the convention for clearing
//! semaphore.
//!
//! \note The semaphore can also be acquired by the dedicated Sensor Controller.
//! The System CPU master can thus be competing for the shared resource, i.e.
//! the specified semaphore.
//!
//! \param ui32Semaphore is the semaphore number.
//! - \ref AUX_SMPH_0
//! - \ref AUX_SMPH_1
//! - \ref AUX_SMPH_2
//! - \ref AUX_SMPH_3
//! - \ref AUX_SMPH_4
//! - \ref AUX_SMPH_5
//! - \ref AUX_SMPH_6
//! - \ref AUX_SMPH_7
//!
//! \return None
//!
//! \sa AUXSMPHAcquire(), AUXSMPHTryAcquire()
//
//*****************************************************************************
__STATIC_INLINE void
AUXSMPHRelease(uint32_t ui32Semaphore)
{
// Check the arguments.
ASSERT((ui32Semaphore == AUX_SMPH_0) ||
(ui32Semaphore == AUX_SMPH_1) ||
(ui32Semaphore == AUX_SMPH_2) ||
(ui32Semaphore == AUX_SMPH_3) ||
(ui32Semaphore == AUX_SMPH_4) ||
(ui32Semaphore == AUX_SMPH_5) ||
(ui32Semaphore == AUX_SMPH_6) ||
(ui32Semaphore == AUX_SMPH_7));
// No check before release. It is up to the application to provide the
// conventions for who and when a semaphore can be released.
HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 + 4 * ui32Semaphore) =
AUX_SMPH_FREE;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_SMPH_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,96 +0,0 @@
/******************************************************************************
* Filename: aux_sysif.c
* Revised: 2018-04-17 14:54:06 +0200 (Tue, 17 Apr 2018)
* Revision: 51890
*
* Description: Driver for the AUX System Interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_sysif.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXSYSIFOpModeChange
#define AUXSYSIFOpModeChange NOROM_AUXSYSIFOpModeChange
#endif
//*****************************************************************************
//
// Used in AUXSYSIFOpModeChange() to control the change of the operational mode.
//
//*****************************************************************************
static const uint8_t g_OpMode_to_order[4] = {1,2,0,3};
static const uint8_t g_Order_to_OpMode[4] = {2,0,1,3};
//*****************************************************************************
//
// Controls AUX operational mode change
//
//*****************************************************************************
void
AUXSYSIFOpModeChange(uint32_t targetOpMode)
{
uint32_t currentOpMode;
uint32_t currentOrder;
uint32_t nextMode;
// Check the argument
ASSERT((targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_PDLP)||
(targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_PDA) ||
(targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_LP) ||
(targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_A));
do {
currentOpMode = HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ);
while ( currentOpMode != HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEACK));
if (currentOpMode != targetOpMode)
{
currentOrder = g_OpMode_to_order[currentOpMode];
if ( currentOrder < g_OpMode_to_order[targetOpMode])
{
nextMode = g_Order_to_OpMode[currentOrder + 1];
}
else
{
nextMode = g_Order_to_OpMode[currentOrder - 1];
}
HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ) = nextMode;
}
} while ( currentOpMode != targetOpMode );
}
@@ -1,154 +0,0 @@
/******************************************************************************
* Filename: aux_sysif.h
* Revised: 2017-06-27 08:41:49 +0200 (Tue, 27 Jun 2017)
* Revision: 49245
*
* Description: Defines and prototypes for the AUX System Interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxsysif_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_SYSIF_H__
#define __AUX_SYSIF_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_sysif.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXSYSIFOpModeChange NOROM_AUXSYSIFOpModeChange
#endif
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
// Defines for AUX operational modes.
//
//*****************************************************************************
#define AUX_SYSIF_OPMODE_TARGET_PDLP (AUX_SYSIF_OPMODEREQ_REQ_PDLP)
#define AUX_SYSIF_OPMODE_TARGET_PDA (AUX_SYSIF_OPMODEREQ_REQ_PDA)
#define AUX_SYSIF_OPMODE_TARGET_LP (AUX_SYSIF_OPMODEREQ_REQ_LP)
#define AUX_SYSIF_OPMODE_TARGET_A (AUX_SYSIF_OPMODEREQ_REQ_A)
//*****************************************************************************
//
//! \brief Changes the AUX operational mode to the requested target mode.
//!
//! This function controls the change of the AUX operational mode.
//! The function controls the change of the current operational mode to the
//! operational mode target by adhering to rules specified by HW.
//!
//! \param targetOpMode
//! AUX operational mode:
//! - \ref AUX_SYSIF_OPMODE_TARGET_PDLP (Powerdown operational mode with wakeup to lowpower mode)
//! - \ref AUX_SYSIF_OPMODE_TARGET_PDA (Powerdown operational mode with wakeup to active mode)
//! - \ref AUX_SYSIF_OPMODE_TARGET_LP (Lowpower operational mode)
//! - \ref AUX_SYSIF_OPMODE_TARGET_A (Active operational mode)
//!
//! \return None
//
//*****************************************************************************
extern void AUXSYSIFOpModeChange(uint32_t targetOpMode);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXSYSIFOpModeChange
#undef AUXSYSIFOpModeChange
#define AUXSYSIFOpModeChange ROM_AUXSYSIFOpModeChange
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_SYSIF_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
-111
View File
@@ -1,111 +0,0 @@
/******************************************************************************
* Filename: aux_tdc.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
*
* Description: Driver for the AUX Time to Digital Converter interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_tdc.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXTDCConfigSet
#define AUXTDCConfigSet NOROM_AUXTDCConfigSet
#undef AUXTDCMeasurementDone
#define AUXTDCMeasurementDone NOROM_AUXTDCMeasurementDone
#endif
//*****************************************************************************
//
// Configure the operation of the AUX TDC
//
//*****************************************************************************
void
AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
uint32_t ui32StopCondition)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Make sure the AUX TDC is in the idle state before changing the
// configuration.
while(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
}
// Clear previous results.
HWREG(ui32Base + AUX_TDC_O_CTL) = 0x0;
// Change the configuration.
HWREG(ui32Base + AUX_TDC_O_TRIGSRC) = ui32StartCondition | ui32StopCondition;
}
//*****************************************************************************
//
// Check if the AUX TDC is done measuring
//
//*****************************************************************************
uint32_t
AUXTDCMeasurementDone(uint32_t ui32Base)
{
uint32_t ui32Reg;
uint32_t ui32Status;
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is done measuring.
ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT);
if(ui32Reg & AUX_TDC_STAT_DONE)
{
ui32Status = AUX_TDC_DONE;
}
else if(ui32Reg & AUX_TDC_STAT_SAT)
{
ui32Status = AUX_TDC_TIMEOUT;
}
else
{
ui32Status = AUX_TDC_BUSY;
}
// Return the status.
return (ui32Status);
}
-904
View File
@@ -1,904 +0,0 @@
/******************************************************************************
* Filename: aux_tdc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AUX Time-to-Digital Converter
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxtdc_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_TDC_H__
#define __AUX_TDC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_aux_tdc.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXTDCConfigSet NOROM_AUXTDCConfigSet
#define AUXTDCMeasurementDone NOROM_AUXTDCMeasurementDone
#endif
//*****************************************************************************
//
// Defines for the status of a AUX TDC measurement.
//
//*****************************************************************************
#define AUX_TDC_BUSY 0x00000001
#define AUX_TDC_TIMEOUT 0x00000002
#define AUX_TDC_DONE 0x00000004
//*****************************************************************************
//
// Defines for the control of a AUX TDC.
//
//*****************************************************************************
#define AUX_TDC_RUNSYNC 0x00000001
#define AUX_TDC_RUN 0x00000002
#define AUX_TDC_ABORT 0x00000003
//*****************************************************************************
//
// Defines for possible states of the TDC internal state machine.
//
//*****************************************************************************
#define AUXTDC_WAIT_START (AUX_TDC_STAT_STATE_WAIT_START)
#define AUXTDC_WAIT_START_CNTEN (AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN)
#define AUXTDC_IDLE (AUX_TDC_STAT_STATE_IDLE)
#define AUXTDC_CLRCNT (AUX_TDC_STAT_STATE_CLR_CNT)
#define AUXTDC_WAIT_STOP (AUX_TDC_STAT_STATE_WAIT_STOP)
#define AUXTDC_WAIT_STOP_CNTDOWN (AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN)
#define AUXTDC_GETRESULTS (AUX_TDC_STAT_STATE_GET_RESULT)
#define AUXTDC_POR (AUX_TDC_STAT_STATE_POR)
#define AUXTDC_WAIT_CLRCNT_DONE (AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE)
#define AUXTDC_START_FALL (AUX_TDC_STAT_STATE_START_FALL)
#define AUXTDC_FORCE_STOP (AUX_TDC_STAT_STATE_FORCE_STOP)
//*****************************************************************************
//
// Defines for controlling the AUX TDC. Values can be passed to AUXTDCConfigSet().
//
//*****************************************************************************
#define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event
#define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW) // Falling edge polarity for stop event
#define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)
#define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)
#define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)
#define AUXTDC_STOP_AUXIO3 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO3)
#define AUXTDC_STOP_AUXIO4 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO4)
#define AUXTDC_STOP_AUXIO5 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO5)
#define AUXTDC_STOP_AUXIO6 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO6)
#define AUXTDC_STOP_AUXIO7 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO7)
#define AUXTDC_STOP_AUXIO8 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO8)
#define AUXTDC_STOP_AUXIO9 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO9)
#define AUXTDC_STOP_AUXIO10 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO10)
#define AUXTDC_STOP_AUXIO11 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO11)
#define AUXTDC_STOP_AUXIO12 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO12)
#define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)
#define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)
#define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)
#define AUXTDC_STOP_AUXIO16 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO16)
#define AUXTDC_STOP_AUXIO17 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO17)
#define AUXTDC_STOP_AUXIO18 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO18)
#define AUXTDC_STOP_AUXIO19 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO19)
#define AUXTDC_STOP_AUXIO20 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO20)
#define AUXTDC_STOP_AUXIO21 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO21)
#define AUXTDC_STOP_AUXIO22 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO22)
#define AUXTDC_STOP_AUXIO23 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO23)
#define AUXTDC_STOP_AUXIO24 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO24)
#define AUXTDC_STOP_AUXIO25 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO25)
#define AUXTDC_STOP_AUXIO26 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO26)
#define AUXTDC_STOP_AUXIO27 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO27)
#define AUXTDC_STOP_AUXIO28 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO28)
#define AUXTDC_STOP_AUXIO29 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO29)
#define AUXTDC_STOP_AUXIO30 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO30)
#define AUXTDC_STOP_AUXIO31 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO31)
#define AUXTDC_STOP_MANUAL_EV (AUX_TDC_TRIGSRC_STOP_SRC_MANUAL_EV)
#define AUXTDC_STOP_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2_DLY)
#define AUXTDC_STOP_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_4KHZ)
#define AUXTDC_STOP_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_BAT_UPD)
#define AUXTDC_STOP_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_TEMP_UPD)
#define AUXTDC_STOP_SCLK_LF (AUX_TDC_TRIGSRC_STOP_SRC_SCLK_LF)
#define AUXTDC_STOP_PWR_DWN (AUX_TDC_TRIGSRC_STOP_SRC_PWR_DWN)
#define AUXTDC_STOP_MCU_ACTIVE (AUX_TDC_TRIGSRC_STOP_SRC_MCU_ACTIVE)
#define AUXTDC_STOP_VDDR_RECHARGE (AUX_TDC_TRIGSRC_STOP_SRC_VDDR_RECHARGE)
#define AUXTDC_STOP_TIMER2_EV0 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV0)
#define AUXTDC_STOP_TIMER2_EV1 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV1)
#define AUXTDC_STOP_TIMER2_EV2 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV2)
#define AUXTDC_STOP_TIMER2_EV3 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV3)
#define AUXTDC_STOP_TIMER2_PULSE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_PULSE)
#define AUXTDC_STOP_TDC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_DONE)
#define AUXTDC_STOP_ADC_IRQ (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_IRQ)
#define AUXTDC_STOP_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_NOT_EMPTY)
#define AUXTDC_STOP_NO_EVENT (AUX_TDC_TRIGSRC_STOP_SRC_NO_EVENT)
#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_DONE)
#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ISRC_RESET_N)
#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX0)
#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX1)
#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_SMPH_AUTOTAKE_DONE)
#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_PRE)
#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER0_EV)
#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER1_EV)
#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
#define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)
#define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)
#define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event
#define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW) // Falling edge polarity for start event
#define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)
#define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)
#define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)
#define AUXTDC_START_AUXIO3 (AUX_TDC_TRIGSRC_START_SRC_AUXIO3)
#define AUXTDC_START_AUXIO4 (AUX_TDC_TRIGSRC_START_SRC_AUXIO4)
#define AUXTDC_START_AUXIO5 (AUX_TDC_TRIGSRC_START_SRC_AUXIO5)
#define AUXTDC_START_AUXIO6 (AUX_TDC_TRIGSRC_START_SRC_AUXIO6)
#define AUXTDC_START_AUXIO7 (AUX_TDC_TRIGSRC_START_SRC_AUXIO7)
#define AUXTDC_START_AUXIO8 (AUX_TDC_TRIGSRC_START_SRC_AUXIO8)
#define AUXTDC_START_AUXIO9 (AUX_TDC_TRIGSRC_START_SRC_AUXIO9)
#define AUXTDC_START_AUXIO10 (AUX_TDC_TRIGSRC_START_SRC_AUXIO10)
#define AUXTDC_START_AUXIO11 (AUX_TDC_TRIGSRC_START_SRC_AUXIO11)
#define AUXTDC_START_AUXIO12 (AUX_TDC_TRIGSRC_START_SRC_AUXIO12)
#define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)
#define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)
#define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)
#define AUXTDC_START_AUXIO16 (AUX_TDC_TRIGSRC_START_SRC_AUXIO16)
#define AUXTDC_START_AUXIO17 (AUX_TDC_TRIGSRC_START_SRC_AUXIO17)
#define AUXTDC_START_AUXIO18 (AUX_TDC_TRIGSRC_START_SRC_AUXIO18)
#define AUXTDC_START_AUXIO19 (AUX_TDC_TRIGSRC_START_SRC_AUXIO19)
#define AUXTDC_START_AUXIO20 (AUX_TDC_TRIGSRC_START_SRC_AUXIO20)
#define AUXTDC_START_AUXIO21 (AUX_TDC_TRIGSRC_START_SRC_AUXIO21)
#define AUXTDC_START_AUXIO22 (AUX_TDC_TRIGSRC_START_SRC_AUXIO22)
#define AUXTDC_START_AUXIO23 (AUX_TDC_TRIGSRC_START_SRC_AUXIO23)
#define AUXTDC_START_AUXIO24 (AUX_TDC_TRIGSRC_START_SRC_AUXIO24)
#define AUXTDC_START_AUXIO25 (AUX_TDC_TRIGSRC_START_SRC_AUXIO25)
#define AUXTDC_START_AUXIO26 (AUX_TDC_TRIGSRC_START_SRC_AUXIO26)
#define AUXTDC_START_AUXIO27 (AUX_TDC_TRIGSRC_START_SRC_AUXIO27)
#define AUXTDC_START_AUXIO28 (AUX_TDC_TRIGSRC_START_SRC_AUXIO28)
#define AUXTDC_START_AUXIO29 (AUX_TDC_TRIGSRC_START_SRC_AUXIO29)
#define AUXTDC_START_AUXIO30 (AUX_TDC_TRIGSRC_START_SRC_AUXIO30)
#define AUXTDC_START_AUXIO31 (AUX_TDC_TRIGSRC_START_SRC_AUXIO31)
#define AUXTDC_START_MANUAL_EV (AUX_TDC_TRIGSRC_START_SRC_MANUAL_EV)
#define AUXTDC_START_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2_DLY)
#define AUXTDC_START_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_4KHZ)
#define AUXTDC_START_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_BAT_UPD)
#define AUXTDC_START_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_TEMP_UPD)
#define AUXTDC_START_SCLK_LF (AUX_TDC_TRIGSRC_START_SRC_SCLK_LF)
#define AUXTDC_START_PWR_DWN (AUX_TDC_TRIGSRC_START_SRC_PWR_DWN)
#define AUXTDC_START_MCU_ACTIVE (AUX_TDC_TRIGSRC_START_SRC_MCU_ACTIVE)
#define AUXTDC_START_VDDR_RECHARGE (AUX_TDC_TRIGSRC_START_SRC_VDDR_RECHARGE)
#define AUXTDC_START_TIMER2_EV0 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV0)
#define AUXTDC_START_TIMER2_EV1 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV1)
#define AUXTDC_START_TIMER2_EV2 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV2)
#define AUXTDC_START_TIMER2_EV3 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV3)
#define AUXTDC_START_TIMER2_PULSE (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_PULSE)
#define AUXTDC_START_TDC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_DONE)
#define AUXTDC_START_ADC_IRQ (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_IRQ)
#define AUXTDC_START_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_NOT_EMPTY)
#define AUXTDC_START_NO_EVENT (AUX_TDC_TRIGSRC_START_SRC_NO_EVENT)
#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_DONE)
#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_AUX_ISRC_RESET_N)
#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX0)
#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX1)
#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_SMPH_AUTOTAKE_DONE)
#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_PRE)
#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER0_EV)
#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER1_EV)
#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
#define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)
#define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)
//*****************************************************************************
//
// Defines for the possible saturation values set using AUXTDCLimitSet().
//
//*****************************************************************************
#define AUXTDC_SAT_4096 (AUX_TDC_SATCFG_LIMIT_R12)
#define AUXTDC_SAT_8192 (AUX_TDC_SATCFG_LIMIT_R13)
#define AUXTDC_SAT_16384 (AUX_TDC_SATCFG_LIMIT_R14)
#define AUXTDC_SAT_32768 (AUX_TDC_SATCFG_LIMIT_R15)
#define AUXTDC_SAT_65536 (AUX_TDC_SATCFG_LIMIT_R16)
#define AUXTDC_SAT_131072 (AUX_TDC_SATCFG_LIMIT_R17)
#define AUXTDC_SAT_262144 (AUX_TDC_SATCFG_LIMIT_R18)
#define AUXTDC_SAT_524288 (AUX_TDC_SATCFG_LIMIT_R19)
#define AUXTDC_SAT_1048576 (AUX_TDC_SATCFG_LIMIT_R20)
#define AUXTDC_SAT_2097152 (AUX_TDC_SATCFG_LIMIT_R21)
#define AUXTDC_SAT_4194304 (AUX_TDC_SATCFG_LIMIT_R22)
#define AUXTDC_SAT_8388608 (AUX_TDC_SATCFG_LIMIT_R23)
#define AUXTDC_SAT_16777216 (AUX_TDC_SATCFG_LIMIT_R24)
#define AUXTDC_NUM_SAT_VALS 16
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
#ifdef DRIVERLIB_DEBUG
//*****************************************************************************
//
//! \internal
//! \brief Checks an AUX TDC base address.
//!
//! This function determines if a AUX TDC port base address is valid.
//!
//! \param ui32Base is the base address of the AUX TDC port.
//!
//! \return Returns \c true if the base address is valid and \c false
//! otherwise.
//
//*****************************************************************************
static bool
AUXTDCBaseValid(uint32_t ui32Base)
{
return(ui32Base == AUX_TDC_BASE);
}
#endif
//*****************************************************************************
//
//! \brief Get the status of the AUX TDC internal state machine.
//!
//! This function will return the current state of the AUX TDC internal state
//! machine.
//! \param ui32Base is base address of the AUX TDC
//!
//! \return Returns the current state of the state machine.
//! Possible states for the state machine are:
//! - \ref AUXTDC_WAIT_START
//! - \ref AUXTDC_WAIT_START_CNTEN
//! - \ref AUXTDC_IDLE
//! - \ref AUXTDC_CLRCNT
//! - \ref AUXTDC_WAIT_STOP
//! - \ref AUXTDC_WAIT_STOP_CNTDOWN
//! - \ref AUXTDC_GETRESULTS
//! - \ref AUXTDC_POR
//! - \ref AUXTDC_WAIT_CLRCNT_DONE
//! - \ref AUXTDC_START_FALL
//! - \ref AUXTDC_FORCE_STOP.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCStatusGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the status value for the correct ADI Slave.
return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
AUX_TDC_STAT_STATE_S);
}
//*****************************************************************************
//
//! \brief Configure the operation of the AUX TDC.
//!
//! Use this function to configure the start and stop event for the AUX TDC.
//!
//! The \c ui32StartCondition must be a bitwise OR of the start event and the
//! polarity of the start event. The start events are:
//! - \ref AUXTDC_START_AUXIO0
//! - \ref AUXTDC_START_AUXIO1
//! - \ref AUXTDC_START_AUXIO2
//! - \ref AUXTDC_START_AUXIO3
//! - \ref AUXTDC_START_AUXIO4
//! - \ref AUXTDC_START_AUXIO5
//! - \ref AUXTDC_START_AUXIO6
//! - \ref AUXTDC_START_AUXIO7
//! - \ref AUXTDC_START_AUXIO8
//! - \ref AUXTDC_START_AUXIO9
//! - \ref AUXTDC_START_AUXIO10
//! - \ref AUXTDC_START_AUXIO11
//! - \ref AUXTDC_START_AUXIO12
//! - \ref AUXTDC_START_AUXIO13
//! - \ref AUXTDC_START_AUXIO14
//! - \ref AUXTDC_START_AUXIO15
//! - \ref AUXTDC_START_AUXIO16
//! - \ref AUXTDC_START_AUXIO17
//! - \ref AUXTDC_START_AUXIO18
//! - \ref AUXTDC_START_AUXIO19
//! - \ref AUXTDC_START_AUXIO20
//! - \ref AUXTDC_START_AUXIO21
//! - \ref AUXTDC_START_AUXIO22
//! - \ref AUXTDC_START_AUXIO23
//! - \ref AUXTDC_START_AUXIO24
//! - \ref AUXTDC_START_AUXIO25
//! - \ref AUXTDC_START_AUXIO26
//! - \ref AUXTDC_START_AUXIO27
//! - \ref AUXTDC_START_AUXIO28
//! - \ref AUXTDC_START_AUXIO29
//! - \ref AUXTDC_START_AUXIO30
//! - \ref AUXTDC_START_AUXIO31
//! - \ref AUXTDC_START_MANUAL_EV
//! - \ref AUXTDC_START_AON_RTC_CH2_DLY
//! - \ref AUXTDC_START_AON_RTC_4KHZ
//! - \ref AUXTDC_START_AON_BATMON_BAT_UPD
//! - \ref AUXTDC_START_AON_BATMON_TEMP_UPD
//! - \ref AUXTDC_START_SCLK_LF
//! - \ref AUXTDC_START_PWR_DWN
//! - \ref AUXTDC_START_MCU_ACTIVE
//! - \ref AUXTDC_START_VDDR_RECHARGE
//! - \ref AUXTDC_START_TIMER2_EV0
//! - \ref AUXTDC_START_TIMER2_EV1
//! - \ref AUXTDC_START_TIMER2_EV2
//! - \ref AUXTDC_START_TIMER2_EV3
//! - \ref AUXTDC_START_TIMER2_PULSE
//! - \ref AUXTDC_START_TDC_DONE
//! - \ref AUXTDC_START_ADC_IRQ
//! - \ref AUXTDC_START_ADC_FIFO_NOT_EMPTY
//! - \ref AUXTDC_START_NO_EVENT
//! - \ref AUXTDC_START_ADC_DONE
//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_START_ISRC_RESET
//! - \ref AUXTDC_START_OBSMUX0
//! - \ref AUXTDC_START_OBSMUX1
//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_START_TDC_PRE
//! - \ref AUXTDC_START_TIMER0_EV
//! - \ref AUXTDC_START_TIMER1_EV
//! - \ref AUXTDC_START_AON_RTC_CH2
//! - \ref AUXTDC_START_AUX_COMPA
//! - \ref AUXTDC_START_AUX_COMPB
//! - \ref AUXTDC_START_ACLK_REF
//! - \ref AUXTDC_START_MCU_EV
//!
//! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS
//! or falling \ref AUXTDC_STARTPOL_FALL.
//!
//! The \c ui32StopCondition must be a bitwise OR of the stop event and the
//! polarity of the stop event. The stop events are:
//! - \ref AUXTDC_STOP_AUXIO0
//! - \ref AUXTDC_STOP_AUXIO1
//! - \ref AUXTDC_STOP_AUXIO2
//! - \ref AUXTDC_STOP_AUXIO3
//! - \ref AUXTDC_STOP_AUXIO4
//! - \ref AUXTDC_STOP_AUXIO5
//! - \ref AUXTDC_STOP_AUXIO6
//! - \ref AUXTDC_STOP_AUXIO7
//! - \ref AUXTDC_STOP_AUXIO8
//! - \ref AUXTDC_STOP_AUXIO9
//! - \ref AUXTDC_STOP_AUXIO10
//! - \ref AUXTDC_STOP_AUXIO11
//! - \ref AUXTDC_STOP_AUXIO12
//! - \ref AUXTDC_STOP_AUXIO13
//! - \ref AUXTDC_STOP_AUXIO14
//! - \ref AUXTDC_STOP_AUXIO15
//! - \ref AUXTDC_STOP_AUXIO16
//! - \ref AUXTDC_STOP_AUXIO17
//! - \ref AUXTDC_STOP_AUXIO18
//! - \ref AUXTDC_STOP_AUXIO19
//! - \ref AUXTDC_STOP_AUXIO20
//! - \ref AUXTDC_STOP_AUXIO21
//! - \ref AUXTDC_STOP_AUXIO22
//! - \ref AUXTDC_STOP_AUXIO23
//! - \ref AUXTDC_STOP_AUXIO24
//! - \ref AUXTDC_STOP_AUXIO25
//! - \ref AUXTDC_STOP_AUXIO26
//! - \ref AUXTDC_STOP_AUXIO27
//! - \ref AUXTDC_STOP_AUXIO28
//! - \ref AUXTDC_STOP_AUXIO29
//! - \ref AUXTDC_STOP_AUXIO30
//! - \ref AUXTDC_STOP_AUXIO31
//! - \ref AUXTDC_STOP_MANUAL_EV
//! - \ref AUXTDC_STOP_AON_RTC_CH2_DLY
//! - \ref AUXTDC_STOP_AON_RTC_4KHZ
//! - \ref AUXTDC_STOP_AON_BATMON_BAT_UPD
//! - \ref AUXTDC_STOP_AON_BATMON_TEMP_UPD
//! - \ref AUXTDC_STOP_SCLK_LF
//! - \ref AUXTDC_STOP_PWR_DWN
//! - \ref AUXTDC_STOP_MCU_ACTIVE
//! - \ref AUXTDC_STOP_VDDR_RECHARGE
//! - \ref AUXTDC_STOP_TIMER2_EV0
//! - \ref AUXTDC_STOP_TIMER2_EV1
//! - \ref AUXTDC_STOP_TIMER2_EV2
//! - \ref AUXTDC_STOP_TIMER2_EV3
//! - \ref AUXTDC_STOP_TIMER2_PULSE
//! - \ref AUXTDC_STOP_TDC_DONE
//! - \ref AUXTDC_STOP_ADC_IRQ
//! - \ref AUXTDC_STOP_ADC_FIFO_NOT_EMPTY
//! - \ref AUXTDC_STOP_NO_EVENT
//! - \ref AUXTDC_STOP_ADC_DONE
//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_STOP_ISRC_RESET
//! - \ref AUXTDC_STOP_OBSMUX0
//! - \ref AUXTDC_STOP_OBSMUX1
//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_STOP_TDC_PRE
//! - \ref AUXTDC_STOP_TIMER0_EV
//! - \ref AUXTDC_STOP_TIMER1_EV
//! - \ref AUXTDC_STOP_AON_RTC_CH2
//! - \ref AUXTDC_STOP_AUX_COMPA
//! - \ref AUXTDC_STOP_AUX_COMPB
//! - \ref AUXTDC_STOP_ACLK_REF
//! - \ref AUXTDC_STOP_MCU_EV
//!
//! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS
//! or falling \ref AUXTDC_STOPPOL_FALL.
//!
//! \note The AUX TDC should only be configured when the AUX TDC is in the Idle
//! state. To ensure that software does not lock up, it is recommended to
//! ensure that the AUX TDC is actually in idle when calling \ref AUXTDCConfigSet().
//! This can be tested using \ref AUXTDCIdle().
//!
//! \param ui32Base is base address of the AUX TDC.
//! \param ui32StartCondition is AUX TDC a bitwise OR of a start event and polarity.
//! \param ui32StopCondition is AUX TDC a bitwise OR of a stop event and polarity.
//!
//! \return None
//!
//! \sa \ref AUXTDCConfigSet(), \ref AUXTDCIdle()
//
//*****************************************************************************
extern void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
uint32_t ui32StopCondition);
//*****************************************************************************
//
//! \brief Check if the AUX TDC is in idle mode.
//!
//! This function can be used to check whether the AUX TDC internal state
//! machine is in idle mode. This is required before setting the polarity
//! of the start and stop event.
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return Returns \c true if state machine is in idle and returns \c false
//! if the state machine is in any other state.
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCIdle(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in the Idle state.
return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE) ? true : false);
}
//*****************************************************************************
//
//! \brief Enable the AUX TDC for a measurement.
//!
//! This function is used for arming the AUX TDC to begin a measurement as
//! soon as the start condition is met. There are two run modes:
//! - \ref AUX_TDC_RUNSYNC will wait for a falling event of the start pulse before
//! starting measurement on next rising edge of start. This guarantees an edge
//! triggered start and is recommended for frequency measurements. If the
//! first falling edge is close to the start command it may be missed, but
//! the TDC shall catch later falling edges and in any case guarantee a
//! measurement start synchronous to the rising edge of the start event.
//! - The \ref AUX_TDC_RUN is asynchronous start and asynchronous stop mode. Using
//! this a TDC measurement may start immediately if start is high and hence it
//! may not give precise edge to edge measurements. This mode is only
//! recommended when start pulse is guaranteed to arrive at least 7 clock
//! periods after command.
//!
//! \note The AUX TDC should be configured and in Idle mode before calling this
//! function.
//!
//! \param ui32Base is the base address of the AUX TDC.
//! \param ui32RunMode is the run mode for the AUX TDC.
//! - \ref AUX_TDC_RUNSYNC : Synchronous run mode.
//! - \ref AUX_TDC_RUN : Asynchronous run mode.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AUXTDCEnable(uint32_t ui32Base, uint32_t ui32RunMode)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
ASSERT((ui32RunMode == AUX_TDC_RUN) ||
(ui32RunMode == AUX_TDC_RUNSYNC));
// Enable the AUX TDC.
HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
}
//*****************************************************************************
//
//! \brief Force the AUX TDC back to Idle mode.
//!
//! This function will force the AUX TDC in Idle mode. The internal state
//! machine will not go directly to Idle mode, so it is left to the programmer to
//! ensure that the state machine is in Idle mode before doing any new
//! configuration. This can be checked using \ref AUXTDCIdle().
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return None
//!
//! \sa \ref AUXTDCIdle()
//
//*****************************************************************************
__STATIC_INLINE void
AUXTDCIdleForce(uint32_t ui32Base)
{
// Check the arguments
ASSERT(AUXTDCBaseValid(ui32Base));
// Abort operation of AUX TDC and force into Idle mode.
HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
}
//*****************************************************************************
//
//! \brief Check if the AUX TDC is done measuring.
//!
//! This function can be used to check whether the AUX TDC has finished a
//! measurement. The AUX TDC may have completed a measurement for two reasons.
//! Either it finish successfully \ref AUX_TDC_DONE or it failed due to a timeout
//! \ref AUX_TDC_TIMEOUT. If the AUX TDC is still measuring it this function
//! will return \ref AUX_TDC_BUSY.
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return Returns the current status of a measurement:
//! - \ref AUX_TDC_DONE : An AUX TDC measurement finished successfully.
//! - \ref AUX_TDC_TIMEOUT : An AUX TDC measurement failed due to timeout.
//! - \ref AUX_TDC_BUSY : An AUX TDC measurement is being performed.
//
//*****************************************************************************
extern uint32_t AUXTDCMeasurementDone(uint32_t ui32Base);
//*****************************************************************************
//
//! \brief Get the value of the latest measurement.
//!
//! This function is used for retrieving the value of the latest measurement
//! performed by the AUX TDC.
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return Returns the result of the latest measurement.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCMeasurementGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the measurement.
return (HWREG(ui32Base + AUX_TDC_O_RESULT));
}
//*****************************************************************************
//
//! \brief Set the saturation limit of the measurement.
//!
//! This function is used to set a saturation limit for the event accumulation
//! register. The saturation limit is defined as a bit width of the
//! accumulation register and therefore increases in power of 2.
//!
//! \param ui32Base is base address of the AUX TDC.
//! \param ui32Limit is the saturation limit.
//! - \ref AUXTDC_SAT_4096
//! - \ref AUXTDC_SAT_8192
//! - \ref AUXTDC_SAT_16384
//! - \ref AUXTDC_SAT_32768
//! - \ref AUXTDC_SAT_65536
//! - \ref AUXTDC_SAT_131072
//! - \ref AUXTDC_SAT_262144
//! - \ref AUXTDC_SAT_524288
//! - \ref AUXTDC_SAT_1048576
//! - \ref AUXTDC_SAT_2097152
//! - \ref AUXTDC_SAT_4194304
//! - \ref AUXTDC_SAT_8388608
//! - \ref AUXTDC_SAT_16777216 (default)
//!
//! \return None
//!
//! \note The actual value of the accumulation register might increase slightly beyond
//! the saturation value before the saturation takes effect.
//!
//! \sa \ref AUXTDCLimitGet()
//
//*****************************************************************************
__STATIC_INLINE void
AUXTDCLimitSet(uint32_t ui32Base, uint32_t ui32Limit)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
ASSERT(ui32Limit < AUXTDC_NUM_SAT_VALS);
// Set the saturation limit.
HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
}
//*****************************************************************************
//
//! \brief Get the saturation limit of the measurement.
//!
//! This function is used to retrieve the current saturation for the
//! accumulator register.
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns the saturation limit.
//! - \ref AUXTDC_SAT_4096
//! - \ref AUXTDC_SAT_8192
//! - \ref AUXTDC_SAT_16384
//! - \ref AUXTDC_SAT_32768
//! - \ref AUXTDC_SAT_65536
//! - \ref AUXTDC_SAT_131072
//! - \ref AUXTDC_SAT_262144
//! - \ref AUXTDC_SAT_524288
//! - \ref AUXTDC_SAT_1048576
//! - \ref AUXTDC_SAT_2097152
//! - \ref AUXTDC_SAT_4194304
//! - \ref AUXTDC_SAT_8388608
//! - \ref AUXTDC_SAT_16777216
//!
//! \sa \ref AUXTDCLimitSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCLimitGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the saturation limit.
return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
}
//*****************************************************************************
//
//! \brief Enables the counter if possible.
//!
//! This function can be used to enable the AUX TDC stop/compare event counter.
//! The counter can be used to measure multiple periods of a clock signal.
//! For each stop/compare event the counter will be decremented by one and
//! the measurement will continue running until the value of the counter
//! reaches 0. The current value of the counter can be read using
//! \ref AUXTDCCounterGet(). The reset value of the counter can be set using
//! \ref AUXTDCCounterSet().
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns \c true if the counter was successfully enabled. If the
//! AUX TDC is not in Idle mode, the counter can not be enabled, and the
//! return value will be \c false.
//!
//! \sa \ref AUXTDCCounterGet(), \ref AUXTDCCounterSet()
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCCounterEnable(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in idle mode. If not in Idle mode, the counter
// will not be enabled.
if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
return false;
}
// Enable the counter.
HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
// Counter successfully enabled.
return true;
}
//*****************************************************************************
//
//! \brief Disables the counter if possible.
//!
//! This function can be used to disable the AUX TDC stop/compare event counter.
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns \c true if the counter was successfully disabled. If the
//! AUX TDC is not in Idle mode, the counter can not be disabled, and the
//! return value will be \c false.
//!
//! \sa \ref AUXTDCCounterEnable() for more information on how to use the counter.
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCCounterDisable(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in Idle mode. If not in Idle mode, the counter
// will not be disabled.
if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
return false;
}
// Disable the counter.
HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
// Counter successfully disabled.
return true;
}
//*****************************************************************************
//
//! \brief Set the reset number of counter compare/stop event to ignore before taking
//! a measurement.
//!
//! This function loads the reset value of the counter with the specified
//! number of events to ignore. A reset in this context means the counter
//! has been disabled and then enabled.
//!
//! \param ui32Base is base address of the AUX TDC.
//! \param ui32Events is the number of compare/stop events to load into the
//! counter.
//!
//! \return Returns \c true if the counter was successfully updated. If the
//! AUX TDC is not in Idle mode, the counter can not be updated, and the
//! return value will be \c false.
//!
//! \sa \ref AUXTDCCounterEnable()
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCCounterSet(uint32_t ui32Base, uint32_t ui32Events)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in idle mode. If not in idle mode, the counter
// will not be disabled.
if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
return false;
}
// Update the reset counter value.
HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
// Counter successfully updated.
return true;
}
//*****************************************************************************
//
//! \brief Get the current number of counter compare/stop event to ignore before
//! taking a measurement.
//!
//! This function returns the current value of compare/stop events before
//! a measurement is registered. This value is decremented by one for each
//! registered compare/stop event and will always be less than or equal the
//! reset value of the counter set using \ref AUXTDCCounterSet().
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns the current value of compare/stop events ignored before a
//! measurement is performed.
//!
//! \sa \ref AUXTDCCounterEnable().
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCCounterGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the current counter value.
return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXTDCConfigSet
#undef AUXTDCConfigSet
#define AUXTDCConfigSet ROM_AUXTDCConfigSet
#endif
#ifdef ROM_AUXTDCMeasurementDone
#undef AUXTDCMeasurementDone
#define AUXTDCMeasurementDone ROM_AUXTDCMeasurementDone
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_TDC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,3 +0,0 @@
COMPILER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/ti-cgt-arm_15.12.1.LTS/bin/armcl"
COMPILER_INCL = "C:/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/ti-cgt-arm_15.12.1.LTS/include"
ARCHIVER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/ti-cgt-arm_15.12.1.LTS/bin/armar"
@@ -1,115 +0,0 @@
# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.obj
$(COMPILER_TOOL) --compiler_revision
@ echo CCS: Compile adi.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/adi.c"
@ echo CCS: Compile aes.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aes.c"
@ echo CCS: Compile aon_batmon.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_batmon.c"
@ echo CCS: Compile aon_event.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_event.c"
@ echo CCS: Compile aon_ioc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_ioc.c"
@ echo CCS: Compile aon_pmctl.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_pmctl.c"
@ echo CCS: Compile aon_rtc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_rtc.c"
@ echo CCS: Compile aux_adc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_adc.c"
@ echo CCS: Compile aux_smph.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_smph.c"
@ echo CCS: Compile aux_sysif.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_sysif.c"
@ echo CCS: Compile aux_tdc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_tdc.c"
@ echo CCS: Compile ccfgread.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ccfgread.c"
@ echo CCS: Compile chipinfo.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/chipinfo.c"
@ echo CCS: Compile cpu.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/cpu.c"
@ echo CCS: Compile crypto.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/crypto.c"
@ echo CCS: Compile ddi.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ddi.c"
@ echo CCS: Compile debug.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/debug.c"
@ echo CCS: Compile driverlib_release.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/driverlib_release.c"
@ echo CCS: Compile event.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/event.c"
@ echo CCS: Compile flash.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/flash.c"
@ echo CCS: Compile gpio.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/gpio.c"
@ echo CCS: Compile i2c.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/i2c.c"
@ echo CCS: Compile i2s.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/i2s.c"
@ echo CCS: Compile interrupt.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/interrupt.c"
@ echo CCS: Compile ioc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ioc.c"
@ echo CCS: Compile osc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/osc.c"
@ echo CCS: Compile pka.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/pka.c"
@ echo CCS: Compile prcm.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/prcm.c"
@ echo CCS: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c"
@ echo CCS: Compile rfc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/rfc.c"
@ echo CCS: Compile rom_crypto.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/rom_crypto.c"
@ echo CCS: Compile setup.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/setup.c"
@ echo CCS: Compile setup_rom.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/setup_rom.c"
@ echo CCS: Compile sha2.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sha2.c"
@ echo CCS: Compile smph.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/smph.c"
@ echo CCS: Compile ssi.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ssi.c"
@ echo CCS: Compile sw_chacha.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sw_chacha.c"
@ echo CCS: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c"
@ echo CCS: Compile systick.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/systick.c"
@ echo CCS: Compile sys_ctrl.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c"
@ echo CCS: Compile timer.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/timer.c"
@ echo CCS: Compile trng.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/trng.c"
@ echo CCS: Compile uart.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/uart.c"
@ echo CCS: Compile udma.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/udma.c"
@ echo CCS: Compile vims.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/vims.c"
@ echo CCS: Compile watchdog.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/watchdog.c"
@ echo CCS: Archive driverlib.lib
@ $(ARCHIVER_TOOL) r "driverlib.lib" "$(MAKEFILE_DIR)adi.obj" "$(MAKEFILE_DIR)aes.obj" "$(MAKEFILE_DIR)aon_batmon.obj" "$(MAKEFILE_DIR)aon_event.obj" "$(MAKEFILE_DIR)aon_ioc.obj" "$(MAKEFILE_DIR)aon_pmctl.obj" "$(MAKEFILE_DIR)aon_rtc.obj" "$(MAKEFILE_DIR)aux_adc.obj" "$(MAKEFILE_DIR)aux_smph.obj" "$(MAKEFILE_DIR)aux_sysif.obj" "$(MAKEFILE_DIR)aux_tdc.obj" "$(MAKEFILE_DIR)ccfgread.obj" "$(MAKEFILE_DIR)chipinfo.obj" "$(MAKEFILE_DIR)cpu.obj" "$(MAKEFILE_DIR)crypto.obj" "$(MAKEFILE_DIR)ddi.obj" "$(MAKEFILE_DIR)debug.obj" "$(MAKEFILE_DIR)driverlib_release.obj" "$(MAKEFILE_DIR)event.obj" "$(MAKEFILE_DIR)flash.obj" "$(MAKEFILE_DIR)gpio.obj" "$(MAKEFILE_DIR)i2c.obj" "$(MAKEFILE_DIR)i2s.obj" "$(MAKEFILE_DIR)interrupt.obj" "$(MAKEFILE_DIR)ioc.obj" "$(MAKEFILE_DIR)osc.obj" "$(MAKEFILE_DIR)pka.obj" "$(MAKEFILE_DIR)prcm.obj" "$(MAKEFILE_DIR)pwr_ctrl.obj" "$(MAKEFILE_DIR)rfc.obj" "$(MAKEFILE_DIR)rom_crypto.obj" "$(MAKEFILE_DIR)setup.obj" "$(MAKEFILE_DIR)setup_rom.obj" "$(MAKEFILE_DIR)sha2.obj" "$(MAKEFILE_DIR)smph.obj" "$(MAKEFILE_DIR)ssi.obj" "$(MAKEFILE_DIR)sw_chacha.obj" "$(MAKEFILE_DIR)sw_poly1305-donna.obj" "$(MAKEFILE_DIR)systick.obj" "$(MAKEFILE_DIR)sys_ctrl.obj" "$(MAKEFILE_DIR)timer.obj" "$(MAKEFILE_DIR)trng.obj" "$(MAKEFILE_DIR)uart.obj" "$(MAKEFILE_DIR)udma.obj" "$(MAKEFILE_DIR)vims.obj" "$(MAKEFILE_DIR)watchdog.obj"
@ rm -f $(MAKEFILE_DIR)*.obj
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.obj
@ rm -fR $(MAKEFILE_DIR)*.lib
@@ -1,2 +0,0 @@
COMPILER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc"
ARCHIVER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-ar"
@@ -1,115 +0,0 @@
# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
$(COMPILER_TOOL) --version
@ echo GCC: Compile adi.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "adi.o" $(MAKEFILE_DIR)../../../driverlib/adi.c
@ echo GCC: Compile aes.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aes.o" $(MAKEFILE_DIR)../../../driverlib/aes.c
@ echo GCC: Compile aon_batmon.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_batmon.o" $(MAKEFILE_DIR)../../../driverlib/aon_batmon.c
@ echo GCC: Compile aon_event.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_event.o" $(MAKEFILE_DIR)../../../driverlib/aon_event.c
@ echo GCC: Compile aon_ioc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_ioc.o" $(MAKEFILE_DIR)../../../driverlib/aon_ioc.c
@ echo GCC: Compile aon_pmctl.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_pmctl.o" $(MAKEFILE_DIR)../../../driverlib/aon_pmctl.c
@ echo GCC: Compile aon_rtc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_rtc.o" $(MAKEFILE_DIR)../../../driverlib/aon_rtc.c
@ echo GCC: Compile aux_adc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c
@ echo GCC: Compile aux_smph.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c
@ echo GCC: Compile aux_sysif.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_sysif.o" $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c
@ echo GCC: Compile aux_tdc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c
@ echo GCC: Compile ccfgread.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ccfgread.o" $(MAKEFILE_DIR)../../../driverlib/ccfgread.c
@ echo GCC: Compile chipinfo.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "chipinfo.o" $(MAKEFILE_DIR)../../../driverlib/chipinfo.c
@ echo GCC: Compile cpu.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "cpu.o" $(MAKEFILE_DIR)../../../driverlib/cpu.c
@ echo GCC: Compile crypto.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "crypto.o" $(MAKEFILE_DIR)../../../driverlib/crypto.c
@ echo GCC: Compile ddi.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ddi.o" $(MAKEFILE_DIR)../../../driverlib/ddi.c
@ echo GCC: Compile debug.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "debug.o" $(MAKEFILE_DIR)../../../driverlib/debug.c
@ echo GCC: Compile driverlib_release.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "driverlib_release.o" $(MAKEFILE_DIR)../../../driverlib/driverlib_release.c
@ echo GCC: Compile event.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "event.o" $(MAKEFILE_DIR)../../../driverlib/event.c
@ echo GCC: Compile flash.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "flash.o" $(MAKEFILE_DIR)../../../driverlib/flash.c
@ echo GCC: Compile gpio.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "gpio.o" $(MAKEFILE_DIR)../../../driverlib/gpio.c
@ echo GCC: Compile i2c.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "i2c.o" $(MAKEFILE_DIR)../../../driverlib/i2c.c
@ echo GCC: Compile i2s.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "i2s.o" $(MAKEFILE_DIR)../../../driverlib/i2s.c
@ echo GCC: Compile interrupt.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "interrupt.o" $(MAKEFILE_DIR)../../../driverlib/interrupt.c
@ echo GCC: Compile ioc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ioc.o" $(MAKEFILE_DIR)../../../driverlib/ioc.c
@ echo GCC: Compile osc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "osc.o" $(MAKEFILE_DIR)../../../driverlib/osc.c
@ echo GCC: Compile pka.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "pka.o" $(MAKEFILE_DIR)../../../driverlib/pka.c
@ echo GCC: Compile prcm.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "prcm.o" $(MAKEFILE_DIR)../../../driverlib/prcm.c
@ echo GCC: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "pwr_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c
@ echo GCC: Compile rfc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "rfc.o" $(MAKEFILE_DIR)../../../driverlib/rfc.c
@ echo GCC: Compile rom_crypto.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "rom_crypto.o" $(MAKEFILE_DIR)../../../driverlib/rom_crypto.c
@ echo GCC: Compile setup.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "setup.o" $(MAKEFILE_DIR)../../../driverlib/setup.c
@ echo GCC: Compile setup_rom.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "setup_rom.o" $(MAKEFILE_DIR)../../../driverlib/setup_rom.c
@ echo GCC: Compile sha2.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sha2.o" $(MAKEFILE_DIR)../../../driverlib/sha2.c
@ echo GCC: Compile smph.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "smph.o" $(MAKEFILE_DIR)../../../driverlib/smph.c
@ echo GCC: Compile ssi.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ssi.o" $(MAKEFILE_DIR)../../../driverlib/ssi.c
@ echo GCC: Compile sw_chacha.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sw_chacha.o" $(MAKEFILE_DIR)../../../driverlib/sw_chacha.c
@ echo GCC: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sw_poly1305-donna.o" $(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c
@ echo GCC: Compile systick.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "systick.o" $(MAKEFILE_DIR)../../../driverlib/systick.c
@ echo GCC: Compile sys_ctrl.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sys_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c
@ echo GCC: Compile timer.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "timer.o" $(MAKEFILE_DIR)../../../driverlib/timer.c
@ echo GCC: Compile trng.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "trng.o" $(MAKEFILE_DIR)../../../driverlib/trng.c
@ echo GCC: Compile uart.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "uart.o" $(MAKEFILE_DIR)../../../driverlib/uart.c
@ echo GCC: Compile udma.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "udma.o" $(MAKEFILE_DIR)../../../driverlib/udma.c
@ echo GCC: Compile vims.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "vims.o" $(MAKEFILE_DIR)../../../driverlib/vims.c
@ echo GCC: Compile watchdog.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c
@ echo GCC: Archive driverlib.lib
@ $(ARCHIVER_TOOL) rcs $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.o
@ rm -fR $(MAKEFILE_DIR)*.lib
@@ -1,3 +0,0 @@
COMPILER_TOOL = "/cygdrive/c/Program Files (x86)/IAR Systems/iar_ewarm_8_11_1/arm/bin/iccarm.exe"
ARCHIVER_TOOL = "/cygdrive/c/Program Files (x86)/IAR Systems/iar_ewarm_8_11_1/arm/bin/iarchive.exe"
OBJ_MANIP_TOOL = "/cygdrive/c/Program Files (x86)/IAR Systems/iar_ewarm_8_11_1/arm/bin/iobjmanip.exe"
@@ -1,166 +0,0 @@
# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
ifndef ADD_PARAM
ADD_PARAM=
endif
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
@ echo ADD_PARAM = \"$(ADD_PARAM)\"
$(COMPILER_TOOL) --version
@ echo IAR: Compile adi.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/adi.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)adi.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)adi.o
@ echo IAR: Compile aes.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aes.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aes.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aes.o
@ echo IAR: Compile aon_batmon.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_batmon.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_batmon.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_batmon.o
@ echo IAR: Compile aon_event.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_event.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_event.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_event.o
@ echo IAR: Compile aon_ioc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_ioc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_ioc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_ioc.o
@ echo IAR: Compile aon_pmctl.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_pmctl.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_pmctl.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_pmctl.o
@ echo IAR: Compile aon_rtc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_rtc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_rtc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aon_rtc.o
@ echo IAR: Compile aux_adc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_adc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_adc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_adc.o
@ echo IAR: Compile aux_smph.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_smph.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_smph.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_smph.o
@ echo IAR: Compile aux_sysif.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_sysif.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_sysif.o
@ echo IAR: Compile aux_tdc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_tdc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_tdc.o
@ echo IAR: Compile ccfgread.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ccfgread.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ccfgread.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)ccfgread.o
@ echo IAR: Compile chipinfo.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/chipinfo.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)chipinfo.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)chipinfo.o
@ echo IAR: Compile cpu.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/cpu.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)cpu.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)cpu.o
@ echo IAR: Compile crypto.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/crypto.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)crypto.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)crypto.o
@ echo IAR: Compile ddi.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ddi.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ddi.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)ddi.o
@ echo IAR: Compile debug.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/debug.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)debug.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)debug.o
@ echo IAR: Compile driverlib_release.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/driverlib_release.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)driverlib_release.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)driverlib_release.o
@ echo IAR: Compile event.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/event.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)event.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)event.o
@ echo IAR: Compile flash.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/flash.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)flash.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)flash.o
@ echo IAR: Compile gpio.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/gpio.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)gpio.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)gpio.o
@ echo IAR: Compile i2c.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/i2c.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)i2c.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2c.o
@ echo IAR: Compile i2s.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/i2s.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)i2s.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)i2s.o
@ echo IAR: Compile interrupt.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/interrupt.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)interrupt.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)interrupt.o
@ echo IAR: Compile ioc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ioc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ioc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)ioc.o
@ echo IAR: Compile osc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/osc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)osc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)osc.o
@ echo IAR: Compile pka.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/pka.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)pka.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)pka.o
@ echo IAR: Compile prcm.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/prcm.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)prcm.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)prcm.o
@ echo IAR: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)pwr_ctrl.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)pwr_ctrl.o
@ echo IAR: Compile rfc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/rfc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)rfc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rfc.o
@ echo IAR: Compile rom_crypto.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/rom_crypto.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)rom_crypto.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)rom_crypto.o
@ echo IAR: Compile setup.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/setup.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)setup.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup.o
@ echo IAR: Compile setup_rom.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/setup_rom.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)setup_rom.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)setup_rom.o
@ echo IAR: Compile sha2.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sha2.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sha2.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)sha2.o
@ echo IAR: Compile smph.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/smph.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)smph.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)smph.o
@ echo IAR: Compile ssi.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ssi.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ssi.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)ssi.o
@ echo IAR: Compile sw_chacha.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sw_chacha.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sw_chacha.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_chacha.o
@ echo IAR: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sw_poly1305-donna.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)sw_poly1305-donna.o
@ echo IAR: Compile systick.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/systick.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)systick.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)systick.o
@ echo IAR: Compile sys_ctrl.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sys_ctrl.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)sys_ctrl.o
@ echo IAR: Compile timer.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/timer.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)timer.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)timer.o
@ echo IAR: Compile trng.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/trng.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)trng.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)trng.o
@ echo IAR: Compile uart.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/uart.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)uart.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)uart.o
@ echo IAR: Compile udma.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/udma.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)udma.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)udma.o
@ echo IAR: Compile vims.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/vims.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)vims.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)vims.o
@ echo IAR: Compile watchdog.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/watchdog.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)watchdog.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)watchdog.o $(MAKEFILE_DIR)watchdog.o
@ echo IAR: Archive driverlib.lib
@ $(ARCHIVER_TOOL) $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o --create -o $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.o
@ rm -fR $(MAKEFILE_DIR)*.lib
@@ -1,2 +0,0 @@
COMPILER_TOOL = "/cygdrive/c/Keil_v5/ARM/ARMCC/bin/armcc"
ARCHIVER_TOOL = "/cygdrive/c/Keil_v5/ARM/ARMCC/bin/armar"
@@ -1,115 +0,0 @@
# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
$(COMPILER_TOOL) --version_number
@ echo KEIL: Compile adi.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "adi.o" $(MAKEFILE_DIR)../../../driverlib/adi.c
@ echo KEIL: Compile aes.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aes.o" $(MAKEFILE_DIR)../../../driverlib/aes.c
@ echo KEIL: Compile aon_batmon.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_batmon.o" $(MAKEFILE_DIR)../../../driverlib/aon_batmon.c
@ echo KEIL: Compile aon_event.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_event.o" $(MAKEFILE_DIR)../../../driverlib/aon_event.c
@ echo KEIL: Compile aon_ioc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_ioc.o" $(MAKEFILE_DIR)../../../driverlib/aon_ioc.c
@ echo KEIL: Compile aon_pmctl.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_pmctl.o" $(MAKEFILE_DIR)../../../driverlib/aon_pmctl.c
@ echo KEIL: Compile aon_rtc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_rtc.o" $(MAKEFILE_DIR)../../../driverlib/aon_rtc.c
@ echo KEIL: Compile aux_adc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c
@ echo KEIL: Compile aux_smph.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c
@ echo KEIL: Compile aux_sysif.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_sysif.o" $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c
@ echo KEIL: Compile aux_tdc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c
@ echo KEIL: Compile ccfgread.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ccfgread.o" $(MAKEFILE_DIR)../../../driverlib/ccfgread.c
@ echo KEIL: Compile chipinfo.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "chipinfo.o" $(MAKEFILE_DIR)../../../driverlib/chipinfo.c
@ echo KEIL: Compile cpu.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "cpu.o" $(MAKEFILE_DIR)../../../driverlib/cpu.c
@ echo KEIL: Compile crypto.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "crypto.o" $(MAKEFILE_DIR)../../../driverlib/crypto.c
@ echo KEIL: Compile ddi.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ddi.o" $(MAKEFILE_DIR)../../../driverlib/ddi.c
@ echo KEIL: Compile debug.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "debug.o" $(MAKEFILE_DIR)../../../driverlib/debug.c
@ echo KEIL: Compile driverlib_release.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "driverlib_release.o" $(MAKEFILE_DIR)../../../driverlib/driverlib_release.c
@ echo KEIL: Compile event.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "event.o" $(MAKEFILE_DIR)../../../driverlib/event.c
@ echo KEIL: Compile flash.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "flash.o" $(MAKEFILE_DIR)../../../driverlib/flash.c
@ echo KEIL: Compile gpio.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "gpio.o" $(MAKEFILE_DIR)../../../driverlib/gpio.c
@ echo KEIL: Compile i2c.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "i2c.o" $(MAKEFILE_DIR)../../../driverlib/i2c.c
@ echo KEIL: Compile i2s.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "i2s.o" $(MAKEFILE_DIR)../../../driverlib/i2s.c
@ echo KEIL: Compile interrupt.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "interrupt.o" $(MAKEFILE_DIR)../../../driverlib/interrupt.c
@ echo KEIL: Compile ioc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ioc.o" $(MAKEFILE_DIR)../../../driverlib/ioc.c
@ echo KEIL: Compile osc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "osc.o" $(MAKEFILE_DIR)../../../driverlib/osc.c
@ echo KEIL: Compile pka.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "pka.o" $(MAKEFILE_DIR)../../../driverlib/pka.c
@ echo KEIL: Compile prcm.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "prcm.o" $(MAKEFILE_DIR)../../../driverlib/prcm.c
@ echo KEIL: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "pwr_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c
@ echo KEIL: Compile rfc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "rfc.o" $(MAKEFILE_DIR)../../../driverlib/rfc.c
@ echo KEIL: Compile rom_crypto.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "rom_crypto.o" $(MAKEFILE_DIR)../../../driverlib/rom_crypto.c
@ echo KEIL: Compile setup.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "setup.o" $(MAKEFILE_DIR)../../../driverlib/setup.c
@ echo KEIL: Compile setup_rom.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "setup_rom.o" $(MAKEFILE_DIR)../../../driverlib/setup_rom.c
@ echo KEIL: Compile sha2.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sha2.o" $(MAKEFILE_DIR)../../../driverlib/sha2.c
@ echo KEIL: Compile smph.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "smph.o" $(MAKEFILE_DIR)../../../driverlib/smph.c
@ echo KEIL: Compile ssi.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ssi.o" $(MAKEFILE_DIR)../../../driverlib/ssi.c
@ echo KEIL: Compile sw_chacha.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sw_chacha.o" $(MAKEFILE_DIR)../../../driverlib/sw_chacha.c
@ echo KEIL: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sw_poly1305-donna.o" $(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c
@ echo KEIL: Compile systick.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "systick.o" $(MAKEFILE_DIR)../../../driverlib/systick.c
@ echo KEIL: Compile sys_ctrl.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sys_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c
@ echo KEIL: Compile timer.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "timer.o" $(MAKEFILE_DIR)../../../driverlib/timer.c
@ echo KEIL: Compile trng.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "trng.o" $(MAKEFILE_DIR)../../../driverlib/trng.c
@ echo KEIL: Compile uart.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "uart.o" $(MAKEFILE_DIR)../../../driverlib/uart.c
@ echo KEIL: Compile udma.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "udma.o" $(MAKEFILE_DIR)../../../driverlib/udma.c
@ echo KEIL: Compile vims.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "vims.o" $(MAKEFILE_DIR)../../../driverlib/vims.c
@ echo KEIL: Compile watchdog.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c
@ echo KEIL: Archive driverlib.lib
@ $(ARCHIVER_TOOL) --create $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.o
@ rm -fR $(MAKEFILE_DIR)*.lib
@@ -1,41 +0,0 @@
/******************************************************************************
* Filename: ccfgread.c
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: API for reading CCFG.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "ccfgread.h"
// See ccfgread.h for implementation
@@ -1,187 +0,0 @@
/******************************************************************************
* Filename: ccfgread.h
* Revised: 2016-09-13 14:21:40 +0200 (Tue, 13 Sep 2016)
* Revision: 47152
*
* Description: API for reading CCFG.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_control_group
//! @{
//! \addtogroup ccfgread_api
//! @{
//
//*****************************************************************************
#ifndef __CCFGREAD_H__
#define __CCFGREAD_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ccfg.h"
//*****************************************************************************
//
// General constants and defines
//
//*****************************************************************************
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Read DIS_GPRAM from CCFG.
//!
//! \return Value of CCFG field CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM
//
//*****************************************************************************
__STATIC_INLINE bool
CCFGRead_DIS_GPRAM( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) &
CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_M ) >>
CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_S ) ;
}
//*****************************************************************************
//
//! \brief Read EXT_LF_CLK_DIO from CCFG.
//!
//! \return Value of CCFG field CCFG_EXT_LF_CLK_DIO
//
//*****************************************************************************
__STATIC_INLINE bool
CCFGRead_EXT_LF_CLK_DIO( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_EXT_LF_CLK ) &
CCFG_EXT_LF_CLK_DIO_M ) >>
CCFG_EXT_LF_CLK_DIO_S ) ;
}
//*****************************************************************************
//
// Defines the possible values returned from CCFGRead_SCLK_LF_OPTION()
//
//*****************************************************************************
#define CCFGREAD_SCLK_LF_OPTION_XOSC_HF_DLF ( CCFG_MODE_CONF_SCLK_LF_OPTION_XOSC_HF_DLF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
#define CCFGREAD_SCLK_LF_OPTION_EXTERNAL_LF ( CCFG_MODE_CONF_SCLK_LF_OPTION_EXTERNAL_LF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
#define CCFGREAD_SCLK_LF_OPTION_XOSC_LF ( CCFG_MODE_CONF_SCLK_LF_OPTION_XOSC_LF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
#define CCFGREAD_SCLK_LF_OPTION_RCOSC_LF ( CCFG_MODE_CONF_SCLK_LF_OPTION_RCOSC_LF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
//*****************************************************************************
//
//! \brief Read SCLK_LF_OPTION from CCFG.
//!
//! \return Returns the value of the CCFG field CCFG_MODE_CONF_SCLK_LF_OPTION field.
//! Returns one of the following:
//! - \ref CCFGREAD_SCLK_LF_OPTION_XOSC_HF_DLF
//! - \ref CCFGREAD_SCLK_LF_OPTION_EXTERNAL_LF
//! - \ref CCFGREAD_SCLK_LF_OPTION_XOSC_LF
//! - \ref CCFGREAD_SCLK_LF_OPTION_RCOSC_LF
//
//*****************************************************************************
__STATIC_INLINE uint32_t
CCFGRead_SCLK_LF_OPTION( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF ) &
CCFG_MODE_CONF_SCLK_LF_OPTION_M ) >>
CCFG_MODE_CONF_SCLK_LF_OPTION_S ) ;
}
//*****************************************************************************
//
// Defines the possible values returned from CCFGRead_XOSC_FREQ()
//
//*****************************************************************************
#define CCFGREAD_XOSC_FREQ_24M ( CCFG_MODE_CONF_XOSC_FREQ_24M >> CCFG_MODE_CONF_XOSC_FREQ_S )
#define CCFGREAD_XOSC_FREQ_48M ( CCFG_MODE_CONF_XOSC_FREQ_48M >> CCFG_MODE_CONF_XOSC_FREQ_S )
#define CCFGREAD_XOSC_FREQ_HPOSC ( CCFG_MODE_CONF_XOSC_FREQ_HPOSC >> CCFG_MODE_CONF_XOSC_FREQ_S )
//*****************************************************************************
//
//! \brief Read XOSC_FREQ setting CCFG.
//!
//! \return Returns the value of the CCFG_MODE_CONF_XOSC_FREQ field.
//! Returns one of the following:
//! - \ref CCFGREAD_XOSC_FREQ_24M
//! - \ref CCFGREAD_XOSC_FREQ_48M
//! - \ref CCFGREAD_XOSC_FREQ_HPOSC
//!
//
//*****************************************************************************
__STATIC_INLINE uint32_t
CCFGRead_XOSC_FREQ( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF ) &
CCFG_MODE_CONF_XOSC_FREQ_M ) >>
CCFG_MODE_CONF_XOSC_FREQ_S ) ;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_SMPH_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************

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