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spinel: Update GPIO interface to improve capabilities. (#1023)

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Replaces `PROP_GPIO_AVAILABLE` and `PROP_GPIO_DIRECTION` with a new
`PROP_GPIO_CONFIG` property which has support for configuring a larger
set of GPIO features which may be present on the NCP.

These changes were inspired by feedback from Duane Ellis.
This commit is contained in:
Robert Quattlebaum
2016-11-30 18:35:34 -08:00
committed by Jonathan Hui
parent 0d02fb57c0
commit ef7ccfb588
6 changed files with 714 additions and 441 deletions
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doc/draft-spinel-protocol.html
+83 -30
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@@ -517,13 +517,12 @@
<link href="#rfc.section.10.1.3" rel="Chapter" title="10.1.3 PROP 4610: PROP_JAM_DETECT_RSSI_THRESHOLD"/>
<link href="#rfc.section.10.1.4" rel="Chapter" title="10.1.4 PROP 4611: PROP_JAM_DETECT_WINDOW"/>
<link href="#rfc.section.10.1.5" rel="Chapter" title="10.1.5 PROP 4612: PROP_JAM_DETECT_BUSY"/>
<link href="#rfc.section.11" rel="Chapter" title="11 Feature: Basic GPIO Access"/>
<link href="#rfc.section.11" rel="Chapter" title="11 Feature: GPIO Access"/>
<link href="#rfc.section.11.1" rel="Chapter" title="11.1 Properties"/>
<link href="#rfc.section.11.1.1" rel="Chapter" title="11.1.1 PROP 4096: PROP_GPIO_AVAILABLE"/>
<link href="#rfc.section.11.1.2" rel="Chapter" title="11.1.2 PROP 4097: PROP_GPIO_DIRECTION"/>
<link href="#rfc.section.11.1.3" rel="Chapter" title="11.1.3 PROP 4098: PROP_GPIO_STATE"/>
<link href="#rfc.section.11.1.4" rel="Chapter" title="11.1.4 PROP 4099: PROP_GPIO_STATE_SET"/>
<link href="#rfc.section.11.1.5" rel="Chapter" title="11.1.5 PROP 4100: PROP_GPIO_STATE_CLEAR"/>
<link href="#rfc.section.11.1.1" rel="Chapter" title="11.1.1 PROP 4096: PROP_GPIO_CONFIG"/>
<link href="#rfc.section.11.1.2" rel="Chapter" title="11.1.2 PROP 4098: PROP_GPIO_STATE"/>
<link href="#rfc.section.11.1.3" rel="Chapter" title="11.1.3 PROP 4099: PROP_GPIO_STATE_SET"/>
<link href="#rfc.section.11.1.4" rel="Chapter" title="11.1.4 PROP 4100: PROP_GPIO_STATE_CLEAR"/>
<link href="#rfc.section.12" rel="Chapter" title="12 Security Considerations"/>
<link href="#rfc.section.12.1" rel="Chapter" title="12.1 Raw Application Access"/>
<link href="#rfc.appendix.A" rel="Chapter" title="A Framing Protocol"/>
@@ -567,8 +566,8 @@
<link rel="schema.dct" href="http://purl.org/dc/terms/" />
<meta name="dct.creator" content="Quattlebaum, R." />
<meta name="dct.identifier" content="urn:ietf:id:draft-spinel-protocol-05367497d" />
<meta name="dct.issued" scheme="ISO8601" content="2016-11-28" />
<meta name="dct.identifier" content="urn:ietf:id:draft-spinel-protocol-29f5b2c82" />
<meta name="dct.issued" scheme="ISO8601" content="2016-11-30" />
<meta name="dct.abstract" content="This document describes a general management protocol for enabling a host device to communicate with and manage a Network Control Processor (NCP). " />
<meta name="description" content="This document describes a general management protocol for enabling a host device to communicate with and manage a Network Control Processor (NCP). " />
@@ -589,7 +588,7 @@
</tr>
<tr>
<td class="left"></td>
<td class="right">November 28, 2016</td>
<td class="right">November 30, 2016</td>
</tr>
@@ -597,7 +596,7 @@
</table>
<p class="title">Spinel Host-Controller Protocol<br />
<span class="filename">draft-spinel-protocol-05367497d</span></p>
<span class="filename">draft-spinel-protocol-29f5b2c82</span></p>
<h1 id="rfc.abstract">
<a href="#rfc.abstract">Abstract</a>
@@ -775,13 +774,12 @@
<li>10.1.3. <a href="#rfc.section.10.1.3">PROP 4610: PROP_JAM_DETECT_RSSI_THRESHOLD</a></li>
<li>10.1.4. <a href="#rfc.section.10.1.4">PROP 4611: PROP_JAM_DETECT_WINDOW</a></li>
<li>10.1.5. <a href="#rfc.section.10.1.5">PROP 4612: PROP_JAM_DETECT_BUSY</a></li>
</ul></ul><li>11. <a href="#rfc.section.11">Feature: Basic GPIO Access</a></li>
</ul></ul><li>11. <a href="#rfc.section.11">Feature: GPIO Access</a></li>
<ul><li>11.1. <a href="#rfc.section.11.1">Properties</a></li>
<ul><li>11.1.1. <a href="#rfc.section.11.1.1">PROP 4096: PROP_GPIO_AVAILABLE</a></li>
<li>11.1.2. <a href="#rfc.section.11.1.2">PROP 4097: PROP_GPIO_DIRECTION</a></li>
<li>11.1.3. <a href="#rfc.section.11.1.3">PROP 4098: PROP_GPIO_STATE</a></li>
<li>11.1.4. <a href="#rfc.section.11.1.4">PROP 4099: PROP_GPIO_STATE_SET</a></li>
<li>11.1.5. <a href="#rfc.section.11.1.5">PROP 4100: PROP_GPIO_STATE_CLEAR</a></li>
<ul><li>11.1.1. <a href="#rfc.section.11.1.1">PROP 4096: PROP_GPIO_CONFIG</a></li>
<li>11.1.2. <a href="#rfc.section.11.1.2">PROP 4098: PROP_GPIO_STATE</a></li>
<li>11.1.3. <a href="#rfc.section.11.1.3">PROP 4099: PROP_GPIO_STATE_SET</a></li>
<li>11.1.4. <a href="#rfc.section.11.1.4">PROP 4100: PROP_GPIO_STATE_CLEAR</a></li>
</ul></ul><li>12. <a href="#rfc.section.12">Security Considerations</a></li>
<ul><li>12.1. <a href="#rfc.section.12.1">Raw Application Access</a></li>
</ul><li>Appendix A. <a href="#rfc.appendix.A">Framing Protocol</a></li>
@@ -1826,6 +1824,7 @@ STACK-NAME/STACK-VERSION[BUILD_INFO][; OTHER_INFO]; BUILD_DATE_AND_TIME
<li>6: <samp>CAP_JAM_DETECT</samp>: Jamming detection. See <a href="#feature-jam-detect">Section 10</a></li>
<li>7: <samp>CAP_PEEK_POKE</samp>: PEEK/POKE debugging commands.</li>
<li>8: <samp>CAP_WRITABLE_RAW_STREAM</samp>: <samp>PROP_STREAM_RAW</samp> is writable.</li>
<li>9: <samp>CAP_GPIO</samp>: Support for GPIO access. See <a href="#feature-gpio-access">Section 11</a>.</li>
<li>16: <samp>CAP_802_15_4_2003</samp></li>
<li>17: <samp>CAP_802_15_4_2006</samp></li>
<li>18: <samp>CAP_802_15_4_2011</samp></li>
@@ -3302,28 +3301,52 @@ STACK-NAME/STACK-VERSION[BUILD_INFO][; OTHER_INFO]; BUILD_DATE_AND_TIME
<p> </p>
<p id="rfc.section.10.1.5.p.2">This parameter describes the number of aggregate seconds within the detection window where the RSSI must be above <samp>PROP_JAM_DETECT_RSSI_THRESHOLD</samp> to trigger detection. </p>
<p id="rfc.section.10.1.5.p.3">The behavior of the jamming detection feature when <samp>PROP_JAM_DETECT_BUSY</samp> is larger than <samp>PROP_JAM_DETECT_WINDOW</samp> is undefined. </p>
<h1 id="rfc.section.11"><a href="#rfc.section.11">11.</a> <a href="#feature-basic-gpio-access" id="feature-basic-gpio-access">Feature: Basic GPIO Access</a></h1>
<p id="rfc.section.11.p.1">The length of the data associated with these properties depends on the number of GPIOs. If you have 10 GPIOs, you'd have two bytes. You determine the number of GPIOs available by examining PROP_GPIO_AVAILABLE, described below. This API isn't intended to support every possible GPIO state, it is intended for basic reading and writing. </p>
<h1 id="rfc.section.11"><a href="#rfc.section.11">11.</a> <a href="#feature-gpio-access" id="feature-gpio-access">Feature: GPIO Access</a></h1>
<p id="rfc.section.11.p.1">This feature allows the host to have control over some or all of the GPIO pins on the NCP. The host can determine which GPIOs are available by examining <samp>PROP_GPIO_CONFIG</samp>, described below. This API supports a maximum of 256 individual GPIO pins. </p>
<p id="rfc.section.11.p.2">Support for this feature can be determined by the presence of <samp>CAP_GPIO</samp>. </p>
<h1 id="rfc.section.11.1"><a href="#rfc.section.11.1">11.1.</a> <a href="#properties-3" id="properties-3">Properties</a></h1>
<h1 id="rfc.section.11.1.1"><a href="#rfc.section.11.1.1">11.1.1.</a> <a href="#prop-4096-propgpioavailable" id="prop-4096-propgpioavailable">PROP 4096: PROP_GPIO_AVAILABLE</a></h1>
<h1 id="rfc.section.11.1.1"><a href="#rfc.section.11.1.1">11.1.1.</a> <a href="#prop-4096-propgpioconfig" id="prop-4096-propgpioconfig">PROP 4096: PROP_GPIO_CONFIG</a></h1>
<p/>
<ul>
<li>Type: Read-only</li>
<li>Argument-Encoding: <samp>A(CCU)</samp></li>
<li>Type: Read-write (Writable only using <samp>CMD_PROP_VALUE_INSERT</samp>, <a href="#prop-value-insert">Section 4.5</a>)</li>
</ul>
<p> </p>
<p id="rfc.section.11.1.1.p.2">Contains a bit field identifying which GPIOs are supported. Cleared bits are not supported. Set bits are supported. </p>
<h1 id="rfc.section.11.1.2"><a href="#rfc.section.11.1.2">11.1.2.</a> <a href="#prop-4097-propgpiodirection" id="prop-4097-propgpiodirection">PROP 4097: PROP_GPIO_DIRECTION</a></h1>
<p id="rfc.section.11.1.1.p.2">An array of structures which contain the following fields: </p>
<p/>
<ul>
<li>Type: Read-only (Optionally read/write)</li>
<li><samp>C</samp>: GPIO Number</li>
<li><samp>C</samp>: GPIO Configuration Flags</li>
<li><samp>U</samp>: Human-readable GPIO name</li>
</ul>
<p> </p>
<p id="rfc.section.11.1.2.p.2">Contains a bit field identifying which GPIOs are configured as outputs. Cleared bits are inputs. Set bits are outputs. </p>
<h1 id="rfc.section.11.1.3"><a href="#rfc.section.11.1.3">11.1.3.</a> <a href="#prop-4098-propgpiostate" id="prop-4098-propgpiostate">PROP 4098: PROP_GPIO_STATE</a></h1>
<p id="rfc.section.11.1.1.p.4">GPIOs which do not have a corresponding entry are not supported. </p>
<p id="rfc.section.11.1.1.p.5">The configuration parameter contains the configuration flags for the GPIO: </p>
<pre>
0 1 2 3 4 5 6 7
+---+---+---+---+---+---+---+---+
|DIR|PUP|PDN|TRIGGER| RESERVED |
+---+---+---+---+---+---+---+---+
|O/D|
+---+
</pre>
<p/>
<ul>
<li><samp>DIR</samp>: Pin direction. Clear (0) for input, set (1) for output.</li>
<li><samp>PUP</samp>: Pull-up enabled flag.</li>
<li><samp>PDN</samp>/<samp>O/D</samp>: Flag meaning depends on pin direction: <ul><li>Input: Pull-down enabled.</li><li>Output: Output is an open-drain.</li></ul></li>
<li><samp>TRIGGER</samp>: Enumeration describing how pin changes generate asynchronous notification commands (TBD) from the NCP to the host. <ul><li>0: Feature disabled for this pin</li><li>1: Trigger on falling edge</li><li>2: Trigger on rising edge</li><li>3: Trigger on level change</li></ul></li>
<li><samp>RESERVED</samp>: Bits reserved for future use. Always cleared to zero and ignored when read.</li>
</ul>
<p> </p>
<p id="rfc.section.11.1.1.p.7">As an optional feature, the configuration of individual pins may be modified using the <samp>CMD_PROP_VALUE_INSERT</samp> command. Only the GPIO number and flags fields MUST be present, the GPIO name (if present) would be ignored. This command can only be used to modify the configuration of GPIOs which are already exposed---it cannot be used by the host to add addional GPIOs. </p>
<h1 id="rfc.section.11.1.2"><a href="#rfc.section.11.1.2">11.1.2.</a> <a href="#prop-4098-propgpiostate" id="prop-4098-propgpiostate">PROP 4098: PROP_GPIO_STATE</a></h1>
<p/>
<ul>
@@ -3331,8 +3354,36 @@ STACK-NAME/STACK-VERSION[BUILD_INFO][; OTHER_INFO]; BUILD_DATE_AND_TIME
</ul>
<p> </p>
<p id="rfc.section.11.1.3.p.2">Contains a bit field identifying the state of the GPIOs. For GPIOs configured as inputs, this is the read logic level. For GPIOs configured as outputs, this is the logic level of the output. </p>
<h1 id="rfc.section.11.1.4"><a href="#rfc.section.11.1.4">11.1.4.</a> <a href="#prop-4099-propgpiostateset" id="prop-4099-propgpiostateset">PROP 4099: PROP_GPIO_STATE_SET</a></h1>
<p id="rfc.section.11.1.2.p.2">Contains a bit field identifying the state of the GPIOs. The length of the data associated with these properties depends on the number of GPIOs. If you have 10 GPIOs, you'd have two bytes. GPIOs are numbered from most significant bit to least significant bit, so 0x80 is GPIO 0, 0x40 is GPIO 1, etc. </p>
<p id="rfc.section.11.1.2.p.3">For GPIOs configured as inputs: </p>
<p/>
<ul>
<li><samp>CMD_PROP_VAUE_GET</samp>: The value of the associated bit describes the logic level read from the pin.</li>
<li><samp>CMD_PROP_VALUE_SET</samp>: The value of the associated bit is ignored for these pins.</li>
</ul>
<p> </p>
<p id="rfc.section.11.1.2.p.5">For GPIOs configured as outputs: </p>
<p/>
<ul>
<li><samp>CMD_PROP_VAUE_GET</samp>: The value of the associated bit is implementation specific.</li>
<li><samp>CMD_PROP_VALUE_SET</samp>: The value of the associated bit determines the new logic level of the output. If this pin is configured as an open-drain, setting the associated bit to 1 will cause the pin to enter a Hi-Z state.</li>
</ul>
<p> </p>
<p id="rfc.section.11.1.2.p.7">For GPIOs which are not specified in <samp>PROP_GPIO_CONFIG</samp>: </p>
<p/>
<ul>
<li><samp>CMD_PROP_VAUE_GET</samp>: The value of the associated bit is implementation specific.</li>
<li><samp>CMD_PROP_VALUE_SET</samp>: The value of the associated bit MUST be ignored by the NCP.</li>
</ul>
<p> </p>
<p id="rfc.section.11.1.2.p.9">When writing, unspecified bits are assumed to be zero. </p>
<h1 id="rfc.section.11.1.3"><a href="#rfc.section.11.1.3">11.1.3.</a> <a href="#prop-4099-propgpiostateset" id="prop-4099-propgpiostateset">PROP 4099: PROP_GPIO_STATE_SET</a></h1>
<p/>
<ul>
@@ -3340,8 +3391,9 @@ STACK-NAME/STACK-VERSION[BUILD_INFO][; OTHER_INFO]; BUILD_DATE_AND_TIME
</ul>
<p> </p>
<p id="rfc.section.11.1.4.p.2">Allows for the state of various output GPIOs to be set without affecting other GPIO states. Contains a bit field identifying the output GPIOs that should have their state set to 1. </p>
<h1 id="rfc.section.11.1.5"><a href="#rfc.section.11.1.5">11.1.5.</a> <a href="#prop-4100-propgpiostateclear" id="prop-4100-propgpiostateclear">PROP 4100: PROP_GPIO_STATE_CLEAR</a></h1>
<p id="rfc.section.11.1.3.p.2">Allows for the state of various output GPIOs to be set without affecting other GPIO states. Contains a bit field identifying the output GPIOs that should have their state set to 1. </p>
<p id="rfc.section.11.1.3.p.3">When writing, unspecified bits are assumed to be zero. The value of any bits for GPIOs which are not specified in <samp>PROP_GPIO_CONFIG</samp> MUST be ignored. </p>
<h1 id="rfc.section.11.1.4"><a href="#rfc.section.11.1.4">11.1.4.</a> <a href="#prop-4100-propgpiostateclear" id="prop-4100-propgpiostateclear">PROP 4100: PROP_GPIO_STATE_CLEAR</a></h1>
<p/>
<ul>
@@ -3349,7 +3401,8 @@ STACK-NAME/STACK-VERSION[BUILD_INFO][; OTHER_INFO]; BUILD_DATE_AND_TIME
</ul>
<p> </p>
<p id="rfc.section.11.1.5.p.2">Allows for the state of various output GPIOs to be cleared without affecting other GPIO states. Contains a bit field identifying the output GPIOs that should have their state cleared to 0. </p>
<p id="rfc.section.11.1.4.p.2">Allows for the state of various output GPIOs to be cleared without affecting other GPIO states. Contains a bit field identifying the output GPIOs that should have their state cleared to 0. </p>
<p id="rfc.section.11.1.4.p.3">When writing, unspecified bits are assumed to be zero. The value of any bits for GPIOs which are not specified in <samp>PROP_GPIO_CONFIG</samp> MUST be ignored. </p>
<h1 id="rfc.section.12"><a href="#rfc.section.12">12.</a> <a href="#security-considerations" id="security-considerations">Security Considerations</a></h1>
<h1 id="rfc.section.12.1"><a href="#rfc.section.12.1">12.1.</a> <a href="#raw-application-access" id="raw-application-access">Raw Application Access</a></h1>
<p id="rfc.section.12.1.p.1">Spinel MAY be used as an API boundary for allowing processes to configure the NCP. However, such a system MUST NOT give unprivileged processess the ability to send or receive arbitrary command frames to the NCP. Only the specific commands and properties that are required should be allowed to be passed, and then only after being checked for proper format. </p>
doc/draft-spinel-protocol.txt
+420 -364
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doc/spinel-protocol-src/spinel-feature-gpio.md
+97 -30
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@@ -1,47 +1,114 @@
# Feature: Basic GPIO Access
# Feature: GPIO Access {#feature-gpio-access}
The length of the data associated with these properties depends on the
number of GPIOs. If you have 10 GPIOs, you'd have two bytes. You determine
the number of GPIOs available by examining PROP_GPIO_AVAILABLE, described
below. This API isn't intended to support every possible GPIO state, it is
intended for basic reading and writing.
This feature allows the host to have control over some or all of the
GPIO pins on the NCP. The host can determine which GPIOs are available
by examining `PROP_GPIO_CONFIG`, described below. This API supports a
maximum of 256 individual GPIO pins.
## Properties
Support for this feature can be determined by the presence of `CAP_GPIO`.
### PROP 4096: PROP_GPIO_AVAILABLE
## Properties ##
* Type: Read-only
### PROP 4096: PROP\_GPIO\_CONFIG ###
Contains a bit field identifying which GPIOs are supported. Cleared bits
are not supported. Set bits are supported.
* Argument-Encoding: `A(CCU)`
* Type: Read-write (Writable only using `CMD_PROP_VALUE_INSERT`,
(#prop-value-insert))
### PROP 4097: PROP_GPIO_DIRECTION
An array of structures which contain the following fields:
* Type: Read-only (Optionally read/write)
* `C`: GPIO Number
* `C`: GPIO Configuration Flags
* `U`: Human-readable GPIO name
Contains a bit field identifying which GPIOs are configured as outputs.
Cleared bits are inputs. Set bits are outputs.
GPIOs which do not have a corresponding entry are not supported.
### PROP 4098: PROP_GPIO_STATE
The configuration parameter contains the configuration flags for the
GPIO:
* Type: Read-Write
0 1 2 3 4 5 6 7
+---+---+---+---+---+---+---+---+
|DIR|PUP|PDN|TRIGGER| RESERVED |
+---+---+---+---+---+---+---+---+
|O/D|
+---+
Contains a bit field identifying the state of the GPIOs. For GPIOs
configured as inputs, this is the read logic level. For GPIOs configured
as outputs, this is the logic level of the output.
* `DIR`: Pin direction. Clear (0) for input, set (1) for output.
* `PUP`: Pull-up enabled flag.
* `PDN`/`O/D`: Flag meaning depends on pin direction:
* Input: Pull-down enabled.
* Output: Output is an open-drain.
* `TRIGGER`: Enumeration describing how pin changes generate
asynchronous notification commands (TBD) from the NCP to the host.
* 0: Feature disabled for this pin
* 1: Trigger on falling edge
* 2: Trigger on rising edge
* 3: Trigger on level change
* `RESERVED`: Bits reserved for future use. Always cleared to zero
and ignored when read.
### PROP 4099: PROP_GPIO_STATE_SET
As an optional feature, the configuration of individual pins may be
modified using the `CMD_PROP_VALUE_INSERT` command. Only the GPIO
number and flags fields MUST be present, the GPIO name (if present)
would be ignored. This command can only be used to modify the
configuration of GPIOs which are already exposed---it cannot be used
by the host to add addional GPIOs.
* Type: Write-only
### PROP 4098: PROP\_GPIO\_STATE ###
Allows for the state of various output GPIOs to be set without affecting
other GPIO states. Contains a bit field identifying the output GPIOs that
should have their state set to 1.
* Type: Read-Write
### PROP 4100: PROP_GPIO_STATE_CLEAR
Contains a bit field identifying the state of the GPIOs. The length of
the data associated with these properties depends on the number of
GPIOs. If you have 10 GPIOs, you'd have two bytes. GPIOs are numbered
from most significant bit to least significant bit, so 0x80 is GPIO 0,
0x40 is GPIO 1, etc.
* Type: Write-only
For GPIOs configured as inputs:
Allows for the state of various output GPIOs to be cleared without affecting
other GPIO states. Contains a bit field identifying the output GPIOs that
should have their state cleared to 0.
* `CMD_PROP_VAUE_GET`: The value of the associated bit describes the
logic level read from the pin.
* `CMD_PROP_VALUE_SET`: The value of the associated bit is ignored
for these pins.
For GPIOs configured as outputs:
* `CMD_PROP_VAUE_GET`: The value of the associated bit is
implementation specific.
* `CMD_PROP_VALUE_SET`: The value of the associated bit determines
the new logic level of the output. If this pin is configured as an
open-drain, setting the associated bit to 1 will cause the pin to
enter a Hi-Z state.
For GPIOs which are not specified in `PROP_GPIO_CONFIG`:
* `CMD_PROP_VAUE_GET`: The value of the associated bit is
implementation specific.
* `CMD_PROP_VALUE_SET`: The value of the associated bit MUST be
ignored by the NCP.
When writing, unspecified bits are assumed to be zero.
### PROP 4099: PROP\_GPIO\_STATE\_SET ###
* Type: Write-only
Allows for the state of various output GPIOs to be set without
affecting other GPIO states. Contains a bit field identifying the
output GPIOs that should have their state set to 1.
When writing, unspecified bits are assumed to be zero. The value of
any bits for GPIOs which are not specified in `PROP_GPIO_CONFIG` MUST
be ignored.
### PROP 4100: PROP\_GPIO\_STATE\_CLEAR ###
* Type: Write-only
Allows for the state of various output GPIOs to be cleared without
affecting other GPIO states. Contains a bit field identifying the
output GPIOs that should have their state cleared to 0.
When writing, unspecified bits are assumed to be zero. The value of
any bits for GPIOs which are not specified in `PROP_GPIO_CONFIG` MUST
be ignored.
doc/spinel-protocol-src/spinel-prop-core.md
+1
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@@ -131,6 +131,7 @@ Currently defined values are:
* 6: `CAP_JAM_DETECT`: Jamming detection. See (#feature-jam-detect)
* 7: `CAP_PEEK_POKE`: PEEK/POKE debugging commands.
* 8: `CAP_WRITABLE_RAW_STREAM`: `PROP_STREAM_RAW` is writable.
* 9: `CAP_GPIO`: Support for GPIO access. See (#feature-gpio-access).
* 16: `CAP_802_15_4_2003`
* 17: `CAP_802_15_4_2006`
* 18: `CAP_802_15_4_2011`
src/ncp/spinel.c
+16
View File
@@ -1209,6 +1209,22 @@ spinel_prop_key_to_cstr(spinel_prop_key_t prop_key)
ret = "PROP_JAM_DETECT_WINDOW";
break;
case SPINEL_PROP_GPIO_CONFIG:
ret = "PROP_GPIO_CONFIG";
break;
case SPINEL_PROP_GPIO_STATE:
ret = "PROP_GPIO_STATE";
break;
case SPINEL_PROP_GPIO_STATE_SET:
ret = "PROP_GPIO_STATE_SET";
break;
case SPINEL_PROP_GPIO_STATE_CLEAR:
ret = "PROP_GPIO_STATE_CLEAR";
break;
default:
break;
}
src/ncp/spinel.h
+97 -17
View File
@@ -73,6 +73,10 @@
#define SPINEL_FRAME_MAX_SIZE 1300
/// Macro for generating bit masks using bit index from the spec
#define SPINEL_BIT_MASK(bit_index,field_bit_count) \
( (1 << ((field_bit_count) - 1)) >> (bit_index))
// ----------------------------------------------------------------------------
__BEGIN_DECLS
@@ -195,6 +199,19 @@ enum {
SPINEL_NET_FLAG_PREFERENCE_MASK = (3 << SPINEL_NET_FLAG_PREFERENCE_OFFSET),
};
enum {
SPINEL_GPIO_FLAG_DIR_INPUT = 0,
SPINEL_GPIO_FLAG_DIR_OUTPUT = SPINEL_BIT_MASK(0, 8),
SPINEL_GPIO_FLAG_PULL_UP = SPINEL_BIT_MASK(1, 8),
SPINEL_GPIO_FLAG_PULL_DOWN = SPINEL_BIT_MASK(2, 8),
SPINEL_GPIO_FLAG_OPEN_DRAIN = SPINEL_BIT_MASK(2, 8),
SPINEL_GPIO_FLAG_TRIGGER_NONE = 0,
SPINEL_GPIO_FLAG_TRIGGER_RISING = SPINEL_BIT_MASK(3, 8),
SPINEL_GPIO_FLAG_TRIGGER_FALLING = SPINEL_BIT_MASK(4, 8),
SPINEL_GPIO_FLAG_TRIGGER_ANY = SPINEL_GPIO_FLAG_TRIGGER_RISING
| SPINEL_GPIO_FLAG_TRIGGER_FALLING,
};
enum
{
SPINEL_PROTOCOL_TYPE_BOOTLOADER = 0,
@@ -292,6 +309,7 @@ enum
SPINEL_CAP_PEEK_POKE = 7,
SPINEL_CAP_WRITABLE_RAW_STREAM = 8,
SPINEL_CAP_GPIO = 9,
SPINEL_CAP_802_15_4__BEGIN = 16,
SPINEL_CAP_802_15_4_2003 = (SPINEL_CAP_802_15_4__BEGIN + 0),
@@ -350,31 +368,85 @@ typedef enum
SPINEL_PROP_BASE_EXT__BEGIN = 0x1000,
/// Available GPIO Bitmask
/** Format: `D`
* Type: Read-Only
/// GPIO Configuration
/** Format: `A(CCU)`
* Type: Read-Only (Optionally Read-write using `CMD_PROP_VALUE_INSERT`)
*
* Contains a bit field identifying which GPIOs are supported. Cleared bits
* are not supported. Set bits are supported.
*/
SPINEL_PROP_GPIO_AVAILABLE = SPINEL_PROP_BASE_EXT__BEGIN + 0,
/// GPIO Direction Bitmask
/** Format: `D`
* Type: Read-only (Optionally read/write)
* An array of structures which contain the following fields:
*
* Contains a bit field identifying which GPIOs are configured as outputs.
* Cleared bits are inputs. Set bits are outputs.
* * `C`: GPIO Number
* * `C`: GPIO Configuration Flags
* * `U`: Human-readable GPIO name
*
* GPIOs which do not have a corresponding entry are not supported.
*
* The configuration parameter contains the configuration flags for the
* GPIO:
*
* 0 1 2 3 4 5 6 7
* +---+---+---+---+---+---+---+---+
* |DIR|PUP|PDN|TRIGGER| RESERVED |
* +---+---+---+---+---+---+---+---+
* |O/D|
* +---+
*
* * `DIR`: Pin direction. Clear (0) for input, set (1) for output.
* * `PUP`: Pull-up enabled flag.
* * `PDN`/`O/D`: Flag meaning depends on pin direction:
* * Input: Pull-down enabled.
* * Output: Output is an open-drain.
* * `TRIGGER`: Enumeration describing how pin changes generate
* asynchronous notification commands (TBD) from the NCP to the host.
* * 0: Feature disabled for this pin
* * 1: Trigger on falling edge
* * 2: Trigger on rising edge
* * 3: Trigger on level change
* * `RESERVED`: Bits reserved for future use. Always cleared to zero
* and ignored when read.
*
* As an optional feature, the configuration of individual pins may be
* modified using the `CMD_PROP_VALUE_INSERT` command. Only the GPIO
* number and flags fields MUST be present, the GPIO name (if present)
* would be ignored. This command can only be used to modify the
* configuration of GPIOs which are already exposed---it cannot be used
* by the host to add addional GPIOs.
*/
SPINEL_PROP_GPIO_DIRECTION = SPINEL_PROP_BASE_EXT__BEGIN + 1,
SPINEL_PROP_GPIO_CONFIG = SPINEL_PROP_BASE_EXT__BEGIN + 0,
/// GPIO State Bitmask
/** Format: `D`
* Type: Read-Write
*
* Contains a bit field identifying the state of the GPIOs. For GPIOs
* configured as inputs, this is the read logic level. For GPIOs configured
* as outputs, this is the logic level of the output.
* Contains a bit field identifying the state of the GPIOs. The length of
* the data associated with these properties depends on the number of
* GPIOs. If you have 10 GPIOs, you'd have two bytes. GPIOs are numbered
* from most significant bit to least significant bit, so 0x80 is GPIO 0,
* 0x40 is GPIO 1, etc.
*
* For GPIOs configured as inputs:
*
* * `CMD_PROP_VAUE_GET`: The value of the associated bit describes the
* logic level read from the pin.
* * `CMD_PROP_VALUE_SET`: The value of the associated bit is ignored
* for these pins.
*
* For GPIOs configured as outputs:
*
* * `CMD_PROP_VAUE_GET`: The value of the associated bit is
* implementation specific.
* * `CMD_PROP_VALUE_SET`: The value of the associated bit determines
* the new logic level of the output. If this pin is configured as an
* open-drain, setting the associated bit to 1 will cause the pin to
* enter a Hi-Z state.
*
* For GPIOs which are not specified in `PROP_GPIO_CONFIG`:
*
* * `CMD_PROP_VAUE_GET`: The value of the associated bit is
* implementation specific.
* * `CMD_PROP_VALUE_SET`: The value of the associated bit MUST be
* ignored by the NCP.
*
* When writing, unspecified bits are assumed to be zero.
*/
SPINEL_PROP_GPIO_STATE = SPINEL_PROP_BASE_EXT__BEGIN + 2,
@@ -385,6 +457,10 @@ typedef enum
* Allows for the state of various output GPIOs to be set without affecting
* other GPIO states. Contains a bit field identifying the output GPIOs that
* should have their state set to 1.
*
* When writing, unspecified bits are assumed to be zero. The value of
* any bits for GPIOs which are not specified in `PROP_GPIO_CONFIG` MUST
* be ignored.
*/
SPINEL_PROP_GPIO_STATE_SET = SPINEL_PROP_BASE_EXT__BEGIN + 3,
@@ -395,6 +471,10 @@ typedef enum
* Allows for the state of various output GPIOs to be cleared without affecting
* other GPIO states. Contains a bit field identifying the output GPIOs that
* should have their state cleared to 0.
*
* When writing, unspecified bits are assumed to be zero. The value of
* any bits for GPIOs which are not specified in `PROP_GPIO_CONFIG` MUST
* be ignored.
*/
SPINEL_PROP_GPIO_STATE_CLEAR = SPINEL_PROP_BASE_EXT__BEGIN + 4,