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47 lines
1.5 KiB
C++
47 lines
1.5 KiB
C++
/*
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* SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#pragma once
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#include <cstdint>
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#include <optional>
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namespace tensorrt_llm::common
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{
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// XQA kernels (optimized kernels for generation phase).
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bool forceXQAKernels();
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// max number of CTAs for each KV head, multiple CTAs for one KV head is multi-block mode.
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// this number defines the maximum number when reaches both max_batch_size and max_beam_width.
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// If batch_size or beam_width doesn't reach maximum value, it is possible to have more CTAs per KV head than this
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// value.
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int32_t xqaMaxNbCtaPerKVHeadFactor();
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std::optional<int32_t> envXqaNbCtaPerKVHead();
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// Whether XQA JIT is disabled.
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bool getEnvDisableXQAJIT();
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// Tune the number of blocks per sequence for accuracy/performance purpose.
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bool getEnvMmhaMultiblockDebug();
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int getEnvMmhaBlocksPerSequence();
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int getEnvMmhaKernelBlockSize();
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} // namespace tensorrt_llm::common
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