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https://github.com/ggml-org/llama.cpp.git
synced 2026-07-11 13:40:21 +00:00
metal : add CONV_2D_DW (depthwise convolution) support (#21565)
This commit is contained in:
Georgi Gerganov
@@ -435,6 +435,202 @@ kernel void kernel_conv_transpose_2d<half>(
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]);
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// grid: x = C tile, y = OH, z = OW * N (for channel-contiguous layouts)
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template <typename TK>
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kernel void kernel_conv_2d_dw_tiled(
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constant ggml_metal_kargs_conv_2d_dw & args,
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device const char * weights,
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device const char * src,
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device char * dst,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]) {
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const int32_t c = (int32_t)(tgpig.x * ntg.x + tpitg.x);
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if (c >= args.C) {
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return;
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}
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const int32_t oh = tgpig.y;
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const int32_t own = tgpig.z;
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const int32_t ow = own % args.OW;
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const int32_t n = own / args.OW;
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const int32_t base_y = oh*args.s1 - args.p1;
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int32_t ky_start = 0;
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if (base_y < 0) {
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ky_start = (-base_y + args.d1 - 1)/args.d1;
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}
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int32_t ky_end = args.KH;
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const int32_t y_max = args.IH - 1 - base_y;
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if (y_max < 0) {
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ky_end = ky_start;
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} else if (base_y + (args.KH - 1)*args.d1 >= args.IH) {
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ky_end = min(ky_end, y_max/args.d1 + 1);
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}
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const int32_t base_x = ow*args.s0 - args.p0;
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int32_t kx_start = 0;
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if (base_x < 0) {
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kx_start = (-base_x + args.d0 - 1)/args.d0;
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}
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int32_t kx_end = args.KW;
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const int32_t x_max = args.IW - 1 - base_x;
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if (x_max < 0) {
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kx_end = kx_start;
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} else if (base_x + (args.KW - 1)*args.d0 >= args.IW) {
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kx_end = min(kx_end, x_max/args.d0 + 1);
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}
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float acc = 0.0f;
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if (ky_start < ky_end && kx_start < kx_end) {
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const uint64_t w_base = (uint64_t) c * args.nb02;
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const uint64_t src_base = (uint64_t) n * args.nb13 + (uint64_t) c * args.nb12;
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for (int32_t ky = ky_start; ky < ky_end; ++ky) {
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const int32_t iy = base_y + ky*args.d1;
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const uint64_t src_row = src_base + (uint64_t) iy * args.nb11;
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const uint64_t w_row = w_base + (uint64_t) ky * args.nb01;
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for (int32_t kx = kx_start; kx < kx_end; ++kx) {
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const int32_t ix = base_x + kx*args.d0;
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const float x = *(device const float *)(src + src_row + (uint64_t) ix * args.nb10);
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const float w = (float)(*(device const TK *)(weights + w_row + (uint64_t) kx * args.nb00));
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acc += x * w;
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}
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}
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}
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const uint64_t dst_offs =
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(uint64_t) n * args.nb3 +
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(uint64_t) c * args.nb2 +
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(uint64_t) oh * args.nb1 +
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(uint64_t) ow * args.nb0;
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*(device float *)(dst + dst_offs) = acc;
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}
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// grid: x = OW tile, y = OH, z = C * N (for spatially-contiguous layouts)
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template <typename TK>
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kernel void kernel_conv_2d_dw(
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constant ggml_metal_kargs_conv_2d_dw & args,
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device const char * weights,
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device const char * src,
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device char * dst,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]) {
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const int32_t oh = tgpig.y;
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const int32_t cn = tgpig.z;
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const int32_t c = cn % args.C;
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const int32_t n = cn / args.C;
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const int32_t base_y = oh*args.s1 - args.p1;
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int32_t ky_start = 0;
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if (base_y < 0) {
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ky_start = (-base_y + args.d1 - 1)/args.d1;
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}
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int32_t ky_end = args.KH;
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const int32_t y_max = args.IH - 1 - base_y;
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if (y_max < 0) {
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ky_end = ky_start;
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} else if (base_y + (args.KH - 1)*args.d1 >= args.IH) {
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ky_end = min(ky_end, y_max/args.d1 + 1);
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}
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const uint64_t w_base = (uint64_t) c * args.nb02;
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const uint64_t src_base = (uint64_t) n * args.nb13 + (uint64_t) c * args.nb12;
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const int32_t ow = (int32_t)(tgpig.x * ntg.x + tpitg.x);
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if (ow >= args.OW) {
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return;
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}
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float acc = 0.0f;
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const int32_t base_x = ow*args.s0 - args.p0;
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int32_t kx_start = 0;
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if (base_x < 0) {
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kx_start = (-base_x + args.d0 - 1)/args.d0;
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}
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int32_t kx_end = args.KW;
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const int32_t x_max = args.IW - 1 - base_x;
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if (x_max < 0) {
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kx_end = kx_start;
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} else if (base_x + (args.KW - 1)*args.d0 >= args.IW) {
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kx_end = min(kx_end, x_max/args.d0 + 1);
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}
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if (ky_start < ky_end && kx_start < kx_end) {
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for (int32_t ky = ky_start; ky < ky_end; ++ky) {
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const int32_t iy = base_y + ky*args.d1;
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const uint64_t src_row = src_base + (uint64_t) iy * args.nb11;
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const uint64_t w_row = w_base + (uint64_t) ky * args.nb01;
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for (int32_t kx = kx_start; kx < kx_end; ++kx) {
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const int32_t ix = base_x + kx*args.d0;
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const float x = *(device const float *)(src + src_row + (uint64_t) ix * args.nb10);
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const float w = (float)(*(device const TK *)(weights + w_row + (uint64_t) kx * args.nb00));
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acc += x * w;
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}
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}
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}
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const uint64_t dst_offs =
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(uint64_t) n * args.nb3 +
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(uint64_t) c * args.nb2 +
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(uint64_t) oh * args.nb1 +
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(uint64_t) ow * args.nb0;
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*(device float *)(dst + dst_offs) = acc;
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}
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template [[host_name("kernel_conv_2d_dw_f32_f32")]]
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kernel void kernel_conv_2d_dw<float>(
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constant ggml_metal_kargs_conv_2d_dw & args,
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device const char * weights,
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device const char * src,
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device char * dst,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]);
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template [[host_name("kernel_conv_2d_dw_f16_f32")]]
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kernel void kernel_conv_2d_dw<half>(
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constant ggml_metal_kargs_conv_2d_dw & args,
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device const char * weights,
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device const char * src,
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device char * dst,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]);
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template [[host_name("kernel_conv_2d_dw_tiled_f32_f32")]]
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kernel void kernel_conv_2d_dw_tiled<float>(
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constant ggml_metal_kargs_conv_2d_dw & args,
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device const char * weights,
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device const char * src,
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device char * dst,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]);
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template [[host_name("kernel_conv_2d_dw_tiled_f16_f32")]]
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kernel void kernel_conv_2d_dw_tiled<half>(
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constant ggml_metal_kargs_conv_2d_dw & args,
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device const char * weights,
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device const char * src,
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device char * dst,
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uint3 tgpig[[threadgroup_position_in_grid]],
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uint3 tpitg[[thread_position_in_threadgroup]],
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uint3 ntg[[threads_per_threadgroup]]);
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template <typename T>
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kernel void kernel_conv_3d(
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constant ggml_metal_kargs_conv_3d & args,
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