[cc1352] add support for Texas Instruments CC1352 (#2863)

This commit is contained in:
Seth Rickard
2018-07-09 15:28:41 -05:00
committed by Jonathan Hui
parent 96a7e2d5a5
commit 5fc1788d37
374 changed files with 26121 additions and 6460 deletions
+11 -2
View File
@@ -1381,12 +1381,12 @@ AM_CONDITIONAL([OPENTHREAD_ENABLE_LINKER_MAP], [test "${enable_linker_map}" = "y
AC_ARG_WITH(examples,
[AS_HELP_STRING([--with-examples=TARGET],
[Specify the examples from one of: none, posix, cc2538, cc2650, cc2652, da15000, efr32, emsk, gp712, kw41z, nrf52840, samr21 @<:@default=none@:>@.])],
[Specify the examples from one of: none, posix, cc1352, cc2538, cc2650, cc2652, da15000, efr32, emsk, gp712, kw41z, nrf52840, samr21 @<:@default=none@:>@.])],
[
case "${with_examples}" in
none)
;;
posix|cc2538|cc2650|cc2652|da15000|efr32|emsk|gp712|kw41z|nrf52840|samr21)
posix|cc1352|cc2538|cc2650|cc2652|da15000|efr32|emsk|gp712|kw41z|nrf52840|samr21)
if test ${enable_posix_app} = "yes"; then
AC_MSG_ERROR([--with-examples must be none when POSIX apps are enabled by --enable-posix-app])
fi
@@ -1407,6 +1407,11 @@ case ${with_examples} in
AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_POSIX],[${OPENTHREAD_EXAMPLES_POSIX}],[Define to 1 if you want to use posix examples])
;;
cc1352)
OPENTHREAD_EXAMPLES_CC1352=1
AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC1352],[${OPENTHREAD_EXAMPLES_CC1352}],[Define to 1 if you want to use cc1352 examples])
;;
cc2538)
OPENTHREAD_EXAMPLES_CC2538=1
AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES_CC2538],[${OPENTHREAD_EXAMPLES_CC2538}],[Define to 1 if you want to use cc2538 examples])
@@ -1469,6 +1474,9 @@ AC_DEFINE_UNQUOTED([OPENTHREAD_EXAMPLES],[${OPENTHREAD_EXAMPLES}],[OpenThread ex
AC_SUBST(OPENTHREAD_EXAMPLES_POSIX)
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_POSIX], [test "${OPENTHREAD_EXAMPLES}" = "posix"])
AC_SUBST(OPENTHREAD_EXAMPLES_CC1352)
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC1352], [test "${OPENTHREAD_EXAMPLES}" = "cc1352"])
AC_SUBST(OPENTHREAD_EXAMPLES_CC2538)
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${OPENTHREAD_EXAMPLES}" = "cc2538"])
@@ -1641,6 +1649,7 @@ examples/apps/Makefile
examples/apps/cli/Makefile
examples/apps/ncp/Makefile
examples/platforms/Makefile
examples/platforms/cc1352/Makefile
examples/platforms/cc2538/Makefile
examples/platforms/cc2650/Makefile
examples/platforms/cc2652/Makefile
+293
View File
@@ -0,0 +1,293 @@
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
.NOTPARALLEL:
AR = arm-none-eabi-ar
CCAS = arm-none-eabi-as
CPP = arm-none-eabi-cpp
CC = arm-none-eabi-gcc
CXX = arm-none-eabi-g++
LD = arm-none-eabi-ld
STRIP = arm-none-eabi-strip
NM = arm-none-eabi-nm
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
BuildJobs ?= 10
configure_OPTIONS = \
--enable-cli-app=all \
--enable-ncp-app=all \
--with-ncp-bus=uart \
--enable-diag \
--with-examples=cc1352 \
MBEDTLS_CPPFLAGS="$(CC1352_MBEDTLS_CPPFLAGS)" \
$(NULL)
DEFAULT_LOGGING ?= 1
CC1352_MBEDTLS_CPPFLAGS = \
-DMBEDTLS_CONFIG_FILE='\"cc1352-mbedtls-config.h\"' \
-I$(PWD)/examples/platforms/cc1352/crypto \
-I$(PWD)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(PWD)/third_party/mbedtls \
-I$(PWD)/third_party/mbedtls/repo/include \
$(NULL)
CC1352_CONFIG_FILE_CPPFLAGS = \
-DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-cc1352-config.h\"' \
-I$(PWD)/examples/platforms/cc1352/ \
$(NULL)
COMMONCFLAGS := \
-fdata-sections \
-ffunction-sections \
-Os \
-g \
$(CC1352_CONFIG_FILE_CPPFLAGS) \
$(NULL)
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
$(NULL)
CFLAGS += \
$(COMMONCFLAGS) \
$(target_CFLAGS) \
$(NULL)
CXXFLAGS += \
$(COMMONCFLAGS) \
$(target_CXXFLAGS) \
-fno-exceptions \
-fno-rtti \
$(NULL)
LDFLAGS += \
$(COMMONCFLAGS) \
$(target_LDFLAGS) \
-nostartfiles \
-specs=nano.specs \
-specs=nosys.specs \
-Wl,--gc-sections \
-Wl,-Map=map.map \
$(NULL)
ECHO := @echo
MAKE := make
MKDIR_P := mkdir -p
LN_S := ln -s
RM_F := rm -f
INSTALL := /usr/bin/install
INSTALLFLAGS := -p
TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
BuildPath = build
TopBuildDir = $(BuildPath)
AbsTopBuildDir = $(PWD)/$(TopBuildDir)
ResultPath = output
TopResultDir = $(ResultPath)
AbsTopResultDir = $(PWD)/$(TopResultDir)
TargetTuple = cc1352
ARCHS = cortex-m4f
TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib
ifndef BuildJobs
BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
endif
JOBSFLAG := -j$(BuildJobs)
#
# configure-arch <arch>
#
# Configure OpenThread for the specified architecture.
#
# arch - The architecture to configure.
#
define configure-arch
$(ECHO) " CONFIG $(TargetTuple)..."
(cd $(BuildPath)/$(TargetTuple) \
&& $(AbsTopSourceDir)/configure \
INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
CPP="$(CPP)" \
CC="$(CC)" \
CXX="$(CXX)" \
OBJC="$(OBJC)" \
OBJCXX="$(OBJCXX)" \
AR="$(AR)" \
RANLIB="$(RANLIB)" \
NM="$(NM)" \
STRIP="$(STRIP)" \
CPPFLAGS="$(CPPFLAGS)" \
CFLAGS="$(CFLAGS)" \
CXXFLAGS="$(CXXFLAGS)" \
LDFLAGS="$(LDFLAGS)" \
--host=arm-none-eabi \
--prefix=/ \
--exec-prefix=/$(TargetTuple) \
$(configure_OPTIONS))
endef # configure-arch
#
# build-arch <arch>
#
# Build the OpenThread intermediate build products for the specified
# architecture.
#
# arch - The architecture to build.
#
define build-arch
$(ECHO) " BUILD $(TargetTuple)"
$(MAKE) \
$(JOBSFLAG) \
-C $(BuildPath)/$(TargetTuple) \
--no-print-directory \
all
endef # build-arch
#
# stage-arch <arch>
#
# Stage (install) the OpenThread final build products for the specified
# architecture.
#
# arch - The architecture to stage.
#
define stage-arch
$(ECHO) " STAGE $(TargetTuple)"
$(MAKE) \
$(JOBSFLAG) \
-C $(BuildPath)/$(TargetTuple) \
--no-print-directory \
DESTDIR=$(AbsTopResultDir) \
install
endef # stage-arch
#
# ARCH_template <arch>
#
# Define macros, targets and rules to configure, build, and stage the
# OpenThread for a single architecture.
#
# arch - The architecture to instantiate the template for.
#
define ARCH_template
CONFIGURE_TARGETS += configure-$(1)
BUILD_TARGETS += do-build-$(1)
STAGE_TARGETS += stage-$(1)
BUILD_DIRS += $(BuildPath)/$(TargetTuple)
DIRECTORIES += $(BuildPath)/$(TargetTuple)
configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
configure-$(1): $(BuildPath)/$(TargetTuple)/config.status
$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple)
$$(call configure-arch,$(1))
do-build-$(1): configure-$(1)
do-build-$(1):
+$$(call build-arch,$(1))
stage-$(1): do-build-$(1)
stage-$(1): | $(TopResultDir)
$$(call stage-arch,$(1))
$(1): stage-$(1)
endef # ARCH_template
.DEFAULT_GOAL := all
all: stage
#
# cortex-m4f
#
cortex-m4f_target_ABI = cortex-m4f
cortex-m4f_target_CPPFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_CFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_CXXFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
cortex-m4f_target_LDFLAGS = -mcpu=cortex-m4 -march=armv7e-m -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mthumb
# Instantiate an architecture-specific build template for each target
# architecture.
$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
#
# Common / Finalization
#
configure: $(CONFIGURE_TARGETS)
build: $(BUILD_TARGETS)
stage: $(STAGE_TARGETS)
DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
all: stage
$(DIRECTORIES):
$(ECHO) " MKDIR $@"
@$(MKDIR_P) "$@"
clean:
$(ECHO) " CLEAN"
@$(RM_F) -r $(CLEAN_DIRS)
help:
$(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
$(ECHO) "architectures: "
$(ECHO) ""
$(ECHO) " $(ARCHS)"
$(ECHO) ""
$(ECHO) "To build only a particular architecture, specify: "
$(ECHO) ""
$(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
$(ECHO) ""
+1 -1
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@@ -55,7 +55,7 @@ DEFAULT_LOGGING ?= 1
CC2652_MBEDTLS_CPPFLAGS = \
-DMBEDTLS_CONFIG_FILE='\"cc2652-mbedtls-config.h\"' \
-I$(PWD)/examples/platforms/cc2652/crypto \
-I$(PWD)/third_party/ti/devices/cc26x2 \
-I$(PWD)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(PWD)/third_party/mbedtls \
-I$(PWD)/third_party/mbedtls/repo/include \
$(NULL)
+6
View File
@@ -31,6 +31,7 @@ include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
# Always package (e.g. for 'make dist') these subdirectories.
DIST_SUBDIRS = \
cc1352 \
cc2538 \
cc2650 \
cc2652 \
@@ -51,6 +52,10 @@ SUBDIRS = \
utils \
$(NULL)
if OPENTHREAD_EXAMPLES_CC1352
SUBDIRS += cc1352
endif
if OPENTHREAD_EXAMPLES_CC2538
SUBDIRS += cc2538
endif
@@ -102,6 +107,7 @@ noinst_HEADERS = \
# Always pretty (e.g. for 'make pretty') these subdirectories.
PRETTY_SUBDIRS = \
cc1352 \
cc2538 \
cc2650 \
cc2652 \
+4
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@@ -41,6 +41,10 @@ LDFLAGS_COMMON = $(NULL)
SOURCES_COMMON = $(NULL)
LIBTOOLFLAGS_COMMON = --preserve-dup-deps
if OPENTHREAD_EXAMPLES_CC1352
include $(top_srcdir)/examples/platforms/cc1352/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_CC2538
include $(top_srcdir)/examples/platforms/cc2538/Makefile.platform.am
endif
+86
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@@ -0,0 +1,86 @@
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
lib_LIBRARIES = libopenthread-cc1352.a
# Do not enable -pedantic-errors for cc13xx driverlib
override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
libopenthread_cc1352_a_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/cc1352 \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(top_srcdir)/third_party/mbedtls/repo/include \
$(MBEDTLS_CPPFLAGS) \
$(NULL)
PLATFORM_SOURCES = \
alarm.c \
diag.c \
flash.c \
logging.c \
misc.c \
platform.c \
radio.c \
random.c \
uart.c \
crypto/aes_alt.c \
cc1352_ccfg.c \
cc1352_startup.c \
cxx_helpers.c \
$(NULL)
libopenthread_cc1352_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
libopenthread_cc1352_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
noinst_HEADERS = \
platform-cc1352.h \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(noinst_HEADERS) \
$(NULL)
Dash = -
libopenthread_cc1352_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
@@ -0,0 +1,44 @@
#
# Copyright (c) 2018, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
#
# cc1352 platform-specific Makefile
#
CPPFLAGS_COMMON += \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
$(NULL)
LDADD_COMMON += \
$(top_builddir)/examples/platforms/cc1352/libopenthread-cc1352.a \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
LDFLAGS_COMMON += \
-T $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds \
$(NULL)
+120
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@@ -0,0 +1,120 @@
# OpenThread on CC1352 Example
This directory contains example platform drivers for the [Texas Instruments
CC1352R1][cc1352r1].
The example platform drivers are intended to present the minimal code necessary
to support OpenThread. As a result, the example platform drivers do not
necessarily highlight the platform's full capabilities. Consult the [SimpleLink
CC26X2R1 SDK][cc26x2r1-sdk] for more development option. The platform drivers
were built for the [CC1352R1 LAUNCHXL][cc1352r1-launchxl], usage on other
boards with a cc1352r1 may require changes to the peripheral drivers.
[cc1352r1-launchxl]: http://www.ti.com/tool/launchxl-cc26x2r1
[cc26x2r1-sdk]: http://www.ti.com/tool/simplelink-cc26x2-sdk
<!---
TODO: Update link when cc1352 product page is live
[cc1352r1]: http://www.ti.com/product/cc1352r1
-->
[cc1352r1]: http://www.ti.com/tool/launchxl-cc26x2r1
## Toolchain
Building the examples for the cc1352 requires [GNU AutoConf][gnu-autoconf],
[GNU AutoMake][gnu-automake], [Python][python], and the [ARM gcc
toolchain][arm-toolchain].
With the exception of the arm toolchain, most of these tools are installed by
default on modern Posix systems. It is recommended to setup a Linux virtual
machine for building on a Windows host system. For help setting up VirtualBox
with Ubuntu, consult this [community help wiki
article][ubuntu-wiki-virtualbox].
[gnu-autoconf]: https://www.gnu.org/software/autoconf
[gnu-automake]: https://www.gnu.org/software/automake
[python]: https://www.python.org
[arm-toolchain]: https://launchpad.net/gcc-arm-embedded
[cygwin]: https://www.cygwin.com
[mingw]: http://www.mingw.org
[ubuntu-wiki-virtualbox]: https://help.ubuntu.com/community/VirtualBox
In a Bash terminal, follow these instructions to install the GNU toolchain and
other dependencies.
```bash
$ cd <path-to-openthread>
$ ./script/bootstrap
```
## Building
In a Bash terminal, follow these instructions to build the cc1352 examples.
```bash
$ cd <path-to-openthread>
$ ./bootstrap
$ make -f examples/Makefile-cc1352
```
## Flash Binaries
If the build completed successfully, the `elf` files may be found in
`<path-to-openthread>/output/cc1352/bin`.
Flash the images with [Uniflash][uniflash]. Make sure to deselect the binary
check-box, Uniflash assumes a file without an extension is a binary file.
[uniflash]: http://www.ti.com/tool/uniflash
## Interact
### CLI example
1. With a terminal client (PuTTY, minicom, etc.) open the com port associated
with the cc1352 UART. The serial port settings are:
* 115200 baud
* 8 data bits
* no parity bit
* 1 stop bit
2. Type `help` for a list of commands.
3. Follow the instructions in the [CLI README][cli-readme] for instructions on
setting up a network.
[cli-readme]: ../../../src/cli/README.md
```bash
> help
help
channel
childtimeout
contextreusedelay
extaddr
extpanid
ipaddr
keysequence
leaderweight
masterkey
mode
netdataregister
networkidtimeout
networkname
panid
ping
prefix
releaserouterid
rloc16
route
routerupgradethreshold
scan
start
state
stop
whitelist
```
### NCP example
Refer to the documentation in the [wpantund][wpantund] project for build
instructions and usage information.
[wpantund]: https://github.com/openthread/wpantund
+130
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@@ -0,0 +1,130 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for the alarm.
*
*/
#include <openthread/config.h>
#include <driverlib/aon_rtc.h>
#include <stdbool.h>
#include <stdint.h>
#include <openthread/openthread.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
#include "platform-cc1352.h"
/* NOTE: we could use systick, but that would sacrifice atleast a few ops
* every ms, and not run when the processor is sleeping.
*/
static uint32_t sTime0 = 0;
static uint32_t sAlarmTime = 0;
static bool sIsRunning = false;
/**
* Function documented in platform-cc1352.h
*/
void cc1352AlarmInit(void)
{
/*
* NOTE: this will not enable the individual rtc alarm channels
*/
AONRTCEnable();
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
uint32_t otPlatAlarmMilliGetNow(void)
{
/*
* This is current value of RTC as it appears in the register.
* With seconds as the upper 32 bits and fractions of a second as the
* lower 32 bits <32.32>.
*/
uint64_t rtcVal = AONRTCCurrent64BitValueGet();
return ((rtcVal * 1000) >> 32);
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
(void)aInstance;
sTime0 = aT0;
sAlarmTime = aDt;
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStop(otInstance *aInstance)
{
(void)aInstance;
sIsRunning = false;
}
/**
* Function documented in platform-cc1352.h
*/
void cc1352AlarmProcess(otInstance *aInstance)
{
uint32_t offsetTime;
if (sIsRunning)
{
/* unsinged subtraction will result in the absolute offset */
offsetTime = otPlatAlarmMilliGetNow() - sTime0;
if (sAlarmTime <= offsetTime)
{
sIsRunning = false;
#if OPENTHREAD_ENABLE_DIAG
if (otPlatDiagModeGet())
{
otPlatDiagAlarmFired(aInstance);
}
else
#endif /* OPENTHREAD_ENABLE_DIAG */
{
otPlatAlarmMilliFired(aInstance);
}
}
}
}
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Configure the Customer Configuration Area.
*/
// clang-format off
// enable bootloader backdoor
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0F // DIO15 (BTN-1 button) on CC1352 LaunchPad Board for boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor
/*
* Include the default ccfg struct and configuration code.
*/
#include <startup_files/ccfg.c>
// clang-format on
+201
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC1352_RADIO_H_
#define CC1352_RADIO_H_
#include <driverlib/rf_ieee_cmd.h>
enum
{
IEEE802154_FRAME_TYPE_MASK = 0x7, ///< (IEEE 802.15.4-2006) PSDU.FCF.frameType
IEEE802154_FRAME_TYPE_ACK = 0x2, ///< (IEEE 802.15.4-2006) frame type: ACK
IEEE802154_ACK_REQUEST = (1<<5), ///< (IEEE 802.15.4-2006) PSDU.FCF.bAR
IEEE802154_DSN_OFFSET = 2, ///< (IEEE 802.15.4-2006) PSDU.sequenceNumber
IEEE802154_MAC_MIN_BE = 1, ///< (IEEE 802.15.4-2006) macMinBE
IEEE802154_MAC_MAX_BE = 5, ///< (IEEE 802.15.4-2006) macMaxBE
IEEE802154_MAC_MAX_CSMA_BACKOFFS = 4, ///< (IEEE 802.15.4-2006) macMaxCSMABackoffs
IEEE802154_MAC_MAX_FRAMES_RETRIES = 3, ///< (IEEE 802.15.4-2006) macMaxFrameRetries
IEEE802154_A_UINT_BACKOFF_PERIOD = 20, ///< (IEEE 802.15.4-2006 7.4.1) MAC constants
IEEE802154_A_TURNAROUND_TIME = 12, ///< (IEEE 802.15.4-2006 6.4.1) PHY constants
IEEE802154_PHY_SHR_DURATION = 10,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_PHY_SYMBOLS_PER_OCTET = 2,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_MAC_ACK_WAIT_DURATION = (IEEE802154_A_UINT_BACKOFF_PERIOD +
IEEE802154_A_TURNAROUND_TIME +
IEEE802154_PHY_SHR_DURATION +
( 6 * IEEE802154_PHY_SYMBOLS_PER_OCTET)),
///< (IEEE 802.15.4-2006 7.4.2) macAckWaitDuration PIB attribute
IEEE802154_SYMBOLS_PER_SEC = 62500 ///< (IEEE 802.15.4-2006 6.5.3.2) O-QPSK symbol rate
};
enum
{
CC1352_RAT_TICKS_PER_SEC = 4000000, ///< 4MHz clock
CC1352_INVALID_RSSI = 127,
CC1352_UNKNOWN_EUI64 = 0xFF,
///< If the EUI64 read from the ccfg is all ones then the customer did not set the address
};
/**
* TX Power dBm lookup table - values from SmartRF Studio
*/
typedef struct output_config
{
int dbm;
uint16_t value;
} output_config_t;
/**
* * TX Power dBm lookup table from SmartRF Studio 7 2.10.0#94
*/
static const output_config_t rgOutputPower[] =
{
{ 5, 0x941E},
{ 4, 0x6c16},
{ 3, 0x5411},
{ 2, 0x440d},
{ 1, 0x385c},
{ 0, 0x3459},
{ -3, 0x2851},
{ -5, 0x224e},
{ -6, 0x204d},
{ -9, 0x0a8d},
{ -10, 0x168c},
{ -12, 0x108a},
{ -15, 0xc88c},
{ -18, 0x06c9},
{ -21, 0x06c7},
};
#define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0]))
/* Max and Min Output Power in dBm */
#define OUTPUT_POWER_MIN (rgOutputPower[OUTPUT_CONFIG_COUNT - 1].dbm)
#define OUTPUT_POWER_MAX (rgOutputPower[0].dbm)
#define OUTPUT_POWER_UNKNOWN 0xFFFF
/**
* return value used when searching the source match array
*/
#define CC1352_SRC_MATCH_NONE 0xFF
/**
* number of extended addresses used for source matching
*/
#define CC1352_EXTADD_SRC_MATCH_NUM 10
/**
* structure for source matching extended addresses
*/
typedef struct __attribute__((aligned(4))) ext_src_match_data
{
uint32_t srcMatchEn[((CC1352_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC1352_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint64_t extAddrEnt[CC1352_EXTADD_SRC_MATCH_NUM];
} ext_src_match_data_t;
/**
* number of short addresses used for source matching
*/
#define CC1352_SHORTADD_SRC_MATCH_NUM 10
/**
* structure for source matching short addresses
*/
typedef struct __attribute__((aligned(4))) short_src_match_data
{
uint32_t srcMatchEn[((CC1352_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC1352_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
rfc_shortAddrEntry_t extAddrEnt[CC1352_SHORTADD_SRC_MATCH_NUM];
} short_src_match_data_t;
/**
* size of length field in receive struct
*
* defined in Table 23-10 of the cc26xx TRM
*/
#define DATA_ENTRY_LENSZ_BYTE 1
/**
* address type for @ref rfCoreModifySourceMatchEntry()
*/
typedef enum cc1352_address
{
SHORT_ADDRESS = 1,
EXT_ADDRESS = 0,
} cc1352_address_t;
/**
* This enum represents the state of a radio.
* Initially, a radio is in the Disabled state.
*
* The following are valid radio state transitions for the cc1352:
*
* (Radio ON)
* +----------+ Enable() +-------+ Receive() +---------+ Transmit() +----------+
* | |----------->| |------------->| |--------------->| |
* | Disabled | | Sleep | | Receive | | Transmit |
* | |<-----------| |<-------------| |<---------------| |
* +----------+ Disable() | | Sleep() | | AckFrame RX or +----------+
* | | (Radio OFF) +---------+ sTxCmdChainDone == true
* | |
* | | EnergyScan() +--------+
* | |------------->| |
* | | | EdScan |
* | |<-------------| |
* | | signal ED | |
* +-------+ scan done +--------+
*
* These states slightly differ from the states in \ref include/platform/radio.h.
* The additional states the phy can be in are due to the asynchronous nature
* of the CM0 radio core.
*
* | state | description |
* |------------------|----------------------------------------------------|
* | Disabled | The rfcore powerdomain is off and the RFCPE is off |
* | Sleep | The RFCORE PD is on, and the RFCPE is in IEEE mode |
* | Receive | The RFCPE is running a CMD_IEEE_RX |
* | Transmit | The RFCPE is running a transmit command string |
* | TransmitComplete | The transmit command string has completed |
* | EdScan | The RFCPE is running a CMD_IEEE_ED_SCAN |
*
* \note The RAT start and Radio Setup commands may be moved to the Receive()
* and EnergyScan() transitions in the future.
*/
typedef enum cc1352_PhyState
{
cc1352_stateDisabled = 0,
cc1352_stateSleep,
cc1352_stateReceive,
cc1352_stateEdScan,
cc1352_stateTransmit,
} cc1352_PhyState_t;
#endif /* CC1352_RADIO_H_ */
@@ -0,0 +1,39 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Include the standard startup files for the specified toolchain
* startup code is in 'third_party/ti'
*/
#if defined(__GNUC__)
#include <startup_files/startup_gcc.c>
#elif defined(__TI_ARM__)
#include <startup_files/startup_ccs.c>
#else
#error "Unknown compiler"
#endif
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "aes_alt.h"
#include "mbedtls/aes.h"
#ifdef MBEDTLS_AES_ALT
#include <driverlib/crypto.h>
#include <driverlib/prcm.h>
#include <string.h>
#include <utils/code_utils.h>
#define CC1352_AES_KEY_UNUSED (-1)
#define CC1352_AES_CTX_MAGIC (0x7E)
/**
* bitmap of which key stores are currently used
*/
static uint8_t sUsedKeys = 0;
/**
* number of active contexts, used for power on/off of the crypto core
*/
static unsigned int sRefNum = 0;
/*
* Documented in aes_alt.h
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx)
{
if (sRefNum++ == 0)
{
/* enable the crypto core */
/* The TRNG should already be running before we ever ask the AES core
* to do anything, if there is any scenario that the TRNG powers off
* the peripheral power domain use this code to repower it
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON);
*/
PRCMPeripheralRunEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
ctx->magic = CC1352_AES_CTX_MAGIC;
ctx->key_idx = CC1352_AES_KEY_UNUSED;
}
/*
* Documented in aes_alt.h
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx)
{
otEXPECT(ctx->magic == CC1352_AES_CTX_MAGIC);
if (ctx->key_idx != CC1352_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
if (--sRefNum == 0)
{
/* disable the crypto core */
/* The TRNG core needs the peripheral power domain powered on to
* function. if there is a situation where the power domain must be
* powered off, use this code to do so.
PRCMPowerDomainOff(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_OFF);
*/
PRCMPeripheralRunDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
memset((void *)ctx, 0x00, sizeof(ctx));
exit:
return;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC1352_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC1352_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC1352_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC1352_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/*
* Documented in aes_alt.h
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16])
{
int retval = -1;
retval = CRYPTOAesEcb((uint32_t *)input, (uint32_t *)output, ctx->key_idx, mode == MBEDTLS_AES_ENCRYPT, false);
otEXPECT(retval == AES_SUCCESS);
while ((retval = CRYPTOAesEcbStatus()) == AES_DMA_BSY)
;
CRYPTOAesEcbFinish();
exit:
return retval;
}
#endif /* MBEDTLS_AES_ALT */
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef MBEDTLS_AES_ALT_H
#define MBEDTLS_AES_ALT_H
#ifndef MBEDTLS_CONFIG_FILE
#include "cc1352-mbedtls-config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#ifdef MBEDTLS_AES_ALT
#ifdef __cplusplus
extern "C" {
#endif
typedef struct
{
uint8_t magic;
signed char key_idx;
} mbedtls_aes_context;
/**
* @brief Initialize AES context
*
* @param [in,out] ctx AES context to be initialized
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx);
/**
* @brief Clear AES context
*
* @param [in,out] ctx AES context to be cleared
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx);
/**
* @brief AES key schedule (encryption)
*
* @param [in,out] ctx AES context to be used
* @param [in] key Encryption key
* @param [in] keybits Must be 128
*
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
/**
* @brief AES key schedule (decryption)
*
* @param [in,out] ctx AES context to be used
* @param [in] key Decryption key
* @param [in] keybits Must be 128
*
* @retval 0 If successful
* @retval MBEDTLS_ERR_AES_INVALID_KEY_LENGTH If keybits was not 128
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key,
unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
*
* \param ctx AES context
* \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
* \param input 16-byte input block
* \param output 16-byte output block
*
* @return The return value of @ref CRYPTOAesEcb.
* @retval 0 If successful
* @retval AES_KEYSTORE_READ_ERROR If the indicated keystore ram could not be read
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16],
unsigned char output[16]);
#ifdef __cplusplus
}
#endif
#endif /* MBEDTLS_AES_ALT */
#endif /* MBEDTLS_AES_ALT_H */
File diff suppressed because it is too large Load Diff
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Helper functions for running c++ without the standard library
*/
__extension__ typedef int __guard __attribute__((mode(__DI__)));
int __cxa_guard_acquire(__guard *g)
{
return !*(char *)(g);
}
void __cxa_guard_release(__guard *g)
{
*(char *)g = 1;
}
void __cxa_guard_abort(__guard *g)
{
(void)g;
}
void __cxa_pure_virtual(void)
{
while (1)
;
}
+93
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <openthread/config.h>
#include <openthread/openthread.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/radio.h>
#include "platform-cc1352.h"
#if OPENTHREAD_ENABLE_DIAG
/**
* Diagnostics mode variables.
*
*/
static bool sDiagMode = false;
void otPlatDiagProcess(otInstance *aInstance, int argc, char *argv[], char *aOutput, size_t aOutputMaxLen)
{
(void)aInstance;
// Add more platform specific diagnostics features here.
if (argc > 1)
{
snprintf(aOutput, aOutputMaxLen, "diag feature '%s' is not supported\r\n", argv[0]);
}
}
void otPlatDiagModeSet(bool aMode)
{
sDiagMode = aMode;
}
bool otPlatDiagModeGet()
{
return sDiagMode;
}
void otPlatDiagChannelSet(uint8_t aChannel)
{
(void)aChannel;
}
void otPlatDiagTxPowerSet(int8_t aTxPower)
{
(void)aTxPower;
}
void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
{
(void)aInstance;
(void)aFrame;
(void)aError;
}
void otPlatDiagAlarmCallback(otInstance *aInstance)
{
(void)aInstance;
}
#endif // OPENTHREAD_ENABLE_DIAG
+313
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <string.h>
#include <driverlib/aon_batmon.h>
#include <driverlib/flash.h>
#include <driverlib/interrupt.h>
#include <driverlib/vims.h>
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <openthread/platform/alarm-milli.h>
#include <utils/code_utils.h>
#include "platform-cc1352.h"
/*
* The settings configuration base address *MUST* be defined in the core config
* file. The base address *MUST* be aligned on an 8K page boundary or the flash
* program calls will fail.
*/
#ifndef SETTINGS_CONFIG_BASE_ADDRESS
#error "SETTINGS_CONFIG_BASE_ADDRESS not defined in the OpenThread Core Config"
#endif /* SETTINGS_CONFIG_BASE_ADDRESS */
/*
* The settings configuration page size *MUST* be defined in the core config
* file. The page size *MUST* be 8K or the flash program calls will fail.
*/
#if (SETTINGS_CONFIG_PAGE_SIZE != 0x2000)
#error "SETTINGS_CONFIG_PAGE_SIZE must be defined in OpenThread Core Config"
#endif
/*
* The settings configuration page number _SHOULD_ be defined in the core
* config file.
*/
#ifndef SETTINGS_CONFIG_PAGE_NUM
#warn "SETTINGS_CONFIG_PAGE_NUM not defined in the OpenThread Core Config"
#endif /* SETTINGS_CONFIG_PAGE_NUM */
enum
{
MIN_VDD_FLASH = 0x18, /* 1.50 volts (0.50=128/256 -> 128=0x80) */
MAX_WRITE_INCREMENT = 8, /* maximum number of bytes to write at a time to
* avoid interrupt latency while in ROM
*/
};
/**
* Check if the Battery Monitor measurements and calculations are enabled.
*
* @return If the Battery Monitor is enabled.
* @retval true The Battery Monitor is on.
* @retval false The Battery Monitor is off.
*/
static bool isBatMonOn(void)
{
uint32_t batMonCtl = HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL);
return ((batMonCtl & AON_BATMON_CTL_CALC_EN_M) == AON_BATMON_CTL_CALC_EN &&
(batMonCtl & AON_BATMON_CTL_MEAS_EN_M) == AON_BATMON_CTL_MEAS_EN);
}
/**
* Check if the supply voltage is high enough to support flash programming.
*
* @return If the Voltage is too low to support flash programming.
* @retval false The supply voltage is too low.
* @retval true The supply voltage is sufficient.
*/
static bool checkVoltage(void)
{
bool batMonWasOff = !isBatMonOn();
bool ret = false;
if (batMonWasOff)
{
AONBatMonEnable();
}
if (AONBatMonBatteryVoltageGet() >= MIN_VDD_FLASH)
{
ret = true;
}
if (batMonWasOff)
{
AONBatMonDisable();
}
return ret;
}
/**
* Disable Flash data caching and instruction pre-fetching.
*
* It is necessary to disable the caching and VIMS to ensure the cache has
* valid data while the program is executing.
*
* @return The VIMS state before being disabled.
*/
static uint32_t disableFlashCache(void)
{
uint32_t mode = VIMSModeGet(VIMS_BASE);
VIMSLineBufDisable(VIMS_BASE);
if (mode != VIMS_MODE_DISABLED)
{
VIMSModeSet(VIMS_BASE, VIMS_MODE_DISABLED);
while (VIMSModeGet(VIMS_BASE) != VIMS_MODE_DISABLED)
;
}
return mode;
}
/**
* Restore the Flash data caching and instruction pre-fetching.
*
* @param [in] mode The VIMS mode returned by @ref disableFlashCache.
*/
static void restoreFlashCache(uint32_t mode)
{
if (mode != VIMS_MODE_DISABLED)
{
VIMSModeSet(VIMS_BASE, mode);
}
VIMSLineBufEnable(VIMS_BASE);
}
/**
* Translate the errors from the Flash programming FSM to OpenThread error
* codes.
*
* @param [in] error Return from the Flash programming function.
*
* @return The corresponding OpenThread @ref otError value.
*/
static otError fsmErrorToOtError(uint32_t error)
{
otError ret = OT_ERROR_GENERIC;
switch (error)
{
case FAPI_STATUS_SUCCESS:
ret = OT_ERROR_NONE;
break;
case FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH:
ret = OT_ERROR_INVALID_ARGS;
break;
case FAPI_STATUS_FSM_ERROR:
ret = OT_ERROR_FAILED;
break;
default:
break;
}
return ret;
}
/**
* Function documented in platforms/utils/flash.h
*/
otError utilsFlashInit(void)
{
return OT_ERROR_NONE;
}
/**
* Function documented in platforms/utils/flash.h
*/
uint32_t utilsFlashGetSize(void)
{
return FlashSizeGet();
}
/**
* Function documented in platforms/utils/flash.h
*/
otError utilsFlashErasePage(uint32_t aAddress)
{
uint32_t mode;
uint32_t fsmRet;
otError ret;
otEXPECT_ACTION(checkVoltage(), ret = OT_ERROR_FAILED);
mode = disableFlashCache();
fsmRet = FlashSectorErase(aAddress);
restoreFlashCache(mode);
ret = fsmErrorToOtError(fsmRet);
exit:
return ret;
}
/**
* Function documented in platforms/utils/flash.h
*/
otError utilsFlashStatusWait(uint32_t aTimeout)
{
uint32_t start = otPlatAlarmMilliGetNow();
otError ret = OT_ERROR_BUSY;
while ((otPlatAlarmMilliGetNow() - start) < aTimeout)
{
if (FlashCheckFsmForReady() == FAPI_STATUS_FSM_READY)
{
ret = OT_ERROR_NONE;
break;
}
}
return ret;
}
/**
* Function documented in platforms/utils/flash.h
*/
uint32_t utilsFlashWrite(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
{
uint32_t mode;
uint32_t written = 0;
otEXPECT(checkVoltage());
mode = disableFlashCache();
while (written < aSize)
{
uint32_t toWrite = aSize - written;
uint8_t *data = aData + written;
uint32_t address = aAddress + written;
uint32_t fsmRet;
bool interruptsWereDisabled;
if (toWrite > MAX_WRITE_INCREMENT)
{
toWrite = MAX_WRITE_INCREMENT;
}
/* The CPU may not execute code from flash while a program is
* happening. We disable interrupts to ensure one does not preempt the
* ROM fsm.
*/
interruptsWereDisabled = IntMasterDisable();
fsmRet = FlashProgram(data, address, toWrite);
if (!interruptsWereDisabled)
{
IntMasterEnable();
}
if (fsmRet != FAPI_STATUS_SUCCESS)
{
break;
}
written += toWrite;
}
restoreFlashCache(mode);
exit:
return written;
}
/**
* Function documented in platforms/utils/flash.h
*/
uint32_t utilsFlashRead(uint32_t aAddress, uint8_t *aData, uint32_t aSize)
{
memcpy(aData, (void *)aAddress, (size_t)aSize);
return aSize;
}
+46
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/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file logging.c
* Platform abstraction for the logging
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <openthread/platform/logging.h>
#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED) || \
(OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_NCP_SPINEL)
OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
{
(void)aLogLevel;
(void)aLogRegion;
(void)aFormat;
}
#endif
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <driverlib/sys_ctrl.h>
#include <openthread/types.h>
#include <openthread/platform/misc.h>
/*
* NOTE: if the system is flashed with Flash Programmer 2 or Uniflash, this
* reset will not work the first time. Both programs use the cJTAG module,
* which sets the halt in boot flag. The device must be manually reset the
* first time after being programmed through the JTAG interface.
*/
/**
* Function documented in platform/misc.h
*/
void otPlatReset(otInstance *aInstance)
{
(void)aInstance;
SysCtrlSystemReset();
}
/**
* Function documented in platform/misc.h
*/
otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
{
(void)aInstance;
otPlatResetReason ret;
switch (SysCtrlResetSourceGet())
{
case RSTSRC_PWR_ON:
ret = OT_PLAT_RESET_REASON_POWER_ON;
break;
case RSTSRC_PIN_RESET:
ret = OT_PLAT_RESET_REASON_EXTERNAL;
break;
case RSTSRC_VDDS_LOSS:
case RSTSRC_VDDR_LOSS:
case RSTSRC_CLK_LOSS:
ret = OT_PLAT_RESET_REASON_CRASH;
break;
case RSTSRC_WARMRESET:
case RSTSRC_SYSRESET:
case RSTSRC_WAKEUP_FROM_SHUTDOWN:
ret = OT_PLAT_RESET_REASON_SOFTWARE;
break;
default:
ret = OT_PLAT_RESET_REASON_UNKNOWN;
break;
}
return ret;
}
void otPlatWakeHost(void)
{
// TODO: implement an operation to wake the host from sleep state.
}
@@ -0,0 +1,64 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC1352_CONFIG_H_
#define OPENTHREAD_CORE_CC1352_CONFIG_H_
/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
* The platform-specific string to insert into the OpenThread version string.
*
*/
#define OPENTHREAD_CONFIG_PLATFORM_INFO "CC1352"
/**
* @def SETTINGS_CONFIG_BASE_ADDRESS
*
* The base address of the pages to be used for non-volatile-settings storage.
*/
#define SETTINGS_CONFIG_BASE_ADDRESS (0x52000)
/**
* @def SETTINGS_CONFIG_PAGE_SIZE
*
* The size in bytes of a page for the cc26x2 platform.
*
* @note *MUST BE* 8K.
*/
#define SETTINGS_CONFIG_PAGE_SIZE (0x2000)
/**
* @def SETTINGS_CONFIG_PAGE_NUM
*
* The number of flash pages to use for non-volatile settings storage.
*/
#define SETTINGS_CONFIG_PAGE_NUM (2)
#endif /* OPENTHREAD_CORE_CC1352_CONFIG_H_ */
@@ -0,0 +1,89 @@
/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef PLATFORM_H_
#define PLATFORM_H_
#include <openthread-core-config.h>
#include <stdint.h>
#include <openthread/config.h>
#include "openthread/types.h"
#ifdef __cplusplus
extern "C" {
#endif
// Global OpenThread instance structure
extern otInstance *sInstance;
/**
* Initialize the debug uart
*/
void cc1352DebugUartInit(void);
/**
* This method initializes the alarm service used by OpenThread.
*
*/
void cc1352AlarmInit(void);
/**
* This method performs alarm driver processing.
*
*/
void cc1352AlarmProcess(otInstance *aInstance);
/**
* This method initializes the radio service used by OpenThread.
*
*/
void cc1352RadioInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc1352RadioProcess(otInstance *aInstance);
/**
* This method initializes the random number service used by OpenThread.
*
*/
void cc1352RandomInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc1352UartProcess(void);
#ifdef __cplusplus
} // extern "C"
#endif
#endif // PLATFORM_H_
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief
* This file includes the platform-specific initializers.
*/
#include <openthread/config.h>
#include "platform-cc1352.h"
#include <stdio.h>
#include <openthread/types.h>
#include "inc/hw_ccfg.h"
#include "inc/hw_ccfg_simple_struct.h"
#include "inc/hw_types.h"
extern const ccfg_t __ccfg;
const char *dummy_ccfg_ref = ((const char *)(&(__ccfg)));
/**
* Function documented in platform-cc1352.h
*/
void PlatformInit(int argc, char *argv[])
{
(void)argc;
(void)argv;
while (dummy_ccfg_ref == NULL)
{
/*
* This provides a code reference to the customer configuration area of
* the flash, otherwise the data is skipped by the linker and not put
* into the final flash image.
*/
}
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
cc1352DebugUartInit();
#endif
cc1352AlarmInit();
cc1352RandomInit();
cc1352RadioInit();
}
bool PlatformPseudoResetWasRequested(void)
{
return false;
}
/**
* Function documented in platform-cc1352.h
*/
void PlatformProcessDrivers(otInstance *aInstance)
{
// should sleep and wait for interrupts here
cc1352UartProcess();
cc1352RadioProcess(aInstance);
cc1352AlarmProcess(aInstance);
}
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <stddef.h>
#include <utils/code_utils.h>
#include <openthread/types.h>
#include <openthread/platform/random.h>
#include <driverlib/prcm.h>
#include <driverlib/trng.h>
enum
{
CC1352_TRNG_MIN_SAMPLES_PER_CYCLE = (1 << 6),
CC1352_TRNG_MAX_SAMPLES_PER_CYCLE = (1 << 24),
CC1352_TRNG_CLOCKS_PER_SAMPLE = 0,
};
/**
* \note if more than 32 bits of entropy are needed, the TRNG core produces
* 64 bits of random data, we just ignore the upper 32 bytes
*/
/**
* Function documented in platform-cc1352.h
*/
void cc1352RandomInit(void)
{
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON)
;
PRCMPeripheralRunEnable(PRCM_PERIPH_TRNG);
PRCMPeripheralSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMPeripheralDeepSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMLoadSet();
TRNGConfigure(CC1352_TRNG_MIN_SAMPLES_PER_CYCLE, CC1352_TRNG_MAX_SAMPLES_PER_CYCLE, CC1352_TRNG_CLOCKS_PER_SAMPLE);
TRNGEnable();
}
/**
* Function documented in platform/random.h
*/
uint32_t otPlatRandomGet(void)
{
while (!(TRNGStatusGet() & TRNG_NUMBER_READY))
;
return TRNGNumberGet(TRNG_LOW_WORD);
}
/**
* Fill an arbitrary area with random data.
*
* @param [out] aOutput Area to place the random data.
* @param [in] aLen Size of the area to place random data.
* @param [out] oLen How much of the output was written to.
*
* @return Indication of error.
* @retval 0 No error occurred.
*/
static int TRNGPoll(unsigned char *aOutput, size_t aLen)
{
size_t length = 0;
union
{
uint32_t u32[2];
uint8_t u8[8];
} buffer;
while (length < aLen)
{
if (length % 8 == 0)
{
/* we've run to the end of the buffer */
while (!(TRNGStatusGet() & TRNG_NUMBER_READY))
;
/*
* don't use TRNGNumberGet here because it will tell the TRNG to
* refill the entropy pool, instead we do it ourself.
*/
buffer.u32[0] = HWREG(TRNG_BASE + TRNG_O_OUT0);
buffer.u32[1] = HWREG(TRNG_BASE + TRNG_O_OUT1);
HWREG(TRNG_BASE + TRNG_O_IRQFLAGCLR) = 0x1;
}
aOutput[length] = buffer.u8[length % 8];
length++;
}
return 0;
}
/**
* Function documented in platform/random.h
*/
otError otPlatRandomGetTrue(uint8_t *aOutput, uint16_t aOutputLength)
{
otError error = OT_ERROR_NONE;
size_t length = aOutputLength;
otEXPECT_ACTION(aOutput, error = OT_ERROR_INVALID_ARGS);
otEXPECT_ACTION(TRNGPoll((unsigned char *)aOutput, length) == 0, error = OT_ERROR_FAILED);
exit:
return error;
}
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements the OpenThread platform abstraction for UART communication.
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <stdarg.h>
#include <stddef.h>
#include <stdio.h>
#include <openthread/types.h>
#include <openthread/platform/debug_uart.h>
#include <openthread/platform/logging.h>
#include <openthread/platform/uart.h>
#include "utils/code_utils.h"
#include <utils/code_utils.h>
#include <driverlib/ioc.h>
#include <driverlib/prcm.h>
#include <driverlib/sys_ctrl.h>
#include <driverlib/uart.h>
/**
* @note This will configure the uart for 115200 baud 8-N-1, no HW flow control
* RX pin IOID_2 TX pin IOID_3.
*
* If the DEBUG UART is enabled, IOID_0 = debug tx, IOID_1 = debug rx
*/
enum
{
CC1352_RECV_CIRC_BUFF_SIZE = 256,
};
static uint8_t const *sSendBuffer = NULL;
static uint16_t sSendLen = 0;
static uint8_t sReceiveBuffer[CC1352_RECV_CIRC_BUFF_SIZE];
static uint16_t sReceiveHeadIdx = 0;
static uint16_t sReceiveTailIdx = 0;
void UART0_intHandler(void);
static void uart_power_control(uint32_t who_base, int turnon)
{
uint32_t value;
if (turnon)
{
/* UART0 is in the SERIAL domain
* UART1 is in the PERIPH domain.
* See: ti/devices/cc13x2_cc26x2/driverlib/pcrm.h, line: 658
*/
value = (who_base == UART0_BASE) ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH;
PRCMPowerDomainOn(value);
while (PRCMPowerDomainStatus(value) != PRCM_DOMAIN_POWER_ON)
;
value = (who_base == UART0_BASE) ? PRCM_PERIPH_UART0 : PRCM_PERIPH_UART1;
PRCMPeripheralRunEnable(value);
PRCMPeripheralSleepEnable(value);
PRCMPeripheralDeepSleepEnable(value);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
else
{
if (who_base == UART0_BASE)
{
PRCMPeripheralRunDisable(PRCM_PERIPH_UART0);
PRCMPeripheralSleepDisable(PRCM_PERIPH_UART0);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UART0);
PRCMLoadSet();
PRCMPowerDomainOff(PRCM_DOMAIN_SERIAL);
}
else
{
/* we never turn the debug uart off */
}
}
}
/**
* Function documented in platform/uart.h
*/
otError otPlatUartEnable(void)
{
uart_power_control(UART0_BASE, true);
IOCPinTypeUart(UART0_BASE, IOID_12, IOID_13, IOID_UNUSED, IOID_UNUSED);
UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
/* Note: UART1 could use IRQs
* However, for reasons of debug simplicity
* we do not use IRQs for the debug uart
*/
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
UARTIntRegister(UART0_BASE, UART0_intHandler);
UARTEnable(UART0_BASE);
return OT_ERROR_NONE;
}
/**
* Function documented in platform/uart.h
*/
otError otPlatUartDisable(void)
{
UARTDisable(UART0_BASE);
UARTIntUnregister(UART0_BASE);
UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT);
IOCPortConfigureSet(IOID_2, IOC_PORT_GPIO, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_3, IOC_PORT_GPIO, IOC_STD_INPUT);
uart_power_control(UART0_BASE, false);
return OT_ERROR_NONE;
}
/**
* Function documented in platform/uart.h
*/
otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
{
otError error = OT_ERROR_NONE;
otEXPECT_ACTION(sSendBuffer == NULL, error = OT_ERROR_BUSY);
sSendBuffer = aBuf;
sSendLen = aBufLength;
exit:
return error;
}
/**
* @brief process the receive side of the buffers
*/
static void processReceive(void)
{
while (sReceiveHeadIdx != sReceiveTailIdx)
{
uint16_t tailIdx;
if (sReceiveHeadIdx < sReceiveTailIdx)
{
tailIdx = sReceiveTailIdx;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = tailIdx;
}
else
{
tailIdx = CC1352_RECV_CIRC_BUFF_SIZE;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = 0;
}
}
}
/**
* @brief process the transmit side of the buffers
*/
static void processTransmit(void)
{
otEXPECT(sSendBuffer != NULL);
for (; sSendLen > 0; sSendLen--)
{
UARTCharPut(UART0_BASE, *sSendBuffer);
sSendBuffer++;
}
sSendBuffer = NULL;
sSendLen = 0;
otPlatUartSendDone();
exit:
return;
}
/**
* Function documented in platform-cc1352.h
*/
void cc1352UartProcess(void)
{
processReceive();
processTransmit();
}
/**
* @brief the interrupt handler for the uart interrupt vector
*/
void UART0_intHandler(void)
{
while (UARTCharsAvail(UART0_BASE))
{
uint32_t c = UARTCharGet(UART0_BASE);
/* XXX process error flags for this character ?? */
sReceiveBuffer[sReceiveTailIdx] = (uint8_t)c;
sReceiveTailIdx++;
if (sReceiveTailIdx >= CC1352_RECV_CIRC_BUFF_SIZE)
{
sReceiveTailIdx = 0;
}
}
}
#if OPENTHREAD_CONFIG_ENABLE_DEBUG_UART
/*
* Documented in platform-cc1352.h
*/
void cc1352DebugUartInit(void)
{
uart_power_control(UART1_BASE, true);
/*
* LaunchPad Pin29 = tx, Pin 30 = rxd
*
* The function IOCPinTypeUart() is hard coded to
* only support UART0 - and does not support UART1.
*
* Thus, these pins are configured using a different way.
*/
IOCPortConfigureSet(IOID_0, IOC_PORT_MCU_UART1_TX, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_1, IOC_PORT_MCU_UART1_RX, IOC_STD_INPUT);
UARTConfigSetExpClk(UART1_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
UARTEnable(UART1_BASE);
}
/* This holds the last key pressed */
static int debug_uart_ungetbuf;
/*
* Documented in "src/core/common/debug_uart.h"
*/
int otPlatDebugUart_getc(void)
{
int ch = -1;
if (otPlatDebugUart_kbhit())
{
/* get & clear 0x100 bit used below as flag */
ch = debug_uart_ungetbuf & 0x0ff;
debug_uart_ungetbuf = 0;
}
return ch;
}
/*
* Documented in "src/core/common/debug_uart.h"
*/
int otPlatDebugUart_kbhit(void)
{
int r;
/* if something is in the unget buf... */
r = !!debug_uart_ungetbuf;
if (!r)
{
/*
* Driverlib code returns "-1", or "char" on something
* but it comes with flags in upper bits
*/
r = (int)UARTCharGetNonBlocking(UART1_BASE);
if (r < 0)
{
r = 0; /* no key pressed */
}
else
{
/* key was pressed, mask flags
* and set 0x100 bit, to distinguish
* the value "0x00" from "no-key-pressed"
*/
debug_uart_ungetbuf = ((r & 0x0ff) | 0x0100);
r = 1; /* key pressed */
}
}
return r;
}
/*
* Documented in "src/core/common/debug_uart.h"
*/
void otPlatDebugUart_putchar_raw(int b)
{
UARTCharPut(UART1_BASE, b);
}
#endif /* OPENTHREAD_CONFIG_ENABLE_DEBUG_UART */
+6 -3
View File
@@ -26,14 +26,17 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <openthread/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <openthread/platform/diag.h>
#if OPENTHREAD_ENABLE_DIAG
#include "platform-cc2650.h"
/**
* Diagnostics mode variables.
*
-1
View File
@@ -55,7 +55,6 @@ otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
return OT_PLAT_RESET_REASON_EXTERNAL;
case RSTSRC_VDDS_LOSS:
case RSTSRC_VDD_LOSS:
case RSTSRC_VDDR_LOSS:
case RSTSRC_CLK_LOSS:
return OT_PLAT_RESET_REASON_CRASH;
+3
View File
@@ -26,12 +26,15 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <openthread/config.h>
#include <openthread/types.h>
#include "cc2650_radio.h"
#include <assert.h>
#include <utils/code_utils.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
#include <openthread/platform/radio.h>
#include <openthread/platform/random.h> /* to seed the CSMA-CA funciton */
+37 -37
View File
@@ -28,58 +28,58 @@
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
lib_LIBRARIES = libopenthread-cc2652.a
lib_LIBRARIES = libopenthread-cc2652.a
# Do not enable -pedantic-errors for cc26xx driverlib
override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
override CFLAGS := $(filter-out -pedantic-errors,$(CFLAGS))
override CXXFLAGS := $(filter-out -pedantic-errors,$(CXXFLAGS))
libopenthread_cc2652_a_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/cc2652 \
-I$(top_srcdir)/third_party/ti/devices/cc26x2 \
-I$(top_srcdir)/third_party/mbedtls/repo/include \
$(MBEDTLS_CPPFLAGS) \
libopenthread_cc2652_a_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/cc2652 \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
-I$(top_srcdir)/third_party/mbedtls/repo/include \
$(MBEDTLS_CPPFLAGS) \
$(NULL)
PLATFORM_SOURCES = \
alarm.c \
diag.c \
flash.c \
logging.c \
misc.c \
platform.c \
radio.c \
random.c \
uart.c \
crypto/aes_alt.c \
cc2652_ccfg.c \
cc2652_startup.c \
cxx_helpers.c \
PLATFORM_SOURCES = \
alarm.c \
diag.c \
flash.c \
logging.c \
misc.c \
platform.c \
radio.c \
random.c \
uart.c \
crypto/aes_alt.c \
cc2652_ccfg.c \
cc2652_startup.c \
cxx_helpers.c \
$(NULL)
libopenthread_cc2652_a_SOURCES = \
$(PLATFORM_SOURCES) \
libopenthread_cc2652_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
libopenthread_cc2652_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a \
libopenthread_cc2652_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
noinst_HEADERS = \
platform-cc2652.h \
noinst_HEADERS = \
platform-cc2652.h \
$(NULL)
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(noinst_HEADERS) \
PRETTY_FILES = \
$(PLATFORM_SOURCES) \
$(noinst_HEADERS) \
$(NULL)
Dash = -
libopenthread_cc2652_a_LIBADD = \
Dash = -
libopenthread_cc2652_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
@@ -30,15 +30,15 @@
# cc2652 platform-specific Makefile
#
CPPFLAGS_COMMON += \
-I$(top_srcdir)/third_party/ti/devices/cc26x2 \
CPPFLAGS_COMMON += \
-I$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2 \
$(NULL)
LDADD_COMMON += \
$(top_builddir)/examples/platforms/cc2652/libopenthread-cc2652.a \
$(top_srcdir)/third_party/ti/devices/cc26x2/driverlib/bin/gcc/driverlib.a \
LDADD_COMMON += \
$(top_builddir)/examples/platforms/cc2652/libopenthread-cc2652.a \
$(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.a \
$(NULL)
LDFLAGS_COMMON += \
-T $(top_srcdir)/third_party/ti/devices/cc26x2/linker_files/cc26x2r1f.lds \
LDFLAGS_COMMON += \
-T $(top_srcdir)/third_party/ti/devices/cc13x2_cc26x2/linker_files/cc26x2r1f.lds \
$(NULL)
+1 -2
View File
@@ -37,8 +37,7 @@
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0D // DIO13 (BTN-1 button) on CC2650 LaunchPad Board for boot loader backdoor
// #define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0B // DIO11 (SELECT button) on CC2650DK (QFN48/7*7) for boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0D // DIO13 (BTN-1 button) on CC2652 LaunchPad Board for boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor
+18 -14
View File
@@ -72,22 +72,26 @@ typedef struct output_config
uint16_t value;
} output_config_t;
/* TODO: update with power measurments */
/**
* TX Power dBm lookup table from SmartRF Studio 7 2.10.0#94
*/
static const output_config_t rgOutputPower[] =
{
{ 5, 0x9330},
{ 4, 0x9324},
{ 3, 0x5a1c},
{ 2, 0x4e18},
{ 1, 0x4214},
{ 0, 0x3161},
{ -3, 0x2558},
{ -6, 0x1d52},
{ -9, 0x194e},
{ -12, 0x144b},
{ -15, 0x0ccb},
{ -18, 0x0cc9},
{ -21, 0x0cc7},
{ 5, 0x941e},
{ 4, 0x6c16},
{ 3, 0x5411},
{ 2, 0x440d},
{ 1, 0x385c},
{ 0, 0x3459},
{ -3, 0x2851},
{ -5, 0x224e},
{ -6, 0x204d},
{ -9, 0x0a8d},
{ -10, 0x168c},
{ -12, 0x10a8},
{ -15, 0xc88c},
{ -18, 0x06c9},
{ -21, 0x06c7},
};
#define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0]))
@@ -2461,7 +2461,7 @@
#define MBEDTLS_ECP_FIXED_POINT_OPTIM 0 /**< Enable fixed-point speed-up */
/* Entropy options */
#define MBEDTLS_ENTROPY_MAX_SOURCES 1 /**< Maximum number of sources supported */
#define MBEDTLS_ENTROPY_MAX_SOURCES 1 /**< Maximum number of sources supported */
//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */
/* Memory buffer allocator options */
-1
View File
@@ -67,7 +67,6 @@ otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
break;
case RSTSRC_VDDS_LOSS:
case RSTSRC_VDD_LOSS:
case RSTSRC_VDDR_LOSS:
case RSTSRC_CLK_LOSS:
ret = OT_PLAT_RESET_REASON_CRASH;
+33 -6
View File
@@ -69,13 +69,40 @@ static volatile cc2652_PhyState_t sState;
/* set to max transmit power by default */
static output_config_t const *sCurrentOutputPower = &(rgOutputPower[0]);
/* TODO: replace with correct overrides, pre-Alpha */
/* Overrides for IEEE 802.15.4, differential mode */
/* Overrides from SmartRF Studio 7 2.10.0#94 */
static uint32_t sIEEEOverrides[] = {
0x00008403, // Use 48 MHz Crystal
0x000088C3, // Disabling dynamic DCDC settings control in RX
0x000088D3, // Disabling dynamic DCDC settings control in TX
0xFFFFFFFF, // END_OVERRIDE
// override_ieee_802_15_4.xml
// PHY: Use MCE RAM patch, RFE ROM bank 1
MCE_RFE_OVERRIDE(1, 0, 0, 0, 1, 0),
// Synth: Use 48 MHz crystal, enable extra PLL filtering
(uint32_t)0x02400403,
// Synth: Configure extra PLL filtering
(uint32_t)0x001C8473,
// Synth: Configure synth hardware
(uint32_t)0x00088433,
// Synth: Set minimum RTRIM to 3
(uint32_t)0x00038793,
// Synth: Configure faster calibration
HW32_ARRAY_OVERRIDE(0x4004, 1),
// Synth: Configure faster calibration
(uint32_t)0x1C0C0618,
// Synth: Configure faster calibration
(uint32_t)0xC00401A1,
// Synth: Configure faster calibration
(uint32_t)0x00010101,
// Synth: Configure faster calibration
(uint32_t)0xC0040141,
// Synth: Configure faster calibration
(uint32_t)0x00214AD3,
// Synth: Decrease synth programming time-out (0x0298 RAT ticks = 166 us)
(uint32_t)0x02980243,
// DC/DC regulator: In Tx, use DCDCCTL5[3:0]=0xC (DITHER_EN=1 and IPEAK=4). In Rx, use DCDCCTL5[3:0]=0xC
// (DITHER_EN=1 and IPEAK=4).
(uint32_t)0xFCFC08C3,
// Rx: Set LNA bias current offset to +15 to saturate trim to max (default: 0)
(uint32_t)0x000F8883,
// override_frontend_id.xml
(uint32_t)0xFFFFFFFF,
};
/*
+1 -1
View File
@@ -82,7 +82,7 @@ static void uart_power_control(uint32_t who_base, int turnon)
{
/* UART0 is in the SERIAL domain
* UART1 is in the PERIPH domain.
* See: ti/devices/cc26x2/driverlib/pcrm.h, line: 658
* See: ti/devices/cc13x2_cc26x2/driverlib/pcrm.h, line: 658
*/
value = (who_base == UART0_BASE) ? PRCM_DOMAIN_SERIAL : PRCM_DOMAIN_PERIPH;
PRCMPowerDomainOn(value);
+19
View File
@@ -258,6 +258,25 @@ extern "C" {
#define OT_UNREACHABLE_CODE(CODE) CODE
#elif defined(__TI_ARM__)
#include <stddef.h>
#define OT_UNUSED_VARIABLE(VARIABLE) \
do \
{ \
if (&VARIABLE == NULL) \
{ \
} \
} while (false)
/*
* #112-D statement is unreachable
* #129-D loop is not reachable
*/
#define OT_UNREACHABLE_CODE(CODE) \
_Pragma("diag_push") _Pragma("diag_suppress 112") _Pragma("diag_suppress 129") CODE _Pragma("diag_pop")
#else
#define OT_UNUSED_VARIABLE(VARIABLE) \
+1
View File
@@ -274,3 +274,4 @@ endif # OPENTHREAD_BUILD_COVERAGE
endif # OPENTHREAD_BUILD_TESTS
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
+14 -10
View File
@@ -1,10 +1,11 @@
#CC26XXware
## URL
<!-- TODO: UPDATE THIS for CC2650 / CC1352 / CC2652 --!>
http://www.ti.com/tool/simplelink-cc26x2-sdk
## Version
`driverlib_cc13xx_cc26xx_3_01_01_17779`
`driverlib_cc13xx_cc26xx_3_30_03_00`
## License
@@ -12,7 +13,7 @@ BSD-3-Clause
## License File
[Export Manifest](cc26xxware/cc26xxware_2_24_0x_manifest.html)
[Export Manifest] manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html
## Documentation
@@ -20,21 +21,24 @@ This version of cc26xxware is copied from the [SimpleLink CC26x2 Software
Development Kit](http://www.ti.com/tool/simplelink-cc26x2-sdk). Modifications
were made to the software package to support the GCC Automake pedantic build.
| file | change |
|-----------------------------------------------|------------------------------------------------------------------------------|
| `device/cc26x0/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `device/cc26x2/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `device/cc26x0/driverlib/cpu.h` | GCC asm extensions added to avoid unused variable warning in `CPUbasepriSet` |
| `device/cc26x2/driverlib/cpu.h` | GCC asm extensions added to avoid unused variable warning in `CPUbasepriSet` |
| `device/cc26x0/linker_files/cc26x0f128.lds` | `end` symbol added for GCC stdlib |
| `device/cc26x2/linker_files/cc26x2r1f.lds` | `end` symbol added for GCC stdlib |
Also see: release_notes_driverlib_cc13xx_cc26xx.html
| file | change |
|-------------------------------------------------------|------------------------------------------------------------------------------|
| `device/cc26x0/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `device/cc13x52_cc26x2/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `device/cc26x0/linker_files/cc26x0f128.lds` | `end` symbol added for GCC stdlib |
| `device/cc13x52_cc26x2/linker_files/cc26x2r1f.lds` | `end` symbol added for GCC stdlib |
Documentation can be found within the [SimpleLink CC26x2 Software Development
Kit](http://www.ti.com/tool/simplelink-cc26x2-sdk).
**TODO** Update above link
## Description
CC26XXware is the board support library for Texas Instruments' CC26XX line of
connected MCUs for developers to easily leverage the hardware capabilities of
those platforms. Texas Instruments Incorporated recommends TI-RTOS and its
associated drivers for future development.
+104 -42
View File
@@ -50,77 +50,138 @@
extern "C" {
#endif
/* List of DeviceFamily_ID_XYZ values.
* DeviceFamily_ID may be used in the preprocessor for conditional compilation.
* DeviceFamily_ID is set as one of these IDs is set based on the top
* level DeviceFamily_XYZ define.
*/
#define DeviceFamily_ID_CC26X0 0x00000001
#define DeviceFamily_ID_CC26X0R2 0x00000002
#define DeviceFamily_ID_CC26X2 0x00000004
#define DeviceFamily_ID_CC13X0 0x00000100
#define DeviceFamily_ID_CC13X2 0x00000200
#define DeviceFamily_ID_CC3200 0x00010000
#define DeviceFamily_ID_CC3220 0x00020000
#define DeviceFamily_ID_MSP432P401x 0x01000000
#define DeviceFamily_ID_MSP432P4x1xI 0x02000000
#define DeviceFamily_ID_MSP432P4x1xT 0x04000000
/* Lookup table that sets DeviceFamily_ID and DeviceFamily_DIRECTORY based on the existence
* of a DeviceFamily_XYZ define.
* If DeviceFamily_XYZ is undefined, a compiler error is thrown. If multiple DeviceFamily_XYZ
* are defined, the first one encountered is used.
/*
* DeviceFamily_ID_XYZ values.
*
* Currently supported values of DeviceFamily_XYZ are:
* - DeviceFamily_CC26X0
* - DeviceFamily_CC26X0R2
* - DeviceFamily_CC26X2
* - DeviceFamily_CC13X0
* - DeviceFamily_CC13X2
* - DeviceFamily_CC3200
* - DeviceFamily_CC3220
* - DeviceFamily_MSP432P401x
* - DeviceFamily_MSP432P4x1
* DeviceFamily_ID may be used in the preprocessor for conditional compilation.
* DeviceFamily_ID is set to one of these values based on the top level
* DeviceFamily_XYZ define.
*/
#if defined(DeviceFamily_CC26X0)
#define DeviceFamily_ID_CC13X0 1
#define DeviceFamily_ID_CC26X0 2
#define DeviceFamily_ID_CC26X0R2 3
#define DeviceFamily_ID_CC13X2_V1 4
#define DeviceFamily_ID_CC13X2_V2 5
#define DeviceFamily_ID_CC13X2 DeviceFamily_ID_CC13X2_V1
#define DeviceFamily_ID_CC26X2_V1 6
#define DeviceFamily_ID_CC26X2_V2 7
#define DeviceFamily_ID_CC26X2 DeviceFamily_ID_CC26X2_V1
#define DeviceFamily_ID_CC3200 8
#define DeviceFamily_ID_CC3220 9
#define DeviceFamily_ID_MSP432P401x 10
#define DeviceFamily_ID_MSP432P4x1xI 11
#define DeviceFamily_ID_MSP432P4x1xT 12
#define DeviceFamily_ID_MSP432E401Y 13
#define DeviceFamily_ID_MSP432E411Y 14
/*
* DeviceFamily_PARENT_XYZ values.
*
* DeviceFamily_PARENT may be used in the preprocessor for conditional
* compilation. DeviceFamily_PARENT is set to one of these values based
* on the top-level DeviceFamily_XYZ define.
*/
#define DeviceFamily_PARENT_CC13X0_CC26X0 1
#define DeviceFamily_PARENT_CC13X2_CC26X2 2
#define DeviceFamily_PARENT_MSP432P401R 3
#define DeviceFamily_PARENT_MSP432P4111 4
/*
* Lookup table that sets DeviceFamily_ID, DeviceFamily_DIRECTORY, and
* DeviceFamily_PARENT based on the DeviceFamily_XYZ define.
* If DeviceFamily_XYZ is undefined, a compiler error is thrown. If
* multiple DeviceFamily_XYZ are defined, the first one encountered is used.
*/
#if defined(DeviceFamily_CC13X0)
#define DeviceFamily_ID DeviceFamily_ID_CC13X0
#define DeviceFamily_DIRECTORY cc13x0
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0
#elif defined(DeviceFamily_CC13X2)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC13X2_V1)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2_V1
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC13X2_V2)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2_V2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v2
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC26X0)
#define DeviceFamily_ID DeviceFamily_ID_CC26X0
#define DeviceFamily_DIRECTORY cc26x0
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0
#elif defined(DeviceFamily_CC26X0R2)
#define DeviceFamily_ID DeviceFamily_ID_CC26X0R2
#define DeviceFamily_DIRECTORY cc26x0r2
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0
#elif defined(DeviceFamily_CC26X2)
#define DeviceFamily_ID DeviceFamily_ID_CC26X2
#define DeviceFamily_DIRECTORY cc26x2
#elif defined(DeviceFamily_CC13X0)
#define DeviceFamily_ID DeviceFamily_ID_CC13X0
#define DeviceFamily_DIRECTORY cc13x0
#elif defined(DeviceFamily_CC13X2)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2
#define DeviceFamily_DIRECTORY cc26x2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC26X2_V1)
#define DeviceFamily_ID DeviceFamily_ID_CC26X2_V1
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC26X2_V2)
#define DeviceFamily_ID DeviceFamily_ID_CC26X2_V2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v2
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC3200)
#define DeviceFamily_ID DeviceFamily_ID_CC3200
#define DeviceFamily_DIRECTORY cc32xx
#elif defined(DeviceFamily_CC3220)
#define DeviceFamily_ID DeviceFamily_ID_CC3220
#define DeviceFamily_DIRECTORY cc32xx
#elif defined(DeviceFamily_MSP432P401x) || defined(__MSP432P401R__)
#define DeviceFamily_ID DeviceFamily_ID_MSP432P401x
#define DeviceFamily_DIRECTORY msp432p4xx
#define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P401R
#if !defined(__MSP432P401R__)
#define __MSP432P401R__
#endif
#elif defined(DeviceFamily_MSP432P4x1xI)
#define DeviceFamily_ID DeviceFamily_ID_MSP432P4x1xI
#define DeviceFamily_DIRECTORY msp432p4xx
#define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P4111
#if !defined(__MSP432P4111__)
#define __MSP432P4111__
#endif
#elif defined(DeviceFamily_MSP432P4x1xT)
#define DeviceFamily_ID DeviceFamily_ID_MSP432P4x1xT
#define DeviceFamily_DIRECTORY msp432p4xx
#define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P4111
#if !defined(__MSP432P4111__)
#define __MSP432P4111__
#endif
#elif defined(DeviceFamily_MSP432E401Y)
#define DeviceFamily_ID DeviceFamily_ID_MSP432E401Y
#define DeviceFamily_DIRECTORY msp432e4
#if !defined(__MSP432E401Y__)
#define __MSP432E401Y__
#endif
#elif defined(DeviceFamily_MSP432E411Y)
#define DeviceFamily_ID DeviceFamily_ID_MSP432E411Y
#define DeviceFamily_DIRECTORY msp432e4
#if !defined(__MSP432E411Y__)
#define __MSP432E411Y__
#endif
#else
#error "DeviceFamily_XYZ undefined. You must defined DeviceFamily_XYZ!"
#endif
@@ -128,11 +189,12 @@ extern "C" {
/*!
* @brief Macro to include correct driverlib path.
*
* @pre DeviceFamily_XYZ which sets DeviceFamily_DIRECTORY must be defined first.
* @pre DeviceFamily_XYZ which sets DeviceFamily_DIRECTORY must be defined
* first.
*
* @param x A token containing the path of the file to include based on the root
* device folder. The preceding forward slash must be omitted.
* For example:
* @param x A token containing the path of the file to include based on
* the root device folder. The preceding forward slash must be
* omitted. For example:
* - #include DeviceFamily_constructPath(inc/hw_memmap.h)
* - #include DeviceFamily_constructPath(driverlib/ssi.h)
*
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: crypto.c
* Revised: 2017-03-29 13:49:36 +0200 (Wed, 29 Mar 2017)
* Revision: 48751
* Revised: 2018-05-08 10:29:36 +0200 (Tue, 08 May 2018)
* Revision: 51973
*
* Description: Driver for the aes functions of the crypto module
*
@@ -47,24 +47,32 @@
#if !defined(DOXYGEN)
#undef AESStartDMAOperation
#define AESStartDMAOperation NOROM_AESStartDMAOperation
#undef AESLoadInitializationVector
#define AESLoadInitializationVector NOROM_AESLoadInitializationVector
#undef AESSetInitializationVector
#define AESSetInitializationVector NOROM_AESSetInitializationVector
#undef AESWriteCCMInitializationVector
#define AESWriteCCMInitializationVector NOROM_AESWriteCCMInitializationVector
#undef AESReadTag
#define AESReadTag NOROM_AESReadTag
#undef AESVerifyTag
#define AESVerifyTag NOROM_AESVerifyTag
#undef AESWriteToKeyStore
#define AESWriteToKeyStore NOROM_AESWriteToKeyStore
#undef AESReadFromKeyStore
#define AESReadFromKeyStore NOROM_AESReadFromKeyStore
#undef AESWaitForIRQFlags
#define AESWaitForIRQFlags NOROM_AESWaitForIRQFlags
#undef AESConfigureCCMCtrl
#define AESConfigureCCMCtrl NOROM_AESConfigureCCMCtrl
#endif
//*****************************************************************************
//
// Load the initialisation vector.
// Load the initialization vector.
//
//*****************************************************************************
void AESLoadInitializationVector(uint32_t *initializationVector)
void AESSetInitializationVector(const uint32_t *initializationVector)
{
// Write initialization vector to the aes registers
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0) = initializationVector[0];
@@ -78,15 +86,14 @@ void AESLoadInitializationVector(uint32_t *initializationVector)
// Start a crypto DMA operation.
//
//*****************************************************************************
void AESStartDMAOperation(uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length)
void AESStartDMAOperation(const uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length)
{
// Clear any outstanding events.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = CRYPTO_IRQCLR_RESULT_AVAIL_M | CRYPTO_IRQEN_DMA_IN_DONE_M; // This might need AES_IRQEN_DMA_IN_DONE as well
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M));
if (channel0Length && channel0Addr) {
// We actually want to perform an operation. Clear any outstanding events.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = CRYPTO_IRQCLR_RESULT_AVAIL_M | CRYPTO_IRQEN_DMA_IN_DONE_M; // This might need AES_IRQEN_DMA_IN_DONE as well
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M));
// Configure the DMA controller - enable both DMA channels.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
@@ -122,15 +129,16 @@ uint32_t AESWaitForIRQFlags(uint32_t irqFlags)
do {
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M)));
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M |
CRYPTO_IRQSTAT_RESULT_AVAIL_M |
CRYPTO_IRQSTAT_DMA_BUS_ERR_M |
CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)));
// Save the IRQ trigger source
irqTrigger = HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT);
irqTrigger = HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags;
// Clear IRQ flags
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = irqFlags;
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & irqFlags & (CRYPTO_IRQSTAT_DMA_IN_DONE_M | CRYPTO_IRQSTAT_RESULT_AVAIL_M));
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = irqTrigger;
return irqTrigger;
}
@@ -140,7 +148,7 @@ uint32_t AESWaitForIRQFlags(uint32_t irqFlags)
// Transfer a key from CM3 memory to a key store location.
//
//*****************************************************************************
uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t keyStoreArea)
uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea)
{
// Check the arguments.
ASSERT((keyStoreArea == AES_KEY_AREA_0) ||
@@ -152,13 +160,13 @@ uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t
(keyStoreArea == AES_KEY_AREA_6) ||
(keyStoreArea == AES_KEY_AREA_7));
ASSERT((aesKeySizeBytes == AES_128_KEY_LENGTH_BYTES) ||
(aesKeySizeBytes == AES_192_KEY_LENGTH_BYTES) ||
(aesKeySizeBytes == AES_256_KEY_LENGTH_BYTES));
ASSERT((aesKeyLength == AES_128_KEY_LENGTH_BYTES) ||
(aesKeyLength == AES_192_KEY_LENGTH_BYTES) ||
(aesKeyLength == AES_256_KEY_LENGTH_BYTES));
uint32_t keySize = 0;
switch (aesKeySizeBytes) {
switch (aesKeyLength) {
case AES_128_KEY_LENGTH_BYTES:
keySize = CRYPTO_KEYSIZE_SIZE_128_BIT;
break;
@@ -196,16 +204,20 @@ uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t
}
// Enable key to write (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = (1 << keyStoreArea);
HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = 1 << keyStoreArea;
// Total key length in bytes (16 for 1 x 128-bit key and 32 for 1 x 256-bit key).
AESStartDMAOperation(aesKey, aesKeySizeBytes, 0, 0);
AESStartDMAOperation(aesKey, aesKeyLength, 0, 0);
// Wait for the DMA operation to complete.
uint32_t irqTrigger = AESWaitForIRQFlags(CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQCLR_RESULT_AVAIL | CRYPTO_IRQSTAT_DMA_BUS_ERR | CRYPTO_IRQSTAT_KEY_ST_WR_ERR);
uint32_t irqTrigger = AESWaitForIRQFlags(CRYPTO_IRQCLR_RESULT_AVAIL | CRYPTO_IRQCLR_DMA_IN_DONE | CRYPTO_IRQSTAT_DMA_BUS_ERR | CRYPTO_IRQSTAT_KEY_ST_WR_ERR);
// If we correctly transfered the key into the keystore, return success.
if ((irqTrigger & (CRYPTO_IRQSTAT_DMA_BUS_ERR_M | CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)) && !(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (1 << keyStoreArea))) {
// Re-enable interrupts globally.
IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ);
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
// If we had a bus error or the key is not in the CRYPTO_O_KEYWRITTENAREA, return an error.
if ((irqTrigger & (CRYPTO_IRQSTAT_DMA_BUS_ERR_M | CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M)) || !(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (1 << keyStoreArea))) {
// There was an error in writing to the keyStore.
return AES_KEYSTORE_ERROR;
}
@@ -258,21 +270,102 @@ uint32_t AESReadFromKeyStore(uint32_t keyStoreArea)
//*****************************************************************************
//
// Read the tag after a completed CCM or CBC-MAC operation.
// Read the tag after a completed CCM, GCM, or CBC-MAC operation.
//
//*****************************************************************************
uint32_t AESReadTag(uint32_t *tag)
uint32_t AESReadTag(uint8_t *tag, uint32_t tagLength)
{
// If the tag is not ready, return an error code.
if (!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) & CRYPTO_AESCTL_SAVED_CONTEXT_RDY_M)) {
return AES_TAG_NOT_READY;
}
// The intermediate array is used instead of a caller-provided one
// to enable a simple API with no unintuitive alignment or size requirements.
// This is a trade-off of stack-depth vs ease-of-use that came out on the
// ease-of-use side.
uint32_t computedTag[AES_BLOCK_SIZE / sizeof(uint32_t)];
// Read tag
tag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0);
tag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1);
tag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2);
tag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3);
// Wait until the computed tag is ready.
while (!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) & CRYPTO_AESCTL_SAVED_CONTEXT_RDY_M));
// Read computed tag out from the HW registers
// Need to read out all 128 bits in four reads to correctly clear CRYPTO_AESCTL_SAVED_CONTEXT_RDY flag
computedTag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0);
computedTag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1);
computedTag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2);
computedTag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3);
memcpy(tag, computedTag, tagLength);
return AES_SUCCESS;
}
//*****************************************************************************
//
// Verify the provided tag against the computed tag after a completed CCM or
// GCM operation.
//
//*****************************************************************************
uint32_t AESVerifyTag(const uint8_t *tag, uint32_t tagLength)
{
uint32_t resultStatus;
// The intermediate array is allocated on the stack to ensure users do not
// point the tag they provide and the one computed at the same location.
// That would cause memcmp to compare an array against itself. We could add
// a check that verifies that the arrays are not the same. If we did that and
// modified AESReadTag to just copy all 128 bits into a provided array,
// we could save 16 bytes of stack space while making the API much more
// complicated.
uint8_t computedTag[AES_BLOCK_SIZE];
resultStatus = AESReadTag(computedTag, tagLength);
if (resultStatus != AES_SUCCESS) {
return resultStatus;
}
resultStatus = memcmp(computedTag, tag, tagLength);
if (resultStatus != 0) {
return AES_TAG_VERIFICATION_FAILED;
}
return AES_SUCCESS;
}
//*****************************************************************************
//
// Configure the AES module for CCM mode
//
//*****************************************************************************
void AESConfigureCCMCtrl(uint32_t nonceLength, uint32_t macLength, bool encrypt)
{
uint32_t ctrlVal = 0;
ctrlVal = ((15 - nonceLength - 1) << CRYPTO_AESCTL_CCM_L_S);
if ( macLength >= 2 ) {
ctrlVal |= ((( macLength - 2 ) >> 1 ) << CRYPTO_AESCTL_CCM_M_S );
}
ctrlVal |= CRYPTO_AESCTL_CCM |
CRYPTO_AESCTL_CTR |
CRYPTO_AESCTL_SAVE_CONTEXT |
CRYPTO_AESCTL_CTR_WIDTH_128_BIT;
ctrlVal |= encrypt ? CRYPTO_AESCTL_DIR : 0;
AESSetCtrl(ctrlVal);
}
//*****************************************************************************
//
// Configure an IV for CCM mode of operation
//
//*****************************************************************************
void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength)
{
union {
uint32_t word[4];
uint8_t byte[16];
} initializationVector = {{0}};
initializationVector.byte[0] = 15 - nonceLength - 1;
memcpy(&(initializationVector.byte[1]), nonce, nonceLength);
AESSetInitializationVector(initializationVector.word);
}
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aes.h
* Revised: 2017-03-29 13:20:12 +0200 (Wed, 29 Mar 2017)
* Revision: 48750
* Revised: 2018-04-17 14:54:06 +0200 (Tue, 17 Apr 2018)
* Revision: 51890
*
* Description: AES header file.
*
@@ -61,6 +61,7 @@ extern "C"
#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
@@ -84,13 +85,17 @@ extern "C"
//*****************************************************************************
#if !defined(DOXYGEN)
#define AESStartDMAOperation NOROM_AESStartDMAOperation
#define AESLoadInitializationVector NOROM_AESLoadInitializationVector
#define AESSetInitializationVector NOROM_AESSetInitializationVector
#define AESWriteCCMInitializationVector NOROM_AESWriteCCMInitializationVector
#define AESReadTag NOROM_AESReadTag
#define AESVerifyTag NOROM_AESVerifyTag
#define AESWriteToKeyStore NOROM_AESWriteToKeyStore
#define AESReadFromKeyStore NOROM_AESReadFromKeyStore
#define AESWaitForIRQFlags NOROM_AESWaitForIRQFlags
#define AESConfigureCCMCtrl NOROM_AESConfigureCCMCtrl
#endif
//*****************************************************************************
//
// Values that can be passed to AESIntEnable, AESIntDisable, and AESIntClear
@@ -119,6 +124,7 @@ extern "C"
#define AES_DMA_BUSY 3
#define AES_DMA_ERROR 4
#define AES_TAG_NOT_READY 5
#define AES_TAG_VERIFICATION_FAILED 6
// Key store module defines
#define AES_IV_LENGTH_BYTES 16
@@ -127,7 +133,7 @@ extern "C"
#define AES_192_KEY_LENGTH_BYTES (192 / 8)
#define AES_256_KEY_LENGTH_BYTES (256 / 8)
#define AES_ECB_BLOCK_SIZE 16
#define AES_BLOCK_SIZE 16
// DMA status codes
#define AES_DMA_CHANNEL0_ACTIVE CRYPTO_DMASTAT_CH0_ACT_M
@@ -182,32 +188,32 @@ extern "C"
//! transfer. It is also used by the hardware module as a signal to
//! begin the encryption, decryption, or MAC operation.
//!
//! \param channel0Addr A pointer to the address channel 0 shall use.
//! \param [in] channel0Addr A pointer to the address channel 0 shall use.
//!
//! \param channel0Length Length of the data in bytes to be read from or
//! written to at channel0Addr. Set to 0 to not set up
//! this channel. Permitted ranges are mode dependent
//! and displayed below.
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [1, sizeof(RAM)]
//! \param [in] channel0Length Length of the data in bytes to be read from or
//! written to at channel0Addr. Set to 0 to not set up
//! this channel. Permitted ranges are mode dependent
//! and displayed below.
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [1, sizeof(RAM)]
//!
//! \param channel1Addr A pointer to the address channel 1 shall use.
//! \param [out] channel1Addr A pointer to the address channel 1 shall use.
//!
//! \param channel1Length Length of the data in bytes to be read from or
//! written to at channel1Addr. Set to 0 to not set up
//! this channel.Permitted ranges are mode dependent
//! and displayed below.
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [1, sizeof(RAM)]
//! \param [in] channel1Length Length of the data in bytes to be read from or
//! written to at channel1Addr. Set to 0 to not set up
//! this channel.Permitted ranges are mode dependent
//! and displayed below.
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [1, sizeof(RAM)]
//!
//! \return None
//
//*****************************************************************************
extern void AESStartDMAOperation(uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length);
extern void AESStartDMAOperation(const uint8_t *channel0Addr, uint32_t channel0Length, uint8_t *channel1Addr, uint32_t channel1Length);
//*****************************************************************************
//
@@ -241,29 +247,68 @@ extern void AESStartDMAOperation(uint8_t *channel0Addr, uint32_t channel0Length,
//! }
//! \endcode
//!
//! \param initializationVector Pointer to an array with four 32-bit elements
//! to be used as initialization vector.
//! Elements of array must be word aligned in memory.
//! \param [in] initializationVector Pointer to an array with four 32-bit elements
//! to be used as initialization vector.
//! Elements of array must be word aligned in memory.
//!
//! \return None
//
//*****************************************************************************
extern void AESLoadInitializationVector(uint32_t *initializationVector);
extern void AESSetInitializationVector(const uint32_t *initializationVector);
//*****************************************************************************
//
//! \brief Generate and load the initialization vector for a CCM operation.
//!
//!
//! \param [in] nonce Pointer to a nonce of length \c nonceLength.
//!
//! \param [in] nonceLength Number of bytes to copy from \c nonce when creating
//! the CCM IV. The L-value is also derived from it.
//!
//! \return None
//
//*****************************************************************************
extern void AESWriteCCMInitializationVector(const uint8_t *nonce, uint32_t nonceLength);
//*****************************************************************************
//
//! \brief Read the tag out from the crypto module.
//!
//! \param tag Pointer to an array with four 32-bit elements
//! to be used as initialization vector.
//! Elements of array must be word aligned in memory.
//! This function copies the \c tagLength bytes from the tag calculated by the
//! crypto module in CCM, GCM, or CBC-MAC mode to \c tag.
//!
//! \param [out] tag Pointer to an array of \c tagLength bytes.
//!
//! \param [in] tagLength Number of bytes to copy to \c tag.
//!
//! \return Returns a status code depending on the result of the transfer.
//! - \ref AES_TAG_NOT_READY if the tag is not ready yet
//! - \ref AES_SUCCESS otherwise
//
//*****************************************************************************
extern uint32_t AESReadTag(uint32_t *tag);
extern uint32_t AESReadTag(uint8_t *tag, uint32_t tagLength);
//*****************************************************************************
//
//! \brief Verifies the provided \c tag against calculated one
//!
//! This function compares the provided tag against the tag calculated by the
//! crypto module during the last CCM, GCM, or CBC-MAC
//!
//! This function copies the \c tagLength bytes from the tag calculated by the
//! crypto module in CCM, GCM, or CBC-MAC mode to \c tag.
//!
//! \param [in] tag Pointer to an array of \c tagLength bytes.
//!
//! \param [in] tagLength Number of bytes to compare.
//!
//! \return Returns a status code depending on the result of the transfer.
//! - \ref AES_TAG_VERIFICATION_FAILED if the verification failed
//! - \ref AES_SUCCESS otherwise
//
//*****************************************************************************
extern uint32_t AESVerifyTag(const uint8_t *tag, uint32_t tagLength);
//*****************************************************************************
//
@@ -271,25 +316,25 @@ extern uint32_t AESReadTag(uint32_t *tag);
//!
//! The crypto DMA transfers the key and function does not return until
//! the operation completes.
//! The keyStore can only contain valid keys of one \c aesKeySizeBytes at
//! The keyStore can only contain valid keys of one \c aesKeyLength at
//! any one point in time. The keyStore cannot contain both 128-bit and
//! 256-bit keys simultaneously. When a key of a different \c aesKeySizeBytes
//! from the previous \c aesKeySizeBytes is loaded, all previous keys are
//! 256-bit keys simultaneously. When a key of a different \c aesKeyLength
//! from the previous \c aesKeyLength is loaded, all previous keys are
//! invalidated.
//!
//! \param aesKey Pointer to key. Does not need to be word-aligned.
//! \param [in] aesKey Pointer to key. Does not need to be word-aligned.
//!
//! \param aesKeySizeBytes The key size in bytes. Currently, 128-bit, 192-bit,
//! and 256-bit keys are supported.
//! \param [in] aesKeyLength The key size in bytes. Currently, 128-bit, 192-bit,
//! and 256-bit keys are supported.
//! - \ref AES_128_KEY_LENGTH_BYTES
//! - \ref AES_192_KEY_LENGTH_BYTES
//! - \ref AES_256_KEY_LENGTH_BYTES
//!
//! \param keyStoreArea The key store area to transfer the key to.
//! When using 128-bit keys, only the specified key store
//! area will be occupied.
//! When using 256-bit or 192-bit keys, two consecutive key areas
//! are used to store the key.
//! \param [in] keyStoreArea The key store area to transfer the key to.
//! When using 128-bit keys, only the specified key store
//! area will be occupied.
//! When using 256-bit or 192-bit keys, two consecutive key areas
//! are used to store the key.
//! - \ref AES_KEY_AREA_0
//! - \ref AES_KEY_AREA_1
//! - \ref AES_KEY_AREA_2
@@ -322,7 +367,7 @@ extern uint32_t AESReadTag(uint32_t *tag);
//! \sa AESReadFromKeyStore
//
//*****************************************************************************
extern uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, uint32_t keyStoreArea);
extern uint32_t AESWriteToKeyStore(const uint8_t *aesKey, uint32_t aesKeyLength, uint32_t keyStoreArea);
//*****************************************************************************
//
@@ -331,12 +376,12 @@ extern uint32_t AESWriteToKeyStore(uint8_t *aesKey, uint32_t aesKeySizeBytes, ui
//!
//! The function polls until the transfer is complete.
//!
//! \param keyStoreArea The key store area to transfer the key from. When using
//! 256-bit keys, either of the occupied key areas may be
//! specified to load the key. There is no need to specify
//! the length of the key here as the key store keeps track
//! of how long a key associated with any valid key area is
//! and where is starts.
//! \param [in] keyStoreArea The key store area to transfer the key from. When using
//! 256-bit keys, either of the occupied key areas may be
//! specified to load the key. There is no need to specify
//! the length of the key here as the key store keeps track
//! of how long a key associated with any valid key area is
//! and where is starts.
//! - \ref AES_KEY_AREA_0
//! - \ref AES_KEY_AREA_1
//! - \ref AES_KEY_AREA_2
@@ -372,10 +417,10 @@ extern uint32_t AESReadFromKeyStore(uint32_t keyStoreArea);
//! always be included in \c irqFlags and will always be returned together
//! with any error codes.
//!
//! \param irqFlags IRQ flags to poll and mask that the status register will be
//! masked with. May consist of any bitwise OR of the flags
//! below that includes at least one of
//! \ref AES_DMA_IN_DONE or \ref AES_RESULT_RDY :
//! \param [in] irqFlags IRQ flags to poll and mask that the status register will be
//! masked with. May consist of any bitwise OR of the flags
//! below that includes at least one of
//! \ref AES_DMA_IN_DONE or \ref AES_RESULT_RDY :
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//! - \ref AES_DMA_BUS_ERR
@@ -393,12 +438,29 @@ extern uint32_t AESReadFromKeyStore(uint32_t keyStoreArea);
//*****************************************************************************
extern uint32_t AESWaitForIRQFlags(uint32_t irqFlags);
//*****************************************************************************
//
//! \brief Configure AES engine for CCM operation.
//!
//! \param [in] nonceLength Length of the nonce. Must be <= 14.
//!
//! \param [in] macLength Length of the MAC. Must be <= 16.
//!
//! \param [in] encrypt Whether to set up an encrypt or decrypt operation.
//! - true: encrypt
//! - false: decrypt
//!
//! \return None
//
//*****************************************************************************
extern void AESConfigureCCMCtrl(uint32_t nonceLength, uint32_t macLength, bool encrypt);
//*****************************************************************************
//
//! \brief Invalidate a key in the key store
//!
//! \param keyStoreArea is the entry in the key store to invalidate. This
//! permanently deletes the key from the key store.
//! \param [in] keyStoreArea is the entry in the key store to invalidate. This
//! permanently deletes the key from the key store.
//! - \ref AES_KEY_AREA_0
//! - \ref AES_KEY_AREA_1
//! - \ref AES_KEY_AREA_2
@@ -430,8 +492,8 @@ __STATIC_INLINE void AESInvalidateKey(uint32_t keyStoreArea)
//
//! \brief Select type of operation
//!
//! \param algorithm Flags that specify which type of operation the crypto
//! module shall perform. The flags are mutually exclusive.
//! \param [in] algorithm Flags that specify which type of operation the crypto
//! module shall perform. The flags are mutually exclusive.
//! - 0 : Reset the module
//! - \ref AES_ALGSEL_AES
//! - \ref AES_ALGSEL_TAG
@@ -442,9 +504,9 @@ __STATIC_INLINE void AESInvalidateKey(uint32_t keyStoreArea)
//*****************************************************************************
__STATIC_INLINE void AESSelectAlgorithm(uint32_t algorithm)
{
ASSERT((keyStoreEntry == AES_ALGSEL_AES) ||
(keyStoreEntry == AES_ALGSEL_AES | AES_ALGSEL_TAG) ||
(keyStoreEntry == AES_ALGSEL_KEY_STORE));
ASSERT((algorithm == AES_ALGSEL_AES) ||
(algorithm == AES_ALGSEL_AES | AES_ALGSEL_TAG) ||
(algorithm == AES_ALGSEL_KEY_STORE));
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = algorithm;
}
@@ -457,12 +519,12 @@ __STATIC_INLINE void AESSelectAlgorithm(uint32_t algorithm)
//! register. The relevant field names have the format:
//! - CRYPTO_AESCTL_[field name]
//!
//! \param ctrlMask Specifies which register fields shall be set.
//! \param [in] ctrlMask Specifies which register fields shall be set.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void AESSetupCtrl(uint32_t ctrlMask)
__STATIC_INLINE void AESSetCtrl(uint32_t ctrlMask)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = ctrlMask;
}
@@ -474,22 +536,22 @@ __STATIC_INLINE void AESSetupCtrl(uint32_t ctrlMask)
//! Despite specifying it here, the crypto DMA must still be
//! set up with the correct data length.
//!
//! \param length Data length in bytes. If this
//! value is set to 0, only authentication of the AAD is
//! performed in CCM-mode and AESWriteAuthLength() must be set to
//! >0.
//! Range depends on the mode:
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [0, sizeof(RAM)]
//! \param [in] length Data length in bytes. If this
//! value is set to 0, only authentication of the AAD is
//! performed in CCM-mode and AESWriteAuthLength() must be set to
//! >0.
//! Range depends on the mode:
//! - ECB: [16]
//! - CBC: [1, sizeof(RAM)]
//! - CBC-MAC: [1, sizeof(RAM)]
//! - CCM: [0, sizeof(RAM)]
//!
//! \return None
//!
//! \sa AESWriteAuthLength
//
//*****************************************************************************
__STATIC_INLINE void AESWriteDataLength(uint32_t length)
__STATIC_INLINE void AESSetDataLength(uint32_t length)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = length;
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0;
@@ -502,21 +564,21 @@ __STATIC_INLINE void AESWriteDataLength(uint32_t length)
//! Despite specifying it here, the crypto DMA must still be set up with
//! the correct AAD length.
//!
//! \param length Specifies how long the AAD is in a CCM operation. In CCM mode,
//! set this to 0 if no AAD is required. If set to 0,
//! AESWriteDataLength() must be set to >0.
//! Range depends on the mode:
//! - ECB: Do not call.
//! - CBC: [0]
//! - CBC-MAC: [0]
//! - CCM: [0, sizeof(RAM)]
//! \param [in] length Specifies how long the AAD is in a CCM operation. In CCM mode,
//! set this to 0 if no AAD is required. If set to 0,
//! AESWriteDataLength() must be set to >0.
//! Range depends on the mode:
//! - ECB: Do not call.
//! - CBC: [0]
//! - CBC-MAC: [0]
//! - CCM: [0, sizeof(RAM)]
//!
//! \return None
//!
//! \sa AESWriteDataLength
//
//*****************************************************************************
__STATIC_INLINE void AESWriteAuthLength(uint32_t length)
__STATIC_INLINE void AESSetAuthLength(uint32_t length)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESAUTHLEN) = length;
}
@@ -529,7 +591,7 @@ __STATIC_INLINE void AESWriteAuthLength(uint32_t length)
//! sources that are enabled can be reflected to the processor interrupt.
//! Disabled sources have no effect on the processor.
//!
//! \param intFlags is the bitwise OR of the interrupt sources to be enabled.
//! \param [in] intFlags is the bitwise OR of the interrupt sources to be enabled.
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//!
@@ -557,7 +619,7 @@ __STATIC_INLINE void AESIntEnable(uint32_t intFlags)
//! sources that are enabled can be reflected to the processor interrupt.
//! Disabled sources have no effect on the processor.
//!
//! \param intFlags is the bitwise OR of the interrupt sources to be enabled.
//! \param [in] intFlags is the bitwise OR of the interrupt sources to be enabled.
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//!
@@ -630,7 +692,7 @@ __STATIC_INLINE uint32_t AESIntStatusRaw(void)
//! clear the event source early in the interrupt service routine (ISR) to allow
//! the event clear to propagate to the NVIC before returning from the ISR.
//!
//! \param intFlags is a bit mask of the interrupt sources to be cleared.
//! \param [in] intFlags is a bit mask of the interrupt sources to be cleared.
//! - \ref AES_DMA_IN_DONE
//! - \ref AES_RESULT_RDY
//!
@@ -714,14 +776,22 @@ __STATIC_INLINE void AESIntUnregister(void)
#undef AESStartDMAOperation
#define AESStartDMAOperation ROM_AESStartDMAOperation
#endif
#ifdef ROM_AESLoadInitializationVector
#undef AESLoadInitializationVector
#define AESLoadInitializationVector ROM_AESLoadInitializationVector
#ifdef ROM_AESSetInitializationVector
#undef AESSetInitializationVector
#define AESSetInitializationVector ROM_AESSetInitializationVector
#endif
#ifdef ROM_AESWriteCCMInitializationVector
#undef AESWriteCCMInitializationVector
#define AESWriteCCMInitializationVector ROM_AESWriteCCMInitializationVector
#endif
#ifdef ROM_AESReadTag
#undef AESReadTag
#define AESReadTag ROM_AESReadTag
#endif
#ifdef ROM_AESVerifyTag
#undef AESVerifyTag
#define AESVerifyTag ROM_AESVerifyTag
#endif
#ifdef ROM_AESWriteToKeyStore
#undef AESWriteToKeyStore
#define AESWriteToKeyStore ROM_AESWriteToKeyStore
@@ -734,6 +804,10 @@ __STATIC_INLINE void AESIntUnregister(void)
#undef AESWaitForIRQFlags
#define AESWaitForIRQFlags ROM_AESWaitForIRQFlags
#endif
#ifdef ROM_AESConfigureCCMCtrl
#undef AESConfigureCCMCtrl
#define AESConfigureCCMCtrl ROM_AESConfigureCCMCtrl
#endif
#endif
//*****************************************************************************
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aes_doc.h
* Revised: 2016-12-10 13:57:16 +0100 (Sat, 10 Dec 2016)
* Revision: 47952
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_event.c
* Revised: 2017-04-26 16:53:03 +0200 (Wed, 26 Apr 2017)
* Revision: 48850
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON Event fabric.
*
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_event.h
* Revised: 2017-04-26 16:53:03 +0200 (Wed, 26 Apr 2017)
* Revision: 48850
* Revised: 2017-08-09 16:56:05 +0200 (Wed, 09 Aug 2017)
* Revision: 49506
*
* Description: Defines and prototypes for the AON Event fabric.
*
@@ -63,7 +63,6 @@ extern "C"
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_device.h"
#include "../inc/hw_aon_event.h"
#include "debug.h"
@@ -168,11 +167,10 @@ extern "C"
//
//! \brief Select event source for the specified MCU wake-up programmable event.
//!
//! The AON event fabric has several programmable events that can
//! wake up the MCU. The events are forwarded to the wake-up controller (WUC).
//! The AON event fabric has several programmable events that can wake up the MCU.
//!
//! \note The programmable event sources are effectively OR'ed together
//! to form a single wake-up event forwarded to the WUC.
//! to form a single wake-up event.
//!
//! \param ui32MCUWUEvent is one of the programmable MCU wake-up event sources.
//! - \ref AON_EVENT_MCU_WU0
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_event_doc.h
* Revised: 2016-07-07 19:12:02 +0200 (Thu, 07 Jul 2016)
* Revision: 46848
* Revised: 2017-08-09 16:56:05 +0200 (Wed, 09 Aug 2017)
* Revision: 49506
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
@@ -42,11 +42,10 @@
//! to the AON event fabric. For more information on MCU event fabric, see [MCU event API](@ref event_api).
//!
//! The AON event fabric is a configurable combinatorial router between AON event sources and event
//! subscribers in both AON and MCU domains. The AON event fabric has three main event subscribers: AON WUC,
//! AON RTC, and MCU event fabric. The API to control the AON event fabric configuration can be grouped based
//! on the event subscriber to configure:
//! subscribers in both AON and MCU domains. The API to control the AON event fabric configuration
//! can be grouped based on the event subscriber to configure:
//!
//! - AON WUC receives two programmable event lines from AON event fabric. One for MCU wake-up events and one for AUX wake-up events. For more information, see [AON WUC API](@ref aonwuc_api).
//! - Wake-up events.
//! - MCU wake-up event
//! - @ref AONEventMcuWakeUpSet()
//! - @ref AONEventMcuWakeUpGet()
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_pmctl.c
* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017)
* Revision: 48729
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON Power-Management Controller.
*
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_pmctl.h
* Revised: 2017-04-20 13:30:18 +0200 (Thu, 20 Apr 2017)
* Revision: 48814
* Revised: 2017-11-02 14:16:14 +0100 (Thu, 02 Nov 2017)
* Revision: 50156
*
* Description: Defines and prototypes for the AON Power-Management Controller
*
@@ -127,11 +127,11 @@ AONPMCTLMcuSRamRetConfig(uint32_t ui32Retention)
uint32_t ui32Reg;
// Check the arguments.
ASSERT(ui32Retention == MCU_RAM_RET_NONE ||
ui32Retention == MCU_RAM_RET_LVL1 ||
ui32Retention == MCU_RAM_RET_LVL2 ||
ui32Retention == MCU_RAM_RET_LVL3 ||
ui32Retention == MCU_RAM_RET_FULL);
ASSERT((ui32Retention == MCU_RAM_RET_NONE) ||
(ui32Retention == MCU_RAM_RET_LVL1) ||
(ui32Retention == MCU_RAM_RET_LVL2) ||
(ui32Retention == MCU_RAM_RET_LVL3) ||
(ui32Retention == MCU_RAM_RET_FULL));
// Configure the retention.
ui32Reg = HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_M;
@@ -157,27 +157,6 @@ AONPMCTLPowerStatusGet(void)
return (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT));
}
//*****************************************************************************
//
//! \brief Enable shut-down of the device.
//!
//! Use this function to enable shut-down of the device. This will force all I/O
//! values to be latched - possibly enabling I/O wakeup - then all internal power
//! supplies are turned off, effectively putting the device into shut-down mode.
//!
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONPMCTLShutDownEnable(void)
{
// Power down the JTAG domain
HWREGBITW(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT, AON_PMCTL_PWRSTAT_JTAG_PD_ON_BITN) = 0;
// Enable shutdown of the device
HWREGBITW(AON_PMCTL_BASE + AON_PMCTL_O_SHUTDOWN, AON_PMCTL_SHUTDOWN_EN_BITN) = 1;
}
//*****************************************************************************
//
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_pmctl_doc.h
* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017)
* Revision: 48729
* Revised: 2017-11-02 15:41:14 +0100 (Thu, 02 Nov 2017)
* Revision: 50165
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
@@ -83,13 +83,10 @@
//! Functions to perform device configuration:
//! - \ref AONPMCTLJtagPowerOff()
//! - \ref AONPMCTLMcuSRamRetConfig()
//! - \ref AONPMCTLShutDownEnable()
//!
//! Please note that due to legacy software compatibility some functionalities controlled
//! by the AON Power Management Controller module are supported through the APIs of
//! the [System Controller](@ref sysctrl_api) and [Power Controller](@ref pwrctrl_api). Relevant functions are:
//! - \ref PowerCtrlIOFreezeDisable()
//! - \ref PowerCtrlIOFreezeEnable()
//! - \ref PowerCtrlSourceGet()
//! - \ref PowerCtrlSourceSet()
//! - \ref PowerCtrlResetSourceGet()
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_rtc.c
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON RTC.
*
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aon_rtc.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
* Revised: 2017-08-16 15:13:43 +0200 (Wed, 16 Aug 2017)
* Revision: 49593
*
* Description: Defines and prototypes for the AON RTC
*
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aux_adc.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
* Revised: 2017-11-20 14:31:35 +0100 (Mon, 20 Nov 2017)
* Revision: 50315
*
* Description: Driver for the AUX Time to Digital Converter interface.
*
@@ -95,6 +95,10 @@ AUXADCDisable(void)
// Ensure that scaling is enabled by default before next use of the ADC
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);
// Flush the FIFO before disabling the clocks
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3)
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1)
// Disable the ADC clock (no need to wait since IOB_WUC_ADCCLKCTL_ACK goes low immediately)
HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_ADCCLKCTL) = 0;
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aux_adc.h
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
* Revised: 2018-02-07 09:45:39 +0100 (Wed, 07 Feb 2018)
* Revision: 51437
*
* Description: Defines and prototypes for the AUX Analog-to-Digital
* Converter
@@ -132,6 +132,15 @@ extern "C"
#define AUXADC_TRIGGER_GPT2B (EVENT_AUXSEL0_EV_GPT2B)
#define AUXADC_TRIGGER_GPT3A (EVENT_AUXSEL0_EV_GPT3A)
#define AUXADC_TRIGGER_GPT3B (EVENT_AUXSEL0_EV_GPT3B)
// Additional triggers specific for cc26x2 and cc13x2 devices
#define AUXADC_TRIGGER_GPT0A_CMP (EVENT_AUXSEL0_EV_GPT0A_CMP)
#define AUXADC_TRIGGER_GPT0B_CMP (EVENT_AUXSEL0_EV_GPT0B_CMP)
#define AUXADC_TRIGGER_GPT1A_CMP (EVENT_AUXSEL0_EV_GPT1A_CMP)
#define AUXADC_TRIGGER_GPT1B_CMP (EVENT_AUXSEL0_EV_GPT1B_CMP)
#define AUXADC_TRIGGER_GPT2A_CMP (EVENT_AUXSEL0_EV_GPT2A_CMP)
#define AUXADC_TRIGGER_GPT2B_CMP (EVENT_AUXSEL0_EV_GPT2B_CMP)
#define AUXADC_TRIGGER_GPT3A_CMP (EVENT_AUXSEL0_EV_GPT3A_CMP)
#define AUXADC_TRIGGER_GPT3B_CMP (EVENT_AUXSEL0_EV_GPT3B_CMP)
//*****************************************************************************
//
@@ -0,0 +1,96 @@
/******************************************************************************
* Filename: aux_sysif.c
* Revised: 2018-04-17 14:54:06 +0200 (Tue, 17 Apr 2018)
* Revision: 51890
*
* Description: Driver for the AUX System Interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_sysif.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXSYSIFOpModeChange
#define AUXSYSIFOpModeChange NOROM_AUXSYSIFOpModeChange
#endif
//*****************************************************************************
//
// Used in AUXSYSIFOpModeChange() to control the change of the operational mode.
//
//*****************************************************************************
static const uint8_t g_OpMode_to_order[4] = {1,2,0,3};
static const uint8_t g_Order_to_OpMode[4] = {2,0,1,3};
//*****************************************************************************
//
// Controls AUX operational mode change
//
//*****************************************************************************
void
AUXSYSIFOpModeChange(uint32_t targetOpMode)
{
uint32_t currentOpMode;
uint32_t currentOrder;
uint32_t nextMode;
// Check the argument
ASSERT((targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_PDLP)||
(targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_PDA) ||
(targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_LP) ||
(targetOpMode == AUX_SYSIF_OPMODEREQ_REQ_A));
do {
currentOpMode = HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ);
while ( currentOpMode != HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEACK));
if (currentOpMode != targetOpMode)
{
currentOrder = g_OpMode_to_order[currentOpMode];
if ( currentOrder < g_OpMode_to_order[targetOpMode])
{
nextMode = g_Order_to_OpMode[currentOrder + 1];
}
else
{
nextMode = g_Order_to_OpMode[currentOrder - 1];
}
HWREG(AUX_SYSIF_BASE + AUX_SYSIF_O_OPMODEREQ) = nextMode;
}
} while ( currentOpMode != targetOpMode );
}
@@ -0,0 +1,154 @@
/******************************************************************************
* Filename: aux_sysif.h
* Revised: 2017-06-27 08:41:49 +0200 (Tue, 27 Jun 2017)
* Revision: 49245
*
* Description: Defines and prototypes for the AUX System Interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxsysif_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_SYSIF_H__
#define __AUX_SYSIF_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_sysif.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXSYSIFOpModeChange NOROM_AUXSYSIFOpModeChange
#endif
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
// Defines for AUX operational modes.
//
//*****************************************************************************
#define AUX_SYSIF_OPMODE_TARGET_PDLP (AUX_SYSIF_OPMODEREQ_REQ_PDLP)
#define AUX_SYSIF_OPMODE_TARGET_PDA (AUX_SYSIF_OPMODEREQ_REQ_PDA)
#define AUX_SYSIF_OPMODE_TARGET_LP (AUX_SYSIF_OPMODEREQ_REQ_LP)
#define AUX_SYSIF_OPMODE_TARGET_A (AUX_SYSIF_OPMODEREQ_REQ_A)
//*****************************************************************************
//
//! \brief Changes the AUX operational mode to the requested target mode.
//!
//! This function controls the change of the AUX operational mode.
//! The function controls the change of the current operational mode to the
//! operational mode target by adhering to rules specified by HW.
//!
//! \param targetOpMode
//! AUX operational mode:
//! - \ref AUX_SYSIF_OPMODE_TARGET_PDLP (Powerdown operational mode with wakeup to lowpower mode)
//! - \ref AUX_SYSIF_OPMODE_TARGET_PDA (Powerdown operational mode with wakeup to active mode)
//! - \ref AUX_SYSIF_OPMODE_TARGET_LP (Lowpower operational mode)
//! - \ref AUX_SYSIF_OPMODE_TARGET_A (Active operational mode)
//!
//! \return None
//
//*****************************************************************************
extern void AUXSYSIFOpModeChange(uint32_t targetOpMode);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXSYSIFOpModeChange
#undef AUXSYSIFOpModeChange
#define AUXSYSIFOpModeChange ROM_AUXSYSIFOpModeChange
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_SYSIF_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: aux_tdc.h
* Revised: 2017-03-28 11:12:40 +0200 (Tue, 28 Mar 2017)
* Revision: 48729
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AUX Time-to-Digital Converter
*
@@ -128,19 +128,6 @@ extern "C"
#define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event
#define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW) // Falling edge polarity for stop event
#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_ISRC_RESET)
#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER0_EV)
#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER1_EV)
#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_SMPH_AUTOTAKE_DONE)
#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_ADC_DONE)
#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX0)
#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX1)
#define AUXTDC_STOP_AON_SW (AUX_TDC_TRIGSRC_STOP_SRC_AON_SW)
#define AUXTDC_STOP_AON_PROG_WU (AUX_TDC_TRIGSRC_STOP_SRC_AON_PROG_WU)
#define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)
#define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)
#define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)
@@ -157,26 +144,58 @@ extern "C"
#define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)
#define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)
#define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)
#define AUXTDC_STOP_AUXIO16 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO16)
#define AUXTDC_STOP_AUXIO17 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO17)
#define AUXTDC_STOP_AUXIO18 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO18)
#define AUXTDC_STOP_AUXIO19 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO19)
#define AUXTDC_STOP_AUXIO20 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO20)
#define AUXTDC_STOP_AUXIO21 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO21)
#define AUXTDC_STOP_AUXIO22 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO22)
#define AUXTDC_STOP_AUXIO23 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO23)
#define AUXTDC_STOP_AUXIO24 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO24)
#define AUXTDC_STOP_AUXIO25 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO25)
#define AUXTDC_STOP_AUXIO26 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO26)
#define AUXTDC_STOP_AUXIO27 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO27)
#define AUXTDC_STOP_AUXIO28 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO28)
#define AUXTDC_STOP_AUXIO29 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO29)
#define AUXTDC_STOP_AUXIO30 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO30)
#define AUXTDC_STOP_AUXIO31 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO31)
#define AUXTDC_STOP_MANUAL_EV (AUX_TDC_TRIGSRC_STOP_SRC_MANUAL_EV)
#define AUXTDC_STOP_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2_DLY)
#define AUXTDC_STOP_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_4KHZ)
#define AUXTDC_STOP_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_BAT_UPD)
#define AUXTDC_STOP_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_TEMP_UPD)
#define AUXTDC_STOP_SCLK_LF (AUX_TDC_TRIGSRC_STOP_SRC_SCLK_LF)
#define AUXTDC_STOP_PWR_DWN (AUX_TDC_TRIGSRC_STOP_SRC_PWR_DWN)
#define AUXTDC_STOP_MCU_ACTIVE (AUX_TDC_TRIGSRC_STOP_SRC_MCU_ACTIVE)
#define AUXTDC_STOP_VDDR_RECHARGE (AUX_TDC_TRIGSRC_STOP_SRC_VDDR_RECHARGE)
#define AUXTDC_STOP_TIMER2_EV0 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV0)
#define AUXTDC_STOP_TIMER2_EV1 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV1)
#define AUXTDC_STOP_TIMER2_EV2 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV2)
#define AUXTDC_STOP_TIMER2_EV3 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV3)
#define AUXTDC_STOP_TIMER2_PULSE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_PULSE)
#define AUXTDC_STOP_TDC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_DONE)
#define AUXTDC_STOP_ADC_IRQ (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_IRQ)
#define AUXTDC_STOP_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_NOT_EMPTY)
#define AUXTDC_STOP_NO_EVENT (AUX_TDC_TRIGSRC_STOP_SRC_NO_EVENT)
#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_DONE)
#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ISRC_RESET_N)
#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX0)
#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX1)
#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_SMPH_AUTOTAKE_DONE)
#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_PRE)
#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER0_EV)
#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER1_EV)
#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
#define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)
#define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)
#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_TDC_PRE)
#define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event
#define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW) // Falling edge polarity for start event
#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_ISRC_RESET)
#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER0_EV)
#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER1_EV)
#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_SMPH_AUTOTAKE_DONE)
#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_ADC_DONE)
#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX0)
#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX1)
#define AUXTDC_START_AON_SW (AUX_TDC_TRIGSRC_START_SRC_AON_SW)
#define AUXTDC_START_AON_PROG_WU (AUX_TDC_TRIGSRC_START_SRC_AON_PROG_WU)
#define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)
#define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)
#define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)
@@ -193,9 +212,54 @@ extern "C"
#define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)
#define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)
#define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)
#define AUXTDC_START_AUXIO16 (AUX_TDC_TRIGSRC_START_SRC_AUXIO16)
#define AUXTDC_START_AUXIO17 (AUX_TDC_TRIGSRC_START_SRC_AUXIO17)
#define AUXTDC_START_AUXIO18 (AUX_TDC_TRIGSRC_START_SRC_AUXIO18)
#define AUXTDC_START_AUXIO19 (AUX_TDC_TRIGSRC_START_SRC_AUXIO19)
#define AUXTDC_START_AUXIO20 (AUX_TDC_TRIGSRC_START_SRC_AUXIO20)
#define AUXTDC_START_AUXIO21 (AUX_TDC_TRIGSRC_START_SRC_AUXIO21)
#define AUXTDC_START_AUXIO22 (AUX_TDC_TRIGSRC_START_SRC_AUXIO22)
#define AUXTDC_START_AUXIO23 (AUX_TDC_TRIGSRC_START_SRC_AUXIO23)
#define AUXTDC_START_AUXIO24 (AUX_TDC_TRIGSRC_START_SRC_AUXIO24)
#define AUXTDC_START_AUXIO25 (AUX_TDC_TRIGSRC_START_SRC_AUXIO25)
#define AUXTDC_START_AUXIO26 (AUX_TDC_TRIGSRC_START_SRC_AUXIO26)
#define AUXTDC_START_AUXIO27 (AUX_TDC_TRIGSRC_START_SRC_AUXIO27)
#define AUXTDC_START_AUXIO28 (AUX_TDC_TRIGSRC_START_SRC_AUXIO28)
#define AUXTDC_START_AUXIO29 (AUX_TDC_TRIGSRC_START_SRC_AUXIO29)
#define AUXTDC_START_AUXIO30 (AUX_TDC_TRIGSRC_START_SRC_AUXIO30)
#define AUXTDC_START_AUXIO31 (AUX_TDC_TRIGSRC_START_SRC_AUXIO31)
#define AUXTDC_START_MANUAL_EV (AUX_TDC_TRIGSRC_START_SRC_MANUAL_EV)
#define AUXTDC_START_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2_DLY)
#define AUXTDC_START_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_4KHZ)
#define AUXTDC_START_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_BAT_UPD)
#define AUXTDC_START_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_TEMP_UPD)
#define AUXTDC_START_SCLK_LF (AUX_TDC_TRIGSRC_START_SRC_SCLK_LF)
#define AUXTDC_START_PWR_DWN (AUX_TDC_TRIGSRC_START_SRC_PWR_DWN)
#define AUXTDC_START_MCU_ACTIVE (AUX_TDC_TRIGSRC_START_SRC_MCU_ACTIVE)
#define AUXTDC_START_VDDR_RECHARGE (AUX_TDC_TRIGSRC_START_SRC_VDDR_RECHARGE)
#define AUXTDC_START_TIMER2_EV0 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV0)
#define AUXTDC_START_TIMER2_EV1 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV1)
#define AUXTDC_START_TIMER2_EV2 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV2)
#define AUXTDC_START_TIMER2_EV3 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV3)
#define AUXTDC_START_TIMER2_PULSE (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_PULSE)
#define AUXTDC_START_TDC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_DONE)
#define AUXTDC_START_ADC_IRQ (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_IRQ)
#define AUXTDC_START_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_NOT_EMPTY)
#define AUXTDC_START_NO_EVENT (AUX_TDC_TRIGSRC_START_SRC_NO_EVENT)
#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_DONE)
#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_AUX_ISRC_RESET_N)
#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX0)
#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX1)
#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_SMPH_AUTOTAKE_DONE)
#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_PRE)
#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER0_EV)
#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER1_EV)
#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
#define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)
#define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)
#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_TDC_PRE)
//*****************************************************************************
//
@@ -286,19 +350,6 @@ AUXTDCStatusGet(uint32_t ui32Base)
//!
//! The \c ui32StartCondition must be a bitwise OR of the start event and the
//! polarity of the start event. The start events are:
//! - \ref AUXTDC_START_AON_RTC_CH2
//! - \ref AUXTDC_START_AUX_COMPA
//! - \ref AUXTDC_START_AUX_COMPB
//! - \ref AUXTDC_START_ISRC_RESET
//! - \ref AUXTDC_START_TIMER0_EV
//! - \ref AUXTDC_START_TIMER1_EV
//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_START_ADC_DONE
//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_START_OBSMUX0
//! - \ref AUXTDC_START_OBSMUX1
//! - \ref AUXTDC_START_AON_SW
//! - \ref AUXTDC_START_AON_PROG_WU
//! - \ref AUXTDC_START_AUXIO0
//! - \ref AUXTDC_START_AUXIO1
//! - \ref AUXTDC_START_AUXIO2
@@ -315,28 +366,60 @@ AUXTDCStatusGet(uint32_t ui32Base)
//! - \ref AUXTDC_START_AUXIO13
//! - \ref AUXTDC_START_AUXIO14
//! - \ref AUXTDC_START_AUXIO15
//! - \ref AUXTDC_START_AUXIO16
//! - \ref AUXTDC_START_AUXIO17
//! - \ref AUXTDC_START_AUXIO18
//! - \ref AUXTDC_START_AUXIO19
//! - \ref AUXTDC_START_AUXIO20
//! - \ref AUXTDC_START_AUXIO21
//! - \ref AUXTDC_START_AUXIO22
//! - \ref AUXTDC_START_AUXIO23
//! - \ref AUXTDC_START_AUXIO24
//! - \ref AUXTDC_START_AUXIO25
//! - \ref AUXTDC_START_AUXIO26
//! - \ref AUXTDC_START_AUXIO27
//! - \ref AUXTDC_START_AUXIO28
//! - \ref AUXTDC_START_AUXIO29
//! - \ref AUXTDC_START_AUXIO30
//! - \ref AUXTDC_START_AUXIO31
//! - \ref AUXTDC_START_MANUAL_EV
//! - \ref AUXTDC_START_AON_RTC_CH2_DLY
//! - \ref AUXTDC_START_AON_RTC_4KHZ
//! - \ref AUXTDC_START_AON_BATMON_BAT_UPD
//! - \ref AUXTDC_START_AON_BATMON_TEMP_UPD
//! - \ref AUXTDC_START_SCLK_LF
//! - \ref AUXTDC_START_PWR_DWN
//! - \ref AUXTDC_START_MCU_ACTIVE
//! - \ref AUXTDC_START_VDDR_RECHARGE
//! - \ref AUXTDC_START_TIMER2_EV0
//! - \ref AUXTDC_START_TIMER2_EV1
//! - \ref AUXTDC_START_TIMER2_EV2
//! - \ref AUXTDC_START_TIMER2_EV3
//! - \ref AUXTDC_START_TIMER2_PULSE
//! - \ref AUXTDC_START_TDC_DONE
//! - \ref AUXTDC_START_ADC_IRQ
//! - \ref AUXTDC_START_ADC_FIFO_NOT_EMPTY
//! - \ref AUXTDC_START_NO_EVENT
//! - \ref AUXTDC_START_ADC_DONE
//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_START_ISRC_RESET
//! - \ref AUXTDC_START_OBSMUX0
//! - \ref AUXTDC_START_OBSMUX1
//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_START_TDC_PRE
//! - \ref AUXTDC_START_TIMER0_EV
//! - \ref AUXTDC_START_TIMER1_EV
//! - \ref AUXTDC_START_AON_RTC_CH2
//! - \ref AUXTDC_START_AUX_COMPA
//! - \ref AUXTDC_START_AUX_COMPB
//! - \ref AUXTDC_START_ACLK_REF
//! - \ref AUXTDC_START_MCU_EV
//! - \ref AUXTDC_START_TDC_PRE
//!
//! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS
//! or falling \ref AUXTDC_STARTPOL_FALL.
//!
//! The \c ui32StopCondition must be a bitwise OR of the stop event and the
//! polarity of the stop event. The stop events are:
//! - \ref AUXTDC_STOP_AON_RTC_CH2
//! - \ref AUXTDC_STOP_AUX_COMPA
//! - \ref AUXTDC_STOP_AUX_COMPB
//! - \ref AUXTDC_STOP_ISRC_RESET
//! - \ref AUXTDC_STOP_TIMER0_EV
//! - \ref AUXTDC_STOP_TIMER1_EV
//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_STOP_ADC_DONE
//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_STOP_OBSMUX0
//! - \ref AUXTDC_STOP_OBSMUX1
//! - \ref AUXTDC_STOP_AON_SW
//! - \ref AUXTDC_STOP_AON_PROG_WU
//! - \ref AUXTDC_STOP_AUXIO0
//! - \ref AUXTDC_STOP_AUXIO1
//! - \ref AUXTDC_STOP_AUXIO2
@@ -353,9 +436,54 @@ AUXTDCStatusGet(uint32_t ui32Base)
//! - \ref AUXTDC_STOP_AUXIO13
//! - \ref AUXTDC_STOP_AUXIO14
//! - \ref AUXTDC_STOP_AUXIO15
//! - \ref AUXTDC_STOP_AUXIO16
//! - \ref AUXTDC_STOP_AUXIO17
//! - \ref AUXTDC_STOP_AUXIO18
//! - \ref AUXTDC_STOP_AUXIO19
//! - \ref AUXTDC_STOP_AUXIO20
//! - \ref AUXTDC_STOP_AUXIO21
//! - \ref AUXTDC_STOP_AUXIO22
//! - \ref AUXTDC_STOP_AUXIO23
//! - \ref AUXTDC_STOP_AUXIO24
//! - \ref AUXTDC_STOP_AUXIO25
//! - \ref AUXTDC_STOP_AUXIO26
//! - \ref AUXTDC_STOP_AUXIO27
//! - \ref AUXTDC_STOP_AUXIO28
//! - \ref AUXTDC_STOP_AUXIO29
//! - \ref AUXTDC_STOP_AUXIO30
//! - \ref AUXTDC_STOP_AUXIO31
//! - \ref AUXTDC_STOP_MANUAL_EV
//! - \ref AUXTDC_STOP_AON_RTC_CH2_DLY
//! - \ref AUXTDC_STOP_AON_RTC_4KHZ
//! - \ref AUXTDC_STOP_AON_BATMON_BAT_UPD
//! - \ref AUXTDC_STOP_AON_BATMON_TEMP_UPD
//! - \ref AUXTDC_STOP_SCLK_LF
//! - \ref AUXTDC_STOP_PWR_DWN
//! - \ref AUXTDC_STOP_MCU_ACTIVE
//! - \ref AUXTDC_STOP_VDDR_RECHARGE
//! - \ref AUXTDC_STOP_TIMER2_EV0
//! - \ref AUXTDC_STOP_TIMER2_EV1
//! - \ref AUXTDC_STOP_TIMER2_EV2
//! - \ref AUXTDC_STOP_TIMER2_EV3
//! - \ref AUXTDC_STOP_TIMER2_PULSE
//! - \ref AUXTDC_STOP_TDC_DONE
//! - \ref AUXTDC_STOP_ADC_IRQ
//! - \ref AUXTDC_STOP_ADC_FIFO_NOT_EMPTY
//! - \ref AUXTDC_STOP_NO_EVENT
//! - \ref AUXTDC_STOP_ADC_DONE
//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_STOP_ISRC_RESET
//! - \ref AUXTDC_STOP_OBSMUX0
//! - \ref AUXTDC_STOP_OBSMUX1
//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_STOP_TDC_PRE
//! - \ref AUXTDC_STOP_TIMER0_EV
//! - \ref AUXTDC_STOP_TIMER1_EV
//! - \ref AUXTDC_STOP_AON_RTC_CH2
//! - \ref AUXTDC_STOP_AUX_COMPA
//! - \ref AUXTDC_STOP_AUX_COMPB
//! - \ref AUXTDC_STOP_ACLK_REF
//! - \ref AUXTDC_STOP_MCU_EV
//! - \ref AUXTDC_STOP_TDC_PRE
//!
//! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS
//! or falling \ref AUXTDC_STOPPOL_FALL.
@@ -31,6 +31,8 @@ all :
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_adc.c"
@ echo CCS: Compile aux_smph.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_smph.c"
@ echo CCS: Compile aux_sysif.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_sysif.c"
@ echo CCS: Compile aux_tdc.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_tdc.c"
@ echo CCS: Compile ccfgread.c
@@ -102,7 +104,7 @@ all :
@ echo CCS: Compile watchdog.c
@ $(COMPILER_TOOL) --silicon_version=7M4 --float_support=FPv4SPD16 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/watchdog.c"
@ echo CCS: Archive driverlib.lib
@ $(ARCHIVER_TOOL) r "driverlib.lib" "$(MAKEFILE_DIR)adi.obj" "$(MAKEFILE_DIR)aes.obj" "$(MAKEFILE_DIR)aon_batmon.obj" "$(MAKEFILE_DIR)aon_event.obj" "$(MAKEFILE_DIR)aon_ioc.obj" "$(MAKEFILE_DIR)aon_pmctl.obj" "$(MAKEFILE_DIR)aon_rtc.obj" "$(MAKEFILE_DIR)aux_adc.obj" "$(MAKEFILE_DIR)aux_smph.obj" "$(MAKEFILE_DIR)aux_tdc.obj" "$(MAKEFILE_DIR)ccfgread.obj" "$(MAKEFILE_DIR)chipinfo.obj" "$(MAKEFILE_DIR)cpu.obj" "$(MAKEFILE_DIR)crypto.obj" "$(MAKEFILE_DIR)ddi.obj" "$(MAKEFILE_DIR)debug.obj" "$(MAKEFILE_DIR)driverlib_release.obj" "$(MAKEFILE_DIR)event.obj" "$(MAKEFILE_DIR)flash.obj" "$(MAKEFILE_DIR)gpio.obj" "$(MAKEFILE_DIR)i2c.obj" "$(MAKEFILE_DIR)i2s.obj" "$(MAKEFILE_DIR)interrupt.obj" "$(MAKEFILE_DIR)ioc.obj" "$(MAKEFILE_DIR)osc.obj" "$(MAKEFILE_DIR)pka.obj" "$(MAKEFILE_DIR)prcm.obj" "$(MAKEFILE_DIR)pwr_ctrl.obj" "$(MAKEFILE_DIR)rfc.obj" "$(MAKEFILE_DIR)setup.obj" "$(MAKEFILE_DIR)setup_rom.obj" "$(MAKEFILE_DIR)sha2.obj" "$(MAKEFILE_DIR)smph.obj" "$(MAKEFILE_DIR)ssi.obj" "$(MAKEFILE_DIR)sw_chacha.obj" "$(MAKEFILE_DIR)sw_poly1305-donna.obj" "$(MAKEFILE_DIR)systick.obj" "$(MAKEFILE_DIR)sys_ctrl.obj" "$(MAKEFILE_DIR)timer.obj" "$(MAKEFILE_DIR)trng.obj" "$(MAKEFILE_DIR)uart.obj" "$(MAKEFILE_DIR)udma.obj" "$(MAKEFILE_DIR)vims.obj" "$(MAKEFILE_DIR)watchdog.obj"
@ $(ARCHIVER_TOOL) r "driverlib.lib" "$(MAKEFILE_DIR)adi.obj" "$(MAKEFILE_DIR)aes.obj" "$(MAKEFILE_DIR)aon_batmon.obj" "$(MAKEFILE_DIR)aon_event.obj" "$(MAKEFILE_DIR)aon_ioc.obj" "$(MAKEFILE_DIR)aon_pmctl.obj" "$(MAKEFILE_DIR)aon_rtc.obj" "$(MAKEFILE_DIR)aux_adc.obj" "$(MAKEFILE_DIR)aux_smph.obj" "$(MAKEFILE_DIR)aux_sysif.obj" "$(MAKEFILE_DIR)aux_tdc.obj" "$(MAKEFILE_DIR)ccfgread.obj" "$(MAKEFILE_DIR)chipinfo.obj" "$(MAKEFILE_DIR)cpu.obj" "$(MAKEFILE_DIR)crypto.obj" "$(MAKEFILE_DIR)ddi.obj" "$(MAKEFILE_DIR)debug.obj" "$(MAKEFILE_DIR)driverlib_release.obj" "$(MAKEFILE_DIR)event.obj" "$(MAKEFILE_DIR)flash.obj" "$(MAKEFILE_DIR)gpio.obj" "$(MAKEFILE_DIR)i2c.obj" "$(MAKEFILE_DIR)i2s.obj" "$(MAKEFILE_DIR)interrupt.obj" "$(MAKEFILE_DIR)ioc.obj" "$(MAKEFILE_DIR)osc.obj" "$(MAKEFILE_DIR)pka.obj" "$(MAKEFILE_DIR)prcm.obj" "$(MAKEFILE_DIR)pwr_ctrl.obj" "$(MAKEFILE_DIR)rfc.obj" "$(MAKEFILE_DIR)setup.obj" "$(MAKEFILE_DIR)setup_rom.obj" "$(MAKEFILE_DIR)sha2.obj" "$(MAKEFILE_DIR)smph.obj" "$(MAKEFILE_DIR)ssi.obj" "$(MAKEFILE_DIR)sw_chacha.obj" "$(MAKEFILE_DIR)sw_poly1305-donna.obj" "$(MAKEFILE_DIR)systick.obj" "$(MAKEFILE_DIR)sys_ctrl.obj" "$(MAKEFILE_DIR)timer.obj" "$(MAKEFILE_DIR)trng.obj" "$(MAKEFILE_DIR)uart.obj" "$(MAKEFILE_DIR)udma.obj" "$(MAKEFILE_DIR)vims.obj" "$(MAKEFILE_DIR)watchdog.obj"
@ rm -f $(MAKEFILE_DIR)*.obj
# Deletes previous output and temporary files
@@ -31,6 +31,8 @@ all :
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c
@ echo GCC: Compile aux_smph.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c
@ echo GCC: Compile aux_sysif.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_sysif.o" $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c
@ echo GCC: Compile aux_tdc.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c
@ echo GCC: Compile ccfgread.c
@@ -102,7 +104,7 @@ all :
@ echo GCC: Compile watchdog.c
@ $(COMPILER_TOOL) -mthumb -march=armv7e-m -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -Os -Wall -fno-strict-aliasing -gstrict-dwarf -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c
@ echo GCC: Archive driverlib.lib
@ $(ARCHIVER_TOOL) rcs $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ $(ARCHIVER_TOOL) rcs $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
@@ -45,6 +45,9 @@ all :
@ echo IAR: Compile aux_smph.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_smph.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_smph.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_smph.o
@ echo IAR: Compile aux_sysif.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_sysif.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_sysif.o
@ echo IAR: Compile aux_tdc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_tdc.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_tdc.o
@@ -151,7 +154,7 @@ all :
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/watchdog.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)watchdog.o --no_clustering --debug --endian=little --cpu=Cortex-M4 -e --fpu=FPv4_sp -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)watchdog.o $(MAKEFILE_DIR)watchdog.o
@ echo IAR: Archive driverlib.lib
@ $(ARCHIVER_TOOL) $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o --create -o $(MAKEFILE_DIR)driverlib.lib
@ $(ARCHIVER_TOOL) $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o --create -o $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
@@ -31,6 +31,8 @@ all :
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c
@ echo KEIL: Compile aux_smph.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c
@ echo KEIL: Compile aux_sysif.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_sysif.o" $(MAKEFILE_DIR)../../../driverlib/aux_sysif.c
@ echo KEIL: Compile aux_tdc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c
@ echo KEIL: Compile ccfgread.c
@@ -102,7 +104,7 @@ all :
@ echo KEIL: Compile watchdog.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M4.fp.sp --fpu=FPv4-SP -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c
@ echo KEIL: Archive driverlib.lib
@ $(ARCHIVER_TOOL) --create $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ $(ARCHIVER_TOOL) --create $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aes.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_pmctl.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_sysif.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)pka.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)sha2.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: chipinfo.c
* Revised: 2017-01-06 12:37:45 +0100 (Fri, 06 Jan 2017)
* Revision: 48166
* Revised: 2018-01-29 18:45:34 +0100 (Mon, 29 Jan 2018)
* Revision: 51355
*
* Description: Collection of functions returning chip information.
*
@@ -55,8 +55,8 @@
#define ChipInfo_GetChipFamily NOROM_ChipInfo_GetChipFamily
#undef ChipInfo_GetHwRevision
#define ChipInfo_GetHwRevision NOROM_ChipInfo_GetHwRevision
#undef ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated
#define ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated
#undef ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated
#define ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated
#endif
//*****************************************************************************
@@ -108,7 +108,7 @@ ChipInfo_GetChipFamily( void )
FCFG1_ICEPICK_DEVICE_ID_WAFER_ID_S ) ;
if ( waferId == 0xBB41 ) {
chipFam = FAMILY_CC13x2_13x4_26x2_26x4 ;
chipFam = FAMILY_CC13x2_CC26x2 ;
}
return ( chipFam );
@@ -123,10 +123,40 @@ ChipType_t
ChipInfo_GetChipType( void )
{
ChipType_t chipType = CHIP_TYPE_Unknown ;
ChipFamily_t chipFam = ChipInfo_GetChipFamily() ;
uint32_t fcfg1UserId = ChipInfo_GetUserId() ;
uint32_t fcfg1Protocol = (( fcfg1UserId & FCFG1_USER_ID_PROTOCOL_M ) >>
FCFG1_USER_ID_PROTOCOL_S ) ;
uint32_t fcfg1Cc13 = (( fcfg1UserId & FCFG1_USER_ID_CC13_M ) >>
FCFG1_USER_ID_CC13_S ) ;
uint32_t fcfg1Pa = (( fcfg1UserId & FCFG1_USER_ID_PA_M ) >>
FCFG1_USER_ID_PA_S ) ;
// TBD
// TBD Definition of ChipType for CC13x2, CC13x4, CC26x2 and CC26x4 in function ChipInfo_GetChipType() must be defined before RTM
// TBD
if ( chipFam == FAMILY_CC13x2_CC26x2 ) {
switch ( fcfg1Protocol ) {
case 0xF :
if( fcfg1Cc13 ) {
if ( fcfg1Pa ) {
chipType = CHIP_TYPE_CC1352P ;
} else {
chipType = CHIP_TYPE_CC1352 ;
}
} else {
chipType = CHIP_TYPE_CC2652 ;
}
break;
case 0x9 :
if( fcfg1Pa ) {
chipType = CHIP_TYPE_unused ;
} else {
chipType = CHIP_TYPE_CC2642 ;
}
break;
case 0x8 :
chipType = CHIP_TYPE_CC1312 ;
break;
}
}
return ( chipType );
}
@@ -144,11 +174,14 @@ ChipInfo_GetHwRevision( void )
uint32_t minorHwRev = ChipInfo_GetMinorHwRev() ;
ChipFamily_t chipFam = ChipInfo_GetChipFamily() ;
if ( chipFam == FAMILY_CC13x2_13x4_26x2_26x4 ) {
if ( chipFam == FAMILY_CC13x2_CC26x2 ) {
switch ( fcfg1Rev ) {
case 0 : // CC13x2, CC13x4, CC26x2, CC26x4 - PG1.0 (or later)
case 1 : // CC13x2, CC13x4, CC26x2, CC26x4 - PG1.01 (will show up as PG1.0 as long as minorHwRev=0)
hwRev = (HwRevision_t)(((uint32_t)HWREV_1_0 ) + minorHwRev );
case 0 : // CC13x2, CC26x2 - PG1.0
case 1 : // CC13x2, CC26x2 - PG1.01 (will also show up as PG1.0)
hwRev = (HwRevision_t)((uint32_t)HWREV_1_0 );
break;
case 2 : // CC13x2, CC26x2 - PG1.1 (or later)
hwRev = (HwRevision_t)(((uint32_t)HWREV_1_1 ) + minorHwRev );
break;
}
}
@@ -157,16 +190,16 @@ ChipInfo_GetHwRevision( void )
}
//*****************************************************************************
// ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated()
// ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated()
//*****************************************************************************
void
ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated( void )
ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated( void )
{
if ( ! ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4() )
if ( ! ChipInfo_ChipFamilyIs_CC13x2_CC26x2() )
{
while(1)
{
// This driverlib version is for the CCxxx2/xxx4 chips.
// This driverlib version is for the CC13x2/CC26x2 chips.
// Do nothing - stay here forever
}
}
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: chipinfo.h
* Revised: 2017-01-19 13:55:31 +0100 (Thu, 19 Jan 2017)
* Revision: 48292
* Revised: 2018-05-01 11:59:00 +0200 (Tue, 01 May 2018)
* Revision: 51944
*
* Description: Collection of functions returning chip information.
*
@@ -84,7 +84,7 @@ extern "C"
#define ChipInfo_GetChipType NOROM_ChipInfo_GetChipType
#define ChipInfo_GetChipFamily NOROM_ChipInfo_GetChipFamily
#define ChipInfo_GetHwRevision NOROM_ChipInfo_GetHwRevision
#define ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated
#define ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated NOROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated
#endif
//*****************************************************************************
@@ -143,10 +143,10 @@ ChipInfo_SupportsIEEE_802_15_4( void )
//*****************************************************************************
//
//! \brief Returns true if the chip supports propriatary protocols.
//! \brief Returns true if the chip supports proprietary protocols.
//!
//! \return
//! Returns \c true if supporting propriatary protocols, \c false otherwise.
//! Returns \c true if supporting proprietary protocols, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
@@ -313,7 +313,7 @@ ChipInfo_GetMinorHwRev( void )
//! How to decode the USER_ID filed is described in the Technical Reference Manual (TRM)
//!
//! \return
//! Returns the the 32 bits USER_ID field
//! Returns the 32 bits USER_ID field
//
//*****************************************************************************
__STATIC_INLINE uint32_t
@@ -337,7 +337,13 @@ typedef enum {
CHIP_TYPE_CC2650 = 5, //!< 5 means that this is a CC2650 chip.
CHIP_TYPE_CUSTOM_0 = 6, //!< 6 means that this is a CUSTOM_0 chip.
CHIP_TYPE_CUSTOM_1 = 7, //!< 7 means that this is a CUSTOM_1 chip.
CHIP_TYPE_CC2640R2 = 8 //!< 4 means that this is a CC2640R2 chip.
CHIP_TYPE_CC2640R2 = 8, //!< 8 means that this is a CC2640R2 chip.
CHIP_TYPE_CC2642 = 9, //!< 9 means that this is a CC2642 chip.
CHIP_TYPE_unused = 10,//!< 10 unused value
CHIP_TYPE_CC2652 = 11,//!< 11 means that this is a CC2652 chip.
CHIP_TYPE_CC1312 = 12,//!< 12 means that this is a CC1312 chip.
CHIP_TYPE_CC1352 = 13,//!< 13 means that this is a CC1352 chip.
CHIP_TYPE_CC1352P = 14 //!< 14 means that this is a CC1352P chip.
} ChipType_t;
//*****************************************************************************
@@ -356,12 +362,12 @@ extern ChipType_t ChipInfo_GetChipType( void );
//
//*****************************************************************************
typedef enum {
FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown.
FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member.
FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member.
FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member.
FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents).
FAMILY_CC13x2_13x4_26x2_26x4 = 4 //!< 4 means that the chip is a CC13x2, CC13x4, CC26x2, CC26x4 family member.
FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown.
FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member.
FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member.
FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member.
FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents).
FAMILY_CC13x2_CC26x2 = 4 //!< 4 means that the chip is a CC13x2, CC26x2 family member.
} ChipFamily_t;
//*****************************************************************************
@@ -374,6 +380,26 @@ typedef enum {
//*****************************************************************************
extern ChipFamily_t ChipInfo_GetChipFamily( void );
//*****************************************************************************
//
// Options for the define THIS_DRIVERLIB_BUILD
//
//*****************************************************************************
#define DRIVERLIB_BUILD_CC26X0 0 //!< 0 is the driverlib build ID for the cc26x0 driverlib.
#define DRIVERLIB_BUILD_CC13X0 1 //!< 1 is the driverlib build ID for the cc13x0 driverlib.
#define DRIVERLIB_BUILD_CC26X1 2 //!< 2 is the driverlib build ID for the cc26x1 driverlib.
#define DRIVERLIB_BUILD_CC26X0R2 3 //!< 3 is the driverlib build ID for the cc26x0r2 driverlib.
#define DRIVERLIB_BUILD_CC13X2_CC26X2 4 //!< 4 is the driverlib build ID for the cc13x2_cc26x2 driverlib.
//*****************************************************************************
//
//! \brief Define THIS_DRIVERLIB_BUILD, identifying current driverlib build ID.
//!
//! This driverlib build identifier can be useful for compile time checking/optimization (supporting C preprocessor expressions).
//
//*****************************************************************************
#define THIS_DRIVERLIB_BUILD DRIVERLIB_BUILD_CC13X2_CC26X2
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC13x0 family.
@@ -432,16 +458,16 @@ ChipInfo_ChipFamilyIs_CC26x1( void )
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC13x2, CC13x4, CC26x2, CC26x4 family.
//! \brief Returns true if this chip is member of the CC13x2, CC26x2 family.
//!
//! \return
//! Returns \c true if this chip is member of the CC13x2, CC13x4, CC26x2, CC26x4 family, \c false otherwise.
//! Returns \c true if this chip is member of the CC13x2, CC26x2 family, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4( void )
ChipInfo_ChipFamilyIs_CC13x2_CC26x2( void )
{
return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_13x4_26x2_26x4 );
return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_CC26x2 );
}
//*****************************************************************************
@@ -452,7 +478,7 @@ ChipInfo_ChipFamilyIs_CC13x2_13x4_26x2_26x4( void )
typedef enum {
HWREV_Unknown = -1, //!< -1 means that the chip's HW revision is unknown.
HWREV_1_0 = 10, //!< 10 means that the chip's HW revision is 1.0
HWREV_1_1 = 11, //!< 10 means that the chip's HW revision is 1.0
HWREV_1_1 = 11, //!< 11 means that the chip's HW revision is 1.1
HWREV_2_0 = 20, //!< 20 means that the chip's HW revision is 2.0
HWREV_2_1 = 21, //!< 21 means that the chip's HW revision is 2.1
HWREV_2_2 = 22, //!< 22 means that the chip's HW revision is 2.2
@@ -598,12 +624,12 @@ ChipInfo_HwRevisionIs_GTEQ_2_4( void )
//*****************************************************************************
//
//! \brief Verifies that current chip is CC13x2, CC13x4, CC26x2 or CC26x4 and never returns if violated.
//! \brief Verifies that current chip is CC13x2 or CC26x2 and never returns if violated.
//!
//! \return None
//
//*****************************************************************************
extern void ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated( void );
extern void ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated( void );
//*****************************************************************************
//
@@ -633,9 +659,9 @@ extern void ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated( void );
#undef ChipInfo_GetHwRevision
#define ChipInfo_GetHwRevision ROM_ChipInfo_GetHwRevision
#endif
#ifdef ROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated
#undef ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated
#define ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated ROM_ThisLibraryIsFor_CC13x2_13x4_26x2_26x4_HaltIfViolated
#ifdef ROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated
#undef ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated
#define ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated ROM_ThisLibraryIsFor_CC13x2_CC26x2_HaltIfViolated
#endif
#endif
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: cpu.c
* Revised: 2017-01-16 19:17:22 +0100 (Mon, 16 Jan 2017)
* Revision: 48249
* Revised: 2018-05-08 10:04:01 +0200 (Tue, 08 May 2018)
* Revision: 51972
*
* Description: Instruction wrappers for special CPU instructions needed by
* the drivers.
@@ -115,10 +115,11 @@ CPUcpsid(void)
uint32_t ui32Ret;
// Read PRIMASK and disable interrupts
__asm(" mrs r0, PRIMASK\n"
" cpsid i\n"
" bx lr\n"
: "=r"(ui32Ret));
__asm volatile (" mrs %0, PRIMASK\n"
" cpsid i\n"
" bx lr\n"
: "=r"(ui32Ret)
);
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
@@ -182,9 +183,10 @@ CPUprimask(void)
uint32_t ui32Ret;
// Read PRIMASK
__asm(" mrs r0, PRIMASK\n"
" bx lr\n"
: "=r"(ui32Ret));
__asm volatile (" mrs %0, PRIMASK\n"
" bx lr\n"
: "=r"(ui32Ret)
);
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
@@ -251,10 +253,11 @@ CPUcpsie(void)
uint32_t ui32Ret;
// Read PRIMASK and enable interrupts.
__asm(" mrs r0, PRIMASK\n"
" cpsie i\n"
" bx lr\n"
: "=r"(ui32Ret));
__asm volatile (" mrs %0, PRIMASK\n"
" cpsie i\n"
" bx lr\n"
: "=r"(ui32Ret)
);
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
@@ -318,9 +321,10 @@ CPUbasepriGet(void)
uint32_t ui32Ret;
// Read BASEPRI.
__asm(" mrs r0, BASEPRI\n"
" bx lr\n"
: "=r"(ui32Ret));
__asm volatile (" mrs %0, BASEPRI\n"
" bx lr\n"
: "=r"(ui32Ret)
);
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
@@ -344,7 +348,7 @@ CPUdelay(uint32_t ui32Count)
void
CPUdelay(uint32_t ui32Count)
{
// Delay the specified number of times (3 cycles pr. loop)
// Loop the specified number of times
__asm("CPUdelay:\n"
" subs r0, #1\n"
" bne.n CPUdelay\n"
@@ -366,7 +370,7 @@ CPUdel
// For CCS implement this function in pure assembly. This prevents the TI
// compiler from doing funny things with the optimizer.
// Delay the specified number of times (3 cycles pr. loop)
// Loop the specified number of times
__asm(" .sect \".text:NOROM_CPUdelay\"\n"
" .clink\n"
" .thumbfunc NOROM_CPUdelay\n"
@@ -377,12 +381,16 @@ __asm(" .sect \".text:NOROM_CPUdelay\"\n"
" bne.n NOROM_CPUdelay\n"
" bx lr\n");
#else
// GCC
void __attribute__((naked))
CPUdelay(uint32_t ui32Count)
{
// Delay the specified number of times (3 cycles pr. loop)
__asm(" subs r0, #1\n"
" bne NOROM_CPUdelay\n"
" bx lr");
// Loop the specified number of times
__asm volatile ("%=: subs %0, #1\n"
" bne %=b\n"
" bx lr\n"
: /* No output */
: "r" (ui32Count)
);
}
#endif
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: cpu.h
* Revised: 2017-01-16 19:01:21 +0100 (Mon, 16 Jan 2017)
* Revision: 48248
* Revised: 2017-08-21 13:20:52 +0200 (Mon, 21 Aug 2017)
* Revision: 49618
*
* Description: Defines and prototypes for the CPU instruction wrapper
* functions.
@@ -135,7 +135,7 @@ extern uint32_t CPUcpsie(void);
//
//! \brief Get the interrupt priority disable level.
//!
//! Use this function to get the the level of priority that will disable
//! Use this function to get the level of priority that will disable
//! interrupts with a lower priority level.
//!
//! \return Returns the value of the \b BASEPRI register.
@@ -145,13 +145,31 @@ extern uint32_t CPUbasepriGet(void);
//*****************************************************************************
//
//! \brief Provide a small delay.
//! \brief Provide a small delay using a simple loop counter.
//!
//! This function provides means for generating a constant length delay. It
//! is written in assembly to keep the delay consistent across tool chains,
//! avoiding the need to tune the delay based on the tool chain in use.
//!
//! The loop takes 3 cycles/loop.
//! \note It is not recommended using this function for long delays.
//!
//! Notice that interrupts can affect the delay if not manually disabled in advance.
//!
//! The delay depends on where code resides and the path for code fetching:
//! - Code in flash, cache enabled, prefetch enabled : 4 cycles per loop (Default)
//! - Code in flash, cache enabled, prefetch disabled : 5 cycles per loop
//! - Code in flash, cache disabled : 7 cycles per loop
//! - Code in SRAM : 6 cycles per loop
//! - Code in GPRAM : 3 cycles per loop
//!
//! \note If using an RTOS, consider using RTOS provided delay functions because
//! these will not block task scheduling and will potentially save power.
//!
//! Calculate delay count based on the wanted delay in microseconds (us):
//! - ui32Count = [delay in us] * [CPU clock in MHz] / [cycles per loop]
//!
//! Example: 250 us delay with code in flash and with cache and prefetch enabled:
//! - ui32Count = 250 * 48 / 4 = 3000
//!
//! \param ui32Count is the number of delay loop iterations to perform.
//!
@@ -203,7 +221,7 @@ __STATIC_INLINE void __attribute__((always_inline))
CPUwfi(void)
{
// Wait for the next interrupt.
__asm(" wfi\n");
__asm volatile (" wfi\n");
}
#endif
@@ -250,7 +268,7 @@ __STATIC_INLINE void __attribute__((always_inline))
CPUwfe(void)
{
// Wait for the next event.
__asm(" wfe\n");
__asm volatile (" wfe\n");
}
#endif
@@ -297,7 +315,7 @@ __STATIC_INLINE void __attribute__((always_inline))
CPUsev(void)
{
// Send event.
__asm(" sev\n");
__asm volatile (" sev\n");
}
#endif
@@ -348,13 +366,12 @@ CPUbasepriSet(uint32_t ui32NewBasepri)
__STATIC_INLINE void __attribute__ ((naked))
CPUbasepriSet(uint32_t ui32NewBasepri)
{
// Set the BASEPRI register.
__asm(" msr BASEPRI, %0\n"
" bx lr\n"
:
: "r" (ui32NewBasepri)
:
);
// Set the BASEPRI register.
__asm volatile (" msr BASEPRI, %0\n"
" bx lr\n"
: /* No output */
: "r" (ui32NewBasepri)
);
}
#pragma GCC diagnostic pop
#endif
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: crypto.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
* Revised: 2017-12-20 16:40:03 +0100 (Wed, 20 Dec 2017)
* Revision: 50869
*
* Description: Driver for the Crypto module
*
@@ -138,7 +138,11 @@ CRYPTOAesLoadKey(uint32_t *pui32AesKey,
{
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & 0x00000001));
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) &
(CRYPTO_IRQSTAT_DMA_BUS_ERR_M |
CRYPTO_IRQSTAT_KEY_ST_WR_ERR_M |
CRYPTO_IRQSTAT_DMA_IN_DONE |
CRYPTO_IRQSTAT_RESULT_AVAIL_M)));
// Check for errors in DMA and key store.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) &
@@ -1,7 +1,7 @@
/******************************************************************************
* Filename: crypto.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
* Revised: 2018-01-12 18:46:31 +0100 (Fri, 12 Jan 2018)
* Revision: 51161
*
* Description: AES header file.
*
@@ -234,8 +234,8 @@ extern uint32_t CRYPTOAesLoadKey(uint32_t *pui32AesKey,
//
//! \brief Start an AES-CBC operation (encryption or decryption).
//!
//! The function starts an AES CBC mode encypt or decrypt operation.
//! End operation can be deteced by enabling interrupt or by polling
//! The function starts an AES CBC mode encrypt or decrypt operation.
//! End operation can be detected by enabling interrupt or by polling
//! CRYPTOAesCbcStatus(). Result of operation is returned by CRYPTOAesCbcStatus().
//!
//! \param pui32MsgIn is a pointer to the input data.
@@ -386,7 +386,7 @@ CRYPTOAesCbcFinish(void)
//! location in which the key is stored.
//!
//! \param bEncrypt determines whether to run encryption or not.
//! \param ui32AuthLength is the the length of the authentication field -
//! \param ui32AuthLength is the length of the authentication field -
//! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets.
//! \param pui32Nonce is a pointer to 13-byte or 12-byte Nonce (Number used once).
//! \param pui32PlainText is a pointer to the octet string input message.
@@ -467,7 +467,7 @@ extern uint32_t CRYPTOCcmAuthEncryptResultGet(uint32_t ui32TagLength,
//! location in which the key is stored.
//!
//! \param bDecrypt determines whether to run decryption or not.
//! \param ui32AuthLength is the the length of the authentication field -
//! \param ui32AuthLength is the length of the authentication field -
//! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets.
//! \param pui32Nonce is a pointer to 13-byte or 12-byte Nonce (Number used once).
//! \param pui32CipherText is a pointer to the octet string encrypted message.
@@ -520,7 +520,7 @@ extern uint32_t CRYPTOCcmInvAuthDecryptStatus(void);
//
//! \brief Get the result of the CCM operation.
//!
//! \param ui32AuthLength is the the length of the authentication field -
//! \param ui32AuthLength is the length of the authentication field -
//! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets.
//! \param pui32CipherText is a pointer to the octet string encrypted message.
//! \param ui32CipherTextLength is the length of the encrypted message.
@@ -720,12 +720,15 @@ CRYPTOIntClear(uint32_t ui32IntFlags)
//*****************************************************************************
//
//! \brief Registers an interrupt handler for a Crypto interrupt.
//! \brief Registers an interrupt handler for a Crypto interrupt in the dynamic interrupt table.
//!
//! This function does the actual registering of the interrupt handler. This
//! function enables the global interrupt in the interrupt controller; specific
//! UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the interrupt
//! handler's responsibility to clear the interrupt source.
//! \note Only use this function if you want to use the dynamic vector table (in SRAM)!
//!
//! This function registers a function as the interrupt handler for a specific
//! interrupt and enables the corresponding interrupt in the interrupt controller.
//!
//! Specific UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the
//! interrupt handler's responsibility to clear the interrupt source.
//!
//! \param pfnHandler is a pointer to the function to be called when the
//! UART interrupt occurs.
@@ -748,7 +751,7 @@ CRYPTOIntRegister(void (*pfnHandler)(void))
//*****************************************************************************
//
//! \brief Unregisters an interrupt handler for a Crypto interrupt.
//! \brief Unregisters an interrupt handler for a Crypto interrupt in the dynamic interrupt table.
//!
//! This function does the actual unregistering of the interrupt handler. It
//! clears the handler to be called when a Crypto interrupt occurs. This
@@ -42,4 +42,4 @@
/// Declare the current DriverLib release
DRIVERLIB_DECLARE_RELEASE(0, 48919);
DRIVERLIB_DECLARE_RELEASE(0, 51995);
@@ -63,7 +63,7 @@ extern "C"
/// DriverLib release group number
#define DRIVERLIB_RELEASE_GROUP 0
/// DriverLib release build number
#define DRIVERLIB_RELEASE_BUILD 48919
#define DRIVERLIB_RELEASE_BUILD 51995
@@ -83,7 +83,7 @@ extern "C"
const volatile uint8_t driverlib_release_##group##_##build
/// External declaration of the DriverLib release locking object
extern DRIVERLIB_DECLARE_RELEASE(0, 48919);
extern DRIVERLIB_DECLARE_RELEASE(0, 51995);
@@ -135,7 +135,7 @@ extern DRIVERLIB_DECLARE_RELEASE(0, 48919);
//
//*****************************************************************************
#define DRIVERLIB_ASSERT_CURR_RELEASE() \
DRIVERLIB_ASSERT_RELEASE(0, 48919)
DRIVERLIB_ASSERT_RELEASE(0, 51995)

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