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[cc2650] remove example platform (#6398)

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This commit is contained in:
Jonathan Hui
2021-04-02 18:50:37 -07:00
committed by GitHub
parent 09c95f9a32
commit b7751460e0
251 changed files with 8 additions and 125561 deletions
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configure.ac
+4 -7
View File
@@ -780,7 +780,7 @@ AC_MSG_CHECKING([whether to build examples])
AC_ARG_WITH(examples,
[AS_HELP_STRING([--with-examples=TARGET],
[Build example applications for one of: simulation, cc2538, cc2650, efr32mg1, efr32mg12, efr32mg13, efr32mg21,
[Build example applications for one of: simulation, cc2538, efr32mg1, efr32mg12, efr32mg13, efr32mg21,
jn5189, k32w061, nrf52811, nrf52833, nrf52840 @<:@default=no@:>@.
Note that building example applications also builds the associated OpenThread platform libraries
and any third_party libraries needed to support the examples.])],
@@ -788,7 +788,7 @@ AC_ARG_WITH(examples,
case "${with_examples}" in
no)
;;
simulation|cc2538|cc2650|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|k32w061|nrf52811|nrf52833|nrf52840)
simulation|cc2538|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|k32w061|nrf52811|nrf52833|nrf52840)
;;
*)
AC_MSG_RESULT(ERROR)
@@ -802,7 +802,6 @@ AM_CONDITIONAL([OPENTHREAD_ENABLE_EXAMPLES], [test ${with_examples} != "no"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_SIMULATION],[test "${with_examples}" = "simulation"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2538], [test "${with_examples}" = "cc2538"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_CC2650], [test "${with_examples}" = "cc2650"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG1], [test "${with_examples}" = "efr32mg1"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG12], [test "${with_examples}" = "efr32mg12"])
AM_CONDITIONAL([OPENTHREAD_EXAMPLES_EFR32MG13], [test "${with_examples}" = "efr32mg13"])
@@ -835,12 +834,12 @@ AC_MSG_CHECKING([whether to build platform libraries])
AC_ARG_WITH(platform,
[AS_HELP_STRING([--with-platform=TARGET],
[Build OpenThread platform libraries for one of: cc2538, cc2650,
[Build OpenThread platform libraries for one of: cc2538,
efr32mg1, efr32mg12, efr32mg13, efr32mg21, jn5189, nrf52811, nrf52833, nrf52840, posix, simulation @<:@default=simulation@:>@.])],
[
# Make sure the given target is valid.
case "${with_platform}" in
no|cc2538|cc2650|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|nrf52811|nrf52833|nrf52840|posix|simulation)
no|cc2538|efr32mg1|efr32mg12|efr32mg13|efr32mg21|jn5189|nrf52811|nrf52833|nrf52840|posix|simulation)
;;
*)
AC_MSG_RESULT(ERROR)
@@ -872,7 +871,6 @@ AM_CONDITIONAL([OPENTHREAD_ENABLE_PLATFORM], [test ${with_platform} != "no"])
OPENTHREAD_ENABLE_PLATFORM=${with_platform}
AM_CONDITIONAL([OPENTHREAD_PLATFORM_CC2538], [test "${with_platform}" = "cc2538"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_CC2650], [test "${with_platform}" = "cc2650"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_EFR32MG1], [test "${with_platform}" = "efr32mg1"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_EFR32MG12], [test "${with_platform}" = "efr32mg12"])
AM_CONDITIONAL([OPENTHREAD_PLATFORM_EFR32MG13], [test "${with_platform}" = "efr32mg13"])
@@ -1026,7 +1024,6 @@ examples/apps/cli/Makefile
examples/apps/ncp/Makefile
examples/platforms/Makefile
examples/platforms/cc2538/Makefile
examples/platforms/cc2650/Makefile
examples/platforms/efr32/Makefile
examples/platforms/efr32/sleepy-demo/Makefile
examples/platforms/efr32/sleepy-demo/sleepy-demo-mtd/Makefile
doc/site/en/guides/porting/set-up-the-build-environment.md
+2 -3
View File
@@ -32,12 +32,12 @@ Example:
```
AC_ARG_WITH(examples,
[AS_HELP_STRING([--with-examples=TARGET],
[Specify the examples from one of: none, simulation, cc2538, cc2650, efr32, nrf52840 @&lt;:@default=none@:&gt;@.])],
[Specify the examples from one of: none, simulation, cc2538, efr32, nrf52840 @&lt;:@default=none@:&gt;@.])],
[
case "${with_examples}" in
none)
;;
simulation|cc2538|cc2650|efr32|nrf52840)
simulation|cc2538|efr32|nrf52840)
if test ${enable_posix_app} = "yes"; then
AC_MSG_ERROR([--with-examples must be none when POSIX apps are enabled by --enable-posix-app])
fi
@@ -167,7 +167,6 @@ order:
DIST_SUBDIRS = \
cc2538 \
cc2650 \
efr32 \
nrf52840 \
simulation \
examples/Makefile-cc2650
-269
View File
@@ -1,269 +0,0 @@
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
.NOTPARALLEL:
AR = arm-none-eabi-ar
AS = arm-none-eabi-as
CPP = arm-none-eabi-cpp
CC = arm-none-eabi-gcc
CXX = arm-none-eabi-g++
LD = arm-none-eabi-ld
STRIP = arm-none-eabi-strip
NM = arm-none-eabi-nm
RANLIB = arm-none-eabi-ranlib
OBJCOPY = arm-none-eabi-objcopy
BuildJobs ?= 10
configure_OPTIONS = \
--enable-cli \
--enable-mtd \
--enable-ncp \
--enable-radio-only \
--enable-linker-map \
--with-examples=cc2650 \
MBEDTLS_CPPFLAGS="$(CC2650_MBEDTLS_CPPFLAGS)" \
$(NULL)
CC2650_MBEDTLS_CPPFLAGS = -DMBEDTLS_CONFIG_FILE='\"mbedtls-config.h\"'
CC2650_MBEDTLS_CPPFLAGS += -DMBEDTLS_USER_CONFIG_FILE='\"cc2650-mbedtls-config.h\"'
CC2650_MBEDTLS_CPPFLAGS += -I$(PWD)/examples/platforms/cc2650/crypto
CC2650_MBEDTLS_CPPFLAGS += -I$(PWD)/third_party/ti/devices/cc26x0
CC2650_MBEDTLS_CPPFLAGS += -I$(PWD)/third_party/mbedtls
CC2650_MBEDTLS_CPPFLAGS += -I$(PWD)/third_party/mbedtls/repo/include
CC2650_CONFIG_FILE_CPPFLAGS = -DOPENTHREAD_PROJECT_CORE_CONFIG_FILE='\"openthread-core-cc2650-config.h\"'
CC2650_CONFIG_FILE_CPPFLAGS += -DOPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE='\"openthread-core-cc2650-config-check.h\"'
CC2650_CONFIG_FILE_CPPFLAGS += -I$(PWD)/examples/platforms/cc2650/
COMMONCFLAGS := \
-fdata-sections \
-ffunction-sections \
-Os \
-g \
$(CC2650_CONFIG_FILE_CPPFLAGS)\
$(NULL)
include $(dir $(abspath $(lastword $(MAKEFILE_LIST))))/common-switches.mk
CPPFLAGS += \
$(COMMONCFLAGS) \
$(target_CPPFLAGS) \
$(NULL)
CFLAGS += \
$(COMMONCFLAGS) \
$(target_CFLAGS) \
$(NULL)
CXXFLAGS += \
$(COMMONCFLAGS) \
$(target_CXXFLAGS) \
-fno-exceptions \
-fno-rtti \
$(NULL)
LDFLAGS += \
$(COMMONCFLAGS) \
$(target_LDFLAGS) \
-nostartfiles \
-specs=nano.specs \
-specs=nosys.specs \
-Wl,--gc-sections \
$(NULL)
ECHO := @echo
MAKE := make
MKDIR_P := mkdir -p
LN_S := ln -s
RM_F := rm -f
INSTALL := /usr/bin/install
INSTALLFLAGS := -p
TopSourceDir := $(dir $(shell readlink $(firstword $(MAKEFILE_LIST))))..
AbsTopSourceDir := $(dir $(realpath $(firstword $(MAKEFILE_LIST))))..
BuildPath = build
TopBuildDir = $(BuildPath)
AbsTopBuildDir = $(PWD)/$(TopBuildDir)
ResultPath = output
TopResultDir = $(ResultPath)
AbsTopResultDir = $(PWD)/$(TopResultDir)
TargetTuple = cc2650
ARCHS = cortex-m3
TopTargetLibDir = $(TopResultDir)/$(TargetTuple)/lib
ifndef BuildJobs
BuildJobs := $(shell getconf _NPROCESSORS_ONLN)
endif
JOBSFLAG := -j$(BuildJobs)
#
# configure-arch <arch>
#
# Configure OpenThread for the specified architecture.
#
# arch - The architecture to configure.
#
define configure-arch
$(ECHO) " CONFIG $(TargetTuple)..."
(cd $(BuildPath)/$(TargetTuple) && $(AbsTopSourceDir)/configure \
INSTALL="$(INSTALL) $(INSTALLFLAGS)" \
CPP="$(CPP)" CC="$(CC)" CXX="$(CXX)" OBJC="$(OBJC)" OBJCXX="$(OBJCXX)" AR="$(AR)" RANLIB="$(RANLIB)" NM="$(NM)" STRIP="$(STRIP)" CPPFLAGS="$(CPPFLAGS)" CFLAGS="$(CFLAGS)" CXXFLAGS="$(CXXFLAGS)" LDFLAGS="$(LDFLAGS)" \
--host=arm-none-eabi \
--prefix=/ \
--exec-prefix=/$(TargetTuple) \
$(configure_OPTIONS))
endef # configure-arch
#
# build-arch <arch>
#
# Build the OpenThread intermediate build products for the specified
# architecture.
#
# arch - The architecture to build.
#
define build-arch
$(ECHO) " BUILD $(TargetTuple)"
$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(TargetTuple) --no-print-directory \
all
endef # build-arch
#
# stage-arch <arch>
#
# Stage (install) the OpenThread final build products for the specified
# architecture.
#
# arch - The architecture to stage.
#
define stage-arch
$(ECHO) " STAGE $(TargetTuple)"
$(MAKE) $(JOBSFLAG) -C $(BuildPath)/$(TargetTuple) --no-print-directory \
DESTDIR=$(AbsTopResultDir) \
install
endef # stage-arch
#
# ARCH_template <arch>
#
# Define macros, targets and rules to configure, build, and stage the
# OpenThread for a single architecture.
#
# arch - The architecture to instantiate the template for.
#
define ARCH_template
CONFIGURE_TARGETS += configure-$(1)
BUILD_TARGETS += do-build-$(1)
STAGE_TARGETS += stage-$(1)
BUILD_DIRS += $(BuildPath)/$(TargetTuple)
DIRECTORIES += $(BuildPath)/$(TargetTuple)
configure-$(1): target_CPPFLAGS=$($(1)_target_CPPFLAGS)
configure-$(1): target_CFLAGS=$($(1)_target_CFLAGS)
configure-$(1): target_CXXFLAGS=$($(1)_target_CXXFLAGS)
configure-$(1): target_LDFLAGS=$($(1)_target_LDFLAGS)
configure-$(1): $(BuildPath)/$(TargetTuple)/config.status
$(BuildPath)/$(TargetTuple)/config.status: | $(BuildPath)/$(TargetTuple)
$$(call configure-arch,$(1))
do-build-$(1): configure-$(1)
do-build-$(1):
+$$(call build-arch,$(1))
stage-$(1): do-build-$(1)
stage-$(1): | $(TopResultDir)
$$(call stage-arch,$(1))
$(1): stage-$(1)
endef # ARCH_template
.DEFAULT_GOAL := all
all: stage
#
# cortex-m3
#
cortex-m3_target_ABI = cortex-m3
cortex-m3_target_CPPFLAGS = -mcpu=cortex-m3 -mfloat-abi=soft -mthumb
cortex-m3_target_CFLAGS = -mcpu=cortex-m3 -mfloat-abi=soft -mthumb
cortex-m3_target_CXXFLAGS = -mcpu=cortex-m3 -mfloat-abi=soft -mthumb
cortex-m3_target_LDFLAGS = -mcpu=cortex-m3 -mfloat-abi=soft -mthumb
# Instantiate an architecture-specific build template for each target
# architecture.
$(foreach arch,$(ARCHS),$(eval $(call ARCH_template,$(arch))))
#
# Common / Finalization
#
configure: $(CONFIGURE_TARGETS)
build: $(BUILD_TARGETS)
stage: $(STAGE_TARGETS)
DIRECTORIES = $(TopResultDir) $(TopResultDir)/$(TargetTuple)/lib $(BUILD_DIRS)
CLEAN_DIRS = $(TopResultDir) $(BUILD_DIRS)
all: stage
$(DIRECTORIES):
$(ECHO) " MKDIR $@"
@$(MKDIR_P) "$@"
clean:
$(ECHO) " CLEAN"
@$(RM_F) -r $(CLEAN_DIRS)
help:
$(ECHO) "Simply type 'make -f $(firstword $(MAKEFILE_LIST))' to build OpenThread for the following "
$(ECHO) "architectures: "
$(ECHO) ""
$(ECHO) " $(ARCHS)"
$(ECHO) ""
$(ECHO) "To build only a particular architecture, specify: "
$(ECHO) ""
$(ECHO) " make -f $(firstword $(MAKEFILE_LIST)) <architecture>"
$(ECHO) ""
examples/platforms/Makefile.am
-5
View File
@@ -43,7 +43,6 @@ EXTRA_DIST = \
DIST_SUBDIRS = \
cc2538 \
cc2650 \
efr32 \
k32w \
nrf528xx \
@@ -61,10 +60,6 @@ if OPENTHREAD_PLATFORM_CC2538
SUBDIRS += cc2538
endif
if OPENTHREAD_PLATFORM_CC2650
SUBDIRS += cc2650
endif
if OPENTHREAD_PLATFORM_EFR32
SUBDIRS += efr32
endif
examples/platforms/Makefile.platform.am
-4
View File
@@ -45,10 +45,6 @@ if OPENTHREAD_EXAMPLES_CC2538
include $(top_srcdir)/examples/platforms/cc2538/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_CC2650
include $(top_srcdir)/examples/platforms/cc2650/Makefile.platform.am
endif
if OPENTHREAD_EXAMPLES_EFR32
include $(top_srcdir)/examples/platforms/efr32/Makefile.platform.am
endif
examples/platforms/cc2650/CMakeLists.txt
-96
View File
@@ -1,96 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set(OT_PLATFORM_LIB "openthread-cc2650" PARENT_SCOPE)
if(NOT OT_CONFIG)
set(OT_CONFIG "openthread-core-cc2650-config.h")
set(OT_CONFIG ${OT_CONFIG} PARENT_SCOPE)
endif()
list(APPEND OT_PLATFORM_DEFINES
"OPENTHREAD_CORE_CONFIG_PLATFORM_CHECK_FILE=\"openthread-core-cc2650-config-check.h\""
)
set(OT_PLATFORM_DEFINES ${OT_PLATFORM_DEFINES} PARENT_SCOPE)
target_compile_definitions(ot-config INTERFACE "MBEDTLS_USER_CONFIG_FILE=\"cc2650-mbedtls-config.h\"")
list(APPEND OT_PUBLIC_INCLUDES
"${CMAKE_CURRENT_SOURCE_DIR}/crypto"
"${PROJECT_SOURCE_DIR}/third_party/ti/devices/cc26x0"
)
set(OT_PUBLIC_INCLUDES ${OT_PUBLIC_INCLUDES} PARENT_SCOPE)
list(APPEND OT_PLATFORM_DEFINES "OPENTHREAD_PROJECT_CORE_CONFIG_FILE=\"${OT_CONFIG}\"")
add_library(openthread-cc2650
alarm.c
cc2650_ccfg.c
cc2650_startup.c
crypto/aes_alt.c
crypto/sha256_alt.c
cxx_helpers.c
diag.c
entropy.c
logging.c
misc.c
radio.c
system.c
uart.c
$<TARGET_OBJECTS:openthread-platform-utils>
)
set_target_properties(
openthread-cc2650
PROPERTIES
C_STANDARD 99
CXX_STANDARD 11
)
target_link_libraries(openthread-cc2650
PUBLIC
cc26x0-driver
-Wl,--gc-sections
-Wl,-Map=$<TARGET_PROPERTY:NAME>.map
PRIVATE
${OT_MBEDTLS}
ot-config
)
target_compile_definitions(openthread-cc2650
PUBLIC
${OT_PLATFORM_DEFINES}
)
target_compile_options(openthread-cc2650 PRIVATE ${OT_CFLAGS})
target_include_directories(openthread-cc2650
PRIVATE
${OT_PUBLIC_INCLUDES}
${PROJECT_SOURCE_DIR}/src/core
${PROJECT_SOURCE_DIR}/examples/platforms
)
examples/platforms/cc2650/Makefile.am
-80
View File
@@ -1,80 +0,0 @@
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
include $(abs_top_nlbuild_autotools_dir)/automake/pre.am
# Do not enable -Wcast-align for this platform
override CFLAGS := $(filter-out -Wcast-align,$(CFLAGS))
override CXXFLAGS := $(filter-out -Wcast-align,$(CXXFLAGS))
lib_LIBRARIES = libopenthread-cc2650.a
libopenthread_cc2650_a_CPPFLAGS = \
-I$(top_srcdir)/include \
-I$(top_srcdir)/src \
-I$(top_srcdir)/src/core \
-I$(top_srcdir)/examples/platforms \
-I$(top_srcdir)/examples/platforms/cc2650 \
-I$(top_srcdir)/third_party/ti/devices/cc26x0 \
-I$(top_srcdir)/third_party/mbedtls/repo/include \
$(MBEDTLS_CPPFLAGS) \
$(NULL)
PLATFORM_SOURCES = \
alarm.c \
cc2650_radio.h \
diag.c \
entropy.c \
misc.c \
logging.c \
openthread-core-cc2650-config.h \
openthread-core-cc2650-config-check.h \
platform-cc2650.h \
radio.c \
system.c \
uart.c \
crypto/sha256_alt.c \
crypto/aes_alt.c \
cxx_helpers.c \
cc2650_ccfg.c \
cc2650_startup.c \
$(NULL)
libopenthread_cc2650_a_SOURCES = \
$(PLATFORM_SOURCES) \
$(NULL)
libopenthread_cc2650_a_DEPENDENCIES = \
$(top_srcdir)/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a \
$(NULL)
Dash = -
libopenthread_cc2650_a_LIBADD = \
$(shell find $(top_builddir)/examples/platforms/utils $(Dash)type f $(Dash)name "*.o")
include $(abs_top_nlbuild_autotools_dir)/automake/post.am
examples/platforms/cc2650/Makefile.platform.am
-44
View File
@@ -1,44 +0,0 @@
#
# Copyright (c) 2017, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
#
# cc2650 platform-specific Makefile
#
CPPFLAGS_COMMON += \
-I$(top_srcdir)/third_party/ti/devices/cc26x0 \
$(NULL)
LDADD_COMMON += \
$(top_builddir)/examples/platforms/cc2650/libopenthread-cc2650.a \
$(top_srcdir)/third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a \
$(NULL)
LDFLAGS_COMMON += \
-T $(top_srcdir)/third_party/ti/devices/cc26x0/linker_files/cc26x0f128.lds \
$(NULL)
examples/platforms/cc2650/README.md
-119
View File
@@ -1,119 +0,0 @@
# OpenThread on CC2650 Example
This directory contains example platform drivers for the [Texas Instruments CC2650][cc2650].
The example platform drivers are intended to present the minimal code necessary to support OpenThread. As a result, the example platform drivers do not necessarily highlight the platform's full capabilities. The platform abstraction layer was build for the [CC2650 LAUNCHXL][cc2650-launchxl], usage on other boards with a CC2650 will require changes to the peripheral drivers.
Due to flash size limitations, some features of OpenThread are not supported on the [Texas Instruments CC2650][cc2650]. This platform is intended for exprimentation and exploration of OpenThread, not a production ready environment. Texas Instruments recommends future TI SoCs for production.
Building with gcc 5.4 is recommended due to generated code size concerns.
All three configurations were tested with `arm-none-eabi-gcc 5.4.1 20160609 (release)` on [this commit][tested-commit]. The automatic integration builds have since been limited to only the `cli-mtd` configuration to limit the impact on pull requests.
[cc2650]: http://www.ti.com/product/CC2650
[cc2650-launchxl]: http://www.ti.com/tool/Launchxl-cc2650
[tested-commit]: https://github.com/openthread/openthread/commit/e8611291d65e8ad28d77a7645695c5352504c3dd
## Build Environment
Building the examples for the cc2650 requires [GNU AutoConf][gnu-autoconf], [GNU AutoMake][gnu-automake], [Python][python], and the [ARM gcc toolchain][arm-toolchain].
With the exception of the arm toolchain, most of these tools are installed by default on modern Posix systems. Windows does not have these tools installed by default, and the bootstrap script requires a Posix or MSYS environment to run. It is possible to setup an MSYS environment inside of Windows using tools such as [Cygwin][cygwin] or [MinGW][mingw] but it is recommended to setup a Linux VM for building on a Windows system. For help setting up VirtualBox with Ubuntu, consult this [community help wiki article][ubuntu-wiki-virtualbox].
[gnu-autoconf]: https://www.gnu.org/software/autoconf
[gnu-automake]: https://www.gnu.org/software/automake
[python]: https://www.python.org
[arm-toolchain]: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm
[cygwin]: https://www.cygwin.com
[mingw]: http://www.mingw.org
[ubuntu-wiki-virtualbox]: https://help.ubuntu.com/community/VirtualBox
In a Bash terminal, follow these instructions to install the GNU toolchain and other dependencies.
```bash
$ cd <path-to-openthread>
$ ./script/bootstrap
```
## Building
In a Bash terminal, follow these instructions to build the cc2650 examples.
```bash
$ cd <path-to-openthread>
$ ./bootstrap
$ make -f examples/Makefile-cc2650
```
## Flash Binaries
If the build completed successfully, the `elf` files may be found in `<path-to-openthread>/output/cc2650/bin`.
To flash the images with [Flash Programmer 2][ti-flash-programmer-2], the files must have the `*.elf` extension.
```bash
$ cd <path-to-openthread>/output/cc2650/bin
$ cp ot-cli ot-cli.elf
```
To load the images with the [serial bootloader][ti-cc2650-bootloader], the images must be converted to `bin`. This is done using `arm-none-eabi-objcopy`
```bash
$ cd <path-to-openthread>/output/cc2650/bin
$ arm-none-eabi-objcopy -O binary ot-cli ot-cli.bin
```
The [cc2538-bsl.py script][cc2538-bsl-tool] provides a convenient method for flashing a CC2650 via the UART. To enter the bootloader backdoor for flashing, hold down BTN-1 on CC2650 LauchPad or SELECT for CC2650DK (corresponds to logic '0') while you press the Reset button.
[ti-flash-programmer-2]: http://www.ti.com/tool/flash-programmer
[ti-cc2650-bootloader]: http://www.ti.com/lit/an/swra466a/swra466a.pdf
[cc2538-bsl-tool]: https://github.com/JelmerT/cc2538-bsl
## Interact
### CLI example
1. With a terminal client (putty, minicom, etc.) open the com port associated with the cc2650 UART. The serial port settings are:
- 115200 baud
- 8 data bits
- no parity bit
- 1 stop bit
2. Type `help` for a list of commands
3. follow the instructions in the [CLI README][cli-readme] for instructions on setting up a network
[cli-readme]: ../../../src/cli/README.md
```bash
> help
help
channel
childtimeout
contextreusedelay
extaddr
extpanid
ipaddr
keysequence
leaderweight
masterkey
mode
netdata register
networkidtimeout
networkname
panid
ping
prefix
releaserouterid
rloc16
route
routerupgradethreshold
scan
start
state
stop
```
### NCP example
Refer to the documentation in the [wpantund][wpantund] project for build instructions and usage information.
[wpantund]: https://github.com/openthread/wpantund
examples/platforms/cc2650/alarm.c
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "openthread-core-config.h"
#include <driverlib/aon_rtc.h>
#include <stdbool.h>
#include <stdint.h>
#include <openthread/platform/alarm-milli.h>
#include <openthread/platform/diag.h>
/**
* /NOTE: we could use systick, but that would sacrifice atleast a few ops
* every ms, and not run when the processor is sleeping.
*/
static uint32_t sTime0 = 0;
static uint32_t sAlarmTime = 0;
static bool sIsRunning = false;
/**
* Function documented in platform-cc2650.h
*/
void cc2650AlarmInit(void)
{
/*
* NOTE: this will not enable the individual rtc alarm channels
*/
AONRTCEnable();
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
uint32_t otPlatAlarmMilliGetNow(void)
{
/*
* This is current value of RTC as it appears in the register.
* With seconds as the upper 32 bytes and fractions of a second as the
* lower 32 bytes <32.32>.
*/
uint64_t rtcVal = AONRTCCurrent64BitValueGet();
return ((rtcVal * 1000) >> 32);
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStartAt(otInstance *aInstance, uint32_t aT0, uint32_t aDt)
{
OT_UNUSED_VARIABLE(aInstance);
sTime0 = aT0;
sAlarmTime = aDt;
sIsRunning = true;
}
/**
* Function documented in platform/alarm-milli.h
*/
void otPlatAlarmMilliStop(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
sIsRunning = false;
}
/**
* Function documented in platform-cc2650.h
*/
void cc2650AlarmProcess(otInstance *aInstance)
{
uint32_t offsetTime;
if (sIsRunning)
{
/* unsinged subtraction will result in the absolute offset */
offsetTime = otPlatAlarmMilliGetNow() - sTime0;
if (sAlarmTime <= offsetTime)
{
sIsRunning = false;
#if OPENTHREAD_CONFIG_DIAG_ENABLE
if (otPlatDiagModeGet())
{
otPlatDiagAlarmFired(aInstance);
}
else
#endif /* OPENTHREAD_CONFIG_DIAG_ENABLE */
{
otPlatAlarmMilliFired(aInstance);
}
}
}
}
examples/platforms/cc2650/arm-none-eabi.cmake
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@@ -1,42 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR ARM)
set(CMAKE_C_COMPILER arm-none-eabi-gcc)
set(CMAKE_CXX_COMPILER arm-none-eabi-g++)
set(CMAKE_ASM_COMPILER arm-none-eabi-as)
set(CMAKE_RANLIB arm-none-eabi-ranlib)
set(COMMON_C_FLAGS "-mthumb -fdata-sections -ffunction-sections -mcpu=cortex-m3 -mfloat-abi=soft")
set(CMAKE_C_FLAGS_INIT "${COMMON_C_FLAGS} -std=gnu99")
set(CMAKE_CXX_FLAGS_INIT "${COMMON_C_FLAGS} -fno-exceptions -fno-rtti")
set(CMAKE_ASM_FLAGS_INIT "${COMMON_C_FLAGS}")
set(CMAKE_EXE_LINKER_FLAGS_INIT "${COMMON_C_FLAGS} -specs=nano.specs -specs=nosys.specs -nostartfiles")
examples/platforms/cc2650/cc2650_ccfg.c
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@@ -1,52 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Configure the Customer Configuration Area.
*/
// clang-format off
// enable bootloader backdoor
#define SET_CCFG_BL_CONFIG_BOOTLOADER_ENABLE 0xC5 // Enable ROM boot loader
#define SET_CCFG_BL_CONFIG_BL_LEVEL 0x0 // Active low to open boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0D // DIO13 (BTN-1 button) on CC2650 LaunchPad Board for boot loader backdoor
// #define SET_CCFG_BL_CONFIG_BL_PIN_NUMBER 0x0B // DIO11 (SELECT button) on CC2650DK (QFN48/7*7) for boot loader backdoor
#define SET_CCFG_BL_CONFIG_BL_ENABLE 0xC5 // Enabled boot loader backdoor
#define SET_CCFG_IMAGE_VALID_CONF_IMAGE_VALID 0x00000000 // Flash image is valid
/*
* Include the default ccfg struct and configuration code.
*/
#include <startup_files/ccfg.c>
// clang-format on
examples/platforms/cc2650/cc2650_radio.h
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC2650_RADIO_H_
#define CC2650_RADIO_H_
#include <driverlib/rf_ieee_cmd.h>
enum
{
IEEE802154_FRAME_TYPE_MASK = 0x7, ///< (IEEE 802.15.4-2006) PSDU.FCF.frameType
IEEE802154_FRAME_TYPE_ACK = 0x2, ///< (IEEE 802.15.4-2006) frame type: ACK
IEEE802154_ACK_REQUEST = (1 << 5), ///< (IEEE 802.15.4-2006) PSDU.FCF.bAR
IEEE802154_DSN_OFFSET = 2, ///< (IEEE 802.15.4-2006) PSDU.sequenceNumber
IEEE802154_MAC_MIN_BE = 1, ///< (IEEE 802.15.4-2006) macMinBE
IEEE802154_MAC_MAX_BE = 5, ///< (IEEE 802.15.4-2006) macMaxBE
IEEE802154_MAC_MAX_CSMA_BACKOFFS = 4, ///< (IEEE 802.15.4-2006) macMaxCSMABackoffs
IEEE802154_MAC_MAX_FRAMES_RETRIES = 3, ///< (IEEE 802.15.4-2006) macMaxFrameRetries
IEEE802154_A_UINT_BACKOFF_PERIOD = 20, ///< (IEEE 802.15.4-2006 7.4.1) MAC constants
IEEE802154_A_TURNAROUND_TIME = 12, ///< (IEEE 802.15.4-2006 6.4.1) PHY constants
IEEE802154_PHY_SHR_DURATION = 10,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_PHY_SYMBOLS_PER_OCTET = 2,
///< (IEEE 802.15.4-2006 6.4.2) PHY PIB attribute, specifically the O-QPSK PHY
IEEE802154_MAC_ACK_WAIT_DURATION = (IEEE802154_A_UINT_BACKOFF_PERIOD + //
IEEE802154_A_TURNAROUND_TIME + //
IEEE802154_PHY_SHR_DURATION + //
(6 * IEEE802154_PHY_SYMBOLS_PER_OCTET)),
///< (IEEE 802.15.4-2006 7.4.2) macAckWaitDuration PIB attribute
IEEE802154_SYMBOLS_PER_SEC = 62500 ///< (IEEE 802.15.4-2006 6.5.3.2) O-QPSK symbol rate
};
enum
{
CC2650_RAT_TICKS_PER_SEC = 4000000, ///< 4MHz clock
CC2650_INVALID_RSSI = 127,
CC2650_UNKNOWN_EUI64 = 0xFF,
///< If the EUI64 read from the ccfg is all ones then the customer did not set the address
};
/**
* TX Power dBm lookup table - values from SmartRF Studio
*/
typedef struct output_config
{
int dbm;
uint16_t value;
} output_config_t;
static const output_config_t rgOutputPower[] = {
{5, 0x9330}, //
{4, 0x9324}, //
{3, 0x5a1c}, //
{2, 0x4e18}, //
{1, 0x4214}, //
{0, 0x3161}, //
{-3, 0x2558}, //
{-6, 0x1d52}, //
{-9, 0x194e}, //
{-12, 0x144b}, //
{-15, 0x0ccb}, //
{-18, 0x0cc9}, //
{-21, 0x0cc7}, //
};
#define OUTPUT_CONFIG_COUNT (sizeof(rgOutputPower) / sizeof(rgOutputPower[0]))
/* Max and Min Output Power in dBm */
#define OUTPUT_POWER_MIN (rgOutputPower[OUTPUT_CONFIG_COUNT - 1].dbm)
#define OUTPUT_POWER_MAX (rgOutputPower[0].dbm)
#define OUTPUT_POWER_UNKNOWN 0xFFFF
/**
* return value used when searching the source match array
*/
#define CC2650_SRC_MATCH_NONE 0xFF
/**
* number of extended addresses used for source matching
*/
#define CC2650_EXTADD_SRC_MATCH_NUM 10
/**
* structure for source matching extended addresses
*/
typedef struct __attribute__((aligned(4))) ext_src_match_data
{
uint32_t srcMatchEn[((CC2650_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC2650_EXTADD_SRC_MATCH_NUM + 31) / 32)];
uint64_t extAddrEnt[CC2650_EXTADD_SRC_MATCH_NUM];
} ext_src_match_data_t;
/**
* number of short addresses used for source matching
*/
#define CC2650_SHORTADD_SRC_MATCH_NUM 10
/**
* structure for source matching short addresses
*/
typedef struct __attribute__((aligned(4))) short_src_match_data
{
uint32_t srcMatchEn[((CC2650_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
uint32_t srcPendEn[((CC2650_SHORTADD_SRC_MATCH_NUM + 31) / 32)];
rfc_shortAddrEntry_t extAddrEnt[CC2650_SHORTADD_SRC_MATCH_NUM];
} short_src_match_data_t;
/**
* size of length field in receive struct
*
* defined in Table 23-10 of the cc26xx TRM
*/
#define DATA_ENTRY_LENSZ_BYTE 1
/**
* address type for @ref rfCoreModifySourceMatchEntry()
*/
typedef enum cc2650_address
{
SHORT_ADDRESS = 1,
EXT_ADDRESS = 0,
} cc2650_address_t;
/**
* This enum represents the state of a radio.
* Initially, a radio is in the Disabled state.
*
* The following are valid radio state transitions for the cc2650:
*
* (Radio ON)
* +----------+ Enable() +-------+ Receive() +---------+ Transmit() +----------+
* | |----------->| |------------->| |--------------->| |
* | Disabled | | Sleep | | Receive | | Transmit |
* | |<-----------| |<-------------| |<---------------| |
* +----------+ Disable() | | Sleep() | | AckFrame RX or +----------+
* | | (Radio OFF) +---------+ sTxCmdChainDone == true
* | |
* | | EnergyScan() +--------+
* | |------------->| |
* | | | EdScan |
* | |<-------------| |
* | | signal ED | |
* +-------+ scan done +--------+
*
* These states slightly differ from the states in \ref include/platform/radio.h.
* The additional states the phy can be in are due to the asynchronous nature
* of the CM0 radio core.
*
* | state | description |
* |------------------|----------------------------------------------------|
* | Disabled | The rfcore powerdomain is off and the RFCPE is off |
* | Sleep | The RFCORE PD is on, and the RFCPE is in IEEE mode |
* | Receive | The RFCPE is running a CMD_IEEE_RX |
* | Transmit | The RFCPE is running a transmit command string |
* | TransmitComplete | The transmit command string has completed |
* | EdScan | The RFCPE is running a CMD_IEEE_ED_SCAN |
*
* \note The RAT start and Radio Setup commands may be moved to the Receive()
* and EnergyScan() transitions in the future.
*/
typedef enum cc2650_PhyState
{
cc2650_stateDisabled = 0,
cc2650_stateSleep,
cc2650_stateReceive,
cc2650_stateEdScan,
cc2650_stateTransmit,
} cc2650_PhyState;
#endif /* CC2650_RADIO_H_ */
examples/platforms/cc2650/cc2650_startup.c
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Include the standard startup files for the specified toolchain
* startup code is in 'third_party/ti'
*/
#if defined(__GNUC__)
#include <startup_files/startup_gcc.c>
#elif defined(__TI_ARM__)
#include <startup_files/startup_ccs.c>
#else
#error "Unknown compiler"
#endif
examples/platforms/cc2650/crypto/aes_alt.c
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "aes_alt.h"
#include "mbedtls/aes.h"
#ifdef MBEDTLS_AES_ALT
#include <driverlib/crypto.h>
#include <driverlib/prcm.h>
#include <string.h>
#include <utils/code_utils.h>
#define CC2650_AES_KEY_UNUSED (-1)
#define CC2650_AES_CTX_MAGIC (0x7E)
/**
* bitmap of which key stores are currently used
*/
static uint8_t sUsedKeys = 0;
/**
* number of active contexts, used for power on/off of the crypto core
*/
static unsigned int sRefNum = 0;
void mbedtls_aes_init(mbedtls_aes_context *ctx)
{
if (sRefNum++ == 0)
{
/* enable the crypto core */
/* The TRNG should already be running before we ever ask the AES core
* to do anything, if there is any scenario that the TRNG powers off
* the peripheral power domain use this code to repower it
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON);
*/
PRCMPeripheralRunEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
ctx->magic = CC2650_AES_CTX_MAGIC;
ctx->key_idx = CC2650_AES_KEY_UNUSED;
}
void mbedtls_aes_free(mbedtls_aes_context *ctx)
{
otEXPECT(ctx->magic == CC2650_AES_CTX_MAGIC);
if (ctx->key_idx != CC2650_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
if (--sRefNum == 0)
{
/* disable the crypto core */
/* The TRNG core needs the peripheral power domain powered on to
* function. if there is a situation where the power domain must be
* powered off, use this code to do so.
PRCMPowerDomainOff(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_OFF);
*/
PRCMPeripheralRunDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_CRYPTO);
PRCMLoadSet();
while (!PRCMLoadGet())
;
}
memset((void *)ctx, 0x00, sizeof(ctx));
exit:
return;
}
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC2650_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC2650_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits)
{
unsigned char key_idx;
int retval = 0;
otEXPECT_ACTION(ctx->magic == CC2650_AES_CTX_MAGIC, retval = -1);
if (ctx->key_idx != CC2650_AES_KEY_UNUSED)
{
sUsedKeys &= ~(1 << ctx->key_idx);
}
/* our hardware only supports 128 bit keys */
otEXPECT_ACTION(keybits == 128u, retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
for (key_idx = 0; ((sUsedKeys >> key_idx) & 0x01) != 0 && key_idx < 8; key_idx++)
;
/* we have no more room for this key */
otEXPECT_ACTION(key_idx < 8, retval = -2);
otEXPECT_ACTION(CRYPTOAesLoadKey((uint32_t *)key, key_idx) == AES_SUCCESS,
retval = MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
sUsedKeys |= (1 << key_idx);
ctx->key_idx = key_idx;
exit:
return retval;
}
/**
* \brief AES-ECB block encryption/decryption
*
* \param ctx AES context
* \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
* \param input 16-byte input block
* \param output 16-byte output block
*
* \return 0 if successful
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16])
{
int retval = -1;
retval = CRYPTOAesEcb((uint32_t *)input, (uint32_t *)output, ctx->key_idx, mode == MBEDTLS_AES_ENCRYPT, false);
otEXPECT(retval == AES_SUCCESS);
while ((retval = CRYPTOAesEcbStatus()) == AES_DMA_BSY)
;
CRYPTOAesEcbFinish();
exit:
return retval;
}
#endif /* MBEDTLS_AES_ALT */
examples/platforms/cc2650/crypto/aes_alt.h
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef MBEDTLS_AES_ALT_H
#define MBEDTLS_AES_ALT_H
#ifndef MBEDTLS_CONFIG_FILE
#include "cc2650-mbedtls-config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#ifdef MBEDTLS_AES_ALT
#ifdef __cplusplus
extern "C" {
#endif
typedef struct
{
uint8_t magic;
signed char key_idx;
} mbedtls_aes_context;
/**
* @brief Initialize AES context
*
* @param [in,out] ctx AES context to be initialized
*/
void mbedtls_aes_init(mbedtls_aes_context *ctx);
/**
* @brief Clear AES context
*
* \param ctx AES context to be cleared
*/
void mbedtls_aes_free(mbedtls_aes_context *ctx);
/**
* \brief AES key schedule (encryption)
*
* \param ctx AES context to be initialized
* \param key encryption key
* \param keybits must be 128, 192 or 256
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
*/
int mbedtls_aes_setkey_enc(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES key schedule (decryption)
*
* \param ctx AES context to be initialized
* \param key decryption key
* \param keybits must be 128, 192 or 256
*
* \return 0 if successful, or MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
*/
int mbedtls_aes_setkey_dec(mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits);
/**
* \brief AES-ECB block encryption/decryption
*
* \param ctx AES context
* \param mode MBEDTLS_AES_ENCRYPT or MBEDTLS_AES_DECRYPT
* \param input 16-byte input block
* \param output 16-byte output block
*
* \return 0 if successful
*/
int mbedtls_aes_crypt_ecb(mbedtls_aes_context *ctx, int mode, const unsigned char input[16], unsigned char output[16]);
#ifdef __cplusplus
}
#endif
#endif /* MBEDTLS_AES_ALT */
#endif /* MBEDTLS_AES_ALT_H */
examples/platforms/cc2650/crypto/cc2650-mbedtls-config.h
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/*
* Copyright (c) 2018, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef CC2650_MBEDTLS_CONFIG_H
#define CC2650_MBEDTLS_CONFIG_H
#define MBEDTLS_AES_ALT
#define MBEDTLS_SHA256_ALT
#define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY
#endif // CC2650_MBEDTLS_CONFIG_H
examples/platforms/cc2650/crypto/sha256_alt.c
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/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "sha256_alt.h"
#ifdef MBEDTLS_SHA256_ALT
#include <string.h>
/**
* documented in sha256_alt.h
*/
void mbedtls_sha256_init(mbedtls_sha256_context *ctx)
{
memset((void *)ctx, 0x00, sizeof(ctx));
}
/**
* documented in sha256_alt.h
*/
void mbedtls_sha256_free(mbedtls_sha256_context *ctx)
{
memset((void *)ctx, 0x00, sizeof(ctx));
}
/**
* documented in sha256_alt.h
*/
void mbedtls_sha256_clone(mbedtls_sha256_context *dst, const mbedtls_sha256_context *src)
{
*dst = *src;
}
/**
* documented in sha256_alt.h
*/
int mbedtls_sha256_starts_ret(mbedtls_sha256_context *ctx, int is224)
{
SHA256_initialize(ctx);
if (is224 != 0)
{
/* SHA-224 */
ctx->state[0] = 0xC1059ED8;
ctx->state[1] = 0x367CD507;
ctx->state[2] = 0x3070DD17;
ctx->state[3] = 0xF70E5939;
ctx->state[4] = 0xFFC00B31;
ctx->state[5] = 0x68581511;
ctx->state[6] = 0x64F98FA7;
ctx->state[7] = 0xBEFA4FA4;
}
return 0;
}
/**
* documented in sha256_alt.h
*/
int mbedtls_sha256_update_ret(mbedtls_sha256_context *ctx, const unsigned char *input, size_t ilen)
{
SHA256_execute(ctx, (uint8_t *)input, (uint32_t)ilen);
return 0;
}
char *workaround_cc2650_rom;
/**
* documented in sha256_alt.h
*/
int mbedtls_sha256_finish_ret(mbedtls_sha256_context *ctx, unsigned char output[32])
{
/* workaround for error in copy subroutine of SHA256 ROM implementation.
* Allocate an extra 64 bytes on the stack to make sure we have buffer
* room. This could be optomized out if you never call this function with
* a call stack shorter than 16 words, approx. 8 stack frames.
*
* The simple description is this:
* If the stack pointer is within 64bytes of the end of RAM
* the bug exposes it self.
* If the stack pointer is more then 64bytes from end of RAM
* There is no bug...
* Solution:
* Make a 64byte buffer on the stack..
* And force the compiler to think it requires this buffer.
*/
char buffer[64];
workaround_cc2650_rom = &buffer[0];
SHA256_output(ctx, (uint8_t *)output);
return 0;
}
/**
* documented in sha256_alt.h
*/
int mbedtls_internal_sha256_process(mbedtls_sha256_context *ctx, const unsigned char data[64])
{
return SHA256_execute(ctx, (uint8_t *)data, sizeof(unsigned char) * 64);
}
#endif /* MBEDTLS_SHA256_ALT */
examples/platforms/cc2650/crypto/sha256_alt.h
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@@ -1,57 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef MBEDTLS_SHA256_ALT_H
#define MBEDTLS_SHA256_ALT_H
#ifndef MBEDTLS_CONFIG_FILE
#include "cc2650-mbedtls-config.h"
#else
#include MBEDTLS_CONFIG_FILE
#endif
#ifdef MBEDTLS_SHA256_ALT
#include "driverlib/rom_crypto.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief translating the mbedtls SHA256 workspace to the cc2650 SHA256 workspace.
*/
typedef SHA256_memory_t mbedtls_sha256_context;
#ifdef __cplusplus
}
#endif
#endif /* MBEDTLS_SHA256_ALT */
#endif /* MBEDTLS_SHA256_ALT_H */
examples/platforms/cc2650/cxx_helpers.c
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@@ -1,54 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Helper functions for running c++ without the standard library
*/
__extension__ typedef int __guard __attribute__((mode(__DI__)));
int __cxa_guard_acquire(__guard *g)
{
return !*(char *)(g);
}
void __cxa_guard_release(__guard *g)
{
*(char *)g = 1;
}
void __cxa_guard_abort(__guard *g)
{
(void)g;
}
void __cxa_pure_virtual(void)
{
while (1)
;
}
examples/platforms/cc2650/diag.c
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@@ -1,79 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "openthread-core-config.h"
#include <openthread/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <openthread/platform/diag.h>
#if OPENTHREAD_CONFIG_DIAG_ENABLE
#include "platform-cc2650.h"
/**
* Diagnostics mode variables.
*
*/
static bool sDiagMode = false;
void otPlatDiagModeSet(bool aMode)
{
sDiagMode = aMode;
}
bool otPlatDiagModeGet()
{
return sDiagMode;
}
void otPlatDiagChannelSet(uint8_t aChannel)
{
OT_UNUSED_VARIABLE(aChannel);
}
void otPlatDiagTxPowerSet(int8_t aTxPower)
{
OT_UNUSED_VARIABLE(aTxPower);
}
void otPlatDiagRadioReceived(otInstance *aInstance, otRadioFrame *aFrame, otError aError)
{
OT_UNUSED_VARIABLE(aInstance);
OT_UNUSED_VARIABLE(aFrame);
OT_UNUSED_VARIABLE(aError);
}
void otPlatDiagAlarmCallback(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
}
#endif // OPENTHREAD_CONFIG_DIAG_ENABLE
examples/platforms/cc2650/entropy.c
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/*
* Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* This file implements an entropy source based on TRNG.
*
*/
#include <openthread/platform/entropy.h>
#include <utils/code_utils.h>
#include <driverlib/prcm.h>
#include <driverlib/trng.h>
#include <mbedtls/entropy_poll.h>
enum
{
CC2650_TRNG_MIN_SAMPLES_PER_CYCLE = (1 << 6),
CC2650_TRNG_MAX_SAMPLES_PER_CYCLE = (1 << 24),
CC2650_TRNG_CLOCKS_PER_SAMPLE = 0,
};
/**
* \note if more than 32 bits of entropy are needed, the TRNG core produces
* 64 bytes of random data, we just ignore the upper 32 bytes
*/
/**
* Function documented in platform-cc2650.h
*/
void cc2650RandomInit(void)
{
PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON)
;
PRCMPeripheralRunEnable(PRCM_PERIPH_TRNG);
PRCMPeripheralSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMPeripheralDeepSleepEnable(PRCM_DOMAIN_PERIPH);
PRCMLoadSet();
TRNGConfigure(CC2650_TRNG_MIN_SAMPLES_PER_CYCLE, CC2650_TRNG_MAX_SAMPLES_PER_CYCLE, CC2650_TRNG_CLOCKS_PER_SAMPLE);
TRNGEnable();
}
/**
* Fill an arbitrary area with random data
*
* @param [out] aOutput area to place the random data
* @param [in] aLen size of the area to place random data
* @param [out] oLen how much of the output was written to
*
* @return indication of error
* @retval 0 no error occured
*/
static int TRNGPoll(unsigned char *aOutput, size_t aLen)
{
size_t length = 0;
union
{
uint32_t u32[2];
uint8_t u8[8];
} buffer;
while (length < aLen)
{
if (length % 8 == 0)
{
/* we've run to the end of the buffer */
while (!(TRNGStatusGet() & TRNG_NUMBER_READY))
;
/*
* don't use TRNGNumberGet here because it will tell the TRNG to
* refil the entropy pool, instad we do it ourself.
*/
buffer.u32[0] = HWREG(TRNG_BASE + TRNG_O_OUT0);
buffer.u32[1] = HWREG(TRNG_BASE + TRNG_O_OUT1);
HWREG(TRNG_BASE + TRNG_O_IRQFLAGCLR) = 0x1;
}
aOutput[length] = buffer.u8[length % 8];
length++;
}
return 0;
}
/**
* Function documented in platform/entropy.h
*/
otError otPlatEntropyGet(uint8_t *aOutput, uint16_t aOutputLength)
{
otError error = OT_ERROR_NONE;
size_t length = aOutputLength;
otEXPECT_ACTION(aOutput, error = OT_ERROR_INVALID_ARGS);
otEXPECT_ACTION(TRNGPoll((unsigned char *)aOutput, length) != 0, error = OT_ERROR_FAILED);
exit:
return error;
}
examples/platforms/cc2650/logging.c
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@@ -1,46 +0,0 @@
/*
* Copyright (c) 2016, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file logging.c
* Platform abstraction for the logging
*
*/
#include <openthread-core-config.h>
#include <openthread/config.h>
#include <openthread/platform/logging.h>
#include <openthread/platform/toolchain.h>
#if (OPENTHREAD_CONFIG_LOG_OUTPUT == OPENTHREAD_CONFIG_LOG_OUTPUT_PLATFORM_DEFINED)
OT_TOOL_WEAK void otPlatLog(otLogLevel aLogLevel, otLogRegion aLogRegion, const char *aFormat, ...)
{
OT_UNUSED_VARIABLE(aLogLevel);
OT_UNUSED_VARIABLE(aLogRegion);
OT_UNUSED_VARIABLE(aFormat);
}
#endif
examples/platforms/cc2650/misc.c
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@@ -1,74 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <driverlib/sys_ctrl.h>
#include <openthread/platform/misc.h>
/**
* Function documented in platform/misc.h
*/
void otPlatReset(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
SysCtrlSystemReset();
}
/**
* Function documented in platform/misc.h
*/
otPlatResetReason otPlatGetResetReason(otInstance *aInstance)
{
OT_UNUSED_VARIABLE(aInstance);
switch (SysCtrlResetSourceGet())
{
case RSTSRC_PWR_ON:
return OT_PLAT_RESET_REASON_POWER_ON;
case RSTSRC_PIN_RESET:
return OT_PLAT_RESET_REASON_EXTERNAL;
case RSTSRC_VDDS_LOSS:
case RSTSRC_VDDR_LOSS:
case RSTSRC_CLK_LOSS:
return OT_PLAT_RESET_REASON_CRASH;
case RSTSRC_WARMRESET:
case RSTSRC_SYSRESET:
case RSTSRC_WAKEUP_FROM_SHUTDOWN:
return OT_PLAT_RESET_REASON_SOFTWARE;
default:
return OT_PLAT_RESET_REASON_UNKNOWN;
}
}
void otPlatWakeHost(void)
{
// TODO: implement an operation to wake the host from sleep state.
}
examples/platforms/cc2650/openthread-core-cc2650-config-check.h
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@@ -1,36 +0,0 @@
/*
* Copyright (c) 2019, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC2650_CONFIG_CHECK_H_
#define OPENTHREAD_CORE_CC2650_CONFIG_CHECK_H_
#if OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT
#error "Platform cc2650 doesn't support configuration option: OPENTHREAD_CONFIG_RADIO_915MHZ_OQPSK_SUPPORT"
#endif
#endif /* OPENTHREAD_CORE_CC2650_CONFIG_CHECK_H_ */
examples/platforms/cc2650/openthread-core-cc2650-config.h
-63
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@@ -1,63 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef OPENTHREAD_CORE_CC2650_CONFIG_H_
#define OPENTHREAD_CORE_CC2650_CONFIG_H_
/**
* @def OPENTHREAD_CONFIG_PLATFORM_INFO
*
* The platform-specific string to insert into the OpenThread version string.
*
*/
#define OPENTHREAD_CONFIG_PLATFORM_INFO "CC2650"
/**
* @def OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
*
* The number of message buffers in buffer pool
*/
#define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 32
/**
* @def OPENTHREAD_CONFIG_NCP_HDLC_ENABLE
*
* Define to 1 to enable NCP HDLC support.
*
*/
#define OPENTHREAD_CONFIG_NCP_HDLC_ENABLE 1
/**
* @def OPENTHREAD_SETTINGS_RAM
*
* Define as 1 to enable saving the settings in RAM instead of flash.
*
*/
#define OPENTHREAD_SETTINGS_RAM 1
#endif /* OPENTHREAD_CORE_CC2650_CONFIG_H_ */
examples/platforms/cc2650/platform-cc2650.h
-84
View File
@@ -1,84 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef PLATFORM_H_
#define PLATFORM_H_
#include <openthread-core-config.h>
#include <stdint.h>
#include <openthread/config.h>
#include <openthread/instance.h>
#ifdef __cplusplus
extern "C" {
#endif
// Global OpenThread instance structure
extern otInstance *sInstance;
/**
* This method initializes the alarm service used by OpenThread.
*
*/
void cc2650AlarmInit(void);
/**
* This method performs alarm driver processing.
*
*/
void cc2650AlarmProcess(otInstance *aInstance);
/**
* This method initializes the radio service used by OpenThread.
*
*/
void cc2650RadioInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc2650RadioProcess(otInstance *aInstance);
/**
* This method initializes the random number service used by OpenThread.
*
*/
void cc2650RandomInit(void);
/**
* This method performs radio driver processing.
*
*/
void cc2650UartProcess(void);
#ifdef __cplusplus
} // extern "C"
#endif
#endif // PLATFORM_H_
examples/platforms/cc2650/radio.c
-1963
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File diff suppressed because it is too large Load Diff
examples/platforms/cc2650/system.c
-74
View File
@@ -1,74 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "platform-cc2650.h"
#include <stdio.h>
#include "inc/hw_ccfg_simple_struct.h"
extern const ccfg_t __ccfg;
void *dummy_ccfg_ref = ((void *)(&(__ccfg)));
/**
* Function documented in platform-cc2650.h
*/
void otSysInit(int argc, char *argv[])
{
OT_UNUSED_VARIABLE(argc);
OT_UNUSED_VARIABLE(argv);
while (dummy_ccfg_ref == NULL)
{
/*
* This provides a code reference to the customer configuration
* area of the flash, otherwise the data is skipped by the
* linker and not put into the final flash image.
*/
}
cc2650AlarmInit();
cc2650RandomInit();
cc2650RadioInit();
}
bool otSysPseudoResetWasRequested(void)
{
return false;
}
/**
* Function documented in platform-cc2650.h
*/
void otSysProcessDrivers(otInstance *aInstance)
{
// should sleep and wait for interrupts here
cc2650UartProcess();
cc2650RadioProcess(aInstance);
cc2650AlarmProcess(aInstance);
}
examples/platforms/cc2650/uart.c
-205
View File
@@ -1,205 +0,0 @@
/*
* Copyright (c) 2017, The OpenThread Authors.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holder nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <stddef.h>
#include <driverlib/ioc.h>
#include <driverlib/prcm.h>
#include <driverlib/sys_ctrl.h>
#include <driverlib/uart.h>
#include <utils/code_utils.h>
#include "utils/uart.h"
/**
* \note this will configure the uart for 115200 baud 8-N-1, no HW flow control
* RX pin IOID_2 TX pin IOID_3
*
* \note make sure that data being sent is not in a volatile area
*/
enum
{
CC2650_RECV_CIRC_BUFF_SIZE = 256,
};
static uint8_t const *sSendBuffer = NULL;
static uint16_t sSendLen = 0;
static uint8_t sReceiveBuffer[CC2650_RECV_CIRC_BUFF_SIZE];
static uint16_t sReceiveHeadIdx = 0;
static uint16_t sReceiveTailIdx = 0;
void UART0_intHandler(void);
/**
* Function documented in utils/uart.h
*/
otError otPlatUartEnable(void)
{
PRCMPowerDomainOn(PRCM_DOMAIN_SERIAL);
while (PRCMPowerDomainStatus(PRCM_DOMAIN_SERIAL) != PRCM_DOMAIN_POWER_ON)
;
PRCMPeripheralRunEnable(PRCM_PERIPH_UART0);
PRCMPeripheralSleepEnable(PRCM_PERIPH_UART0);
PRCMPeripheralDeepSleepEnable(PRCM_PERIPH_UART0);
PRCMLoadSet();
while (!PRCMLoadGet())
;
IOCPinTypeUart(UART0_BASE, IOID_2, IOID_3, IOID_UNUSED, IOID_UNUSED);
UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200,
UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE);
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
UARTIntRegister(UART0_BASE, UART0_intHandler);
UARTEnable(UART0_BASE);
return OT_ERROR_NONE;
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartDisable(void)
{
UARTDisable(UART0_BASE);
UARTIntUnregister(UART0_BASE);
UARTIntDisable(UART0_BASE, UART_INT_RX | UART_INT_RT);
IOCPortConfigureSet(IOID_2, IOC_PORT_GPIO, IOC_STD_INPUT);
IOCPortConfigureSet(IOID_3, IOC_PORT_GPIO, IOC_STD_INPUT);
PRCMPeripheralRunDisable(PRCM_PERIPH_UART0);
PRCMPeripheralSleepDisable(PRCM_PERIPH_UART0);
PRCMPeripheralDeepSleepDisable(PRCM_PERIPH_UART0);
PRCMLoadSet();
/**
* \warn this assumes that there are no other devices being used in the
* serial power domain
*/
PRCMPowerDomainOff(PRCM_DOMAIN_SERIAL);
return OT_ERROR_NONE;
}
/**
* Function documented in utils/uart.h
*/
otError otPlatUartSend(const uint8_t *aBuf, uint16_t aBufLength)
{
otError error = OT_ERROR_NONE;
otEXPECT_ACTION(sSendBuffer == NULL, error = OT_ERROR_BUSY);
sSendBuffer = aBuf;
sSendLen = aBufLength;
exit:
return error;
}
/**
* @brief process the receive side of the buffers
*/
static void processReceive(void)
{
while (sReceiveHeadIdx != sReceiveTailIdx)
{
uint16_t tailIdx;
if (sReceiveHeadIdx < sReceiveTailIdx)
{
tailIdx = sReceiveTailIdx;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = tailIdx;
}
else
{
tailIdx = CC2650_RECV_CIRC_BUFF_SIZE;
otPlatUartReceived(&(sReceiveBuffer[sReceiveHeadIdx]), tailIdx - sReceiveHeadIdx);
sReceiveHeadIdx = 0;
}
}
}
otError otPlatUartFlush(void)
{
otEXPECT(sSendBuffer != NULL);
for (; sSendLen > 0; sSendLen--)
{
UARTCharPut(UART0_BASE, *sSendBuffer);
sSendBuffer++;
}
sSendBuffer = NULL;
sSendLen = 0;
return OT_ERROR_NONE;
exit:
return OT_ERROR_INVALID_STATE;
}
/**
* @brief process the transmit side of the buffers
*/
static void processTransmit(void)
{
otPlatUartFlush();
otPlatUartSendDone();
}
/**
* Function documented in platform-cc2650.h
*/
void cc2650UartProcess(void)
{
processReceive();
processTransmit();
}
/**
* @brief the interrupt handler for the uart interrupt vector
*/
void UART0_intHandler(void)
{
while (UARTCharsAvail(UART0_BASE))
{
uint32_t c = UARTCharGet(UART0_BASE);
/* XXX process error flags for this character ?? */
sReceiveBuffer[sReceiveTailIdx] = (uint8_t)c;
sReceiveTailIdx++;
if (sReceiveTailIdx >= CC2650_RECV_CIRC_BUFF_SIZE)
{
sReceiveTailIdx = 0;
}
}
}
script/check-arm-build-autotools
-7
View File
@@ -51,12 +51,6 @@ build_cc2538()
make -f examples/Makefile-cc2538 "${options[@]}"
}
build_cc2650()
{
reset_source
make -f examples/Makefile-cc2650
}
build_jn5189()
{
local options=(
@@ -213,7 +207,6 @@ main()
if [[ $# == 0 ]]; then
build_cc2538
build_cc2650
build_jn5189
build_k32w061
build_nrf52811
script/check-arm-build-cmake
-7
View File
@@ -59,12 +59,6 @@ build_cc2538()
"$(dirname "$0")"/cmake-build cc2538 "${OT_COMMON_OPTIONS[@]}" "${OT_BASIC_CHECK_OPTIONS[@]}" "${options[@]}"
}
build_cc2650()
{
reset_source
"$(dirname "$0")"/cmake-build cc2650 "${OT_COMMON_OPTIONS[@]}"
}
build_nrf52811()
{
reset_source
@@ -89,7 +83,6 @@ main()
if [[ $# == 0 ]]; then
build_cc2538
build_cc2650
# UART transport
build_nrf52840 UART_trans
# USB transport with bootloader e.g. to support PCA10059 dongle
script/cmake-build
+1 -5
View File
@@ -79,7 +79,7 @@ set -euxo pipefail
OT_CMAKE_NINJA_TARGET=${OT_CMAKE_NINJA_TARGET:-}
readonly OT_SRCDIR="$(pwd)"
readonly OT_PLATFORMS=(cc2538 cc2650 efr32mg1 efr32mg12 efr32mg13 efr32mg21 nrf52811 nrf52833 nrf52840 simulation posix)
readonly OT_PLATFORMS=(cc2538 efr32mg1 efr32mg12 efr32mg13 efr32mg21 nrf52811 nrf52833 nrf52840 simulation posix)
readonly OT_NRF528XX_BUILD_TYPES=(UART_trans USB_trans_bl SPI_trans_NCP soft_crypto soft_crypto_threading)
readonly OT_POSIX_SIM_COMMON_OPTIONS=(
"-DOT_BORDER_AGENT=ON"
@@ -228,10 +228,6 @@ main()
local_options=("-DOT_LINK_RAW=ON")
options+=("${OT_POSIX_SIM_COMMON_OPTIONS[@]}" "${local_options[@]}")
;;
cc2650)
OT_CMAKE_NINJA_TARGET=("ot-cli-mtd" "ot-ncp-mtd")
options+=("-DCMAKE_TOOLCHAIN_FILE=examples/platforms/${platform}/arm-none-eabi.cmake" "-DCMAKE_BUILD_TYPE=MinSizeRel")
;;
cc2538)
options+=("-DCMAKE_TOOLCHAIN_FILE=examples/platforms/${platform}/arm-none-eabi.cmake" "-DCMAKE_BUILD_TYPE=MinSizeRel")
;;
third_party/CMakeLists.txt
Vendored
+1 -3
View File
@@ -30,9 +30,7 @@ if(NOT OT_EXTERNAL_MBEDTLS)
add_subdirectory(mbedtls)
endif()
if(OT_PLATFORM MATCHES "cc*")
add_subdirectory(ti)
elseif(OT_PLATFORM MATCHES "^nrf*")
if(OT_PLATFORM MATCHES "^nrf*")
add_subdirectory(jlink)
add_subdirectory(NordicSemiconductor)
elseif(OT_PLATFORM MATCHES "^efr*")
third_party/ti/CMakeLists.txt
Vendored
-37
View File
@@ -1,37 +0,0 @@
#
# Copyright (c) 2020, The OpenThread Authors.
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the copyright holder nor the
# names of its contributors may be used to endorse or promote products
# derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if(OT_PLATFORM STREQUAL "cc2650")
add_library(cc26x0-driver INTERFACE)
target_link_libraries(cc26x0-driver
INTERFACE
${CMAKE_CURRENT_SOURCE_DIR}/devices/cc26x0/driverlib/bin/gcc/driverlib.a
-T${CMAKE_CURRENT_SOURCE_DIR}/devices/cc26x0/linker_files/cc26x0f128.lds
)
endif()
third_party/ti/README.md
Vendored
-40
View File
@@ -1,40 +0,0 @@
#CC26XXware
## URL
http://www.ti.com/tool/simplelink-cc13x2-26x2-sdk
## Version
`driverlib_cc13xx_cc26xx_3_05_06_18894`
## License
BSD-3-Clause
## License File
[Export Manifest] manifest_driverlib_cc13xx_cc26xx_3_xx_xx.html
## Documentation
This version of cc26xxware is copied from the [SimpleLink CC26x2 Software
Development Kit](http://www.ti.com/tool/simplelink-cc13x2-26x2-sdk). Modifications
were made to enable the OpenThread build.
Also see: release_notes_driverlib_cc13xx_cc26xx.html
| file | change |
|------------------------------------------------------|-------------------------------------------------------------------------|
| `devices/cc26x0/driverlib/bin/gcc/driverlib.a` | Renamed from `driverlib.lib` to allow Automake to recognize the library |
| `devices/cc26x0/linker_files/cc26x0f128.lds` | `end` symbol added for GCC stdlib and C++ init array placement |
| `devices/cc26x0/startup_files/startup_gcc.c` | C++ constructor calls added to `ResetHandler` |
Documentation can be found within the [SimpleLink CC26x2 Software Development
Kit](http://www.ti.com/tool/simplelink-cc13x2-26x2-sdk).
## Description
CC26XXware is the board support library for Texas Instruments' CC26XX line of
connected MCUs for developers to easily leverage the hardware capabilities of
those platforms. Texas Instruments Incorporated recommends TI-RTOS and its
associated drivers for future development.
third_party/ti/devices/DeviceFamily.h
Vendored
-210
View File
@@ -1,210 +0,0 @@
/*
* Copyright (c) 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* * Neither the name of Texas Instruments Incorporated nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** ============================================================================
* @file DeviceFamily.h
*
* @brief Infrastructure to select correct driverlib path and identify devices
*
* This module enables the selection of the correct driverlib path for the current
* device. It also facilitates the use of per-device conditional compilation
* to enable minor variations in drivers between devices.
*
* In order to use this functionality, DeviceFamily_XYZ must be defined as one of
* the supported values. The DeviceFamily_ID and DeviceFamily_DIRECTORY defines
* are set based on DeviceFamily_XYZ.
*/
#ifndef ti_devices_DeviceFamily__include
#define ti_devices_DeviceFamily__include
#ifdef __cplusplus
extern "C" {
#endif
/*
* DeviceFamily_ID_XYZ values.
*
* DeviceFamily_ID may be used in the preprocessor for conditional compilation.
* DeviceFamily_ID is set to one of these values based on the top level
* DeviceFamily_XYZ define.
*/
#define DeviceFamily_ID_CC13X0 1
#define DeviceFamily_ID_CC26X0 2
#define DeviceFamily_ID_CC26X0R2 3
#define DeviceFamily_ID_CC13X2_V1 4
#define DeviceFamily_ID_CC13X2_V2 5
#define DeviceFamily_ID_CC13X2 DeviceFamily_ID_CC13X2_V1
#define DeviceFamily_ID_CC26X2_V1 6
#define DeviceFamily_ID_CC26X2_V2 7
#define DeviceFamily_ID_CC26X2 DeviceFamily_ID_CC26X2_V1
#define DeviceFamily_ID_CC3200 8
#define DeviceFamily_ID_CC3220 9
#define DeviceFamily_ID_MSP432P401x 10
#define DeviceFamily_ID_MSP432P4x1xI 11
#define DeviceFamily_ID_MSP432P4x1xT 12
#define DeviceFamily_ID_MSP432E401Y 13
#define DeviceFamily_ID_MSP432E411Y 14
/*
* DeviceFamily_PARENT_XYZ values.
*
* DeviceFamily_PARENT may be used in the preprocessor for conditional
* compilation. DeviceFamily_PARENT is set to one of these values based
* on the top-level DeviceFamily_XYZ define.
*/
#define DeviceFamily_PARENT_CC13X0_CC26X0 1
#define DeviceFamily_PARENT_CC13X2_CC26X2 2
#define DeviceFamily_PARENT_MSP432P401R 3
#define DeviceFamily_PARENT_MSP432P4111 4
/*
* Lookup table that sets DeviceFamily_ID, DeviceFamily_DIRECTORY, and
* DeviceFamily_PARENT based on the DeviceFamily_XYZ define.
* If DeviceFamily_XYZ is undefined, a compiler error is thrown. If
* multiple DeviceFamily_XYZ are defined, the first one encountered is used.
*/
#if defined(DeviceFamily_CC13X0)
#define DeviceFamily_ID DeviceFamily_ID_CC13X0
#define DeviceFamily_DIRECTORY cc13x0
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0
#elif defined(DeviceFamily_CC13X2)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC13X2_V1)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2_V1
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC13X2_V2)
#define DeviceFamily_ID DeviceFamily_ID_CC13X2_V2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v2
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC26X0)
#define DeviceFamily_ID DeviceFamily_ID_CC26X0
#define DeviceFamily_DIRECTORY cc26x0
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0
#elif defined(DeviceFamily_CC26X0R2)
#define DeviceFamily_ID DeviceFamily_ID_CC26X0R2
#define DeviceFamily_DIRECTORY cc26x0r2
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X0_CC26X0
#elif defined(DeviceFamily_CC26X2)
#define DeviceFamily_ID DeviceFamily_ID_CC26X2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC26X2_V1)
#define DeviceFamily_ID DeviceFamily_ID_CC26X2_V1
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v1
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC26X2_V2)
#define DeviceFamily_ID DeviceFamily_ID_CC26X2_V2
#define DeviceFamily_DIRECTORY cc13x2_cc26x2_v2
#define DeviceFamily_PARENT DeviceFamily_PARENT_CC13X2_CC26X2
#elif defined(DeviceFamily_CC3200)
#define DeviceFamily_ID DeviceFamily_ID_CC3200
#define DeviceFamily_DIRECTORY cc32xx
#elif defined(DeviceFamily_CC3220)
#define DeviceFamily_ID DeviceFamily_ID_CC3220
#define DeviceFamily_DIRECTORY cc32xx
#elif defined(DeviceFamily_MSP432P401x) || defined(__MSP432P401R__)
#define DeviceFamily_ID DeviceFamily_ID_MSP432P401x
#define DeviceFamily_DIRECTORY msp432p4xx
#define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P401R
#if !defined(__MSP432P401R__)
#define __MSP432P401R__
#endif
#elif defined(DeviceFamily_MSP432P4x1xI)
#define DeviceFamily_ID DeviceFamily_ID_MSP432P4x1xI
#define DeviceFamily_DIRECTORY msp432p4xx
#define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P4111
#if !defined(__MSP432P4111__)
#define __MSP432P4111__
#endif
#elif defined(DeviceFamily_MSP432P4x1xT)
#define DeviceFamily_ID DeviceFamily_ID_MSP432P4x1xT
#define DeviceFamily_DIRECTORY msp432p4xx
#define DeviceFamily_PARENT DeviceFamily_PARENT_MSP432P4111
#if !defined(__MSP432P4111__)
#define __MSP432P4111__
#endif
#elif defined(DeviceFamily_MSP432E401Y)
#define DeviceFamily_ID DeviceFamily_ID_MSP432E401Y
#define DeviceFamily_DIRECTORY msp432e4
#if !defined(__MSP432E401Y__)
#define __MSP432E401Y__
#endif
#elif defined(DeviceFamily_MSP432E411Y)
#define DeviceFamily_ID DeviceFamily_ID_MSP432E411Y
#define DeviceFamily_DIRECTORY msp432e4
#if !defined(__MSP432E411Y__)
#define __MSP432E411Y__
#endif
#else
#error "DeviceFamily_XYZ undefined. You must defined DeviceFamily_XYZ!"
#endif
/*!
* @brief Macro to include correct driverlib path.
*
* @pre DeviceFamily_XYZ which sets DeviceFamily_DIRECTORY must be defined
* first.
*
* @param x A token containing the path of the file to include based on
* the root device folder. The preceding forward slash must be
* omitted. For example:
* - #include DeviceFamily_constructPath(inc/hw_memmap.h)
* - #include DeviceFamily_constructPath(driverlib/ssi.h)
*
* @return Returns an include path.
*
*/
#define DeviceFamily_constructPath(x) <ti/devices/DeviceFamily_DIRECTORY/x>
#ifdef __cplusplus
}
#endif
#endif /* ti_devices_DeviceFamily__include */
third_party/ti/devices/cc26x0/driverlib/adi.c
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/******************************************************************************
* Filename: adi.c
* Revised: 2016-11-17 16:39:28 +0100 (Thu, 17 Nov 2016)
* Revision: 47706
*
* Description: Driver for the ADI interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_smph.h"
#include "adi.h"
#include "cpu.h"
//*****************************************************************************
//
// SafeHapiVoid() and SafeHapiAuxAdiSelect()
// Common wrapper functions for the Hapi functions needing workaround for the
// "bus arbitration" issue.
//
//*****************************************************************************
void SafeHapiVoid( FPTR_VOID_VOID_T fPtr )
{
bool bIrqEnabled = ( ! CPUcpsid() );
while ( ! HWREG( AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 ));
fPtr();
HWREG( AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 ) = 1;
if ( bIrqEnabled ) {
CPUcpsie();
}
}
void SafeHapiAuxAdiSelect( FPTR_VOID_UINT8_T fPtr, uint8_t ut8Signal )
{
bool bIrqEnabled = ( ! CPUcpsid() );
while ( ! HWREG( AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 ));
fPtr( ut8Signal );
HWREG( AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 ) = 1;
if ( bIrqEnabled ) {
CPUcpsie();
}
}
third_party/ti/devices/cc26x0/driverlib/adi.h
Vendored
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@@ -1,861 +0,0 @@
/******************************************************************************
* Filename: adi.h
* Revised: 2016-11-17 16:39:28 +0100 (Thu, 17 Nov 2016)
* Revision: 47706
*
* Description: Defines and prototypes for the ADI master interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup analog_group
//! @{
//! \addtogroup adi_api
//! @{
//
//*****************************************************************************
#ifndef __ADI_H__
#define __ADI_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_uart.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_adi.h"
#include "debug.h"
#include "ddi.h"
//*****************************************************************************
//
// Number of registers in the ADI slave
//
//*****************************************************************************
#define ADI_SLAVE_REGS 16
//*****************************************************************************
//
// Defines that is used to control the ADI slave and master
//
//*****************************************************************************
#define ADI_PROTECT 0x00000080
#define ADI_ACK 0x00000001
#define ADI_SYNC 0x00000000
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
#ifdef DRIVERLIB_DEBUG
//*****************************************************************************
//
//! \internal
//! \brief Checks an ADI base address.
//!
//! This function determines if an ADI port base address is valid.
//!
//! \param ui32Base is the base address of the ADI port.
//!
//! \return Returns \c true if the base address is valid and \c false
//! otherwise
//
//*****************************************************************************
static bool
ADIBaseValid(uint32_t ui32Base)
{
return(ui32Base == ADI2_BASE || ui32Base == ADI3_BASE ||
ui32Base == AUX_ADI4_BASE);
}
#endif
//*****************************************************************************
//
//! \brief Write an 8 bit value to a register in an ADI slave.
//!
//! This function will write a value to a single register in the analog domain.
//! The access to the registers in the analog domain is either 8, 16, or 32 bit
//! aligned. You can only do 16 bit access on registers 0-1 / 2-3, etc. Similarly
//! 32 bit accesses are always performed on register 0-3 / 4-7, etc. Addresses
//! for the registers and values being written to the registers will be
//! truncated according to this access scheme.
//!
//! \note This operation is write only for the specified register. No
//! previous value of the register will be kept (i.e. this is NOT
//! read-modify-write on the register).
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the register to write.
//! \param ui8Val is the 8 bit value to write to the register.
//!
//! \return None
//!
//! \sa ADI16RegWrite(), ADI32RegWrite()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Write the value to the register.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32Reg, ui8Val, 1);
} else {
HWREGB(ui32Base + ui32Reg) = ui8Val;
}
}
//*****************************************************************************
//
//! \brief Write a 16 bit value to 2 registers in the ADI slave.
//!
//! This function will write a value to 2 consecutive registers in the analog
//! domain. The access to the registers in the analog domain is either 8, 16
//! or 32 bit aligned. You can only do 16 bit access on registers 0-1 / 2-3,
//! etc. Similarly 32 bit accesses are always performed on register 0-3 / 4-7,
//! etc. Addresses for the registers and values being written
//! to the registers will be truncated according to this access scheme.
//!
//! \note The byte addressing bit will be ignored, to ensure 16 bit access
//! to the ADI slave.
//!
//! \note This operation is write only for the specified register. No
//! previous value of the register will be kept (i.e. this is NOT
//! read-modify-write on the register).
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the register to write.
//! \param ui16Val is the 16 bit value to write to the register.
//!
//! \return None
//!
//! \sa ADI8RegWrite(), ADI32RegWrite()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16RegWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint16_t ui16Val)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Write the value to the register.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + (ui32Reg & 0xFE), ui16Val, 2);
} else {
HWREGH(ui32Base + (ui32Reg & 0xFE)) = ui16Val;
}
}
//*****************************************************************************
//
//! \brief Write a 32 bit value to 4 registers in the ADI slave.
//!
//! This function will write a value to 4 consecutive registers in the analog
//! domain. The access to the registers in the analog domain is either 8, 16
//! or 32 bit aligned. You can only do 16 bit access on registers 0-1 / 2-3,
//! etc. Similarly 32 bit accesses are always performed on register 0-3 / 4-7,
//! etc. Addresses for the registers and values being written
//! to the registers will be truncated according to this access scheme.
//!
//! \note The byte and half word addressing bits will be ignored, to ensure
//! 32 bit access to the ADI slave.
//!
//! \note This operation is write only for the specified register. No
//! previous value of the register will be kept (i.e. this is NOT
//! read-modify-write on the register).
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the register to write.
//! \param ui32Val is the 32 bit value to write to the register.
//!
//! \return None
//!
//! \sa ADI8RegWrite(), ADI16RegWrite()
//
//*****************************************************************************
__STATIC_INLINE void
ADI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Write the value to the register.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + (ui32Reg & 0xFC), ui32Val, 4);
} else {
HWREG(ui32Base + (ui32Reg & 0xFC)) = ui32Val;
}
}
//*****************************************************************************
//
//! \brief Read the value of an 8 bit register in the ADI slave.
//!
//! This function will read an 8 bit register in the analog domain and return
//! the value as the lower 8 bits of an \c uint32_t. The access to the
//! registers in the analog domain is either 8, 16 or 32 bit aligned. You can
//! only do 16 bit access on registers 0-1 / 2-3, etc. Similarly 32 bit accesses
//! are always performed on register 0-3 / 4-7, etc. Addresses for the
//! registers and values being written to the registers will be truncated
//! according to this access scheme.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the 8 bit register to read.
//!
//! \return Returns the 8 bit value of the analog register in the least
//! significant byte of the \c uint32_t.
//!
//! \sa ADI16RegRead(), ADI32RegRead()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ADI8RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Read the register and return the value.
if (ui32Base==AUX_ADI4_BASE) {
return AuxAdiDdiSafeRead(ui32Base + ui32Reg, 1);
} else {
return(HWREGB(ui32Base + ui32Reg));
}
}
//*****************************************************************************
//
//! \brief Read the value in a 16 bit register.
//!
//! This function will read 2 x 8 bit registers in the analog domain and return
//! the value as the lower 16 bits of an \c uint32_t. The access to the
//! registers in the analog domain is either 8, 16 or 32 bit aligned. You can
//! only do 16 bit access on registers 0-1 / 2-3, etc. Similarly 32 bit accesses
//! are always performed on register 0-3 / 4-7, etc. Addresses for the
//! registers and values being written to the registers will be truncated
//! according to this access scheme.
//!
//! \note The byte addressing bit will be ignored, to ensure 16 bit access
//! to the ADI slave.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the 16 bit register to read.
//!
//! \return Returns the 16 bit value of the 2 analog register in the 2 least
//! significant bytes of the \c uint32_t.
//!
//! \sa ADI8RegRead(), ADI32RegRead()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ADI16RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Read the registers and return the value.
if (ui32Base==AUX_ADI4_BASE) {
return AuxAdiDdiSafeRead(ui32Base + (ui32Reg & 0xFE), 2);
} else {
return(HWREGH(ui32Base + (ui32Reg & 0xFE)));
}
}
//*****************************************************************************
//
//! \brief Read the value in a 32 bit register.
//!
//! This function will read 4 x 8 bit registers in the analog domain and return
//! the value as an \c uint32_t. The access to the registers in the analog
//! domain is either 8, 16 or 32 bit aligned. You can only do 16 bit access on
//! registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always performed on
//! register 0-3 / 4-7, etc. Addresses for the registers and values being
//! written to the registers will be truncated according to this access scheme.
//!
//! \note The byte and half word addressing bits will be ignored, to ensure
//! 32 bit access to the ADI slave.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the 32 bit register to read.
//!
//! \return Returns the 32 bit value of the 4 analog registers.
//!
//! \sa ADI8RegRead(), ADI16RegRead()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ADI32RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Read the registers and return the value.
if (ui32Base==AUX_ADI4_BASE) {
return AuxAdiDdiSafeRead(ui32Base + (ui32Reg & 0xFC), 4);
} else {
return(HWREG(ui32Base + (ui32Reg & 0xFC)));
}
}
//*****************************************************************************
//
//! \brief Set specific bits in a single 8 bit ADI register.
//!
//! This function will set bits in a single register in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in a specific 8 bit register in the
//! ADI slave. Only bits in the selected register are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui8Val is the 8 bit one-hot encoded value specifying which
//! bits to set in the register.
//!
//! \return None
//!
//! \sa ADI16BitsSet(), ADI32BitsSet()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_SET;
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + ui32Reg, ui8Val, 1);
} else {
HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val;
}
}
//*****************************************************************************
//
//! \brief Set specific bits in 2 x 8 bit ADI slave registers.
//!
//! This function will set bits in 2 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in 2 consecutive 8 bit registers in the
//! ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui16Val is the 16 bit one-hot encoded value specifying which
//! bits to set in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsSet(), ADI32BitsSet()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_SET;
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + (ui32Reg & 0xFE), ui16Val, 2);
} else {
HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val;
}
}
//*****************************************************************************
//
//! \brief Set specific bits in 4 x 8 bit ADI slave registers.
//!
//! This function will set bits in 4 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in 4 consecutive 8 bit registers in the
//! ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui32Val is the 32 bit one-hot encoded value specifying which
//! bits to set in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsSet(), ADI16BitsSet()
//
//*****************************************************************************
__STATIC_INLINE void
ADI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_SET;
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + (ui32Reg & 0xFC), ui32Val, 4);
} else {
HWREG(ui32Base + ui32RegOffset + (ui32Reg & 0xFC)) = ui32Val;
}
}
//*****************************************************************************
//
//! \brief Clear specific bits in an 8 bit ADI register.
//!
//! This function will clear bits in a register in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to clear bits in a specific 8 bit register in
//! the ADI slave. Only bits in the selected register are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui8Val is the 8 bit one-hot encoded value specifying which
//! bits to clear in the register.
//!
//! \return None
//!
//! \sa ADI16BitsClear(), ADI32BitsClear()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint8_t ui8Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_CLR;
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + ui32Reg, ui8Val, 1);
} else {
HWREGB(ui32Base + ui32RegOffset + ui32Reg) = ui8Val;
}
}
//*****************************************************************************
//
//! \brief Clear specific bits in two 8 bit ADI register.
//!
//! This function will clear bits in 2 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to clear bits in 2 consecutive 8 bit registers in
//! the ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui16Val is the 16 bit one-hot encoded value specifying which
//! bits to clear in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsClear(), ADI32BitsClear()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_CLR;
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + (ui32Reg & 0xFE), ui16Val, 2);
} else {
HWREGH(ui32Base + ui32RegOffset + (ui32Reg & 0xFE)) = ui16Val;
}
}
//*****************************************************************************
//
//! \brief Clear specific bits in four 8 bit ADI register.
//!
//! This function will clear bits in 4 registers in the analog domain.
//! The access to the registers in the analog domain is either 8, 16 or 32 bit
//! aligned, but arranged in chunks of 32 bits. You can only do 16 bit access
//! on registers 0-1 / 2-3, etc. Similarly 32 bit accesses are always
//! performed on register 0-3 / 4-7 etc. Addresses for the registers and values
//! being written to the registers will be truncated according to this access
//! scheme.
//!
//! \note This operation is write only for the specified register.
//! This function is used to clear bits in 4 consecutive 8 bit registers in
//! the ADI slave. Only bits in the selected registers are affected by the
//! operation.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is ADI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui32Val is the 32 bit one-hot encoded value specifying which
//! bits to clear in the registers.
//!
//! \return None
//!
//! \sa ADI8BitsClear(), ADI16BitsClear()
//
//*****************************************************************************
__STATIC_INLINE void
ADI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_CLR;
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + (ui32Reg & 0xFC), ui32Val, 4);
} else {
HWREG(ui32Base + ui32RegOffset + (ui32Reg & 0xFC)) = ui32Val;
}
}
//*****************************************************************************
//
//! \brief Set a value on any 4 bits inside an 8 bit register in the ADI slave.
//!
//! This function allows halfbyte (4 bit) access to the ADI slave registers.
//! The parameter \c bWriteHigh determines whether to write to the lower
//! or higher part of the 8 bit register.
//!
//! Use this function to write any value in the range 0-3 bits aligned on a
//! half byte boundary. Fx. for writing the value 0b101 to bits 1 to 3 the
//! \c ui8Val = 0xA and the \c ui8Mask = 0xE. Bit 0 will not be affected by
//! the operation, as the corresponding bit is not set in the \c ui8Mask.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the ADI port.
//! \param ui32Reg is the Least Significant Register in the ADI slave that
//! will be affected by the write operation.
//! \param bWriteHigh defines which part of the register to write in.
//! - \c true: Write upper half byte of register.
//! - \c false: Write lower half byte of register.
//! \param ui8Mask is the mask defining which of the 4 bits that should be
//! overwritten. The mask must be defined in the lower half of the 8 bits of
//! the parameter.
//! \param ui8Val is the value to write. The value must be defined in the lower
//! half of the 8 bits of the parameter.
//!
//! \return None
//!
//! \sa ADI8SetValBit(), ADI16SetValBit
//
//*****************************************************************************
__STATIC_INLINE void
ADI4SetValBit(uint32_t ui32Base, uint32_t ui32Reg, bool bWriteHigh,
uint8_t ui8Mask, uint8_t ui8Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
ASSERT(!(ui8Val & 0xF0));
ASSERT(!(ui8Mask & 0xF0));
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_MASK4B + (ui32Reg << 1) + (bWriteHigh ? 1 : 0);
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui8Mask << 4) | ui8Val, 1);
} else {
HWREGB(ui32Base + ui32RegOffset) = (ui8Mask << 4) | ui8Val;
}
}
//*****************************************************************************
//
//! \brief Set a value on any bits inside an 8 bit register in the ADI slave.
//!
//! This function allows byte (8 bit) access to the ADI slave registers.
//!
//! Use this function to write any value in the range 0-7 bits aligned on a
//! byte boundary. Fx. for writing the value 0b101 to bits 1 and 3 the
//! \c ui16Val = 0x0A and the \c ui16Mask = 0x0E. Bits 0 and 5-7 will not be affected
//! by the operation, as the corresponding bits are not set in the
//! \c ui16Mask.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the ADI port.
//! \param ui32Reg is the Least Significant Register in the ADI slave that
//! will be affected by the write operation.
//! \param ui16Mask is the mask defining which of the 8 bit that should be
//! overwritten. The mask must be defined in the lower half of the 16 bits.
//! \param ui16Val is the value to write. The value must be defined in the lower
//! half of the 16 bits.
//!
//! \return None
//!
//! \sa ADI4SetValBit(), ADI16SetValBit()
//
//*****************************************************************************
__STATIC_INLINE void
ADI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint16_t ui16Mask,
uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
ASSERT(!(ui16Val & 0xFF00));
ASSERT(!(ui16Mask & 0xFF00));
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_MASK8B + (ui32Reg << 1);
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui16Mask << 8) | ui16Val, 2);
} else {
HWREGH(ui32Base + ui32RegOffset) = (ui16Mask << 8) | ui16Val;
}
}
//*****************************************************************************
//
//! \brief Set a value on any bits inside an 2 x 8 bit register aligned on a
//! half-word (byte) boundary in the ADI slave.
//!
//! This function allows 2 byte (16 bit) access to the ADI slave registers.
//!
//! Use this function to write any value in the range 0-15 bits aligned on a
//! half-word (byte) boundary. Fx. for writing the value 0b101 to bits 1 and 3 the
//! \c ui32Val = 0x000A and the \c ui32Mask = 0x000E. Bits 0 and 5-15 will not
//! be affected by the operation, as the corresponding bits are not set
//! in the \c ui32Mask.
//!
//! \note AUX_ADI4_BASE : Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the ADI port.
//! \param ui32Reg is the Least Significant Register in the ADI slave that
//! will be affected by the write operation.
//! \param ui32Mask is the mask defining which of the 16 bit that should be
//! overwritten. The mask must be defined in the lower half of the 32 bits.
//! \param ui32Val is the value to write. The value must be defined in the lower
//! half of the 32 bits.
//!
//! \return None
//!
//! \sa ADI4SetValBit(), ADI8SetValBit()
//
//*****************************************************************************
__STATIC_INLINE void
ADI16SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask,
uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(ADIBaseValid(ui32Base));
ASSERT(ui32Reg < ADI_SLAVE_REGS);
ASSERT(!(ui32Val & 0xFFFF0000));
ASSERT(!(ui32Mask & 0xFFFF0000));
// Get the correct address of the first register used for setting bits
// in the ADI slave.
ui32RegOffset = ADI_O_MASK16B + ((ui32Reg << 1) & 0xFC);
// Set the selected bits.
if (ui32Base==AUX_ADI4_BASE) {
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui32Mask << 16) | ui32Val, 4);
} else {
HWREG(ui32Base + ui32RegOffset) = (ui32Mask << 16) | ui32Val;
}
}
//*****************************************************************************
//
// SafeHapiVoid() and SafeHapiAuxAdiSelect()
// Common wrapper functions for the Hapi functions needing workaround for the
// "bus arbitration" issue.
//
//*****************************************************************************
void SafeHapiVoid( FPTR_VOID_VOID_T fPtr );
void SafeHapiAuxAdiSelect( FPTR_VOID_UINT8_T fPtr, uint8_t ut8Signal );
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __ADI_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/adi_doc.h
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/******************************************************************************
* Filename: adi_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup adi_api
//! @{
//! \section sec_adi Introduction
//! \n
//!
//! \section sec_adi_api API
//!
//! The API functions can be grouped like this:
//!
//! Write:
//! - Direct (all bits):
//! - \ref ADI8RegWrite()
//! - \ref ADI16RegWrite()
//! - \ref ADI32RegWrite()
//! - Set individual bits:
//! - \ref ADI8BitsSet()
//! - \ref ADI16BitsSet()
//! - \ref ADI32BitsSet()
//! - Clear individual bits:
//! - \ref ADI8BitsClear()
//! - \ref ADI16BitsClear()
//! - \ref ADI32BitsClear()
//! - Masked:
//! - \ref ADI4SetValBit()
//! - \ref ADI8SetValBit()
//! - \ref ADI16SetValBit()
//!
//! Read:
//! - \ref ADI8RegRead()
//! - \ref ADI16RegRead()
//! - \ref ADI32RegRead()
//!
//! @}
third_party/ti/devices/cc26x0/driverlib/aon_batmon.c
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/******************************************************************************
* Filename: aon_batmon.c
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Driver for the AON Battery and Temperature Monitor
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_batmon.h"
#include "../inc/hw_fcfg1.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONBatMonTemperatureGetDegC
#define AONBatMonTemperatureGetDegC NOROM_AONBatMonTemperatureGetDegC
#endif
//*****************************************************************************
//
// AONBatMonTemperatureGetDegC()
// Returns sign extended temperature in Deg C (-256 .. +255)
//
//*****************************************************************************
int32_t
AONBatMonTemperatureGetDegC( void )
{
int32_t signedTemp ; // Signed extended temperature with 8 fractional bits
int32_t tempCorrection ; // Voltage dependent temp correction with 8 fractional bits
int8_t voltageSlope ; // Signed byte value representing the TEMP slope with battery voltage, in degrees C/V, with 4 fractional bits.
// Shift left then right to sign extend the BATMON_TEMP field
signedTemp = ((((int32_t)HWREG( AON_BATMON_BASE + AON_BATMON_O_TEMP ))
<< ( 32 - AON_BATMON_TEMP_INT_W - AON_BATMON_TEMP_INT_S ))
>> ( 32 - AON_BATMON_TEMP_INT_W - AON_BATMON_TEMP_INT_S ));
// Typecasting voltageSlope to int8_t prior to assignment in order to make sure sign extension works properly
// Using byte read (HWREGB) in order to make more efficient code since voltageSlope is assigned to bits[7:0] of FCFG1_O_MISC_TRIM
voltageSlope = ((int8_t)HWREGB( FCFG1_BASE + FCFG1_O_MISC_TRIM ));
tempCorrection = (( voltageSlope * (((int32_t)HWREG( AON_BATMON_BASE + AON_BATMON_O_BAT )) - 0x300 )) >> 4 );
return ((( signedTemp - tempCorrection ) + 0x80 ) >> 8 );
}
// See aon_batmon.h for implementation of remaining functions
third_party/ti/devices/cc26x0/driverlib/aon_batmon.h
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/******************************************************************************
* Filename: aon_batmon.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the AON Battery and Temperature
* Monitor
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonbatmon_api
//! @{
//
//*****************************************************************************
#ifndef __AON_BATMON_H__
#define __AON_BATMON_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_batmon.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONBatMonTemperatureGetDegC NOROM_AONBatMonTemperatureGetDegC
#endif
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enable the temperature and battery monitoring.
//!
//! This function will enable the measurements of the temperature and the
//! battery voltage.
//!
//! To speed up the measurement of the levels the measurement can be enabled
//! before configuring the battery and temperature settings. When all of the
//! AON_BATMON registers are configured, the calculation of the voltage and
//! temperature values can be enabled (the measurement will now take
//! effect/propagate to other blocks).
//!
//! It is possible to enable both at the same time, after the AON_BATMON
//! registers are configured, but then the first values will be ready at a
//! later point compared to the scenario above.
//!
//! \note Temperature and battery voltage measurements are not done in
//! parallel. The measurement cycle is controlled by a hardware Finite State
//! Machine. First the temperature and then the battery voltage each taking
//! one cycle to complete. However, if the comparator measuring the battery
//! voltage detects a change on the reference value, a new measurement of the
//! battery voltage only is performed immediately after. This has no impact on
//! the cycle count.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONBatMonEnable(void)
{
// Enable the measurements.
HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL) =
AON_BATMON_CTL_CALC_EN |
AON_BATMON_CTL_MEAS_EN;
}
//*****************************************************************************
//
//! \brief Disable the temperature and battery monitoring.
//!
//! This function will disable the measurements of the temperature and the
//! battery voltage.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONBatMonDisable(void)
{
// Disable the measurements.
HWREG(AON_BATMON_BASE + AON_BATMON_O_CTL) = 0;
}
//*****************************************************************************
//
//! \brief Get the current temperature measurement as a signed value in Deg Celsius.
//!
//! This function returns an calibrated and rounded value in degree Celsius.
//! The temperature measurements are updated every cycle.
//!
//! \note The temperature drifts slightly depending on the battery voltage.
//! This function compensates for this drift and returns a calibrated temperature.
//!
//! \note Use the function AONBatMonNewTempMeasureReady() to test for a new measurement.
//!
//! \return Returns signed integer part of temperature in Deg C (-256 .. +255)
//!
//! \sa AONBatMonNewTempMeasureReady()
//
//*****************************************************************************
extern int32_t AONBatMonTemperatureGetDegC( void );
//*****************************************************************************
//
//! \brief Get the battery monitor measurement.
//!
//! This function will return the current battery monitor measurement.
//! The battery voltage measurements are updated every cycle.
//!
//! \note The returned value is NOT sign-extended!
//!
//! \note Use the function \ref AONBatMonNewBatteryMeasureReady() to test for
//! a change in measurement.
//!
//! \return Returns the current battery monitor value of the battery voltage
//! measurement in a <int.frac> format size <3.8> in units of volt.
//!
//! \sa AONBatMonNewBatteryMeasureReady()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONBatMonBatteryVoltageGet(void)
{
uint32_t ui32CurrentBattery;
ui32CurrentBattery = HWREG(AON_BATMON_BASE + AON_BATMON_O_BAT);
// Return the current battery voltage measurement.
return (ui32CurrentBattery >> AON_BATMON_BAT_FRAC_S);
}
//*****************************************************************************
//
//! \brief Check if battery monitor measurement has changed.
//!
//! This function checks if a new battery monitor value is available. If the
//! measurement value has \b changed since last clear the function returns \c true.
//!
//! If the measurement has changed the function will automatically clear the
//! status bit.
//!
//! \note It is always possible to read out the current value of the
//! battery level using AONBatMonBatteryVoltageGet() but this function can be
//! used to check if the measurement has changed.
//!
//! \return Returns \c true if the measurement value has changed and \c false
//! otherwise.
//!
//! \sa AONBatMonNewTempMeasureReady(), AONBatMonBatteryVoltageGet()
//
//*****************************************************************************
__STATIC_INLINE bool
AONBatMonNewBatteryMeasureReady(void)
{
bool bStatus;
// Check the status bit.
bStatus = HWREG(AON_BATMON_BASE + AON_BATMON_O_BATUPD) &
AON_BATMON_BATUPD_STAT ? true : false;
// Clear status bit if set.
if(bStatus)
{
HWREG(AON_BATMON_BASE + AON_BATMON_O_BATUPD) = 1;
}
// Return status.
return (bStatus);
}
//*****************************************************************************
//
//! \brief Check if temperature monitor measurement has changed.
//!
//! This function checks if a new temperature value is available. If the
//! measurement value has \b changed since last clear the function returns \c true.
//!
//! If the measurement has changed the function will automatically clear the
//! status bit.
//!
//! \note It is always possible to read out the current value of the
//! temperature using \ref AONBatMonTemperatureGetDegC()
//! but this function can be used to check if the measurement has changed.
//!
//! \return Returns \c true if the measurement value has changed and \c false
//! otherwise.
//!
//! \sa AONBatMonNewBatteryMeasureReady(), AONBatMonTemperatureGetDegC()
//
//*****************************************************************************
__STATIC_INLINE bool
AONBatMonNewTempMeasureReady(void)
{
bool bStatus;
// Check the status bit.
bStatus = HWREG(AON_BATMON_BASE + AON_BATMON_O_TEMPUPD) &
AON_BATMON_TEMPUPD_STAT ? true : false;
// Clear status bit if set.
if(bStatus)
{
HWREG(AON_BATMON_BASE + AON_BATMON_O_TEMPUPD) = 1;
}
// Return status.
return (bStatus);
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONBatMonTemperatureGetDegC
#undef AONBatMonTemperatureGetDegC
#define AONBatMonTemperatureGetDegC ROM_AONBatMonTemperatureGetDegC
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_BATMON_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aon_event.c
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/******************************************************************************
* Filename: aon_event.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON Event fabric.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_event.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONEventMcuWakeUpSet
#define AONEventMcuWakeUpSet NOROM_AONEventMcuWakeUpSet
#undef AONEventMcuWakeUpGet
#define AONEventMcuWakeUpGet NOROM_AONEventMcuWakeUpGet
#undef AONEventAuxWakeUpSet
#define AONEventAuxWakeUpSet NOROM_AONEventAuxWakeUpSet
#undef AONEventAuxWakeUpGet
#define AONEventAuxWakeUpGet NOROM_AONEventAuxWakeUpGet
#undef AONEventMcuSet
#define AONEventMcuSet NOROM_AONEventMcuSet
#undef AONEventMcuGet
#define AONEventMcuGet NOROM_AONEventMcuGet
#endif
//*****************************************************************************
//
// Select event source for the specified MCU wakeup programmable event
//
//*****************************************************************************
void
AONEventMcuWakeUpSet(uint32_t ui32MCUWUEvent, uint32_t ui32EventSrc)
{
uint32_t ui32Ctrl;
// Check the arguments.
ASSERT((ui32MCUWUEvent == AON_EVENT_MCU_WU0) ||
(ui32MCUWUEvent == AON_EVENT_MCU_WU1) ||
(ui32MCUWUEvent == AON_EVENT_MCU_WU2) ||
(ui32MCUWUEvent == AON_EVENT_MCU_WU3));
ASSERT(ui32EventSrc <= AON_EVENT_NONE);
ui32Ctrl = HWREG(AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL);
if(ui32MCUWUEvent == AON_EVENT_MCU_WU0)
{
ui32Ctrl &= ~(AON_EVENT_MCUWUSEL_WU0_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_MCUWUSEL_WU0_EV_S;
}
else if(ui32MCUWUEvent == AON_EVENT_MCU_WU1)
{
ui32Ctrl &= ~(AON_EVENT_MCUWUSEL_WU1_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_MCUWUSEL_WU1_EV_S;
}
else if(ui32MCUWUEvent == AON_EVENT_MCU_WU2)
{
ui32Ctrl &= ~(AON_EVENT_MCUWUSEL_WU2_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_MCUWUSEL_WU2_EV_S;
}
else if(ui32MCUWUEvent == AON_EVENT_MCU_WU3)
{
ui32Ctrl &= ~(AON_EVENT_MCUWUSEL_WU3_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_MCUWUSEL_WU3_EV_S;
}
HWREG(AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL) = ui32Ctrl;
}
//*****************************************************************************
//
// Get event source for the specified MCU wakeup programmable event
//
//*****************************************************************************
uint32_t
AONEventMcuWakeUpGet(uint32_t ui32MCUWUEvent)
{
uint32_t ui32EventSrc;
// Check the arguments.
ASSERT((ui32MCUWUEvent == AON_EVENT_MCU_WU0) ||
(ui32MCUWUEvent == AON_EVENT_MCU_WU1) ||
(ui32MCUWUEvent == AON_EVENT_MCU_WU2) ||
(ui32MCUWUEvent == AON_EVENT_MCU_WU3));
ui32EventSrc = HWREG(AON_EVENT_BASE + AON_EVENT_O_MCUWUSEL);
if(ui32MCUWUEvent == AON_EVENT_MCU_WU0)
{
return((ui32EventSrc & AON_EVENT_MCUWUSEL_WU0_EV_M) >>
AON_EVENT_MCUWUSEL_WU0_EV_S);
}
else if(ui32MCUWUEvent == AON_EVENT_MCU_WU1)
{
return((ui32EventSrc & AON_EVENT_MCUWUSEL_WU1_EV_M) >>
AON_EVENT_MCUWUSEL_WU1_EV_S);
}
else if(ui32MCUWUEvent == AON_EVENT_MCU_WU2)
{
return((ui32EventSrc & AON_EVENT_MCUWUSEL_WU2_EV_M) >>
AON_EVENT_MCUWUSEL_WU2_EV_S);
}
else if(ui32MCUWUEvent == AON_EVENT_MCU_WU3)
{
return((ui32EventSrc & AON_EVENT_MCUWUSEL_WU3_EV_M) >>
AON_EVENT_MCUWUSEL_WU3_EV_S);
}
// Should never get to this statement, but suppress warning.
ASSERT(0);
return(0);
}
//*****************************************************************************
//
// Select event source for the specified AUX wakeup programmable event
//
//*****************************************************************************
void
AONEventAuxWakeUpSet(uint32_t ui32AUXWUEvent, uint32_t ui32EventSrc)
{
uint32_t ui32Ctrl;
// Check the arguments.
ASSERT((ui32AUXWUEvent == AON_EVENT_AUX_WU0) ||
(ui32AUXWUEvent == AON_EVENT_AUX_WU1) ||
(ui32AUXWUEvent == AON_EVENT_AUX_WU2));
ASSERT(ui32EventSrc <= AON_EVENT_NONE);
ui32Ctrl = HWREG(AON_EVENT_BASE + AON_EVENT_O_AUXWUSEL);
if(ui32AUXWUEvent == AON_EVENT_AUX_WU0)
{
ui32Ctrl &= ~(AON_EVENT_AUXWUSEL_WU0_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_AUXWUSEL_WU0_EV_S;
}
else if(ui32AUXWUEvent == AON_EVENT_AUX_WU1)
{
ui32Ctrl &= ~(AON_EVENT_AUXWUSEL_WU1_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_AUXWUSEL_WU1_EV_S;
}
else if(ui32AUXWUEvent == AON_EVENT_AUX_WU2)
{
ui32Ctrl &= ~(AON_EVENT_AUXWUSEL_WU2_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_AUXWUSEL_WU2_EV_S;
}
HWREG(AON_EVENT_BASE + AON_EVENT_O_AUXWUSEL) = ui32Ctrl;
}
//*****************************************************************************
//
// Get event source for the specified AUX wakeup programmable event
//
//*****************************************************************************
uint32_t
AONEventAuxWakeUpGet(uint32_t ui32AUXWUEvent)
{
uint32_t ui32EventSrc;
// Check the arguments.
ASSERT((ui32AUXWUEvent == AON_EVENT_AUX_WU0) ||
(ui32AUXWUEvent == AON_EVENT_AUX_WU1) ||
(ui32AUXWUEvent == AON_EVENT_AUX_WU2));
ui32EventSrc = HWREG(AON_EVENT_BASE + AON_EVENT_O_AUXWUSEL);
if(ui32AUXWUEvent == AON_EVENT_AUX_WU0)
{
return((ui32EventSrc & AON_EVENT_AUXWUSEL_WU0_EV_M) >>
AON_EVENT_AUXWUSEL_WU0_EV_S);
}
else if(ui32AUXWUEvent == AON_EVENT_AUX_WU1)
{
return((ui32EventSrc & AON_EVENT_AUXWUSEL_WU1_EV_M) >>
AON_EVENT_AUXWUSEL_WU1_EV_S);
}
else if(ui32AUXWUEvent == AON_EVENT_AUX_WU2)
{
return((ui32EventSrc & AON_EVENT_AUXWUSEL_WU2_EV_M) >>
AON_EVENT_AUXWUSEL_WU2_EV_S);
}
// Should never get to this statement, but suppress warning.
ASSERT(0);
return(0);
}
//*****************************************************************************
//
// Select event source for the specified programmable event forwarded to the
// MCU event fabric
//
//*****************************************************************************
void
AONEventMcuSet(uint32_t ui32MCUEvent, uint32_t ui32EventSrc)
{
uint32_t ui32Ctrl;
// Check the arguments.
ASSERT((ui32MCUEvent == AON_EVENT_MCU_EVENT0) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT1) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT2));
ASSERT(ui32EventSrc <= AON_EVENT_NONE);
ui32Ctrl = HWREG(AON_EVENT_BASE + AON_EVENT_O_EVTOMCUSEL);
if(ui32MCUEvent == AON_EVENT_MCU_EVENT0)
{
ui32Ctrl &= ~(AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_S;
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT1)
{
ui32Ctrl &= ~(AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_S;
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT2)
{
ui32Ctrl &= ~(AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_S;
}
HWREG(AON_EVENT_BASE + AON_EVENT_O_EVTOMCUSEL) = ui32Ctrl;
}
//*****************************************************************************
//
// Get source for the specified programmable event forwarded to the MCU event
// fabric.
//
//*****************************************************************************
uint32_t
AONEventMcuGet(uint32_t ui32MCUEvent)
{
uint32_t ui32EventSrc;
// Check the arguments.
ASSERT((ui32MCUEvent == AON_EVENT_MCU_EVENT0) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT1) ||
(ui32MCUEvent == AON_EVENT_MCU_EVENT2));
ui32EventSrc = HWREG(AON_EVENT_BASE + AON_EVENT_O_EVTOMCUSEL);
if(ui32MCUEvent == AON_EVENT_MCU_EVENT0)
{
return((ui32EventSrc & AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_M) >>
AON_EVENT_EVTOMCUSEL_AON_PROG0_EV_S);
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT1)
{
return((ui32EventSrc & AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_M) >>
AON_EVENT_EVTOMCUSEL_AON_PROG1_EV_S);
}
else if(ui32MCUEvent == AON_EVENT_MCU_EVENT2)
{
return((ui32EventSrc & AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_M) >>
AON_EVENT_EVTOMCUSEL_AON_PROG2_EV_S);
}
// Should never get to this statement, but suppress warning.
ASSERT(0);
return(0);
}
third_party/ti/devices/cc26x0/driverlib/aon_event.h
Vendored
-623
View File
@@ -1,623 +0,0 @@
/******************************************************************************
* Filename: aon_event.h
* Revised: 2017-06-21 11:05:14 +0200 (Wed, 21 Jun 2017)
* Revision: 49178
*
* Description: Defines and prototypes for the AON Event fabric.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonevent_api
//! @{
//
//*****************************************************************************
#ifndef __AON_EVENT_H__
#define __AON_EVENT_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_device.h"
#include "../inc/hw_aon_event.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONEventMcuWakeUpSet NOROM_AONEventMcuWakeUpSet
#define AONEventMcuWakeUpGet NOROM_AONEventMcuWakeUpGet
#define AONEventAuxWakeUpSet NOROM_AONEventAuxWakeUpSet
#define AONEventAuxWakeUpGet NOROM_AONEventAuxWakeUpGet
#define AONEventMcuSet NOROM_AONEventMcuSet
#define AONEventMcuGet NOROM_AONEventMcuGet
#endif
//*****************************************************************************
//
// Event sources for the event AON fabric.
// Note: Events are level-triggered active high
//
//*****************************************************************************
// AON_EVENT_DIO0 // Edge detect on DIO0. See hw_device.h
// ... // ...
// AON_EVENT_DIO31 // Edge detect on DIO31. See hw_device.h
#define AON_EVENT_IO 32 // Edge detect on any DIO. Edge detect is enabled and configured in IOC.
// Event ID 33 is reserved for future use
// Event ID 34 is reserved for future use
#define AON_EVENT_RTC_CH0 35 // RTC channel 0
#define AON_EVENT_RTC_CH1 36 // RTC channel 1
#define AON_EVENT_RTC_CH2 37 // RTC channel 2
#define AON_EVENT_RTC_CH0_DLY 38 // RTC channel 0 - delayed event
#define AON_EVENT_RTC_CH1_DLY 39 // RTC channel 1 - delayed event
#define AON_EVENT_RTC_CH2_DLY 40 // RTC channel 2 - delayed event
#define AON_EVENT_RTC_COMB_DLY 41 // RTC combined delayed event
#define AON_EVENT_RTC_UPD 42 // RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
#define AON_EVENT_JTAG 43 // JTAG generated event
#define AON_EVENT_AUX_SWEV0 44 // AUX Software triggered event #0
#define AON_EVENT_AUX_SWEV1 45 // AUX Software triggered event #1
#define AON_EVENT_AUX_SWEV2 46 // AUX Software triggered event #2
#define AON_EVENT_AUX_COMPA 47 // Comparator A triggered (synchronized in AUX)
#define AON_EVENT_AUX_COMPB 48 // Comparator B triggered (synchronized in AUX)
#define AON_EVENT_AUX_ADC_DONE 49 // ADC conversion completed
#define AON_EVENT_AUX_TDC_DONE 50 // TDC completed or timed out
#define AON_EVENT_AUX_TIMER0_EV 51 // Timer 0 event
#define AON_EVENT_AUX_TIMER1_EV 52 // Timer 1 event
#define AON_EVENT_BATMON_TEMP 53 // BATMON temperature update event
#define AON_EVENT_BATMON_VOLT 54 // BATMON voltage update event
#define AON_EVENT_AUX_COMPB_ASYNC 55 // Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
#define AON_EVENT_AUX_COMPB_ASYNC_N 56 // Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
// Event ID 57-62 is reserved for future use
#define AON_EVENT_NONE 63 // No event, always low
// Keeping backward compatibility until major revision number is incremented
#define AON_EVENT_RTC0 ( AON_EVENT_RTC_CH0 )
//*****************************************************************************
//
// Values that can be passed to AONEventMCUWakeUpSet() and returned
// by AONEventMCUWakeUpGet().
//
//*****************************************************************************
#define AON_EVENT_MCU_WU0 0 // Programmable MCU wake-up event 0
#define AON_EVENT_MCU_WU1 1 // Programmable MCU wake-up event 1
#define AON_EVENT_MCU_WU2 2 // Programmable MCU wake-up event 2
#define AON_EVENT_MCU_WU3 3 // Programmable MCU wake-up event 3
//*****************************************************************************
//
// Values that can be passed to AONEventAuxWakeUpSet() and AONEventAuxWakeUpGet()
//
//*****************************************************************************
#define AON_EVENT_AUX_WU0 0 // Programmable AUX wake-up event 0
#define AON_EVENT_AUX_WU1 1 // Programmable AUX wake-up event 1
#define AON_EVENT_AUX_WU2 2 // Programmable AUX wake-up event 2
//*****************************************************************************
//
// Values that can be passed to AONEventMcuSet() and AONEventMcuGet()
//
//*****************************************************************************
#define AON_EVENT_MCU_EVENT0 0 // Programmable event source fed to MCU event fabric (first of 3)
#define AON_EVENT_MCU_EVENT1 1 // Programmable event source fed to MCU event fabric (second of 3)
#define AON_EVENT_MCU_EVENT2 2 // Programmable event source fed to MCU event fabric (third of 3)
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Select event source for the specified MCU wake-up programmable event.
//!
//! The AON event fabric has several programmable events that can
//! wake up the MCU. The events are forwarded to the wake-up controller (WUC).
//!
//! \note The programmable event sources are effectively OR'ed together
//! to form a single wake-up event forwarded to the WUC.
//!
//! \param ui32MCUWUEvent is one of the programmable MCU wake-up event sources.
//! - \ref AON_EVENT_MCU_WU0
//! - \ref AON_EVENT_MCU_WU1
//! - \ref AON_EVENT_MCU_WU2
//! - \ref AON_EVENT_MCU_WU3
//! \param ui32EventSrc is an event source for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventMcuWakeUpGet()
//
//*****************************************************************************
extern void AONEventMcuWakeUpSet(uint32_t ui32MCUWUEvent,
uint32_t ui32EventSrc);
//*****************************************************************************
//
//! \brief Get event source for the specified MCU wake-up programmable event.
//!
//! \param ui32MCUWUEvent is one of the programmable MCU wake-up event sources.
//! - \ref AON_EVENT_MCU_WU0
//! - \ref AON_EVENT_MCU_WU1
//! - \ref AON_EVENT_MCU_WU2
//! - \ref AON_EVENT_MCU_WU3
//!
//! \return Returns the event source for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventMcuWakeUpSet()
//
//*****************************************************************************
extern uint32_t AONEventMcuWakeUpGet(uint32_t ui32MCUWUEvent);
//*****************************************************************************
//
//! \brief Select event source for the specified AUX wake-up programmable event.
//!
//! The AON event fabric has a total of three programmable events that can
//! wake-up the AUX domain. The events are forwarded to the wake-up
//! controller (WUC).
//!
//! \note The three programmable event sources are effectively OR'ed together
//! to form a single wake-up event forwarded to the WUC.
//!
//! \param ui32AUXWUEvent is one of three programmable AUX wake-up event sources.
//! - \ref AON_EVENT_AUX_WU0
//! - \ref AON_EVENT_AUX_WU1
//! - \ref AON_EVENT_AUX_WU2
//! \param ui32EventSrc is an event sources for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventAuxWakeUpGet()
//
//*****************************************************************************
extern void AONEventAuxWakeUpSet(uint32_t ui32AUXWUEvent,
uint32_t ui32EventSrc);
//*****************************************************************************
//
//! \brief Get event source for the specified AUX wake-up programmable event.
//!
//! The AON event fabric has a total of three programmable events that can
//! wake-up the AUX domain. The events are forwarded to the wake-up
//! controller (WUC).
//!
//! \param ui32AUXWUEvent is one of three programmable AUX wake-up event sources.
//! - \ref AON_EVENT_AUX_WU0
//! - \ref AON_EVENT_AUX_WU1
//! - \ref AON_EVENT_AUX_WU2
//!
//! \return Returns the event source for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventAuxWakeUpSet()
//
//*****************************************************************************
extern uint32_t AONEventAuxWakeUpGet(uint32_t ui32AUXWUEvent);
//*****************************************************************************
//
//! \brief Select event source for the specified programmable event forwarded to the
//! MCU event fabric.
//!
//! The AON event fabric has a total of three programmable events that can
//! be forwarded to the MCU event fabric.
//!
//! \note The three programmable event sources are forwarded to the MCU Event
//! Fabric as:
//! - AON_PROG0
//! - AON_PROG1
//! - AON_PROG2
//!
//! \param ui32MCUEvent is one of three programmable events forwarded to the
//! MCU event fabric.
//! - \ref AON_EVENT_MCU_EVENT0
//! - \ref AON_EVENT_MCU_EVENT1
//! - \ref AON_EVENT_MCU_EVENT2
//! \param ui32EventSrc is an event source for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventMcuGet()
//
//*****************************************************************************
extern void AONEventMcuSet(uint32_t ui32MCUEvent, uint32_t ui32EventSrc);
//*****************************************************************************
//
//! \brief Get source for the specified programmable event forwarded to the MCU event
//! fabric.
//!
//! The AON event fabric has a total of three programmable events that can
//! be forwarded to the MCU event fabric.
//!
//! \param ui32MCUEvent is one of three programmable events forwarded to the
//! MCU event fabric.
//! - \ref AON_EVENT_MCU_EVENT0
//! - \ref AON_EVENT_MCU_EVENT1
//! - \ref AON_EVENT_MCU_EVENT2
//!
//! \return Returns the event source for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventMcuSet()
//
//*****************************************************************************
extern uint32_t AONEventMcuGet(uint32_t ui32MCUEvent);
//*****************************************************************************
//
//! \brief Select event source forwarded to AON Real Time Clock (RTC).
//!
//! A programmable event can be forwarded to the AON real time clock
//! for triggering a capture event on RTC channel 1.
//!
//! \param ui32EventSrc is an event source for the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \return None
//!
//! \sa AONEventRtcGet()
//
//*****************************************************************************
__STATIC_INLINE void
AONEventRtcSet(uint32_t ui32EventSrc)
{
uint32_t ui32Ctrl;
// Check the arguments.
ASSERT(ui32EventSrc <= AON_EVENT_NONE);
ui32Ctrl = HWREG(AON_EVENT_BASE + AON_EVENT_O_RTCSEL);
ui32Ctrl &= ~(AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_M);
ui32Ctrl |= (ui32EventSrc & 0x3f) << AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_S;
HWREG(AON_EVENT_BASE + AON_EVENT_O_RTCSEL) = ui32Ctrl;
}
//*****************************************************************************
//
//! \brief Get event source forwarded to AON Real Time Clock (RTC).
//!
//! A programmable event can be forwarded to the AON real time clock
//! for triggering a capture event on RTC channel 1.
//!
//! \return Returns the event source to the event AON fabric.
//! - AON_EVENT_DIO0 : Edge detect on DIO0. See hw_device.h
//! - ...
//! - AON_EVENT_DIO31 : Edge detect on DIO31. See hw_device.h
//! - \ref AON_EVENT_IO : Edge detect on any DIO. Edge detect is enabled and configured in IOC.
//! - \ref AON_EVENT_RTC_CH0 : RTC channel 0
//! - \ref AON_EVENT_RTC_CH1 : RTC channel 1
//! - \ref AON_EVENT_RTC_CH2 : RTC channel 2
//! - \ref AON_EVENT_RTC_CH0_DLY : RTC channel 0 - delayed event
//! - \ref AON_EVENT_RTC_CH1_DLY : RTC channel 1 - delayed event
//! - \ref AON_EVENT_RTC_CH2_DLY : RTC channel 2 - delayed event
//! - \ref AON_EVENT_RTC_COMB_DLY : RTC combined delayed event
//! - \ref AON_EVENT_RTC_UPD : RTC Update Tick (16 kHz signal, i.e. event line toggles value every 32 kHz clock period)
//! - \ref AON_EVENT_JTAG : JTAG generated event
//! - \ref AON_EVENT_AUX_SWEV0 : AUX Software triggered event #0
//! - \ref AON_EVENT_AUX_SWEV1 : AUX Software triggered event #1
//! - \ref AON_EVENT_AUX_SWEV2 : AUX Software triggered event #2
//! - \ref AON_EVENT_AUX_COMPA : Comparator A triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_COMPB : Comparator B triggered (synchronized in AUX)
//! - \ref AON_EVENT_AUX_ADC_DONE : ADC conversion completed
//! - \ref AON_EVENT_AUX_TDC_DONE : TDC completed or timed out
//! - \ref AON_EVENT_AUX_TIMER0_EV : Timer 0 event
//! - \ref AON_EVENT_AUX_TIMER1_EV : Timer 1 event
//! - \ref AON_EVENT_BATMON_TEMP : BATMON temperature update event
//! - \ref AON_EVENT_BATMON_VOLT : BATMON voltage update event
//! - \ref AON_EVENT_AUX_COMPB_ASYNC : Comparator B triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_AUX_COMPB_ASYNC_N : Comparator B not triggered. Asynchronous signal directly from the AUX Comparator B
//! - \ref AON_EVENT_NONE : No event, always low
//!
//! \sa AONEventRtcSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONEventRtcGet(void)
{
uint32_t ui32EventSrc;
// Return the active event.
ui32EventSrc = HWREG(AON_EVENT_BASE + AON_EVENT_O_RTCSEL);
return ((ui32EventSrc & AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_M) >>
AON_EVENT_RTCSEL_RTC_CH1_CAPT_EV_S);
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONEventMcuWakeUpSet
#undef AONEventMcuWakeUpSet
#define AONEventMcuWakeUpSet ROM_AONEventMcuWakeUpSet
#endif
#ifdef ROM_AONEventMcuWakeUpGet
#undef AONEventMcuWakeUpGet
#define AONEventMcuWakeUpGet ROM_AONEventMcuWakeUpGet
#endif
#ifdef ROM_AONEventAuxWakeUpSet
#undef AONEventAuxWakeUpSet
#define AONEventAuxWakeUpSet ROM_AONEventAuxWakeUpSet
#endif
#ifdef ROM_AONEventAuxWakeUpGet
#undef AONEventAuxWakeUpGet
#define AONEventAuxWakeUpGet ROM_AONEventAuxWakeUpGet
#endif
#ifdef ROM_AONEventMcuSet
#undef AONEventMcuSet
#define AONEventMcuSet ROM_AONEventMcuSet
#endif
#ifdef ROM_AONEventMcuGet
#undef AONEventMcuGet
#define AONEventMcuGet ROM_AONEventMcuGet
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_EVENT_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aon_event_doc.h
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/******************************************************************************
* Filename: aon_event_doc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonevent_api
//! @{
//! \section sec_aonevent Introduction
//!
//! The event fabric consists of two event modules. One in the MCU power domain (MCU event fabric) and
//! the other in the AON power domain (AON event fabric). The MCU event fabric is one of the subscribers
//! to the AON event fabric. For more information on MCU event fabric, see [MCU event API](@ref event_api).
//!
//! The AON event fabric is a configurable combinatorial router between AON event sources and event
//! subscribers in both AON and MCU domains. The AON event fabric has three main event subscribers: AON WUC,
//! AON RTC, and MCU event fabric. The API to control the AON event fabric configuration can be grouped based
//! on the event subscriber to configure:
//!
//! - AON WUC receives two programmable event lines from AON event fabric. One for MCU wake-up events and one for AUX wake-up events. For more information, see [AON WUC API](@ref aonwuc_api).
//! - MCU wake-up event
//! - @ref AONEventMcuWakeUpSet()
//! - @ref AONEventMcuWakeUpGet()
//! - AUX wake-up event
//! - @ref AONEventAuxWakeUpSet()
//! - @ref AONEventAuxWakeUpGet()
//! - AON RTC receives a single programmable event line from the AON event fabric. For more information, see [AON RTC API](@ref aonrtc_api).
//! - @ref AONEventRtcSet()
//! - @ref AONEventRtcGet()
//! - MCU event fabric receives a number of programmable event lines from the AON event fabric. For more information, see [MCU event API](@ref event_api).
//! - @ref AONEventMcuSet()
//! - @ref AONEventMcuGet()
//! @}
third_party/ti/devices/cc26x0/driverlib/aon_ioc.c
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/******************************************************************************
* Filename: aon_ioc.c
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Driver for the AON IO Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_ioc.h"
third_party/ti/devices/cc26x0/driverlib/aon_ioc.h
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/******************************************************************************
* Filename: aon_ioc.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the AON IO Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonioc_api
//! @{
//
//*****************************************************************************
#ifndef __AON_IOC_H__
#define __AON_IOC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_ioc.h"
#include "debug.h"
//*****************************************************************************
//
// Defines for the drive strength
//
//*****************************************************************************
#define AONIOC_DRV_STR_1 0x00000000 // Lowest drive strength
#define AONIOC_DRV_STR_2 0x00000001
#define AONIOC_DRV_STR_3 0x00000003
#define AONIOC_DRV_STR_4 0x00000002
#define AONIOC_DRV_STR_5 0x00000006
#define AONIOC_DRV_STR_6 0x00000007
#define AONIOC_DRV_STR_7 0x00000005
#define AONIOC_DRV_STR_8 0x00000004 // Highest drive strength
#define AONIOC_DRV_LVL_MIN (AON_IOC_O_IOSTRMIN)
#define AONIOC_DRV_LVL_MED (AON_IOC_O_IOSTRMED)
#define AONIOC_DRV_LVL_MAX (AON_IOC_O_IOSTRMAX)
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Configure drive strength values for the manual drive strength options.
//!
//! This function defines the general drive strength settings for the non-AUTO
//! drive strength options in the MCU IOC. Consequently, if all IOs are using the
//! automatic drive strength option this function has no effect.
//!
//! Changing the drive strength values affects all current modes (Low-Current,
//! High-Current, and Extended-Current). Current mode for individual IOs is set in
//! MCU IOC by \ref IOCIODrvStrengthSet().
//!
//! \note Values are Gray encoded. Simply incrementing values to increase drive
//! strength will not work.
//!
//! \param ui32DriveLevel
//! - \ref AONIOC_DRV_LVL_MIN : Minimum drive strength option. Default value is selected
//! to give minimum 2/4/8 mA @3.3V for Low-Current mode, High-Current mode,
//! and Extended-Current mode respectively.
//! - \ref AONIOC_DRV_LVL_MED : Medium drive strength option. Default value is selected
//! to give minimum 2/4/8 mA @2.5V for Low-Current mode, High-Current mode,
//! and Extended-Current mode respectively.
//! - \ref AONIOC_DRV_LVL_MAX : Maximum drive strength option. Default value is selected
//! to give minimum 2/4/8 mA @1.8V for Low-Current mode, High-Current mode,
//! and Extended-Current mode respectively.
//! \param ui32DriveStrength sets the value used by IOs configured as non-AUTO drive strength in MCU IOC.
//! - \ref AONIOC_DRV_STR_1 : Lowest drive strength
//! - \ref AONIOC_DRV_STR_2
//! - \ref AONIOC_DRV_STR_3
//! - \ref AONIOC_DRV_STR_4
//! - \ref AONIOC_DRV_STR_5
//! - \ref AONIOC_DRV_STR_6
//! - \ref AONIOC_DRV_STR_7
//! - \ref AONIOC_DRV_STR_8 : Highest drive strength
//!
//! \return None
//!
//! \sa \ref AONIOCDriveStrengthGet(), \ref IOCIODrvStrengthSet()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOCDriveStrengthSet(uint32_t ui32DriveLevel, uint32_t ui32DriveStrength)
{
ASSERT((ui32DriveLevel == AONIOC_DRV_LVL_MIN) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MED) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MAX));
ASSERT((ui32DriveStrength == AONIOC_DRV_STR_1) ||
(ui32DriveStrength == AONIOC_DRV_STR_2) ||
(ui32DriveStrength == AONIOC_DRV_STR_3) ||
(ui32DriveStrength == AONIOC_DRV_STR_4) ||
(ui32DriveStrength == AONIOC_DRV_STR_5) ||
(ui32DriveStrength == AONIOC_DRV_STR_6) ||
(ui32DriveStrength == AONIOC_DRV_STR_7) ||
(ui32DriveStrength == AONIOC_DRV_STR_8));
// Set the drive strength.
HWREG(AON_IOC_BASE + ui32DriveLevel) = ui32DriveStrength;
}
//*****************************************************************************
//
//! \brief Get a specific drive level setting for all IOs.
//!
//! Use this function to read the drive strength setting for a specific
//! IO drive level.
//!
//! \note Values are Gray encoded.
//!
//! \param ui32DriveLevel is the specific drive level to get the setting for.
//! - \ref AONIOC_DRV_LVL_MIN : Minimum drive strength option.
//! - \ref AONIOC_DRV_LVL_MED : Medium drive strength option.
//! - \ref AONIOC_DRV_LVL_MAX : Maximum drive strength option.
//!
//! \return Returns the requested drive strength level setting for all IOs.
//! Possible values are:
//! - \ref AONIOC_DRV_STR_1 : Lowest drive strength
//! - \ref AONIOC_DRV_STR_2
//! - \ref AONIOC_DRV_STR_3
//! - \ref AONIOC_DRV_STR_4
//! - \ref AONIOC_DRV_STR_5
//! - \ref AONIOC_DRV_STR_6
//! - \ref AONIOC_DRV_STR_7
//! - \ref AONIOC_DRV_STR_8 : Highest drive strength
//!
//! \sa AONIOCDriveStrengthSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONIOCDriveStrengthGet(uint32_t ui32DriveLevel)
{
// Check the arguments.
ASSERT((ui32DriveLevel == AONIOC_DRV_LVL_MIN) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MED) ||
(ui32DriveLevel == AONIOC_DRV_LVL_MAX));
// Return the drive strength value.
return( HWREG(AON_IOC_BASE + ui32DriveLevel) );
}
//*****************************************************************************
//
//! \brief Freeze the IOs.
//!
//! To retain the values of the output IOs during a powerdown/shutdown of the
//! device all IO latches in the AON domain should be frozen in their current
//! state. This ensures that software can regain control of the IOs after a
//! reboot without the IOs first falling back to the default values (i.e. input
//! and no pull).
//!
//! \return None
//!
//! \sa AONIOCFreezeDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOCFreezeEnable(void)
{
// Set the AON IO latches as static.
HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = 0x0;
}
//*****************************************************************************
//
//! \brief Un-freeze the IOs.
//!
//! When rebooting the chip after it has entered powerdown/shutdown mode, the
//! software can regain control of the IOs by setting the IO latches as
//! transparent. The IOs should not be unfrozen before software has restored
//! the functionality of the IO.
//!
//! \return None
//!
//! \sa AONIOCFreezeEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOCFreezeDisable(void)
{
// Set the AON IOC latches as transparent.
HWREG(AON_IOC_BASE + AON_IOC_O_IOCLATCH) = AON_IOC_IOCLATCH_EN;
}
//*****************************************************************************
//
//! \brief Disable the 32kHz clock output.
//!
//! When outputting a 32 kHz clock on an IO, the output enable/disable functionality
//! in the IOC is bypassed. Therefore, the programmer needs to call this
//! function to disable the clock output.
//!
//! \return None
//!
//! \sa AONIOC32kHzOutputEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOC32kHzOutputDisable(void)
{
// Disable the LF clock output.
HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = AON_IOC_CLK32KCTL_OE_N;
}
//*****************************************************************************
//
//! \brief Enable the 32kHz clock output.
//!
//! When outputting a 32 kHz clock on an IO, the output enable/disable functionality
//! in the IOC is bypassed. Therefore, the programmer needs to call this
//! function to enable the clock output.
//!
//! \return None
//!
//! \sa AONIOC32kHzOutputDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONIOC32kHzOutputEnable(void)
{
// Enable the LF clock output.
HWREG(AON_IOC_BASE + AON_IOC_O_CLK32KCTL) = 0x0;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_IOC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aon_ioc_doc.h
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/******************************************************************************
* Filename: aon_ioc_doc.h
* Revised: 2016-03-30 11:01:30 +0200 (Wed, 30 Mar 2016)
* Revision: 45969
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonioc_api
//! @{
//! \section sec_aonioc Introduction
//!
//! The Input/Output Controller (IOC) controls the functionality of the pins (called DIO).
//! The IOC consists of two APIs:
//! - MCU IOC API selects which peripheral module is connected to the individual DIO and thus allowed to control it.
//! It also controls individual drive strength, slew rate, pull-up/pull-down, edge detection, etc.
//! - AON IOC API controls the general drive strength definitions, IO latches, and if the LF clock is
//! routed to a DIO for external use.
//!
//! For more information on the MCU IOC see the [IOC API](\ref ioc_api).
//!
//! \section sec_aonioc_api API
//!
//! The API functions can be grouped like this:
//!
//! Freeze IOs while MCU domain is powered down:
//! - \ref AONIOCFreezeEnable()
//! - \ref AONIOCFreezeDisable()
//!
//! Output LF clock to a DIO:
//! - \ref AONIOC32kHzOutputEnable()
//! - \ref AONIOC32kHzOutputDisable()
//!
//! Configure the value of drive strength for the three manual MCU IOC settings (MIN, MED, MAX):
//! - \ref AONIOCDriveStrengthSet()
//! - \ref AONIOCDriveStrengthGet()
//!
//! @}
third_party/ti/devices/cc26x0/driverlib/aon_rtc.c
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/******************************************************************************
* Filename: aon_rtc.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON RTC.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_rtc.h"
#include "cpu.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONRTCCurrentCompareValueGet
#define AONRTCCurrentCompareValueGet NOROM_AONRTCCurrentCompareValueGet
#undef AONRTCCurrent64BitValueGet
#define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
#endif
//*****************************************************************************
//
// Get the current value of the RTC counter in a format compatible to the compare registers.
//
//*****************************************************************************
uint32_t
AONRTCCurrentCompareValueGet( void )
{
uint32_t ui32CurrentSec ;
uint32_t ui32CurrentSubSec ;
uint32_t ui32SecondSecRead ;
// Reading SEC both before and after SUBSEC in order to detect if SEC incremented while reading SUBSEC
// If SEC incremented, we can't be sure which SEC the SUBSEC belongs to, so repeating the sequence then.
do {
ui32CurrentSec = HWREG( AON_RTC_BASE + AON_RTC_O_SEC );
ui32CurrentSubSec = HWREG( AON_RTC_BASE + AON_RTC_O_SUBSEC );
ui32SecondSecRead = HWREG( AON_RTC_BASE + AON_RTC_O_SEC );
} while ( ui32CurrentSec != ui32SecondSecRead );
return (( ui32CurrentSec << 16 ) | ( ui32CurrentSubSec >> 16 ));
}
//*****************************************************************************
//
// Get the current 64-bit value of the RTC counter.
//
//*****************************************************************************
uint64_t
AONRTCCurrent64BitValueGet( void )
{
union {
uint64_t returnValue ;
uint32_t secAndSubSec[ 2 ] ;
} currentRtc ;
uint32_t ui32SecondSecRead ;
// Reading SEC both before and after SUBSEC in order to detect if SEC incremented while reading SUBSEC
// If SEC incremented, we can't be sure which SEC the SUBSEC belongs to, so repeating the sequence then.
do {
currentRtc.secAndSubSec[ 1 ] = HWREG( AON_RTC_BASE + AON_RTC_O_SEC );
currentRtc.secAndSubSec[ 0 ] = HWREG( AON_RTC_BASE + AON_RTC_O_SUBSEC );
ui32SecondSecRead = HWREG( AON_RTC_BASE + AON_RTC_O_SEC );
} while ( currentRtc.secAndSubSec[ 1 ] != ui32SecondSecRead );
return ( currentRtc.returnValue );
}
third_party/ti/devices/cc26x0/driverlib/aon_rtc.h
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/******************************************************************************
* Filename: aon_rtc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AON RTC
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonrtc_api
//! @{
//
//*****************************************************************************
#ifndef __AON_RTC_H__
#define __AON_RTC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aon_rtc.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONRTCCurrentCompareValueGet NOROM_AONRTCCurrentCompareValueGet
#define AONRTCCurrent64BitValueGet NOROM_AONRTCCurrent64BitValueGet
#endif
//*****************************************************************************
//
// Values that can be passed to most of the AON_RTC APIs as the ui32Channel
// parameter.
//
//*****************************************************************************
#define AON_RTC_CH_NONE 0x0 // RTC No channel
#define AON_RTC_CH0 0x1 // RTC Channel 0
#define AON_RTC_CH1 0x2 // RTC Channel 1
#define AON_RTC_CH2 0x4 // RTC Channel 2
#define AON_RTC_ACTIVE 0x8 // RTC Active
//*****************************************************************************
//
// Values that can be passed to AONRTCConfigDelay as the ui32Delay parameter.
//
//*****************************************************************************
#define AON_RTC_CONFIG_DELAY_NODELAY 0 // NO DELAY
#define AON_RTC_CONFIG_DELAY_1 1 // Delay of 1 clk cycle
#define AON_RTC_CONFIG_DELAY_2 2 // Delay of 2 clk cycles
#define AON_RTC_CONFIG_DELAY_4 3 // Delay of 4 clk cycles
#define AON_RTC_CONFIG_DELAY_8 4 // Delay of 8 clk cycles
#define AON_RTC_CONFIG_DELAY_16 5 // Delay of 16 clk cycles
#define AON_RTC_CONFIG_DELAY_32 6 // Delay of 32 clk cycles
#define AON_RTC_CONFIG_DELAY_48 7 // Delay of 48 clk cycles
#define AON_RTC_CONFIG_DELAY_64 8 // Delay of 64 clk cycles
#define AON_RTC_CONFIG_DELAY_80 9 // Delay of 80 clk cycles
#define AON_RTC_CONFIG_DELAY_96 10 // Delay of 96 clk cycles
#define AON_RTC_CONFIG_DELAY_112 11 // Delay of 112 clk cycles
#define AON_RTC_CONFIG_DELAY_128 12 // Delay of 128 clk cycles
#define AON_RTC_CONFIG_DELAY_144 13 // Delay of 144 clk cycles
//*****************************************************************************
//
// Values that can be passed to AONRTCSetModeCH1 as the ui32Mode
// parameter.
//
//*****************************************************************************
#define AON_RTC_MODE_CH1_CAPTURE 1 // Capture mode
#define AON_RTC_MODE_CH1_COMPARE 0 // Compare Mode
//*****************************************************************************
//
// Values that can be passed to AONRTCSetModeCH2 as the ui32Mode
// parameter.
//
//*****************************************************************************
#define AON_RTC_MODE_CH2_CONTINUOUS 1 // Continuous mode
#define AON_RTC_MODE_CH2_NORMALCOMPARE 0 // Normal compare mode
//*****************************************************************************
//
// Mutliplication factor for converting from seconds to corresponding time in
// the "CompareValue" format.
// The factor correspond to the compare value format described in the registers
// \ref AON_RTC_O_CH0CMP, \ref AON_RTC_O_CH1CMP and \ref AON_RTC_O_CH2CMP.
// Example1:
// 4 milliseconds in CompareValue format can be written like this:
// ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT ))
// Example2:
// 4 seconds in CompareValue format can be written like this:
// ( 4 * FACTOR_SEC_TO_COMP_VAL_FORMAT )
//
//*****************************************************************************
#define FACTOR_SEC_TO_COMP_VAL_FORMAT 0x00010000
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Enable the RTC.
//!
//! Enable the AON Real Time Clock.
//!
//! \note Event generation for each of the three channels must also be enabled
//! using the function AONRTCChannelEnable().
//!
//! \return None
//!
//! \sa AONRTCChannelEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCEnable(void)
{
// Enable RTC.
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 1;
}
//*****************************************************************************
//
//! \brief Disable the RTC.
//!
//! Disable the AON Real Time Clock.
//!
//! \note Event generation for each of the three channels can also be disabled
//! using the function AONRTCChannelDisable().
//!
//! \return None
//!
//! \sa AONRTCChannelDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCDisable(void)
{
// Disable RTC
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN) = 0;
}
//*****************************************************************************
//
//! \brief Reset the RTC.
//!
//! Reset the AON Real Time Clock.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCReset(void)
{
// Reset RTC.
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_RESET_BITN) = 1;
}
//*****************************************************************************
//
//! \brief Check if the RTC is active (enabled).
//!
//! \return Returns the status of the RTC.
//! - false : RTC is disabled
//! - true : RTC is enabled
//
//*****************************************************************************
__STATIC_INLINE bool
AONRTCActive(void)
{
// Read if RTC is enabled
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CTL, AON_RTC_CTL_EN_BITN));
}
//*****************************************************************************
//
//! \brief Check if an RTC channel is active (enabled).
//!
//! \param ui32Channel specifies the RTC channel to check status of.
//! Parameter must be one (and only one) of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return Returns the status of the requested channel:
//! - false : Channel is disabled
//! - true : Channel is enabled
//
//*****************************************************************************
__STATIC_INLINE bool
AONRTCChannelActive(uint32_t ui32Channel)
{
uint32_t uint32Status = 0;
if(ui32Channel & AON_RTC_CH0)
{
uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN);
}
if(ui32Channel & AON_RTC_CH1)
{
uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN);
}
if(ui32Channel & AON_RTC_CH2)
{
uint32Status = HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN);
}
return(uint32Status);
}
//*****************************************************************************
//
//! \brief Configure Event Delay for the RTC.
//!
//! Each event from the three individual channels can generate a delayed
//! event. The delay time for these events is set using this function.
//! The delay is measured in clock cycles.
//!
//! \note There is only one delay setting shared for all three channels.
//!
//! \param ui32Delay specifies the delay time for delayed events.
//! Parameter must be one of the following:
//! - \ref AON_RTC_CONFIG_DELAY_NODELAY
//! - \ref AON_RTC_CONFIG_DELAY_1
//! - \ref AON_RTC_CONFIG_DELAY_2
//! - \ref AON_RTC_CONFIG_DELAY_4
//! - \ref AON_RTC_CONFIG_DELAY_8
//! - \ref AON_RTC_CONFIG_DELAY_16
//! - \ref AON_RTC_CONFIG_DELAY_32
//! - \ref AON_RTC_CONFIG_DELAY_48
//! - \ref AON_RTC_CONFIG_DELAY_64
//! - \ref AON_RTC_CONFIG_DELAY_80
//! - \ref AON_RTC_CONFIG_DELAY_96
//! - \ref AON_RTC_CONFIG_DELAY_112
//! - \ref AON_RTC_CONFIG_DELAY_128
//! - \ref AON_RTC_CONFIG_DELAY_144
//!
//! \return None.
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCDelayConfig(uint32_t ui32Delay)
{
uint32_t ui32Cfg;
// Check the arguments.
ASSERT(ui32Delay <= AON_RTC_CONFIG_DELAY_144);
ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
ui32Cfg &= ~(AON_RTC_CTL_EV_DELAY_M);
ui32Cfg |= (ui32Delay << AON_RTC_CTL_EV_DELAY_S);
HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
}
//*****************************************************************************
//
//! \brief Configure the source of the combined event.
//!
//! A combined delayed event can be generated from a combination of the three
//! delayed events. Delayed events form the specified channels are OR'ed
//! together to generate the combined event.
//!
//! \param ui32Channels specifies the channels that are to be used for
//! generating the combined event.
//! The parameter must be the bitwise OR of any of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//! - \ref AON_RTC_CH_NONE
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCCombinedEventConfig(uint32_t ui32Channels)
{
uint32_t ui32Cfg;
// Check the arguments.
ASSERT( (ui32Channels & (AON_RTC_CH0 | AON_RTC_CH1 | AON_RTC_CH2)) ||
(ui32Channels == AON_RTC_CH_NONE) );
ui32Cfg = HWREG(AON_RTC_BASE + AON_RTC_O_CTL);
ui32Cfg &= ~(AON_RTC_CTL_COMB_EV_MASK_M);
ui32Cfg |= (ui32Channels << AON_RTC_CTL_COMB_EV_MASK_S);
HWREG(AON_RTC_BASE + AON_RTC_O_CTL) = ui32Cfg;
}
//*****************************************************************************
//
//! \brief Clear event from a specified channel.
//!
//! In case of an active event from the specified channel, the event
//! will be cleared (de-asserted).
//!
//! \param ui32Channel clears the event from one or more RTC channels:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCEventClear(uint32_t ui32Channel)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH0;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH1;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREG(AON_RTC_BASE + AON_RTC_O_EVFLAGS) = AON_RTC_EVFLAGS_CH2;
}
}
//*****************************************************************************
//
//! \brief Get event status for a specified channel.
//!
//! In case of an active event from the specified channel,
//! this call will return \c true otherwise \c false.
//!
//! \param ui32Channel specifies the channel from which to query the event state.
//! The parameter must be one (and only one) of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return Returns \c true if an event has occurred for the given channel,
//! otherwise \c false.
//
//*****************************************************************************
__STATIC_INLINE bool
AONRTCEventGet(uint32_t ui32Channel)
{
uint32_t uint32Event = 0;
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH0_BITN);
}
if(ui32Channel & AON_RTC_CH1)
{
uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH1_BITN);
}
if(ui32Channel & AON_RTC_CH2)
{
uint32Event = HWREGBITW(AON_RTC_BASE + AON_RTC_O_EVFLAGS, AON_RTC_EVFLAGS_CH2_BITN);
}
return(uint32Event);
}
//*****************************************************************************
//
//! \brief Get integer part (seconds) of RTC free-running timer.
//!
//! Get the value in seconds of RTC free-running timer, i.e. the integer part.
//! The fractional part is returned from a call to AONRTCFractionGet().
//!
//! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
//! of this function if the <16.16> format is sufficient.
//!
//! \note To read a consistent pair of integer and fractional parts,
//! \ref AONRTCSecGet() must be called first to trigger latching of the
//! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
//! must be disabled to ensure that these operations are performed atomically.
//!
//! \return Returns the integer part of RTC free running timer.
//!
//! \sa \ref AONRTCFractionGet() \ref AONRTCCurrentCompareValueGet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCSecGet(void)
{
// The following read gets the seconds, but also latches the fractional
// part.
return(HWREG(AON_RTC_BASE + AON_RTC_O_SEC));
}
//*****************************************************************************
//
//! \brief Get fractional part (sub-seconds) of RTC free-running timer.
//!
//! Get the value of the fractional part of RTC free-running timer, i.e. the
//! sub-second part.
//!
//! \note It is recommended to use \ref AONRTCCurrentCompareValueGet() instead
//! of this function if the <16.16> format is sufficient.
//!
//! \note To read a consistent pair of integer and fractional parts,
//! \ref AONRTCSecGet() must be called first to trigger latching of the
//! fractional part, which is then read by \ref AONRTCFractionGet(). Interrupts
//! must be disabled to ensure that these operations are performed atomically.
//!
//! \return Returns the fractional part of RTC free running timer.
//!
//! \sa \ref AONRTCSecGet() \ref AONRTCCurrentCompareValueGet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCFractionGet(void)
{
// Note1: It is recommended to use AON RTCCurrentCompareValueGet() instead
// of this function if the <16.16> format is sufficient.
// Note2: AONRTCSecGet() must be called before this function to get a
// consistent reading.
// Note3: Interrupts must be disabled between the call to AONRTCSecGet() and this
// call since there are interrupt functions that reads AON_RTC_O_SEC
return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSEC));
}
//*****************************************************************************
//
//! \brief Get the sub second increment of the RTC.
//!
//! Get the value of the sub-second increment which is added to the RTC
//! absolute time on every clock tick.
//!
//! \note For a precise and temperature independent LF clock (e.g. an LF XTAL)
//! this value would stay the same across temperature. For temperatue
//! dependent clock sources like an RC oscillator, this value will change
//! over time if the application includes functionality for doing temperature
//! compensation of the RTC clock source. The default value corresponds to a
//! LF clock frequency of exactly 32.768 kHz.
//!
//! \return Returns the sub-second increment of the RTC added to the overall
//! value on every RTC clock tick.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCSubSecIncrGet(void)
{
return(HWREG(AON_RTC_BASE + AON_RTC_O_SUBSECINC));
}
//*****************************************************************************
//
//! \brief Set operational mode of channel 1.
//!
//! Set the operational mode of channel 1. It can be capture or compare mode.
//! In capture mode, an external event causes the value of the free running
//! counter to be stored, to remember the time of the event.
//!
//! \note The default mode is compare.
//!
//! \param ui32Mode specifies the mode for channel 1.
//! The parameter must be one of the following:
//! - \ref AON_RTC_MODE_CH1_CAPTURE
//! - \ref AON_RTC_MODE_CH1_COMPARE
//!
//! \return None
//!
//! \sa AONRTCModeCh1Get()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCModeCh1Set(uint32_t ui32Mode)
{
// Check the arguments.
ASSERT((ui32Mode == AON_RTC_MODE_CH1_CAPTURE) ||
(ui32Mode == AON_RTC_MODE_CH1_COMPARE));
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN) = ui32Mode;
}
//*****************************************************************************
//
//! \brief Get operational mode of channel 1.
//!
//! Get the operational mode of channel 1. It can be capture or compare mode.
//! In capture mode, an external event causes the value of the free running
//! counter to be stored, to remember the time of the event.
//!
//! \return Returns the operational mode of channel 1, one of:
//! - \ref AON_RTC_MODE_CH1_CAPTURE
//! - \ref AON_RTC_MODE_CH1_COMPARE
//!
//! \sa AONRTCModeCh1Set()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCModeCh1Get(void)
{
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_CAPT_EN_BITN));
}
//*****************************************************************************
//
//! \brief Set operational mode of channel 2.
//!
//! Set the operational mode of channel 2. It can be in continuous compare
//! mode or normal compare mode.
//! In continuous mode, a value is automatically incremented to the channel 2
//! compare register, upon a channel 2 compare event. This allows channel 2 to
//! generate a series of completely equidistant events.
//! The increment value is set by the AONRTCIncValueCh2Set() call.
//!
//! \note The default mode is normal compare.
//!
//! \param ui32Mode specifies the mode for channel 2.
//! The parameter must be one of the following:
//! - \ref AON_RTC_MODE_CH2_CONTINUOUS
//! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
//!
//! \return None
//!
//! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCModeCh2Set(uint32_t ui32Mode)
{
// Check the arguments.
ASSERT((ui32Mode == AON_RTC_MODE_CH2_CONTINUOUS) ||
(ui32Mode == AON_RTC_MODE_CH2_NORMALCOMPARE));
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN) = ui32Mode;
}
//*****************************************************************************
//
//! \brief Get operational mode of channel 2.
//!
//! Get the operational mode of channel 2. It can be in continuous compare
//! mode or normal compare mode.
//! In continuous mode, a value is automatically incremented to the channel 2
//! compare register, upon a channel 2 compare event. This allows channel 2 to
//! generate a series of completely equidistant events.
//! The increment value is set by the AONRTCIncValueCh2Set() call.
//!
//! \return Returns the operational mode of channel 2, i.e. one of:
//! - \ref AON_RTC_MODE_CH2_CONTINUOUS
//! - \ref AON_RTC_MODE_CH2_NORMALCOMPARE
//!
//! \sa AONRTCIncValueCh2Set(), AONRTCIncValueCh2Get()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCModeCh2Get(void)
{
return(HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_CONT_EN_BITN));
}
//*****************************************************************************
//
//! \brief Enable event operation for the specified channel.
//!
//! Enable the event generation for the specified channel.
//!
//! \note The RTC free running clock must also be enabled globally using the
//! AONRTCEnable() call.
//!
//! \param ui32Channel specifies one or more channels to enable:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return None
//!
//! \sa AONRTCEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCChannelEnable(uint32_t ui32Channel)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 1;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 1;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 1;
}
}
//*****************************************************************************
//
//! \brief Disable event operation for the specified channel.
//!
//! Disable the event generation for the specified channel.
//!
//! \note The RTC free running clock can also be disabled globally using the
//! AONRTCDisable() call.
//!
//! \param ui32Channel specifies one or more channels to disable:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return None
//!
//! \sa AONRTCDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCChannelDisable(uint32_t ui32Channel)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH0_EN_BITN) = 0;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH1_EN_BITN) = 0;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREGBITW(AON_RTC_BASE + AON_RTC_O_CHCTL, AON_RTC_CHCTL_CH2_EN_BITN) = 0;
}
}
//*****************************************************************************
//
//! \brief Set the compare value for the given channel.
//!
//! Set compare value for the specified channel.
//!
//! The format of the compare value is a 16 bit integer and 16 bit fractional
//! format <16 sec.16 subsec>. The current value of the RTC counter
//! can be retrieved in a format compatible to the compare register using
//! \ref AONRTCCurrentCompareValueGet()
//!
//! \param ui32Channel specifies one or more channels to set compare value for:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//! \param ui32CompValue is the compare value to set for the specified channel.
//! - Format: <16 sec.16 subsec>
//!
//! \return None
//!
//! \sa AONRTCCurrentCompareValueGet()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCCompareValueSet(uint32_t ui32Channel, uint32_t ui32CompValue)
{
// Check the arguments.
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP) = ui32CompValue;
}
if(ui32Channel & AON_RTC_CH1)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP) = ui32CompValue;
}
if(ui32Channel & AON_RTC_CH2)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP) = ui32CompValue;
}
}
//*****************************************************************************
//
//! \brief Get the compare value for the given channel.
//!
//! Get compare value for the specified channel.
//!
//! \param ui32Channel specifies a channel.
//! The parameter must be one (and only one) of the following:
//! - \ref AON_RTC_CH0
//! - \ref AON_RTC_CH1
//! - \ref AON_RTC_CH2
//!
//! \return Returns the stored compare value for the given channel.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCCompareValueGet(uint32_t ui32Channel)
{
uint32_t ui32Value = 0;
// Check the arguments
ASSERT((ui32Channel == AON_RTC_CH0) ||
(ui32Channel == AON_RTC_CH1) ||
(ui32Channel == AON_RTC_CH2));
if(ui32Channel & AON_RTC_CH0)
{
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH0CMP);
}
if(ui32Channel & AON_RTC_CH1)
{
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH1CMP);
}
if(ui32Channel & AON_RTC_CH2)
{
ui32Value = HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMP);
}
return(ui32Value);
}
//*****************************************************************************
//
//! \brief Get the current value of the RTC counter in a format that matches
//! RTC compare values.
//!
//! The compare value registers contains 16 integer and 16 fractional bits.
//! This function will return the current value of the RTC counter in an
//! identical format.
//!
//! \note Reading SEC both before and after SUBSEC in order to detect if SEC
//! incremented while reading SUBSEC. If SEC incremented, we can't be sure
//! which SEC the SUBSEC belongs to, so repeating the sequence then.
//!
//! \return Returns the current value of the RTC counter in a <16.16> format
//! (SEC[15:0].SUBSEC[31:16]).
//!
//! \sa \ref AONRTCCompareValueSet()
//
//*****************************************************************************
extern uint32_t AONRTCCurrentCompareValueGet(void);
//*****************************************************************************
//
//! \brief Get the current 64-bit value of the RTC counter.
//!
//! \note Reading SEC both before and after SUBSEC in order to detect if SEC
//! incremented while reading SUBSEC. If SEC incremented, we can't be sure
//! which SEC the SUBSEC belongs to, so repeating the sequence then.
//!
//! \return Returns the current value of the RTC counter in a 64-bits format
//! (SEC[31:0].SUBSEC[31:0]).
//
//*****************************************************************************
extern uint64_t AONRTCCurrent64BitValueGet(void);
//*****************************************************************************
//
//! \brief Set the channel 2 increment value when operating in continuous mode.
//!
//! Set the channel 2 increment value when operating in continuous mode.
//! The specified value is automatically incremented to the channel 2 compare
//! register, upon a channel 2 compare event. This allows channel 2 to generate
//! a series of completely equidistant events.
//!
//! \param ui32IncValue is the increment value when operating in continuous mode.
//!
//! \return None
//!
//! \sa AONRTCIncValueCh2Get()
//
//*****************************************************************************
__STATIC_INLINE void
AONRTCIncValueCh2Set(uint32_t ui32IncValue)
{
HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC) = ui32IncValue;
}
//*****************************************************************************
//
//! \brief Get the channel2 increment value when operating in continuous mode.
//!
//! Get the channel 2 increment value, when channel 2 is operating in
//! continuous mode.
//! This value is automatically incremented to the channel 2 compare
//! register, upon a channel 2 compare event. This allows channel 2 to
//! generate a series of completely equidistant events.
//!
//! \return Returns the channel 2 increment value when operating in continuous
//! mode.
//!
//! \sa AONRTCIncValueCh2Set()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCIncValueCh2Get(void)
{
return(HWREG(AON_RTC_BASE + AON_RTC_O_CH2CMPINC));
}
//*****************************************************************************
//
//! \brief Get the channel 1 capture value.
//!
//! Get the channel 1 capture value.
//! The upper 16 bits of the returned value is the lower 16 bits of the
//! integer part of the RTC timer. The lower 16 bits of the returned part
//! is the upper 16 bits of the fractional part.
//!
//! \return Returns the channel 1 capture value.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONRTCCaptureValueCh1Get(void)
{
return(HWREG(AON_RTC_BASE + AON_RTC_O_CH1CAPT));
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONRTCCurrentCompareValueGet
#undef AONRTCCurrentCompareValueGet
#define AONRTCCurrentCompareValueGet ROM_AONRTCCurrentCompareValueGet
#endif
#ifdef ROM_AONRTCCurrent64BitValueGet
#undef AONRTCCurrent64BitValueGet
#define AONRTCCurrent64BitValueGet ROM_AONRTCCurrent64BitValueGet
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_RTC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aon_rtc_doc.h
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@@ -1,41 +0,0 @@
/******************************************************************************
* Filename: aon_rtc_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup aonrtc_api
//! @{
//! \section sec_aonrtc Introduction
//!
//! \note If using TI-RTOS then only TI-RTOS is allowed to configure the RTC timer!
//! @}
third_party/ti/devices/cc26x0/driverlib/aon_wuc.c
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@@ -1,224 +0,0 @@
/******************************************************************************
* Filename: aon_wuc.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AON Wake-Up Controller.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aon_wuc.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AONWUCAuxReset
#define AONWUCAuxReset NOROM_AONWUCAuxReset
#undef AONWUCRechargeCtrlConfigSet
#define AONWUCRechargeCtrlConfigSet NOROM_AONWUCRechargeCtrlConfigSet
#undef AONWUCOscConfig
#define AONWUCOscConfig NOROM_AONWUCOscConfig
#endif
//*****************************************************************************
//
//! Reset the AUX domain
//
//*****************************************************************************
void
AONWUCAuxReset(void)
{
// Reset the AUX domain.
// HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) |= AON_WUC_AUXCTL_RESET_REQ; // ROM version
HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCTL, AON_WUC_AUXCTL_RESET_REQ_BITN) = 1;
// Wait for AON interface to be in sync.
HWREG(AON_RTC_BASE + AON_RTC_O_SYNC);
// De-assert reset on the AUX domain.
// HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) &= ~AON_WUC_AUXCTL_RESET_REQ; // ROM version
HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCTL, AON_WUC_AUXCTL_RESET_REQ_BITN) = 0;
// Wait for AON interface to be in sync.
HWREG(AON_RTC_BASE + AON_RTC_O_SYNC);
}
//*****************************************************************************
//
//! Configure the recharge controller
//
//*****************************************************************************
void
AONWUCRechargeCtrlConfigSet(bool bAdaptEnable, uint32_t ui32AdaptRate,
uint32_t ui32Period, uint32_t ui32MaxPeriod)
{
uint32_t ui32Shift;
uint32_t ui32C1;
uint32_t ui32C2;
uint32_t ui32Reg;
uint32_t ui32Exponent;
uint32_t ui32MaxExponent;
uint32_t ui32Mantissa;
uint32_t ui32MaxMantissa;
// Check the arguments.
ASSERT((ui32AdaptRate >= RC_RATE_MIN) ||
(ui32AdaptRate <= RC_RATE_MAX));
ui32C1 = 0;
ui32C2 = 0;
ui32Shift = 9;
// Clear the previous values.
ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG);
ui32Reg &= ~(AON_WUC_RECHARGECFG_MAX_PER_M_M | AON_WUC_RECHARGECFG_MAX_PER_E_M |
AON_WUC_RECHARGECFG_ADAPTIVE_EN_M | AON_WUC_RECHARGECFG_PER_M_M |
AON_WUC_RECHARGECFG_PER_E_M | AON_WUC_RECHARGECFG_C1_M |
AON_WUC_RECHARGECFG_C2_M);
// Check if the recharge controller adaptation algorithm should be active.
if(bAdaptEnable)
{
// Calculate adaptation parameters.
while(ui32AdaptRate)
{
if(ui32AdaptRate & (1 << ui32Shift))
{
if(!ui32C1)
{
ui32C1 = ui32Shift;
}
else if(!ui32C2)
{
if((2 * ui32AdaptRate) > ((uint32_t)(3 << ui32Shift)))
{
ui32C2 = ui32Shift + 1;
}
else
{
ui32C2 = ui32Shift;
}
}
else
{
break;
}
ui32AdaptRate &= ~(1 << ui32Shift);
}
ui32Shift--;
}
if(!ui32C2)
{
ui32C2 = ui32C1 = ui32C1 - 1;
}
ui32C1 = 10 - ui32C1;
ui32C2 = 10 - ui32C2;
// Update the recharge rate parameters.
ui32Reg &= ~(AON_WUC_RECHARGECFG_C1_M | AON_WUC_RECHARGECFG_C2_M);
ui32Reg |= (ui32C1 << AON_WUC_RECHARGECFG_C1_S) |
(ui32C2 << AON_WUC_RECHARGECFG_C2_S) |
AON_WUC_RECHARGECFG_ADAPTIVE_EN_M;
}
// Resolve the period into an exponent and mantissa.
ui32Period = (ui32Period >> 4);
ui32Exponent = 0;
while(ui32Period > (AON_WUC_RECHARGECFG_PER_M_M >> AON_WUC_RECHARGECFG_PER_M_S))
{
ui32Period >>= 1;
ui32Exponent++;
}
ui32Mantissa = ui32Period;
// Resolve the max period into an exponent and mantissa.
ui32MaxPeriod = (ui32MaxPeriod >> 4);
ui32MaxExponent = 0;
while(ui32MaxPeriod > (AON_WUC_RECHARGECFG_MAX_PER_M_M >> AON_WUC_RECHARGECFG_MAX_PER_M_S))
{
ui32MaxPeriod >>= 1;
ui32MaxExponent++;
}
ui32MaxMantissa = ui32MaxPeriod;
// Configure the controller.
ui32Reg |= ((ui32MaxMantissa << AON_WUC_RECHARGECFG_MAX_PER_M_S) |
(ui32MaxExponent << AON_WUC_RECHARGECFG_MAX_PER_E_S) |
(ui32Mantissa << AON_WUC_RECHARGECFG_PER_M_S) |
(ui32Exponent << AON_WUC_RECHARGECFG_PER_E_S));
HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG) = ui32Reg;
}
//*****************************************************************************
//
//! Configure the interval for oscillator amplitude calibration
//
//*****************************************************************************
void
AONWUCOscConfig(uint32_t ui32Period)
{
uint32_t ui32Mantissa;
uint32_t ui32Exponent;
uint32_t ui32Reg;
// Resolve the period into a exponent and mantissa.
ui32Period = (ui32Period >> 4);
ui32Exponent = 0;
while(ui32Period > (AON_WUC_OSCCFG_PER_M_M >> AON_WUC_OSCCFG_PER_M_S))
{
ui32Period >>= 1;
ui32Exponent++;
}
ui32Mantissa = ui32Period;
// Update the period for the oscillator amplitude calibration.
HWREG(AON_WUC_BASE + AON_WUC_O_OSCCFG) =
(ui32Mantissa << AON_WUC_OSCCFG_PER_M_S) |
(ui32Exponent << AON_WUC_OSCCFG_PER_E_S);
// Set the maximum recharge period equal to the oscillator amplitude
// calibration period.
ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG);
ui32Reg &= ~(AON_WUC_RECHARGECFG_MAX_PER_M_M | AON_WUC_RECHARGECFG_MAX_PER_E_M);
ui32Reg |= ((ui32Mantissa << AON_WUC_RECHARGECFG_MAX_PER_M_S) |
(ui32Exponent << AON_WUC_RECHARGECFG_MAX_PER_E_S));
// Write the configuration.
HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG) = ui32Reg;
}
third_party/ti/devices/cc26x0/driverlib/aon_wuc.h
Vendored
-838
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@@ -1,838 +0,0 @@
/******************************************************************************
* Filename: aon_wuc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AON Wake-Up Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aon_group
//! @{
//! \addtogroup aonwuc_api
//! @{
//
//*****************************************************************************
#ifndef __AON_WUC_H__
#define __AON_WUC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_aon_wuc.h"
#include "../inc/hw_aon_rtc.h"
#include "interrupt.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AONWUCAuxReset NOROM_AONWUCAuxReset
#define AONWUCRechargeCtrlConfigSet NOROM_AONWUCRechargeCtrlConfigSet
#define AONWUCOscConfig NOROM_AONWUCOscConfig
#endif
//*****************************************************************************
//
// Defines the possible clock source for the MCU and AUX domain.
//
//*****************************************************************************
#define AONWUC_CLOCK_SRC_HF 0x00000003 // System clock high frequency -
// 48 MHz.
#define AONWUC_CLOCK_SRC_LF 0x00000001 // System clock low frequency -
// 32 kHz.
#define AONWUC_NO_CLOCK 0x00000000 // System clock low frequency -
// 32 kHz.
//*****************************************************************************
//
// Defines the possible clock division factors for the AUX domain.
//
//*****************************************************************************
#define AUX_CLOCK_DIV_2 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV2 )
#define AUX_CLOCK_DIV_4 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV4 )
#define AUX_CLOCK_DIV_8 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV8 )
#define AUX_CLOCK_DIV_16 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV16 )
#define AUX_CLOCK_DIV_32 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV32 )
#define AUX_CLOCK_DIV_64 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV64 )
#define AUX_CLOCK_DIV_128 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV128 )
#define AUX_CLOCK_DIV_256 ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV256 )
#define AUX_CLOCK_DIV_UNUSED ( AON_WUC_AUXCLK_SCLK_HF_DIV_M + ( 1 << AON_WUC_AUXCLK_SCLK_HF_DIV_S ))
#define AUX_CLOCK_DIV_M ( AON_WUC_AUXCLK_SCLK_HF_DIV_M )
//*****************************************************************************
//
// Defines used for configuring the power-off and wake up procedure.
//
//*****************************************************************************
#define MCU_VIRT_PWOFF_DISABLE 0x00000000
#define MCU_VIRT_PWOFF_ENABLE 0x00020000
#define MCU_IMM_WAKE_UP 0x00000000
#define MCU_FIXED_WAKE_UP 0x00010000
#define AUX_VIRT_PWOFF_DISABLE 0x00000000
#define AUX_VIRT_PWOFF_ENABLE 0x00020000
#define AUX_IMM_WAKE_UP 0x00000000
#define AUX_FIXED_WAKE_UP 0x00010000
//*****************************************************************************
//
// Defines that can be be used to enable/disable the entire SRAM and the
// retention on the SRAM in both the MCU and the AUX domain.
//
//*****************************************************************************
#define MCU_RAM0_RETENTION 0x00000001
#define MCU_RAM1_RETENTION 0x00000002
#define MCU_RAM2_RETENTION 0x00000004
#define MCU_RAM3_RETENTION 0x00000008
#define MCU_RAM_BLOCK_RETENTION 0x0000000F
#define MCU_AUX_RET_ENABLE 0x00000001
//*****************************************************************************
//
// Defines for different wake up modes for AUX domain which can be set using
// AONWUCAuxWakeUpEvent() .
//
//*****************************************************************************
#define AONWUC_AUX_WAKEUP 0x00000001
#define AONWUC_AUX_ALLOW_SLEEP 0x00000000
//*****************************************************************************
//
// Defines for all the different power modes available through
// AONWUCPowerStatusGet() .
//
//*****************************************************************************
#define AONWUC_OSC_GBIAS_REQ 0x00400000 // OSC is requesting GBias
#define AONWUC_AUX_GBIAS_REQ 0x00200000 // AUX is requesting GBias
#define AONWUC_MCU_GBIAS_REQ 0x00100000 // MCU is requesting GBias
#define AONWUC_OSC_BGAP_REQ 0x00040000 // OSC is requesting BGap
#define AONWUC_AUX_BGAP_REQ 0x00020000 // AUX is requesting BGap
#define AONWUC_MCU_BGAP_REQ 0x00010000 // MCU is requesting BGap
#define AONWUC_GBIAS_ON 0x00002000 // Global Bias is on
#define AONWUC_BGAP_ON 0x00001000 // Band Gap is on
#define AONWUC_AUX_POWER_DOWN 0x00000200 // AUX is in powerdown mode
#define AONWUC_MCU_POWER_DOWN 0x00000100 // MCU is in powerdown mode
#define AONWUC_JTAG_POWER_ON 0x00000040 // JTAG is powered on
#define AONWUC_AUX_POWER_ON 0x00000020 // AUX is powered on
#define AONWUC_MCU_POWER_ON 0x00000010 // MCU is powered on
#define AONWUC_SPLY_POWER_DOWN 0x00000001 // Power supply is in power down
//*****************************************************************************
//
// RAM repair status bits. Values are returned by AOXWUCRamRepairStatusGet() .
//
//*****************************************************************************
#define MCU_RAMREPAIR_DONE 0x00000001
#define AUX_RAMREPAIR_DONE 0x00000002
//*****************************************************************************
//*****************************************************************************
#define RC_RATE_MAX 768 // Maximum recharge rate for the
// recharge controller.
#define RC_RATE_MIN 2 // Minimum recharge rate for the
// recharge controller.
//*****************************************************************************
#define AONWUC_MCU_RESET_SRC 0x00000002 // MCU reset source can be SW or
// JTAG
#define AONWUC_MCU_WARM_RESET 0x00000001 // MCU reset type and can be warm
// or not warm.
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Configure the power down clock for the MCU domain.
//!
//! Use this function to control which one of the clock sources that
//! is fed into the MCU domain when the system is in standby mode. When the
//! power is back in Active mode the clock source will automatically switch to
//! \ref AONWUC_CLOCK_SRC_HF.
//!
//! Each clock is fed 'as is' into the MCU domain, since the MCU domain
//! contains internal clock dividers controllable through the PRCM.
//!
//! \param ui32ClkSrc is the clock source for the MCU domain when in power
//! down. Values available as clock source:
//! - \ref AONWUC_NO_CLOCK
//! - \ref AONWUC_CLOCK_SRC_LF
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCMcuPowerDownConfig(uint32_t ui32ClkSrc)
{
uint32_t ui32Reg;
// Check the arguments.
ASSERT((ui32ClkSrc == AONWUC_NO_CLOCK) ||
(ui32ClkSrc == AONWUC_CLOCK_SRC_LF));
// Set the clock source for the MCU domain when in power down.
ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_MCUCLK);
ui32Reg &= ~AON_WUC_MCUCLK_PWR_DWN_SRC_M;
HWREG(AON_WUC_BASE + AON_WUC_O_MCUCLK) = ui32Reg |
(ui32ClkSrc <<
AON_WUC_MCUCLK_PWR_DWN_SRC_S);
}
//*****************************************************************************
//
//! \brief Configure the power down mode for the MCU domain.
//!
//! The parameter \c ui32Mode determines the power down mode of the MCU Voltage
//! Domain. When the AON WUC receives a request to power off the MCU domain it
//! can choose to power off completely or use a virtual power-off. In a virtual
//! power-off, reset is asserted and the clock is stopped but the power to the
//! domain is kept on.
//!
//! \param ui32Mode defines the power down mode of the MCU domain.
//! Allowed values for setting the virtual power-off are:
//! - \ref MCU_VIRT_PWOFF_DISABLE
//! - \ref MCU_VIRT_PWOFF_ENABLE
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCMcuPowerOffConfig(uint32_t ui32Mode)
{
// Check the arguments.
ASSERT((ui32Mode == MCU_VIRT_PWOFF_ENABLE) ||
(ui32Mode == MCU_VIRT_PWOFF_DISABLE));
// Set the powerdown mode.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_MCUCFG, AON_WUC_MCUCFG_VIRT_OFF_BITN) = (ui32Mode != 0);
}
//*****************************************************************************
//
//! \brief Configure the wake-up procedure for the MCU domain.
//!
//! The MCU domain can wake up using two different procedures. Either it wakes
//! up immediately following the triggering event or wake-up is forced to
//! happen a fixed number of 32 KHz clocks following the triggering
//! event. The last can be used to compensate for any variable delays caused
//! by other activities going on at the time of wakeup (such as a recharge
//! event, etc.).
//!
//! \param ui32WakeUp determines the timing of the MCU wake up procedure.
//! - \ref MCU_IMM_WAKE_UP
//! - \ref MCU_FIXED_WAKE_UP
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCMcuWakeUpConfig(uint32_t ui32WakeUp)
{
// Check the arguments.
ASSERT((ui32WakeUp == MCU_IMM_WAKE_UP) ||
(ui32WakeUp == MCU_FIXED_WAKE_UP));
// Configure the wake up procedure.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_MCUCFG, AON_WUC_MCUCFG_FIXED_WU_EN_BITN) = (ui32WakeUp != 0);
}
//*****************************************************************************
//
//! \brief Configure the retention on the block RAM in the MCU domain.
//!
//! MCU SRAM is partitioned into 4 banks of 1k x 32 each. The SRAM supports
//! retention on all 4 blocks. The retention on the SRAM can be turned on and
//! off. Use this function to enable the retention on the individual blocks.
//!
//! If a block is not represented in the parameter \c ui32Retention then the
//! the retention will be disabled for that block.
//!
//! \note Retention on the SRAM is not enabled by default. If retention is
//! turned off on all RAM blocks then the SRAM is powered off when it would
//! otherwise be put in retention mode.
//!
//! \param ui32Retention defines which RAM blocks to enable/disable retention on.
//! To enable retention on individual parts of the RAM use a bitwise OR'ed
//! combination of:
//! - \ref MCU_RAM0_RETENTION
//! - \ref MCU_RAM1_RETENTION
//! - \ref MCU_RAM2_RETENTION
//! - \ref MCU_RAM3_RETENTION
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCMcuSRamConfig(uint32_t ui32Retention)
{
uint32_t ui32Reg;
// Check the arguments.
ASSERT(ui32Retention & MCU_RAM_BLOCK_RETENTION);
ASSERT(!(ui32Retention & ~MCU_RAM_BLOCK_RETENTION));
// Configure the retention.
ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_MCUCFG) & ~MCU_RAM_BLOCK_RETENTION;
ui32Reg |= ui32Retention;
HWREG(AON_WUC_BASE + AON_WUC_O_MCUCFG) = ui32Reg;
}
//*****************************************************************************
//
//! \brief Return the clock configuration for the AUX domain.
//!
//! The AUX domain does not have a local clock divider, so the AON WUC contains
//! a dedicated clock divider for AUX domain. Use this function to
//! get the setting of the clock divider.
//!
//! \return Return the clock configuration. Enumerated return values are:
//! - \ref AUX_CLOCK_DIV_2
//! - \ref AUX_CLOCK_DIV_4
//! - \ref AUX_CLOCK_DIV_8
//! - \ref AUX_CLOCK_DIV_16
//! - \ref AUX_CLOCK_DIV_32
//! - \ref AUX_CLOCK_DIV_64
//! - \ref AUX_CLOCK_DIV_128
//! - \ref AUX_CLOCK_DIV_256
//!
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONWUCAuxClockConfigGet(void)
{
// Return the clock divider value.
return ((HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK) &
AON_WUC_AUXCLK_SCLK_HF_DIV_M) >>
AON_WUC_AUXCLK_SCLK_HF_DIV_S);
}
//*****************************************************************************
//
//! \brief Configure the power down mode for the AUX domain.
//!
//! Use this function to control which one of the clock sources that
//! is fed into the MCU domain when it is in Power Down mode. When the Power
//! is back in active mode the clock source will automatically switch to
//! \ref AONWUC_CLOCK_SRC_HF.
//!
//! Each clock is fed 'as is' into the AUX domain, since the AUX domain
//! contains internal clock dividers controllable through the PRCM.
//!
//! \param ui32ClkSrc is the clock source for the AUX domain when in power down.
//! - \ref AONWUC_NO_CLOCK
//! - \ref AONWUC_CLOCK_SRC_LF
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCAuxPowerDownConfig(uint32_t ui32ClkSrc)
{
uint32_t ui32Reg;
// Check the arguments.
ASSERT((ui32ClkSrc == AONWUC_NO_CLOCK) ||
(ui32ClkSrc == AONWUC_CLOCK_SRC_LF));
// Set the clock source for the AUX domain when in power down.
ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK);
ui32Reg &= ~AON_WUC_AUXCLK_PWR_DWN_SRC_M;
HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK) = ui32Reg |
(ui32ClkSrc <<
AON_WUC_AUXCLK_PWR_DWN_SRC_S);
}
//*****************************************************************************
//
//! \brief Configure the retention on the AUX SRAM.
//!
//! The AUX SRAM contains only one block which supports retention. The retention
//! on the SRAM can be turned on and off. Use this function to enable/disable
//! the retention on the entire RAM.
//!
//! \param ui32Retention either enables or disables AUX SRAM retention.
//! - 0 : Disable retention.
//! - 1 : Enable retention.
//!
//! \note Retention on the SRAM is not enabled by default. If retention is
//! turned off then the SRAM is powered off when it would otherwise be put in
//! retention mode.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCAuxSRamConfig(uint32_t ui32Retention)
{
// Enable/disable the retention.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCFG, AON_WUC_AUXCFG_RAM_RET_EN_BITN) = ui32Retention;
}
//*****************************************************************************
//
//! \brief Control the wake up procedure of the AUX domain.
//!
//! The AUX domain can be woken in two different modes. In both modes power
//! is turned on. In one mode a software event is generated for the
//! Sensor Controller and it is allowed to start processing. The second mode will
//! just force power on the Sensor Controller. If System CPU requires exclusive access
//! to the AUX domain resources, it is advised to ensure that the image in
//! the Sensor Controller memory is declared invalid. This can be achieved by
//! calling AONWUCAuxImageInvalid().
//!
//! \note Any writes to the AON interface must pass a 32 kHz clock boundary,
//! and is therefore relatively slow. To ensure that a given write is
//! complete the value of the register can be read back after write.
//
//! \note When accessing the AUX domain from the System CPU, it is advised always to
//! have set the AUX in at least \ref AONWUC_AUX_WAKEUP. This overwrites any
//! instruction from the Sensor Controller and ensures that the AUX domain
//! is on so it won't leave the System CPU hanging.
//!
//! \param ui32Mode is the wake up mode for the AUX domain.
//! - \ref AONWUC_AUX_WAKEUP
//! - \ref AONWUC_AUX_ALLOW_SLEEP
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCAuxWakeupEvent(uint32_t ui32Mode)
{
// Check the arguments.
ASSERT((ui32Mode == AONWUC_AUX_WAKEUP) ||
(ui32Mode == AONWUC_AUX_ALLOW_SLEEP));
// Wake up the AUX domain.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCTL, AON_WUC_AUXCTL_AUX_FORCE_ON_BITN) = ui32Mode;
}
//*****************************************************************************
//
//! \brief Reset the AUX domain.
//!
//! Use this function to reset the entire AUX domain. The write to the AON_WUC
//! module must pass an 32 kHz clock boundary. By reading the
//! AON_RTC_O_SYNC register after each write, it is guaranteed that the AON
//! interface will be in sync and that both the assert and the de-assert of the
//! reset signal to AUX will propagate.
//!
//! \note This requires two writes and two reads on a 32 kHz clock boundary.
//!
//! \return None
//
//*****************************************************************************
extern void AONWUCAuxReset(void);
//*****************************************************************************
//
//! \brief Tells the Sensor Controller that the image in memory is valid.
//!
//! Use this function to tell the sensor controller that the image in memory is
//! valid, and it is allowed to start executing the program.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCAuxImageValid(void)
{
// Tell the Sensor Controller that the image in memory is valid.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCTL, AON_WUC_AUXCTL_SCE_RUN_EN_BITN) = 1;
}
//*****************************************************************************
//
//! \brief Tells the Sensor Controller that the image in memory is invalid.
//!
//! Use this function to tell the sensor controller that the image in memory is
//! invalid. Sensor Controller might wake up, but it will stay idle.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCAuxImageInvalid(void)
{
// Tell the Sensor Controller that the image in memory is invalid.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCTL, AON_WUC_AUXCTL_SCE_RUN_EN_BITN) = 0;
}
//*****************************************************************************
//
//! \brief Get the power status of the device.
//!
//! The Always On (AON) domain is the only part of the device which is truly
//! "ALWAYS ON". The power status for the other device can always be read from
//! this status register.
//!
//! Possible power modes for the different parts of the device are:
//!
//! \return Returns the current power status of the device as a bitwise OR'ed
//! combination of these values:
//! - \ref AONWUC_AUX_POWER_DOWN
//! - \ref AONWUC_AUX_POWER_ON
//! - \ref AONWUC_JTAG_POWER_ON
//! - \ref AONWUC_MCU_POWER_ON
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONWUCPowerStatusGet(void)
{
// Return the power status.
return (HWREG(AON_WUC_BASE + AON_WUC_O_PWRSTAT));
}
//*****************************************************************************
//
//! \brief Enable shut-down of the device.
//!
//! Use this function to enable shut-down of the device. This will force all I/O values to
//! be latched - possibly enabling I/O wakeup - then all internal power
//! supplies are turned off, effectively putting the device into shut-down mode.
//!
//! \note No action will take place before the System CPU is put to deep sleep.
//!
//! \note The shut-down command is ignored if the JTAG interface has been
//! activated.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCShutDownEnable(void)
{
// Ensure the JTAG domain is turned off;
// otherwise MCU domain can't be turned off.
HWREG(AON_WUC_BASE + AON_WUC_O_JTAGCFG) = 0;
// Enable shutdown of the device.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_CTL0, AON_WUC_CTL0_PWR_DWN_DIS_BITN) = 0;
HWREG(AON_WUC_BASE + AON_WUC_O_SHUTDOWN) = AON_WUC_SHUTDOWN_EN;
}
//*****************************************************************************
//
//! \brief Enable power down mode on AUX and MCU domain.
//!
//! Use this function to enable powerdown on the AUX and MCU domain.
//!
//! \note The powerdown command is ignored if the JTAG interface has been
//! activated.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCDomainPowerDownEnable(void)
{
// Ensure the JTAG domain is turned off;
// otherwise MCU domain can't be turned off.
HWREG(AON_WUC_BASE + AON_WUC_O_JTAGCFG) = 0;
// Enable power down mode.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_CTL0, AON_WUC_CTL0_PWR_DWN_DIS_BITN) = 0;
}
//*****************************************************************************
//
//! \brief Use this function to disable power down mode of the MCU and AUX domain.
//!
//! Disabling powerdown on the MCU and/or AUX will put the domains in a
//! virtual power down when requesting to be powered down. Logic is the same
//! but power is kept on.
//!
//! \return None.
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCDomainPowerDownDisable(void)
{
// Disable power down mode.
HWREGBITW(AON_WUC_BASE + AON_WUC_O_CTL0, AON_WUC_CTL0_PWR_DWN_DIS_BITN) = 1;
}
//*****************************************************************************
//
//! \brief Use this function to clear specific status bits.
//!
//! Use this function to clear the bits that are set in the AON WUC status
//! register. This register requires a write 1 to clear.
//!
//! AON Wake Up Controller TAP can request a total/full Flash erase. If so,
//! the corresponding status bits will be set in the status register and can
//! be read using \ref AONWUCMcuResetStatusGet() or cleared using this function. The reset
//! source and type give information about what and how the latest reset
//! was performed. Access to these bits are identical to the flash erase
//! bits.
//!
//! \param ui32Status defines in a one-hot encoding which bits to clear in the
//! status register. Use OR'ed combinations of the following:
//! - \ref AONWUC_MCU_RESET_SRC
//! - \ref AONWUC_MCU_WARM_RESET
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCMcuResetClear(uint32_t ui32Status)
{
// Check the arguments.
ASSERT((ui32Status & AONWUC_MCU_RESET_SRC) ||
(ui32Status & AONWUC_MCU_WARM_RESET));
// Clear the status bits.
HWREG(AON_WUC_BASE + AON_WUC_O_CTL1) = ui32Status;
}
//*****************************************************************************
//
//! \brief Return the reset status.
//!
//! This function returns the value of the AON_WUC_O_CTL1 register.
//!
//! \return Returns the status from the AON WUC.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONWUCMcuResetStatusGet(void)
{
// Return the current status.
return (HWREG(AON_WUC_BASE + AON_WUC_O_CTL1));
}
//*****************************************************************************
//
//! \brief Configure the recharge controller.
//!
//! The parameter \c bAdaptEnable is used to enable or disable the adaptive
//! algorithm for the recharge controller.
//! The adaptive algorithm for the recharge controller is defined as
//!
/*!
\verbatim
New_Period = Period * (1 + (AdaptRate / 1024) )
AdaptRate
----------- = ( 2^(-C1) + 2^(-C2) )
1024
\endverbatim
*/
//!
//! Where C1 is between 1 and 10 and C2 is between 2 and 10. The \c ui32AdaptRate
//! must be a number between 2 and 768 (\ref RC_RATE_MIN and \ref RC_RATE_MAX)
//! resulting in an adaptive rate between 0.2% and 75%.
//!
//! The \c ui32Period is the number of 32 KHz clocks between two recharges. The
//! length of the interval is defined by the formula:
//!
/*!
\verbatim
Period = ({ulMantissa,5'b1111} << ui32Exponent)
\endverbatim
*/
//!
//! \note The maximum number of recharge cycles is required when enabling the
//! adaptive recharge algorithm.
//!
//! \note The maximum period between two recharges should never exceed the
//! period between two oscillator amplitude calibrations which is configured
//! using AONWUCOscConfig().
//!
//! \param bAdaptEnable enables the adaptation algorithm for the controller.
//! \param ui32AdaptRate determines the adjustment value for the adoption
//! algorithm.
//! \param ui32Period determines the number of clock cycles between each
//! activation of the recharge controller.
//! \param ui32MaxPeriod determines the maximum number of clock cycles between
//! each activation of the recharge controller.
//!
//! \return None
//
//*****************************************************************************
extern void AONWUCRechargeCtrlConfigSet(bool bAdaptEnable,
uint32_t ui32AdaptRate,
uint32_t ui32Period,
uint32_t ui32MaxPeriod);
//*****************************************************************************
//
//! \brief Get the current configuration of the recharge controller.
//!
//! This function returns the value of the register AON_WUC_O_RECHARGECFG.
//!
//! \return Returns the current configuration of the recharge controller.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AONWUCRechargeCtrlConfigGet(void)
{
// Return the current configuration.
return(HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG));
}
//*****************************************************************************
//
//! \brief Configure the interval for oscillator amplitude calibration.
//!
//! Use this function to set the number of 32 kHz clocks between oscillator
//! amplitude calibrations.
//!
//! The value of the interval is defined by the formula:
//!
/*!
\verbatim
Period = ({ulMantissa,5'b1111} << ui32Exponent)
\endverbatim
*/
//!
//! \note When this counter expires an oscillator amplitude calibration is
//! triggered immediately in Active mode. When this counter expires in
//! Powerdown mode an internal flag is set that causes GBIAS to turn on
//! together with BGAP when the next recharge occurs, at the same time
//! triggering the oscillator amplitude calibration as well as a recharge of
//! the uLDO reference voltage.
//!
//! \note The oscillator amplitude calibration is performed at the same time
//! as the recharge for the uLDO reference voltage. So the maximum period
//! between each recharge operation should not exceed the number of clock
//! cycles for the amplitude calibration.
//!
//! \param ui32Period is the number of 32 kHz clock cycles in each interval.
//!
//! \return None
//
//*****************************************************************************
extern void AONWUCOscConfig(uint32_t ui32Period);
//*****************************************************************************
//
//! \brief Request power off of the JTAG domain.
//!
//! The JTAG domain is automatically powered up on if a debugger is connected.
//! If a debugger is not connected this function can be used to power off the
//! JTAG domain.
//!
//! \note Achieving the lowest power modes (shutdown/powerdown) requires the
//! JTAG domain to be turned off. In general the JTAG domain should never be
//! powered in production code.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AONWUCJtagPowerOff(void)
{
// Request the power off of the Jtag domain
HWREG(AON_WUC_BASE + AON_WUC_O_JTAGCFG) = 0;
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AONWUCAuxReset
#undef AONWUCAuxReset
#define AONWUCAuxReset ROM_AONWUCAuxReset
#endif
#ifdef ROM_AONWUCRechargeCtrlConfigSet
#undef AONWUCRechargeCtrlConfigSet
#define AONWUCRechargeCtrlConfigSet ROM_AONWUCRechargeCtrlConfigSet
#endif
#ifdef ROM_AONWUCOscConfig
#undef AONWUCOscConfig
#define AONWUCOscConfig ROM_AONWUCOscConfig
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AON_WUC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aux_adc.c
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@@ -1,333 +0,0 @@
/******************************************************************************
* Filename: aux_adc.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AUX Time to Digital Converter interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_adc.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_wuc.h"
#include "../inc/hw_fcfg1.h"
#include "adi.h"
#include "event.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXADCDisable
#define AUXADCDisable NOROM_AUXADCDisable
#undef AUXADCEnableAsync
#define AUXADCEnableAsync NOROM_AUXADCEnableAsync
#undef AUXADCEnableSync
#define AUXADCEnableSync NOROM_AUXADCEnableSync
#undef AUXADCDisableInputScaling
#define AUXADCDisableInputScaling NOROM_AUXADCDisableInputScaling
#undef AUXADCFlushFifo
#define AUXADCFlushFifo NOROM_AUXADCFlushFifo
#undef AUXADCReadFifo
#define AUXADCReadFifo NOROM_AUXADCReadFifo
#undef AUXADCPopFifo
#define AUXADCPopFifo NOROM_AUXADCPopFifo
#undef AUXADCGetAdjustmentGain
#define AUXADCGetAdjustmentGain NOROM_AUXADCGetAdjustmentGain
#undef AUXADCGetAdjustmentOffset
#define AUXADCGetAdjustmentOffset NOROM_AUXADCGetAdjustmentOffset
#undef AUXADCValueToMicrovolts
#define AUXADCValueToMicrovolts NOROM_AUXADCValueToMicrovolts
#undef AUXADCMicrovoltsToValue
#define AUXADCMicrovoltsToValue NOROM_AUXADCMicrovoltsToValue
#undef AUXADCAdjustValueForGainAndOffset
#define AUXADCAdjustValueForGainAndOffset NOROM_AUXADCAdjustValueForGainAndOffset
#undef AUXADCUnadjustValueForGainAndOffset
#define AUXADCUnadjustValueForGainAndOffset NOROM_AUXADCUnadjustValueForGainAndOffset
#endif
//*****************************************************************************
//
// Disables the ADC
//
//*****************************************************************************
void
AUXADCDisable(void)
{
// Disable the ADC reference
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, ADI_4_AUX_ADCREF0_EN_M | ADI_4_AUX_ADCREF0_REF_ON_IDLE_M | ADI_4_AUX_ADCREF0_SRC_M);
// Assert reset and disable the ADC
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M | ADI_4_AUX_ADC0_SMPL_MODE_M | ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M);
// Ensure that scaling is enabled by default before next use of the ADC
ADI8BitsClear(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);
// Disable the ADC clock (no need to wait since IOB_WUC_ADCCLKCTL_ACK goes low immediately)
HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = 0;
// Disable the ADC data interface
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = 0;
}
//*****************************************************************************
//
// Enables the ADC for asynchronous operation
//
//*****************************************************************************
void
AUXADCEnableAsync(uint32_t refSource, uint32_t trigger)
{
// Enable the ADC reference, with the following options:
// - SRC: Set when using relative reference
// - REF_ON_IDLE: Always cleared since there is no idle state in asynchronous operation
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, refSource | ADI_4_AUX_ADCREF0_EN_M);
// Enable the ADC clock
HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = AUX_WUC_ADCCLKCTL_REQ_M;
while (!(HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) & AUX_WUC_ADCCLKCTL_ACK_M));
// Enable the ADC data interface
if (trigger == AUXADC_TRIGGER_MANUAL) {
// Manual trigger: No need to configure event routing from GPT
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT0 | AUX_ANAIF_ADCCTL_CMD_EN;
} else {
// GPT trigger: Configure event routing via MCU_EV to the AUX domain
HWREG(EVENT_BASE + EVENT_O_AUXSEL0) = trigger;
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_CMD_EN;
}
// Configure the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_SMPL_MODE_M);
// Release reset and enable the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}
//*****************************************************************************
//
// Enables the ADC for synchronous operation
//
//*****************************************************************************
void
AUXADCEnableSync(uint32_t refSource, uint32_t sampleTime, uint32_t trigger)
{
// Enable the ADC reference, with the following options:
// - SRC: Set when using relative reference
// - REF_ON_IDLE: Set when using fixed reference and sample time < 21.3 us
uint8_t adcref0 = refSource | ADI_4_AUX_ADCREF0_EN_M;
if (!refSource && (sampleTime < AUXADC_SAMPLE_TIME_21P3_US)) {
adcref0 |= ADI_4_AUX_ADCREF0_REF_ON_IDLE_M;
}
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADCREF0, adcref0);
// Enable the ADC clock
HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) = AUX_WUC_ADCCLKCTL_REQ_M;
while (!(HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) & AUX_WUC_ADCCLKCTL_ACK_M));
// Enable the ADC data interface
if (trigger == AUXADC_TRIGGER_MANUAL) {
// Manual trigger: No need to configure event routing from GPT
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_NO_EVENT0 | AUX_ANAIF_ADCCTL_CMD_EN;
} else {
// GPT trigger: Configure event routing via MCU_EV to the AUX domain
HWREG(EVENT_BASE + EVENT_O_AUXSEL0) = trigger;
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL) = AUX_ANAIF_ADCCTL_START_SRC_MCU_EV | AUX_ANAIF_ADCCTL_CMD_EN;
}
// Configure the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, sampleTime << ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S);
// Release reset and enable the ADC
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC0, ADI_4_AUX_ADC0_EN_M | ADI_4_AUX_ADC0_RESET_N_M);
}
//*****************************************************************************
//
// Disables scaling of the ADC input
//
//*****************************************************************************
void
AUXADCDisableInputScaling(void)
{
ADI8BitsSet(AUX_ADI4_BASE, ADI_4_AUX_O_ADC1, ADI_4_AUX_ADC1_SCALE_DIS_M);
}
//*****************************************************************************
//
// Flushes the ADC FIFO
//
//*****************************************************************************
void
AUXADCFlushFifo(void)
{
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 1; // CMD: EN(1) -> FLUSH(3)
HWREGBITW(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCCTL, 1) = 0; // CMD: FLUSH(3) -> EN(1)
}
//*****************************************************************************
//
// Waits for and returns the first sample in the ADC FIFO
//
//*****************************************************************************
uint32_t
AUXADCReadFifo(void) {
// Wait until there is at least one sample in the FIFO
while (HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT) & AUX_ANAIF_ADCFIFOSTAT_EMPTY_M);
// Return the first sample from the FIFO
return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO);
}
//*****************************************************************************
//
// Returns the first sample in the ADC FIFO, without waiting
//
//*****************************************************************************
uint32_t
AUXADCPopFifo(void) {
// Return the first sample from the FIFO. If the FIFO is empty, this
// generates ADC FIFO underflow
return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFO);
}
//*****************************************************************************
//
// Returns the gain value used when adjusting for ADC gain/offset
//
//*****************************************************************************
int32_t
AUXADCGetAdjustmentGain(uint32_t refSource)
{
int32_t gain;
if (refSource == AUXADC_REF_FIXED) {
// AUXADC_REF_FIXED ==> ABS_GAIN
gain = (HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_ABS_GAIN) & FCFG1_SOC_ADC_ABS_GAIN_SOC_ADC_ABS_GAIN_TEMP1_M) >> FCFG1_SOC_ADC_ABS_GAIN_SOC_ADC_ABS_GAIN_TEMP1_S;
} else {
// AUXADC_REF_VDDS_REL ==> REL_GAIN
gain = (HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_REL_GAIN) & FCFG1_SOC_ADC_REL_GAIN_SOC_ADC_REL_GAIN_TEMP1_M) >> FCFG1_SOC_ADC_REL_GAIN_SOC_ADC_REL_GAIN_TEMP1_S;
}
return gain;
}
//*****************************************************************************
//
// Returns the offset value used when adjusting for ADC gain/offset
//
//*****************************************************************************
int32_t
AUXADCGetAdjustmentOffset(uint32_t refSource)
{
int8_t offset;
if ( refSource == AUXADC_REF_FIXED ) {
// AUXADC_REF_FIXED ==> ABS_OFFSET
offset = HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_OFFSET_INT) >> FCFG1_SOC_ADC_OFFSET_INT_SOC_ADC_ABS_OFFSET_TEMP1_S;
} else {
// AUXADC_REF_VDDS_REL ==> REL_OFFSET
offset = HWREG(FCFG1_BASE + FCFG1_O_SOC_ADC_OFFSET_INT) >> FCFG1_SOC_ADC_OFFSET_INT_SOC_ADC_REL_OFFSET_TEMP1_S;
}
return offset;
}
//*****************************************************************************
//
// Converts an "ideal" ADC value to microvolts
//
//*****************************************************************************
int32_t
AUXADCValueToMicrovolts(int32_t fixedRefVoltage, int32_t adcValue)
{
// Chop off 4 bits during calculations to avoid 32-bit overflow
fixedRefVoltage >>= 4;
return (((adcValue * fixedRefVoltage) + 2047) / 4095) << 4;
}
//*****************************************************************************
//
// Converts a number of microvolts to corresponding "ideal" ADC value
//
//*****************************************************************************
int32_t
AUXADCMicrovoltsToValue(int32_t fixedRefVoltage, int32_t microvolts)
{
// Chop off 4 bits during calculations to avoid 32-bit overflow
fixedRefVoltage >>= 4;
microvolts >>= 4;
return ((microvolts * 4095) + (fixedRefVoltage / 2)) / fixedRefVoltage;
}
//*****************************************************************************
//
// Performs ADC value gain and offset adjustment
//
//*****************************************************************************
int32_t
AUXADCAdjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset)
{
// Apply gain and offset adjustment
adcValue = (((adcValue + offset) * gain) + 16384) / 32768;
// Saturate
if (adcValue < 0) {
return 0;
} else if (adcValue > 4095) {
return 4095;
} else {
return adcValue;
}
}
//*****************************************************************************
//
// Performs the inverse of the ADC value gain and offset adjustment
//
//*****************************************************************************
int32_t
AUXADCUnadjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset)
{
// Apply inverse gain and offset adjustment
adcValue = (((adcValue * 32768) + (gain / 2)) / gain) - offset;
// Saturate
if (adcValue < 0) {
return 0;
} else if (adcValue > 4095) {
return 4095;
} else {
return adcValue;
}
}
third_party/ti/devices/cc26x0/driverlib/aux_adc.h
Vendored
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/******************************************************************************
* Filename: aux_adc.h
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: Defines and prototypes for the AUX Analog-to-Digital
* Converter
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxadc_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_ADC_H__
#define __AUX_ADC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_event.h"
#include "../inc/hw_adi.h"
#include "../inc/hw_adi_4_aux.h"
#include "../inc/hw_aux_anaif.h"
#include "rom.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXADCDisable NOROM_AUXADCDisable
#define AUXADCEnableAsync NOROM_AUXADCEnableAsync
#define AUXADCEnableSync NOROM_AUXADCEnableSync
#define AUXADCDisableInputScaling NOROM_AUXADCDisableInputScaling
#define AUXADCFlushFifo NOROM_AUXADCFlushFifo
#define AUXADCReadFifo NOROM_AUXADCReadFifo
#define AUXADCPopFifo NOROM_AUXADCPopFifo
#define AUXADCGetAdjustmentGain NOROM_AUXADCGetAdjustmentGain
#define AUXADCGetAdjustmentOffset NOROM_AUXADCGetAdjustmentOffset
#define AUXADCValueToMicrovolts NOROM_AUXADCValueToMicrovolts
#define AUXADCMicrovoltsToValue NOROM_AUXADCMicrovoltsToValue
#define AUXADCAdjustValueForGainAndOffset NOROM_AUXADCAdjustValueForGainAndOffset
#define AUXADCUnadjustValueForGainAndOffset NOROM_AUXADCUnadjustValueForGainAndOffset
#endif
//*****************************************************************************
//
// Defines for ADC reference sources.
//
//*****************************************************************************
#define AUXADC_REF_FIXED (0 << ADI_4_AUX_ADCREF0_SRC_S)
#define AUXADC_REF_VDDS_REL (1 << ADI_4_AUX_ADCREF0_SRC_S)
//*****************************************************************************
//
// Defines for the ADC FIFO status bits.
//
//*****************************************************************************
#define AUXADC_FIFO_EMPTY_M (AUX_ANAIF_ADCFIFOSTAT_EMPTY_M)
#define AUXADC_FIFO_ALMOST_FULL_M (AUX_ANAIF_ADCFIFOSTAT_ALMOST_FULL_M)
#define AUXADC_FIFO_FULL_M (AUX_ANAIF_ADCFIFOSTAT_FULL_M)
#define AUXADC_FIFO_UNDERFLOW_M (AUX_ANAIF_ADCFIFOSTAT_UNDERFLOW_M)
#define AUXADC_FIFO_OVERFLOW_M (AUX_ANAIF_ADCFIFOSTAT_OVERFLOW_M)
//*****************************************************************************
//
// Defines for supported ADC triggers.
//
//*****************************************************************************
#define AUXADC_TRIGGER_MANUAL (EVENT_AUXSEL0_EV_NONE)
#define AUXADC_TRIGGER_GPT0A (EVENT_AUXSEL0_EV_GPT0A)
#define AUXADC_TRIGGER_GPT0B (EVENT_AUXSEL0_EV_GPT0B)
#define AUXADC_TRIGGER_GPT1A (EVENT_AUXSEL0_EV_GPT1A)
#define AUXADC_TRIGGER_GPT1B (EVENT_AUXSEL0_EV_GPT1B)
#define AUXADC_TRIGGER_GPT2A (EVENT_AUXSEL0_EV_GPT2A)
#define AUXADC_TRIGGER_GPT2B (EVENT_AUXSEL0_EV_GPT2B)
#define AUXADC_TRIGGER_GPT3A (EVENT_AUXSEL0_EV_GPT3A)
#define AUXADC_TRIGGER_GPT3B (EVENT_AUXSEL0_EV_GPT3B)
//*****************************************************************************
//
// Defines for ADC sampling type for synchronous operation.
//
//*****************************************************************************
#define AUXADC_SAMPLE_TIME_2P7_US 3
#define AUXADC_SAMPLE_TIME_5P3_US 4
#define AUXADC_SAMPLE_TIME_10P6_US 5
#define AUXADC_SAMPLE_TIME_21P3_US 6
#define AUXADC_SAMPLE_TIME_42P6_US 7
#define AUXADC_SAMPLE_TIME_85P3_US 8
#define AUXADC_SAMPLE_TIME_170_US 9
#define AUXADC_SAMPLE_TIME_341_US 10
#define AUXADC_SAMPLE_TIME_682_US 11
#define AUXADC_SAMPLE_TIME_1P37_MS 12
#define AUXADC_SAMPLE_TIME_2P73_MS 13
#define AUXADC_SAMPLE_TIME_5P46_MS 14
#define AUXADC_SAMPLE_TIME_10P9_MS 15
//*****************************************************************************
//
// Equivalent voltages for fixed ADC reference, in microvolts.
//
//*****************************************************************************
#define AUXADC_FIXED_REF_VOLTAGE_NORMAL 4300000
#define AUXADC_FIXED_REF_VOLTAGE_UNSCALED 1478500
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Disables the ADC.
//!
//! This function must be called:
//! - Before re-enabling the ADC using \ref AUXADCEnableAsync() or
//! \ref AUXADCEnableSync()
//! - Before entering system standby
//
//*****************************************************************************
extern void AUXADCDisable(void);
//*****************************************************************************
//
//! \brief Enables the ADC for asynchronous operation.
//!
//! In asynchronous operation, the ADC samples continuously between
//! conversions.
//!
//! The ADC trigger starts the conversion. Note that the first conversion may
//! be invalid if the sampling period is too short.
//!
//! ADC input scaling is enabled by default after device reset, and is also re-
//! enabled by \ref AUXADCDisable(). To disable input scaling, call
//! \ref AUXADCDisableInputScaling() before calling \ref AUXADCEnableAsync().
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//! \param trigger
//! ADC conversion trigger:
//! - \ref AUXADC_TRIGGER_MANUAL
//! - \ref AUXADC_TRIGGER_GPT0A
//! - \ref AUXADC_TRIGGER_GPT0B
//! - \ref AUXADC_TRIGGER_GPT1A
//! - \ref AUXADC_TRIGGER_GPT1B
//! - \ref AUXADC_TRIGGER_GPT2A
//! - \ref AUXADC_TRIGGER_GPT2B
//! - \ref AUXADC_TRIGGER_GPT3A
//! - \ref AUXADC_TRIGGER_GPT3B
//
//*****************************************************************************
extern void AUXADCEnableAsync(uint32_t refSource, uint32_t trigger);
//*****************************************************************************
//
//! \brief Enables the ADC for synchronous operation.
//!
//! In synchronous operation, the ADC is idle between a conversion and
//! subsequent samplings.
//!
//! The ADC trigger starts sampling with specified duration, followed by the
//! conversion. Note that the first conversion may be invalid if the initial
//! sampling period is too short.
//!
//! ADC input scaling is enabled by default after device reset, and is also re-
//! enabled by \ref AUXADCDisable(). To disable input scaling, call
//! \ref AUXADCDisableInputScaling() before calling \ref AUXADCEnableSync().
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//! \param sampleTime
//! ADC sampling time:
//! - \ref AUXADC_SAMPLE_TIME_2P7_US
//! - \ref AUXADC_SAMPLE_TIME_5P3_US
//! - \ref AUXADC_SAMPLE_TIME_10P6_US
//! - \ref AUXADC_SAMPLE_TIME_21P3_US
//! - \ref AUXADC_SAMPLE_TIME_42P6_US
//! - \ref AUXADC_SAMPLE_TIME_85P3_US
//! - \ref AUXADC_SAMPLE_TIME_170_US
//! - \ref AUXADC_SAMPLE_TIME_341_US
//! - \ref AUXADC_SAMPLE_TIME_682_US
//! - \ref AUXADC_SAMPLE_TIME_1P37_MS
//! - \ref AUXADC_SAMPLE_TIME_2P73_MS
//! - \ref AUXADC_SAMPLE_TIME_5P46_MS
//! - \ref AUXADC_SAMPLE_TIME_10P9_MS
//! \param trigger
//! ADC conversion trigger:
//! - \ref AUXADC_TRIGGER_MANUAL
//! - \ref AUXADC_TRIGGER_GPT0A
//! - \ref AUXADC_TRIGGER_GPT0B
//! - \ref AUXADC_TRIGGER_GPT1A
//! - \ref AUXADC_TRIGGER_GPT1B
//! - \ref AUXADC_TRIGGER_GPT2A
//! - \ref AUXADC_TRIGGER_GPT2B
//! - \ref AUXADC_TRIGGER_GPT3A
//! - \ref AUXADC_TRIGGER_GPT3B
//
//*****************************************************************************
extern void AUXADCEnableSync(uint32_t refSource, uint32_t sampleTime, uint32_t trigger);
//*****************************************************************************
//
//! \brief Disables scaling of the ADC input.
//!
//! By default, the ADC operates internally on a version of the input signal
//! that has been scaled down by a factor <tt>1408 / 4095</tt>. This function
//! disables that scaling, allowing for a trade-off between dynamic range and
//! and resolution.
//!
//! \note This function must only be called while the ADC is disabled, before
//! calling \ref AUXADCEnableSync() or \ref AUXADCEnableAsync().
//! \note Different input maximum ratings apply when input scaling is disabled.
//! Violating these may damage the device.
//
//*****************************************************************************
extern void AUXADCDisableInputScaling(void);
//*****************************************************************************
//
//! \brief Flushes the ADC FIFO.
//!
//! This empties the FIFO and clears the underflow/overflow flags.
//!
//! Note: This function must only be called while the ADC is enabled.
//
//*****************************************************************************
extern void AUXADCFlushFifo(void);
//*****************************************************************************
//
//! \brief Generates a single manual ADC trigger.
//!
//! For synchronous mode, the trigger starts sampling followed by conversion.
//! For asynchronous mode, the trigger starts conversion.
//
//*****************************************************************************
__STATIC_INLINE void
AUXADCGenManualTrigger(void)
{
HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCTRIG) = 0;
}
//*****************************************************************************
//
//! \brief Returns flags indicating the status of the ADC FIFO.
//!
//! The flags indicate FIFO empty, full and almost full, and whether
//! overflow/underflow has occurred.
//!
//! \return
//! A combination (bitwise OR) of the following flags:
//! - \ref AUXADC_FIFO_EMPTY_M
//! - \ref AUXADC_FIFO_ALMOST_FULL_M
//! - \ref AUXADC_FIFO_FULL_M
//! - \ref AUXADC_FIFO_UNDERFLOW_M
//! - \ref AUXADC_FIFO_OVERFLOW_M
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXADCGetFifoStatus(void)
{
return HWREG(AUX_ANAIF_BASE + AUX_ANAIF_O_ADCFIFOSTAT);
}
//*****************************************************************************
//
//! \brief Waits for and returns the first sample in the ADC FIFO.
//!
//! This function waits until there is at least one sample in the ADC FIFO. It
//! then pops and returns the first sample from the FIFO.
//!
//! \note This procedure will deadlock if called without setting up ADC trigger
//! generation in advance. The trigger can either be manual or periodical
//! (using a GPT).
//!
//! \return The first (12-bit) sample from the ADC FIFO
//
//*****************************************************************************
extern uint32_t AUXADCReadFifo(void);
//*****************************************************************************
//
//! \brief Returns the first sample in the ADC FIFO, without waiting.
//!
//! This function does not wait, and must only be called when there is at least
//! one sample in the ADC FIFO. Otherwise the call will generate FIFO underflow
//! (\ref AUXADC_FIFO_UNDERFLOW_M).
//!
//! \return The first (12-bit) sample from the ADC FIFO, or an undefined value
//! if the FIFO is empty
//
//*****************************************************************************
extern uint32_t AUXADCPopFifo(void);
//*****************************************************************************
//
//! \brief Selects internal or external input for the ADC.
//!
//! Note that calling this function also selects the same input for AUX_COMPB.
//!
//! \param input
//! Internal/external input selection:
//! - \ref ADC_COMPB_IN_DCOUPL
//! - \ref ADC_COMPB_IN_VSS
//! - \ref ADC_COMPB_IN_VDDS
//! - \ref ADC_COMPB_IN_AUXIO7
//! - \ref ADC_COMPB_IN_AUXIO6
//! - \ref ADC_COMPB_IN_AUXIO5
//! - \ref ADC_COMPB_IN_AUXIO4
//! - \ref ADC_COMPB_IN_AUXIO3
//! - \ref ADC_COMPB_IN_AUXIO2
//! - \ref ADC_COMPB_IN_AUXIO1
//! - \ref ADC_COMPB_IN_AUXIO0
//
//*****************************************************************************
__STATIC_INLINE void
AUXADCSelectInput(uint32_t input)
{
HapiSelectADCCompBInput(input);
}
//*****************************************************************************
//
//! \brief Returns the gain value used when adjusting for ADC gain/offset.
//!
//! The function returns the gain value to be used with
//! \ref AUXADCAdjustValueForGainAndOffset() or
//! \ref AUXADCUnadjustValueForGainAndOffset(). The gain value is found during
//! chip manufacturing and is stored in the factory configuration, FCFG1.
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//!
//! \return
//! The gain value to be used in adjustments
//
//*****************************************************************************
extern int32_t AUXADCGetAdjustmentGain(uint32_t refSource);
//*****************************************************************************
//
//! \brief Returns the offset value used when adjusting for ADC gain/offset.
//!
//! The function returns the offset value to be used with
//! \ref AUXADCAdjustValueForGainAndOffset() or
//! \ref AUXADCUnadjustValueForGainAndOffset(). The offset value is found
//! during chip manufacturing and is stored in the factory configuration,
//! FCFG1.
//!
//! \param refSource
//! ADC reference source:
//! - \ref AUXADC_REF_FIXED (nominally 4.3 V)
//! - \ref AUXADC_REF_VDDS_REL (nominally VDDS)
//!
//! \return
//! The offset value to be used in adjustments
//
//*****************************************************************************
extern int32_t AUXADCGetAdjustmentOffset(uint32_t refSource);
//*****************************************************************************
//
//! \brief Converts an "adjusted" ADC value to microvolts.
//!
//! This function can only be used when measuring with fixed ADC reference
//! (\ref AUXADC_REF_FIXED). The specified reference voltage accounts for
//! whether the sampled ADC input is scaled down before conversion or not.
//!
//! \param fixedRefVoltage
//! Fixed reference voltage, in microvolts
//! - \ref AUXADC_FIXED_REF_VOLTAGE_NORMAL when using scaled input (normal)
//! - \ref AUXADC_FIXED_REF_VOLTAGE_UNSCALED when using unscaled input
//! \param adcValue
//! The ADC value
//!
//! \return
//! The corresponding number of microvolts
//
//*****************************************************************************
extern int32_t AUXADCValueToMicrovolts(int32_t fixedRefVoltage, int32_t adcValue);
//*****************************************************************************
//
//! \brief Converts a number of microvolts to corresponding "adjusted" ADC value.
//!
//! This function can only be used when measuring with fixed ADC reference
//! (\ref AUXADC_REF_FIXED). The specified reference voltage accounts for
//! whether the sampled ADC input is scaled down before conversion or not.
//!
//! \param fixedRefVoltage
//! Fixed reference voltage, in microvolts
//! - \ref AUXADC_FIXED_REF_VOLTAGE_NORMAL when using scaled input (normal)
//! - \ref AUXADC_FIXED_REF_VOLTAGE_UNSCALED when using unscaled input
//! \param microvolts
//! The number of microvolts
//!
//! \return
//! The corresponding expected ADC value (adjusted for ADC gain/offset)
//
//*****************************************************************************
extern int32_t AUXADCMicrovoltsToValue(int32_t fixedRefVoltage, int32_t microvolts);
//*****************************************************************************
//
//! \brief Performs ADC value gain and offset adjustment.
//!
//! This function takes a measured ADC value compensates for the internal gain
//! and offset in the ADC.
//!
//! \param adcValue
//! 12-bit ADC unadjusted value
//! \param gain
//! Gain adjustment value provided by \ref AUXADCGetAdjustmentGain()
//! \param offset
//! Offset adjustment value provided by \ref AUXADCGetAdjustmentOffset()
//!
//! \return
//! 12-bit ADC adjusted value
//
//*****************************************************************************
extern int32_t AUXADCAdjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset);
//*****************************************************************************
//
//! \brief Performs the inverse of the ADC value gain and offset adjustment.
//!
//! This function finds the expected measured ADC value, without gain and
//! offset compensation, for a given "ideal" ADC value. The function can for
//! example be used to find ADC value thresholds to be used in Sensor
//! Controller task configurations.
//!
//! \param adcValue
//! 12-bit ADC adjusted value
//! \param gain
//! Gain adjustment value provided by \ref AUXADCGetAdjustmentGain()
//! \param offset
//! Offset adjustment value provided by \ref AUXADCGetAdjustmentOffset()
//!
//! \return
//! 12-bit ADC unadjusted value
//
//*****************************************************************************
extern int32_t AUXADCUnadjustValueForGainAndOffset(int32_t adcValue, int32_t gain, int32_t offset);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXADCDisable
#undef AUXADCDisable
#define AUXADCDisable ROM_AUXADCDisable
#endif
#ifdef ROM_AUXADCEnableAsync
#undef AUXADCEnableAsync
#define AUXADCEnableAsync ROM_AUXADCEnableAsync
#endif
#ifdef ROM_AUXADCEnableSync
#undef AUXADCEnableSync
#define AUXADCEnableSync ROM_AUXADCEnableSync
#endif
#ifdef ROM_AUXADCDisableInputScaling
#undef AUXADCDisableInputScaling
#define AUXADCDisableInputScaling ROM_AUXADCDisableInputScaling
#endif
#ifdef ROM_AUXADCFlushFifo
#undef AUXADCFlushFifo
#define AUXADCFlushFifo ROM_AUXADCFlushFifo
#endif
#ifdef ROM_AUXADCReadFifo
#undef AUXADCReadFifo
#define AUXADCReadFifo ROM_AUXADCReadFifo
#endif
#ifdef ROM_AUXADCPopFifo
#undef AUXADCPopFifo
#define AUXADCPopFifo ROM_AUXADCPopFifo
#endif
#ifdef ROM_AUXADCGetAdjustmentGain
#undef AUXADCGetAdjustmentGain
#define AUXADCGetAdjustmentGain ROM_AUXADCGetAdjustmentGain
#endif
#ifdef ROM_AUXADCGetAdjustmentOffset
#undef AUXADCGetAdjustmentOffset
#define AUXADCGetAdjustmentOffset ROM_AUXADCGetAdjustmentOffset
#endif
#ifdef ROM_AUXADCValueToMicrovolts
#undef AUXADCValueToMicrovolts
#define AUXADCValueToMicrovolts ROM_AUXADCValueToMicrovolts
#endif
#ifdef ROM_AUXADCMicrovoltsToValue
#undef AUXADCMicrovoltsToValue
#define AUXADCMicrovoltsToValue ROM_AUXADCMicrovoltsToValue
#endif
#ifdef ROM_AUXADCAdjustValueForGainAndOffset
#undef AUXADCAdjustValueForGainAndOffset
#define AUXADCAdjustValueForGainAndOffset ROM_AUXADCAdjustValueForGainAndOffset
#endif
#ifdef ROM_AUXADCUnadjustValueForGainAndOffset
#undef AUXADCUnadjustValueForGainAndOffset
#define AUXADCUnadjustValueForGainAndOffset ROM_AUXADCUnadjustValueForGainAndOffset
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_ADC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aux_smph.c
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/******************************************************************************
* Filename: aux_smph.c
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: Driver for the AUX Semaphore.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_smph.h"
// See aux_smph.h for implementation
third_party/ti/devices/cc26x0/driverlib/aux_smph.h
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/******************************************************************************
* Filename: aux_smph.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the AUX Semaphore
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxsmph_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_SMPH_H__
#define __AUX_SMPH_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_aux_smph.h"
#include "../inc/hw_memmap.h"
#include "debug.h"
//*****************************************************************************
//
// General constants and defines
//
//*****************************************************************************
#define AUX_SMPH_FREE 0x00000001 // MCU Semaphore has not been claimed
#define AUX_SMPH_CLAIMED 0x00000000 // MCU Semaphore has been claimed
//*****************************************************************************
//
// Values that can be passed to AUXSMPHAcquire and AUXSMPHRelease
// as the ui32Semaphore parameter.
//
//*****************************************************************************
#define AUX_SMPH_0 0 // AUX Semaphore 0
#define AUX_SMPH_1 1 // AUX Semaphore 1
#define AUX_SMPH_2 2 // AUX Semaphore 2
#define AUX_SMPH_3 3 // AUX Semaphore 3
#define AUX_SMPH_4 4 // AUX Semaphore 4
#define AUX_SMPH_5 5 // AUX Semaphore 5
#define AUX_SMPH_6 6 // AUX Semaphore 6
#define AUX_SMPH_7 7 // AUX Semaphore 7
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Acquire an AUX semaphore.
//!
//! This function acquires the given AUX semaphore, blocking the call until
//! the semaphore is available.
//!
//! \note The semaphore can also be acquired by the dedicated Sensor Controller.
//! The System CPU master can thus be competing for the shared resource, i.e.
//! the specified semaphore.
//!
//! \param ui32Semaphore is the semaphore number.
//! - \ref AUX_SMPH_0
//! - \ref AUX_SMPH_1
//! - \ref AUX_SMPH_2
//! - \ref AUX_SMPH_3
//! - \ref AUX_SMPH_4
//! - \ref AUX_SMPH_5
//! - \ref AUX_SMPH_6
//! - \ref AUX_SMPH_7
//!
//! \return None
//!
//! \sa AUXSMPHTryAcquire(), AUXSMPHRelease()
//
//*****************************************************************************
__STATIC_INLINE void
AUXSMPHAcquire(uint32_t ui32Semaphore)
{
// Check the arguments.
ASSERT((ui32Semaphore == AUX_SMPH_0) ||
(ui32Semaphore == AUX_SMPH_1) ||
(ui32Semaphore == AUX_SMPH_2) ||
(ui32Semaphore == AUX_SMPH_3) ||
(ui32Semaphore == AUX_SMPH_4) ||
(ui32Semaphore == AUX_SMPH_5) ||
(ui32Semaphore == AUX_SMPH_6) ||
(ui32Semaphore == AUX_SMPH_7));
// Wait for semaphore to be released such that it can be claimed
// Semaphore register reads 1 when lock was acquired otherwise 0
// (i.e. AUX_SMPH_CLAIMED).
while(HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 + 4 * ui32Semaphore) ==
AUX_SMPH_CLAIMED)
{
}
}
//*****************************************************************************
//
//! \brief Try to acquire an AUX semaphore.
//!
//! This function tries to acquire the given AUX semaphore, if the semaphore
//! could not be claimed the function returns false.
//!
//! \note The semaphore can also be acquired by the dedicated Sensor Controller.
//! The System CPU master can thus be competing for the shared resource, i.e.
//! the specified semaphore.
//!
//! \param ui32Semaphore is the semaphore number.
//! - \ref AUX_SMPH_0
//! - \ref AUX_SMPH_1
//! - \ref AUX_SMPH_2
//! - \ref AUX_SMPH_3
//! - \ref AUX_SMPH_4
//! - \ref AUX_SMPH_5
//! - \ref AUX_SMPH_6
//! - \ref AUX_SMPH_7
//!
//! \return Returns true if semaphore was acquired, false otherwise
//!
//! \sa AUXSMPHAcquire(), AUXSMPHRelease()
//
//*****************************************************************************
__STATIC_INLINE bool
AUXSMPHTryAcquire(uint32_t ui32Semaphore)
{
uint32_t ui32SemaReg;
// Check the arguments.
ASSERT((ui32Semaphore == AUX_SMPH_0) ||
(ui32Semaphore == AUX_SMPH_1) ||
(ui32Semaphore == AUX_SMPH_2) ||
(ui32Semaphore == AUX_SMPH_3) ||
(ui32Semaphore == AUX_SMPH_4) ||
(ui32Semaphore == AUX_SMPH_5) ||
(ui32Semaphore == AUX_SMPH_6) ||
(ui32Semaphore == AUX_SMPH_7));
// AUX Semaphore register reads 1 if lock was acquired
// (i.e. SMPH_FREE when read) but subsequent reads will read 0.
ui32SemaReg = HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 + 4 * ui32Semaphore);
return (ui32SemaReg == AUX_SMPH_FREE);
}
//*****************************************************************************
//
//! \brief Release an AUX semaphore by System CPU master.
//!
//! This function releases the given AUX semaphore.
//!
//! \note It is up to the application to provide the convention for clearing
//! semaphore.
//!
//! \note The semaphore can also be acquired by the dedicated Sensor Controller.
//! The System CPU master can thus be competing for the shared resource, i.e.
//! the specified semaphore.
//!
//! \param ui32Semaphore is the semaphore number.
//! - \ref AUX_SMPH_0
//! - \ref AUX_SMPH_1
//! - \ref AUX_SMPH_2
//! - \ref AUX_SMPH_3
//! - \ref AUX_SMPH_4
//! - \ref AUX_SMPH_5
//! - \ref AUX_SMPH_6
//! - \ref AUX_SMPH_7
//!
//! \return None
//!
//! \sa AUXSMPHAcquire(), AUXSMPHTryAcquire()
//
//*****************************************************************************
__STATIC_INLINE void
AUXSMPHRelease(uint32_t ui32Semaphore)
{
// Check the arguments.
ASSERT((ui32Semaphore == AUX_SMPH_0) ||
(ui32Semaphore == AUX_SMPH_1) ||
(ui32Semaphore == AUX_SMPH_2) ||
(ui32Semaphore == AUX_SMPH_3) ||
(ui32Semaphore == AUX_SMPH_4) ||
(ui32Semaphore == AUX_SMPH_5) ||
(ui32Semaphore == AUX_SMPH_6) ||
(ui32Semaphore == AUX_SMPH_7));
// No check before release. It is up to the application to provide the
// conventions for who and when a semaphore can be released.
HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0 + 4 * ui32Semaphore) =
AUX_SMPH_FREE;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_SMPH_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aux_tdc.c
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@@ -1,111 +0,0 @@
/******************************************************************************
* Filename: aux_tdc.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
*
* Description: Driver for the AUX Time to Digital Converter interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_tdc.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXTDCConfigSet
#define AUXTDCConfigSet NOROM_AUXTDCConfigSet
#undef AUXTDCMeasurementDone
#define AUXTDCMeasurementDone NOROM_AUXTDCMeasurementDone
#endif
//*****************************************************************************
//
// Configure the operation of the AUX TDC
//
//*****************************************************************************
void
AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
uint32_t ui32StopCondition)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Make sure the AUX TDC is in the idle state before changing the
// configuration.
while(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
}
// Clear previous results.
HWREG(ui32Base + AUX_TDC_O_CTL) = 0x0;
// Change the configuration.
HWREG(ui32Base + AUX_TDC_O_TRIGSRC) = ui32StartCondition | ui32StopCondition;
}
//*****************************************************************************
//
// Check if the AUX TDC is done measuring
//
//*****************************************************************************
uint32_t
AUXTDCMeasurementDone(uint32_t ui32Base)
{
uint32_t ui32Reg;
uint32_t ui32Status;
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is done measuring.
ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT);
if(ui32Reg & AUX_TDC_STAT_DONE)
{
ui32Status = AUX_TDC_DONE;
}
else if(ui32Reg & AUX_TDC_STAT_SAT)
{
ui32Status = AUX_TDC_TIMEOUT;
}
else
{
ui32Status = AUX_TDC_BUSY;
}
// Return the status.
return (ui32Status);
}
third_party/ti/devices/cc26x0/driverlib/aux_tdc.h
Vendored
-776
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/******************************************************************************
* Filename: aux_tdc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AUX Time-to-Digital Converter
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxtdc_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_TDC_H__
#define __AUX_TDC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_aux_tdc.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXTDCConfigSet NOROM_AUXTDCConfigSet
#define AUXTDCMeasurementDone NOROM_AUXTDCMeasurementDone
#endif
//*****************************************************************************
//
// Defines for the status of a AUX TDC measurement.
//
//*****************************************************************************
#define AUX_TDC_BUSY 0x00000001
#define AUX_TDC_TIMEOUT 0x00000002
#define AUX_TDC_DONE 0x00000004
//*****************************************************************************
//
// Defines for the control of a AUX TDC.
//
//*****************************************************************************
#define AUX_TDC_RUNSYNC 0x00000001
#define AUX_TDC_RUN 0x00000002
#define AUX_TDC_ABORT 0x00000003
//*****************************************************************************
//
// Defines for possible states of the TDC internal state machine.
//
//*****************************************************************************
#define AUXTDC_WAIT_START (AUX_TDC_STAT_STATE_WAIT_START)
#define AUXTDC_WAIT_START_CNTEN (AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN)
#define AUXTDC_IDLE (AUX_TDC_STAT_STATE_IDLE)
#define AUXTDC_CLRCNT (AUX_TDC_STAT_STATE_CLR_CNT)
#define AUXTDC_WAIT_STOP (AUX_TDC_STAT_STATE_WAIT_STOP)
#define AUXTDC_WAIT_STOP_CNTDOWN (AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN)
#define AUXTDC_GETRESULTS (AUX_TDC_STAT_STATE_GET_RESULT)
#define AUXTDC_POR (AUX_TDC_STAT_STATE_POR)
#define AUXTDC_WAIT_CLRCNT_DONE (AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE)
#define AUXTDC_START_FALL (AUX_TDC_STAT_STATE_START_FALL)
#define AUXTDC_FORCE_STOP (AUX_TDC_STAT_STATE_FORCE_STOP)
//*****************************************************************************
//
// Defines for controlling the AUX TDC. Values can be passed to AUXTDCConfigSet().
//
//*****************************************************************************
#define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event
#define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW) // Falling edge polarity for stop event
#define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)
#define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)
#define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)
#define AUXTDC_STOP_AUXIO3 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO3)
#define AUXTDC_STOP_AUXIO4 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO4)
#define AUXTDC_STOP_AUXIO5 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO5)
#define AUXTDC_STOP_AUXIO6 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO6)
#define AUXTDC_STOP_AUXIO7 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO7)
#define AUXTDC_STOP_AUXIO8 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO8)
#define AUXTDC_STOP_AUXIO9 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO9)
#define AUXTDC_STOP_AUXIO10 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO10)
#define AUXTDC_STOP_AUXIO11 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO11)
#define AUXTDC_STOP_AUXIO12 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO12)
#define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)
#define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)
#define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)
#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_ADC_DONE)
#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_STOP_AON_PROG_WU (AUX_TDC_TRIGSRC_STOP_SRC_AON_PROG_WU)
#define AUXTDC_STOP_AON_SW (AUX_TDC_TRIGSRC_STOP_SRC_AON_SW)
#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_ISRC_RESET)
#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX0)
#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_OBSMUX1)
#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_SMPH_AUTOTAKE_DONE)
#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_TDC_PRE)
#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER0_EV)
#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_TIMER1_EV)
#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
#define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)
#define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)
#define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event
#define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW) // Falling edge polarity for start event
#define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)
#define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)
#define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)
#define AUXTDC_START_AUXIO3 (AUX_TDC_TRIGSRC_START_SRC_AUXIO3)
#define AUXTDC_START_AUXIO4 (AUX_TDC_TRIGSRC_START_SRC_AUXIO4)
#define AUXTDC_START_AUXIO5 (AUX_TDC_TRIGSRC_START_SRC_AUXIO5)
#define AUXTDC_START_AUXIO6 (AUX_TDC_TRIGSRC_START_SRC_AUXIO6)
#define AUXTDC_START_AUXIO7 (AUX_TDC_TRIGSRC_START_SRC_AUXIO7)
#define AUXTDC_START_AUXIO8 (AUX_TDC_TRIGSRC_START_SRC_AUXIO8)
#define AUXTDC_START_AUXIO9 (AUX_TDC_TRIGSRC_START_SRC_AUXIO9)
#define AUXTDC_START_AUXIO10 (AUX_TDC_TRIGSRC_START_SRC_AUXIO10)
#define AUXTDC_START_AUXIO11 (AUX_TDC_TRIGSRC_START_SRC_AUXIO11)
#define AUXTDC_START_AUXIO12 (AUX_TDC_TRIGSRC_START_SRC_AUXIO12)
#define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)
#define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)
#define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)
#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_ADC_DONE)
#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_ADC_FIFO_ALMOST_FULL)
#define AUXTDC_START_AON_PROG_WU (AUX_TDC_TRIGSRC_START_SRC_AON_PROG_WU)
#define AUXTDC_START_AON_SW (AUX_TDC_TRIGSRC_START_SRC_AON_SW)
#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_ISRC_RESET)
#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX0)
#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_OBSMUX1)
#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_SMPH_AUTOTAKE_DONE)
#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_TDC_PRE)
#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER0_EV)
#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_TIMER1_EV)
#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
#define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)
#define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)
//*****************************************************************************
//
// Defines for the possible saturation values set using AUXTDCLimitSet().
//
//*****************************************************************************
#define AUXTDC_SAT_4096 (AUX_TDC_SATCFG_LIMIT_R12)
#define AUXTDC_SAT_8192 (AUX_TDC_SATCFG_LIMIT_R13)
#define AUXTDC_SAT_16384 (AUX_TDC_SATCFG_LIMIT_R14)
#define AUXTDC_SAT_32768 (AUX_TDC_SATCFG_LIMIT_R15)
#define AUXTDC_SAT_65536 (AUX_TDC_SATCFG_LIMIT_R16)
#define AUXTDC_SAT_131072 (AUX_TDC_SATCFG_LIMIT_R17)
#define AUXTDC_SAT_262144 (AUX_TDC_SATCFG_LIMIT_R18)
#define AUXTDC_SAT_524288 (AUX_TDC_SATCFG_LIMIT_R19)
#define AUXTDC_SAT_1048576 (AUX_TDC_SATCFG_LIMIT_R20)
#define AUXTDC_SAT_2097152 (AUX_TDC_SATCFG_LIMIT_R21)
#define AUXTDC_SAT_4194304 (AUX_TDC_SATCFG_LIMIT_R22)
#define AUXTDC_SAT_8388608 (AUX_TDC_SATCFG_LIMIT_R23)
#define AUXTDC_SAT_16777216 (AUX_TDC_SATCFG_LIMIT_R24)
#define AUXTDC_NUM_SAT_VALS 16
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
#ifdef DRIVERLIB_DEBUG
//*****************************************************************************
//
//! \internal
//! \brief Checks an AUX TDC base address.
//!
//! This function determines if a AUX TDC port base address is valid.
//!
//! \param ui32Base is the base address of the AUX TDC port.
//!
//! \return Returns \c true if the base address is valid and \c false
//! otherwise.
//
//*****************************************************************************
static bool
AUXTDCBaseValid(uint32_t ui32Base)
{
return(ui32Base == AUX_TDC_BASE);
}
#endif
//*****************************************************************************
//
//! \brief Get the status of the AUX TDC internal state machine.
//!
//! This function will return the current state of the AUX TDC internal state
//! machine.
//! \param ui32Base is base address of the AUX TDC
//!
//! \return Returns the current state of the state machine.
//! Possible states for the state machine are:
//! - \ref AUXTDC_WAIT_START
//! - \ref AUXTDC_WAIT_START_CNTEN
//! - \ref AUXTDC_IDLE
//! - \ref AUXTDC_CLRCNT
//! - \ref AUXTDC_WAIT_STOP
//! - \ref AUXTDC_WAIT_STOP_CNTDOWN
//! - \ref AUXTDC_GETRESULTS
//! - \ref AUXTDC_POR
//! - \ref AUXTDC_WAIT_CLRCNT_DONE
//! - \ref AUXTDC_START_FALL
//! - \ref AUXTDC_FORCE_STOP.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCStatusGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the status value for the correct ADI Slave.
return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
AUX_TDC_STAT_STATE_S);
}
//*****************************************************************************
//
//! \brief Configure the operation of the AUX TDC.
//!
//! Use this function to configure the start and stop event for the AUX TDC.
//!
//! The \c ui32StartCondition must be a bitwise OR of the start event and the
//! polarity of the start event. The start events are:
//! - \ref AUXTDC_START_AUXIO0
//! - \ref AUXTDC_START_AUXIO1
//! - \ref AUXTDC_START_AUXIO2
//! - \ref AUXTDC_START_AUXIO3
//! - \ref AUXTDC_START_AUXIO4
//! - \ref AUXTDC_START_AUXIO5
//! - \ref AUXTDC_START_AUXIO6
//! - \ref AUXTDC_START_AUXIO7
//! - \ref AUXTDC_START_AUXIO8
//! - \ref AUXTDC_START_AUXIO9
//! - \ref AUXTDC_START_AUXIO10
//! - \ref AUXTDC_START_AUXIO11
//! - \ref AUXTDC_START_AUXIO12
//! - \ref AUXTDC_START_AUXIO13
//! - \ref AUXTDC_START_AUXIO14
//! - \ref AUXTDC_START_AUXIO15
//! - \ref AUXTDC_START_ADC_DONE
//! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_START_AON_PROG_WU
//! - \ref AUXTDC_START_AON_SW
//! - \ref AUXTDC_START_ISRC_RESET
//! - \ref AUXTDC_START_OBSMUX0
//! - \ref AUXTDC_START_OBSMUX1
//! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_START_TDC_PRE
//! - \ref AUXTDC_START_TIMER0_EV
//! - \ref AUXTDC_START_TIMER1_EV
//! - \ref AUXTDC_START_AON_RTC_CH2
//! - \ref AUXTDC_START_AUX_COMPA
//! - \ref AUXTDC_START_AUX_COMPB
//! - \ref AUXTDC_START_ACLK_REF
//! - \ref AUXTDC_START_MCU_EV
//!
//! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS
//! or falling \ref AUXTDC_STARTPOL_FALL.
//!
//! The \c ui32StopCondition must be a bitwise OR of the stop event and the
//! polarity of the stop event. The stop events are:
//! - \ref AUXTDC_STOP_AUXIO0
//! - \ref AUXTDC_STOP_AUXIO1
//! - \ref AUXTDC_STOP_AUXIO2
//! - \ref AUXTDC_STOP_AUXIO3
//! - \ref AUXTDC_STOP_AUXIO4
//! - \ref AUXTDC_STOP_AUXIO5
//! - \ref AUXTDC_STOP_AUXIO6
//! - \ref AUXTDC_STOP_AUXIO7
//! - \ref AUXTDC_STOP_AUXIO8
//! - \ref AUXTDC_STOP_AUXIO9
//! - \ref AUXTDC_STOP_AUXIO10
//! - \ref AUXTDC_STOP_AUXIO11
//! - \ref AUXTDC_STOP_AUXIO12
//! - \ref AUXTDC_STOP_AUXIO13
//! - \ref AUXTDC_STOP_AUXIO14
//! - \ref AUXTDC_STOP_AUXIO15
//! - \ref AUXTDC_STOP_ADC_DONE
//! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL
//! - \ref AUXTDC_STOP_AON_PROG_WU
//! - \ref AUXTDC_STOP_AON_SW
//! - \ref AUXTDC_STOP_ISRC_RESET
//! - \ref AUXTDC_STOP_OBSMUX0
//! - \ref AUXTDC_STOP_OBSMUX1
//! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE
//! - \ref AUXTDC_STOP_TDC_PRE
//! - \ref AUXTDC_STOP_TIMER0_EV
//! - \ref AUXTDC_STOP_TIMER1_EV
//! - \ref AUXTDC_STOP_AON_RTC_CH2
//! - \ref AUXTDC_STOP_AUX_COMPA
//! - \ref AUXTDC_STOP_AUX_COMPB
//! - \ref AUXTDC_STOP_ACLK_REF
//! - \ref AUXTDC_STOP_MCU_EV
//!
//! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS
//! or falling \ref AUXTDC_STOPPOL_FALL.
//!
//! \note The AUX TDC should only be configured when the AUX TDC is in the Idle
//! state. To ensure that software does not lock up, it is recommended to
//! ensure that the AUX TDC is actually in idle when calling \ref AUXTDCConfigSet().
//! This can be tested using \ref AUXTDCIdle().
//!
//! \param ui32Base is base address of the AUX TDC.
//! \param ui32StartCondition is AUX TDC a bitwise OR of a start event and polarity.
//! \param ui32StopCondition is AUX TDC a bitwise OR of a stop event and polarity.
//!
//! \return None
//!
//! \sa \ref AUXTDCConfigSet(), \ref AUXTDCIdle()
//
//*****************************************************************************
extern void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
uint32_t ui32StopCondition);
//*****************************************************************************
//
//! \brief Check if the AUX TDC is in idle mode.
//!
//! This function can be used to check whether the AUX TDC internal state
//! machine is in idle mode. This is required before setting the polarity
//! of the start and stop event.
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return Returns \c true if state machine is in idle and returns \c false
//! if the state machine is in any other state.
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCIdle(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in the Idle state.
return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE) ? true : false);
}
//*****************************************************************************
//
//! \brief Enable the AUX TDC for a measurement.
//!
//! This function is used for arming the AUX TDC to begin a measurement as
//! soon as the start condition is met. There are two run modes:
//! - \ref AUX_TDC_RUNSYNC will wait for a falling event of the start pulse before
//! starting measurement on next rising edge of start. This guarantees an edge
//! triggered start and is recommended for frequency measurements. If the
//! first falling edge is close to the start command it may be missed, but
//! the TDC shall catch later falling edges and in any case guarantee a
//! measurement start synchronous to the rising edge of the start event.
//! - The \ref AUX_TDC_RUN is asynchronous start and asynchronous stop mode. Using
//! this a TDC measurement may start immediately if start is high and hence it
//! may not give precise edge to edge measurements. This mode is only
//! recommended when start pulse is guaranteed to arrive at least 7 clock
//! periods after command.
//!
//! \note The AUX TDC should be configured and in Idle mode before calling this
//! function.
//!
//! \param ui32Base is the base address of the AUX TDC.
//! \param ui32RunMode is the run mode for the AUX TDC.
//! - \ref AUX_TDC_RUNSYNC : Synchronous run mode.
//! - \ref AUX_TDC_RUN : Asynchronous run mode.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AUXTDCEnable(uint32_t ui32Base, uint32_t ui32RunMode)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
ASSERT((ui32RunMode == AUX_TDC_RUN) ||
(ui32RunMode == AUX_TDC_RUNSYNC));
// Enable the AUX TDC.
HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
}
//*****************************************************************************
//
//! \brief Force the AUX TDC back to Idle mode.
//!
//! This function will force the AUX TDC in Idle mode. The internal state
//! machine will not go directly to Idle mode, so it is left to the programmer to
//! ensure that the state machine is in Idle mode before doing any new
//! configuration. This can be checked using \ref AUXTDCIdle().
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return None
//!
//! \sa \ref AUXTDCIdle()
//
//*****************************************************************************
__STATIC_INLINE void
AUXTDCIdleForce(uint32_t ui32Base)
{
// Check the arguments
ASSERT(AUXTDCBaseValid(ui32Base));
// Abort operation of AUX TDC and force into Idle mode.
HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
}
//*****************************************************************************
//
//! \brief Check if the AUX TDC is done measuring.
//!
//! This function can be used to check whether the AUX TDC has finished a
//! measurement. The AUX TDC may have completed a measurement for two reasons.
//! Either it finish successfully \ref AUX_TDC_DONE or it failed due to a timeout
//! \ref AUX_TDC_TIMEOUT. If the AUX TDC is still measuring it this function
//! will return \ref AUX_TDC_BUSY.
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return Returns the current status of a measurement:
//! - \ref AUX_TDC_DONE : An AUX TDC measurement finished successfully.
//! - \ref AUX_TDC_TIMEOUT : An AUX TDC measurement failed due to timeout.
//! - \ref AUX_TDC_BUSY : An AUX TDC measurement is being performed.
//
//*****************************************************************************
extern uint32_t AUXTDCMeasurementDone(uint32_t ui32Base);
//*****************************************************************************
//
//! \brief Get the value of the latest measurement.
//!
//! This function is used for retrieving the value of the latest measurement
//! performed by the AUX TDC.
//!
//! \param ui32Base is the base address of the AUX TDC.
//!
//! \return Returns the result of the latest measurement.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCMeasurementGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the measurement.
return (HWREG(ui32Base + AUX_TDC_O_RESULT));
}
//*****************************************************************************
//
//! \brief Set the saturation limit of the measurement.
//!
//! This function is used to set a saturation limit for the event accumulation
//! register. The saturation limit is defined as a bit width of the
//! accumulation register and therefore increases in power of 2.
//!
//! \param ui32Base is base address of the AUX TDC.
//! \param ui32Limit is the saturation limit.
//! - \ref AUXTDC_SAT_4096
//! - \ref AUXTDC_SAT_8192
//! - \ref AUXTDC_SAT_16384
//! - \ref AUXTDC_SAT_32768
//! - \ref AUXTDC_SAT_65536
//! - \ref AUXTDC_SAT_131072
//! - \ref AUXTDC_SAT_262144
//! - \ref AUXTDC_SAT_524288
//! - \ref AUXTDC_SAT_1048576
//! - \ref AUXTDC_SAT_2097152
//! - \ref AUXTDC_SAT_4194304
//! - \ref AUXTDC_SAT_8388608
//! - \ref AUXTDC_SAT_16777216 (default)
//!
//! \return None
//!
//! \note The actual value of the accumulation register might increase slightly beyond
//! the saturation value before the saturation takes effect.
//!
//! \sa \ref AUXTDCLimitGet()
//
//*****************************************************************************
__STATIC_INLINE void
AUXTDCLimitSet(uint32_t ui32Base, uint32_t ui32Limit)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
ASSERT(ui32Limit < AUXTDC_NUM_SAT_VALS);
// Set the saturation limit.
HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
}
//*****************************************************************************
//
//! \brief Get the saturation limit of the measurement.
//!
//! This function is used to retrieve the current saturation for the
//! accumulator register.
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns the saturation limit.
//! - \ref AUXTDC_SAT_4096
//! - \ref AUXTDC_SAT_8192
//! - \ref AUXTDC_SAT_16384
//! - \ref AUXTDC_SAT_32768
//! - \ref AUXTDC_SAT_65536
//! - \ref AUXTDC_SAT_131072
//! - \ref AUXTDC_SAT_262144
//! - \ref AUXTDC_SAT_524288
//! - \ref AUXTDC_SAT_1048576
//! - \ref AUXTDC_SAT_2097152
//! - \ref AUXTDC_SAT_4194304
//! - \ref AUXTDC_SAT_8388608
//! - \ref AUXTDC_SAT_16777216
//!
//! \sa \ref AUXTDCLimitSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCLimitGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the saturation limit.
return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
}
//*****************************************************************************
//
//! \brief Enables the counter if possible.
//!
//! This function can be used to enable the AUX TDC stop/compare event counter.
//! The counter can be used to measure multiple periods of a clock signal.
//! For each stop/compare event the counter will be decremented by one and
//! the measurement will continue running until the value of the counter
//! reaches 0. The current value of the counter can be read using
//! \ref AUXTDCCounterGet(). The reset value of the counter can be set using
//! \ref AUXTDCCounterSet().
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns \c true if the counter was successfully enabled. If the
//! AUX TDC is not in Idle mode, the counter can not be enabled, and the
//! return value will be \c false.
//!
//! \sa \ref AUXTDCCounterGet(), \ref AUXTDCCounterSet()
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCCounterEnable(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in idle mode. If not in Idle mode, the counter
// will not be enabled.
if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
return false;
}
// Enable the counter.
HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
// Counter successfully enabled.
return true;
}
//*****************************************************************************
//
//! \brief Disables the counter if possible.
//!
//! This function can be used to disable the AUX TDC stop/compare event counter.
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns \c true if the counter was successfully disabled. If the
//! AUX TDC is not in Idle mode, the counter can not be disabled, and the
//! return value will be \c false.
//!
//! \sa \ref AUXTDCCounterEnable() for more information on how to use the counter.
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCCounterDisable(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in Idle mode. If not in Idle mode, the counter
// will not be disabled.
if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
return false;
}
// Disable the counter.
HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
// Counter successfully disabled.
return true;
}
//*****************************************************************************
//
//! \brief Set the reset number of counter compare/stop event to ignore before taking
//! a measurement.
//!
//! This function loads the reset value of the counter with the specified
//! number of events to ignore. A reset in this context means the counter
//! has been disabled and then enabled.
//!
//! \param ui32Base is base address of the AUX TDC.
//! \param ui32Events is the number of compare/stop events to load into the
//! counter.
//!
//! \return Returns \c true if the counter was successfully updated. If the
//! AUX TDC is not in Idle mode, the counter can not be updated, and the
//! return value will be \c false.
//!
//! \sa \ref AUXTDCCounterEnable()
//
//*****************************************************************************
__STATIC_INLINE bool
AUXTDCCounterSet(uint32_t ui32Base, uint32_t ui32Events)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Check if the AUX TDC is in idle mode. If not in idle mode, the counter
// will not be disabled.
if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
AUX_TDC_STAT_STATE_IDLE))
{
return false;
}
// Update the reset counter value.
HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
// Counter successfully updated.
return true;
}
//*****************************************************************************
//
//! \brief Get the current number of counter compare/stop event to ignore before
//! taking a measurement.
//!
//! This function returns the current value of compare/stop events before
//! a measurement is registered. This value is decremented by one for each
//! registered compare/stop event and will always be less than or equal the
//! reset value of the counter set using \ref AUXTDCCounterSet().
//!
//! \param ui32Base is base address of the AUX TDC.
//!
//! \return Returns the current value of compare/stop events ignored before a
//! measurement is performed.
//!
//! \sa \ref AUXTDCCounterEnable().
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTDCCounterGet(uint32_t ui32Base)
{
// Check the arguments.
ASSERT(AUXTDCBaseValid(ui32Base));
// Return the current counter value.
return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXTDCConfigSet
#undef AUXTDCConfigSet
#define AUXTDCConfigSet ROM_AUXTDCConfigSet
#endif
#ifdef ROM_AUXTDCMeasurementDone
#undef AUXTDCMeasurementDone
#define AUXTDCMeasurementDone ROM_AUXTDCMeasurementDone
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_TDC_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aux_timer.c
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/******************************************************************************
* Filename: aux_timer.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AUX Timer Module
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_timer.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXTimerConfigure
#define AUXTimerConfigure NOROM_AUXTimerConfigure
#undef AUXTimerStart
#define AUXTimerStart NOROM_AUXTimerStart
#undef AUXTimerStop
#define AUXTimerStop NOROM_AUXTimerStop
#undef AUXTimerPrescaleSet
#define AUXTimerPrescaleSet NOROM_AUXTimerPrescaleSet
#undef AUXTimerPrescaleGet
#define AUXTimerPrescaleGet NOROM_AUXTimerPrescaleGet
#endif
//*****************************************************************************
//
// Configure AUX timer
//
//*****************************************************************************
void
AUXTimerConfigure(uint32_t ui32Timer, uint32_t ui32Config)
{
uint32_t ui32Val;
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) || (ui32Timer == AUX_TIMER_1) ||
(ui32Timer == AUX_TIMER_BOTH));
// Configure Timer 0.
if(ui32Timer & AUX_TIMER_0)
{
// Stop timer 0.
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CTL) = 0;
// Set mode.
ui32Val = HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG);
ui32Val &= ~(AUX_TIMER_T0CFG_MODE_M | AUX_TIMER_T0CFG_RELOAD_M);
ui32Val |= (ui32Config & (AUX_TIMER_T0CFG_MODE_M |
AUX_TIMER_T0CFG_RELOAD_M));
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG) = ui32Val;
// If edge counter, set rising/falling edge and tick source.
if(ui32Config & AUX_TIMER_T0CFG_MODE_M)
{
ui32Val = HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG);
ui32Val &= ~(AUX_TIMER_T0CFG_TICK_SRC_POL_M |
AUX_TIMER_T0CFG_TICK_SRC_M);
// Set edge polarity.
if(ui32Config & AUX_TIMER_CFG_FALLING_EDGE)
{
ui32Val |= AUX_TIMER_T0CFG_TICK_SRC_POL;
}
// Set tick source.
ui32Val |= (ui32Config & AUX_TIMER_T0CFG_TICK_SRC_M);
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG) = ui32Val;
}
}
// Configure Timer 1.
if(ui32Timer & AUX_TIMER_1)
{
// Stop timer 1.
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CTL) = 0;
// Set mode.
ui32Val = HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CFG);
ui32Val &= ~(AUX_TIMER_T1CFG_MODE_M | AUX_TIMER_T1CFG_RELOAD_M);
ui32Val |= ((ui32Config) & (AUX_TIMER_T1CFG_MODE_M |
AUX_TIMER_T1CFG_RELOAD_M));
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CFG) = ui32Val;
// If edge counter, set rising/falling edge and tick source.
if(ui32Config & AUX_TIMER_T1CFG_MODE)
{
ui32Val = HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CFG);
ui32Val &= ~(AUX_TIMER_T1CFG_TICK_SRC_POL_M |
AUX_TIMER_T1CFG_TICK_SRC_M);
// Set edge polarity.
if(ui32Config & AUX_TIMER_CFG_FALLING_EDGE)
{
ui32Val |= AUX_TIMER_T1CFG_TICK_SRC_POL;
}
// Set tick source.
ui32Val |= (ui32Config & AUX_TIMER_T1CFG_TICK_SRC_M);
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CFG) = ui32Val;
}
}
}
//*****************************************************************************
//
// Start AUX timer
//
//*****************************************************************************
void
AUXTimerStart(uint32_t ui32Timer)
{
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) ||
(ui32Timer == AUX_TIMER_1) ||
(ui32Timer == AUX_TIMER_BOTH));
if(ui32Timer & AUX_TIMER_0)
{
// Start timer 0.
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CTL) = AUX_TIMER_T0CTL_EN;
}
if(ui32Timer & AUX_TIMER_1)
{
// Start timer 1.
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CTL) = AUX_TIMER_T1CTL_EN;
}
}
//*****************************************************************************
//
// Stop AUX timer
//
//*****************************************************************************
void
AUXTimerStop(uint32_t ui32Timer)
{
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) ||
(ui32Timer == AUX_TIMER_1) ||
(ui32Timer == AUX_TIMER_BOTH));
if(ui32Timer & AUX_TIMER_0)
{
// Stop timer 0.
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CTL) = 0;
}
if(ui32Timer & AUX_TIMER_1)
{
// Stop timer 1.
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CTL) = 0;
}
}
//*****************************************************************************
//
// Set AUX timer prescale value
//
//*****************************************************************************
void
AUXTimerPrescaleSet(uint32_t ui32Timer, uint32_t ui32PrescaleDiv)
{
uint32_t ui32Val;
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) || (ui32Timer == AUX_TIMER_1) ||
(ui32Timer == AUX_TIMER_BOTH));
ASSERT(ui32PrescaleDiv <= AUX_TIMER_PRESCALE_DIV_32768);
if(ui32Timer & AUX_TIMER_0)
{
// Set timer 0 prescale value.
ui32Val = HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG);
ui32Val &= ~AUX_TIMER_T0CFG_PRE_M;
ui32Val |= ui32PrescaleDiv << AUX_TIMER_T0CFG_PRE_S;
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG) = ui32Val;
}
if(ui32Timer & AUX_TIMER_1)
{
// Set timer 1 prescale value.
ui32Val = HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CFG);
ui32Val &= ~AUX_TIMER_T1CFG_PRE_M;
ui32Val |= ui32PrescaleDiv << AUX_TIMER_T1CFG_PRE_S;
HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T1CFG) = ui32Val;
}
}
//*****************************************************************************
//
// Get AUX timer prescale value
//
//*****************************************************************************
uint32_t
AUXTimerPrescaleGet(uint32_t ui32Timer)
{
uint32_t ui32Val;
uint32_t ui32PrescaleDiv;
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) || (ui32Timer == AUX_TIMER_1));
ui32Val = (HWREG(AUX_TIMER_BASE + AUX_TIMER_O_T0CFG));
if(ui32Timer & AUX_TIMER_0)
{
// Get timer 0 prescale value.
ui32PrescaleDiv =
(ui32Val & AUX_TIMER_T0CFG_PRE_M) >> AUX_TIMER_T0CFG_PRE_S;
}
else
{
// Get timer 1 prescale value.
ui32PrescaleDiv =
(ui32Val & AUX_TIMER_T1CFG_PRE_M) >> AUX_TIMER_T1CFG_PRE_S;
}
return(ui32PrescaleDiv);
}
third_party/ti/devices/cc26x0/driverlib/aux_timer.h
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/******************************************************************************
* Filename: aux_timer.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AUX Timer
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxtimer_api
//! @{
//
//*****************************************************************************
#ifndef __AUX_TIMER_H__
#define __AUX_TIMER_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_timer.h"
#include "debug.h"
#include "interrupt.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXTimerConfigure NOROM_AUXTimerConfigure
#define AUXTimerStart NOROM_AUXTimerStart
#define AUXTimerStop NOROM_AUXTimerStop
#define AUXTimerPrescaleSet NOROM_AUXTimerPrescaleSet
#define AUXTimerPrescaleGet NOROM_AUXTimerPrescaleGet
#endif
//*****************************************************************************
//
// Values that can be passed to AUXTimerConfigure().
//
//*****************************************************************************
#define AUX_TIMER_CFG_ONE_SHOT (AUX_TIMER_T0CFG_RELOAD_MAN) // One-shot timer mode
#define AUX_TIMER_CFG_PERIODIC (AUX_TIMER_T0CFG_RELOAD_CONT) // Period timer mode
#define AUX_TIMER_CFG_ONE_SHOT_EDGE_COUNT ((AUX_TIMER_T0CFG_RELOAD_MAN) | (AUX_TIMER_T0CFG_MODE_TICK)) // One-shot timer with edge count
#define AUX_TIMER_CFG_PERIODIC_EDGE_COUNT ((AUX_TIMER_T0CFG_RELOAD_CONT) | (AUX_TIMER_T0CFG_MODE_TICK)) // Periodic timer with edge count
#define AUX_TIMER_CFG_RISING_EDGE (AUX_TIMER_T0CFG_TICK_SRC_POL_RISE) // Count rising edges (used with edge count mode)
#define AUX_TIMER_CFG_FALLING_EDGE (AUX_TIMER_T0CFG_TICK_SRC_POL_FALL) // Count falling edges (used with edge count mode)
#define AUX_TIMER_CFG_TICK_SRC_RTC_EVENT (AUX_TIMER_T0CFG_TICK_SRC_RTC_CH2_EV) // AON wake-up event
#define AUX_TIMER_CFG_TICK_SRC_CMP_A (AUX_TIMER_T0CFG_TICK_SRC_AUX_COMPA) // Comparator A
#define AUX_TIMER_CFG_TICK_SRC_CMP_B (AUX_TIMER_T0CFG_TICK_SRC_AUX_COMPB) // Comparator B
#define AUX_TIMER_CFG_TICK_SRC_TDCDONE (AUX_TIMER_T0CFG_TICK_SRC_TDC_DONE) // TDC Done
#define AUX_TIMER_CFG_TICK_SRC_TIMER0_EVENT (AUX_TIMER_T1CFG_TICK_SRC_TIMER0_EV) // Timer 0 event
#define AUX_TIMER_CFG_TICK_SRC_TIMER1_EVENT (AUX_TIMER_T0CFG_TICK_SRC_TIMER1_EV) // Timer 1 event
#define AUX_TIMER_CFG_TICK_SRC_SMPH_RELEASE (AUX_TIMER_T0CFG_TICK_SRC_SMPH_AUTOTAKE_DONE) // Semaphore release
#define AUX_TIMER_CFG_TICK_SRC_ADC_DONE (AUX_TIMER_T0CFG_TICK_SRC_ADC_DONE) // ADC done
#define AUX_TIMER_CFG_TICK_SRC_RTC_4KHZ (AUX_TIMER_T0CFG_TICK_SRC_RTC_4KHZ)
#define AUX_TIMER_CFG_TICK_SRC_OBSMUX0 (AUX_TIMER_T0CFG_TICK_SRC_OBSMUX0)
#define AUX_TIMER_CFG_TICK_SRC_OBSMUX1 (AUX_TIMER_T0CFG_TICK_SRC_OBSMUX1)
#define AUX_TIMER_CFG_TICK_SRC_AON_SW (AUX_TIMER_T0CFG_TICK_SRC_AON_SW)
#define AUX_TIMER_CFG_TICK_SRC_AON_PROG_WU (AUX_TIMER_T0CFG_TICK_SRC_AON_PROG_WU)
#define AUX_TIMER_CFG_TICK_SRC_AIO0 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO0) // AIO_DAT[ 0]
#define AUX_TIMER_CFG_TICK_SRC_AIO1 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO1) // AIO_DAT[ 1]
#define AUX_TIMER_CFG_TICK_SRC_AIO2 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO2) // AIO_DAT[ 2]
#define AUX_TIMER_CFG_TICK_SRC_AIO3 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO3) // AIO_DAT[ 3]
#define AUX_TIMER_CFG_TICK_SRC_AIO4 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO4) // AIO_DAT[ 4]
#define AUX_TIMER_CFG_TICK_SRC_AIO5 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO5) // AIO_DAT[ 5]
#define AUX_TIMER_CFG_TICK_SRC_AIO6 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO6) // AIO_DAT[ 6]
#define AUX_TIMER_CFG_TICK_SRC_AIO7 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO7) // AIO_DAT[ 7]
#define AUX_TIMER_CFG_TICK_SRC_AIO8 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO8) // AIO_DAT[ 8]
#define AUX_TIMER_CFG_TICK_SRC_AIO9 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO9) // AIO_DAT[ 9]
#define AUX_TIMER_CFG_TICK_SRC_AIO10 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO10) // AIO_DAT[10]
#define AUX_TIMER_CFG_TICK_SRC_AIO11 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO11) // AIO_DAT[11]
#define AUX_TIMER_CFG_TICK_SRC_AIO12 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO12) // AIO_DAT[12]
#define AUX_TIMER_CFG_TICK_SRC_AIO13 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO13) // AIO_DAT[13]
#define AUX_TIMER_CFG_TICK_SRC_AIO14 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO14) // AIO_DAT[14]
#define AUX_TIMER_CFG_TICK_SRC_AIO15 (AUX_TIMER_T0CFG_TICK_SRC_AUXIO15) // AIO_DAT[15]
#define AUX_TIMER_CFG_TICK_SRC_ACLK_REF (AUX_TIMER_T0CFG_TICK_SRC_ACLK_REF) // ACLK_REF_i
#define AUX_TIMER_CFG_TICK_SRC_MCU_EVENT (AUX_TIMER_T0CFG_TICK_SRC_MCU_EVENT) // MCU event
#define AUX_TIMER_CFG_TICK_SRC_ADC_IRQ (AUX_TIMER_T0CFG_TICK_SRC_ADC_IRQ) // DMA done
//*****************************************************************************
//
// Values that can be passed to most of the timer APIs as the ui32Timer
// parameter.
//
//*****************************************************************************
#define AUX_TIMER_0 0x0000FFFF // AUX Timer 0
#define AUX_TIMER_1 0x00FF0000 // AUX Timer 1
#define AUX_TIMER_BOTH 0x00FFFFFF // AUX Timer Both 0 and 1
//*****************************************************************************
//
// Values that can be passed to AUXTimerPrescaleSet and returned from
// AUXTimerPrescaleGet.
//
//*****************************************************************************
#define AUX_TIMER_PRESCALE_DIV_1 0x00000000 // Prescale division ratio 1
#define AUX_TIMER_PRESCALE_DIV_2 0x00000001 // Prescale division ratio 2
#define AUX_TIMER_PRESCALE_DIV_4 0x00000002 // Prescale division ratio 4
#define AUX_TIMER_PRESCALE_DIV_8 0x00000003 // Prescale division ratio 8
#define AUX_TIMER_PRESCALE_DIV_16 0x00000004 // Prescale division ratio 16
#define AUX_TIMER_PRESCALE_DIV_32 0x00000005 // Prescale division ratio 32
#define AUX_TIMER_PRESCALE_DIV_64 0x00000006 // Prescale division ratio 64
#define AUX_TIMER_PRESCALE_DIV_128 0x00000007 // Prescale division ratio 128
#define AUX_TIMER_PRESCALE_DIV_256 0x00000008 // Prescale division ratio 256
#define AUX_TIMER_PRESCALE_DIV_512 0x00000009 // Prescale division ratio 512
#define AUX_TIMER_PRESCALE_DIV_1028 0x0000000A // Prescale div. ratio 1028
#define AUX_TIMER_PRESCALE_DIV_2048 0x0000000B // Prescale div. ratio 2048
#define AUX_TIMER_PRESCALE_DIV_4096 0x0000000C // Prescale div. ratio 4096
#define AUX_TIMER_PRESCALE_DIV_8192 0x0000000D // Prescale div. ratio 8192
#define AUX_TIMER_PRESCALE_DIV_16384 0x0000000E // Prescale div. ratio 16384
#define AUX_TIMER_PRESCALE_DIV_32768 0x0000000F // Prescale div. ratio 32768
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Configure AUX timer.
//!
//! This call configures the AUX timer selected by the \c ui32Timer.
//! The timer module is disabled before being configured and is left in the
//! disabled state.
//!
//! The configuration is specified in \c ui32Config as one of the following
//! values:
//! - \ref AUX_TIMER_CFG_ONE_SHOT : One-shot timer.
//! - \ref AUX_TIMER_CFG_PERIODIC : Periodic timer.
//! - \ref AUX_TIMER_CFG_ONE_SHOT_EDGE_COUNT : One-shot edge counter.
//! - \ref AUX_TIMER_CFG_PERIODIC_EDGE_COUNT : Periodic edge counter.
//!
//! When configured as timer, the counter is incremented based on the AUX clock
//! after the prescaler. The prescale division ratio is set
//! using \ref AUXTimerPrescaleSet().
//!
//! When configured as an edge counter the counter is incremented only on edges
//! of the selected event.
//! The polarity of the event is selected by:
//! - \ref AUX_TIMER_CFG_RISING_EDGE : rising edge trigger
//! - \ref AUX_TIMER_CFG_FALLING_EDGE : falling edge trigger
//!
//! The event source is selected as one of the following defines:
//! - \ref AUX_TIMER_CFG_TICK_SRC_RTC_EVENT
//! - \ref AUX_TIMER_CFG_TICK_SRC_CMP_A
//! - \ref AUX_TIMER_CFG_TICK_SRC_CMP_B
//! - \ref AUX_TIMER_CFG_TICK_SRC_TDCDONE
//! - \ref AUX_TIMER_CFG_TICK_SRC_TIMER0_EVENT
//! - \ref AUX_TIMER_CFG_TICK_SRC_TIMER1_EVENT
//! - \ref AUX_TIMER_CFG_TICK_SRC_SMPH_RELEASE
//! - \ref AUX_TIMER_CFG_TICK_SRC_ADC_DONE
//! - \ref AUX_TIMER_CFG_TICK_SRC_RTC_4KHZ
//! - \ref AUX_TIMER_CFG_TICK_SRC_OBSMUX0
//! - \ref AUX_TIMER_CFG_TICK_SRC_OBSMUX1
//! - \ref AUX_TIMER_CFG_TICK_SRC_AON_SW
//! - \ref AUX_TIMER_CFG_TICK_SRC_AON_PROG_WU
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO0
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO1
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO2
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO3
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO4
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO5
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO6
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO7
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO8
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO9
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO10
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO11
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO12
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO13
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO14
//! - \ref AUX_TIMER_CFG_TICK_SRC_AIO15
//! - \ref AUX_TIMER_CFG_TICK_SRC_ACLK_REF
//! - \ref AUX_TIMER_CFG_TICK_SRC_MCU_EVENT
//! - \ref AUX_TIMER_CFG_TICK_SRC_ADC_IRQ
//!
//! The mode, event polarity and event source are configured by setting the
//! \c ui32Config parameter as the bitwise OR of the various settings.
//! Example: (\ref AUX_TIMER_CFG_ONE_SHOT_EDGE_COUNT |
//! \ref AUX_TIMER_CFG_RISING_EDGE |
//! \ref AUX_TIMER_CFG_TICK_SRC_RTC_EVENT).
//!
//! \note When used as an edge counter the prescaler should be set to
//! \ref AUX_TIMER_PRESCALE_DIV_1.
//!
//! \note A timer can not trigger itself thus timer 0 can \b not use
//! \ref AUX_TIMER_CFG_TICK_SRC_TIMER0_EVENT and timer 1 can \b not use
//! \ref AUX_TIMER_CFG_TICK_SRC_TIMER1_EVENT.
//!
//! \param ui32Timer is the timer to configure.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//! - \ref AUX_TIMER_BOTH
//! \param ui32Config is the timer configuration.
//!
//! \return None
//!
//! \sa \ref AUXTimerPrescaleSet()
//
//*****************************************************************************
extern void AUXTimerConfigure(uint32_t ui32Timer, uint32_t ui32Config);
//*****************************************************************************
//
//! \brief Start AUX timer(s).
//!
//! This call starts the selected AUX timer(s).
//!
//! \note The counter will start counting up from zero.
//!
//! \param ui32Timer is the timer to start.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//! - \ref AUX_TIMER_BOTH
//!
//! \return None
//!
//! \sa \ref AUXTimerStop()
//
//*****************************************************************************
extern void AUXTimerStart(uint32_t ui32Timer);
//*****************************************************************************
//
//! \brief Stop AUX timer(s).
//!
//! This call stops the selected AUX timer(s).
//!
//! \param ui32Timer is the timer to stop.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//! - \ref AUX_TIMER_BOTH
//!
//! \return None
//!
//! \sa \ref AUXTimerStart()
//
//*****************************************************************************
extern void AUXTimerStop(uint32_t ui32Timer);
//*****************************************************************************
//
//! \brief Set AUX timer target value.
//!
//! The timer counts from zero to the target value. When target value is
//! reached an event is generated.
//!
//! \param ui32Timer is the timer to set the target value for.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//! \param ui32Target is the timer target value.
//! - For \ref AUX_TIMER_0 the target value must be an integer in the range 0..65535 (16 bit).
//! - For \ref AUX_TIMER_1 the target value must be an integer in the range 0..255 (8 bit).
//!
//! \return None
//!
//! \sa \ref AUXTimerTargetValGet()
//
//*****************************************************************************
__STATIC_INLINE void
AUXTimerTargetValSet(uint32_t ui32Timer, uint32_t ui32Target)
{
uint32_t ui32Addr;
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) || (ui32Timer == AUX_TIMER_1));
ASSERT(((ui32Timer & AUX_TIMER_0) && (ui32Target <= 65535)) ||
((ui32Timer & AUX_TIMER_1) && (ui32Target <= 255)));
ui32Addr = (ui32Timer & AUX_TIMER_0) ?
(AUX_TIMER_BASE + AUX_TIMER_O_T0TARGET) :
(AUX_TIMER_BASE + AUX_TIMER_O_T1TARGET);
HWREG(ui32Addr) = ui32Target;
}
//*****************************************************************************
//
//! \brief Get AUX timer target value.
//!
//! The timer counts from zero to the target value. When target value is
//! reached an event is generated. This function returns the programmed target
//! value for the specified timer.
//!
//! \param ui32Timer is the timer to get the target value from.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//!
//! \return Returns target value for the specified timer
//!
//! \sa \ref AUXTimerTargetValSet()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AUXTimerTargetValGet(uint32_t ui32Timer)
{
// Check the arguments.
ASSERT((ui32Timer == AUX_TIMER_0) || (ui32Timer == AUX_TIMER_1));
return(HWREG((ui32Timer & AUX_TIMER_0) ?
(AUX_TIMER_BASE + AUX_TIMER_O_T0TARGET) :
(AUX_TIMER_BASE + AUX_TIMER_O_T1TARGET)));
}
//*****************************************************************************
//
//! \brief Set AUX timer prescale value.
//!
//! When configured as timer, the counter is incremented based on the AUX clock
//! after the prescaler.
//!
//! \note Setting prescale value is \b not advised when the timer is running.
//!
//! \note When timer is used as an edge counter the prescaler should be
//! set to \ref AUX_TIMER_PRESCALE_DIV_1.
//!
//! \param ui32Timer is the timer to set the prescale on.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//! - \ref AUX_TIMER_BOTH
//! \param ui32PrescaleDiv is the prescaler division ratio.
//! - \ref AUX_TIMER_PRESCALE_DIV_1 : Prescale division ratio 1
//! - \ref AUX_TIMER_PRESCALE_DIV_2 : Prescale division ratio 2
//! - \ref AUX_TIMER_PRESCALE_DIV_4 : Prescale division ratio 4
//! - \ref AUX_TIMER_PRESCALE_DIV_16 : Prescale division ratio 16
//! - \ref AUX_TIMER_PRESCALE_DIV_32 : Prescale division ratio 32
//! - \ref AUX_TIMER_PRESCALE_DIV_64 : Prescale division ratio 64
//! - \ref AUX_TIMER_PRESCALE_DIV_128 : Prescale division ratio 128
//! - \ref AUX_TIMER_PRESCALE_DIV_256 : Prescale division ratio 256
//! - \ref AUX_TIMER_PRESCALE_DIV_1028 : Prescale division ratio 1028
//! - \ref AUX_TIMER_PRESCALE_DIV_2048 : Prescale division ratio 2048
//! - \ref AUX_TIMER_PRESCALE_DIV_4096 : Prescale division ratio 4096
//! - \ref AUX_TIMER_PRESCALE_DIV_8192 : Prescale division ratio 8192
//! - \ref AUX_TIMER_PRESCALE_DIV_16384 : Prescale division ratio 16384
//! - \ref AUX_TIMER_PRESCALE_DIV_32768 : Prescale division ratio 32768
//!
//! \return None
//!
//! \sa \ref AUXTimerPrescaleGet()
//
//*****************************************************************************
extern void AUXTimerPrescaleSet(uint32_t ui32Timer, uint32_t ui32PrescaleDiv);
//*****************************************************************************
//
//! \brief Get AUX timer prescale value.
//!
//! When configured as timer, the counter is incremented based on the AUX clock
//! after the prescaler. This call returns the setting of the prescale divide
//! ratio for the specified timer.
//!
//! \param ui32Timer is the timer to get the prescale value from.
//! - \ref AUX_TIMER_0
//! - \ref AUX_TIMER_1
//!
//! \return Returns the prescaler division ratio as one of the following values:
//! - \ref AUX_TIMER_PRESCALE_DIV_1 : Prescale division ratio 1
//! - \ref AUX_TIMER_PRESCALE_DIV_2 : Prescale division ratio 2
//! - \ref AUX_TIMER_PRESCALE_DIV_4 : Prescale division ratio 4
//! - \ref AUX_TIMER_PRESCALE_DIV_16 : Prescale division ratio 16
//! - \ref AUX_TIMER_PRESCALE_DIV_32 : Prescale division ratio 32
//! - \ref AUX_TIMER_PRESCALE_DIV_64 : Prescale division ratio 64
//! - \ref AUX_TIMER_PRESCALE_DIV_128 : Prescale division ratio 128
//! - \ref AUX_TIMER_PRESCALE_DIV_256 : Prescale division ratio 256
//! - \ref AUX_TIMER_PRESCALE_DIV_1028 : Prescale division ratio 1028
//! - \ref AUX_TIMER_PRESCALE_DIV_2048 : Prescale division ratio 2048
//! - \ref AUX_TIMER_PRESCALE_DIV_4096 : Prescale division ratio 4096
//! - \ref AUX_TIMER_PRESCALE_DIV_8192 : Prescale division ratio 8192
//! - \ref AUX_TIMER_PRESCALE_DIV_16384 : Prescale division ratio 16384
//! - \ref AUX_TIMER_PRESCALE_DIV_32768 : Prescale division ratio 32768
//!
//! \sa \ref AUXTimerPrescaleSet()
//
//*****************************************************************************
extern uint32_t AUXTimerPrescaleGet(uint32_t ui32Timer);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXTimerConfigure
#undef AUXTimerConfigure
#define AUXTimerConfigure ROM_AUXTimerConfigure
#endif
#ifdef ROM_AUXTimerStart
#undef AUXTimerStart
#define AUXTimerStart ROM_AUXTimerStart
#endif
#ifdef ROM_AUXTimerStop
#undef AUXTimerStop
#define AUXTimerStop ROM_AUXTimerStop
#endif
#ifdef ROM_AUXTimerPrescaleSet
#undef AUXTimerPrescaleSet
#define AUXTimerPrescaleSet ROM_AUXTimerPrescaleSet
#endif
#ifdef ROM_AUXTimerPrescaleGet
#undef AUXTimerPrescaleGet
#define AUXTimerPrescaleGet ROM_AUXTimerPrescaleGet
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_TIMER_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/aux_wuc.c
Vendored
-283
View File
@@ -1,283 +0,0 @@
/******************************************************************************
* Filename: aux_wuc.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for the AUX Wakeup Controller.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "aux_wuc.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef AUXWUCClockEnable
#define AUXWUCClockEnable NOROM_AUXWUCClockEnable
#undef AUXWUCClockDisable
#define AUXWUCClockDisable NOROM_AUXWUCClockDisable
#undef AUXWUCClockStatus
#define AUXWUCClockStatus NOROM_AUXWUCClockStatus
#undef AUXWUCPowerCtrl
#define AUXWUCPowerCtrl NOROM_AUXWUCPowerCtrl
#endif
//****************************************************************************
//
//! Enable clocks for peripherals in the AUX domain
//
//****************************************************************************
void
AUXWUCClockEnable(uint32_t ui32Clocks)
{
// Check the arguments.
ASSERT((ui32Clocks & AUX_WUC_ADI_CLOCK) ||
(ui32Clocks & AUX_WUC_OSCCTRL_CLOCK) ||
(ui32Clocks & AUX_WUC_TDCIF_CLOCK) ||
(ui32Clocks & AUX_WUC_ANAIF_CLOCK) ||
(ui32Clocks & AUX_WUC_TIMER_CLOCK) ||
(ui32Clocks & AUX_WUC_AIODIO0_CLOCK) ||
(ui32Clocks & AUX_WUC_AIODIO1_CLOCK) ||
(ui32Clocks & AUX_WUC_SMPH_CLOCK) ||
(ui32Clocks & AUX_WUC_TDC_CLOCK) ||
(ui32Clocks & AUX_WUC_ADC_CLOCK) ||
(ui32Clocks & AUX_WUC_REF_CLOCK));
// Enable some of the clocks in the clock register.
HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) |= (ui32Clocks &
AUX_WUC_MODCLK_MASK);
// Check the rest.
if(ui32Clocks & AUX_WUC_ADC_CLOCK)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) =
AUX_WUC_ADCCLKCTL_REQ;
}
if(ui32Clocks & AUX_WUC_TDC_CLOCK)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_TDCCLKCTL) =
AUX_WUC_TDCCLKCTL_REQ;
}
if(ui32Clocks & AUX_WUC_REF_CLOCK)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_REFCLKCTL) =
AUX_WUC_REFCLKCTL_REQ;
}
}
//****************************************************************************
//
//! Disable clocks for peripherals in the AUX domain
//
//****************************************************************************
void
AUXWUCClockDisable(uint32_t ui32Clocks)
{
// Check the arguments.
ASSERT((ui32Clocks & AUX_WUC_ADI_CLOCK) ||
(ui32Clocks & AUX_WUC_OSCCTRL_CLOCK) ||
(ui32Clocks & AUX_WUC_TDCIF_CLOCK) ||
(ui32Clocks & AUX_WUC_ANAIF_CLOCK) ||
(ui32Clocks & AUX_WUC_TIMER_CLOCK) ||
(ui32Clocks & AUX_WUC_AIODIO0_CLOCK) ||
(ui32Clocks & AUX_WUC_AIODIO1_CLOCK) ||
(ui32Clocks & AUX_WUC_SMPH_CLOCK) ||
(ui32Clocks & AUX_WUC_TDC_CLOCK) ||
(ui32Clocks & AUX_WUC_ADC_CLOCK) ||
(ui32Clocks & AUX_WUC_REF_CLOCK));
// Disable some of the clocks in the clock register.
HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0) &= ~(ui32Clocks &
AUX_WUC_MODCLK_MASK);
// Check the rest.
if(ui32Clocks & AUX_WUC_ADC_CLOCK)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL) &=
~AUX_WUC_ADCCLKCTL_REQ;
}
if(ui32Clocks & AUX_WUC_TDC_CLOCK)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_TDCCLKCTL) &=
~AUX_WUC_TDCCLKCTL_REQ;
}
if(ui32Clocks & AUX_WUC_REF_CLOCK)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_REFCLKCTL) &=
~AUX_WUC_REFCLKCTL_REQ;
}
}
//****************************************************************************
//
//! Get the status of a clock
//
//****************************************************************************
uint32_t
AUXWUCClockStatus(uint32_t ui32Clocks)
{
bool bClockStatus;
uint32_t ui32ClockRegister;
// Check the arguments.
ASSERT((ui32Clocks & AUX_WUC_ADI_CLOCK) ||
(ui32Clocks & AUX_WUC_OSCCTRL_CLOCK) ||
(ui32Clocks & AUX_WUC_TDCIF_CLOCK) ||
(ui32Clocks & AUX_WUC_ANAIF_CLOCK) ||
(ui32Clocks & AUX_WUC_TIMER_CLOCK) ||
(ui32Clocks & AUX_WUC_AIODIO0_CLOCK) ||
(ui32Clocks & AUX_WUC_AIODIO1_CLOCK) ||
(ui32Clocks & AUX_WUC_SMPH_CLOCK) ||
(ui32Clocks & AUX_WUC_TDC_CLOCK) ||
(ui32Clocks & AUX_WUC_ADC_CLOCK) ||
(ui32Clocks & AUX_WUC_REF_CLOCK));
bClockStatus = true;
// Read the status registers.
ui32ClockRegister = HWREG(AUX_WUC_BASE + AUX_WUC_O_MODCLKEN0);
// Check all requested clocks
if(ui32Clocks & AUX_WUC_ADI_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_AUX_ADI4 ?
true : false);
}
if(ui32Clocks & AUX_WUC_OSCCTRL_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_AUX_DDI0_OSC ?
true : false);
}
if(ui32Clocks & AUX_WUC_TDCIF_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_TDC ?
true : false);
}
if(ui32Clocks & AUX_WUC_ANAIF_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_ANAIF ?
true : false);
}
if(ui32Clocks & AUX_WUC_TIMER_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_TIMER ?
true : false);
}
if(ui32Clocks & AUX_WUC_AIODIO0_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_AIODIO0 ?
true : false);
}
if(ui32Clocks & AUX_WUC_AIODIO1_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_AIODIO1 ?
true : false);
}
if(ui32Clocks & AUX_WUC_SMPH_CLOCK)
{
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_MODCLKEN0_SMPH ?
true : false);
}
if(ui32Clocks & AUX_WUC_ADC_CLOCK)
{
ui32ClockRegister = HWREG(AUX_WUC_BASE + AUX_WUC_O_ADCCLKCTL);
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_ADCCLKCTL_ACK ?
true : false);
}
if(ui32Clocks & AUX_WUC_TDC_CLOCK)
{
ui32ClockRegister = HWREG(AUX_WUC_BASE + AUX_WUC_O_TDCCLKCTL);
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_TDCCLKCTL_ACK ?
true : false);
}
if(ui32Clocks & AUX_WUC_REF_CLOCK)
{
ui32ClockRegister = HWREG(AUX_WUC_BASE + AUX_WUC_O_REFCLKCTL);
bClockStatus = bClockStatus && (ui32ClockRegister &
AUX_WUC_REFCLKCTL_ACK ?
true : false);
}
// Return the clock status.
return bClockStatus ? AUX_WUC_CLOCK_READY : AUX_WUC_CLOCK_OFF;
}
//****************************************************************************
//
//! Control the power to the AUX domain
//
//****************************************************************************
void
AUXWUCPowerCtrl(uint32_t ui32PowerMode)
{
// Check the arguments.
ASSERT((ui32PowerMode == AUX_WUC_POWER_OFF) ||
(ui32PowerMode == AUX_WUC_POWER_DOWN) ||
(ui32PowerMode == AUX_WUC_POWER_ACTIVE));
// Power on/off.
if(ui32PowerMode == AUX_WUC_POWER_OFF)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_PWROFFREQ) = AUX_WUC_PWROFFREQ_REQ;
HWREG(AUX_WUC_BASE + AUX_WUC_O_MCUBUSCTL) = AUX_WUC_MCUBUSCTL_DISCONNECT_REQ;
return;
}
else
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_PWROFFREQ) = 0x0;
}
// Power down/active.
if(ui32PowerMode == AUX_WUC_POWER_DOWN)
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_PWRDWNREQ) = AUX_WUC_PWRDWNREQ_REQ;
HWREG(AUX_WUC_BASE + AUX_WUC_O_MCUBUSCTL) = AUX_WUC_MCUBUSCTL_DISCONNECT_REQ;
}
else
{
HWREG(AUX_WUC_BASE + AUX_WUC_O_PWRDWNREQ) = 0x0;
}
}
third_party/ti/devices/cc26x0/driverlib/aux_wuc.h
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/******************************************************************************
* Filename: aon_wuc.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the AUX Wakeup Controller
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//****************************************************************************
//
//! \addtogroup aux_group
//! @{
//! \addtogroup auxwuc_api
//! @{
//
//****************************************************************************
#ifndef __AUX_WUC_H__
#define __AUX_WUC_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_aux_wuc.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define AUXWUCClockEnable NOROM_AUXWUCClockEnable
#define AUXWUCClockDisable NOROM_AUXWUCClockDisable
#define AUXWUCClockStatus NOROM_AUXWUCClockStatus
#define AUXWUCPowerCtrl NOROM_AUXWUCPowerCtrl
#endif
//*****************************************************************************
//
// Defines for the AUX power control.
//
//*****************************************************************************
#define AUX_WUC_POWER_OFF 0x00000001
#define AUX_WUC_POWER_DOWN 0x00000002
#define AUX_WUC_POWER_ACTIVE 0x00000004
//*****************************************************************************
//
// Defines for the AUX peripherals clock control.
//
//*****************************************************************************
#define AUX_WUC_SMPH_CLOCK (AUX_WUC_MODCLKEN0_SMPH_EN)
#define AUX_WUC_AIODIO0_CLOCK (AUX_WUC_MODCLKEN0_AIODIO0_EN)
#define AUX_WUC_AIODIO1_CLOCK (AUX_WUC_MODCLKEN0_AIODIO1_EN)
#define AUX_WUC_TIMER_CLOCK (AUX_WUC_MODCLKEN0_TIMER_EN)
#define AUX_WUC_ANAIF_CLOCK (AUX_WUC_MODCLKEN0_ANAIF_EN)
#define AUX_WUC_TDCIF_CLOCK (AUX_WUC_MODCLKEN0_TDC_EN)
#define AUX_WUC_OSCCTRL_CLOCK (AUX_WUC_MODCLKEN0_AUX_DDI0_OSC_EN)
#define AUX_WUC_ADI_CLOCK (AUX_WUC_MODCLKEN0_AUX_ADI4_EN)
#define AUX_WUC_MODCLK_MASK 0x000000FF
#define AUX_WUC_TDC_CLOCK 0x00000100
#define AUX_WUC_ADC_CLOCK 0x00000200
#define AUX_WUC_REF_CLOCK 0x00000400
#define AUX_WUC_CLOCK_OFF 0x00000000
#define AUX_WUC_CLOCK_UNSTABLE 0x00000001
#define AUX_WUC_CLOCK_READY 0x00000011
#define AUX_WUC_CLOCK_HIFREQ 0x00000000
#define AUX_WUC_CLOCK_LOFREQ 0x00000001
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//****************************************************************************
//
//! \brief Enable clocks for peripherals in the AUX domain.
//!
//! Use this function to enable specific clocks in the AUX domain.
//!
//! \param ui32Clocks is a bitmap of clocks to enable.
//! Use a bitwise OR combination of the following values:
//! - \ref AUX_WUC_ADI_CLOCK
//! - \ref AUX_WUC_OSCCTRL_CLOCK
//! - \ref AUX_WUC_TDCIF_CLOCK
//! - \ref AUX_WUC_ANAIF_CLOCK
//! - \ref AUX_WUC_TIMER_CLOCK
//! - \ref AUX_WUC_AIODIO0_CLOCK
//! - \ref AUX_WUC_AIODIO1_CLOCK
//! - \ref AUX_WUC_SMPH_CLOCK
//! - \ref AUX_WUC_TDC_CLOCK
//! - \ref AUX_WUC_ADC_CLOCK
//! - \ref AUX_WUC_REF_CLOCK
//!
//! \return None
//!
//! \sa \ref AUXWUCClockDisable()
//
//****************************************************************************
extern void AUXWUCClockEnable(uint32_t ui32Clocks);
//****************************************************************************
//
//! \brief Disable clocks for peripherals in the AUX domain.
//!
//! Use this function to enable specific clocks in the AUX domain.
//!
//! \param ui32Clocks a bitmap of clocks to disable.
//! Use a bitwise OR combination of the following values:
//! - \ref AUX_WUC_ADI_CLOCK
//! - \ref AUX_WUC_OSCCTRL_CLOCK
//! - \ref AUX_WUC_TDCIF_CLOCK
//! - \ref AUX_WUC_ANAIF_CLOCK
//! - \ref AUX_WUC_TIMER_CLOCK
//! - \ref AUX_WUC_AIODIO0_CLOCK
//! - \ref AUX_WUC_AIODIO1_CLOCK
//! - \ref AUX_WUC_SMPH_CLOCK
//! - \ref AUX_WUC_TDC_CLOCK
//! - \ref AUX_WUC_ADC_CLOCK
//! - \ref AUX_WUC_REF_CLOCK
//!
//! \return None
//!
//! \sa \ref AUXWUCClockEnable()
//
//****************************************************************************
extern void AUXWUCClockDisable(uint32_t ui32Clocks);
//****************************************************************************
//
//! \brief Get the status of a clock.
//!
//! Use this function to poll the status of a specific clock in the AUX
//! domain.
//!
//! \param ui32Clocks is the clock for which to return status.
//! - \ref AUX_WUC_ADI_CLOCK
//! - \ref AUX_WUC_OSCCTRL_CLOCK
//! - \ref AUX_WUC_TDCIF_CLOCK
//! - \ref AUX_WUC_ANAIF_CLOCK
//! - \ref AUX_WUC_TIMER_CLOCK
//! - \ref AUX_WUC_AIODIO0_CLOCK
//! - \ref AUX_WUC_AIODIO1_CLOCK
//! - \ref AUX_WUC_SMPH_CLOCK
//! - \ref AUX_WUC_TDC_CLOCK
//! - \ref AUX_WUC_ADC_CLOCK
//! - \ref AUX_WUC_REF_CLOCK
//!
//! \return Returns the status of the clock as one of two states:
//! - \ref AUX_WUC_CLOCK_OFF
//! - \ref AUX_WUC_CLOCK_READY
//
//****************************************************************************
extern uint32_t AUXWUCClockStatus(uint32_t ui32Clocks);
//****************************************************************************
//
//! \brief Request a high or low frequency clock source.
//!
//! Using this function it is possible to make a request to the System
//! Control to use a high or low frequency clock as clock source for the AUX
//! domain.
//!
//! \note A low frequency clock is always 32 kHz, while a high frequency clock
//! is really a large span of frequencies determined by the clock source (High
//! Frequency or Medium Frequency) and the setting for the clock divider for
//! the AUX domain in the System Control.
//!
//! \param ui32ClockFreq determines the clock source frequency.
//! - \ref AUX_WUC_CLOCK_LOFREQ : Request low frequency clock source for AUX domain.
//! - \ref AUX_WUC_CLOCK_HIFREQ : Request high frequency clock source for AUX domain.
//!
//! \return
//
//****************************************************************************
__STATIC_INLINE void
AUXWUCClockFreqReq(uint32_t ui32ClockFreq)
{
// Check the arguments.
ASSERT((ui32ClockFreq == AUX_WUC_CLOCK_HIFREQ) ||
(ui32ClockFreq == AUX_WUC_CLOCK_LOFREQ));
// Set the request
HWREG(AUX_WUC_BASE + AUX_WUC_O_CLKLFREQ) = ui32ClockFreq;
}
//****************************************************************************
//
//! \brief Control the power to the AUX domain.
//!
//! Use this function to set the power mode of the entire AUX domain.
//!
//! \param ui32PowerMode control the desired power mode for the AUX domain.
//! The domain has three different power modes:
//! - \ref AUX_WUC_POWER_OFF
//! - \ref AUX_WUC_POWER_DOWN
//! - \ref AUX_WUC_POWER_ACTIVE
//!
//! \return None
//
//****************************************************************************
extern void AUXWUCPowerCtrl(uint32_t ui32PowerMode);
//*****************************************************************************
//
//! \brief Freeze the AUX IOs.
//!
//! To retain the values of the output IOs during a powerdown of the AUX domain
//! all IO latches in the AUX domain should be frozen in their current state.
//! This ensures that software can regain control of the IOs after a powerdown
//! without the IOs first falling back to the default values (i.e. input and
//! pull-up).
//!
//! \return None
//!
//! \sa AUXWUCFreezeDisable()
//
//*****************************************************************************
__STATIC_INLINE void
AUXWUCFreezeEnable(void)
{
// Set the AUX WUC latches as static.
HWREG(AUX_WUC_BASE + AUX_WUC_O_AUXIOLATCH) = 0x0;
}
//*****************************************************************************
//
//! \brief Unfreeze the AUX IOs.
//!
//! When restarting the AUX domain after it has entered powerdown mode, the
//! software can regain control of the IOs by setting the IO latches as
//! transparent.
//!
//! \note The IOs should not be unfrozen before software has restored
//! the functionality of the IO.
//!
//! \return None
//!
//! \sa AUXWUCFreezeEnable()
//
//*****************************************************************************
__STATIC_INLINE void
AUXWUCFreezeDisable(void)
{
// Set the AUX WUC latches as transparent.
HWREG(AUX_WUC_BASE + AUX_WUC_O_AUXIOLATCH) = AUX_WUC_AUXIOLATCH_EN;
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_AUXWUCClockEnable
#undef AUXWUCClockEnable
#define AUXWUCClockEnable ROM_AUXWUCClockEnable
#endif
#ifdef ROM_AUXWUCClockDisable
#undef AUXWUCClockDisable
#define AUXWUCClockDisable ROM_AUXWUCClockDisable
#endif
#ifdef ROM_AUXWUCClockStatus
#undef AUXWUCClockStatus
#define AUXWUCClockStatus ROM_AUXWUCClockStatus
#endif
#ifdef ROM_AUXWUCPowerCtrl
#undef AUXWUCPowerCtrl
#define AUXWUCPowerCtrl ROM_AUXWUCPowerCtrl
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_WUC_H__
//****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//****************************************************************************
third_party/ti/devices/cc26x0/driverlib/bin/ccs/driverlib.lib
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third_party/ti/devices/cc26x0/driverlib/bin/ccs/makedefs
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COMPILER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/ti-cgt-arm_15.12.1.LTS/bin/armcl"
COMPILER_INCL = "C:/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/ti-cgt-arm_15.12.1.LTS/include"
ARCHIVER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/ti-cgt-arm_15.12.1.LTS/bin/armar"
third_party/ti/devices/cc26x0/driverlib/bin/ccs/makefile
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# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.obj
$(COMPILER_TOOL) --compiler_revision
@ echo CCS: Compile adi.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/adi.c"
@ echo CCS: Compile aon_batmon.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_batmon.c"
@ echo CCS: Compile aon_event.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_event.c"
@ echo CCS: Compile aon_ioc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_ioc.c"
@ echo CCS: Compile aon_rtc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_rtc.c"
@ echo CCS: Compile aon_wuc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aon_wuc.c"
@ echo CCS: Compile aux_adc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_adc.c"
@ echo CCS: Compile aux_smph.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_smph.c"
@ echo CCS: Compile aux_tdc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_tdc.c"
@ echo CCS: Compile aux_timer.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_timer.c"
@ echo CCS: Compile aux_wuc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/aux_wuc.c"
@ echo CCS: Compile ccfgread.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ccfgread.c"
@ echo CCS: Compile chipinfo.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/chipinfo.c"
@ echo CCS: Compile cpu.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/cpu.c"
@ echo CCS: Compile crypto.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/crypto.c"
@ echo CCS: Compile ddi.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ddi.c"
@ echo CCS: Compile debug.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/debug.c"
@ echo CCS: Compile driverlib_release.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/driverlib_release.c"
@ echo CCS: Compile event.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/event.c"
@ echo CCS: Compile flash.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/flash.c"
@ echo CCS: Compile gpio.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/gpio.c"
@ echo CCS: Compile i2c.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/i2c.c"
@ echo CCS: Compile i2s.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/i2s.c"
@ echo CCS: Compile interrupt.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/interrupt.c"
@ echo CCS: Compile ioc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ioc.c"
@ echo CCS: Compile osc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/osc.c"
@ echo CCS: Compile prcm.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/prcm.c"
@ echo CCS: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c"
@ echo CCS: Compile rfc.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/rfc.c"
@ echo CCS: Compile rom_crypto.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/rom_crypto.c"
@ echo CCS: Compile setup.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/setup.c"
@ echo CCS: Compile setup_rom.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/setup_rom.c"
@ echo CCS: Compile smph.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/smph.c"
@ echo CCS: Compile ssi.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/ssi.c"
@ echo CCS: Compile sw_chacha.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sw_chacha.c"
@ echo CCS: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c"
@ echo CCS: Compile systick.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/systick.c"
@ echo CCS: Compile sys_ctrl.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c"
@ echo CCS: Compile timer.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/timer.c"
@ echo CCS: Compile trng.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/trng.c"
@ echo CCS: Compile uart.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/uart.c"
@ echo CCS: Compile udma.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/udma.c"
@ echo CCS: Compile vims.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/vims.c"
@ echo CCS: Compile watchdog.c
@ $(COMPILER_TOOL) --silicon_version=7M3 --code_state=16 --abi=eabi -me --opt_level=4 --opt_for_speed=0 --include_path=$(COMPILER_INCL) -g --gcc --define=ccs --display_error_number --diag_warning=225 --gen_func_subsections=on --preproc_with_compile "$(MAKEFILE_DIR)../../../driverlib/watchdog.c"
@ echo CCS: Archive driverlib.lib
@ $(ARCHIVER_TOOL) r "driverlib.lib" "$(MAKEFILE_DIR)adi.obj" "$(MAKEFILE_DIR)aon_batmon.obj" "$(MAKEFILE_DIR)aon_event.obj" "$(MAKEFILE_DIR)aon_ioc.obj" "$(MAKEFILE_DIR)aon_rtc.obj" "$(MAKEFILE_DIR)aon_wuc.obj" "$(MAKEFILE_DIR)aux_adc.obj" "$(MAKEFILE_DIR)aux_smph.obj" "$(MAKEFILE_DIR)aux_tdc.obj" "$(MAKEFILE_DIR)aux_timer.obj" "$(MAKEFILE_DIR)aux_wuc.obj" "$(MAKEFILE_DIR)ccfgread.obj" "$(MAKEFILE_DIR)chipinfo.obj" "$(MAKEFILE_DIR)cpu.obj" "$(MAKEFILE_DIR)crypto.obj" "$(MAKEFILE_DIR)ddi.obj" "$(MAKEFILE_DIR)debug.obj" "$(MAKEFILE_DIR)driverlib_release.obj" "$(MAKEFILE_DIR)event.obj" "$(MAKEFILE_DIR)flash.obj" "$(MAKEFILE_DIR)gpio.obj" "$(MAKEFILE_DIR)i2c.obj" "$(MAKEFILE_DIR)i2s.obj" "$(MAKEFILE_DIR)interrupt.obj" "$(MAKEFILE_DIR)ioc.obj" "$(MAKEFILE_DIR)osc.obj" "$(MAKEFILE_DIR)prcm.obj" "$(MAKEFILE_DIR)pwr_ctrl.obj" "$(MAKEFILE_DIR)rfc.obj" "$(MAKEFILE_DIR)rom_crypto.obj" "$(MAKEFILE_DIR)setup.obj" "$(MAKEFILE_DIR)setup_rom.obj" "$(MAKEFILE_DIR)smph.obj" "$(MAKEFILE_DIR)ssi.obj" "$(MAKEFILE_DIR)sw_chacha.obj" "$(MAKEFILE_DIR)sw_poly1305-donna.obj" "$(MAKEFILE_DIR)systick.obj" "$(MAKEFILE_DIR)sys_ctrl.obj" "$(MAKEFILE_DIR)timer.obj" "$(MAKEFILE_DIR)trng.obj" "$(MAKEFILE_DIR)uart.obj" "$(MAKEFILE_DIR)udma.obj" "$(MAKEFILE_DIR)vims.obj" "$(MAKEFILE_DIR)watchdog.obj"
@ rm -f $(MAKEFILE_DIR)*.obj
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.obj
@ rm -fR $(MAKEFILE_DIR)*.lib
third_party/ti/devices/cc26x0/driverlib/bin/gcc/driverlib.a
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third_party/ti/devices/cc26x0/driverlib/bin/gcc/makedefs
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@@ -1,2 +0,0 @@
COMPILER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-gcc"
ARCHIVER_TOOL = "/cygdrive/c/ti/CCS6.2.0.00019_win32-beta2/ccsv6/tools/compiler/gcc-arm-none-eabi-4_9-2015q3/bin/arm-none-eabi-ar"
third_party/ti/devices/cc26x0/driverlib/bin/gcc/makefile
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@@ -1,111 +0,0 @@
# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
$(COMPILER_TOOL) --version
@ echo GCC: Compile adi.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "adi.o" $(MAKEFILE_DIR)../../../driverlib/adi.c
@ echo GCC: Compile aon_batmon.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_batmon.o" $(MAKEFILE_DIR)../../../driverlib/aon_batmon.c
@ echo GCC: Compile aon_event.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_event.o" $(MAKEFILE_DIR)../../../driverlib/aon_event.c
@ echo GCC: Compile aon_ioc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_ioc.o" $(MAKEFILE_DIR)../../../driverlib/aon_ioc.c
@ echo GCC: Compile aon_rtc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_rtc.o" $(MAKEFILE_DIR)../../../driverlib/aon_rtc.c
@ echo GCC: Compile aon_wuc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aon_wuc.o" $(MAKEFILE_DIR)../../../driverlib/aon_wuc.c
@ echo GCC: Compile aux_adc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c
@ echo GCC: Compile aux_smph.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c
@ echo GCC: Compile aux_tdc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c
@ echo GCC: Compile aux_timer.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_timer.o" $(MAKEFILE_DIR)../../../driverlib/aux_timer.c
@ echo GCC: Compile aux_wuc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "aux_wuc.o" $(MAKEFILE_DIR)../../../driverlib/aux_wuc.c
@ echo GCC: Compile ccfgread.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ccfgread.o" $(MAKEFILE_DIR)../../../driverlib/ccfgread.c
@ echo GCC: Compile chipinfo.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "chipinfo.o" $(MAKEFILE_DIR)../../../driverlib/chipinfo.c
@ echo GCC: Compile cpu.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "cpu.o" $(MAKEFILE_DIR)../../../driverlib/cpu.c
@ echo GCC: Compile crypto.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "crypto.o" $(MAKEFILE_DIR)../../../driverlib/crypto.c
@ echo GCC: Compile ddi.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ddi.o" $(MAKEFILE_DIR)../../../driverlib/ddi.c
@ echo GCC: Compile debug.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "debug.o" $(MAKEFILE_DIR)../../../driverlib/debug.c
@ echo GCC: Compile driverlib_release.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "driverlib_release.o" $(MAKEFILE_DIR)../../../driverlib/driverlib_release.c
@ echo GCC: Compile event.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "event.o" $(MAKEFILE_DIR)../../../driverlib/event.c
@ echo GCC: Compile flash.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "flash.o" $(MAKEFILE_DIR)../../../driverlib/flash.c
@ echo GCC: Compile gpio.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "gpio.o" $(MAKEFILE_DIR)../../../driverlib/gpio.c
@ echo GCC: Compile i2c.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "i2c.o" $(MAKEFILE_DIR)../../../driverlib/i2c.c
@ echo GCC: Compile i2s.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "i2s.o" $(MAKEFILE_DIR)../../../driverlib/i2s.c
@ echo GCC: Compile interrupt.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "interrupt.o" $(MAKEFILE_DIR)../../../driverlib/interrupt.c
@ echo GCC: Compile ioc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ioc.o" $(MAKEFILE_DIR)../../../driverlib/ioc.c
@ echo GCC: Compile osc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "osc.o" $(MAKEFILE_DIR)../../../driverlib/osc.c
@ echo GCC: Compile prcm.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "prcm.o" $(MAKEFILE_DIR)../../../driverlib/prcm.c
@ echo GCC: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "pwr_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c
@ echo GCC: Compile rfc.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "rfc.o" $(MAKEFILE_DIR)../../../driverlib/rfc.c
@ echo GCC: Compile rom_crypto.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "rom_crypto.o" $(MAKEFILE_DIR)../../../driverlib/rom_crypto.c
@ echo GCC: Compile setup.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "setup.o" $(MAKEFILE_DIR)../../../driverlib/setup.c
@ echo GCC: Compile setup_rom.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "setup_rom.o" $(MAKEFILE_DIR)../../../driverlib/setup_rom.c
@ echo GCC: Compile smph.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "smph.o" $(MAKEFILE_DIR)../../../driverlib/smph.c
@ echo GCC: Compile ssi.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "ssi.o" $(MAKEFILE_DIR)../../../driverlib/ssi.c
@ echo GCC: Compile sw_chacha.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sw_chacha.o" $(MAKEFILE_DIR)../../../driverlib/sw_chacha.c
@ echo GCC: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sw_poly1305-donna.o" $(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c
@ echo GCC: Compile systick.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "systick.o" $(MAKEFILE_DIR)../../../driverlib/systick.c
@ echo GCC: Compile sys_ctrl.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "sys_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c
@ echo GCC: Compile timer.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "timer.o" $(MAKEFILE_DIR)../../../driverlib/timer.c
@ echo GCC: Compile trng.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "trng.o" $(MAKEFILE_DIR)../../../driverlib/trng.c
@ echo GCC: Compile uart.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "uart.o" $(MAKEFILE_DIR)../../../driverlib/uart.c
@ echo GCC: Compile udma.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "udma.o" $(MAKEFILE_DIR)../../../driverlib/udma.c
@ echo GCC: Compile vims.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "vims.o" $(MAKEFILE_DIR)../../../driverlib/vims.c
@ echo GCC: Compile watchdog.c
@ $(COMPILER_TOOL) -mthumb -mcpu=cortex-m3 -Os -Wall -fno-strict-aliasing -pedantic -ffunction-sections -fdata-sections -std=c99 -c --asm -g -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c
@ echo GCC: Archive driverlib.lib
@ $(ARCHIVER_TOOL) rcs $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aon_wuc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_timer.o $(MAKEFILE_DIR)aux_wuc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.o
@ rm -fR $(MAKEFILE_DIR)*.lib
third_party/ti/devices/cc26x0/driverlib/bin/iar/driverlib.lib
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third_party/ti/devices/cc26x0/driverlib/bin/iar/makedefs
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@@ -1,3 +0,0 @@
COMPILER_TOOL = "/cygdrive/c/Program Files (x86)/IAR Systems/iar_ewarm_8_11_1/arm/bin/iccarm.exe"
ARCHIVER_TOOL = "/cygdrive/c/Program Files (x86)/IAR Systems/iar_ewarm_8_11_1/arm/bin/iarchive.exe"
OBJ_MANIP_TOOL = "/cygdrive/c/Program Files (x86)/IAR Systems/iar_ewarm_8_11_1/arm/bin/iobjmanip.exe"
third_party/ti/devices/cc26x0/driverlib/bin/iar/makefile
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@@ -1,160 +0,0 @@
# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
ifndef ADD_PARAM
ADD_PARAM=
endif
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
@ echo ADD_PARAM = \"$(ADD_PARAM)\"
$(COMPILER_TOOL) --version
@ echo IAR: Compile adi.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/adi.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)adi.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)adi.o
@ echo IAR: Compile aon_batmon.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_batmon.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_batmon.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_batmon.o
@ echo IAR: Compile aon_event.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_event.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_event.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_event.o
@ echo IAR: Compile aon_ioc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_ioc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_ioc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_ioc.o
@ echo IAR: Compile aon_rtc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_rtc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_rtc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aon_rtc.o
@ echo IAR: Compile aon_wuc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aon_wuc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aon_wuc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aon_wuc.o $(MAKEFILE_DIR)aon_wuc.o
@ echo IAR: Compile aux_adc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_adc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_adc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_adc.o
@ echo IAR: Compile aux_smph.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_smph.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_smph.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_smph.o
@ echo IAR: Compile aux_tdc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_tdc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_tdc.o
@ echo IAR: Compile aux_timer.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_timer.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_timer.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_timer.o $(MAKEFILE_DIR)aux_timer.o
@ echo IAR: Compile aux_wuc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/aux_wuc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)aux_wuc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)aux_wuc.o $(MAKEFILE_DIR)aux_wuc.o
@ echo IAR: Compile ccfgread.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ccfgread.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ccfgread.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)ccfgread.o
@ echo IAR: Compile chipinfo.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/chipinfo.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)chipinfo.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)chipinfo.o
@ echo IAR: Compile cpu.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/cpu.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)cpu.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)cpu.o
@ echo IAR: Compile crypto.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/crypto.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)crypto.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)crypto.o
@ echo IAR: Compile ddi.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ddi.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ddi.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)ddi.o
@ echo IAR: Compile debug.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/debug.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)debug.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)debug.o
@ echo IAR: Compile driverlib_release.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/driverlib_release.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)driverlib_release.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)driverlib_release.o
@ echo IAR: Compile event.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/event.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)event.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)event.o
@ echo IAR: Compile flash.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/flash.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)flash.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)flash.o
@ echo IAR: Compile gpio.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/gpio.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)gpio.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)gpio.o
@ echo IAR: Compile i2c.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/i2c.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)i2c.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2c.o
@ echo IAR: Compile i2s.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/i2s.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)i2s.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)i2s.o
@ echo IAR: Compile interrupt.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/interrupt.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)interrupt.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)interrupt.o
@ echo IAR: Compile ioc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ioc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ioc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)ioc.o
@ echo IAR: Compile osc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/osc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)osc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)osc.o
@ echo IAR: Compile prcm.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/prcm.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)prcm.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)prcm.o
@ echo IAR: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)pwr_ctrl.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)pwr_ctrl.o
@ echo IAR: Compile rfc.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/rfc.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)rfc.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rfc.o
@ echo IAR: Compile rom_crypto.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/rom_crypto.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)rom_crypto.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)rom_crypto.o
@ echo IAR: Compile setup.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/setup.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)setup.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup.o
@ echo IAR: Compile setup_rom.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/setup_rom.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)setup_rom.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)setup_rom.o
@ echo IAR: Compile smph.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/smph.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)smph.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)smph.o
@ echo IAR: Compile ssi.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/ssi.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)ssi.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)ssi.o
@ echo IAR: Compile sw_chacha.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sw_chacha.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sw_chacha.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_chacha.o
@ echo IAR: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sw_poly1305-donna.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)sw_poly1305-donna.o
@ echo IAR: Compile systick.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/systick.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)systick.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)systick.o
@ echo IAR: Compile sys_ctrl.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)sys_ctrl.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)sys_ctrl.o
@ echo IAR: Compile timer.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/timer.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)timer.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)timer.o
@ echo IAR: Compile trng.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/trng.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)trng.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)trng.o
@ echo IAR: Compile uart.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/uart.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)uart.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)uart.o
@ echo IAR: Compile udma.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/udma.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)udma.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)udma.o
@ echo IAR: Compile vims.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/vims.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)vims.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)vims.o
@ echo IAR: Compile watchdog.c
@ $(COMPILER_TOOL) $(MAKEFILE_DIR)../../../driverlib/watchdog.c -D nDEBUG $(ADD_PARAM) -o $(MAKEFILE_DIR)watchdog.o --no_clustering --debug --endian=little --cpu=Cortex-M3 -e --fpu=None -Ohz --require_prototypes --silent
@ $(OBJ_MANIP_TOOL) --remove_file_path --remove_section ".comment" --silent $(MAKEFILE_DIR)watchdog.o $(MAKEFILE_DIR)watchdog.o
@ echo IAR: Archive driverlib.lib
@ $(ARCHIVER_TOOL) $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aon_wuc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_timer.o $(MAKEFILE_DIR)aux_wuc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o --create -o $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.o
@ rm -fR $(MAKEFILE_DIR)*.lib
third_party/ti/devices/cc26x0/driverlib/bin/keil/driverlib.lib
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third_party/ti/devices/cc26x0/driverlib/bin/keil/makedefs
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COMPILER_TOOL = "/cygdrive/c/Keil_v5/ARM/ARMCC/bin/armcc"
ARCHIVER_TOOL = "/cygdrive/c/Keil_v5/ARM/ARMCC/bin/armar"
third_party/ti/devices/cc26x0/driverlib/bin/keil/makefile
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# Get directory of this makefile
MAKEFILE_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
# Specify the default makedefs file, which can be overridden at the command line
MAKEDEFS = $(MAKEFILE_DIR)makedefs
include $(MAKEDEFS)
# Always builds phony rules
.PHONY: all clean
# Builds driverlib.lib
all :
@ rm -f $(MAKEFILE_DIR)driverlib.lib
@ rm -f $(MAKEFILE_DIR)*.o
$(COMPILER_TOOL) --version_number
@ echo KEIL: Compile adi.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "adi.o" $(MAKEFILE_DIR)../../../driverlib/adi.c
@ echo KEIL: Compile aon_batmon.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_batmon.o" $(MAKEFILE_DIR)../../../driverlib/aon_batmon.c
@ echo KEIL: Compile aon_event.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_event.o" $(MAKEFILE_DIR)../../../driverlib/aon_event.c
@ echo KEIL: Compile aon_ioc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_ioc.o" $(MAKEFILE_DIR)../../../driverlib/aon_ioc.c
@ echo KEIL: Compile aon_rtc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_rtc.o" $(MAKEFILE_DIR)../../../driverlib/aon_rtc.c
@ echo KEIL: Compile aon_wuc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aon_wuc.o" $(MAKEFILE_DIR)../../../driverlib/aon_wuc.c
@ echo KEIL: Compile aux_adc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_adc.o" $(MAKEFILE_DIR)../../../driverlib/aux_adc.c
@ echo KEIL: Compile aux_smph.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_smph.o" $(MAKEFILE_DIR)../../../driverlib/aux_smph.c
@ echo KEIL: Compile aux_tdc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_tdc.o" $(MAKEFILE_DIR)../../../driverlib/aux_tdc.c
@ echo KEIL: Compile aux_timer.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_timer.o" $(MAKEFILE_DIR)../../../driverlib/aux_timer.c
@ echo KEIL: Compile aux_wuc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "aux_wuc.o" $(MAKEFILE_DIR)../../../driverlib/aux_wuc.c
@ echo KEIL: Compile ccfgread.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ccfgread.o" $(MAKEFILE_DIR)../../../driverlib/ccfgread.c
@ echo KEIL: Compile chipinfo.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "chipinfo.o" $(MAKEFILE_DIR)../../../driverlib/chipinfo.c
@ echo KEIL: Compile cpu.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "cpu.o" $(MAKEFILE_DIR)../../../driverlib/cpu.c
@ echo KEIL: Compile crypto.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "crypto.o" $(MAKEFILE_DIR)../../../driverlib/crypto.c
@ echo KEIL: Compile ddi.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ddi.o" $(MAKEFILE_DIR)../../../driverlib/ddi.c
@ echo KEIL: Compile debug.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "debug.o" $(MAKEFILE_DIR)../../../driverlib/debug.c
@ echo KEIL: Compile driverlib_release.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "driverlib_release.o" $(MAKEFILE_DIR)../../../driverlib/driverlib_release.c
@ echo KEIL: Compile event.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "event.o" $(MAKEFILE_DIR)../../../driverlib/event.c
@ echo KEIL: Compile flash.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "flash.o" $(MAKEFILE_DIR)../../../driverlib/flash.c
@ echo KEIL: Compile gpio.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "gpio.o" $(MAKEFILE_DIR)../../../driverlib/gpio.c
@ echo KEIL: Compile i2c.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "i2c.o" $(MAKEFILE_DIR)../../../driverlib/i2c.c
@ echo KEIL: Compile i2s.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "i2s.o" $(MAKEFILE_DIR)../../../driverlib/i2s.c
@ echo KEIL: Compile interrupt.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "interrupt.o" $(MAKEFILE_DIR)../../../driverlib/interrupt.c
@ echo KEIL: Compile ioc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ioc.o" $(MAKEFILE_DIR)../../../driverlib/ioc.c
@ echo KEIL: Compile osc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "osc.o" $(MAKEFILE_DIR)../../../driverlib/osc.c
@ echo KEIL: Compile prcm.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "prcm.o" $(MAKEFILE_DIR)../../../driverlib/prcm.c
@ echo KEIL: Compile pwr_ctrl.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "pwr_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/pwr_ctrl.c
@ echo KEIL: Compile rfc.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "rfc.o" $(MAKEFILE_DIR)../../../driverlib/rfc.c
@ echo KEIL: Compile rom_crypto.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "rom_crypto.o" $(MAKEFILE_DIR)../../../driverlib/rom_crypto.c
@ echo KEIL: Compile setup.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "setup.o" $(MAKEFILE_DIR)../../../driverlib/setup.c
@ echo KEIL: Compile setup_rom.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "setup_rom.o" $(MAKEFILE_DIR)../../../driverlib/setup_rom.c
@ echo KEIL: Compile smph.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "smph.o" $(MAKEFILE_DIR)../../../driverlib/smph.c
@ echo KEIL: Compile ssi.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "ssi.o" $(MAKEFILE_DIR)../../../driverlib/ssi.c
@ echo KEIL: Compile sw_chacha.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sw_chacha.o" $(MAKEFILE_DIR)../../../driverlib/sw_chacha.c
@ echo KEIL: Compile sw_poly1305-donna.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sw_poly1305-donna.o" $(MAKEFILE_DIR)../../../driverlib/sw_poly1305-donna.c
@ echo KEIL: Compile systick.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "systick.o" $(MAKEFILE_DIR)../../../driverlib/systick.c
@ echo KEIL: Compile sys_ctrl.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "sys_ctrl.o" $(MAKEFILE_DIR)../../../driverlib/sys_ctrl.c
@ echo KEIL: Compile timer.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "timer.o" $(MAKEFILE_DIR)../../../driverlib/timer.c
@ echo KEIL: Compile trng.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "trng.o" $(MAKEFILE_DIR)../../../driverlib/trng.c
@ echo KEIL: Compile uart.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "uart.o" $(MAKEFILE_DIR)../../../driverlib/uart.c
@ echo KEIL: Compile udma.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "udma.o" $(MAKEFILE_DIR)../../../driverlib/udma.c
@ echo KEIL: Compile vims.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "vims.o" $(MAKEFILE_DIR)../../../driverlib/vims.c
@ echo KEIL: Compile watchdog.c
@ $(COMPILER_TOOL) -c --cpu=Cortex-M3 -D__EVAL --li -O3 -Ospace --apcs=interwork --c99 --reduce_paths -Drvmdk -o "watchdog.o" $(MAKEFILE_DIR)../../../driverlib/watchdog.c
@ echo KEIL: Archive driverlib.lib
@ $(ARCHIVER_TOOL) --create $(MAKEFILE_DIR)driverlib.lib $(MAKEFILE_DIR)adi.o $(MAKEFILE_DIR)aon_batmon.o $(MAKEFILE_DIR)aon_event.o $(MAKEFILE_DIR)aon_ioc.o $(MAKEFILE_DIR)aon_rtc.o $(MAKEFILE_DIR)aon_wuc.o $(MAKEFILE_DIR)aux_adc.o $(MAKEFILE_DIR)aux_smph.o $(MAKEFILE_DIR)aux_tdc.o $(MAKEFILE_DIR)aux_timer.o $(MAKEFILE_DIR)aux_wuc.o $(MAKEFILE_DIR)ccfgread.o $(MAKEFILE_DIR)chipinfo.o $(MAKEFILE_DIR)cpu.o $(MAKEFILE_DIR)crypto.o $(MAKEFILE_DIR)ddi.o $(MAKEFILE_DIR)debug.o $(MAKEFILE_DIR)driverlib_release.o $(MAKEFILE_DIR)event.o $(MAKEFILE_DIR)flash.o $(MAKEFILE_DIR)gpio.o $(MAKEFILE_DIR)i2c.o $(MAKEFILE_DIR)i2s.o $(MAKEFILE_DIR)interrupt.o $(MAKEFILE_DIR)ioc.o $(MAKEFILE_DIR)osc.o $(MAKEFILE_DIR)prcm.o $(MAKEFILE_DIR)pwr_ctrl.o $(MAKEFILE_DIR)rfc.o $(MAKEFILE_DIR)rom_crypto.o $(MAKEFILE_DIR)setup.o $(MAKEFILE_DIR)setup_rom.o $(MAKEFILE_DIR)smph.o $(MAKEFILE_DIR)ssi.o $(MAKEFILE_DIR)sw_chacha.o $(MAKEFILE_DIR)sw_poly1305-donna.o $(MAKEFILE_DIR)systick.o $(MAKEFILE_DIR)sys_ctrl.o $(MAKEFILE_DIR)timer.o $(MAKEFILE_DIR)trng.o $(MAKEFILE_DIR)uart.o $(MAKEFILE_DIR)udma.o $(MAKEFILE_DIR)vims.o $(MAKEFILE_DIR)watchdog.o
@ rm -f $(MAKEFILE_DIR)*.o
# Deletes previous output and temporary files
clean :
@ rm -fR $(MAKEFILE_DIR)*.o
@ rm -fR $(MAKEFILE_DIR)*.lib
third_party/ti/devices/cc26x0/driverlib/ccfgread.c
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/******************************************************************************
* Filename: ccfgread.c
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: API for reading CCFG.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "ccfgread.h"
// See ccfgread.h for implementation
third_party/ti/devices/cc26x0/driverlib/ccfgread.h
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/******************************************************************************
* Filename: ccfgread.h
* Revised: 2016-09-13 14:21:40 +0200 (Tue, 13 Sep 2016)
* Revision: 47152
*
* Description: API for reading CCFG.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_control_group
//! @{
//! \addtogroup ccfgread_api
//! @{
//
//*****************************************************************************
#ifndef __CCFGREAD_H__
#define __CCFGREAD_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ccfg.h"
//*****************************************************************************
//
// General constants and defines
//
//*****************************************************************************
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Read DIS_GPRAM from CCFG.
//!
//! \return Value of CCFG field CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM
//
//*****************************************************************************
__STATIC_INLINE bool
CCFGRead_DIS_GPRAM( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) &
CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_M ) >>
CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_S ) ;
}
//*****************************************************************************
//
//! \brief Read EXT_LF_CLK_DIO from CCFG.
//!
//! \return Value of CCFG field CCFG_EXT_LF_CLK_DIO
//
//*****************************************************************************
__STATIC_INLINE bool
CCFGRead_EXT_LF_CLK_DIO( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_EXT_LF_CLK ) &
CCFG_EXT_LF_CLK_DIO_M ) >>
CCFG_EXT_LF_CLK_DIO_S ) ;
}
//*****************************************************************************
//
// Defines the possible values returned from CCFGRead_SCLK_LF_OPTION()
//
//*****************************************************************************
#define CCFGREAD_SCLK_LF_OPTION_XOSC_HF_DLF ( CCFG_MODE_CONF_SCLK_LF_OPTION_XOSC_HF_DLF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
#define CCFGREAD_SCLK_LF_OPTION_EXTERNAL_LF ( CCFG_MODE_CONF_SCLK_LF_OPTION_EXTERNAL_LF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
#define CCFGREAD_SCLK_LF_OPTION_XOSC_LF ( CCFG_MODE_CONF_SCLK_LF_OPTION_XOSC_LF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
#define CCFGREAD_SCLK_LF_OPTION_RCOSC_LF ( CCFG_MODE_CONF_SCLK_LF_OPTION_RCOSC_LF >> CCFG_MODE_CONF_SCLK_LF_OPTION_S )
//*****************************************************************************
//
//! \brief Read SCLK_LF_OPTION from CCFG.
//!
//! \return Returns the value of the CCFG field CCFG_MODE_CONF_SCLK_LF_OPTION field.
//! Returns one of the following:
//! - \ref CCFGREAD_SCLK_LF_OPTION_XOSC_HF_DLF
//! - \ref CCFGREAD_SCLK_LF_OPTION_EXTERNAL_LF
//! - \ref CCFGREAD_SCLK_LF_OPTION_XOSC_LF
//! - \ref CCFGREAD_SCLK_LF_OPTION_RCOSC_LF
//
//*****************************************************************************
__STATIC_INLINE uint32_t
CCFGRead_SCLK_LF_OPTION( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF ) &
CCFG_MODE_CONF_SCLK_LF_OPTION_M ) >>
CCFG_MODE_CONF_SCLK_LF_OPTION_S ) ;
}
//*****************************************************************************
//
// Defines the possible values returned from CCFGRead_XOSC_FREQ()
//
//*****************************************************************************
#define CCFGREAD_XOSC_FREQ_24M ( CCFG_MODE_CONF_XOSC_FREQ_24M >> CCFG_MODE_CONF_XOSC_FREQ_S )
#define CCFGREAD_XOSC_FREQ_48M ( CCFG_MODE_CONF_XOSC_FREQ_48M >> CCFG_MODE_CONF_XOSC_FREQ_S )
#define CCFGREAD_XOSC_FREQ_HPOSC ( CCFG_MODE_CONF_XOSC_FREQ_HPOSC >> CCFG_MODE_CONF_XOSC_FREQ_S )
//*****************************************************************************
//
//! \brief Read XOSC_FREQ setting CCFG.
//!
//! \return Returns the value of the CCFG_MODE_CONF_XOSC_FREQ field.
//! Returns one of the following:
//! - \ref CCFGREAD_XOSC_FREQ_24M
//! - \ref CCFGREAD_XOSC_FREQ_48M
//! - \ref CCFGREAD_XOSC_FREQ_HPOSC
//!
//
//*****************************************************************************
__STATIC_INLINE uint32_t
CCFGRead_XOSC_FREQ( void )
{
return (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF ) &
CCFG_MODE_CONF_XOSC_FREQ_M ) >>
CCFG_MODE_CONF_XOSC_FREQ_S ) ;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __AUX_SMPH_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/ccfgread_doc.h
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/******************************************************************************
* Filename: ccfgread_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup ccfgread_api
//! @{
//! \section sec_ccfgread Introduction
//!
//! The values of customer configuration (CCFG) settings in flash are determined by ccfg.c and typically
//! a user application does not need to read these CCFG values as they are used mainly during ROM boot
//! and device trimming. However, a subset of the CCFG settings need to be read by application
//! code thus DriverLib provides this API to allow easy read access to these specific settings.
//!
//! The remaining settings not accessible through this API can of course be read directly at the CCFG
//! addresses in the flash (starting at CCFG_BASE) using the HWREG macro and the provided defines.
//! CCFG settings are documented as part of the register descriptions in the CPU memory map.
//!
//! \note CCFG settings are located in flash and should be considered read-only from an application
//! point-of-view.
//! @}
third_party/ti/devices/cc26x0/driverlib/chipinfo.c
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/******************************************************************************
* Filename: chipinfo.c
* Revised: 2017-08-30 11:09:05 +0200 (Wed, 30 Aug 2017)
* Revision: 49664
*
* Description: Collection of functions returning chip information.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "chipinfo.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef ChipInfo_GetSupportedProtocol_BV
#define ChipInfo_GetSupportedProtocol_BV NOROM_ChipInfo_GetSupportedProtocol_BV
#undef ChipInfo_GetPackageType
#define ChipInfo_GetPackageType NOROM_ChipInfo_GetPackageType
#undef ChipInfo_GetChipType
#define ChipInfo_GetChipType NOROM_ChipInfo_GetChipType
#undef ChipInfo_GetChipFamily
#define ChipInfo_GetChipFamily NOROM_ChipInfo_GetChipFamily
#undef ChipInfo_GetHwRevision
#define ChipInfo_GetHwRevision NOROM_ChipInfo_GetHwRevision
#undef ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated
#define ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated NOROM_ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated
#endif
//*****************************************************************************
//
// ChipInfo_GetSupportedProtocol_BV()
//
//*****************************************************************************
ProtocolBitVector_t
ChipInfo_GetSupportedProtocol_BV( void )
{
return ((ProtocolBitVector_t)( HWREG( PRCM_BASE + 0x1D4 ) & 0x0E ));
}
//*****************************************************************************
//
// ChipInfo_GetPackageType()
//
//*****************************************************************************
PackageType_t
ChipInfo_GetPackageType( void )
{
PackageType_t packType = (PackageType_t)((
HWREG( FCFG1_BASE + FCFG1_O_USER_ID ) &
FCFG1_USER_ID_PKG_M ) >>
FCFG1_USER_ID_PKG_S ) ;
if (( packType < PACKAGE_4x4 ) ||
( packType > PACKAGE_7x7_Q1 ) )
{
packType = PACKAGE_Unknown;
}
return ( packType );
}
//*****************************************************************************
//
// ChipInfo_GetChipFamily()
//
//*****************************************************************************
ChipFamily_t
ChipInfo_GetChipFamily( void )
{
uint32_t waferId ;
ChipFamily_t chipFam = FAMILY_Unknown ;
waferId = (( HWREG( FCFG1_BASE + FCFG1_O_ICEPICK_DEVICE_ID ) &
FCFG1_ICEPICK_DEVICE_ID_WAFER_ID_M ) >>
FCFG1_ICEPICK_DEVICE_ID_WAFER_ID_S ) ;
if ( waferId == 0xB99A ) {
if ( ChipInfo_GetDeviceIdHwRevCode() == 0xB ) {
chipFam = FAMILY_CC26x0R2 ;
} else {
chipFam = FAMILY_CC26x0 ;
}
}
return ( chipFam );
}
//*****************************************************************************
//
// ChipInfo_GetChipType()
//
//*****************************************************************************
ChipType_t
ChipInfo_GetChipType( void )
{
ChipType_t chipType = CHIP_TYPE_Unknown ;
ChipFamily_t chipFam = ChipInfo_GetChipFamily() ;
uint32_t fcfg1UserId = ChipInfo_GetUserId() ;
uint32_t fcfg1Protocol = (( fcfg1UserId & FCFG1_USER_ID_PROTOCOL_M ) >>
FCFG1_USER_ID_PROTOCOL_S ) ;
if ( chipFam == FAMILY_CC26x0 ) {
switch ( fcfg1Protocol ) {
case 0x2 :
chipType = CHIP_TYPE_CC2620 ;
break;
case 0x4 :
case 0xC :
chipType = CHIP_TYPE_CC2630 ;
break;
case 0x1 :
case 0x9 :
chipType = CHIP_TYPE_CC2640 ;
if ( fcfg1UserId & ( 1 << 23 )) {
chipType = CHIP_TYPE_CUSTOM_1 ;
}
break;
case 0xF :
chipType = CHIP_TYPE_CC2650 ;
if ( fcfg1UserId & ( 1 << 24 )) {
chipType = CHIP_TYPE_CUSTOM_0 ;
}
break;
}
}
return ( chipType );
}
//*****************************************************************************
//
// ChipInfo_GetHwRevision()
//
//*****************************************************************************
HwRevision_t
ChipInfo_GetHwRevision( void )
{
HwRevision_t hwRev = HWREV_Unknown ;
uint32_t fcfg1Rev = ChipInfo_GetDeviceIdHwRevCode() ;
uint32_t minorHwRev = ChipInfo_GetMinorHwRev() ;
ChipFamily_t chipFam = ChipInfo_GetChipFamily() ;
if ( chipFam == FAMILY_CC26x0 ) {
switch ( fcfg1Rev ) {
case 1 : // CC26x0 PG1.0
hwRev = HWREV_1_0;
break;
case 3 : // CC26x0 PG2.0
hwRev = HWREV_2_0;
break;
case 7 : // CC26x0 PG2.1
hwRev = HWREV_2_1;
break;
case 8 : // CC26x0 PG2.2 (or later)
hwRev = (HwRevision_t)(((uint32_t)HWREV_2_2 ) + minorHwRev );
break;
}
}
return ( hwRev );
}
//*****************************************************************************
// ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated()
//*****************************************************************************
void
ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated( void )
{
if (( ! ChipInfo_ChipFamilyIs_CC26x0() ) ||
( ! ChipInfo_HwRevisionIs_GTEQ_2_2() ) )
{
while(1)
{
// This driverlib version is for CC26x0 PG2.2 and later
// Do nothing - stay here forever
}
}
}
third_party/ti/devices/cc26x0/driverlib/chipinfo.h
Vendored
-685
View File
@@ -1,685 +0,0 @@
/******************************************************************************
* Filename: chipinfo.h
* Revised: 2017-08-30 11:09:05 +0200 (Wed, 30 Aug 2017)
* Revision: 49664
*
* Description: Collection of functions returning chip information.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_control_group
//! @{
//! \addtogroup ChipInfo
//! @{
//
//*****************************************************************************
#ifndef __CHIP_INFO_H__
#define __CHIP_INFO_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
#include <stdbool.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_fcfg1.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define ChipInfo_GetSupportedProtocol_BV NOROM_ChipInfo_GetSupportedProtocol_BV
#define ChipInfo_GetPackageType NOROM_ChipInfo_GetPackageType
#define ChipInfo_GetChipType NOROM_ChipInfo_GetChipType
#define ChipInfo_GetChipFamily NOROM_ChipInfo_GetChipFamily
#define ChipInfo_GetHwRevision NOROM_ChipInfo_GetHwRevision
#define ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated NOROM_ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated
#endif
//*****************************************************************************
//
//! \brief Enumeration identifying the protocols supported.
//!
//! \note
//! This is a bit vector enumeration that indicates supported protocols.
//! E.g: 0x06 means that the chip supports both BLE and IEEE 802.15.4
//
//*****************************************************************************
typedef enum {
PROTOCOL_Unknown = 0 , //!< None of the known protocols are supported.
PROTOCOLBIT_BLE = 0x02, //!< Bit[1] set, indicates that Bluetooth Low Energy is supported.
PROTOCOLBIT_IEEE_802_15_4 = 0x04, //!< Bit[2] set, indicates that IEEE 802.15.4 is supported.
PROTOCOLBIT_Proprietary = 0x08 //!< Bit[3] set, indicates that proprietary protocols are supported.
} ProtocolBitVector_t;
//*****************************************************************************
//
//! \brief Returns bit vector showing supported protocols.
//!
//! \return
//! Returns \ref ProtocolBitVector_t which is a bit vector indicating supported protocols.
//
//*****************************************************************************
extern ProtocolBitVector_t ChipInfo_GetSupportedProtocol_BV( void );
//*****************************************************************************
//
//! \brief Returns true if the chip supports the BLE protocol.
//!
//! \return
//! Returns \c true if supporting the BLE protocol, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_SupportsBLE( void )
{
return (( ChipInfo_GetSupportedProtocol_BV() & PROTOCOLBIT_BLE ) != 0 );
}
//*****************************************************************************
//
//! \brief Returns true if the chip supports the IEEE 802.15.4 protocol.
//!
//! \return
//! Returns \c true if supporting the IEEE 802.15.4 protocol, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_SupportsIEEE_802_15_4( void )
{
return (( ChipInfo_GetSupportedProtocol_BV() & PROTOCOLBIT_IEEE_802_15_4 ) != 0 );
}
//*****************************************************************************
//
//! \brief Returns true if the chip supports propriatary protocols.
//!
//! \return
//! Returns \c true if supporting propriatary protocols, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_SupportsPROPRIETARY( void )
{
return (( ChipInfo_GetSupportedProtocol_BV() & PROTOCOLBIT_Proprietary ) != 0 );
}
//*****************************************************************************
//
//! \brief Package type enumeration
//!
//! \note
//! Packages available for a specific device are shown in the device datasheet.
//
//*****************************************************************************
typedef enum {
PACKAGE_Unknown = -1, //!< -1 means that current package type is unknown.
PACKAGE_4x4 = 0, //!< 0 means that this is a 4x4 mm QFN (RHB) package.
PACKAGE_5x5 = 1, //!< 1 means that this is a 5x5 mm QFN (RSM) package.
PACKAGE_7x7 = 2, //!< 2 means that this is a 7x7 mm QFN (RGZ) package.
PACKAGE_WAFER = 3, //!< 3 means that this is a wafer sale package (naked die).
PACKAGE_WCSP = 4, //!< 4 means that this is a 2.7x2.7 mm WCSP (YFV).
PACKAGE_7x7_Q1 = 5 //!< 5 means that this is a 7x7 mm QFN package with Wettable Flanks.
} PackageType_t;
//*****************************************************************************
//
//! \brief Returns package type.
//!
//! \return
//! Returns \ref PackageType_t
//
//*****************************************************************************
extern PackageType_t ChipInfo_GetPackageType( void );
//*****************************************************************************
//
//! \brief Returns true if this is a 4x4mm chip.
//!
//! \return
//! Returns \c true if this is a 4x4mm chip, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_PackageTypeIs4x4( void )
{
return ( ChipInfo_GetPackageType() == PACKAGE_4x4 );
}
//*****************************************************************************
//
//! \brief Returns true if this is a 5x5mm chip.
//!
//! \return
//! Returns \c true if this is a 5x5mm chip, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_PackageTypeIs5x5( void )
{
return ( ChipInfo_GetPackageType() == PACKAGE_5x5 );
}
//*****************************************************************************
//
//! \brief Returns true if this is a 7x7mm chip.
//!
//! \return
//! Returns \c true if this is a 7x7mm chip, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_PackageTypeIs7x7( void )
{
return ( ChipInfo_GetPackageType() == PACKAGE_7x7 );
}
//*****************************************************************************
//
//! \brief Returns true if this is a wafer sale chip (naked die).
//!
//! \return
//! Returns \c true if this is a wafer sale chip, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_PackageTypeIsWAFER( void )
{
return ( ChipInfo_GetPackageType() == PACKAGE_WAFER );
}
//*****************************************************************************
//
//! \brief Returns true if this is a WCSP chip (flip chip).
//!
//! \return
//! Returns \c true if this is a WCSP chip, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_PackageTypeIsWCSP( void )
{
return ( ChipInfo_GetPackageType() == PACKAGE_WCSP );
}
//*****************************************************************************
//
//! \brief Returns true if this is a 7x7 Q1 chip.
//!
//! \return
//! Returns \c true if this is a 7x7 Q1 chip, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_PackageTypeIs7x7Q1( void )
{
return ( ChipInfo_GetPackageType() == PACKAGE_7x7_Q1 );
}
//*****************************************************************************
//
//! \brief Returns the internal chip HW revision code.
//!
//! \return
//! Returns the internal chip HW revision code (in range 0-15)
//*****************************************************************************
__STATIC_INLINE uint32_t
ChipInfo_GetDeviceIdHwRevCode( void )
{
// Returns HwRevCode = FCFG1_O_ICEPICK_DEVICE_ID[31:28]
return ( HWREG( FCFG1_BASE + FCFG1_O_ICEPICK_DEVICE_ID ) >> 28 );
}
//*****************************************************************************
//
//! \brief Returns minor hardware revision number
//!
//! The minor revision number is set to 0 for the first market released chip
//! and thereafter incremented by 1 for each minor hardware change.
//!
//! \return
//! Returns the minor hardware revision number (in range 0-127)
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ChipInfo_GetMinorHwRev( void )
{
uint32_t minorRev = (( HWREG( FCFG1_BASE + FCFG1_O_MISC_CONF_1 ) &
FCFG1_MISC_CONF_1_DEVICE_MINOR_REV_M ) >>
FCFG1_MISC_CONF_1_DEVICE_MINOR_REV_S ) ;
if ( minorRev >= 0x80 ) {
minorRev = 0;
}
return( minorRev );
}
//*****************************************************************************
//
//! \brief Returns the 32 bits USER_ID field
//!
//! How to decode the USER_ID filed is described in the Technical Reference Manual (TRM)
//!
//! \return
//! Returns the 32 bits USER_ID field
//
//*****************************************************************************
__STATIC_INLINE uint32_t
ChipInfo_GetUserId( void )
{
return ( HWREG( FCFG1_BASE + FCFG1_O_USER_ID ));
}
//*****************************************************************************
//
//! \brief Chip type enumeration
//
//*****************************************************************************
typedef enum {
CHIP_TYPE_Unknown = -1, //!< -1 means that the chip type is unknown.
CHIP_TYPE_CC1310 = 0, //!< 0 means that this is a CC1310 chip.
CHIP_TYPE_CC1350 = 1, //!< 1 means that this is a CC1350 chip.
CHIP_TYPE_CC2620 = 2, //!< 2 means that this is a CC2620 chip.
CHIP_TYPE_CC2630 = 3, //!< 3 means that this is a CC2630 chip.
CHIP_TYPE_CC2640 = 4, //!< 4 means that this is a CC2640 chip.
CHIP_TYPE_CC2650 = 5, //!< 5 means that this is a CC2650 chip.
CHIP_TYPE_CUSTOM_0 = 6, //!< 6 means that this is a CUSTOM_0 chip.
CHIP_TYPE_CUSTOM_1 = 7, //!< 7 means that this is a CUSTOM_1 chip.
CHIP_TYPE_CC2640R2 = 8, //!< 8 means that this is a CC2640R2 chip.
CHIP_TYPE_CC2642 = 9, //!< 9 means that this is a CC2642 chip.
CHIP_TYPE_CC2644 = 10,//!< 10 means that this is a CC2644 chip.
CHIP_TYPE_CC2652 = 11,//!< 11 means that this is a CC2652 chip.
CHIP_TYPE_CC1312 = 12,//!< 12 means that this is a CC1312 chip.
CHIP_TYPE_CC1352 = 13,//!< 13 means that this is a CC1352 chip.
CHIP_TYPE_CC1354 = 14 //!< 14 means that this is a CC1354 chip.
} ChipType_t;
//*****************************************************************************
//
//! \brief Returns chip type.
//!
//! \return
//! Returns \ref ChipType_t
//
//*****************************************************************************
extern ChipType_t ChipInfo_GetChipType( void );
//*****************************************************************************
//
//! \brief Chip family enumeration
//
//*****************************************************************************
typedef enum {
FAMILY_Unknown = -1, //!< -1 means that the chip's family member is unknown.
FAMILY_CC26x0 = 0, //!< 0 means that the chip is a CC26x0 family member.
FAMILY_CC13x0 = 1, //!< 1 means that the chip is a CC13x0 family member.
FAMILY_CC26x1 = 2, //!< 2 means that the chip is a CC26x1 family member.
FAMILY_CC26x0R2 = 3, //!< 3 means that the chip is a CC26x0R2 family (new ROM contents).
FAMILY_CC13x2_CC26x2 = 4 //!< 4 means that the chip is a CC13x2, CC26x2 family member.
} ChipFamily_t;
//*****************************************************************************
//
//! \brief Returns chip family member.
//!
//! \return
//! Returns \ref ChipFamily_t
//
//*****************************************************************************
extern ChipFamily_t ChipInfo_GetChipFamily( void );
//*****************************************************************************
//
// Options for the define THIS_DRIVERLIB_BUILD
//
//*****************************************************************************
#define DRIVERLIB_BUILD_CC26X0 0 //!< 0 is the driverlib build ID for the cc26x0 driverlib.
#define DRIVERLIB_BUILD_CC13X0 1 //!< 1 is the driverlib build ID for the cc13x0 driverlib.
#define DRIVERLIB_BUILD_CC26X1 2 //!< 2 is the driverlib build ID for the cc26x1 driverlib.
#define DRIVERLIB_BUILD_CC26X0R2 3 //!< 3 is the driverlib build ID for the cc26x0r2 driverlib.
#define DRIVERLIB_BUILD_CC13X2_CC26X2 4 //!< 4 is the driverlib build ID for the cc13x2_cc26x2 driverlib.
//*****************************************************************************
//
//! \brief Define THIS_DRIVERLIB_BUILD, identifying current driverlib build ID.
//!
//! This driverlib build identifier can be useful for compile time checking/optimization (supporting C preprocessor expressions).
//
//*****************************************************************************
#define THIS_DRIVERLIB_BUILD DRIVERLIB_BUILD_CC26X0
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC13x0 family.
//!
//! \return
//! Returns \c true if this chip is member of the CC13x0 family, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_ChipFamilyIs_CC13x0( void )
{
return ( ChipInfo_GetChipFamily() == FAMILY_CC13x0 );
}
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC26x0 family.
//!
//! \return
//! Returns \c true if this chip is member of the CC26x0 family, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_ChipFamilyIs_CC26x0( void )
{
return ( ChipInfo_GetChipFamily() == FAMILY_CC26x0 );
}
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC26x0R2 family.
//!
//! \return
//! Returns \c true if this chip is member of the CC26x0R2 family, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_ChipFamilyIs_CC26x0R2( void )
{
return ( ChipInfo_GetChipFamily() == FAMILY_CC26x0R2 );
}
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC26x1 family.
//!
//! \return
//! Returns \c true if this chip is member of the CC26x1 family, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_ChipFamilyIs_CC26x1( void )
{
return ( ChipInfo_GetChipFamily() == FAMILY_CC26x1 );
}
//*****************************************************************************
//
//! \brief Returns true if this chip is member of the CC13x2, CC26x2 family.
//!
//! \return
//! Returns \c true if this chip is member of the CC13x2, CC26x2 family, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_ChipFamilyIs_CC13x2_CC26x2( void )
{
return ( ChipInfo_GetChipFamily() == FAMILY_CC13x2_CC26x2 );
}
//*****************************************************************************
//
//! \brief HW revision enumeration.
//
//*****************************************************************************
typedef enum {
HWREV_Unknown = -1, //!< -1 means that the chip's HW revision is unknown.
HWREV_1_0 = 10, //!< 10 means that the chip's HW revision is 1.0
HWREV_1_1 = 11, //!< 10 means that the chip's HW revision is 1.0
HWREV_2_0 = 20, //!< 20 means that the chip's HW revision is 2.0
HWREV_2_1 = 21, //!< 21 means that the chip's HW revision is 2.1
HWREV_2_2 = 22, //!< 22 means that the chip's HW revision is 2.2
HWREV_2_3 = 23, //!< 23 means that the chip's HW revision is 2.3
HWREV_2_4 = 24 //!< 24 means that the chip's HW revision is 2.4
} HwRevision_t;
//*****************************************************************************
//
//! \brief Returns chip HW revision.
//!
//! \return
//! Returns \ref HwRevision_t
//
//*****************************************************************************
extern HwRevision_t ChipInfo_GetHwRevision( void );
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 1.0.
//!
//! \return
//! Returns \c true if HW revision for this chip is 1.0, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_1_0( void )
{
return ( ChipInfo_GetHwRevision() == HWREV_1_0 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.0.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.0, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_2_0( void )
{
return ( ChipInfo_GetHwRevision() == HWREV_2_0 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.0 or greater.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.0 or greater, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_GTEQ_2_0( void )
{
return ( ChipInfo_GetHwRevision() >= HWREV_2_0 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.1.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.1, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_2_1( void )
{
return ( ChipInfo_GetHwRevision() == HWREV_2_1 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.1 or greater.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.1 or greater, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_GTEQ_2_1( void )
{
return ( ChipInfo_GetHwRevision() >= HWREV_2_1 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.2.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.2, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_2_2( void )
{
return ( ChipInfo_GetHwRevision() == HWREV_2_2 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.2 or greater.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.2 or greater, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_GTEQ_2_2( void )
{
return ( ChipInfo_GetHwRevision() >= HWREV_2_2 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.3 or greater.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.3 or greater, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_GTEQ_2_3( void )
{
return ( ChipInfo_GetHwRevision() >= HWREV_2_3 );
}
//*****************************************************************************
//
//! \brief Returns true if HW revision for this chip is 2.4 or greater.
//!
//! \return
//! Returns \c true if HW revision for this chip is 2.4 or greater, \c false otherwise.
//
//*****************************************************************************
__STATIC_INLINE bool
ChipInfo_HwRevisionIs_GTEQ_2_4( void )
{
return ( ChipInfo_GetHwRevision() >= HWREV_2_4 );
}
//*****************************************************************************
//
//! \brief Verifies that current chip is CC26x0 HwRev 2.2 or later and never returns if violated.
//!
//! \return None
//
//*****************************************************************************
extern void ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated( void );
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_ChipInfo_GetSupportedProtocol_BV
#undef ChipInfo_GetSupportedProtocol_BV
#define ChipInfo_GetSupportedProtocol_BV ROM_ChipInfo_GetSupportedProtocol_BV
#endif
#ifdef ROM_ChipInfo_GetPackageType
#undef ChipInfo_GetPackageType
#define ChipInfo_GetPackageType ROM_ChipInfo_GetPackageType
#endif
#ifdef ROM_ChipInfo_GetChipType
#undef ChipInfo_GetChipType
#define ChipInfo_GetChipType ROM_ChipInfo_GetChipType
#endif
#ifdef ROM_ChipInfo_GetChipFamily
#undef ChipInfo_GetChipFamily
#define ChipInfo_GetChipFamily ROM_ChipInfo_GetChipFamily
#endif
#ifdef ROM_ChipInfo_GetHwRevision
#undef ChipInfo_GetHwRevision
#define ChipInfo_GetHwRevision ROM_ChipInfo_GetHwRevision
#endif
#ifdef ROM_ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated
#undef ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated
#define ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated ROM_ThisLibraryIsFor_CC26x0_HwRev22AndLater_HaltIfViolated
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __CHIP_INFO_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/cpu.c
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/******************************************************************************
* Filename: cpu.c
* Revised: 2017-01-16 19:17:22 +0100 (Mon, 16 Jan 2017)
* Revision: 48249
*
* Description: Instruction wrappers for special CPU instructions needed by
* the drivers.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "cpu.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef CPUcpsid
#define CPUcpsid NOROM_CPUcpsid
#undef CPUprimask
#define CPUprimask NOROM_CPUprimask
#undef CPUcpsie
#define CPUcpsie NOROM_CPUcpsie
#undef CPUbasepriGet
#define CPUbasepriGet NOROM_CPUbasepriGet
#undef CPUdelay
#define CPUdelay NOROM_CPUdelay
#endif
//*****************************************************************************
//
// Disable all external interrupts
//
//*****************************************************************************
#if defined(DOXYGEN)
uint32_t
CPUcpsid(void)
{
// This function is written in assembly. See cpu.c for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
uint32_t
CPUcpsid(void)
{
// Read PRIMASK and disable interrupts.
__asm(" mrs r0, PRIMASK\n"
" cpsid i\n");
// "Warning[Pe940]: missing return statement at end of non-void function"
// is suppressed here to avoid putting a "bx lr" in the inline assembly
// above and a superfluous return statement here.
#pragma diag_suppress=Pe940
}
#pragma diag_default=Pe940
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm uint32_t
CPUcpsid(void)
{
// Read PRIMASK and disable interrupts.
mrs r0, PRIMASK;
cpsid i;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
uint32_t
CPUcpsid(void)
{
// Read PRIMASK and disable interrupts.
__asm(" mrs r0, PRIMASK\n"
" cpsid i\n"
" bx lr\n");
// The following keeps the compiler happy, because it wants to see a
// return value from this function. It will generate code to return
// a zero. However, the real return is the "bx lr" above, so the
// return(0) is never executed and the function returns with the value
// you expect in R0.
return(0);
}
#else
uint32_t __attribute__((naked))
CPUcpsid(void)
{
uint32_t ui32Ret;
// Read PRIMASK and disable interrupts
__asm(" mrs r0, PRIMASK\n"
" cpsid i\n"
" bx lr\n"
: "=r"(ui32Ret));
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
// that this does not result in any code being produced because of the
// naked attribute).
return(ui32Ret);
}
#endif
//*****************************************************************************
//
// Get the current interrupt state
//
//*****************************************************************************
#if defined(DOXYGEN)
uint32_t
CPUprimask(void)
{
// This function is written in assembly. See cpu.c for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
uint32_t
CPUprimask(void)
{
// Read PRIMASK.
__asm(" mrs r0, PRIMASK\n");
// "Warning[Pe940]: missing return statement at end of non-void function"
// is suppressed here to avoid putting a "bx lr" in the inline assembly
// above and a superfluous return statement here.
#pragma diag_suppress=Pe940
}
#pragma diag_default=Pe940
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm uint32_t
CPUprimask(void)
{
// Read PRIMASK.
mrs r0, PRIMASK;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
uint32_t
CPUprimask(void)
{
// Read PRIMASK.
__asm(" mrs r0, PRIMASK\n"
" bx lr\n");
// The following keeps the compiler happy, because it wants to see a
// return value from this function. It will generate code to return
// a zero. However, the real return is the "bx lr" above, so the
// return(0) is never executed and the function returns with the value
// you expect in R0.
return(0);
}
#else
uint32_t __attribute__((naked))
CPUprimask(void)
{
uint32_t ui32Ret;
// Read PRIMASK
__asm(" mrs r0, PRIMASK\n"
" bx lr\n"
: "=r"(ui32Ret));
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
// that this does not result in any code being produced because of the
// naked attribute).
return(ui32Ret);
}
#endif
//*****************************************************************************
//
// Enable all external interrupts
//
//*****************************************************************************
#if defined(DOXYGEN)
uint32_t
CPUcpsie(void)
{
// This function is written in assembly. See cpu.c for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
uint32_t
CPUcpsie(void)
{
// Read PRIMASK and enable interrupts.
__asm(" mrs r0, PRIMASK\n"
" cpsie i\n");
// "Warning[Pe940]: missing return statement at end of non-void function"
// is suppressed here to avoid putting a "bx lr" in the inline assembly
// above and a superfluous return statement here.
#pragma diag_suppress=Pe940
}
#pragma diag_default=Pe940
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm uint32_t
CPUcpsie(void)
{
// Read PRIMASK and enable interrupts.
mrs r0, PRIMASK;
cpsie i;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
uint32_t
CPUcpsie(void)
{
// Read PRIMASK and enable interrupts.
__asm(" mrs r0, PRIMASK\n"
" cpsie i\n"
" bx lr\n");
// The following keeps the compiler happy, because it wants to see a
// return value from this function. It will generate code to return
// a zero. However, the real return is the "bx lr" above, so the
// return(0) is never executed and the function returns with the value
// you expect in R0.
return(0);
}
#else
uint32_t __attribute__((naked))
CPUcpsie(void)
{
uint32_t ui32Ret;
// Read PRIMASK and enable interrupts.
__asm(" mrs r0, PRIMASK\n"
" cpsie i\n"
" bx lr\n"
: "=r"(ui32Ret));
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
// that this does not result in any code being produced because of the
// naked attribute).
return(ui32Ret);
}
#endif
//*****************************************************************************
//
// Get the interrupt priority disable level
//
//*****************************************************************************
#if defined(DOXYGEN)
uint32_t
CPUbasepriGet(void)
{
// This function is written in assembly. See cpu.c for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
uint32_t
CPUbasepriGet(void)
{
// Read BASEPRI.
__asm(" mrs r0, BASEPRI\n");
// "Warning[Pe940]: missing return statement at end of non-void function"
// is suppressed here to avoid putting a "bx lr" in the inline assembly
// above and a superfluous return statement here.
#pragma diag_suppress=Pe940
}
#pragma diag_default=Pe940
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm uint32_t
CPUbasepriGet(void)
{
// Read BASEPRI.
mrs r0, BASEPRI;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
uint32_t
CPUbasepriGet(void)
{
// Read BASEPRI.
__asm(" mrs r0, BASEPRI\n"
" bx lr\n");
// The following keeps the compiler happy, because it wants to see a
// return value from this function. It will generate code to return
// a zero. However, the real return is the "bx lr" above, so the
// return(0) is never executed and the function returns with the value
// you expect in R0.
return(0);
}
#else
uint32_t __attribute__((naked))
CPUbasepriGet(void)
{
uint32_t ui32Ret;
// Read BASEPRI.
__asm(" mrs r0, BASEPRI\n"
" bx lr\n"
: "=r"(ui32Ret));
// The return is handled in the inline assembly, but the compiler will
// still complain if there is not an explicit return here (despite the fact
// that this does not result in any code being produced because of the
// naked attribute).
return(ui32Ret);
}
#endif
//*****************************************************************************
//
// Provide a small delay
//
//*****************************************************************************
#if defined(DOXYGEN)
void
CPUdelay(uint32_t ui32Count)
{
// This function is written in assembly. See cpu.c for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
void
CPUdelay(uint32_t ui32Count)
{
// Delay the specified number of times (3 cycles pr. loop)
__asm("CPUdelay:\n"
" subs r0, #1\n"
" bne.n CPUdelay\n"
" bx lr");
#pragma diag_suppress=Pe940
}
#pragma diag_default=Pe940
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm void
CPUdelay(uint32_t ui32Count)
{
// Delay the specified number of times (3 cycles pr. loop)
CPUdel
subs r0, #1;
bne CPUdel;
bx lr;
}
#elif defined(__TI_COMPILER_VERSION__)
// For CCS implement this function in pure assembly. This prevents the TI
// compiler from doing funny things with the optimizer.
// Delay the specified number of times (3 cycles pr. loop)
__asm(" .sect \".text:NOROM_CPUdelay\"\n"
" .clink\n"
" .thumbfunc NOROM_CPUdelay\n"
" .thumb\n"
" .global NOROM_CPUdelay\n"
"NOROM_CPUdelay:\n"
" subs r0, #1\n"
" bne.n NOROM_CPUdelay\n"
" bx lr\n");
#else
void __attribute__((naked))
CPUdelay(uint32_t ui32Count)
{
// Delay the specified number of times (3 cycles pr. loop)
__asm(" subs r0, #1\n"
" bne NOROM_CPUdelay\n"
" bx lr");
}
#endif
third_party/ti/devices/cc26x0/driverlib/cpu.h
Vendored
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@@ -1,449 +0,0 @@
/******************************************************************************
* Filename: cpu.h
* Revised: 2017-07-25 09:34:46 +0200 (Tue, 25 Jul 2017)
* Revision: 49395
*
* Description: Defines and prototypes for the CPU instruction wrapper
* functions.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_cpu_group
//! @{
//! \addtogroup cpu_api
//! @{
//
//*****************************************************************************
#ifndef __CPU_H__
#define __CPU_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_cpu_scs.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define CPUcpsid NOROM_CPUcpsid
#define CPUprimask NOROM_CPUprimask
#define CPUcpsie NOROM_CPUcpsie
#define CPUbasepriGet NOROM_CPUbasepriGet
#define CPUdelay NOROM_CPUdelay
#endif
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Disable all external interrupts.
//!
//! Use this function to disable all system interrupts. This function is
//! implemented as a wrapper function for the CPSID instruction.
//!
//! \return Returns the state of \b PRIMASK on entry
//
//*****************************************************************************
extern uint32_t CPUcpsid(void);
//*****************************************************************************
//
//! \brief Get the current interrupt state.
//!
//! Use this function to retrieve the current state of the interrupts. This
//! function is implemented as a wrapper function returning the state of
//! PRIMASK.
//!
//! \return Returns the state of the \b PRIMASK (indicating whether interrupts
//! are enabled or disabled).
//
//*****************************************************************************
extern uint32_t CPUprimask(void);
//*****************************************************************************
//
//! \brief Enable all external interrupts.
//!
//! Use this function to enable all system interrupts. This function is
//! implemented as a wrapper function for the CPSIE instruction.
//!
//! \return Returns the state of \b PRIMASK on entry.
//
//*****************************************************************************
extern uint32_t CPUcpsie(void);
//*****************************************************************************
//
//! \brief Get the interrupt priority disable level.
//!
//! Use this function to get the the level of priority that will disable
//! interrupts with a lower priority level.
//!
//! \return Returns the value of the \b BASEPRI register.
//
//*****************************************************************************
extern uint32_t CPUbasepriGet(void);
//*****************************************************************************
//
//! \brief Provide a small delay.
//!
//! This function provides means for generating a constant length delay. It
//! is written in assembly to keep the delay consistent across tool chains,
//! avoiding the need to tune the delay based on the tool chain in use.
//!
//! The loop takes 3 cycles/loop.
//!
//! \param ui32Count is the number of delay loop iterations to perform.
//!
//! \return None
//
//*****************************************************************************
extern void CPUdelay(uint32_t ui32Count);
//*****************************************************************************
//
//! \brief Wait for interrupt.
//!
//! Use this function to let the System CPU wait for the next interrupt. This
//! function is implemented as a wrapper function for the WFI instruction.
//!
//! \return None
//
//*****************************************************************************
#if defined(DOXYGEN)
__STATIC_INLINE void
CPUwfi(void)
{
// This function is written in assembly. See cpu.h for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
__STATIC_INLINE void
CPUwfi(void)
{
// Wait for the next interrupt.
__asm(" wfi\n");
}
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm __STATIC_INLINE void
CPUwfi(void)
{
// Wait for the next interrupt.
wfi;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
__STATIC_INLINE void
CPUwfi(void)
{
// Wait for the next interrupt.
__asm(" wfi\n");
}
#else
__STATIC_INLINE void __attribute__((always_inline))
CPUwfi(void)
{
// Wait for the next interrupt.
__asm(" wfi\n");
}
#endif
//*****************************************************************************
//
//! \brief Wait for event.
//!
//! Use this function to let the System CPU wait for the next event. This
//! function is implemented as a wrapper function for the WFE instruction.
//!
//! \return None
//
//*****************************************************************************
#if defined(DOXYGEN)
__STATIC_INLINE void
CPUwfe(void)
{
// This function is written in assembly. See cpu.h for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
__STATIC_INLINE void
CPUwfe(void)
{
// Wait for the next event.
__asm(" wfe\n");
}
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm __STATIC_INLINE void
CPUwfe(void)
{
// Wait for the next event.
wfe;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
__STATIC_INLINE void
CPUwfe(void)
{
// Wait for the next event.
__asm(" wfe\n");
}
#else
__STATIC_INLINE void __attribute__((always_inline))
CPUwfe(void)
{
// Wait for the next event.
__asm(" wfe\n");
}
#endif
//*****************************************************************************
//
//! \brief Send event.
//!
//! Use this function to let the System CPU send an event. This function is
//! implemented as a wrapper function for the SEV instruction.
//!
//! \return None
//
//*****************************************************************************
#if defined(DOXYGEN)
__STATIC_INLINE void
CPUsev(void)
{
// This function is written in assembly. See cpu.h for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
__STATIC_INLINE void
CPUsev(void)
{
// Send event.
__asm(" sev\n");
}
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm __STATIC_INLINE void
CPUsev(void)
{
// Send event.
sev;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
__STATIC_INLINE void
CPUsev(void)
{
// Send event.
__asm(" sev\n");
}
#else
__STATIC_INLINE void __attribute__((always_inline))
CPUsev(void)
{
// Send event.
__asm(" sev\n");
}
#endif
//*****************************************************************************
//
//! \brief Update the interrupt priority disable level.
//!
//! Use this function to change the level of priority that will disable
//! interrupts with a lower priority level.
//!
//! \param ui32NewBasepri is the new basis priority level to set.
//!
//! \return None
//
//*****************************************************************************
#if defined(DOXYGEN)
__STATIC_INLINE void
CPUbasepriSet(uint32_t ui32NewBasepri)
{
// This function is written in assembly. See cpu.h for compiler specific implementation.
}
#elif defined(__IAR_SYSTEMS_ICC__)
__STATIC_INLINE void
CPUbasepriSet(uint32_t ui32NewBasepri)
{
// Set the BASEPRI register.
__asm(" msr BASEPRI, r0\n");
}
#elif defined(__CC_ARM) || defined(__ARMCC_VERSION)
__asm __STATIC_INLINE void
CPUbasepriSet(uint32_t ui32NewBasepri)
{
// Set the BASEPRI register.
msr BASEPRI, r0;
bx lr
}
#elif defined(__TI_COMPILER_VERSION__)
__STATIC_INLINE void
CPUbasepriSet(uint32_t ui32NewBasepri)
{
// Set the BASEPRI register.
__asm(" msr BASEPRI, r0\n");
}
#else
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wattributes"
__STATIC_INLINE void __attribute__ ((naked))
CPUbasepriSet(uint32_t ui32NewBasepri)
{
// Set the BASEPRI register.
__asm(" msr BASEPRI, %0\n"
" bx lr\n"
:
: "r" (ui32NewBasepri)
:
);
}
#pragma GCC diagnostic pop
#endif
//*****************************************************************************
//
//! \brief Disable CPU write buffering (recommended for debug purpose only).
//!
//! This function helps debugging "bus fault crashes".
//! Disables write buffer use during default memory map accesses.
//!
//! This causes all bus faults to be precise bus faults but decreases the
//! performance of the processor because the stores to memory have to complete
//! before the next instruction can be executed.
//!
//! \return None
//!
//! \sa \ref CPU_WriteBufferEnable()
//
//*****************************************************************************
__STATIC_INLINE void
CPU_WriteBufferDisable( void )
{
HWREGBITW( CPU_SCS_BASE + CPU_SCS_O_ACTLR, CPU_SCS_ACTLR_DISDEFWBUF_BITN ) = 1;
}
//*****************************************************************************
//
//! \brief Enable CPU write buffering (default setting).
//!
//! Re-enables write buffer during default memory map accesses if
//! \ref CPU_WriteBufferDisable() has been used for bus fault debugging.
//!
//! \return None
//!
//! \sa \ref CPU_WriteBufferDisable()
//
//*****************************************************************************
__STATIC_INLINE void
CPU_WriteBufferEnable( void )
{
HWREGBITW( CPU_SCS_BASE + CPU_SCS_O_ACTLR, CPU_SCS_ACTLR_DISDEFWBUF_BITN ) = 0;
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_CPUcpsid
#undef CPUcpsid
#define CPUcpsid ROM_CPUcpsid
#endif
#ifdef ROM_CPUprimask
#undef CPUprimask
#define CPUprimask ROM_CPUprimask
#endif
#ifdef ROM_CPUcpsie
#undef CPUcpsie
#define CPUcpsie ROM_CPUcpsie
#endif
#ifdef ROM_CPUbasepriGet
#undef CPUbasepriGet
#define CPUbasepriGet ROM_CPUbasepriGet
#endif
#ifdef ROM_CPUdelay
#undef CPUdelay
#define CPUdelay ROM_CPUdelay
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __CPU_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/cpu_doc.h
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/******************************************************************************
* Filename: cpu_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup cpu_api
//! @{
//! \section sec_cpu Introduction
//!
//! The CPU API provides a set of functions performing very low-level control of the system CPU.
//! All functions in this API are written in assembler in order to either access special registers
//! or avoid any compiler optimizations. Each function exists in several compiler specific versions:
//! One version for each supported compiler.
//! @}
third_party/ti/devices/cc26x0/driverlib/crypto.c
Vendored
-939
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@@ -1,939 +0,0 @@
/******************************************************************************
* Filename: crypto.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
*
* Description: Driver for the Crypto module
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "crypto.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef CRYPTOAesLoadKey
#define CRYPTOAesLoadKey NOROM_CRYPTOAesLoadKey
#undef CRYPTOAesCbc
#define CRYPTOAesCbc NOROM_CRYPTOAesCbc
#undef CRYPTOAesCbcStatus
#define CRYPTOAesCbcStatus NOROM_CRYPTOAesCbcStatus
#undef CRYPTOAesEcb
#define CRYPTOAesEcb NOROM_CRYPTOAesEcb
#undef CRYPTOAesEcbStatus
#define CRYPTOAesEcbStatus NOROM_CRYPTOAesEcbStatus
#undef CRYPTOCcmAuthEncrypt
#define CRYPTOCcmAuthEncrypt NOROM_CRYPTOCcmAuthEncrypt
#undef CRYPTOCcmAuthEncryptStatus
#define CRYPTOCcmAuthEncryptStatus NOROM_CRYPTOCcmAuthEncryptStatus
#undef CRYPTOCcmAuthEncryptResultGet
#define CRYPTOCcmAuthEncryptResultGet NOROM_CRYPTOCcmAuthEncryptResultGet
#undef CRYPTOCcmInvAuthDecrypt
#define CRYPTOCcmInvAuthDecrypt NOROM_CRYPTOCcmInvAuthDecrypt
#undef CRYPTOCcmInvAuthDecryptStatus
#define CRYPTOCcmInvAuthDecryptStatus NOROM_CRYPTOCcmInvAuthDecryptStatus
#undef CRYPTOCcmInvAuthDecryptResultGet
#define CRYPTOCcmInvAuthDecryptResultGet NOROM_CRYPTOCcmInvAuthDecryptResultGet
#undef CRYPTODmaEnable
#define CRYPTODmaEnable NOROM_CRYPTODmaEnable
#undef CRYPTODmaDisable
#define CRYPTODmaDisable NOROM_CRYPTODmaDisable
#endif
//*****************************************************************************
//
// Write the key into the Key Ram.
//
//*****************************************************************************
uint32_t
CRYPTOAesLoadKey(uint32_t *pui32AesKey,
uint32_t ui32KeyLocation)
{
uint32_t returnStatus = AES_KEYSTORE_READ_ERROR;
// Check the arguments.
ASSERT((ui32KeyLocation == CRYPTO_KEY_AREA_0) |
(ui32KeyLocation == CRYPTO_KEY_AREA_1) |
(ui32KeyLocation == CRYPTO_KEY_AREA_2) |
(ui32KeyLocation == CRYPTO_KEY_AREA_3) |
(ui32KeyLocation == CRYPTO_KEY_AREA_4) |
(ui32KeyLocation == CRYPTO_KEY_AREA_5) |
(ui32KeyLocation == CRYPTO_KEY_AREA_6) |
(ui32KeyLocation == CRYPTO_KEY_AREA_7));
// Disable the external interrupt to stop the interrupt form propagating
// from the module to the System CPU.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
// Clear any previously written key at the keyLocation
HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) = (0x00000001 << ui32KeyLocation);
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_DMA_IN_DONE |
CRYPTO_IRQEN_RESULT_AVAIL;
// Configure master control module.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_ALGSEL, CRYPTO_ALGSEL_KEY_STORE_BITN) = 1;
// Clear any outstanding events.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Configure key store module for 128 bit operation.
// Do not write to the register if the correct key size is already set.
// Writing to this register causes all current keys to be invalidated.
if (HWREG(CRYPTO_BASE + CRYPTO_O_KEYSIZE) != KEY_STORE_SIZE_128) {
HWREG(CRYPTO_BASE + CRYPTO_O_KEYSIZE) = KEY_STORE_SIZE_128;
}
// Enable keys to write (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITEAREA) = (0x00000001 << ui32KeyLocation);
// Enable Crypto DMA channel 0.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Base address of the key in ext. memory.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) = (uint32_t)pui32AesKey;
// Total key length in bytes (e.g. 16 for 1 x 128-bit key).
// Writing the length of the key enables the DMA operation.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = KEY_BLENGTH;
// Wait for the DMA operation to complete.
do
{
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & 0x00000001));
// Check for errors in DMA and key store.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) &
(CRYPTO_IRQSTAT_DMA_BUS_ERR |
CRYPTO_IRQSTAT_KEY_ST_WR_ERR)) == 0)
{
// Acknowledge/clear the interrupt and disable the master control.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = 0x00000000;
// Check key status, return success if key valid.
if(HWREG(CRYPTO_BASE + CRYPTO_O_KEYWRITTENAREA) & (0x00000001 << ui32KeyLocation))
{
returnStatus = AES_SUCCESS;
}
}
// Return status.
return returnStatus;
}
//*****************************************************************************
//
// Start an AES-CBC operation (encryption or decryption).
//
//*****************************************************************************
uint32_t
CRYPTOAesCbc(uint32_t *pui32MsgIn, uint32_t *pui32MsgOut, uint32_t ui32MsgLength,
uint32_t *pui32Nonce, uint32_t ui32KeyLocation,
bool bEncrypt, bool bIntEnable)
{
uint32_t ui32CtrlVal;
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_RESULT_AVAIL;
// Clear any outstanding interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Wait for interrupt lines from module to be cleared
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE | CRYPTO_IRQSTAT_RESULT_AVAIL));
// If using interrupts clear any pending interrupts and enable interrupts
// for the Crypto module.
if(bIntEnable)
{
IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ);
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
// Configure Master Control module.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = CRYPTO_ALGSEL_AES;
// Enable keys to read (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) = ui32KeyLocation;
//Wait until key is loaded to the AES module.
do
{
CPUdelay(1);
}
while((HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) & CRYPTO_KEYREADAREA_BUSY));
// Check for Key store Read error.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT)& CRYPTO_KEY_ST_RD_ERR))
{
return (AES_KEYSTORE_READ_ERROR);
}
// Write initialization vector.
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0) = pui32Nonce[0];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV1) = pui32Nonce[1];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV2) = pui32Nonce[2];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV3) = pui32Nonce[3];
// Configure AES engine for AES-CBC with 128-bit key size.
ui32CtrlVal = (CRYPTO_AESCTL_SAVE_CONTEXT | CRYPTO_AESCTL_CBC);
if(bEncrypt)
{
ui32CtrlVal |= CRYPTO_AES128_ENCRYPT;
}
else
{
ui32CtrlVal |= CRYPTO_AES128_DECRYPT;
}
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = ui32CtrlVal;
// Write the length of the crypto block (plain text).
// Low and high part (high part is assumed to be always 0).
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = ui32MsgLength;
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0;
HWREG(CRYPTO_BASE + CRYPTO_O_AESAUTHLEN) = 0;
// Enable Crypto DMA channel 0.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Base address of the input data in ext. memory.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) = (uint32_t)pui32MsgIn;
// Input data length in bytes, equal to the message.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = ui32MsgLength;
// Enable Crypto DMA channel 1.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 1;
// Set up the address and length of the output data.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1EXTADDR) = (uint32_t)pui32MsgOut;
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1LEN) = ui32MsgLength;
// Return success
return AES_SUCCESS;
}
//*****************************************************************************
//
// Check the result of an AES CBC operation
//
//*****************************************************************************
uint32_t
CRYPTOAesCbcStatus(void)
{
return(CRYPTOAesEcbStatus());
}
//*****************************************************************************
//
// Start an AES-ECB operation (encryption or decryption).
//
//*****************************************************************************
uint32_t
CRYPTOAesEcb(uint32_t *pui32MsgIn, uint32_t *pui32MsgOut,
uint32_t ui32KeyLocation, bool bEncrypt,
bool bIntEnable)
{
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_RESULT_AVAIL;
// Clear any outstanding interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Wait for interrupt lines from module to be cleared
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE | CRYPTO_IRQSTAT_RESULT_AVAIL));
// If using interrupts clear any pending interrupts and enable interrupts
// for the Crypto module.
if(bIntEnable)
{
IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ);
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
// Configure Master Control module.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = CRYPTO_ALGSEL_AES;
// Enable keys to read (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) = ui32KeyLocation;
//Wait until key is loaded to the AES module.
do
{
CPUdelay(1);
}
while((HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) & CRYPTO_KEYREADAREA_BUSY));
// Check for Key store Read error.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT)& CRYPTO_KEY_ST_RD_ERR))
{
return (AES_KEYSTORE_READ_ERROR);
}
// Configure AES engine (program AES-ECB-128 encryption and no
// initialization vector - IV).
if(bEncrypt)
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = CRYPTO_AES128_ENCRYPT;
}
else
{
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = CRYPTO_AES128_DECRYPT;
}
// Write the length of the data.
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = AES_ECB_LENGTH;
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0;
// Enable Crypto DMA channel 0.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Base address of the input data in ext. memory.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) = (uint32_t)pui32MsgIn;
// Input data length in bytes, equal to the message.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = AES_ECB_LENGTH;
// Enable Crypto DMA channel 1.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 1;
// Set up the address and length of the output data.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1EXTADDR) = (uint32_t)pui32MsgOut;
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1LEN) = AES_ECB_LENGTH;
// Return success
return AES_SUCCESS;
}
//*****************************************************************************
//
// Check the result of an AES ECB operation
//
//*****************************************************************************
uint32_t
CRYPTOAesEcbStatus(void)
{
uint32_t ui32Status;
// Get the current DMA status.
ui32Status = HWREG(CRYPTO_BASE + CRYPTO_O_DMASTAT);
// Check if DMA is still busy.
if(ui32Status & CRYPTO_DMA_BSY)
{
return (AES_DMA_BSY);
}
// Check the status of the DMA operation - return error if not success.
if(ui32Status & CRYPTO_DMA_BUS_ERROR)
{
return (AES_DMA_BUS_ERROR);
}
// Operation successful - disable interrupt and return success.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
return (AES_SUCCESS);
}
//*****************************************************************************
//
// Start CCM operation
//
//*****************************************************************************
uint32_t
CRYPTOCcmAuthEncrypt(bool bEncrypt, uint32_t ui32AuthLength ,
uint32_t *pui32Nonce, uint32_t *pui32PlainText,
uint32_t ui32PlainTextLength, uint32_t *pui32Header,
uint32_t ui32HeaderLength, uint32_t ui32KeyLocation,
uint32_t ui32FieldLength, bool bIntEnable)
{
uint32_t ui32CtrlVal;
uint32_t i;
uint32_t *pui32CipherText;
union {
uint32_t w[4];
uint8_t b[16];
} ui8InitVec;
// Input address for the encryption engine is the same as the output.
pui32CipherText = pui32PlainText;
// Disable global interrupt, enable local interrupt and clear any pending
// interrupts.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_DMA_IN_DONE |
CRYPTO_IRQEN_RESULT_AVAIL;
// Configure master control module for AES operation.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = CRYPTO_ALGSEL_AES;
// Enable keys to read (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) = ui32KeyLocation;
// Wait until key is loaded to the AES module.
do
{
CPUdelay(1);
}
while((HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) & CRYPTO_KEYREADAREA_BUSY));
// Check for Key store Read error.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT)& CRYPTO_KEY_ST_RD_ERR))
{
return (AES_KEYSTORE_READ_ERROR);
}
// Prepare the initialization vector (IV),
// Length of Nonce l(n) = 15 - ui32FieldLength.
ui8InitVec.b[0] = ui32FieldLength - 1;
for(i = 0; i < 12; i++)
{
ui8InitVec.b[i + 1] = ((uint8_t*)pui32Nonce)[i];
}
if(ui32FieldLength == 2)
{
ui8InitVec.b[13] = ((uint8_t*)pui32Nonce)[12];
}
else
{
ui8InitVec.b[13] = 0;
}
ui8InitVec.b[14] = 0;
ui8InitVec.b[15] = 0;
// Write initialization vector.
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0) = ui8InitVec.w[0];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV1) = ui8InitVec.w[1];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV2) = ui8InitVec.w[2];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV3) = ui8InitVec.w[3];
// Configure AES engine.
ui32CtrlVal = ((ui32FieldLength - 1) << CRYPTO_AESCTL_CCM_L_S);
if ( ui32AuthLength >= 2 ) {
ui32CtrlVal |= ((( ui32AuthLength - 2 ) >> 1 ) << CRYPTO_AESCTL_CCM_M_S );
}
ui32CtrlVal |= CRYPTO_AESCTL_CCM;
ui32CtrlVal |= CRYPTO_AESCTL_CTR;
ui32CtrlVal |= CRYPTO_AESCTL_SAVE_CONTEXT;
ui32CtrlVal |= (KEY_STORE_SIZE_128 << CRYPTO_AESCTL_KEY_SIZE_S);
ui32CtrlVal |= (1 << CRYPTO_AESCTL_DIR_S);
ui32CtrlVal |= (CRYPTO_AES_CTR_128 << CRYPTO_AESCTL_CTR_WIDTH_S);
// Write the configuration for 128 bit AES-CCM.
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = ui32CtrlVal;
// Write the length of the crypto block (plain text).
// Low and high part (high part is assumed to be always 0).
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = ui32PlainTextLength;
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0;
// Write the length of the header field.
// Also called AAD - Additional Authentication Data.
HWREG(CRYPTO_BASE + CRYPTO_O_AESAUTHLEN) = ui32HeaderLength;
// Check if any header information (AAD).
// If so configure the DMA controller to fetch the header.
if(ui32HeaderLength != 0)
{
// Enable DMA channel 0.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Register the base address of the header (AAD).
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) = (uint32_t)pui32Header;
// Header length in bytes (may be non-block size aligned).
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = ui32HeaderLength;
// Wait for completion of the header data transfer, DMA_IN_DONE.
do
{
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & CRYPTO_IRQSTAT_DMA_IN_DONE));
// Check for DMA errors.
if(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & CRYPTO_DMA_BUS_ERR)
{
return AES_DMA_BUS_ERROR;
}
}
// Clear interrupt status.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Wait for interrupt lines from module to be cleared
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE | CRYPTO_IRQSTAT_RESULT_AVAIL));
// Disable CRYPTO_IRQEN_DMA_IN_DONE interrupt as we only
// want interrupt to trigger once RESULT_AVAIL occurs.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) &= ~CRYPTO_IRQEN_DMA_IN_DONE;
// Is using interrupts enable globally.
if(bIntEnable)
{
IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ);
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
// Enable interrupts locally.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_RESULT_AVAIL;
// Perform encryption if requested.
if(bEncrypt)
{
// Enable DMA channel 0
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// base address of the payload data in ext. memory.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) =
(uint32_t)pui32PlainText;
// Enable DMA channel 1
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 1;
// Base address of the output data buffer.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1EXTADDR) =
(uint32_t)pui32CipherText;
// Payload data length in bytes, equal to the plaintext length.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = ui32PlainTextLength;
// Output data length in bytes, equal to the plaintext length.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1LEN) = ui32PlainTextLength;
}
return AES_SUCCESS;
}
//*****************************************************************************
//
// Check the result of an AES CCM operation.
//
//*****************************************************************************
uint32_t
CRYPTOCcmAuthEncryptStatus(void)
{
uint32_t ui32Status;
// Get the current DMA status.
ui32Status = HWREG(CRYPTO_BASE + CRYPTO_O_DMASTAT);
// Check if DMA is still busy.
if(ui32Status & CRYPTO_DMA_BSY)
{
return (AES_DMA_BSY);
}
// Check the status of the DMA operation - return error if not success.
if(ui32Status & CRYPTO_DMA_BUS_ERROR)
{
return (AES_DMA_BUS_ERROR);
}
// Operation successful - disable interrupt and return success.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
return (AES_SUCCESS);
}
//*****************************************************************************
//
// Get the result of an AES-CCM operation
//
//*****************************************************************************
uint32_t
CRYPTOCcmAuthEncryptResultGet(uint32_t ui32TagLength, uint32_t *pui32CcmTag)
{
uint32_t volatile ui32Tag[4];
uint32_t ui32Idx;
// Result has already been copied to the output buffer by DMA
// Disable master control.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = 0x00000000;
// Read tag - wait for the context ready bit.
do
{
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) &
CRYPTO_AESCTL_SAVED_CONTEXT_RDY));
// Read the Tag registers.
ui32Tag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0);
ui32Tag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1);
ui32Tag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2);
ui32Tag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3);
for(ui32Idx = 0; ui32Idx < ui32TagLength ; ui32Idx++)
{
*((uint8_t*)pui32CcmTag + ui32Idx) = *((uint8_t*)ui32Tag + ui32Idx);
}
// Operation successful - clear interrupt status.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
return AES_SUCCESS;
}
//*****************************************************************************
//
// Start a CCM Decryption and Inverse Authentication operation.
//
//*****************************************************************************
uint32_t
CRYPTOCcmInvAuthDecrypt(bool bDecrypt, uint32_t ui32AuthLength,
uint32_t *pui32Nonce, uint32_t *pui32CipherText,
uint32_t ui32CipherTextLength,
uint32_t *pui32Header, uint32_t ui32HeaderLength,
uint32_t ui32KeyLocation,
uint32_t ui32FieldLength, bool bIntEnable)
{
uint32_t ui32CtrlVal;
uint32_t i;
uint32_t *pui32PlainText;
uint32_t ui32CryptoBlockLength;
union {
uint32_t w[4];
uint8_t b[16];
} ui8InitVec;
// Input address for the encryption engine is the same as the output.
pui32PlainText = pui32CipherText;
// Disable global interrupt, enable local interrupt and clear any pending.
// interrupts.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_DMA_IN_DONE |
CRYPTO_IRQEN_RESULT_AVAIL;
// Configure master control module for AES operation.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = CRYPTO_ALGSEL_AES;
// Enable keys to read (e.g. Key 0).
HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) = ui32KeyLocation;
// Wait until key is loaded to the AES module.
do
{
CPUdelay(1);
}
while((HWREG(CRYPTO_BASE + CRYPTO_O_KEYREADAREA) & CRYPTO_KEYREADAREA_BUSY));
// Check for Key store Read error.
if((HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT)& CRYPTO_KEY_ST_RD_ERR))
{
return (AES_KEYSTORE_READ_ERROR);
}
// Prepare the initialization vector (IV),
// Length of Nonce l(n) = 15 - ui32FieldLength.
ui8InitVec.b[0] = ui32FieldLength - 1;
for(i = 0; i < 12; i++)
{
ui8InitVec.b[i + 1] = ((uint8_t*)pui32Nonce)[i];
}
if(ui32FieldLength == 2)
{
ui8InitVec.b[13] = ((uint8_t*)pui32Nonce)[12];
}
else
{
ui8InitVec.b[13] = 0;
}
ui8InitVec.b[14] = 0;
ui8InitVec.b[15] = 0;
// Write initialization vector.
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV0) = ui8InitVec.w[0];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV1) = ui8InitVec.w[1];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV2) = ui8InitVec.w[2];
HWREG(CRYPTO_BASE + CRYPTO_O_AESIV3) = ui8InitVec.w[3];
// Configure AES engine
ui32CryptoBlockLength = ui32CipherTextLength - ui32AuthLength;
ui32CtrlVal = ((ui32FieldLength - 1) << CRYPTO_AESCTL_CCM_L_S);
if ( ui32AuthLength >= 2 ) {
ui32CtrlVal |= ((( ui32AuthLength - 2 ) >> 1 ) << CRYPTO_AESCTL_CCM_M_S );
}
ui32CtrlVal |= CRYPTO_AESCTL_CCM;
ui32CtrlVal |= CRYPTO_AESCTL_CTR;
ui32CtrlVal |= CRYPTO_AESCTL_SAVE_CONTEXT;
ui32CtrlVal |= (KEY_STORE_SIZE_128 << CRYPTO_AESCTL_KEY_SIZE_S);
ui32CtrlVal |= (0 << CRYPTO_AESCTL_DIR_S);
ui32CtrlVal |= (CRYPTO_AES_CTR_128 << CRYPTO_AESCTL_CTR_WIDTH_S);
// Write the configuration for 128 bit AES-CCM.
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = ui32CtrlVal;
// Write the length of the crypto block (plain text).
// Low and high part (high part is assumed to be always 0).
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN0) = ui32CryptoBlockLength;
HWREG(CRYPTO_BASE + CRYPTO_O_AESDATALEN1) = 0;
// Write the length of the header field.
// Also called AAD - Additional Authentication Data.
HWREG(CRYPTO_BASE + CRYPTO_O_AESAUTHLEN) = ui32HeaderLength;
// Check if any header information (AAD).
// If so configure the DMA controller to fetch the header.
if(ui32HeaderLength != 0)
{
// Enable DMA channel 0.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Register the base address of the header (AAD).
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) = (uint32_t)pui32Header;
// Header length in bytes (may be non-block size aligned).
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = ui32HeaderLength;
// Wait for completion of the header data transfer, DMA_IN_DONE.
do
{
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & CRYPTO_IRQSTAT_DMA_IN_DONE));
// Check for DMA errors.
if(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & CRYPTO_DMA_BUS_ERR)
{
return AES_DMA_BUS_ERROR;
}
}
// Clear interrupt status.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Wait for interrupt lines from module to be cleared
while(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & (CRYPTO_IRQSTAT_DMA_IN_DONE | CRYPTO_IRQSTAT_RESULT_AVAIL));
// Disable CRYPTO_IRQEN_DMA_IN_DONE interrupt as we only
// want interrupt to trigger once RESULT_AVAIL occurs.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) &= ~CRYPTO_IRQEN_DMA_IN_DONE;
// Is using interrupts - clear and enable globally.
if(bIntEnable)
{
IntPendClear(INT_CRYPTO_RESULT_AVAIL_IRQ);
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
// Enable internal interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) = CRYPTO_IRQEN_RESULT_AVAIL;
// Perform decryption if requested.
if(bDecrypt)
{
// Configure the DMA controller - enable both DMA channels.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
// Base address of the payload data in ext. memory.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0EXTADDR) =
(uint32_t)pui32CipherText;
// Payload data length in bytes, equal to the cipher text length.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH0LEN) = ui32CryptoBlockLength;
// Enable DMA channel 1.
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 1;
// Base address of the output data buffer.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1EXTADDR) =
(uint32_t)pui32PlainText;
// Output data length in bytes, equal to the cipher text length.
HWREG(CRYPTO_BASE + CRYPTO_O_DMACH1LEN) = ui32CryptoBlockLength;
}
return AES_SUCCESS;
}
//*****************************************************************************
//
// Checks CCM decrypt and Inverse Authentication result.
//
//*****************************************************************************
uint32_t
CRYPTOCcmInvAuthDecryptStatus(void)
{
uint32_t ui32Status;
// Get the current DMA status.
ui32Status = HWREG(CRYPTO_BASE + CRYPTO_O_DMASTAT);
// Check if DMA is still busy.
if(ui32Status & CRYPTO_DMA_BSY)
{
return (AES_DMA_BSY);
}
// Check the status of the DMA operation - return error if not success.
if(ui32Status & CRYPTO_DMA_BUS_ERROR)
{
return (AES_DMA_BUS_ERROR);
}
// Operation successful - disable interrupt and return success
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
return (AES_SUCCESS);
}
//*****************************************************************************
//
// Get the result of the CCM operation.
//
//*****************************************************************************
uint32_t
CRYPTOCcmInvAuthDecryptResultGet(uint32_t ui32AuthLength,
uint32_t *pui32CipherText,
uint32_t ui32CipherTextLength,
uint32_t *pui32CcmTag)
{
uint32_t volatile ui32Tag[4];
uint32_t ui32TagIndex;
uint32_t i;
uint32_t ui32Idx;
ui32TagIndex = ui32CipherTextLength - ui32AuthLength;
// Result has already been copied to the output buffer by DMA
// Disable master control.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = 0x00000000;
// Read tag - wait for the context ready bit.
do
{
CPUdelay(1);
}
while(!(HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) &
CRYPTO_AESCTL_SAVED_CONTEXT_RDY));
// Read the Tag registers.
ui32Tag[0] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT0);
ui32Tag[1] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT1);
ui32Tag[2] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT2);
ui32Tag[3] = HWREG(CRYPTO_BASE + CRYPTO_O_AESTAGOUT3);
for(ui32Idx = 0; ui32Idx < ui32AuthLength ; ui32Idx++)
{
*((uint8_t*)pui32CcmTag + ui32Idx) = *((uint8_t*)ui32Tag + ui32Idx);
}
// Operation successful - clear interrupt status.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = (CRYPTO_IRQCLR_DMA_IN_DONE |
CRYPTO_IRQCLR_RESULT_AVAIL);
// Verify the Tag.
for(i = 0; i < ui32AuthLength; i++)
{
if(*((uint8_t *)pui32CcmTag + i) !=
(*((uint8_t *)pui32CipherText + ui32TagIndex + i)))
{
return CCM_AUTHENTICATION_FAILED;
}
}
return AES_SUCCESS;
}
//*****************************************************************************
//
// Enable Crypto DMA operation
//
//*****************************************************************************
void
CRYPTODmaEnable(uint32_t ui32Channels)
{
// Check the arguments.
ASSERT((ui32Channels & CRYPTO_DMA_CHAN0) |
(ui32Channels & CRYPTO_DMA_CHAN1));
// Enable the selected channels,
if(ui32Channels & CRYPTO_DMA_CHAN0)
{
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 1;
}
if(ui32Channels & CRYPTO_DMA_CHAN1)
{
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 1;
}
}
//*****************************************************************************
//
// Disable Crypto DMA operation
//
//*****************************************************************************
void
CRYPTODmaDisable(uint32_t ui32Channels)
{
// Check the arguments.
ASSERT((ui32Channels & CRYPTO_DMA_CHAN0) |
(ui32Channels & CRYPTO_DMA_CHAN1));
// Enable the selected channels.
if(ui32Channels & CRYPTO_DMA_CHAN0)
{
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH0CTL, CRYPTO_DMACH0CTL_EN_BITN) = 0;
}
if(ui32Channels & CRYPTO_DMA_CHAN1)
{
HWREGBITW(CRYPTO_BASE + CRYPTO_O_DMACH1CTL, CRYPTO_DMACH1CTL_EN_BITN) = 0;
}
}
third_party/ti/devices/cc26x0/driverlib/crypto.h
Vendored
-856
View File
@@ -1,856 +0,0 @@
/******************************************************************************
* Filename: crypto.h
* Revised: 2017-05-23 12:08:52 +0200 (Tue, 23 May 2017)
* Revision: 49048
*
* Description: AES header file.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup peripheral_group
//! @{
//! \addtogroup crypto_api
//! @{
//
//*****************************************************************************
#ifndef __CRYPTO_H__
#define __CRYPTO_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_crypto.h"
#include "debug.h"
#include "interrupt.h"
#include "cpu.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define CRYPTOAesLoadKey NOROM_CRYPTOAesLoadKey
#define CRYPTOAesCbc NOROM_CRYPTOAesCbc
#define CRYPTOAesCbcStatus NOROM_CRYPTOAesCbcStatus
#define CRYPTOAesEcb NOROM_CRYPTOAesEcb
#define CRYPTOAesEcbStatus NOROM_CRYPTOAesEcbStatus
#define CRYPTOCcmAuthEncrypt NOROM_CRYPTOCcmAuthEncrypt
#define CRYPTOCcmAuthEncryptStatus NOROM_CRYPTOCcmAuthEncryptStatus
#define CRYPTOCcmAuthEncryptResultGet NOROM_CRYPTOCcmAuthEncryptResultGet
#define CRYPTOCcmInvAuthDecrypt NOROM_CRYPTOCcmInvAuthDecrypt
#define CRYPTOCcmInvAuthDecryptStatus NOROM_CRYPTOCcmInvAuthDecryptStatus
#define CRYPTOCcmInvAuthDecryptResultGet NOROM_CRYPTOCcmInvAuthDecryptResultGet
#define CRYPTODmaEnable NOROM_CRYPTODmaEnable
#define CRYPTODmaDisable NOROM_CRYPTODmaDisable
#endif
//*****************************************************************************
//
// Length of AES Electronic Code Book (ECB) block in bytes
//
//*****************************************************************************
#define AES_ECB_LENGTH 16
//*****************************************************************************
//
// Values that can be passed to CryptoIntEnable, CryptoIntDisable, and CryptoIntClear
// as the ui32IntFlags parameter, and returned from CryptoIntStatus.
//
//*****************************************************************************
#define CRYPTO_DMA_IN_DONE 0x00000002 // DMA done interrupt mask
#define CRYPTO_RESULT_RDY 0x00000001 // Result ready interrupt mask
#define CRYPTO_DMA_BUS_ERR 0x80000000 // DMA Bus error
#define CRYPTO_KEY_ST_WR_ERR 0x40000000 // Key Store Write failed
#define CRYPTO_KEY_ST_RD_ERR 0x20000000 // Key Store Read failed
#define CRYPTO_IRQTYPE_LEVEL 0x00000001 // Crypto Level interrupt enabled
#define CRYPTO_IRQTYPE_PULSE 0x00000000 // Crypto pulse interrupt enabled
#define CRYPTO_DMA_CHAN0 0x00000001 // Crypto DMA Channel 0
#define CRYPTO_DMA_CHAN1 0x00000002 // Crypto DMA Channel 1
#define CRYPTO_AES128_ENCRYPT 0x0000000C //
#define CRYPTO_AES128_DECRYPT 0x00000008 //
#define CRYPTO_DMA_READY 0x00000000 // DMA ready
#define CRYPTO_DMA_BSY 0x00000003 // DMA busy
#define CRYPTO_DMA_BUS_ERROR 0x00020000 // DMA encountered bus error
//*****************************************************************************
//
// General constants
//
//*****************************************************************************
// AES module return codes
#define AES_SUCCESS 0
#define AES_KEYSTORE_READ_ERROR 1
#define AES_KEYSTORE_WRITE_ERROR 2
#define AES_DMA_BUS_ERROR 3
#define CCM_AUTHENTICATION_FAILED 4
#define AES_ECB_TEST_ERROR 8
#define AES_NULL_ERROR 9
#define AES_CCM_TEST_ERROR 10
#define AES_DMA_BSY 11
// Key store module defines
#define STATE_BLENGTH 16 // Number of bytes in State
#define KEY_BLENGTH 16 // Number of bytes in Key
#define KEY_EXP_LENGTH 176 // Nb * (Nr+1) * 4
#define KEY_STORE_SIZE_128 0x00000001
#define KEY_STORE_SIZE_192 0x00000002
#define KEY_STORE_SIZE_256 0x00000003
#define KEY_STORE_SIZE_BITS 0x00000003
//*****************************************************************************
//
// For 128 bit key all 8 Key Area locations from 0 to 8 are valid
// However for 192 bit and 256 bit keys, only even Key Areas 0, 2, 4, 6
// are valid.
//
//*****************************************************************************
#define CRYPTO_KEY_AREA_0 0
#define CRYPTO_KEY_AREA_1 1
#define CRYPTO_KEY_AREA_2 2
#define CRYPTO_KEY_AREA_3 3
#define CRYPTO_KEY_AREA_4 4
#define CRYPTO_KEY_AREA_5 5
#define CRYPTO_KEY_AREA_6 6
#define CRYPTO_KEY_AREA_7 7
//*****************************************************************************
//
// Defines for the current AES operation
//
//*****************************************************************************
#define CRYPTO_AES_NONE 0
#define CRYPTO_AES_KEYL0AD 1
#define CRYPTO_AES_ECB 2
#define CRYPTO_AES_CCM 3
#define CRYPTO_AES_RNG 4
#define CRYPTO_AES_CBC 5
//*****************************************************************************
//
// Defines for the AES-CTR mode counter width
//
//*****************************************************************************
#define CRYPTO_AES_CTR_32 0x0
#define CRYPTO_AES_CTR_64 0x1
#define CRYPTO_AES_CTR_96 0x2
#define CRYPTO_AES_CTR_128 0x3
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Write the key into the Key Ram.
//!
//! The \c ui32KeyLocation parameter is an enumerated type which specifies
//! the Key Ram location in which the key is stored.
//!
//! The pointer \c pui8AesKey has the address where the Key is stored.
//!
//! \param pui32AesKey is a pointer to an AES Key.
//! \param ui32KeyLocation is the location of the key in Key RAM.
//! This parameter can have any of the following values:
//! - \ref CRYPTO_KEY_AREA_0
//! - \ref CRYPTO_KEY_AREA_1
//! - \ref CRYPTO_KEY_AREA_2
//! - \ref CRYPTO_KEY_AREA_3
//! - \ref CRYPTO_KEY_AREA_4
//! - \ref CRYPTO_KEY_AREA_5
//! - \ref CRYPTO_KEY_AREA_6
//! - \ref CRYPTO_KEY_AREA_7
//!
//! \return Returns status of the function:
//! - \ref AES_SUCCESS
//! - \ref AES_KEYSTORE_READ_ERROR
//
//*****************************************************************************
extern uint32_t CRYPTOAesLoadKey(uint32_t *pui32AesKey,
uint32_t ui32KeyLocation);
//*****************************************************************************
//
//! \brief Start an AES-CBC operation (encryption or decryption).
//!
//! The function starts an AES CBC mode encypt or decrypt operation.
//! End operation can be deteced by enabling interrupt or by polling
//! CRYPTOAesCbcStatus(). Result of operation is returned by CRYPTOAesCbcStatus().
//!
//! \param pui32MsgIn is a pointer to the input data.
//! \param pui32MsgOut is a pointer to the output data.
//! \param ui32MsgLength is the length in bytes of the input data.
//! \param pui32Nonce is a pointer to 16-byte Nonce.
//! \param ui32KeyLocation is the location of the key in Key RAM.
//! This parameter can have any of the following values:
//! - \ref CRYPTO_KEY_AREA_0
//! - \ref CRYPTO_KEY_AREA_1
//! - \ref CRYPTO_KEY_AREA_2
//! - \ref CRYPTO_KEY_AREA_3
//! - \ref CRYPTO_KEY_AREA_4
//! - \ref CRYPTO_KEY_AREA_5
//! - \ref CRYPTO_KEY_AREA_6
//! - \ref CRYPTO_KEY_AREA_7
//! \param bEncrypt is set \c true to encrypt or set \c false to decrypt.
//! \param bIntEnable is set \c true to enable Crypto interrupts or \c false to
//! disable Crypto interrupt.
//!
//! \return Returns status of the AES-CBC operation:
//! - \ref AES_SUCCESS
//! - \ref AES_KEYSTORE_READ_ERROR
//!
//! \sa \ref CRYPTOAesCbcStatus()
//
//*****************************************************************************
extern uint32_t CRYPTOAesCbc(uint32_t *pui32MsgIn, uint32_t *pui32MsgOut,
uint32_t ui32MsgLength, uint32_t *pui32Nonce,
uint32_t ui32KeyLocation, bool bEncrypt,
bool bIntEnable);
//*****************************************************************************
//
//! \brief Check the result of an AES CBC operation.
//!
//! This function should be called after \ref CRYPTOAesCbc() function to
//! check if the AES CBC operation was successful.
//!
//! \return Returns the status of the AES CBC operation:
//! - \ref AES_SUCCESS : Successful.
//! - \ref AES_DMA_BUS_ERROR : Failed.
//! - \ref AES_DMA_BSY : Operation is ongoing.
//!
//! \sa \ref CRYPTOAesCbc()
//
//*****************************************************************************
extern uint32_t CRYPTOAesCbcStatus(void);
//*****************************************************************************
//
//! \brief Start an AES-ECB operation (encryption or decryption).
//!
//! The \c ui32KeyLocation parameter is an enumerated type which specifies
//! the Key Ram location in which the key is stored.
//!
//! \param pui32MsgIn is a pointer to the input data.
//! \param pui32MsgOut is a pointer to the output data.
//! \param ui32KeyLocation is the location of the key in Key RAM.
//! This parameter can have any of the following values:
//! - \ref CRYPTO_KEY_AREA_0
//! - \ref CRYPTO_KEY_AREA_1
//! - \ref CRYPTO_KEY_AREA_2
//! - \ref CRYPTO_KEY_AREA_3
//! - \ref CRYPTO_KEY_AREA_4
//! - \ref CRYPTO_KEY_AREA_5
//! - \ref CRYPTO_KEY_AREA_6
//! - \ref CRYPTO_KEY_AREA_7
//! \param bEncrypt is set \c true to encrypt or set \c false to decrypt.
//! \param bIntEnable is set \c true to enable Crypto interrupts or \c false to
//! disable Crypto interrupt.
//!
//! \return Returns status of the AES-ECB operation:
//! - \ref AES_SUCCESS
//! - \ref AES_KEYSTORE_READ_ERROR
//!
//! \sa \ref CRYPTOAesEcbStatus()
//
//*****************************************************************************
extern uint32_t CRYPTOAesEcb(uint32_t *pui32MsgIn, uint32_t *pui32MsgOut,
uint32_t ui32KeyLocation, bool bEncrypt,
bool bIntEnable);
//*****************************************************************************
//
//! \brief Check the result of an AES ECB operation.
//!
//! This function should be called after \ref CRYPTOAesEcb() function to
//! check if the AES ECB operation was successful.
//!
//! \return Returns the status of the AES ECB operation:
//! - \ref AES_SUCCESS : Successful.
//! - \ref AES_DMA_BUS_ERROR : Failed.
//! - \ref AES_DMA_BSY : Operation is ongoing.
//!
//! \sa \ref CRYPTOAesEcb()
//
//*****************************************************************************
extern uint32_t CRYPTOAesEcbStatus(void);
//*****************************************************************************
//
//! \brief Finish the encryption operation by resetting the operation mode.
//!
//! This function should be called after \ref CRYPTOAesEcbStatus() has reported
//! that the operation is finished successfully.
//!
//! \return None
//!
//! \sa \ref CRYPTOAesEcbStatus()
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOAesEcbFinish(void)
{
// Result has already been copied to the output buffer by DMA.
// Disable master control/DMA clock and clear the operating mode.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = 0x00000000;
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = 0x00000000;
}
//*****************************************************************************
//
//! \brief Finish the encryption operation by resetting the operation mode.
//!
//! This function should be called after \ref CRYPTOAesCbcStatus() has reported
//! that the operation is finished successfully.
//!
//! \return None
//!
//! \sa \ref CRYPTOAesCbcStatus()
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOAesCbcFinish(void)
{
// Result has already been copied to the output buffer by DMA.
// Disable master control/DMA clock and clear the operating mode.
HWREG(CRYPTO_BASE + CRYPTO_O_ALGSEL) = 0x00000000;
HWREG(CRYPTO_BASE + CRYPTO_O_AESCTL) = 0x00000000;
}
//*****************************************************************************
//
//! \brief Start CCM operation.
//!
//! The \c ui32KeyLocation is an enumerated type which specifies the Key Ram
//! location in which the key is stored.
//!
//! \param bEncrypt determines whether to run encryption or not.
//! \param ui32AuthLength is the the length of the authentication field -
//! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets.
//! \param pui32Nonce is a pointer to 13-byte or 12-byte Nonce (Number used once).
//! \param pui32PlainText is a pointer to the octet string input message.
//! \param ui32PlainTextLength is the length of the message.
//! \param pui32Header is the length of the header (Additional Authentication
//! Data or AAD).
//! \param ui32HeaderLength is the length of the header in octets.
//! \param ui32KeyLocation is the location in Key RAM where the key is stored.
//! This parameter can have any of the following values:
//! - \ref CRYPTO_KEY_AREA_0
//! - \ref CRYPTO_KEY_AREA_1
//! - \ref CRYPTO_KEY_AREA_2
//! - \ref CRYPTO_KEY_AREA_3
//! - \ref CRYPTO_KEY_AREA_4
//! - \ref CRYPTO_KEY_AREA_5
//! - \ref CRYPTO_KEY_AREA_6
//! - \ref CRYPTO_KEY_AREA_7
//! \param ui32FieldLength is the size of the length field (2 or 3).
//! \param bIntEnable enables interrupts.
//!
//! \return Returns the status of the CCM operation
//! - \ref AES_SUCCESS
//! - \ref AES_KEYSTORE_READ_ERROR
//! - \ref AES_DMA_BUS_ERROR
//!
//! \sa \ref CRYPTOCcmAuthEncryptStatus()
//
//*****************************************************************************
extern uint32_t CRYPTOCcmAuthEncrypt(bool bEncrypt, uint32_t ui32AuthLength,
uint32_t *pui32Nonce,
uint32_t *pui32PlainText,
uint32_t ui32PlainTextLength,
uint32_t *pui32Header,
uint32_t ui32HeaderLength,
uint32_t ui32KeyLocation,
uint32_t ui32FieldLength,
bool bIntEnable);
//*****************************************************************************
//
//! \brief Check the result of an AES CCM operation.
//!
//! This function should be called after \ref CRYPTOCcmAuthEncrypt() function to check
//! if the AES CCM operation was successful.
//!
//! \return Returns the status of the AES CCM operation:
//! - \ref AES_SUCCESS : Successful.
//! - \ref AES_DMA_BUS_ERROR : Failed.
//! - \ref AES_DMA_BSY : Operation is ongoing.
//!
//! \sa \ref CRYPTOCcmAuthEncrypt()
//
//*****************************************************************************
extern uint32_t CRYPTOCcmAuthEncryptStatus(void);
//*****************************************************************************
//
//! \brief Get the result of an AES CCM operation.
//!
//! This function should be called after \ref CRYPTOCcmAuthEncryptStatus().
//!
//! \param ui32TagLength is length of the Tag.
//! \param pui32CcmTag is the location of the authentication Tag.
//!
//! \return Returns \ref AES_SUCCESS if successful.
//!
//! \sa \ref CRYPTOCcmAuthEncryptStatus()
//
//*****************************************************************************
extern uint32_t CRYPTOCcmAuthEncryptResultGet(uint32_t ui32TagLength,
uint32_t *pui32CcmTag);
//*****************************************************************************
//
//! \brief Start a CCM Decryption and Inverse Authentication operation.
//!
//! The \c ui32KeyLocation is an enumerated type which specifies the Key Ram
//! location in which the key is stored.
//!
//! \param bDecrypt determines whether to run decryption or not.
//! \param ui32AuthLength is the the length of the authentication field -
//! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets.
//! \param pui32Nonce is a pointer to 13-byte or 12-byte Nonce (Number used once).
//! \param pui32CipherText is a pointer to the octet string encrypted message.
//! \param ui32CipherTextLength is the length of the encrypted message.
//! \param pui32Header is the length of the header (Additional Authentication
//! Data or AAD).
//! \param ui32HeaderLength is the length of the header in octets.
//! \param ui32KeyLocation is the location in Key RAM where the key is stored.
//! This parameter can have any of the following values:
//! - \ref CRYPTO_KEY_AREA_0
//! - \ref CRYPTO_KEY_AREA_1
//! - \ref CRYPTO_KEY_AREA_2
//! - \ref CRYPTO_KEY_AREA_3
//! - \ref CRYPTO_KEY_AREA_4
//! - \ref CRYPTO_KEY_AREA_5
//! - \ref CRYPTO_KEY_AREA_6
//! - \ref CRYPTO_KEY_AREA_7
//! \param ui32FieldLength is the size of the length field (2 or 3).
//! \param bIntEnable enables interrupts.
//!
//! \return Returns the status of the operation:
//! - \ref AES_SUCCESS
//! - \ref AES_KEYSTORE_READ_ERROR
//! - \ref AES_DMA_BUS_ERROR
//
//*****************************************************************************
extern uint32_t CRYPTOCcmInvAuthDecrypt(bool bDecrypt, uint32_t ui32AuthLength,
uint32_t *pui32Nonce,
uint32_t *pui32CipherText,
uint32_t ui32CipherTextLength,
uint32_t *pui32Header,
uint32_t ui32HeaderLength,
uint32_t ui32KeyLocation,
uint32_t ui32FieldLength,
bool bIntEnable);
//*****************************************************************************
//
//! \brief Checks CCM decrypt and Inverse Authentication result.
//!
//! \return Returns status of operation:
//! - \ref AES_SUCCESS : Operation was successful.
//! - \ref AES_DMA_BSY : Operation is busy.
//! - \ref AES_DMA_BUS_ERROR : An error is encountered.
//
//*****************************************************************************
extern uint32_t CRYPTOCcmInvAuthDecryptStatus(void);
//*****************************************************************************
//
//! \brief Get the result of the CCM operation.
//!
//! \param ui32AuthLength is the the length of the authentication field -
//! 0, 2, 4, 6, 8, 10, 12, 14 or 16 octets.
//! \param pui32CipherText is a pointer to the octet string encrypted message.
//! \param ui32CipherTextLength is the length of the encrypted message.
//! \param pui32CcmTag is the location of the authentication Tag.
//!
//! \return Returns AES_SUCCESS if successful.
//
//*****************************************************************************
extern uint32_t CRYPTOCcmInvAuthDecryptResultGet(uint32_t ui32AuthLength,
uint32_t *pui32CipherText,
uint32_t ui32CipherTextLength,
uint32_t *pui32CcmTag);
//*****************************************************************************
//
//! \brief Get the current status of the Crypto DMA controller.
//!
//! This function is used to poll the Crypto DMA controller to check if it is
//! ready for a new operation or if an error has occurred.
//!
//! The \ref CRYPTO_DMA_BUS_ERROR can also be caught using the crypto event
//! handler.
//!
//! \return Returns the current status of the DMA controller:
//! - \ref CRYPTO_DMA_READY : DMA ready for a new operation
//! - \ref CRYPTO_DMA_BSY : DMA is busy
//! - \ref CRYPTO_DMA_BUS_ERROR : DMA Bus error
//
//*****************************************************************************
__STATIC_INLINE uint32_t
CRYPTODmaStatus(void)
{
// Return the value of the status register.
return (HWREG(CRYPTO_BASE + CRYPTO_O_DMASTAT));
}
//*****************************************************************************
//
//! \brief Enable Crypto DMA operation.
//!
//! The specified Crypto DMA channels are enabled.
//!
//! \param ui32Channels is a bitwise OR of the channels to enable.
//! - \ref CRYPTO_DMA_CHAN0
//! - \ref CRYPTO_DMA_CHAN1
//!
//! \return None
//
//*****************************************************************************
extern void CRYPTODmaEnable(uint32_t ui32Channels);
//*****************************************************************************
//
//! \brief Disable Crypto DMA operation.
//!
//! The specified Crypto DMA channels are disabled.
//!
//! \param ui32Channels is a bitwise OR of the channels to disable.
//! - \ref CRYPTO_DMA_CHAN0
//! - \ref CRYPTO_DMA_CHAN1
//!
//! \return None
//
//*****************************************************************************
extern void CRYPTODmaDisable(uint32_t ui32Channels);
//*****************************************************************************
//
//! \brief Enables individual Crypto interrupt sources.
//!
//! This function enables the indicated Crypto interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt.
//! Disabled sources have no effect on the processor.
//!
//! \param ui32IntFlags is the bitwise OR of the interrupt sources to be enabled.
//! - \ref CRYPTO_DMA_IN_DONE
//! - \ref CRYPTO_RESULT_RDY
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOIntEnable(uint32_t ui32IntFlags)
{
// Check the arguments.
ASSERT((ui32IntFlags & CRYPTO_DMA_IN_DONE) |
(ui32IntFlags & CRYPTO_RESULT_RDY));
// Using level interrupt.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQTYPE) = CRYPTO_IRQTYPE_LEVEL;
// Enable the specified interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) |= ui32IntFlags;
}
//*****************************************************************************
//
//! \brief Disables individual CRYPTO interrupt sources.
//!
//! This function disables the indicated Crypto interrupt sources. Only the
//! sources that are enabled can be reflected to the processor interrupt.
//! Disabled sources have no effect on the processor.
//!
//! \param ui32IntFlags is the bitwise OR of the interrupt sources to be enabled.
//! - \ref CRYPTO_DMA_IN_DONE
//! - \ref CRYPTO_RESULT_RDY
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOIntDisable(uint32_t ui32IntFlags)
{
// Check the arguments.
ASSERT((ui32IntFlags & CRYPTO_DMA_IN_DONE) |
(ui32IntFlags & CRYPTO_RESULT_RDY));
// Disable the specified interrupts.
HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN) &= ~ui32IntFlags;
}
//*****************************************************************************
//
//! \brief Gets the current interrupt status.
//!
//! This function returns the interrupt status for the specified Crypto. Either
//! the raw interrupt status or the status of interrupts that are allowed to
//! reflect to the processor can be returned.
//!
//! \param bMasked whether to use raw or masked interrupt status:
//! - \c false : Raw interrupt status is required.
//! - \c true : Masked interrupt status is required.
//!
//! \return Returns the current interrupt status:
//! - \ref CRYPTO_DMA_IN_DONE
//! - \ref CRYPTO_RESULT_RDY
//
//*****************************************************************************
__STATIC_INLINE uint32_t
CRYPTOIntStatus(bool bMasked)
{
uint32_t ui32Mask;
// Return either the interrupt status or the raw interrupt status as
// requested.
if(bMasked)
{
ui32Mask = HWREG(CRYPTO_BASE + CRYPTO_O_IRQEN);
return(ui32Mask & HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT));
}
else
{
return(HWREG(CRYPTO_BASE + CRYPTO_O_IRQSTAT) & 0x00000003);
}
}
//*****************************************************************************
//
//! \brief Clears Crypto interrupt sources.
//!
//! The specified Crypto interrupt sources are cleared, so that they no longer
//! assert. This function must be called in the interrupt handler to keep the
//! interrupt from being recognized again immediately upon exit.
//!
//! \note Due to write buffers and synchronizers in the system it may take several
//! clock cycles from a register write clearing an event in a module and until the
//! event is actually cleared in the NVIC of the system CPU. It is recommended to
//! clear the event source early in the interrupt service routine (ISR) to allow
//! the event clear to propagate to the NVIC before returning from the ISR.
//! At the same time, an early event clear allows new events of the same type to be
//! pended instead of ignored if the event is cleared later in the ISR.
//! It is the responsibility of the programmer to make sure that enough time has passed
//! before returning from the ISR to avoid false re-triggering of the cleared event.
//! A simple, although not necessarily optimal, way of clearing an event before
//! returning from the ISR is:
//! -# Write to clear event (interrupt source). (buffered write)
//! -# Dummy read from the event source module. (making sure the write has propagated)
//! -# Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
//!
//! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
//! - \ref CRYPTO_DMA_IN_DONE
//! - \ref CRYPTO_RESULT_RDY
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOIntClear(uint32_t ui32IntFlags)
{
// Check the arguments.
ASSERT((ui32IntFlags & CRYPTO_DMA_IN_DONE) |
(ui32IntFlags & CRYPTO_RESULT_RDY));
// Clear the requested interrupt sources,
HWREG(CRYPTO_BASE + CRYPTO_O_IRQCLR) = ui32IntFlags;
}
//*****************************************************************************
//
//! \brief Registers an interrupt handler for a Crypto interrupt in the dynamic interrupt table.
//!
//! \note Only use this function if you want to use the dynamic vector table (in SRAM)!
//!
//! This function registers a function as the interrupt handler for a specific
//! interrupt and enables the corresponding interrupt in the interrupt controller.
//!
//! Specific UART interrupts must be enabled via \ref CRYPTOIntEnable(). It is the
//! interrupt handler's responsibility to clear the interrupt source.
//!
//! \param pfnHandler is a pointer to the function to be called when the
//! UART interrupt occurs.
//!
//! \return None
//!
//! \sa \ref IntRegister() for important information about registering interrupt
//! handlers.
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOIntRegister(void (*pfnHandler)(void))
{
// Register the interrupt handler.
IntRegister(INT_CRYPTO_RESULT_AVAIL_IRQ, pfnHandler);
// Enable the UART interrupt.
IntEnable(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
//*****************************************************************************
//
//! \brief Unregisters an interrupt handler for a Crypto interrupt in the dynamic interrupt table.
//!
//! This function does the actual unregistering of the interrupt handler. It
//! clears the handler to be called when a Crypto interrupt occurs. This
//! function also masks off the interrupt in the interrupt controller so that
//! the interrupt handler no longer is called.
//!
//! \return None
//!
//! \sa \ref IntRegister() for important information about registering interrupt
//! handlers.
//
//*****************************************************************************
__STATIC_INLINE void
CRYPTOIntUnregister(void)
{
// Disable the interrupt.
IntDisable(INT_CRYPTO_RESULT_AVAIL_IRQ);
// Unregister the interrupt handler.
IntUnregister(INT_CRYPTO_RESULT_AVAIL_IRQ);
}
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_CRYPTOAesLoadKey
#undef CRYPTOAesLoadKey
#define CRYPTOAesLoadKey ROM_CRYPTOAesLoadKey
#endif
#ifdef ROM_CRYPTOAesCbc
#undef CRYPTOAesCbc
#define CRYPTOAesCbc ROM_CRYPTOAesCbc
#endif
#ifdef ROM_CRYPTOAesCbcStatus
#undef CRYPTOAesCbcStatus
#define CRYPTOAesCbcStatus ROM_CRYPTOAesCbcStatus
#endif
#ifdef ROM_CRYPTOAesEcb
#undef CRYPTOAesEcb
#define CRYPTOAesEcb ROM_CRYPTOAesEcb
#endif
#ifdef ROM_CRYPTOAesEcbStatus
#undef CRYPTOAesEcbStatus
#define CRYPTOAesEcbStatus ROM_CRYPTOAesEcbStatus
#endif
#ifdef ROM_CRYPTOCcmAuthEncrypt
#undef CRYPTOCcmAuthEncrypt
#define CRYPTOCcmAuthEncrypt ROM_CRYPTOCcmAuthEncrypt
#endif
#ifdef ROM_CRYPTOCcmAuthEncryptStatus
#undef CRYPTOCcmAuthEncryptStatus
#define CRYPTOCcmAuthEncryptStatus ROM_CRYPTOCcmAuthEncryptStatus
#endif
#ifdef ROM_CRYPTOCcmAuthEncryptResultGet
#undef CRYPTOCcmAuthEncryptResultGet
#define CRYPTOCcmAuthEncryptResultGet ROM_CRYPTOCcmAuthEncryptResultGet
#endif
#ifdef ROM_CRYPTOCcmInvAuthDecrypt
#undef CRYPTOCcmInvAuthDecrypt
#define CRYPTOCcmInvAuthDecrypt ROM_CRYPTOCcmInvAuthDecrypt
#endif
#ifdef ROM_CRYPTOCcmInvAuthDecryptStatus
#undef CRYPTOCcmInvAuthDecryptStatus
#define CRYPTOCcmInvAuthDecryptStatus ROM_CRYPTOCcmInvAuthDecryptStatus
#endif
#ifdef ROM_CRYPTOCcmInvAuthDecryptResultGet
#undef CRYPTOCcmInvAuthDecryptResultGet
#define CRYPTOCcmInvAuthDecryptResultGet ROM_CRYPTOCcmInvAuthDecryptResultGet
#endif
#ifdef ROM_CRYPTODmaEnable
#undef CRYPTODmaEnable
#define CRYPTODmaEnable ROM_CRYPTODmaEnable
#endif
#ifdef ROM_CRYPTODmaDisable
#undef CRYPTODmaDisable
#define CRYPTODmaDisable ROM_CRYPTODmaDisable
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __CRYPTO_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/ddi.c
Vendored
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@@ -1,214 +0,0 @@
/******************************************************************************
* Filename: ddi.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
*
* Description: Driver for the DDI master interface
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "ddi.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef DDI32RegWrite
#define DDI32RegWrite NOROM_DDI32RegWrite
#undef DDI16BitWrite
#define DDI16BitWrite NOROM_DDI16BitWrite
#undef DDI16BitfieldWrite
#define DDI16BitfieldWrite NOROM_DDI16BitfieldWrite
#undef DDI16BitRead
#define DDI16BitRead NOROM_DDI16BitRead
#undef DDI16BitfieldRead
#define DDI16BitfieldRead NOROM_DDI16BitfieldRead
#endif
//*****************************************************************************
//
// Write a 32 bit value to a register in the DDI slave.
//
//*****************************************************************************
void
DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Val)
{
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(ui32Reg < DDI_SLAVE_REGS);
// Write the value to the register.
AuxAdiDdiSafeWrite(ui32Base + ui32Reg, ui32Val, 4);
}
//*****************************************************************************
//
// Write a single bit using a 16-bit maskable write
//
//*****************************************************************************
void
DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask, uint32_t ui32WrData)
{
uint32_t ui32RegAddr;
uint32_t ui32Data;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(!((ui32Mask & 0xFFFF0000) ^ (ui32Mask & 0x0000FFFF)));
ASSERT(!(ui32WrData & 0xFFFF0000));
// DDI 16-bit target is on 32-bit boundary so double offset
ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B;
// Adjust for target bit in high half of the word.
if(ui32Mask & 0xFFFF0000)
{
ui32RegAddr += 4;
ui32Mask >>= 16;
}
// Write mask if data is not zero (to set mask bit), else write '0'.
ui32Data = ui32WrData ? ui32Mask : 0x0;
// Update the register.
AuxAdiDdiSafeWrite(ui32RegAddr, (ui32Mask << 16) | ui32Data, 4);
}
//*****************************************************************************
//
// Write a bitfield via the DDI using 16-bit maskable write
//
//*****************************************************************************
void
DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask, uint32_t ui32Shift,
uint16_t ui32Data)
{
uint32_t ui32RegAddr;
uint32_t ui32WrData;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
// 16-bit target is on 32-bit boundary so double offset.
ui32RegAddr = ui32Base + (ui32Reg << 1) + DDI_O_MASK16B;
// Adjust for target bit in high half of the word.
if(ui32Shift >= 16)
{
ui32Shift = ui32Shift - 16;
ui32RegAddr += 4;
ui32Mask = ui32Mask >> 16;
}
// Shift data in to position.
ui32WrData = ui32Data << ui32Shift;
// Write data.
AuxAdiDdiSafeWrite(ui32RegAddr, (ui32Mask << 16) | ui32WrData, 4);
}
//*****************************************************************************
//
// Read a bit via the DDI using 16-bit READ.
//
//*****************************************************************************
uint16_t
DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Mask)
{
uint32_t ui32RegAddr;
uint16_t ui16Data;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
// Calculate the address of the register.
ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR;
// Adjust for target bit in high half of the word.
if(ui32Mask & 0xFFFF0000)
{
ui32RegAddr += 2;
ui32Mask = ui32Mask >> 16;
}
// Read a halfword on the DDI interface.
ui16Data = AuxAdiDdiSafeRead(ui32RegAddr, 2);
// Mask data.
ui16Data = ui16Data & ui32Mask;
// Return masked data.
return(ui16Data);
}
//*****************************************************************************
//
// Read a bit field via the DDI using 16-bit read.
//
//*****************************************************************************
uint16_t
DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask, uint32_t ui32Shift)
{
uint32_t ui32RegAddr;
uint16_t ui16Data;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
// Calculate the register address.
ui32RegAddr = ui32Base + ui32Reg + DDI_O_DIR;
// Adjust for target bit in high half of the word.
if(ui32Shift >= 16)
{
ui32Shift = ui32Shift - 16;
ui32RegAddr += 2;
ui32Mask = ui32Mask >> 16;
}
// Read the register.
ui16Data = AuxAdiDdiSafeRead(ui32RegAddr, 2);
// Mask data and shift into place.
ui16Data &= ui32Mask;
ui16Data >>= ui32Shift;
// Return data.
return(ui16Data);
}
third_party/ti/devices/cc26x0/driverlib/ddi.h
Vendored
-563
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@@ -1,563 +0,0 @@
/******************************************************************************
* Filename: ddi.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the DDI master interface.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup analog_group
//! @{
//! \addtogroup ddi_api
//! @{
//
//*****************************************************************************
#ifndef __DDI_H__
#define __DDI_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ddi.h"
#include "../inc/hw_aux_smph.h"
#include "debug.h"
#include "cpu.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define DDI32RegWrite NOROM_DDI32RegWrite
#define DDI16BitWrite NOROM_DDI16BitWrite
#define DDI16BitfieldWrite NOROM_DDI16BitfieldWrite
#define DDI16BitRead NOROM_DDI16BitRead
#define DDI16BitfieldRead NOROM_DDI16BitfieldRead
#endif
//*****************************************************************************
//
// Number of register in the DDI slave
//
//*****************************************************************************
#define DDI_SLAVE_REGS 64
//*****************************************************************************
//
// Defines that is used to control the ADI slave and master
//
//*****************************************************************************
#define DDI_PROTECT 0x00000080
#define DDI_ACK 0x00000001
#define DDI_SYNC 0x00000000
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
// Helper functions
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Safely write to AUX ADI/DDI interfaces using a semaphore.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param nAddr is the register address.
//! \param nData is the data to write to the register.
//! \param nSize is the register access size in bytes.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
AuxAdiDdiSafeWrite(uint32_t nAddr, uint32_t nData, uint32_t nSize)
{
// Disable interrupts and remember whether to re-enable
bool bIrqEnabled = !CPUcpsid();
// Acquire semaphore for accessing ADI/DDI in AUX, perform access, release semaphore
while (!HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0));
switch (nSize) {
case 1: HWREGB(nAddr) = (uint8_t)nData; break;
case 2: HWREGH(nAddr) = (uint16_t)nData; break;
case 4: default: HWREG(nAddr) = nData; break;
}
HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0) = 1;
// Restore interrupt enable
if (bIrqEnabled) {
CPUcpsie();
}
}
//*****************************************************************************
//
//! \brief Safely read from AUX ADI/DDI interfaces using a semaphore.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param nAddr is the register address.
//! \param nSize is the register access size in bytes.
//!
//! \return Returns the data read.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
AuxAdiDdiSafeRead(uint32_t nAddr, uint32_t nSize)
{
uint32_t nRet;
// Disable interrupts and remember whether to re-enable
bool bIrqEnabled = !CPUcpsid();
// Acquire semaphore for accessing ADI/DDI in AUX, perform access, release semaphore
while (!HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0));
switch (nSize) {
case 1: nRet = HWREGB(nAddr); break;
case 2: nRet = HWREGH(nAddr); break;
case 4: default: nRet = HWREG(nAddr); break;
}
HWREG(AUX_SMPH_BASE + AUX_SMPH_O_SMPH0) = 1;
// Restore interrupt enable
if (bIrqEnabled) {
CPUcpsie();
}
return nRet;
}
#ifdef DRIVERLIB_DEBUG
//*****************************************************************************
//
//! \internal
//!
//! \brief Check a DDI base address.
//!
//! This function determines if a DDI port base address is valid.
//!
//! \param ui32Base is the base address of the DDI port.
//!
//! \return Returns \c true if the base address is valid and \c false
//! otherwise.
//!
//! \endinternal
//
//*****************************************************************************
static bool
DDIBaseValid(uint32_t ui32Base)
{
return(ui32Base == AUX_DDI0_OSC_BASE);
}
#endif
//*****************************************************************************
//
//! \brief Read the value in a 32 bit register.
//!
//! This function will read a register in the analog domain and return
//! the value as an \c uint32_t.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is DDI base address.
//! \param ui32Reg is the 32 bit register to read.
//!
//! \return Returns the 32 bit value of the analog register.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
DDI32RegRead(uint32_t ui32Base, uint32_t ui32Reg)
{
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(ui32Reg < DDI_SLAVE_REGS);
// Read the register and return the value.
return AuxAdiDdiSafeRead(ui32Base + ui32Reg, 4);
}
//*****************************************************************************
//
//! \brief Set specific bits in a DDI slave register.
//!
//! This function will set bits in a register in the analog domain.
//!
//! \note This operation is write only for the specified register.
//! This function is used to set bits in specific register in the
//! DDI slave. Only bits in the selected register are affected by the
//! operation.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is DDI base address.
//! \param ui32Reg is the base register to assert the bits in.
//! \param ui32Val is the 32 bit one-hot encoded value specifying which
//! bits to set in the register.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
DDI32BitsSet(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(ui32Reg < DDI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the DDI slave.
ui32RegOffset = DDI_O_SET;
// Set the selected bits.
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + ui32Reg, ui32Val, 4);
}
//*****************************************************************************
//
//! \brief Clear specific bits in a 32 bit DDI register.
//!
//! This function will clear bits in a register in the analog domain.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is DDI base address.
//! \param ui32Reg is the base registers to clear the bits in.
//! \param ui32Val is the 32 bit one-hot encoded value specifying which
//! bits to clear in the register.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
DDI32BitsClear(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(ui32Reg < DDI_SLAVE_REGS);
// Get the correct address of the first register used for setting bits
// in the DDI slave.
ui32RegOffset = DDI_O_CLR;
// Clear the selected bits.
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset + ui32Reg, ui32Val, 4);
}
//*****************************************************************************
//
//! \brief Set a value on any 8 bits inside a 32 bit register in the DDI slave.
//!
//! This function allows byte (8 bit access) to the DDI slave registers.
//!
//! Use this function to write any value in the range 0-7 bits aligned on a
//! byte boundary. Fx. for writing the value 0b101 to bits 1-3 set
//! <tt>ui16Val = 0x0A</tt> and <tt>ui16Mask = 0x0E</tt>. Bits 0 and 5-7 will
//! not be affected by the operation, as long as the corresponding bits are
//! not set in the \c ui16Mask.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the DDI port.
//! \param ui32Reg is the Least Significant Register in the DDI slave that
//! will be affected by the write operation.
//! \param ui32Byte is the byte number to access within the 32 bit register.
//! \param ui16Mask is the mask defining which of the 8 bits that should be
//! overwritten. The mask must be defined in the lower half of the 16 bits.
//! \param ui16Val is the value to write. The value must be defined in the lower
//! half of the 16 bits.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
DDI8SetValBit(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Byte,
uint16_t ui16Mask, uint16_t ui16Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(ui32Reg < DDI_SLAVE_REGS);
ASSERT(!(ui16Val & 0xFF00));
ASSERT(!(ui16Mask & 0xFF00));
// Get the correct address of the first register used for setting bits
// in the DDI slave.
ui32RegOffset = DDI_O_MASK8B + (ui32Reg << 1) + (ui32Byte << 1);
// Set the selected bits.
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui16Mask << 8) | ui16Val, 2);
}
//*****************************************************************************
//
//! \brief Set a value on any 16 bits inside a 32 bit register aligned on a
//! half-word boundary in the DDI slave.
//!
//! This function allows 16 bit masked access to the DDI slave registers.
//!
//! Use this function to write any value in the range 0-15 bits aligned on a
//! half-word boundary. Fx. for writing the value 0b101 to bits 1-3 set
//! <tt>ui32Val = 0x000A</tt> and <tt>ui32Mask = 0x000E</tt>. Bits 0 and 5-15 will not be
//! affected by the operation, as long as the corresponding bits are not set
//! in the \c ui32Mask.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the DDI port.
//! \param ui32Reg is register to access.
//! \param bWriteHigh defines which part of the register to write in.
//! \param ui32Mask is the mask defining which of the 16 bit that should be
//! overwritten. The mask must be defined in the lower half of the 32 bits.
//! \param ui32Val is the value to write. The value must be defined in the lower
//! half of the 32 bits.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
DDI16SetValBit(uint32_t ui32Base, uint32_t ui32Reg, bool bWriteHigh,
uint32_t ui32Mask, uint32_t ui32Val)
{
uint32_t ui32RegOffset;
// Check the arguments.
ASSERT(DDIBaseValid(ui32Base));
ASSERT(ui32Reg < DDI_SLAVE_REGS);
ASSERT(!(ui32Val & 0xFFFF0000));
ASSERT(!(ui32Mask & 0xFFFF0000));
// Get the correct address of the first register used for setting bits
// in the DDI slave.
ui32RegOffset = DDI_O_MASK16B + (ui32Reg << 1) + (bWriteHigh ? 4 : 0);
// Set the selected bits.
AuxAdiDdiSafeWrite(ui32Base + ui32RegOffset, (ui32Mask << 16) | ui32Val, 4);
}
//*****************************************************************************
//
//! \brief Write a 32 bit value to a register in the DDI slave.
//!
//! This function will write a value to a register in the analog
//! domain.
//!
//! \note This operation is write only for the specified register. No
//! conservation of the previous value of the register will be kept (i.e. this
//! is NOT read-modify-write on the register).
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is DDI base address.
//! \param ui32Reg is the register to write.
//! \param ui32Val is the 32 bit value to write to the register.
//!
//! \return None
//
//*****************************************************************************
extern void DDI32RegWrite(uint32_t ui32Base, uint32_t ui32Reg, uint32_t ui32Val);
//*****************************************************************************
//
//! \brief Write a single bit using a 16-bit maskable write.
//!
//! A '1' is written to the bit if \c ui32WrData is non-zero, else a '0' is written.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the DDI port.
//! \param ui32Reg is register to access.
//! \param ui32Mask is the mask defining which of the 16 bit that should be
//! overwritten. The mask must be defined in the lower half of the 32 bits.
//! \param ui32WrData is the value to write. The value must be defined in the lower
//! half of the 32 bits.
//!
//! \return None
//
//*****************************************************************************
extern void DDI16BitWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask, uint32_t ui32WrData);
//*****************************************************************************
//
//! \brief Write a bit field via the DDI using 16-bit maskable write.
//!
//! Requires that bitfields not space the low/high word boundary.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the DDI port.
//! \param ui32Reg is register to access.
//! \param ui32Mask is the mask defining which of the 16 bits that should be
//! overwritten. The mask must be defined in the lower half of the 32 bits.
//! \param ui32Shift
//! \param ui32Data
//!
//! \return None
//
//*****************************************************************************
extern void DDI16BitfieldWrite(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask, uint32_t ui32Shift,
uint16_t ui32Data);
//*****************************************************************************
//
//! \brief Read a bit via the DDI using 16-bit read.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the DDI module.
//! \param ui32Reg is the register to read.
//! \param ui32Mask defines the bit which should be read.
//!
//! \return Returns a zero if bit selected by mask is '0'. Else returns the mask.
//
//*****************************************************************************
extern uint16_t DDI16BitRead(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask);
//*****************************************************************************
//
//! \brief Read a bitfield via the DDI using 16-bit read.
//!
//! Requires that bit fields do not space the low/high word boundary.
//!
//! \note Both the AUX module and the clock for the AUX SMPH module must be
//! enabled before calling this function.
//!
//! \param ui32Base is the base address of the DDI port.
//! \param ui32Reg is register to access.
//! \param ui32Mask is the mask defining which of the 16 bits that should be
//! overwritten. The mask must be defined in the lower half of the 32 bits.
//! \param ui32Shift defines the required shift of the data to align with bit 0.
//!
//! \return Returns data aligned to bit 0.
//
//*****************************************************************************
extern uint16_t DDI16BitfieldRead(uint32_t ui32Base, uint32_t ui32Reg,
uint32_t ui32Mask, uint32_t ui32Shift);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_DDI32RegWrite
#undef DDI32RegWrite
#define DDI32RegWrite ROM_DDI32RegWrite
#endif
#ifdef ROM_DDI16BitWrite
#undef DDI16BitWrite
#define DDI16BitWrite ROM_DDI16BitWrite
#endif
#ifdef ROM_DDI16BitfieldWrite
#undef DDI16BitfieldWrite
#define DDI16BitfieldWrite ROM_DDI16BitfieldWrite
#endif
#ifdef ROM_DDI16BitRead
#undef DDI16BitRead
#define DDI16BitRead ROM_DDI16BitRead
#endif
#ifdef ROM_DDI16BitfieldRead
#undef DDI16BitfieldRead
#define DDI16BitfieldRead ROM_DDI16BitfieldRead
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __DDI_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/ddi_doc.h
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/******************************************************************************
* Filename: ddi_doc.h
* Revised: 2016-08-30 14:34:13 +0200 (Tue, 30 Aug 2016)
* Revision: 47080
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup ddi_api
//! @{
//! \section sec_ddi Introduction
//! \n
//!
//! \section sec_ddi_api API
//!
//! The API functions can be grouped like this:
//!
//! Write:
//! - Direct (all bits):
//! - \ref DDI32RegWrite()
//! - Set individual bits:
//! - \ref DDI32BitsSet()
//! - Clear individual bits:
//! - \ref DDI32BitsClear()
//! - Masked:
//! - \ref DDI8SetValBit()
//! - \ref DDI16SetValBit()
//! - Special functions using masked write:
//! - \ref DDI16BitWrite()
//! - \ref DDI16BitfieldWrite()
//!
//! Read:
//! - Direct (all bits):
//! - \ref DDI32RegRead()
//! - Special functions using masked read:
//! - \ref DDI16BitRead()
//! - \ref DDI16BitfieldRead()
//!
//! AUX access using semaphores (used by both ADI and DDI APIs when necessary):
//! - \ref AuxAdiDdiSafeRead()
//! - \ref AuxAdiDdiSafeWrite()
//!
//! @}
third_party/ti/devices/cc26x0/driverlib/debug.c
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/******************************************************************************
* Filename: debug.c
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
*
* Description: Driver for the Debug functionality (NB. This is a stub which
* should never be included in a release).
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "debug.h"
//*****************************************************************************
//
// Function stub for allowing compile with DRIVERLIB_DEBUG flag asserted.
//
//*****************************************************************************
void
__error__(char *pcFilename, uint32_t ui32Line)
{
// Error catching.
// User can implement custom error handling for failing ASSERTs.
// Setting breakpoint here allows tracing of the failing ASSERT.
while( true );
}
third_party/ti/devices/cc26x0/driverlib/debug.h
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/******************************************************************************
* Filename: debug.h
* Revised: 2017-04-26 18:27:45 +0200 (Wed, 26 Apr 2017)
* Revision: 48852
*
* Description: Macros for assisting debug of the driver library.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_control_group
//! @{
//! \addtogroup debug_api
//! @{
//
//*****************************************************************************
#ifndef __DEBUG_H__
#define __DEBUG_H__
//*****************************************************************************
//
//! Function stub for allowing compile with DRIVERLIB_DEBUG flag asserted.
//
//*****************************************************************************
extern void __error__(char *pcFilename, uint32_t ui32Line);
//*****************************************************************************
//
// The ASSERT macro, which does the actual assertion checking. Typically, this
// will be for procedure arguments.
//
//*****************************************************************************
#ifdef DRIVERLIB_DEBUG
#define ASSERT(expr) { \
if(!(expr)) \
{ \
__error__(__FILE__, __LINE__); \
} \
}
#else
#define ASSERT(expr)
#endif
#endif // __DEBUG_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/driverlib_release.c
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/******************************************************************************
* Filename: driverlib_release.c
* Revised: $Date: 2016-09-13 14:21:40 +0200 (Tue, 13 Sep 2016) $
* Revision: $Revision: 47152 $
*
* Description: Provides macros for ensuring that a specfic release of
* DriverLib is used.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "../driverlib/driverlib_release.h"
/// Declare the current DriverLib release
DRIVERLIB_DECLARE_RELEASE(0, 49664);
third_party/ti/devices/cc26x0/driverlib/driverlib_release.h
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/******************************************************************************
* Filename: driverlib_release.h
* Revised: $Date: 2015-07-16 12:12:04 +0200 (Thu, 16 Jul 2015) $
* Revision: $Revision: 44151 $
*
* Description: Provides macros for ensuring that a specfic release of
* DriverLib is used.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_control_group
//! @{
//! \addtogroup driverlib_release_api
//! @{
//
//*****************************************************************************
#ifndef __DRIVERLIB_RELEASE_H__
#define __DRIVERLIB_RELEASE_H__
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
/// DriverLib release group number
#define DRIVERLIB_RELEASE_GROUP 0
/// DriverLib release build number
#define DRIVERLIB_RELEASE_BUILD 49664
//*****************************************************************************
//
//! This macro is called internally from within DriverLib to declare the
//! DriverLib release locking object:
//! \param group is the DriverLib release group number.
//! \param build is the DriverLib release build number.
//!
//! This macro shall not be called in the application unless the intention is
//! to bypass the release locking (at own risk).
//
//*****************************************************************************
#define DRIVERLIB_DECLARE_RELEASE(group, build) \
const volatile uint8_t driverlib_release_##group##_##build
/// External declaration of the DriverLib release locking object
extern DRIVERLIB_DECLARE_RELEASE(0, 49664);
//*****************************************************************************
//
//! This macro shall be called once from within a function of a precompiled
//! software deliverable to lock the deliverable to a specific DriverLib
//! release. It is essential that the call is made from code that is not
//! optimized away.
//!
//! This macro locks to a specific DriverLib release:
//! \param group is the DriverLib release group number.
//! \param build is the DriverLib release build number.
//!
//! If attempting to use the precompiled deliverable with a different release
//! of DriverLib, a linker error will be produced, stating that
//! "driverlib_release_xx_yyyyy is undefined" or similar.
//!
//! To override the check, for example when upgrading DriverLib but not the
//! precompiled deliverables, or when mixing precompiled deliverables,
//! application developers may (at own risk) declare the missing DriverLib
//! release using the \ref DRIVERLIB_DECLARE_RELEASE() macro.
//
//*****************************************************************************
#define DRIVERLIB_ASSERT_RELEASE(group, build) \
(driverlib_release_##group##_##build)
//*****************************************************************************
//
//! This macro shall be called once from within a function of a precompiled
//! software deliverable to lock the deliverable to a specific DriverLib
//! release. It is essential that the call is made from code that is not
//! optimized away.
//!
//! This macro locks to the current DriverLib release used at compile-time.
//!
//! If attempting to use the precompiled deliverable with a different release
//! of DriverLib, a linker error will be produced, stating that
//! "driverlib_release_xx_yyyyy is undefined" or similar.
//!
//! To override the check, for example when upgrading DriverLib but not the
//! precompiled deliverables, or when mixing precompiled deliverables,
//! application developers may (at own risk) declare the missing DriverLib
//! release using the \ref DRIVERLIB_DECLARE_RELEASE() macro.
//
//*****************************************************************************
#define DRIVERLIB_ASSERT_CURR_RELEASE() \
DRIVERLIB_ASSERT_RELEASE(0, 49664)
#ifdef __cplusplus
}
#endif
#endif // __DRIVERLIB_RELEASE_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/event.c
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/******************************************************************************
* Filename: event.c
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: Driver for the Event Fabric.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "event.h"
// See event.h for implementation
third_party/ti/devices/cc26x0/driverlib/event.h
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/******************************************************************************
* Filename: event.h
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: Defines and prototypes for the Event Handler.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup peripheral_group
//! @{
//! \addtogroup event_api
//! @{
//
//*****************************************************************************
#ifndef __EVENT_H__
#define __EVENT_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_event.h"
#include "debug.h"
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Connects an event to an event subscriber via Event Fabric.
//!
//! This function connects event sources to event subscribers.
//!
//! It is not possible to read event status in this module (except software events).
//! Event status must be read in the module that contains the event source. How a
//! specific event subscriber reacts to an event is configured and documented in
//! the respective modules.
//!
//! For a full list of configurable and constant mapped event sources to event
//! subscribers see the register descriptions for
//! <a href="../register_descriptions/CPU_MMAP/EVENT.html" target="_blank">Event Fabric</a>.
//!
//! Defines for event subscriber argument (\c ui32EventSubscriber) have the format:
//! - \ti_code{EVENT_O_[subscriber_name]}
//!
//! Defines for event source argument (\c ui32EventSource) must have the
//! following format where valid \c event_enum values are found in the
//! register description :
//! - \ti_code{EVENT_[subscriber_name]_EV_[event_enum]}
//!
//! Examples of valid defines for \c ui32EventSource:
//! - EVENT_CPUIRQSEL30_EV_AUX_TDC_DONE
//! - EVENT_RFCSEL9_EV_AUX_COMPA
//! - EVENT_GPT0ACAPTSEL_EV_AON_RTC_UPD
//!
//! \note Each event subscriber can only receive a sub-set of the event sources!
//!
//! \note Switching the event source is not glitch free, so it is imperative
//! that the subscriber is disabled for interrupts when switching the event
//! source. The behavior is undefined if not disabled.
//!
//! \param ui32EventSubscriber is the \b configurable event subscriber to receive the event.
//! Click the event subscriber to see the list of valid event sources in the
//! register description.
//! - EVENT_O_CPUIRQSEL30 : System CPU interrupt 30
//! - EVENT_O_RFCSEL9 : RF Core event 9
//! - EVENT_O_GPT0ACAPTSEL : GPT 0A capture event
//! - EVENT_O_GPT0BCAPTSEL : GPT 0B capture event
//! - EVENT_O_GPT1ACAPTSEL : GPT 1A capture event
//! - EVENT_O_GPT1BCAPTSEL : GPT 1B capture event
//! - EVENT_O_GPT2ACAPTSEL : GPT 2A capture event
//! - EVENT_O_GPT2BCAPTSEL : GPT 2B capture event
//! - EVENT_O_GPT3ACAPTSEL : GPT 3A capture event
//! - EVENT_O_GPT3BCAPTSEL : GPT 3B capture event
//! - EVENT_O_UDMACH9SSEL : uDMA channel 9 single request
//! - EVENT_O_UDMACH9BSEL : uDMA channel 9 burst request
//! - EVENT_O_UDMACH10SSEL : uDMA channel 10 single request
//! - EVENT_O_UDMACH10BSEL : uDMA channel 10 burst request
//! - EVENT_O_UDMACH11SSEL : uDMA channel 11 single request
//! - EVENT_O_UDMACH11BSEL : uDMA channel 11 burst request
//! - EVENT_O_UDMACH12SSEL : uDMA channel 12 single request
//! - EVENT_O_UDMACH12BSEL : uDMA channel 12 burst request
//! - EVENT_O_UDMACH14BSEL : uDMA channel 14 single request
//! - EVENT_O_AUXSEL0 : AUX
//! - EVENT_O_I2SSTMPSEL0 : I2S
//! - EVENT_O_FRZSEL0 : Freeze modules (some modules can freeze on CPU Halt)
//! \param ui32EventSource is the specific event that must be acted upon.
//! - Format: \ti_code{EVENT_[subscriber_name]_EV_[event_enum]} (see explanation above)
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
EventRegister(uint32_t ui32EventSubscriber, uint32_t ui32EventSource)
{
// Check the arguments.
ASSERT(( ui32EventSubscriber == EVENT_O_CPUIRQSEL30 ) ||
( ui32EventSubscriber == EVENT_O_RFCSEL9 ) ||
( ui32EventSubscriber == EVENT_O_GPT0ACAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT0BCAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT1ACAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT1BCAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT2ACAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT2BCAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT3ACAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_GPT3BCAPTSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH9SSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH9BSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH10SSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH10BSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH11SSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH11BSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH12SSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH12BSEL ) ||
( ui32EventSubscriber == EVENT_O_UDMACH14BSEL ) ||
( ui32EventSubscriber == EVENT_O_AUXSEL0 ) ||
( ui32EventSubscriber == EVENT_O_I2SSTMPSEL0 ) ||
( ui32EventSubscriber == EVENT_O_FRZSEL0 ) );
// Map the event source to the event subscriber
HWREG(EVENT_BASE + ui32EventSubscriber) = ui32EventSource;
}
//*****************************************************************************
//
//! \brief Sets software event.
//!
//! Setting a software event triggers the event if the value was 0 before.
//!
//! \note The software event must be cleared manually after the event has
//! triggered the event subscriber.
//!
//! \param ui32SwEvent is the software event number.
//! - 0 : SW Event 0
//! - 1 : SW Event 1
//! - 2 : SW Event 2
//! - 3 : SW Event 3
//!
//! \return None
//!
//! \sa \ref EventSwEventClear()
//
//*****************************************************************************
__STATIC_INLINE void
EventSwEventSet(uint32_t ui32SwEvent)
{
// Check the arguments.
ASSERT( ui32SwEvent <= 3 );
// Each software event is byte accessible
HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent) = 1;
}
//*****************************************************************************
//
//! \brief Clears software event.
//!
//! \param ui32SwEvent is the software event number.
//! - 0 : SW Event 0
//! - 1 : SW Event 1
//! - 2 : SW Event 2
//! - 3 : SW Event 3
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
EventSwEventClear(uint32_t ui32SwEvent)
{
// Check the arguments.
ASSERT( ui32SwEvent <= 3 );
// Each software event is byte accessible
HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent) = 0;
}
//*****************************************************************************
//
//! \brief Gets software event status.
//!
//! \param ui32SwEvent is the software event number.
//! - 0 : SW Event 0
//! - 1 : SW Event 1
//! - 2 : SW Event 2
//! - 3 : SW Event 3
//!
//! \return Returns current value of requested software event.
//! - 0 : Software event is de-asserted.
//! - 1 : Software event is asserted.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
EventSwEventGet(uint32_t ui32SwEvent)
{
// Check the arguments.
ASSERT( ui32SwEvent <= 3 );
// Each software event is byte accessible
return( HWREGB(EVENT_BASE + EVENT_O_SWEV + ui32SwEvent));
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __EVENT_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/event_doc.h
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/******************************************************************************
* Filename: event_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup event_api
//! @{
//! \section sec_event Introduction
//!
//! The event fabric consists of two event modules. One in the MCU power domain (MCU event fabric) and
//! the other in the AON power domain (AON event fabric). The MCU event fabric is one of the subscribers
//! to the AON event fabric. For more information on AON event fabric, see [AON event API](@ref aonevent_api).
//!
//! The MCU event fabric is a combinational router between event sources and event subscribers. Most
//! event subscribers have statically routed event sources but several event subscribers have
//! configurable event sources which is configured in the MCU event fabric through this API. Although
//! configurable only a subset of event sources are available to each of the configurable event subscribers.
//! This is explained in more details in the function @ref EventRegister() which does all the event routing
//! configuration.
//!
//! MCU event fabric also contains four software events which allow software to trigger certain event
//! subscribers. Each of the four software events is an independent event source which must be set and
//! cleared in the MCU event fabric through the functions:
//! - @ref EventSwEventSet()
//! - @ref EventSwEventClear()
//! - @ref EventSwEventGet()
//!
//! @}
third_party/ti/devices/cc26x0/driverlib/flash.c
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/******************************************************************************
* Filename: flash.c
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Driver for on chip Flash.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "../inc/hw_types.h"
#include "../inc/hw_ccfg.h"
#include "flash.h"
#include "rom.h"
#include "chipinfo.h"
//*****************************************************************************
//
// Handle support for DriverLib in ROM:
// This section will undo prototype renaming made in the header file
//
//*****************************************************************************
#if !defined(DOXYGEN)
#undef FlashPowerModeSet
#define FlashPowerModeSet NOROM_FlashPowerModeSet
#undef FlashPowerModeGet
#define FlashPowerModeGet NOROM_FlashPowerModeGet
#undef FlashProtectionSet
#define FlashProtectionSet NOROM_FlashProtectionSet
#undef FlashProtectionGet
#define FlashProtectionGet NOROM_FlashProtectionGet
#undef FlashProtectionSave
#define FlashProtectionSave NOROM_FlashProtectionSave
#undef FlashSectorErase
#define FlashSectorErase NOROM_FlashSectorErase
#undef FlashProgram
#define FlashProgram NOROM_FlashProgram
#undef FlashEfuseReadRow
#define FlashEfuseReadRow NOROM_FlashEfuseReadRow
#undef FlashDisableSectorsForWrite
#define FlashDisableSectorsForWrite NOROM_FlashDisableSectorsForWrite
#endif
//*****************************************************************************
//
// Defines for accesses to the security control in the customer configuration
// area in flash top sector.
//
//*****************************************************************************
#define CCFG_OFFSET_SECURITY CCFG_O_BL_CONFIG
#define CCFG_OFFSET_SECT_PROT CCFG_O_CCFG_PROT_31_0
#define CCFG_SIZE_SECURITY 0x00000014
#define CCFG_SIZE_SECT_PROT 0x00000004
//*****************************************************************************
//
// Default values for security control in customer configuration area in flash
// top sector.
//
//*****************************************************************************
const uint8_t g_pui8CcfgDefaultSec[] = {0xFF, 0xFF, 0xFF, 0xC5,
0xFF, 0xFF, 0xFF, 0xFF,
0xC5, 0xFF, 0xFF, 0xFF,
0xC5, 0xC5, 0xC5, 0xFF,
0xC5, 0xC5, 0xC5, 0xFF
};
typedef uint32_t (* FlashPrgPointer_t) (uint8_t *, uint32_t, uint32_t);
typedef uint32_t (* FlashSectorErasePointer_t) (uint32_t);
//*****************************************************************************
//
// Function prototypes for static functions
//
//*****************************************************************************
static void SetReadMode(void);
//*****************************************************************************
//
// Set power mode
//
//*****************************************************************************
void
FlashPowerModeSet(uint32_t ui32PowerMode, uint32_t ui32BankGracePeriod,
uint32_t ui32PumpGracePeriod)
{
// Check the arguments.
ASSERT(ui32PowerMode == FLASH_PWR_ACTIVE_MODE ||
ui32PowerMode == FLASH_PWR_OFF_MODE ||
ui32PowerMode == FLASH_PWR_DEEP_STDBY_MODE);
ASSERT(ui32BankGracePeriod <= 0xFF);
ASSERT(ui32PumpGracePeriod <= 0xFFFF);
switch(ui32PowerMode)
{
case FLASH_PWR_ACTIVE_MODE:
// Set bank power mode to ACTIVE.
HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) =
(HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &
~FLASH_FBFALLBACK_BANKPWR0_M) | FBFALLBACK_ACTIVE;
// Set charge pump power mode to ACTIVE mode.
HWREG(FLASH_BASE + FLASH_O_FPAC1) =
(HWREG(FLASH_BASE + FLASH_O_FPAC1) & ~FLASH_FPAC1_PUMPPWR_M) | (1 << FLASH_FPAC1_PUMPPWR_S);
break;
case FLASH_PWR_OFF_MODE:
// Set bank grace period.
HWREG(FLASH_BASE + FLASH_O_FBAC) =
(HWREG(FLASH_BASE + FLASH_O_FBAC) & (~FLASH_FBAC_BAGP_M)) |
((ui32BankGracePeriod << FLASH_FBAC_BAGP_S) & FLASH_FBAC_BAGP_M);
// Set pump grace period.
HWREG(FLASH_BASE + FLASH_O_FPAC2) =
(HWREG(FLASH_BASE + FLASH_O_FPAC2) & (~FLASH_FPAC2_PAGP_M)) |
((ui32PumpGracePeriod << FLASH_FPAC2_PAGP_S) & FLASH_FPAC2_PAGP_M);
// Set bank power mode to SLEEP.
HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &= ~FLASH_FBFALLBACK_BANKPWR0_M;
// Set charge pump power mode to SLEEP mode.
HWREG(FLASH_BASE + FLASH_O_FPAC1) &= ~FLASH_FPAC1_PUMPPWR_M;
break;
case FLASH_PWR_DEEP_STDBY_MODE:
// Set bank grace period.
HWREG(FLASH_BASE + FLASH_O_FBAC) =
(HWREG(FLASH_BASE + FLASH_O_FBAC) & (~FLASH_FBAC_BAGP_M)) |
((ui32BankGracePeriod << FLASH_FBAC_BAGP_S) & FLASH_FBAC_BAGP_M);
// Set pump grace period.
HWREG(FLASH_BASE + FLASH_O_FPAC2) =
(HWREG(FLASH_BASE + FLASH_O_FPAC2) & (~FLASH_FPAC2_PAGP_M)) |
((ui32PumpGracePeriod << FLASH_FPAC2_PAGP_S) & FLASH_FPAC2_PAGP_M);
// Set bank power mode to DEEP STANDBY mode.
HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) =
(HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &
~FLASH_FBFALLBACK_BANKPWR0_M) | FBFALLBACK_DEEP_STDBY;
// Set charge pump power mode to STANDBY mode.
HWREG(FLASH_BASE + FLASH_O_FPAC1) |= FLASH_FPAC1_PUMPPWR_M;
break;
}
}
//*****************************************************************************
//
// Get current configured power mode
//
//*****************************************************************************
uint32_t
FlashPowerModeGet(void)
{
uint32_t ui32PowerMode;
uint32_t ui32BankPwrMode;
ui32BankPwrMode = HWREG(FLASH_BASE + FLASH_O_FBFALLBACK) &
FLASH_FBFALLBACK_BANKPWR0_M;
if(ui32BankPwrMode == FBFALLBACK_SLEEP)
{
ui32PowerMode = FLASH_PWR_OFF_MODE;
}
else if(ui32BankPwrMode == FBFALLBACK_DEEP_STDBY)
{
ui32PowerMode = FLASH_PWR_DEEP_STDBY_MODE;
}
else
{
ui32PowerMode = FLASH_PWR_ACTIVE_MODE;
}
// Return power mode.
return(ui32PowerMode);
}
//*****************************************************************************
//
// Set sector protection
//
//*****************************************************************************
void
FlashProtectionSet(uint32_t ui32SectorAddress, uint32_t ui32ProtectMode)
{
uint32_t ui32SectorNumber;
// Check the arguments.
ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
FlashSectorSizeGet()));
ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
if(ui32ProtectMode == FLASH_WRITE_PROTECT)
{
ui32SectorNumber = (ui32SectorAddress - FLASHMEM_BASE) /
FlashSectorSizeGet();
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
if(ui32SectorNumber <= 31)
{
HWREG(FLASH_BASE + FLASH_O_FSM_BSLE0) |= (1 << ui32SectorNumber);
HWREG(FLASH_BASE + FLASH_O_FSM_BSLP0) |= (1 << ui32SectorNumber);
}
else if(ui32SectorNumber <= 63)
{
HWREG(FLASH_BASE + FLASH_O_FSM_BSLE1) |=
(1 << (ui32SectorNumber & 0x1F));
HWREG(FLASH_BASE + FLASH_O_FSM_BSLP1) |=
(1 << (ui32SectorNumber & 0x1F));
}
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
}
//*****************************************************************************
//
// Get sector protection
//
//*****************************************************************************
uint32_t
FlashProtectionGet(uint32_t ui32SectorAddress)
{
uint32_t ui32SectorProtect;
uint32_t ui32SectorNumber;
// Check the arguments.
ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
FlashSectorSizeGet()));
ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
ui32SectorProtect = FLASH_NO_PROTECT;
ui32SectorNumber = (ui32SectorAddress - FLASHMEM_BASE) / FlashSectorSizeGet();
if(ui32SectorNumber <= 31)
{
if((HWREG(FLASH_BASE + FLASH_O_FSM_BSLE0) & (1 << ui32SectorNumber)) &&
(HWREG(FLASH_BASE + FLASH_O_FSM_BSLP0) & (1 << ui32SectorNumber)))
{
ui32SectorProtect = FLASH_WRITE_PROTECT;
}
}
else if(ui32SectorNumber <= 63)
{
if((HWREG(FLASH_BASE + FLASH_O_FSM_BSLE1) &
(1 << (ui32SectorNumber & 0x1F))) &&
(HWREG(FLASH_BASE + FLASH_O_FSM_BSLP1) &
(1 << (ui32SectorNumber & 0x1F))))
{
ui32SectorProtect = FLASH_WRITE_PROTECT;
}
}
return(ui32SectorProtect);
}
//*****************************************************************************
//
// Save sector protection to make it permanent
//
//*****************************************************************************
uint32_t
FlashProtectionSave(uint32_t ui32SectorAddress)
{
uint32_t ui32ErrorReturn;
uint32_t ui32SectorNumber;
uint32_t ui32CcfgSectorAddr;
uint32_t ui32ProgBuf;
ui32ErrorReturn = FAPI_STATUS_SUCCESS;
// Check the arguments.
ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
FlashSectorSizeGet()));
ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
if(FlashProtectionGet(ui32SectorAddress) == FLASH_WRITE_PROTECT)
{
// Find sector number for specified sector.
ui32SectorNumber = (ui32SectorAddress - FLASHMEM_BASE) / FlashSectorSizeGet();
ui32CcfgSectorAddr = FLASHMEM_BASE + FlashSizeGet() - FlashSectorSizeGet();
// Adjust CCFG address to the 32-bit CCFG word holding the
// protect-bit for the specified sector.
ui32CcfgSectorAddr += (((ui32SectorNumber >> 5) * 4) + CCFG_OFFSET_SECT_PROT);
// Find value to program by setting the protect-bit which
// corresponds to specified sector number, to 0.
// Leave other protect-bits unchanged.
ui32ProgBuf = (~(1 << (ui32SectorNumber & 0x1F))) &
*(uint32_t *)ui32CcfgSectorAddr;
ui32ErrorReturn = FlashProgram((uint8_t*)&ui32ProgBuf, ui32CcfgSectorAddr,
CCFG_SIZE_SECT_PROT);
}
// Return status.
return(ui32ErrorReturn);
}
//*****************************************************************************
//
// Erase a flash sector
//
//*****************************************************************************
uint32_t
FlashSectorErase(uint32_t ui32SectorAddress)
{
uint32_t ui32ErrorReturn;
FlashSectorErasePointer_t FuncPointer;
// Check the arguments.
ASSERT(ui32SectorAddress <= (FLASHMEM_BASE + FlashSizeGet() -
FlashSectorSizeGet()));
ASSERT((ui32SectorAddress & (FlashSectorSizeGet() - 1)) == 00);
// Call ROM function
FuncPointer = (uint32_t (*)(uint32_t)) (ROM_API_FLASH_TABLE[5]);
ui32ErrorReturn = FuncPointer(ui32SectorAddress);
// Enable standby in flash bank since ROM function might have disabled it
HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
// Return status of operation.
return(ui32ErrorReturn);
}
//*****************************************************************************
//
// Programs unprotected main bank flash sectors
//
//*****************************************************************************
uint32_t
FlashProgram(uint8_t *pui8DataBuffer, uint32_t ui32Address, uint32_t ui32Count)
{
uint32_t ui32ErrorReturn;
FlashPrgPointer_t FuncPointer;
// Check the arguments.
ASSERT((ui32Address + ui32Count) <= (FLASHMEM_BASE + FlashSizeGet()));
// Call ROM function
FuncPointer = (uint32_t (*)(uint8_t *, uint32_t, uint32_t)) (ROM_API_FLASH_TABLE[6]);
ui32ErrorReturn = FuncPointer( pui8DataBuffer, ui32Address, ui32Count);
// Enable standby in flash bank since ROM function might have disabled it
HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
// Return status of operation.
return(ui32ErrorReturn);
}
//*****************************************************************************
//
// Reads efuse data from specified row
//
//*****************************************************************************
bool
FlashEfuseReadRow(uint32_t *pui32EfuseData, uint32_t ui32RowAddress)
{
bool bStatus;
// Make sure the clock for the efuse is enabled
HWREG(FLASH_BASE + FLASH_O_CFG) &= ~FLASH_CFG_DIS_EFUSECLK;
// Set timing for EFUSE read operations.
HWREG(FLASH_BASE + FLASH_O_EFUSEREAD) |= ((5 << FLASH_EFUSEREAD_READCLOCK_S) &
FLASH_EFUSEREAD_READCLOCK_M);
// Clear status register.
HWREG(FLASH_BASE + FLASH_O_EFUSEERROR) = 0;
// Select the FuseROM block 0.
HWREG(FLASH_BASE + FLASH_O_EFUSEADDR) = 0x00000000;
// Start the read operation.
HWREG(FLASH_BASE + FLASH_O_EFUSE) =
(DUMPWORD_INSTR << FLASH_EFUSE_INSTRUCTION_S) |
(ui32RowAddress & FLASH_EFUSE_DUMPWORD_M);
// Wait for operation to finish.
while(!(HWREG(FLASH_BASE + FLASH_O_EFUSEERROR) & FLASH_EFUSEERROR_DONE))
{
}
// Check if error reported.
if(HWREG(FLASH_BASE + FLASH_O_EFUSEERROR) & FLASH_EFUSEERROR_CODE_M)
{
// Set error status.
bStatus = 1;
// Clear data.
*pui32EfuseData = 0;
}
else
{
// Set ok status.
bStatus = 0;
// No error. Get data from data register.
*pui32EfuseData = HWREG(FLASH_BASE + FLASH_O_DATALOWER);
}
// Disable the efuse clock to conserve power
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_EFUSECLK;
// Return the data.
return(bStatus);
}
//*****************************************************************************
//
// Disables all sectors for erase and programming on the active bank
//
//*****************************************************************************
void
FlashDisableSectorsForWrite(void)
{
// Configure flash back to read mode
SetReadMode();
// Disable Level 1 Protection.
HWREG(FLASH_BASE + FLASH_O_FBPROT) = FLASH_FBPROT_PROTL1DIS;
// Disable all sectors for erase and programming.
HWREG(FLASH_BASE + FLASH_O_FBSE) = 0x0000;
// Enable Level 1 Protection.
HWREG(FLASH_BASE + FLASH_O_FBPROT) = 0;
// Protect sectors from sector erase.
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR1) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_SECTOR2) = 0xFFFFFFFF;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
//*****************************************************************************
//
//! \internal
//! Used to set flash in read mode.
//!
//! Flash is configured with values loaded from OTP dependent on the current
//! regulator mode.
//!
//! \return None.
//
//*****************************************************************************
static void
SetReadMode(void)
{
uint32_t ui32TrimValue;
uint32_t ui32Value;
// Configure the STANDBY_MODE_SEL, STANDBY_PW_SEL, DIS_STANDBY, DIS_IDLE,
// VIN_AT_X and VIN_BY_PASS for read mode
if(HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_PWRCTL) &
AON_SYSCTL_PWRCTL_EXT_REG_MODE)
{
// Select trim values for external regulator mode:
// Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 7)
// COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 6:5)
// Must be done while the register bit field CONFIG.DIS_STANDBY = 1
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
ui32TrimValue =
HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
ui32Value = ((ui32TrimValue &
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_EXT_RD_S) <<
FLASH_CFG_STANDBY_MODE_SEL_S;
ui32Value |= ((ui32TrimValue &
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_EXT_RD_S) <<
FLASH_CFG_STANDBY_PW_SEL_S;
// Configure DIS_STANDBY (OTP offset 0x308 bit 4).
// Configure DIS_IDLE (OTP offset 0x308 bit 3).
ui32Value |= ((ui32TrimValue &
(FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_EXT_RD_M |
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_EXT_RD_M)) >>
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_EXT_RD_S) <<
FLASH_CFG_DIS_IDLE_S;
HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
~(FLASH_CFG_STANDBY_MODE_SEL_M |
FLASH_CFG_STANDBY_PW_SEL_M |
FLASH_CFG_DIS_STANDBY_M |
FLASH_CFG_DIS_IDLE_M)) | ui32Value;
// Check if sample and hold functionality is disabled.
if(HWREG(FLASH_BASE + FLASH_O_CFG) & FLASH_CFG_DIS_IDLE)
{
// Wait for disabled sample and hold functionality to be stable.
while(!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
{
}
}
// Configure VIN_AT_X (OTP offset 0x308 bits 2:0)
ui32Value = ((ui32TrimValue &
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_EXT_RD_S) <<
FLASH_FSEQPMP_VIN_AT_X_S;
// Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
// If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
// VIN_BY_PASS should be 1
if(((ui32Value & FLASH_FSEQPMP_VIN_AT_X_M) >>
FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
{
ui32Value |= FLASH_FSEQPMP_VIN_BY_PASS;
}
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~(FLASH_FSEQPMP_VIN_BY_PASS_M |
FLASH_FSEQPMP_VIN_AT_X_M)) | ui32Value;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
}
else
{
// Select trim values for internal regulator mode:
// Configure STANDBY_MODE_SEL (OTP offset 0x308 bit 15)
// COnfigure STANDBY_PW_SEL (OTP offset 0x308 bit 14:13)
// Must be done while the register bit field CONFIG.DIS_STANDBY = 1
HWREG(FLASH_BASE + FLASH_O_CFG) |= FLASH_CFG_DIS_STANDBY;
ui32TrimValue =
HWREG(FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_FLASH_OTP_DATA4);
ui32Value = ((ui32TrimValue &
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_MODE_SEL_INT_RD_S) <<
FLASH_CFG_STANDBY_MODE_SEL_S;
ui32Value |= ((ui32TrimValue &
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_STANDBY_PW_SEL_INT_RD_S) <<
FLASH_CFG_STANDBY_PW_SEL_S;
// Configure DIS_STANDBY (OTP offset 0x308 bit 12).
// Configure DIS_IDLE (OTP offset 0x308 bit 11).
ui32Value |= ((ui32TrimValue &
(FCFG1_FLASH_OTP_DATA4_DIS_STANDBY_INT_RD_M |
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_INT_RD_M)) >>
FCFG1_FLASH_OTP_DATA4_DIS_IDLE_INT_RD_S) <<
FLASH_CFG_DIS_IDLE_S;
HWREG(FLASH_BASE + FLASH_O_CFG) = (HWREG(FLASH_BASE + FLASH_O_CFG) &
~(FLASH_CFG_STANDBY_MODE_SEL_M |
FLASH_CFG_STANDBY_PW_SEL_M |
FLASH_CFG_DIS_STANDBY_M |
FLASH_CFG_DIS_IDLE_M)) | ui32Value;
// Check if sample and hold functionality is disabled.
if(HWREG(FLASH_BASE + FLASH_O_CFG) & FLASH_CFG_DIS_IDLE)
{
// Wait for disabled sample and hold functionality to be stable.
while(!(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_SAMHOLD_DIS))
{
}
}
// Configure VIN_AT_X (OTP offset 0x308 bits 10:8)
ui32Value = (((ui32TrimValue &
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_RD_M) >>
FCFG1_FLASH_OTP_DATA4_VIN_AT_X_INT_RD_S) <<
FLASH_FSEQPMP_VIN_AT_X_S);
// Configure VIN_BY_PASS which is dependent on the VIN_AT_X value.
// If VIN_AT_X = 7 then VIN_BY_PASS should be 0 otherwise
// VIN_BY_PASS should be 1
if(((ui32Value & FLASH_FSEQPMP_VIN_AT_X_M) >>
FLASH_FSEQPMP_VIN_AT_X_S) != 0x7)
{
ui32Value |= FLASH_FSEQPMP_VIN_BY_PASS;
}
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0xAAAA;
HWREG(FLASH_BASE + FLASH_O_FSEQPMP) =
(HWREG(FLASH_BASE + FLASH_O_FSEQPMP) &
~(FLASH_FSEQPMP_VIN_BY_PASS_M |
FLASH_FSEQPMP_VIN_AT_X_M)) | ui32Value;
HWREG(FLASH_BASE + FLASH_O_FLOCK) = 0x55AA;
}
}
//*****************************************************************************
//
// HAPI Flash program function
//
//*****************************************************************************
uint32_t
MemBusWrkAroundHapiProgramFlash(uint8_t *pui8DataBuffer, uint32_t ui32Address,
uint32_t ui32Count)
{
uint32_t ui32ErrorReturn;
FlashPrgPointer_t FuncPointer;
uint32_t ui32RomAddr = HWREG(ROM_HAPI_TABLE_ADDR + (5 * 4));
// Call ROM function
FuncPointer = (uint32_t (*)(uint8_t *, uint32_t, uint32_t)) (ui32RomAddr);
ui32ErrorReturn = FuncPointer( pui8DataBuffer, ui32Address, ui32Count);
// Enable standby in flash bank since ROM function might have disabled it
HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
// Return status of operation.
return(ui32ErrorReturn);
}
//*****************************************************************************
//
// HAPI Flash sector erase function
//
//*****************************************************************************
uint32_t
MemBusWrkAroundHapiEraseSector(uint32_t ui32Address)
{
uint32_t ui32ErrorReturn;
FlashSectorErasePointer_t FuncPointer;
uint32_t ui32RomAddr = HWREG(ROM_HAPI_TABLE_ADDR + (3 * 4));
// Call ROM function
FuncPointer = (uint32_t (*)(uint32_t)) (ui32RomAddr);
ui32ErrorReturn = FuncPointer(ui32Address);
// Enable standby in flash bank since ROM function might have disabled it
HWREGBITW(FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
// Return status of operation.
return(ui32ErrorReturn);
}
third_party/ti/devices/cc26x0/driverlib/flash.h
Vendored
-808
View File
@@ -1,808 +0,0 @@
/******************************************************************************
* Filename: flash.h
* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
* Revision: 49096
*
* Description: Defines and prototypes for the Flash driver.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup system_control_group
//! @{
//! \addtogroup flash_api
//! @{
//
//*****************************************************************************
#ifndef __FLASH_H__
#define __FLASH_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdbool.h>
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_flash.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_ints.h"
#include "../inc/hw_aon_sysctl.h"
#include "../inc/hw_fcfg1.h"
#include "interrupt.h"
#include "debug.h"
//*****************************************************************************
//
// Support for DriverLib in ROM:
// This section renames all functions that are not "static inline", so that
// calling these functions will default to implementation in flash. At the end
// of this file a second renaming will change the defaults to implementation in
// ROM for available functions.
//
// To force use of the implementation in flash, e.g. for debugging:
// - Globally: Define DRIVERLIB_NOROM at project level
// - Per function: Use prefix "NOROM_" when calling the function
//
//*****************************************************************************
#if !defined(DOXYGEN)
#define FlashPowerModeSet NOROM_FlashPowerModeSet
#define FlashPowerModeGet NOROM_FlashPowerModeGet
#define FlashProtectionSet NOROM_FlashProtectionSet
#define FlashProtectionGet NOROM_FlashProtectionGet
#define FlashProtectionSave NOROM_FlashProtectionSave
#define FlashSectorErase NOROM_FlashSectorErase
#define FlashProgram NOROM_FlashProgram
#define FlashEfuseReadRow NOROM_FlashEfuseReadRow
#define FlashDisableSectorsForWrite NOROM_FlashDisableSectorsForWrite
#endif
//*****************************************************************************
//
// Values that can be returned from the API functions
//
//*****************************************************************************
#define FAPI_STATUS_SUCCESS 0x00000000 // Function completed successfully
#define FAPI_STATUS_FSM_BUSY 0x00000001 // FSM is Busy
#define FAPI_STATUS_FSM_READY 0x00000002 // FSM is Ready
#define FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH \
0x00000003 // Incorrect parameter value
#define FAPI_STATUS_FSM_ERROR 0x00000004 // Operation failed
//*****************************************************************************
//
// Values passed to FlashIntEnable(), FlashIntDisable() and FlashIntClear() and
// returned from FlashIntStatus().
//
//*****************************************************************************
#define FLASH_INT_FSM_DONE 0x00400000 // FSM Done Interrupt Mask
#define FLASH_INT_RV 0x00010000 // Read Verify error Interrupt Mask
//*****************************************************************************
//
// Values passed to FlashSetPowerMode() and returned from FlashGetPowerMode().
//
//*****************************************************************************
#define FLASH_PWR_ACTIVE_MODE 0x00000000
#define FLASH_PWR_OFF_MODE 0x00000001
#define FLASH_PWR_DEEP_STDBY_MODE \
0x00000002
//*****************************************************************************
//
// Values passed to FlashSetProtection() and returned from FlashGetProtection().
//
//*****************************************************************************
#define FLASH_NO_PROTECT 0x00000000 // Sector not protected
#define FLASH_WRITE_PROTECT 0x00000001 // Sector erase and program
// protected
//*****************************************************************************
//
// Define used by the flash programming and erase functions
//
//*****************************************************************************
#define ADDR_OFFSET (0x1F800000 - FLASHMEM_BASE)
//*****************************************************************************
//
// Define used for access to factory configuration area.
//
//*****************************************************************************
#define FCFG1_OFFSET 0x1000
//*****************************************************************************
//
// Define for the clock frequency input to the flash module in number of MHz
//
//*****************************************************************************
#define FLASH_MODULE_CLK_FREQ 48
//*****************************************************************************
//
//! \brief Defined values for Flash State Machine commands
//
//*****************************************************************************
typedef enum
{
FAPI_PROGRAM_DATA = 0x0002, //!< Program data.
FAPI_ERASE_SECTOR = 0x0006, //!< Erase sector.
FAPI_ERASE_BANK = 0x0008, //!< Erase bank.
FAPI_VALIDATE_SECTOR = 0x000E, //!< Validate sector.
FAPI_CLEAR_STATUS = 0x0010, //!< Clear status.
FAPI_PROGRAM_RESUME = 0x0014, //!< Program resume.
FAPI_ERASE_RESUME = 0x0016, //!< Erase resume.
FAPI_CLEAR_MORE = 0x0018, //!< Clear more.
FAPI_PROGRAM_SECTOR = 0x0020, //!< Program sector.
FAPI_ERASE_OTP = 0x0030 //!< Erase OTP.
} tFlashStateCommandsType;
//*****************************************************************************
//
// Defines for values written to the FLASH_O_FSM_WR_ENA register
//
//*****************************************************************************
#define FSM_REG_WRT_ENABLE 5
#define FSM_REG_WRT_DISABLE 2
//*****************************************************************************
//
// Defines for the bank power mode field the FLASH_O_FBFALLBACK register
//
//*****************************************************************************
#define FBFALLBACK_SLEEP 0
#define FBFALLBACK_DEEP_STDBY 1
#define FBFALLBACK_ACTIVE 3
//*****************************************************************************
//
// Defines for the bank grace period and pump grace period
//
//*****************************************************************************
#define FLASH_BAGP 0x14
#define FLASH_PAGP 0x14
//*****************************************************************************
//
// Defines used by the FlashProgramPattern() function
//
//*****************************************************************************
#define PATTERN_BITS 0x20 // No of bits in data pattern to program
//*****************************************************************************
//
// Defines for the FW flag bits in the FLASH_O_FWFLAG register
//
//*****************************************************************************
#define FW_WRT_TRIMMED 0x00000001
//*****************************************************************************
//
// Defines used by the flash programming functions
//
//*****************************************************************************
typedef volatile uint8_t tFwpWriteByte;
#define FWPWRITE_BYTE_ADDRESS ((tFwpWriteByte *)((FLASH_BASE + FLASH_O_FWPWRITE0)))
//*****************************************************************************
//
// Define for efuse instruction
//
//*****************************************************************************
#define DUMPWORD_INSTR 0x04
//*****************************************************************************
//
// Define for FSM command execution
//
//*****************************************************************************
#define FLASH_CMD_EXEC 0x15
//*****************************************************************************
//
//! \brief Get size of a flash sector in number of bytes.
//!
//! This function will return the size of a flash sector in number of bytes.
//!
//! \return Returns size of a flash sector in number of bytes.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
FlashSectorSizeGet(void)
{
uint32_t ui32SectorSizeInKbyte;
ui32SectorSizeInKbyte = (HWREG(FLASH_BASE + FLASH_O_FCFG_B0_SSIZE0) &
FLASH_FCFG_B0_SSIZE0_B0_SECT_SIZE_M) >>
FLASH_FCFG_B0_SSIZE0_B0_SECT_SIZE_S;
// Return flash sector size in number of bytes.
return(ui32SectorSizeInKbyte * 1024);
}
//*****************************************************************************
//
//! \brief Get the size of the flash.
//!
//! This function returns the size of the flash main bank in number of bytes.
//!
//! \return Returns the flash size in number of bytes.
//
//*****************************************************************************
__STATIC_INLINE uint32_t
FlashSizeGet(void)
{
uint32_t ui32NoOfSectors;
// Get number of flash sectors
ui32NoOfSectors = (HWREG(FLASH_BASE + FLASH_O_FLASH_SIZE) &
FLASH_FLASH_SIZE_SECTORS_M) >>
FLASH_FLASH_SIZE_SECTORS_S;
// Return flash size in number of bytes
return(ui32NoOfSectors * FlashSectorSizeGet());
}
//*****************************************************************************
//
//! \brief Set power mode.
//!
//! This function will set the specified power mode.
//!
//! Any access to the bank causes a reload of the specified bank grace period
//! input value into the bank down counter. After the last access to the
//! flash bank, the down counter delays from 0 to 255 prescaled HCLK clock
//! cycles before putting the bank into one of the fallback power modes as
//! determined by \c ui32PowerMode. This value must be greater than 1 when the
//! fallback mode is not \ref FLASH_PWR_ACTIVE_MODE.
//!
//! Note: The prescaled clock used for the down counter is a clock divided by
//! 16 from input HCLK. The \c ui32BankGracePeriod parameter is ignored if
//! \c ui32PowerMode is equal to \ref FLASH_PWR_ACTIVE_MODE.
//! Any access to flash memory causes the pump grace period down counter to
//! reload with value of \c ui32PumpGracePeriod. After the bank has gone to sleep,
//! the down counter delays this number of prescaled HCLK clock cycles before
//! entering one of the charge pump fallback power modes as determined by
//! \c ui32PowerMode. The prescaled clock used for the pump grace period down
//! counter is a clock divided by 16 from input HCLK. This parameter is ignored
//! if \c ui32PowerMode is equal to \ref FLASH_PWR_ACTIVE_MODE.
//!
//! Changing the power mode of the flash module must be a part within a
//! device power mode transition requiring configuration of multiple modules.
//! Refer to documents describing the device power modes.
//!
//! \param ui32PowerMode is the wanted power mode.
//! The defined flash power modes are:
//! - \ref FLASH_PWR_ACTIVE_MODE
//! - \ref FLASH_PWR_OFF_MODE
//! - \ref FLASH_PWR_DEEP_STDBY_MODE
//! \param ui32BankGracePeriod is the starting count value for the bank grace
//! period down counter.
//! \param ui32PumpGracePeriod is the starting count value for the pump grace
//! period down counter.
//!
//! \return None
//
//*****************************************************************************
extern void FlashPowerModeSet(uint32_t ui32PowerMode,
uint32_t ui32BankGracePeriod,
uint32_t ui32PumpGracePeriod);
//*****************************************************************************
//
//! \brief Get current configured power mode.
//!
//! This function will return the current configured power mode.
//!
//! \return Returns the current configured power mode.
//! The defined power modes are:
//! - \ref FLASH_PWR_ACTIVE_MODE
//! - \ref FLASH_PWR_OFF_MODE
//! - \ref FLASH_PWR_DEEP_STDBY_MODE
//
//*****************************************************************************
extern uint32_t FlashPowerModeGet(void);
//*****************************************************************************
//
//! \brief Set sector protection.
//!
//! This function will set the specified protection on specified flash bank
//! sector. A sector can either have no protection or have write protection
//! which guards for both program and erase of that sector.
//! Sector protection can only be changed from \ref FLASH_NO_PROTECT to
//! \ref FLASH_WRITE_PROTECT! After write protecting a sector this sector can
//! only be set back to unprotected by a device reset.
//!
//! \param ui32SectorAddress is the start address of the sector to protect.
//! \param ui32ProtectMode is the enumerated sector protection mode.
//! - \ref FLASH_NO_PROTECT
//! - \ref FLASH_WRITE_PROTECT
//!
//! \return None
//
//*****************************************************************************
extern void FlashProtectionSet(uint32_t ui32SectorAddress,
uint32_t ui32ProtectMode);
//*****************************************************************************
//
//! \brief Get sector protection.
//!
//! This return the protection mode for the specified flash bank sector.
//!
//! \param ui32SectorAddress is the start address of the desired sector.
//!
//! \return Returns the sector protection:
//! - \ref FLASH_NO_PROTECT
//! - \ref FLASH_WRITE_PROTECT
//
//*****************************************************************************
extern uint32_t FlashProtectionGet(uint32_t ui32SectorAddress);
//*****************************************************************************
//
//! \brief Save sector protection to make it permanent.
//!
//! This function will save the current protection mode for the specified
//! flash bank sector.
//!
//! This function must only be executed from ROM or SRAM.
//!
//! \note A write protected sector will become permanent write
//! protected!! A device reset will not change the write protection!
//!
//! \param ui32SectorAddress is the start address of the sector to be protected.
//!
//! \return Returns the status of the sector protection:
//! - \ref FAPI_STATUS_SUCCESS : Success.
//! - \ref FAPI_STATUS_FSM_ERROR : An erase error is encountered.
//
//*****************************************************************************
extern uint32_t FlashProtectionSave(uint32_t ui32SectorAddress);
//*****************************************************************************
//
//! \brief Checks if the Flash state machine has detected an error.
//!
//! This function returns the status of the Flash State Machine indicating if
//! an error is detected or not. Primary use is to check if an Erase or
//! Program operation has failed.
//!
//! \note Please note that code can not execute in flash while any part of the flash
//! is being programmed or erased. This function must be called from ROM or
//! SRAM while any part of the flash is being programmed or erased.
//!
//! \return Returns status of Flash state machine:
//! - \ref FAPI_STATUS_FSM_ERROR
//! - \ref FAPI_STATUS_SUCCESS
//
//*****************************************************************************
__STATIC_INLINE uint32_t
FlashCheckFsmForError(void)
{
if(HWREG(FLASH_BASE + FLASH_O_FMSTAT) & FLASH_FMSTAT_CSTAT)
{
return(FAPI_STATUS_FSM_ERROR);
}
else
{
return(FAPI_STATUS_SUCCESS);
}
}
//*****************************************************************************
//
//! \brief Checks if the Flash state machine is ready.
//!
//! This function returns the status of the Flash State Machine indicating if
//! it is ready to accept a new command or not. Primary use is to check if an
//! Erase or Program operation has finished.
//!
//! \note Please note that code can not execute in flash while any part of the flash
//! is being programmed or erased. This function must be called from ROM or
//! SRAMh while any part of the flash is being programmed or erased.
//!
//! \return Returns readiness status of Flash state machine:
//! - \ref FAPI_STATUS_FSM_READY
//! - \ref FAPI_STATUS_FSM_BUSY
//
//*****************************************************************************
__STATIC_INLINE uint32_t
FlashCheckFsmForReady(void)
{
if(HWREG(FLASH_BASE + FLASH_O_STAT) & FLASH_STAT_BUSY)
{
return(FAPI_STATUS_FSM_BUSY);
}
else
{
return(FAPI_STATUS_FSM_READY);
}
}
//*****************************************************************************
//
//! \brief Registers an interrupt handler for the flash interrupt in the dynamic interrupt table.
//!
//! \note Only use this function if you want to use the dynamic vector table (in SRAM)!
//!
//! This function registers a function as the interrupt handler for a specific
//! interrupt and enables the corresponding interrupt in the interrupt controller.
//!
//! Specific FLASH interrupts must be enabled via \ref FlashIntEnable(). It is the
//! interrupt handler's responsibility to clear the interrupt source.
//!
//! \param pfnHandler is a pointer to the function to be called when the flash
//! interrupt occurs.
//!
//! \return None
//!
//! \sa \ref IntRegister() for important information about registering interrupt
//! handlers.
//
//*****************************************************************************
__STATIC_INLINE void
FlashIntRegister(void (*pfnHandler)(void))
{
// Register the interrupt handler.
IntRegister(INT_FLASH, pfnHandler);
// Enable the flash interrupt.
IntEnable(INT_FLASH);
}
//*****************************************************************************
//
//! \brief Unregisters the interrupt handler for the flash interrupt in the dynamic interrupt table.
//!
//! This function does the actual unregistering of the interrupt handler. It
//! clears the handler to be called when a FLASH interrupt occurs. This
//! function also masks off the interrupt in the interrupt controller so that
//! the interrupt handler no longer is called.
//!
//! \return None
//!
//! \sa \ref IntRegister() for important information about registering interrupt
//! handlers.
//
//*****************************************************************************
__STATIC_INLINE void
FlashIntUnregister(void)
{
// Disable the interrupts.
IntDisable(INT_FLASH);
// Unregister the interrupt handler.
IntUnregister(INT_FLASH);
}
//*****************************************************************************
//
//! \brief Enables flash controller interrupt sources.
//!
//! This function enables the flash controller interrupt sources.
//!
//! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
//! The parameter is the bitwise OR of any of the following:
//! - \ref FLASH_INT_FSM_DONE : FSM Done interrupt.
//! - \ref FLASH_INT_RV : Read verify error interrupt.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
FlashIntEnable(uint32_t ui32IntFlags)
{
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) |= ui32IntFlags;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
//*****************************************************************************
//
//! \brief Disables individual flash controller interrupt sources.
//!
//! This function disables the flash controller interrupt sources.
//!
//! \param ui32IntFlags is the bit mask of the interrupt sources to be disabled.
//! The parameter is the bitwise OR of any of the following:
//! - \ref FLASH_INT_FSM_DONE : FSM Done interrupt.
//! - \ref FLASH_INT_RV : Read verify error interrupt.
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
FlashIntDisable(uint32_t ui32IntFlags)
{
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_ENABLE;
HWREG(FLASH_BASE + FLASH_O_FSM_ST_MACHINE) &= ~ui32IntFlags;
HWREG(FLASH_BASE + FLASH_O_FSM_WR_ENA) = FSM_REG_WRT_DISABLE;
}
//*****************************************************************************
//
//! \brief Gets the current interrupt status.
//!
//! This function returns the interrupt status for the Flash.
//!
//! \return Returns the current interrupt status as values described in
//! \ref FlashIntEnable().
//
//*****************************************************************************
__STATIC_INLINE uint32_t
FlashIntStatus(void)
{
uint32_t ui32IntFlags;
ui32IntFlags = 0;
// Check if FSM_DONE interrupt status is set.
if(HWREG(FLASH_BASE + FLASH_O_FEDACSTAT) & FLASH_FEDACSTAT_FSM_DONE)
{
ui32IntFlags = FLASH_INT_FSM_DONE;
}
// Check if RVF_INT interrupt status is set.
if(HWREG(FLASH_BASE + FLASH_O_FEDACSTAT) & FLASH_FEDACSTAT_RVF_INT)
{
ui32IntFlags |= FLASH_INT_RV;
}
return(ui32IntFlags);
}
//*****************************************************************************
//
//! \brief Clears flash controller interrupt source.
//!
//! The flash controller interrupt source is cleared, so that it no longer
//! asserts. This must be done in the interrupt handler to keep it from being
//! called again immediately upon exit.
//!
//! \note Due to write buffers and synchronizers in the system it may take several
//! clock cycles from a register write clearing an event in a module and until the
//! event is actually cleared in the NVIC of the system CPU. It is recommended to
//! clear the event source early in the interrupt service routine (ISR) to allow
//! the event clear to propagate to the NVIC before returning from the ISR.
//! At the same time, an early event clear allows new events of the same type to be
//! pended instead of ignored if the event is cleared later in the ISR.
//! It is the responsibility of the programmer to make sure that enough time has passed
//! before returning from the ISR to avoid false re-triggering of the cleared event.
//! A simple, although not necessarily optimal, way of clearing an event before
//! returning from the ISR is:
//! -# Write to clear event (interrupt source). (buffered write)
//! -# Dummy read from the event source module. (making sure the write has propagated)
//! -# Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
//!
//! \param ui32IntFlags is the bit mask of the interrupt sources to be cleared.
//! Can be any of:
//! - \ref FLASH_INT_FSM_DONE
//! - \ref FLASH_INT_RV
//!
//! \return None
//
//*****************************************************************************
__STATIC_INLINE void
FlashIntClear(uint32_t ui32IntFlags)
{
uint32_t ui32TempVal;
ui32TempVal = 0;
if(ui32IntFlags & FLASH_INT_FSM_DONE)
{
ui32TempVal = FLASH_FEDACSTAT_FSM_DONE;
}
if(ui32IntFlags & FLASH_INT_RV)
{
ui32TempVal |= FLASH_FEDACSTAT_RVF_INT;
}
// Clear the flash interrupt source.
HWREG(FLASH_BASE + FLASH_O_FEDACSTAT) = ui32TempVal;
}
//*****************************************************************************
//
//! \brief Erase a flash sector.
//!
//! This function will erase the specified flash sector. The function will
//! not return until the flash sector has been erased or an error condition
//! occurred. If flash top sector is erased the function will program the
//! the device security data bytes with default values. The device security
//! data located in the customer configuration area of the flash top sector,
//! must have valid values at all times. These values affect the configuration
//! of the device during boot.
//!
//! \note Please note that code can not execute in flash while any part of the flash
//! is being programmed or erased. This function must only be executed from ROM
//! or SRAM.
//!
//! \param ui32SectorAddress is the starting address in flash of the sector to be
//! erased.
//!
//! \return Returns the status of the sector erase:
//! - \ref FAPI_STATUS_SUCCESS : Success.
//! - \ref FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH : Invalid argument.
//! - \ref FAPI_STATUS_FSM_ERROR : A programming error is encountered.
//
//*****************************************************************************
extern uint32_t FlashSectorErase(uint32_t ui32SectorAddress);
//*****************************************************************************
//
//! \brief Programs unprotected main bank flash sectors.
//!
//! This function will program a sequence of bytes into the on-chip flash.
//! Programming each location consists of the result of an AND operation
//! of the new data and the existing data; in other words bits that contain
//! 1 can remain 1 or be changed to 0, but bits that are 0 cannot be changed
//! to 1. Therefore, a byte can be programmed multiple times as long as these
//! rules are followed; if a program operation attempts to change a 0 bit to
//! a 1 bit, that bit will not have its value changed.
//!
//! This function will not return until the data has been programmed or an
//! programming error has occurred.
//!
//! \note Please note that code can not execute in flash while any part of the flash
//! is being programmed or erased. This function must only be executed from ROM
//! or SRAM.
//!
//! The \c pui8DataBuffer pointer can not point to flash.
//!
//! \param pui8DataBuffer is a pointer to the data to be programmed.
//! \param ui32Address is the starting address in flash to be programmed.
//! \param ui32Count is the number of bytes to be programmed.
//!
//! \return Returns status of the flash programming:
//! - \ref FAPI_STATUS_SUCCESS : Success.
//! - \ref FAPI_STATUS_INCORRECT_DATABUFFER_LENGTH : Too many bytes were requested.
//! - \ref FAPI_STATUS_FSM_ERROR : A programming error is encountered.
//
//*****************************************************************************
extern uint32_t FlashProgram(uint8_t *pui8DataBuffer,
uint32_t ui32Address, uint32_t ui32Count);
//*****************************************************************************
//
//! \brief Reads efuse data from specified row.
//!
//! This function will read one efuse row.
//! It is assumed that any previous efuse operation has finished.
//!
//! \param pui32EfuseData is pointer to variable to be updated with efuse data.
//! \param ui32RowAddress is the efuse row number to be read. First row is row
//! number 0.
//!
//! \return Returns the status of the efuse read operation.
//! - \c false : OK status.
//! - \c true : Error status
//
//*****************************************************************************
extern bool FlashEfuseReadRow(uint32_t *pui32EfuseData,
uint32_t ui32RowAddress);
//*****************************************************************************
//
//! \brief Disables all sectors for erase and programming on the active bank.
//!
//! This function disables all sectors for erase and programming on the active
//! bank and enables the Idle Reading Power reduction mode if no low power
//! mode is configured. Furthermore, an additional level of protection from
//! erase is enabled.
//!
//! \note Please note that code can not execute in flash while any part of the flash
//! is being programmed or erased.
//!
//! \return None
//
//*****************************************************************************
extern void FlashDisableSectorsForWrite(void);
//*****************************************************************************
//
// Support for DriverLib in ROM:
// Redirect to implementation in ROM when available.
//
//*****************************************************************************
#if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
#include "../driverlib/rom.h"
#ifdef ROM_FlashPowerModeSet
#undef FlashPowerModeSet
#define FlashPowerModeSet ROM_FlashPowerModeSet
#endif
#ifdef ROM_FlashPowerModeGet
#undef FlashPowerModeGet
#define FlashPowerModeGet ROM_FlashPowerModeGet
#endif
#ifdef ROM_FlashProtectionSet
#undef FlashProtectionSet
#define FlashProtectionSet ROM_FlashProtectionSet
#endif
#ifdef ROM_FlashProtectionGet
#undef FlashProtectionGet
#define FlashProtectionGet ROM_FlashProtectionGet
#endif
#ifdef ROM_FlashProtectionSave
#undef FlashProtectionSave
#define FlashProtectionSave ROM_FlashProtectionSave
#endif
#ifdef ROM_FlashSectorErase
#undef FlashSectorErase
#define FlashSectorErase ROM_FlashSectorErase
#endif
#ifdef ROM_FlashProgram
#undef FlashProgram
#define FlashProgram ROM_FlashProgram
#endif
#ifdef ROM_FlashEfuseReadRow
#undef FlashEfuseReadRow
#define FlashEfuseReadRow ROM_FlashEfuseReadRow
#endif
#ifdef ROM_FlashDisableSectorsForWrite
#undef FlashDisableSectorsForWrite
#define FlashDisableSectorsForWrite ROM_FlashDisableSectorsForWrite
#endif
#endif
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __FLASH_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/gpio.c
Vendored
-41
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@@ -1,41 +0,0 @@
/******************************************************************************
* Filename: gpio.c
* Revised: 2016-09-19 10:36:17 +0200 (Mon, 19 Sep 2016)
* Revision: 47179
*
* Description: Driver for the GPIO
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#include "gpio.h"
// see gpio.h for implementation
third_party/ti/devices/cc26x0/driverlib/gpio.h
Vendored
-634
View File
@@ -1,634 +0,0 @@
/******************************************************************************
* Filename: gpio.h
* Revised: 2016-10-06 17:21:09 +0200 (Thu, 06 Oct 2016)
* Revision: 47343
*
* Description: Defines and prototypes for the GPIO.
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//*****************************************************************************
//
//! \addtogroup peripheral_group
//! @{
//! \addtogroup gpio_api
//! @{
//
//*****************************************************************************
#ifndef __GPIO_H__
#define __GPIO_H__
//*****************************************************************************
//
// If building with a C++ compiler, make all of the definitions in this header
// have a C binding.
//
//*****************************************************************************
#ifdef __cplusplus
extern "C"
{
#endif
#include <stdint.h>
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_gpio.h"
#include "debug.h"
//*****************************************************************************
//
// Check for legal range of variable dioNumber
//
//*****************************************************************************
#ifdef DRIVERLIB_DEBUG
#include "../inc/hw_fcfg1.h"
#include "chipinfo.h"
static bool
dioNumberLegal( uint32_t dioNumber )
{
uint32_t ioCount =
(( HWREG( FCFG1_BASE + FCFG1_O_IOCONF ) &
FCFG1_IOCONF_GPIO_CNT_M ) >>
FCFG1_IOCONF_GPIO_CNT_S ) ;
// Special handling of CC13xx 7x7, where IO_CNT = 30 and legal range is 1..30
// for all other chips legal range is 0..(dioNumber-1)
if (( ioCount == 30 ) && ChipInfo_ChipFamilyIsCC13xx() ) {
return (( dioNumber > 0 ) && ( dioNumber <= ioCount ));
} else {
return ( dioNumber < ioCount );
}
}
#endif
//*****************************************************************************
//
// The following values define the bit field for the GPIO DIOs.
//
//*****************************************************************************
#define GPIO_DIO_0_MASK 0x00000001 // GPIO DIO 0 mask
#define GPIO_DIO_1_MASK 0x00000002 // GPIO DIO 1 mask
#define GPIO_DIO_2_MASK 0x00000004 // GPIO DIO 2 mask
#define GPIO_DIO_3_MASK 0x00000008 // GPIO DIO 3 mask
#define GPIO_DIO_4_MASK 0x00000010 // GPIO DIO 4 mask
#define GPIO_DIO_5_MASK 0x00000020 // GPIO DIO 5 mask
#define GPIO_DIO_6_MASK 0x00000040 // GPIO DIO 6 mask
#define GPIO_DIO_7_MASK 0x00000080 // GPIO DIO 7 mask
#define GPIO_DIO_8_MASK 0x00000100 // GPIO DIO 8 mask
#define GPIO_DIO_9_MASK 0x00000200 // GPIO DIO 9 mask
#define GPIO_DIO_10_MASK 0x00000400 // GPIO DIO 10 mask
#define GPIO_DIO_11_MASK 0x00000800 // GPIO DIO 11 mask
#define GPIO_DIO_12_MASK 0x00001000 // GPIO DIO 12 mask
#define GPIO_DIO_13_MASK 0x00002000 // GPIO DIO 13 mask
#define GPIO_DIO_14_MASK 0x00004000 // GPIO DIO 14 mask
#define GPIO_DIO_15_MASK 0x00008000 // GPIO DIO 15 mask
#define GPIO_DIO_16_MASK 0x00010000 // GPIO DIO 16 mask
#define GPIO_DIO_17_MASK 0x00020000 // GPIO DIO 17 mask
#define GPIO_DIO_18_MASK 0x00040000 // GPIO DIO 18 mask
#define GPIO_DIO_19_MASK 0x00080000 // GPIO DIO 19 mask
#define GPIO_DIO_20_MASK 0x00100000 // GPIO DIO 20 mask
#define GPIO_DIO_21_MASK 0x00200000 // GPIO DIO 21 mask
#define GPIO_DIO_22_MASK 0x00400000 // GPIO DIO 22 mask
#define GPIO_DIO_23_MASK 0x00800000 // GPIO DIO 23 mask
#define GPIO_DIO_24_MASK 0x01000000 // GPIO DIO 24 mask
#define GPIO_DIO_25_MASK 0x02000000 // GPIO DIO 25 mask
#define GPIO_DIO_26_MASK 0x04000000 // GPIO DIO 26 mask
#define GPIO_DIO_27_MASK 0x08000000 // GPIO DIO 27 mask
#define GPIO_DIO_28_MASK 0x10000000 // GPIO DIO 28 mask
#define GPIO_DIO_29_MASK 0x20000000 // GPIO DIO 29 mask
#define GPIO_DIO_30_MASK 0x40000000 // GPIO DIO 30 mask
#define GPIO_DIO_31_MASK 0x80000000 // GPIO DIO 31 mask
#define GPIO_DIO_ALL_MASK 0xFFFFFFFF // GPIO all DIOs mask
//*****************************************************************************
//
// Define constants that shall be passed as the outputEnableValue parameter to
// GPIO_setOutputEnableDio() and will be returned from the function
// GPIO_getOutputEnableDio().
//
//*****************************************************************************
#define GPIO_OUTPUT_DISABLE 0x00000000 // DIO output is disabled
#define GPIO_OUTPUT_ENABLE 0x00000001 // DIO output is enabled
//*****************************************************************************
//
// API Functions and prototypes
//
//*****************************************************************************
//*****************************************************************************
//
//! \brief Reads a specific DIO.
//!
//! \param dioNumber specifies the DIO to read (0-31).
//!
//! \return Returns 0 or 1 reflecting the input value of the specified DIO.
//!
//! \sa \ref GPIO_readMultiDio(), \ref GPIO_writeDio(), \ref GPIO_writeMultiDio()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
GPIO_readDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Return the input value from the specified DIO.
return (( HWREG( GPIO_BASE + GPIO_O_DIN31_0 ) >> dioNumber ) & 1 );
}
//*****************************************************************************
//
//! \brief Reads the input value for the specified DIOs.
//!
//! This function returns the the input value for multiple DIOs.
//! The value returned is not shifted and hence matches the corresponding dioMask bits.
//!
//! \param dioMask is the bit-mask representation of the DIOs to read.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return Returns a bit vector reflecting the input value of the corresponding DIOs.
//! - 0 : Corresponding DIO is low.
//! - 1 : Corresponding DIO is high.
//!
//! \sa \ref GPIO_readDio(), \ref GPIO_writeDio(), \ref GPIO_writeMultiDio()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
GPIO_readMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Return the input value from the specified DIOs.
return ( HWREG( GPIO_BASE + GPIO_O_DIN31_0 ) & dioMask );
}
//*****************************************************************************
//
//! \brief Writes a value to a specific DIO.
//!
//! \param dioNumber specifies the DIO to update (0-31).
//! \param value specifies the value to write
//! - 0 : Logic zero (low)
//! - 1 : Logic one (high)
//!
//! \return None
//!
//! \sa \ref GPIO_writeMultiDio(), \ref GPIO_readDio(), \ref GPIO_readMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_writeDio( uint32_t dioNumber, uint32_t value )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
ASSERT(( value == 0 ) || ( value == 1 ));
// Write 0 or 1 to the byte indexed DOUT map
HWREGB( GPIO_BASE + dioNumber ) = value;
}
//*****************************************************************************
//
//! \brief Writes masked data to the specified DIOs.
//!
//! Enables for writing multiple bits simultaneously.
//! The value to write must be shifted so it matches the corresponding dioMask bits.
//!
//! \note Note that this is a read-modify-write operation and hence not atomic.
//!
//! \param dioMask is the bit-mask representation of the DIOs to write.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//! \param bitVectoredValue holds the value to be written to the corresponding DIO-bits.
//!
//! \return None
//!
//! \sa \ref GPIO_writeDio(), \ref GPIO_readDio(), \ref GPIO_readMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_writeMultiDio( uint32_t dioMask, uint32_t bitVectoredValue )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
HWREG( GPIO_BASE + GPIO_O_DOUT31_0 ) =
( HWREG( GPIO_BASE + GPIO_O_DOUT31_0 ) & ~dioMask ) |
( bitVectoredValue & dioMask );
}
//*****************************************************************************
//
//! \brief Sets a specific DIO to 1 (high).
//!
//! \param dioNumber specifies the DIO to set (0-31).
//!
//! \return None
//!
//! \sa \ref GPIO_setMultiDio(), \ref GPIO_clearDio(), \ref GPIO_clearMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_setDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Set the specified DIO.
HWREG( GPIO_BASE + GPIO_O_DOUTSET31_0 ) = ( 1 << dioNumber );
}
//*****************************************************************************
//
//! \brief Sets the specified DIOs to 1 (high).
//!
//! \param dioMask is the bit-mask representation of the DIOs to set.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return None
//!
//! \sa \ref GPIO_setDio(), \ref GPIO_clearDio(), \ref GPIO_clearMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_setMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Set the DIOs.
HWREG( GPIO_BASE + GPIO_O_DOUTSET31_0 ) = dioMask;
}
//*****************************************************************************
//
//! \brief Clears a specific DIO to 0 (low).
//!
//! \param dioNumber specifies the DIO to clear (0-31).
//!
//! \return None
//!
//! \sa \ref GPIO_clearMultiDio(), \ref GPIO_setDio(), \ref GPIO_setMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_clearDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Clear the specified DIO.
HWREG( GPIO_BASE + GPIO_O_DOUTCLR31_0 ) = ( 1 << dioNumber );
}
//*****************************************************************************
//
//! \brief Clears the specified DIOs to 0 (low).
//!
//! \param dioMask is the bit-mask representation of the DIOs to clear.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return None
//!
//! \sa \ref GPIO_clearDio(), \ref GPIO_setDio(), \ref GPIO_setMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_clearMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Clear the DIOs.
HWREG( GPIO_BASE + GPIO_O_DOUTCLR31_0 ) = dioMask;
}
//*****************************************************************************
//
//! \brief Toggles a specific DIO.
//!
//! \param dioNumber specifies the DIO to toggle (0-31).
//!
//! \return None
//!
//! \sa \ref GPIO_toggleMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_toggleDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Toggle the specified DIO.
HWREG( GPIO_BASE + GPIO_O_DOUTTGL31_0 ) = ( 1 << dioNumber );
}
//*****************************************************************************
//
//! \brief Toggles the specified DIOs.
//!
//! \param dioMask is the bit-mask representation of the DIOs to toggle.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return None
//!
//! \sa \ref GPIO_toggleDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_toggleMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Toggle the DIOs.
HWREG( GPIO_BASE + GPIO_O_DOUTTGL31_0 ) = dioMask;
}
//*****************************************************************************
//
//! \brief Gets the output enable status of a specific DIO.
//!
//! This function returns the output enable status for the specified DIO.
//! The DIO can be configured as either input or output under software control.
//!
//! \param dioNumber specifies the DIO to get the output enable setting from (0-31).
//!
//! \return Returns one of the enumerated data types (0 or 1):
//! - \ref GPIO_OUTPUT_DISABLE : DIO output is disabled.
//! - \ref GPIO_OUTPUT_ENABLE : DIO output is enabled.
//!
//! \sa \ref GPIO_getOutputEnableMultiDio(), \ref GPIO_setOutputEnableDio(), \ref GPIO_setOutputEnableMultiDio()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
GPIO_getOutputEnableDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Return the output enable status for the specified DIO.
return (( HWREG( GPIO_BASE + GPIO_O_DOE31_0 ) >> dioNumber ) & 1 );
}
//*****************************************************************************
//
//! \brief Gets the output enable setting of the specified DIOs.
//!
//! This function returns the output enable setting for multiple DIOs.
//! The value returned is not shifted and hence matches the corresponding dioMask bits.
//!
//! \param dioMask is the bit-mask representation of the DIOs to return the output enable settings from.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return Returns the output enable setting for multiple DIOs as a bit vector corresponding to the dioMask bits.
//! - 0 : Corresponding DIO is configured with output disabled.
//! - 1 : Corresponding DIO is configured with output enabled.
//!
//! \sa \ref GPIO_getOutputEnableDio(), \ref GPIO_setOutputEnableDio(), \ref GPIO_setOutputEnableMultiDio()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
GPIO_getOutputEnableMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Return the output enable value for the specified DIOs.
return ( HWREG( GPIO_BASE + GPIO_O_DOE31_0 ) & dioMask );
}
//*****************************************************************************
//
//! \brief Sets output enable of a specific DIO.
//!
//! This function sets the GPIO output enable bit for the specified DIO.
//! The DIO can be configured as either input or output under software control.
//!
//! \param dioNumber specifies the DIO to configure (0-31).
//! \param outputEnableValue specifies the output enable setting of the specified DIO:
//! - \ref GPIO_OUTPUT_DISABLE : DIO output is disabled.
//! - \ref GPIO_OUTPUT_ENABLE : DIO output is enabled.
//!
//! \return None
//!
//! \sa \ref GPIO_setOutputEnableMultiDio(), \ref GPIO_getOutputEnableDio(), \ref GPIO_getOutputEnableMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_setOutputEnableDio( uint32_t dioNumber, uint32_t outputEnableValue )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
ASSERT(( outputEnableValue == GPIO_OUTPUT_DISABLE ) ||
( outputEnableValue == GPIO_OUTPUT_ENABLE ) );
// Update the output enable bit for the specified DIO.
HWREGBITW( GPIO_BASE + GPIO_O_DOE31_0, dioNumber ) = outputEnableValue;
}
//*****************************************************************************
//
//! \brief Configures the output enable setting for all specified DIOs.
//!
//! This function configures the output enable setting for the specified DIOs.
//! The output enable setting must be shifted so it matches the corresponding dioMask bits.
//! The DIOs can be configured as either an input or output under software control.
//!
//! \note Note that this is a read-modify-write operation and hence not atomic.
//!
//! \param dioMask is the bit-mask representation of the DIOs on which to configure the
//! output enable setting. The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//! \param bitVectoredOutputEnable holds the output enable setting the corresponding DIO-bits:
//! - 0 : Corresponding DIO is configured with output disabled.
//! - 1 : Corresponding DIO is configured with output enabled.
//!
//! \return None
//!
//! \sa \ref GPIO_setOutputEnableDio(), \ref GPIO_getOutputEnableDio(), \ref GPIO_getOutputEnableMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_setOutputEnableMultiDio( uint32_t dioMask, uint32_t bitVectoredOutputEnable )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
HWREG( GPIO_BASE + GPIO_O_DOE31_0 ) =
( HWREG( GPIO_BASE + GPIO_O_DOE31_0 ) & ~dioMask ) |
( bitVectoredOutputEnable & dioMask );
}
//*****************************************************************************
//
//! \brief Gets the event status of a specific DIO.
//!
//! \param dioNumber specifies the DIO to get the event status from (0-31).
//!
//! \return Returns the current event status on the specified DIO.
//! - 0 : Non-triggered event.
//! - 1 : Triggered event.
//!
//! \sa \ref GPIO_getEventMultiDio(), \ref GPIO_clearEventDio(), \ref GPIO_clearEventMultiDio()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
GPIO_getEventDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Return the event status for the specified DIO.
return (( HWREG( GPIO_BASE + GPIO_O_EVFLAGS31_0 ) >> dioNumber ) & 1 );
}
//*****************************************************************************
//
//! \brief Gets the event status of the specified DIOs.
//!
//! This function returns the event status for multiple DIOs.
//! The value returned is not shifted and hence matches the corresponding dioMask bits.
//!
//! \param dioMask is the bit-mask representation of the DIOs to get the
//! event status from (0-31).
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return Returns a bit vector with the current event status correspondig to the specified DIOs.
//! - 0 : Corresponding DIO has no triggered event.
//! - 1 : Corresponding DIO has a triggered event.
//!
//! \sa \ref GPIO_getEventDio(), \ref GPIO_clearEventDio(), \ref GPIO_clearEventMultiDio()
//
//*****************************************************************************
__STATIC_INLINE uint32_t
GPIO_getEventMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Return the event status for the specified DIO.
return ( HWREG( GPIO_BASE + GPIO_O_EVFLAGS31_0 ) & dioMask );
}
//*****************************************************************************
//
//! \brief Clears the IO event status of a specific DIO.
//!
//! \param dioNumber specifies the DIO on which to clear the event status (0-31).
//!
//! \return None
//!
//! \sa \ref GPIO_clearEventMultiDio(), \ref GPIO_getEventDio(), \ref GPIO_getEventMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_clearEventDio( uint32_t dioNumber )
{
// Check the arguments.
ASSERT( dioNumberLegal( dioNumber ));
// Clear the event status for the specified DIO.
HWREG( GPIO_BASE + GPIO_O_EVFLAGS31_0 ) = ( 1 << dioNumber );
}
//*****************************************************************************
//
//! \brief Clears the IO event status on the specified DIOs.
//!
//! \param dioMask is the bit-mask representation of the DIOs on which to
//! clear the events status.
//! The parameter must be a bitwise OR'ed combination of the following:
//! - \ref GPIO_DIO_0_MASK
//! - ...
//! - \ref GPIO_DIO_31_MASK
//!
//! \return None
//!
//! \sa \ref GPIO_clearEventDio(), \ref GPIO_getEventDio(), \ref GPIO_getEventMultiDio()
//
//*****************************************************************************
__STATIC_INLINE void
GPIO_clearEventMultiDio( uint32_t dioMask )
{
// Check the arguments.
ASSERT( dioMask & GPIO_DIO_ALL_MASK );
// Clear the event status for the specified DIOs.
HWREG( GPIO_BASE + GPIO_O_EVFLAGS31_0 ) = dioMask;
}
//*****************************************************************************
//
// Mark the end of the C bindings section for C++ compilers.
//
//*****************************************************************************
#ifdef __cplusplus
}
#endif
#endif // __GPIO_H__
//*****************************************************************************
//
//! Close the Doxygen group.
//! @}
//! @}
//
//*****************************************************************************
third_party/ti/devices/cc26x0/driverlib/gpio_doc.h
Vendored
-90
View File
@@ -1,90 +0,0 @@
/******************************************************************************
* Filename: gpio_doc.h
* Revised: 2016-03-30 13:03:59 +0200 (Wed, 30 Mar 2016)
* Revision: 45971
*
* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1) Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2) Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
* be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
//! \addtogroup gpio_api
//! @{
//! \section sec_gpio Introduction
//!
//! The GPIO module allows software to control the pins of the device directly if the IOC module has
//! been configured to route the GPIO signal to a physical pin (called DIO). Alternatively, pins can
//! be hardware controlled by other peripheral modules. For more information about the IOC module,
//! how to configure physical pins, and how to select between software controlled and hardware controlled,
//! see the [IOC API](\ref ioc_api).
//!
//! The System CPU can access the GPIO module to read the value of any DIO of the device and if the IOC
//! module has been configured such that one or more DIOs are GPIO controlled (software controlled) the
//! System CPU can write these DIOs through the GPIO module.
//!
//! The IOC module can also be configured to generate events on edge detection and these events can be
//! read and cleared in the GPIO module by the System CPU.
//!
//! \section sec_gpio_api API
//!
//! The API functions can be grouped like this:
//!
//! Set and get direction of DIO (output enable):
//! - \ref GPIO_setOutputEnableDio()
//! - \ref GPIO_setOutputEnableMultiDio()
//! - \ref GPIO_getOutputEnableDio()
//! - \ref GPIO_getOutputEnableMultiDio()
//!
//! Write DIO (requires IOC to be configured for GPIO usage):
//! - \ref GPIO_writeDio()
//! - \ref GPIO_writeMultiDio()
//!
//! Set, clear, or toggle DIO (requires IOC to be configured for GPIO usage):
//! - \ref GPIO_setDio()
//! - \ref GPIO_setMultiDio()
//! - \ref GPIO_clearDio()
//! - \ref GPIO_clearMultiDio()
//! - \ref GPIO_toggleDio()
//! - \ref GPIO_toggleMultiDio()
//!
//! Read DIO (even if IOC is NOT configured for GPIO usage; however, the DIO must be configured for input enable in IOC):
//! - \ref GPIO_readDio()
//! - \ref GPIO_readMultiDio()
//!
//! Read or clear events (even if IOC is NOT configured for GPIO usage; however, the DIO must be configured for input enable in IOC):
//! - \ref GPIO_getEventDio()
//! - \ref GPIO_getEventMultiDio()
//! - \ref GPIO_clearEventDio()
//! - \ref GPIO_clearEventMultiDio()
//!
//! The [IOC API](\ref ioc_api) provides two functions for easy configuration of DIOs as GPIO enabled using
//! typical settings. They also serve as examples on how to configure the IOC and GPIO modules for GPIO usage:
//! - \ref IOCPinTypeGpioInput()
//! - \ref IOCPinTypeGpioOutput()
//!
//! @}

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